From 6aeb83416cc9ccd511c71a433a8e6fc58302e002 Mon Sep 17 00:00:00 2001 From: angelosa Date: Sat, 21 Sep 2024 15:44:33 +0200 Subject: video/mc6845.cpp: lift horizontal display and mode control from being zeroed in device_reset * fix bml3 getting stuck on soft resets; --- src/devices/video/mc6845.cpp | 6 ++++-- src/mame/hitachi/bml3.cpp | 15 ++++++++------- 2 files changed, 12 insertions(+), 9 deletions(-) diff --git a/src/devices/video/mc6845.cpp b/src/devices/video/mc6845.cpp index 8054b08a4f7..8ae471017d2 100644 --- a/src/devices/video/mc6845.cpp +++ b/src/devices/video/mc6845.cpp @@ -1280,11 +1280,13 @@ void mc6845_device::device_reset() m_light_pen_latched = false; + // TODO: as per the note above, none of these should reset unless otherwise proven. m_cursor_addr = 0; m_line_address = 0; - m_horiz_disp = 0; + // bml3 in particular disagrees with these two. + //m_horiz_disp = 0; + //m_mode_control = 0; m_cursor_x = 0; - m_mode_control = 0; m_register_address_latch = 0; m_update_addr = 0; m_light_pen_addr = 0; diff --git a/src/mame/hitachi/bml3.cpp b/src/mame/hitachi/bml3.cpp index 4775a49dbf7..12c0d2df941 100644 --- a/src/mame/hitachi/bml3.cpp +++ b/src/mame/hitachi/bml3.cpp @@ -924,9 +924,10 @@ void bml3_state::machine_reset() m_nmi = 0; m_kbt = 0; - m_hres_reg = 0; - m_vres_reg = 0; - crtc_change_clock(); + // NOTE: bml3 do not bother with CRTC on soft resets (which is physically tied to front panel). + //m_hres_reg = 0; + //m_vres_reg = 0; + //crtc_change_clock(); } void bml3mk5_state::machine_start() @@ -1080,10 +1081,10 @@ void bml3_state::bml3(machine_config &config) m_cassette->set_interface("bml3_cass"); screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); - screen.set_refresh_hz(60); - screen.set_vblank_time(ATTOSECONDS_IN_USEC(2400)); /* Service manual specifies "Raster return period" as 2.4 ms (p.64), although the total vertical non-displaying time seems to be 4 ms. */ - screen.set_size(640, 400); - screen.set_visarea(0, 320-1, 0, 200-1); + // Service manual specifies "Raster return period" as 2.4 ms (p.64), + // although the total vertical non-displaying time seems to be 4 ms. + // NOTE: D80_CLOCK x 2 as per MAME interlace limitation + screen.set_raw(D80_CLOCK * 2, 1024, 0, 640 - 1, 518, 0, 400 - 1); screen.set_screen_update("crtc", FUNC(mc6845_device::screen_update)); PALETTE(config, m_palette, palette_device::BRG_3BIT); -- cgit v1.2.3