From 6853c9e81145041678bba4eab47b4d9a13d76284 Mon Sep 17 00:00:00 2001 From: hap Date: Wed, 7 Feb 2024 02:52:19 +0100 Subject: h8: add h8/325 interrupt controller and 16bit timer, prisma: add lcd screen and some i/o --- src/devices/cpu/h8/h8325.cpp | 19 +++--- src/devices/cpu/h8/h8325.h | 4 +- src/devices/cpu/h8/h8_intc.cpp | 52 +++++++++++----- src/devices/cpu/h8/h8_intc.h | 31 +++++++--- src/devices/cpu/h8/h8_timer16.cpp | 96 +++++++++++++++++++++++++++-- src/devices/cpu/h8/h8_timer16.h | 41 +++++++++++-- src/mame/saitek/prisma.cpp | 126 +++++++++++++++++++++----------------- src/mame/saitek/simultano.cpp | 4 +- 8 files changed, 265 insertions(+), 108 deletions(-) diff --git a/src/devices/cpu/h8/h8325.cpp b/src/devices/cpu/h8/h8325.cpp index d34716b3ec5..7bd96025e25 100644 --- a/src/devices/cpu/h8/h8325.cpp +++ b/src/devices/cpu/h8/h8325.cpp @@ -7,8 +7,6 @@ H8/325 family emulation TODO: - - 16-bit timer is very different, needs a new subdevice? - - IRQ controller is slightly different - serial controllers are slightly different ***************************************************************************/ @@ -77,13 +75,11 @@ void h8325_device::map(address_map &map) { map(m_ram_start, 0xff7f).ram(); -// map(0xff90, 0xff90).rw(m_timer16_0, FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w)); -// map(0xff91, 0xff91).rw(m_timer16_0, FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w)); -// map(0xff92, 0xff93).rw(m_timer16_0, FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w)); -// map(0xff94, 0xff95).rw(m_timer16_0, FUNC(h8_timer16_channel_device::ocr_r, FUNC(h8_timer16_channel_device:ocr_w)); -// map(0xff96, 0xff96).rw(m_timer16_0, FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w)); -// map(0xff97, 0xff97).rw(m_timer16_0, FUNC(h8_timer16_channel_device::tocr_r, FUNC(h8_timer16_channel_device:tocr_w)); -// map(0xff98, 0xff99).r(m_timer16_0, FUNC(h8_timer16_channel_device::tgr_r)); + map(0xff90, 0xff90).rw(m_timer16_0, FUNC(h8325_timer16_channel_device::tcr_r), FUNC(h8325_timer16_channel_device::tcr_w)); + map(0xff91, 0xff91).rw(m_timer16_0, FUNC(h8325_timer16_channel_device::tsr_r), FUNC(h8325_timer16_channel_device::tsr_w)); // TCSR + map(0xff92, 0xff93).rw(m_timer16_0, FUNC(h8325_timer16_channel_device::tcnt_r), FUNC(h8325_timer16_channel_device::tcnt_w)); // FRC + map(0xff94, 0xff99).rw(m_timer16_0, FUNC(h8325_timer16_channel_device::tgr_r), FUNC(h8325_timer16_channel_device::tgr_w)); // OCRA/OCRB/ICR + map(0xff98, 0xff99).unmapw(); // ICR is read-only map(0xffb0, 0xffb0).w(m_port1, FUNC(h8_port_device::ddr_w)); map(0xffb1, 0xffb1).w(m_port2, FUNC(h8_port_device::ddr_w)); @@ -129,7 +125,7 @@ void h8325_device::map(address_map &map) void h8325_device::device_add_mconfig(machine_config &config) { - H8_INTC(config, m_intc, *this); + H8325_INTC(config, m_intc, *this); H8_PORT(config, m_port1, *this, h8_device::PORT_1, 0x00, 0x00); H8_PORT(config, m_port2, *this, h8_device::PORT_2, 0x00, 0x00); H8_PORT(config, m_port3, *this, h8_device::PORT_3, 0x00, 0x00); @@ -140,7 +136,7 @@ void h8325_device::device_add_mconfig(machine_config &config) H8_TIMER8_CHANNEL(config, m_timer8_0, *this, m_intc, 12, 13, 14, 8, 8, 64, 64, 1024, 1024); H8_TIMER8_CHANNEL(config, m_timer8_1, *this, m_intc, 15, 16, 17, 8, 8, 64, 64, 1024, 1024); H8_TIMER16(config, m_timer16, *this, 1, 0xff); - H8_TIMER16_CHANNEL(config, m_timer16_0, *this, 2, 0, m_intc, 8); + H8325_TIMER16_CHANNEL(config, m_timer16_0, *this, m_intc, 8); H8_SCI(config, m_sci[0], 0, *this, m_intc, 18, 19, 20, 20); H8_SCI(config, m_sci[1], 1, *this, m_intc, 21, 22, 23, 23); } @@ -205,6 +201,5 @@ void h8325_device::syscr_w(uint8_t data) uint8_t h8325_device::mdcr_r() { - logerror("mdcr_r\n"); return 0xe7; } diff --git a/src/devices/cpu/h8/h8325.h b/src/devices/cpu/h8/h8325.h index bc81961d25e..235d5a2838e 100644 --- a/src/devices/cpu/h8/h8325.h +++ b/src/devices/cpu/h8/h8325.h @@ -56,7 +56,7 @@ public: protected: h8325_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t start); - required_device m_intc; + required_device m_intc; required_device m_port1; required_device m_port2; required_device m_port3; @@ -67,7 +67,7 @@ protected: required_device m_timer8_0; required_device m_timer8_1; required_device m_timer16; - required_device m_timer16_0; + required_device m_timer16_0; uint8_t m_syscr; uint32_t m_ram_start; diff --git a/src/devices/cpu/h8/h8_intc.cpp b/src/devices/cpu/h8/h8_intc.cpp index 71cddc628ba..b2fc2db0a4a 100644 --- a/src/devices/cpu/h8/h8_intc.cpp +++ b/src/devices/cpu/h8/h8_intc.cpp @@ -1,5 +1,15 @@ // license:BSD-3-Clause // copyright-holders:Olivier Galibert +/*************************************************************************** + + h8_intc.cpp + + H8 interrupt controllers family + + TODO: + - H8/325 ICSR has bits for inverting the active state (low/high, rise/fall) + +***************************************************************************/ #include "emu.h" #include "h8_intc.h" @@ -8,6 +18,7 @@ DEFINE_DEVICE_TYPE(H8_INTC, h8_intc_device, "h8_intc", "H8 interrupt controller") +DEFINE_DEVICE_TYPE(H8325_INTC, h8325_intc_device, "h8325_intc", "H8/325 interrupt controller") DEFINE_DEVICE_TYPE(H8H_INTC, h8h_intc_device, "h8h_intc", "H8H interrupt controller") DEFINE_DEVICE_TYPE(H8S_INTC, h8s_intc_device, "h8s_intc", "H8S interrupt controller") DEFINE_DEVICE_TYPE(GT913_INTC, gt913_intc_device, "gt913_intc", "Casio GT913F interrupt controller") @@ -202,27 +213,14 @@ void h8_intc_device::get_priority(int vect, int &icr_pri, int &ipr_pri) const } -gt913_intc_device::gt913_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : - h8_intc_device(mconfig, GT913_INTC, tag, owner, clock) +h8325_intc_device::h8325_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + h8_intc_device(mconfig, H8325_INTC, tag, owner, clock) { m_irq_vector_base = 4; - m_irq_vector_count = 1; + m_irq_vector_count = 3; m_irq_vector_nmi = 3; } -void gt913_intc_device::device_reset() -{ - h8_intc_device::device_reset(); - - m_ier = 0x01; -} - -void gt913_intc_device::clear_interrupt(int vector) -{ - m_pending_irqs[vector >> 5] &= ~(1 << (vector & 31)); - update_irq_state(); -} - h8h_intc_device::h8h_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : h8h_intc_device(mconfig, H8H_INTC, tag, owner, clock) @@ -418,3 +416,25 @@ void h8s_intc_device::get_priority(int vect, int &icr_pri, int &ipr_pri) const icr_pri = (m_icr >> (slot ^ 7)) & 1; ipr_pri = (m_ipr[slot >> 1] >> (slot & 1 ? 0 : 4)) & 7; } + + +gt913_intc_device::gt913_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + h8_intc_device(mconfig, GT913_INTC, tag, owner, clock) +{ + m_irq_vector_base = 4; + m_irq_vector_count = 1; + m_irq_vector_nmi = 3; +} + +void gt913_intc_device::device_reset() +{ + h8_intc_device::device_reset(); + + m_ier = 0x01; +} + +void gt913_intc_device::clear_interrupt(int vector) +{ + m_pending_irqs[vector >> 5] &= ~(1 << (vector & 31)); + update_irq_state(); +} diff --git a/src/devices/cpu/h8/h8_intc.h b/src/devices/cpu/h8/h8_intc.h index b1571fc64c9..ff9784237cb 100644 --- a/src/devices/cpu/h8/h8_intc.h +++ b/src/devices/cpu/h8/h8_intc.h @@ -6,7 +6,6 @@ H8 interrupt controllers family - ***************************************************************************/ #ifndef MAME_CPU_H8_H8_INTC_H @@ -65,19 +64,14 @@ protected: void check_level_irqs(bool force_update = false); }; -class gt913_intc_device : public h8_intc_device { +class h8325_intc_device : public h8_intc_device { public: - gt913_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); - template gt913_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu) : - gt913_intc_device(mconfig, tag, owner) + h8325_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); + template h8325_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu) : + h8325_intc_device(mconfig, tag, owner) { m_cpu.set_tag(std::forward(cpu)); } - - void clear_interrupt(int vector); - -protected: - virtual void device_reset() override; }; class h8h_intc_device : public h8_intc_device { @@ -127,6 +121,7 @@ public: void ipr_w(offs_t offset, uint8_t data); uint8_t iprk_r(); void iprk_w(uint8_t data); + private: static const int vector_to_slot[]; uint8_t m_ipr[11]; @@ -135,7 +130,23 @@ private: virtual void device_reset() override; }; +class gt913_intc_device : public h8_intc_device { +public: + gt913_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); + template gt913_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu) : + gt913_intc_device(mconfig, tag, owner) + { + m_cpu.set_tag(std::forward(cpu)); + } + + void clear_interrupt(int vector); + +protected: + virtual void device_reset() override; +}; + DECLARE_DEVICE_TYPE(H8_INTC, h8_intc_device) +DECLARE_DEVICE_TYPE(H8325_INTC, h8325_intc_device) DECLARE_DEVICE_TYPE(H8H_INTC, h8h_intc_device) DECLARE_DEVICE_TYPE(H8S_INTC, h8s_intc_device) DECLARE_DEVICE_TYPE(GT913_INTC, gt913_intc_device) diff --git a/src/devices/cpu/h8/h8_timer16.cpp b/src/devices/cpu/h8/h8_timer16.cpp index 81bce7a49a6..d6862d223fd 100644 --- a/src/devices/cpu/h8/h8_timer16.cpp +++ b/src/devices/cpu/h8/h8_timer16.cpp @@ -8,10 +8,11 @@ // 1 = everything static constexpr int V = 0; -DEFINE_DEVICE_TYPE(H8_TIMER16, h8_timer16_device, "h8_timer16", "H8 16-bit timer") -DEFINE_DEVICE_TYPE(H8_TIMER16_CHANNEL, h8_timer16_channel_device, "h8_timer16_channel", "H8 16-bit timer channel") -DEFINE_DEVICE_TYPE(H8H_TIMER16_CHANNEL, h8h_timer16_channel_device, "h8h_timer16_channel", "H8H 16-bit timer channel") -DEFINE_DEVICE_TYPE(H8S_TIMER16_CHANNEL, h8s_timer16_channel_device, "h8s_timer16_channel", "H8S 16-bit timer channel") +DEFINE_DEVICE_TYPE(H8_TIMER16, h8_timer16_device, "h8_timer16", "H8 16-bit timer") +DEFINE_DEVICE_TYPE(H8_TIMER16_CHANNEL, h8_timer16_channel_device, "h8_timer16_channel", "H8 16-bit timer channel") +DEFINE_DEVICE_TYPE(H8325_TIMER16_CHANNEL, h8325_timer16_channel_device, "h8325_timer16_channel", "H8/325 16-bit timer channel") +DEFINE_DEVICE_TYPE(H8H_TIMER16_CHANNEL, h8h_timer16_channel_device, "h8h_timer16_channel", "H8H 16-bit timer channel") +DEFINE_DEVICE_TYPE(H8S_TIMER16_CHANNEL, h8s_timer16_channel_device, "h8s_timer16_channel", "H8S 16-bit timer channel") h8_timer16_channel_device::h8_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : h8_timer16_channel_device(mconfig, H8_TIMER16_CHANNEL, tag, owner, clock) @@ -100,13 +101,16 @@ void h8_timer16_channel_device::tier_w(uint8_t data) uint8_t h8_timer16_channel_device::tsr_r() { + update_counter(); return isr_to_sr(); } void h8_timer16_channel_device::tsr_w(uint8_t data) { + update_counter(); if(V>=1) logerror("tsr_w %02x\n", data); isr_update(data); + recalc_event(); } uint16_t h8_timer16_channel_device::tcnt_r() @@ -144,7 +148,7 @@ uint16_t h8_timer16_channel_device::tbr_r(offs_t offset) void h8_timer16_channel_device::tbr_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(m_tgr + offset + m_tgr_count); - if(V>=1) logerror("tbr%c_w %04x\n", 'a'+offset, m_tgr[offset]); + if(V>=1) logerror("tbr%c_w %04x\n", 'a'+offset, m_tgr[offset + m_tgr_count]); } void h8_timer16_channel_device::device_start() @@ -493,6 +497,88 @@ uint8_t h8_timer16_channel_device::tisr_r(int offset) const return 0x00; } + +h8325_timer16_channel_device::h8325_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + h8_timer16_channel_device(mconfig, H8325_TIMER16_CHANNEL, tag, owner, clock), + m_tcsr(0) +{ +} + +h8325_timer16_channel_device::~h8325_timer16_channel_device() +{ +} + +void h8325_timer16_channel_device::device_start() +{ + h8_timer16_channel_device::device_start(); + + save_item(NAME(m_tcsr)); +} + +void h8325_timer16_channel_device::device_reset() +{ + h8_timer16_channel_device::device_reset(); + + m_tcsr = 0; + m_clock_divider = 1; +} + +void h8325_timer16_channel_device::tcr_update() +{ + m_ier = + (m_tcr & 0x10 ? IRQ_V : 0) | + (m_tcr & 0x20 ? IRQ_A : 0) | + (m_tcr & 0x40 ? IRQ_B : 0) | + (m_tcr & 0x80 ? IRQ_C : 0); + + m_clock_type = DIV_1; + m_clock_divider = 0; + + switch (m_tcr & 3) { + case 0: // /2 + m_clock_divider = 1; + break; + case 1: // /8 + m_clock_divider = 3; + break; + case 2: // /32 + m_clock_divider = 5; + break; + case 3: // external + m_clock_type = INPUT_A; + break; + } +} + +void h8325_timer16_channel_device::isr_update(uint8_t val) +{ + m_tcsr = val; + + if (val & 1) + m_tgr_clearing = 0; + else + m_tgr_clearing = TGR_CLEAR_NONE; + + if(!(val & 0x10)) + m_isr &= ~IRQ_V; + if(!(val & 0x20)) + m_isr &= ~IRQ_A; + if(!(val & 0x40)) + m_isr &= ~IRQ_B; + if(!(val & 0x80)) + m_isr &= ~IRQ_C; +} + +uint8_t h8325_timer16_channel_device::isr_to_sr() const +{ + return (m_tcsr & 0x0f) | + (m_isr & IRQ_V ? 0x10 : 0) | + (m_isr & IRQ_A ? 0x20 : 0) | + (m_isr & IRQ_B ? 0x40 : 0) | + (m_isr & IRQ_C ? 0x80 : 0); +} + + h8h_timer16_channel_device::h8h_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : h8_timer16_channel_device(mconfig, H8H_TIMER16_CHANNEL, tag, owner, clock) { diff --git a/src/devices/cpu/h8/h8_timer16.h b/src/devices/cpu/h8/h8_timer16.h index 6178fd000fd..43bf3b38877 100644 --- a/src/devices/cpu/h8/h8_timer16.h +++ b/src/devices/cpu/h8/h8_timer16.h @@ -127,6 +127,38 @@ protected: virtual uint8_t isr_to_sr() const; }; +class h8325_timer16_channel_device : public h8_timer16_channel_device { +public: + h8325_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + template h8325_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, U &&intc, int irq_base) + : h8325_timer16_channel_device(mconfig, tag, owner, 0) + { + m_cpu.set_tag(std::forward(cpu)); + m_intc.set_tag(std::forward(intc)); + m_tgr_count = 3; // OCRA/OCRB/ICR + + m_interrupt[0] = irq_base + 1; + m_interrupt[1] = irq_base + 2; + m_interrupt[2] = irq_base; + m_interrupt[3] = -1; + m_interrupt[4] = irq_base + 3; + m_interrupt[5] = -1; + } + + virtual ~h8325_timer16_channel_device(); + +protected: + virtual void tcr_update() override; + virtual void isr_update(uint8_t value) override; + virtual uint8_t isr_to_sr() const override; + + virtual void device_start() override; + virtual void device_reset() override; + +private: + uint8_t m_tcsr; +}; + class h8h_timer16_channel_device : public h8_timer16_channel_device { public: h8h_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); @@ -237,9 +269,10 @@ protected: virtual void device_reset() override; }; -DECLARE_DEVICE_TYPE(H8_TIMER16, h8_timer16_device) -DECLARE_DEVICE_TYPE(H8_TIMER16_CHANNEL, h8_timer16_channel_device) -DECLARE_DEVICE_TYPE(H8H_TIMER16_CHANNEL, h8h_timer16_channel_device) -DECLARE_DEVICE_TYPE(H8S_TIMER16_CHANNEL, h8s_timer16_channel_device) +DECLARE_DEVICE_TYPE(H8_TIMER16, h8_timer16_device) +DECLARE_DEVICE_TYPE(H8_TIMER16_CHANNEL, h8_timer16_channel_device) +DECLARE_DEVICE_TYPE(H8325_TIMER16_CHANNEL, h8325_timer16_channel_device) +DECLARE_DEVICE_TYPE(H8H_TIMER16_CHANNEL, h8h_timer16_channel_device) +DECLARE_DEVICE_TYPE(H8S_TIMER16_CHANNEL, h8s_timer16_channel_device) #endif // MAME_CPU_H8_H8_TIMER16_H diff --git a/src/mame/saitek/prisma.cpp b/src/mame/saitek/prisma.cpp index 649890ee94a..77510de96c0 100644 --- a/src/mame/saitek/prisma.cpp +++ b/src/mame/saitek/prisma.cpp @@ -14,7 +14,8 @@ Hardware notes: It was also sold by Tandy as Chess Champion 2150L, with a slower CPU (16MHz XTAL). TODO: -- does not work, it's waiting for a 16-bit timer IRQ? +- does not work, it's unresponsive and will lock up after pressing buttons + (hold S to boot it up for now, that's not how it's supposed to be) - everything else *******************************************************************************/ @@ -25,7 +26,9 @@ TODO: #include "machine/sensorboard.h" #include "sound/dac.h" #include "video/pwm.h" +#include "video/sed1500.h" +#include "screen.h" #include "speaker.h" // internal artwork @@ -42,8 +45,11 @@ public: m_maincpu(*this, "maincpu"), m_board(*this, "board"), m_display(*this, "display"), + m_lcd_pwm(*this, "lcd_pwm"), + m_lcd(*this, "lcd"), m_dac(*this, "dac"), - m_inputs(*this, "IN.%u", 0) + m_inputs(*this, "IN.%u", 0), + m_out_lcd(*this, "s%u.%u", 0U, 0U) { } void prisma(machine_config &config); @@ -56,37 +62,42 @@ private: required_device m_maincpu; required_device m_board; required_device m_display; + required_device m_lcd_pwm; + required_device m_lcd; required_device m_dac; - required_ioport_array<3> m_inputs; + required_ioport_array<4> m_inputs; + output_finder<16, 34> m_out_lcd; u8 m_lcd_data = 0; u8 m_lcd_address = 0; + u8 m_lcd_write = 0; u8 m_inp_mux = 0; void main_map(address_map &map); // I/O handlers - u8 p1_r(); + void lcd_pwm_w(offs_t offset, u8 data); + void lcd_output_w(offs_t offset, u64 data); + void p1_w(u8 data); - u8 p2_r(); void p2_w(u8 data); - u8 p3_r(); void p3_w(u8 data); u8 p4_r(); void p4_w(u8 data); u8 p5_r(); void p5_w(u8 data); - u8 p6_r(); void p6_w(u8 data); u8 p7_r(); - void p7_w(u8 data); }; void prisma_state::machine_start() { + m_out_lcd.resolve(); + // register for savestates save_item(NAME(m_lcd_data)); save_item(NAME(m_lcd_address)); + save_item(NAME(m_lcd_write)); save_item(NAME(m_inp_mux)); } @@ -96,6 +107,16 @@ void prisma_state::machine_start() I/O *******************************************************************************/ +void prisma_state::lcd_pwm_w(offs_t offset, u8 data) +{ + m_out_lcd[offset & 0x3f][offset >> 6] = data; +} + +void prisma_state::lcd_output_w(offs_t offset, u64 data) +{ + m_lcd_pwm->write_row(offset, data); +} + //[:maincpu:port1] ddr_w ff //[:maincpu:port2] ddr_w ff //[:maincpu:port3] ddr_w ff @@ -104,63 +125,44 @@ void prisma_state::machine_start() //[:maincpu:port6] ddr_w ff //[:maincpu:port7] ddr_w 00 -u8 prisma_state::p1_r() -{ - //printf("r1 "); - return 0xff; -} - void prisma_state::p1_w(u8 data) { - //printf("w1_%X ",data); + // P10-P13: direct leds + // P14: speaker out m_dac->write(BIT(data, 4)); } -u8 prisma_state::p2_r() -{ - //printf("r2 "); - return 0xff; -} - void prisma_state::p2_w(u8 data) { - //printf("w2_%X ",data); - // P20-P27: input mux + // P20-P27: input mux, led data m_inp_mux = bitswap<8>(~data,7,6,5,4,0,3,1,2); -} - -u8 prisma_state::p3_r() -{ - //printf("r3 "); - return 0xff; + m_display->write_mx(~data); } void prisma_state::p3_w(u8 data) { - //printf("w3_%X ",data); // P30-P37: LCD data m_lcd_data = bitswap<8>(data,3,4,5,6,7,0,1,2); } u8 prisma_state::p4_r() { - //printf("r4 "); return 0xff; } void prisma_state::p4_w(u8 data) { - //printf("w4_%X ",data); // P40: LCD CS // P41: LCD RD // P42: LCD WR + if (~data & m_lcd_write && ~data & 1) + m_lcd->write(m_lcd_address, m_lcd_data); + m_lcd_write = data & 4; } u8 prisma_state::p5_r() { - //printf("r5 "); - u8 data = 0; // P50,P52: read buttons @@ -168,37 +170,34 @@ u8 prisma_state::p5_r() if (m_inp_mux & m_inputs[i]->read()) data |= 1 << i; - return ~data; -} + // P53: battery status + data |= m_inputs[3]->read() << 3; -void prisma_state::p5_w(u8 data) -{ - //printf("w5_%X ",data); + return (data ^ 7) | 0xf0; } -u8 prisma_state::p6_r() +void prisma_state::p5_w(u8 data) { - //printf("r6 "); - return 0xff; + // P54,P55: led select + m_display->write_my(~data >> 4 & 3); } void prisma_state::p6_w(u8 data) { - //printf("w6_%X ",data); // P60-P66: LCD address m_lcd_address = data & 0x7f; } u8 prisma_state::p7_r() { - //printf("r7 "); + u8 data = 0; + // P70-P77: read chessboard - return 0xff; -} + for (int i = 0; i < 8; i++) + if (BIT(m_inp_mux, i)) + data |= m_board->read_file(i); -void prisma_state::p7_w(u8 data) -{ - //printf("w7_%X ",data); + return bitswap<8>(~data,1,7,6,0,5,4,2,3); } @@ -220,14 +219,14 @@ void prisma_state::main_map(address_map &map) static INPUT_PORTS_START( prisma ) PORT_START("IN.0") - PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_1) + PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_1) // freq sel PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_2) PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_3) // k PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_4) // b PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_5) // swap PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_6) // ng PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_7) - PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_8) + PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_8) // freq sel PORT_START("IN.1") PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_Q) // nor @@ -248,6 +247,11 @@ static INPUT_PORTS_START( prisma ) PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_H) PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_J) // setup PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_K) // + + + PORT_START("IN.3") + PORT_CONFNAME( 0x01, 0x00, "Battery Status" ) + PORT_CONFSETTING( 0x01, "Low" ) + PORT_CONFSETTING( 0x00, DEF_STR( Normal ) ) INPUT_PORTS_END @@ -261,27 +265,32 @@ void prisma_state::prisma(machine_config &config) // basic machine hardware H8325(config, m_maincpu, 20_MHz_XTAL / 2); m_maincpu->set_addrmap(AS_PROGRAM, &prisma_state::main_map); - m_maincpu->read_port1().set(FUNC(prisma_state::p1_r)); m_maincpu->write_port1().set(FUNC(prisma_state::p1_w)); - m_maincpu->read_port2().set(FUNC(prisma_state::p2_r)); m_maincpu->write_port2().set(FUNC(prisma_state::p2_w)); - m_maincpu->read_port3().set(FUNC(prisma_state::p3_r)); m_maincpu->write_port3().set(FUNC(prisma_state::p3_w)); m_maincpu->read_port4().set(FUNC(prisma_state::p4_r)); m_maincpu->write_port4().set(FUNC(prisma_state::p4_w)); m_maincpu->read_port5().set(FUNC(prisma_state::p5_r)); m_maincpu->write_port5().set(FUNC(prisma_state::p5_w)); - m_maincpu->read_port6().set(FUNC(prisma_state::p6_r)); m_maincpu->write_port6().set(FUNC(prisma_state::p6_w)); m_maincpu->read_port7().set(FUNC(prisma_state::p7_r)); - m_maincpu->write_port7().set(FUNC(prisma_state::p7_w)); SENSORBOARD(config, m_board).set_type(sensorboard_device::BUTTONS); m_board->init_cb().set(m_board, FUNC(sensorboard_device::preset_chess)); m_board->set_delay(attotime::from_msec(150)); // video hardware - PWM_DISPLAY(config, m_display).set_size(2+3, 16); + SED1502(config, m_lcd, 32768).write_segs().set(FUNC(prisma_state::lcd_output_w)); + PWM_DISPLAY(config, m_lcd_pwm).set_size(16, 34); + m_lcd_pwm->set_refresh(attotime::from_hz(30)); + m_lcd_pwm->output_x().set(FUNC(prisma_state::lcd_pwm_w)); + + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_SVG)); + screen.set_refresh_hz(60); + screen.set_size(873/2, 1080/2); + screen.set_visarea_full(); + + PWM_DISPLAY(config, m_display).set_size(2+2, 8); //config.set_default_layout(layout_saitek_prisma); // sound hardware @@ -298,6 +307,9 @@ void prisma_state::prisma(machine_config &config) ROM_START( prisma ) ROM_REGION( 0x8000, "maincpu", 0 ) ROM_LOAD("90_saitek_86051150st9_3258l02p.u1", 0x0000, 0x8000, CRC(b6f8384f) SHA1(a4e8a4a45009c15bda1778512a87dea756aae6d8) ) + + ROM_REGION( 795951, "screen", 0 ) + ROM_LOAD("simultano.svg", 0, 795951, CRC(ac9942bb) SHA1(f9252e5bf7b8af698a403c3f8f5ea9e475e0bf0b) ) ROM_END } // anonymous namespace diff --git a/src/mame/saitek/simultano.cpp b/src/mame/saitek/simultano.cpp index da5408bf371..66e4c9ea75c 100644 --- a/src/mame/saitek/simultano.cpp +++ b/src/mame/saitek/simultano.cpp @@ -29,6 +29,8 @@ TODO: #include "emu.h" +#include "bus/generic/slot.h" +#include "bus/generic/carts.h" #include "cpu/m6502/m65c02.h" #include "cpu/m6502/r65c02.h" #include "machine/nvram.h" @@ -36,8 +38,6 @@ TODO: #include "sound/dac.h" #include "video/pwm.h" #include "video/sed1500.h" -#include "bus/generic/slot.h" -#include "bus/generic/carts.h" #include "screen.h" #include "softlist_dev.h" -- cgit v1.2.3