From 63872aebf328410d7ba9f1ac68fb648636feea85 Mon Sep 17 00:00:00 2001 From: hap Date: Wed, 8 Jan 2025 19:37:20 +0100 Subject: hc55516: correct variable type of digital sample in hc55516 class, small cleanup --- src/devices/sound/hc55516.cpp | 172 ++++++++++++++++++++---------------------- src/devices/sound/hc55516.h | 9 ++- 2 files changed, 85 insertions(+), 96 deletions(-) diff --git a/src/devices/sound/hc55516.cpp b/src/devices/sound/hc55516.cpp index 90d9a38d2a6..ef4cbcd922c 100644 --- a/src/devices/sound/hc55516.cpp +++ b/src/devices/sound/hc55516.cpp @@ -15,14 +15,15 @@ and removal of the encoder offset compensation DAC?) - /src/mame/exidy/exidy440_a.cpp has its own internal implementation of the MC3417 and MC3418, it should be using this file instead + - MC3417 interpolation slope being determined by the number of samples in + the current stream slice doesn't make sense *****************************************************************************/ #include "emu.h" #include "hc55516.h" - -/* fixed samplerate of 192khz */ +// fixed samplerate of 192khz #define SAMPLE_RATE (48000 * 4) #define INTEGRATOR_LEAK_TC 0.001 @@ -47,8 +48,6 @@ cvsd_device_base::cvsd_device_base(const machine_config &mconfig, device_type ty , m_last_clock_state(false) , m_buffered_bit(false) , m_shiftreg(0) - , m_curr_sample(0) - , m_next_sample(0) , m_samples_generated(0) { } @@ -59,14 +58,12 @@ cvsd_device_base::cvsd_device_base(const machine_config &mconfig, device_type ty void cvsd_device_base::device_start() { - /* create the stream */ + // create the stream m_stream = stream_alloc(0, 1, SAMPLE_RATE); save_item(NAME(m_last_clock_state)); save_item(NAME(m_buffered_bit)); save_item(NAME(m_shiftreg)); - save_item(NAME(m_curr_sample)); - save_item(NAME(m_next_sample)); save_item(NAME(m_samples_generated)); } @@ -92,7 +89,7 @@ int cvsd_device_base::clock_r() { // prevent debugger from changing the internal state if (!machine().side_effects_disabled()) - m_stream->update(); /* bring up to date first */ + m_stream->update(); // bring up to date first return clock_state_r(); } @@ -131,14 +128,12 @@ inline bool cvsd_device_base::is_external_oscillator() inline bool cvsd_device_base::is_clock_changed(bool clock_state) { - return ((!m_last_clock_state && clock_state) || - (m_last_clock_state && !clock_state)); + return ((!m_last_clock_state && clock_state) || (m_last_clock_state && !clock_state)); } inline bool cvsd_device_base::is_active_clock_transition(bool clock_state) { - return ((clock_state != m_last_clock_state) && - (clock_state == m_active_clock_edge)); + return ((clock_state != m_last_clock_state) && (clock_state == m_active_clock_edge)); } inline bool cvsd_device_base::current_clock_state() @@ -146,42 +141,42 @@ inline bool cvsd_device_base::current_clock_state() // keep track of the clock state given its previous state and the number of samples produced // i.e. if we generated m_samples_generated samples, at a sample rate of SAMPLE_RATE, then are we on a // positive or negative level of a squarewave at clock() hz? SAMPLE_RATE may not be an integer multiple of clock() - //uint64_t fractions_of_second = (((uint64_t)m_samples_generated)<<32) / SAMPLE_RATE; // 32.32 bits of seconds passed so far - //uint32_t clock_edges_passed = (fractions_of_second * clock() * 2)>>32 - //return (((((uint64_t)m_samples_generated<<32) * clock() * 2 / SAMPLE_RATE)>>32) & 0x1)?true:false; - return (((uint64_t)m_samples_generated * clock() * 2 / SAMPLE_RATE) & 0x01)?true:false; + //uint64_t fractions_of_second = (((uint64_t)m_samples_generated) << 32) / SAMPLE_RATE; // 32.32 bits of seconds passed so far + //uint32_t clock_edges_passed = (fractions_of_second * clock() * 2) >> 32 + //return bool(((((uint64_t)m_samples_generated << 32) * clock() * 2 / SAMPLE_RATE) >> 32) & 0x1); + return bool(((uint64_t)m_samples_generated * clock() * 2 / SAMPLE_RATE) & 0x01); } void cvsd_device_base::digit_w(int digit) { m_stream->update(); - m_buffered_bit = digit ? true : false; + m_buffered_bit = bool(digit); } void cvsd_device_base::clock_w(int state) { - /* update the output buffer first */ + // update the output buffer first m_stream->update(); - bool clock_state = state ? true : false; + bool clock_state = bool(state); - /* only makes sense for setups with a software driven clock */ + // only makes sense for setups with a software driven clock assert(!is_external_oscillator()); - /* speech clock changing? */ + // speech clock changing? if (is_clock_changed(clock_state)) { - /* clear the update count */ + // clear the update count m_samples_generated = 0; process_bit(m_buffered_bit, clock_state); } - /* update the clock */ + // update the clock m_last_clock_state = clock_state; } int cvsd_device_base::clock_state_r() { - /* only makes sense for setups with an external oscillator */ + // only makes sense for setups with an external oscillator assert(is_external_oscillator()); m_stream->update(); @@ -231,6 +226,7 @@ hc55516_device::hc55516_device(const machine_config &mconfig, device_type type, , m_intshift(intshift) , m_sylfilter(0) , m_intfilter(0) + , m_next_sample(0) , m_agc(true) , m_buffered_fzq(true) { @@ -246,6 +242,7 @@ void hc55516_device::device_start() save_item(NAME(m_sylfilter)); save_item(NAME(m_intfilter)); + save_item(NAME(m_next_sample)); save_item(NAME(m_agc)); save_item(NAME(m_buffered_fzq)); } @@ -257,6 +254,7 @@ void hc55516_device::device_start() void hc55516_device::device_reset() { cvsd_device_base::device_reset(); + // simulate /FZ having been held for a while m_sylfilter = 0x3f; m_intfilter = 0; @@ -275,16 +273,15 @@ int hc55516_device::agc_r() { // prevent debugger from changing the internal state if (!machine().side_effects_disabled()) - m_stream->update(); /* bring up to date first */ + m_stream->update(); // bring up to date first return m_agc; } void hc55516_device::process_bit(bool bit, bool clock_state) { - bool frozen = ( ( (m_intfilter >= 0x180) && (!bit) ) || - ( (m_intfilter <= -0x180) && (bit) ) ); - + const bool frozen = (((m_intfilter >= 0x180) && !bit) || ((m_intfilter <= -0x180) && bit)); int32_t sum; + if (is_active_clock_transition(clock_state)) { // grab the /FZ state; if the callback is present, use that, otherwise use the buffered state @@ -294,15 +291,15 @@ void hc55516_device::process_bit(bool bit, bool clock_state) else fzq_state = m_buffered_fzq; - if (!fzq_state) // /FZ is active low, if it is active, the input bit is ignored and the inverse of the previous bit in the shifter is used instead - bit = !(m_shiftreg&1); + // if /FZ is active, the input bit is ignored and the inverse of the previous bit in the shifter is used instead + if (!fzq_state) + bit = !(m_shiftreg & 1); - /* shift the new bit into the shift register */ - m_shiftreg = (m_shiftreg << 1) | (bit?1:0); + // shift the new bit into the shift register + m_shiftreg = (m_shiftreg << 1) | (bit ? 1 : 0); - /* if we got all 0's or all 1's in the last n bits... */ - if (((m_shiftreg & m_shiftreg_mask) == 0) || - ((m_shiftreg & m_shiftreg_mask) == m_shiftreg_mask)) + // if we got all 0's or all 1's in the last n bits... + if (((m_shiftreg & m_shiftreg_mask) == 0) || ((m_shiftreg & m_shiftreg_mask) == m_shiftreg_mask)) { // coincidence is true if (!frozen) m_sylfilter += (((~m_sylfilter) & m_sylmask) >> m_sylshift); @@ -314,28 +311,24 @@ void hc55516_device::process_bit(bool bit, bool clock_state) } m_sylfilter &= 0xfff; - sum = ( ((~m_intfilter) >> m_intshift) + 1 ) & 0x3ff; + sum = util::sext(((~m_intfilter) >> m_intshift) + 1, 10); } - else // inactive clock transition + else { - if (m_shiftreg&1) + // inactive clock transition + if (m_shiftreg & 1) { - sum = ( ( ~std::max(2, m_sylfilter >> 6) ) + 1 ) & 0x3ff; + sum = util::sext((~std::max(2, m_sylfilter >> 6)) + 1, 10); } else { - sum = std::max(2, m_sylfilter >> 6) & 0x3ff; + sum = util::sext(std::max(2, m_sylfilter >> 6), 10); } } - if (sum & 0x200) - sum |= ~0x3ff; // sign extend - if (!frozen) { - m_intfilter += sum; - m_intfilter &= 0x3ff; - if (m_intfilter & 0x200) m_intfilter |= ~0x3ff; // sign extend + m_intfilter = util::sext(m_intfilter + sum, 10); } /* scale the result (-512 to 511) to -32768 thru 32767 */ @@ -343,10 +336,10 @@ void hc55516_device::process_bit(bool bit, bool clock_state) F E D C B A 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0/9 8 7 6 5 4 */ - m_next_sample = ( (m_intfilter << 6) | ( ((m_intfilter & 0x3ff) ^ 0x200 ) >> 4 ) ); + m_next_sample = ((m_intfilter << 6) | (((m_intfilter & 0x3ff) ^ 0x200) >> 4)); // update agc state - if ( (m_intfilter >= 0x100) || (m_intfilter <= -0x100) ) + if ((m_intfilter >= 0x100) || (m_intfilter <= -0x100)) m_agc = false; else m_agc = true; @@ -363,22 +356,9 @@ void hc55516_device::sound_stream_update(sound_stream &stream, std::vector SAMPLE_RATE / 32) - { - m_samples_generated = SAMPLE_RATE; - m_next_sample = 0; - } - } -*/ - if (is_external_oscillator()) { - /* external oscillator */ + // external oscillator for (int i = 0; i < buffer.samples(); i++) { buffer.put_int(i, m_next_sample, 32768); @@ -387,7 +367,7 @@ void hc55516_device::sound_stream_update(sound_stream &stream, std::vector FILTER_MAX) - m_sylfilter_d = FILTER_MAX; + if (m_sylfilter > FILTER_MAX) + m_sylfilter = FILTER_MAX; } else { - m_sylfilter_d *= m_decay; + m_sylfilter *= m_decay; - if (m_sylfilter_d < FILTER_MIN) - m_sylfilter_d = FILTER_MIN; + if (m_sylfilter < FILTER_MIN) + m_sylfilter = FILTER_MIN; } - /* compute the sample as a 32-bit word */ - m_next_sample = m_intfilter_d * SAMPLE_GAIN; + // compute the sample as a 32-bit word + m_next_sample = m_intfilter * SAMPLE_GAIN; } } @@ -509,7 +495,7 @@ void mc3417_device::sound_stream_update(sound_stream &stream, std::vector SAMPLE_RATE / 32) { @@ -518,14 +504,14 @@ void mc3417_device::sound_stream_update(sound_stream &stream, std::vector