From 62e488dc0de2050cf0d8a835a47ceb68d5da3b5f Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Thu, 21 Mar 2024 19:13:05 +0100 Subject: New systems marked not working ------------------------------ Shizhan Sanguo Ji Jiaqiang Ban (Version 8.9 980413) [dyq, little0, Guru] --- src/mame/mame.lst | 1 + src/mame/misc/gms.cpp | 364 ++++++++++++++++++++++++++++++++++++++++++++------ 2 files changed, 322 insertions(+), 43 deletions(-) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 4eac397e7f7..e9e72306513 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -30164,6 +30164,7 @@ magslot // (c) 2003 GMS rbmk // (c) 1998 GMS rbspm // (c) 1998 GMS sc2in1 // (c) 2001 GMS +ssanguoj // (c) 1998 GMS sscs // (c) 1999 GMS super555 // (c) 1999 GMS diff --git a/src/mame/misc/gms.cpp b/src/mame/misc/gms.cpp index bc7688d4919..58383c09bdc 100644 --- a/src/mame/misc/gms.cpp +++ b/src/mame/misc/gms.cpp @@ -1,57 +1,71 @@ // license:BSD-3-Clause // copyright-holders: Tomasz Slanina, David Haywood +// thanks-to:Hammy -/* -实战麻将王 (Shízhàn Májiàng Wáng) by 'Game Men System Co. Ltd.' +/******************************************************************* +实战麻将王 (Shízhàn Májiàng Wáng), GMS, 1998 +实战頂凰麻雀 (Shízhàn Dǐng Huáng Máquè), GMS, 1998 +实战三国记加強版 (Shízhàn Sānguó Jì Jiāqiáng Bǎn), GMS, 1998 +Hardware info by Guru +--------------------- -PCB Layout ----------- +Note: Hardware is called 'Game Men System'. Company is Game Master System Co., Ltd. -No.6899-B +These games run on a near identical board with a slightly different sound chip. +6899-B: YM2151 and the PIC circuit is part of the main board but not used. Pin header holes for a small PCB are present but not used. +9899-B: YM3812 and the PIC is on a separate PCB soldered into the same pin header holes and the PCB area under it contains nothing. + +No.6899-B (Shizhan Majiang Wang and Shizhan Ding Huang Maque) +No.9899-B (Shizhan Sanguo Ji Jiaqiang Ban) |--------------------------------------------------------| -|UPC1241H YM3014 YM2151 14.31818MHz | -| VOL 358 89C51 B1 | +|UPC1241H YM3014 SNDCHIP 14.31818MHz | +| VOL 358 89C51 B1/M1 | | M6295 | | S1 PAL | | A1 | -| | +| T518B | |J 6116 | |A P1 6116 | -|M DSW3 | -|M DSW2 | -|A DSW1 DSW4 | +|M SW3 | +|M SW2 | +|A SW1 SW4 | | |-------| 6116 | | |LATTICE| 6116 PAL | | 62256 62256 |1032E | | | | | T1 | -| 68000 |-------| | +| 68HC000 |-------| | | 3.6V_BATT |-------------| | | | 93C46| | | | | | -| | * | 6116 | -| | | 22MHz 6116 | +|SW5 | * | 6116 | +| 7805 | | 22MHz 6116 | |---------------|PLASTIC COVER|--------------------------| Notes: - 68000 clock - 11.000MHz [22/2] - VSync - 58Hz - Hsync - none (dead board, no signal) - M6295 clock - 1.100MHz [22/20], sample rate = 1100000 / 165, chip is printed 'AD-65' - YM2151 clock- 2.750MHz [22/8], chip is printed 'K-666'. YM3014 chip is printed 'K-664' - * - Unpopulated position for PIC16F84 - 3.6V_BATT - Purpose of battery unknown, does not appear to be used for backup of suicide RAM, - and there's no RTC on the board. - 93C46 - 128 x8 EEPROM. This chip was covered by a plastic cover. There's nothing else under - the cover, but there was an unpopulated position for a PIC16F84 - 89C51 - Atmel 89C51 Microcontroller (protected) - - ROMs - - P1 - Hitachi HN27C4096 (Main PRG) - T1 - Macronix MX27C4000 (GFX) - A1 - Atmel AT27C080 (GFX) - B1 - Macronix MX261000 (GFX?? or PRG/data for 89C51?) - S1 - Macronix MX27C2000 (OKI samples) - -Keep pressed 9 and press reset to enter service mode. + 68HC000 - Toshiba TMP68HC000P-16 CPU. Clock 11.0MHz [22/2] + 6116 - 2kB x8-bit SRAM + 62256 - 32kB x8-bit SRAM (only one is battery-backed) + 6295 - OKI M6295 4-Channel ADPCM Voice Synthesis LSI. Clock input 1.100MHz [22/20]. Pin 7 HIGH + SNDCHIP - 6899-B PCB - Yamaha YM2151 FM Operator Type-M (OPM). Clock 2.750MHz [22/8]. Chip is marked 'K-666'. YM3014 chip is marked 'K-664' + 9899-B PCB - Yamaha YM3812 FM Operator Type-L (OPL2). Clock 2.750MHz [22/8]. Chip is marked 'KS8001' YM3014 chip is marked 'KS8002' + * - 6899-B PCB - Unpopulated position for PIC16F84 + 9899-B PCB - Separate PCB containing two unknown chips (SOIC16, SOIC8) and a TO92 IC marked 'H HE 9013I' + 89C51 - Atmel AT89C51 Microcontroller (protected). Clock input 14.31818MHz + 93C46 - On 6899-B PCB - 93C46 EEPROM, covered by a plastic cover. No other parts populated. There is an unpopulated position for a PIC16F84 + T518B - Mitsumi PST518B Master Reset IC (TO92) + 358 - LM358 Dual Operational Amplifier + SW1-4 - 8-position DIP Switch + SW5 - Reset/Clear Switch + uPC1241H - NEC uPC1241H Audio Power Amp + 7805 - LM7805 5V Linear Regulator + 3.6V_BATT - Back-up battery maintains power to one 62256 RAM when main power supply is off. + P1 - 27C4096 (Main PRG) + T1 - 27C4000 / 234000 mask ROM (GFX) + A1 - 27C080 / 238000 mask ROM (GFX) + B1/M1 - 26C1000 / 27C1001 (PRG/data for 89C51?) + S1 - 27C2000 / 232000 mask ROM (OKI samples) + +Hold service credit (9) and reset (F3) to enter service mode. + TODO: - correct decode for 1st layer in sc2in1 and magslot (magslot also uses more videoram for tilemap 1) @@ -77,6 +91,7 @@ super555: https://www.youtube.com/watch?v=CCUKdbQ5O-U #include "cpu/mcs51/mcs51.h" #include "machine/eepromser.h" #include "sound/okim6295.h" +#include "sound/ymopl.h" #include "sound/ymopm.h" #include "emupal.h" @@ -117,6 +132,7 @@ public: void rbmk(machine_config &config); void rbspm(machine_config &config); + void ssanguoj(machine_config &config); void super555(machine_config &config); void train(machine_config &config); @@ -124,6 +140,7 @@ public: void init_ballch(); void init_cots(); void init_rbspm(); + void init_ssanguoj(); void init_sscs(); void init_super555(); @@ -157,6 +174,7 @@ private: void mcu_io(address_map &map); void rbmk_mem(address_map &map); void rbspm_mem(address_map &map); + void ssanguoj_mem(address_map &map); uint16_t unk_r(); uint16_t input_matrix_r(); @@ -301,6 +319,27 @@ void gms_2layers_state::rbspm_mem(address_map &map) map(0x9c0000, 0x9c0fff).ram().w(FUNC(gms_2layers_state::vram_w<1>)).share(m_vidram[1]); } +void gms_2layers_state::ssanguoj_mem(address_map &map) +{ + map(0x000000, 0x07ffff).rom().nopw(); + map(0x100000, 0x10ffff).ram(); + map(0x800000, 0x80ffff).ram(); + map(0x900000, 0x900fff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); + map(0x940000, 0x940bff).ram(); + map(0x940c00, 0x940fff).ram().w(FUNC(gms_2layers_state::vram_w<0>)).share(m_vidram[0]); + map(0x980300, 0x983fff).ram(); // 0x2048 words ???, byte access + map(0x980380, 0x9803ff).ram().share(m_scrolly); + map(0x9c0000, 0x9c0fff).ram().w(FUNC(gms_2layers_state::vram_w<1>)).share(m_vidram[1]); + map(0xa00000, 0xa00001).rw(FUNC(gms_2layers_state::input_matrix_r), FUNC(gms_2layers_state::input_matrix_w)); + map(0xa08000, 0xa08001).portr("IN1").w(FUNC(gms_2layers_state::tilebank_w)); + map(0xa10000, 0xa10001).portr("IN2"); + map(0xa18080, 0xa18081).r(FUNC(gms_2layers_state::unk_r)); // TODO: from MCU? + map(0xa20000, 0xa20000).r(m_oki, FUNC(okim6295_device::read)); + //map(0xa20080, 0xa20081) // TODO: to MCU? + map(0xa28000, 0xa28000).w(m_oki, FUNC(okim6295_device::write)); + map(0xe00000, 0xe00001).w(FUNC(gms_2layers_state::eeprom_w)); +} + void gms_2layers_state::super555_mem(address_map &map) { map(0x000000, 0x07ffff).rom(); @@ -565,6 +604,198 @@ static INPUT_PORTS_START( rbspm ) INPUT_PORTS_END +static INPUT_PORTS_START( ssanguoj ) + PORT_START("IN1") // 16bit + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_SERVICE1 ) + PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN1 ) + PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_START1 ) + PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_MAHJONG_DOUBLE_UP ) + PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) + PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) + PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_BUTTON1 ) + PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_MAHJONG_BET ) + PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON2 ) + PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("IN2") // 16bit + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_TOGGLE + PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_MEMORY_RESET ) PORT_TOGGLE + PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN2 ) + PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("eeprom", eeprom_serial_93cxx_device, do_read) + + // Only 4 DIP banks are actually populated on PCBs (2 empty spaces), but test mode reads all 6. + // TODO: dips + PORT_START("DSW1") // 16bit, in test mode first 8 are recognised as dsw1, second 8 as dsw4. + PORT_DIPNAME( 0x0001, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:1") + PORT_DIPSETTING( 0x0001, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0002, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:2") + PORT_DIPSETTING( 0x0002, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0004, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:3") + PORT_DIPSETTING( 0x0004, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0008, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:4") + PORT_DIPSETTING( 0x0008, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0010, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:5") + PORT_DIPSETTING( 0x0010, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0020, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:6") + PORT_DIPSETTING( 0x0020, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0040, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:7") + PORT_DIPSETTING( 0x0040, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0080, 0x0080, "Controls" ) PORT_DIPLOCATION("DSW1:8") // should default to keyboard, but set on joystick since the former isn't emulated yet + PORT_DIPSETTING( 0x0080, DEF_STR( Joystick ) ) + PORT_DIPSETTING( 0x0000, "Keyboard" ) + PORT_DIPNAME( 0x0100, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW4:1") + PORT_DIPSETTING( 0x0100, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0200, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW4:2") + PORT_DIPSETTING( 0x0200, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0400, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW4:3") + PORT_DIPSETTING( 0x0400, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0800, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW4:4") + PORT_DIPSETTING( 0x0800, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x1000, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW4:5") + PORT_DIPSETTING( 0x1000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x2000, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW4:6") + PORT_DIPSETTING( 0x2000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x4000, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW4:7") + PORT_DIPSETTING( 0x4000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x8000, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW4:8") + PORT_DIPSETTING( 0x8000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + + + PORT_START("DSW2") // 16bit, in test mode first 8 are recognised as dsw2, second 8 as dsw5 + PORT_DIPNAME( 0x0001, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW2:1") + PORT_DIPSETTING( 0x0001, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0002, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW2:2") + PORT_DIPSETTING( 0x0002, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0004, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW2:3") + PORT_DIPSETTING( 0x0004, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0008, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW2:4") + PORT_DIPSETTING( 0x0008, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0010, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW2:5") + PORT_DIPSETTING( 0x0010, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0020, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW2:6") + PORT_DIPSETTING( 0x0020, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0040, 0x0000, DEF_STR( Version ) ) PORT_DIPLOCATION("DSW2:7") + PORT_DIPSETTING( 0x0040, "8.9" ) + PORT_DIPSETTING( 0x0000, "8.9-" ) + PORT_DIPNAME( 0x0080, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW2:8") + PORT_DIPSETTING( 0x0080, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0100, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW5:1") + PORT_DIPSETTING( 0x0100, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0200, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW5:2") + PORT_DIPSETTING( 0x0200, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0400, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW5:3") + PORT_DIPSETTING( 0x0400, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0800, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW5:4") + PORT_DIPSETTING( 0x0800, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x1000, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW5:5") + PORT_DIPSETTING( 0x1000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x2000, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW5:6") + PORT_DIPSETTING( 0x2000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x4000, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW5:7") + PORT_DIPSETTING( 0x4000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x8000, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW5:8") + PORT_DIPSETTING( 0x8000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + + PORT_START("DSW3") // 16bit, in test mode first 8 are recognised as dsw3, second 8 as dsw6 + PORT_DIPNAME( 0x0001, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW3:1") + PORT_DIPSETTING( 0x0001, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0002, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW3:2") + PORT_DIPSETTING( 0x0002, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0004, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW3:3") + PORT_DIPSETTING( 0x0004, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0008, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW3:4") + PORT_DIPSETTING( 0x0008, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0010, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW3:5") + PORT_DIPSETTING( 0x0010, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0020, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW3:6") + PORT_DIPSETTING( 0x0020, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0040, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW3:7") + PORT_DIPSETTING( 0x0040, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0080, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW3:8") + PORT_DIPSETTING( 0x0080, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0100, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW6:1") + PORT_DIPSETTING( 0x0100, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0200, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW6:2") + PORT_DIPSETTING( 0x0200, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0400, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW6:3") + PORT_DIPSETTING( 0x0400, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0800, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW6:4") + PORT_DIPSETTING( 0x0800, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x1000, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW6:5") + PORT_DIPSETTING( 0x1000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x2000, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW6:6") + PORT_DIPSETTING( 0x2000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x4000, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW6:7") + PORT_DIPSETTING( 0x4000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x8000, 0x0000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW6:8") + PORT_DIPSETTING( 0x8000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) +INPUT_PORTS_END + + static INPUT_PORTS_START( magslot ) PORT_START("IN1") PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_UNKNOWN ) @@ -1381,6 +1612,21 @@ void gms_2layers_state::rbspm(machine_config &config) // PIC16F84 but no CPU core available } +void gms_2layers_state::ssanguoj(machine_config &config) +{ + rbmk(config); + + m_maincpu->set_addrmap(AS_PROGRAM, &gms_2layers_state::ssanguoj_mem); + + m_mcu->set_disable(); // undumped internal ROM + + config.device_remove("ymsnd"); + + ym3812_device &ym(YM3812(config, "ym3812", 22_MHz_XTAL / 8)); + ym.add_route(0, "lspeaker", 0.60); + ym.add_route(1, "rspeaker", 0.60); +} + void gms_2layers_state::super555(machine_config &config) { rbmk(config); @@ -1467,6 +1713,30 @@ ROM_START( rbspm ) // PCB NO.6899-B ROM_END +ROM_START( ssanguoj ) + ROM_REGION( 0x80000, "maincpu", 0 ) // 68000 code + ROM_LOAD( "sgc-pro_8.9_4af0.u64", 0x00000, 0x80000, CRC(c779e5c4) SHA1(d6c4833e4e2b3f8af1b7cf38fb4eef879259f214) ) + + ROM_REGION( 0x1000, "mcu", 0 ) // protected MCU + ROM_LOAD( "at89c51.bin", 0x0000, 0x1000, NO_DUMP ) + + ROM_REGION( 0x20000, "user1", 0 ) // ??? MCU data / code + ROM_LOAD( "scg-m1.u72", 0x00000, 0x20000, CRC(9ad7be80) SHA1(c5d3a55520173662034650a4a8458200f47e76ac) ) + + ROM_REGION( 0x080000, "oki", 0 ) + ROM_LOAD( "mje2bf-s1.u83", 0x00000, 0x80000, CRC(dabb41a1) SHA1(ad809d8a4d5362a02b3ca49a75278943a824df1e) ) // 1ST AND 2ND HALF IDENTICAL + + ROM_REGION( 0x100000, "gfx1", 0 ) + ROM_LOAD( "99a-a02_m5042j-a1.u41", 0x000000, 0x100000, CRC(4b0823f4) SHA1(69e5448a9fe06430625c7c407ff4a7fd5b58d445) ) + + ROM_REGION( 0x80000, "gfx2", 0 ) + ROM_LOAD( "sgc-t1.u39", 0x00000, 0x80000, CRC(50776a8f) SHA1(141bd23fc237a0e8d31ae0504ea2b9cf39859319) ) + + ROM_REGION16_BE( 0x80, "eeprom", 0 ) + ROM_LOAD16_WORD_SWAP( "93c46.u51", 0x00, 0x080, NO_DUMP ) +ROM_END + + ROM_START( super555 ) // GMS branded chips: A66, A68, M06 ROM_REGION( 0x80000, "maincpu", 0 ) // 68000 code ROM_LOAD( "super555-v1.5e-0d9b.u64", 0x00000, 0x80000, CRC(9a9c16cc) SHA1(95609dbd45feb591190a2b62dee8846cdcec3462) ) @@ -1698,7 +1968,7 @@ ROM_END // the following inits patch out protection (?) checks to allow for testing - // unfortunately the various U errors shown don't correspond to correct PCB locations + // unfortunately the various U errors shown don't always correspond to correct PCB locations void gms_2layers_state::init_rbspm() { @@ -1710,6 +1980,13 @@ void gms_2layers_state::init_rbspm() rom[0x1f1fc / 2] = 0x6000; } +void gms_2layers_state::init_ssanguoj() +{ + uint16_t *rom = (uint16_t *)memregion("maincpu")->base(); + + rom[0x2fc0 / 2] = 0x6000; // loops endlessly after ROM / RAM test +} + void gms_3layers_state::init_sc2in1() { uint16_t *rom = (uint16_t *)memregion("maincpu")->base(); @@ -1773,17 +2050,18 @@ void gms_2layers_state::init_sscs() // mahjong -GAME( 1998, rbmk, 0, rbmk, rbmk, gms_2layers_state, empty_init, ROT0, "GMS", "Shizhan Majiang Wang (Version 8.8)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) // misses YM2151 hookup, Oki hookup may be imperfect -GAME( 1998, rbspm, 0, rbspm, rbspm, gms_2layers_state, init_rbspm, ROT0, "GMS", "Shizhan Ding Huang Maque (Version 4.1)", MACHINE_UNEMULATED_PROTECTION | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) // stops during boot, patched for now +GAME( 1998, rbmk, 0, rbmk, rbmk, gms_2layers_state, empty_init, ROT0, "GMS", "Shizhan Majiang Wang (Version 8.8)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) // misses YM2151 hookup +GAME( 1998, rbspm, 0, rbspm, rbspm, gms_2layers_state, init_rbspm, ROT0, "GMS", "Shizhan Ding Huang Maque (Version 4.1)", MACHINE_UNEMULATED_PROTECTION | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) // stops during boot, patched for now +GAME( 1998, ssanguoj, 0, ssanguoj, ssanguoj, gms_2layers_state, init_ssanguoj, ROT0, "GMS", "Shizhan Sanguo Ji Jiaqiang Ban (Version 8.9 980413)", MACHINE_UNEMULATED_PROTECTION | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) // stops during boot, patched for now. YM3812 isn't hooked up (goes through undumped MCU). // card games -GAME( 1999, super555, 0, super555, super555, gms_2layers_state, init_super555, ROT0, "GMS", "Super 555 (English version V1.5)", MACHINE_UNEMULATED_PROTECTION | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) // stops during boot, patched for now -GAME( 1999, sscs, 0, super555, sscs, gms_2layers_state, init_sscs, ROT0, "GMS", "San Se Caishen (Version 0502)", MACHINE_UNEMULATED_PROTECTION | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) // stops during boot, patched for now, inputs / DIPs to be figured out -GAME( 2001, sc2in1, 0, magslot, sc2in1, gms_3layers_state, init_sc2in1, ROT0, "GMS", "Super Card 2 in 1 (English version 03.23)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_UNEMULATED_PROTECTION | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) // stops during boot, patched for now +GAME( 1999, super555, 0, super555, super555, gms_2layers_state, init_super555, ROT0, "GMS", "Super 555 (English version V1.5)", MACHINE_UNEMULATED_PROTECTION | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) // stops during boot, patched for now +GAME( 1999, sscs, 0, super555, sscs, gms_2layers_state, init_sscs, ROT0, "GMS", "San Se Caishen (Version 0502)", MACHINE_UNEMULATED_PROTECTION | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) // stops during boot, patched for now, inputs / DIPs to be figured out +GAME( 2001, sc2in1, 0, magslot, sc2in1, gms_3layers_state, init_sc2in1, ROT0, "GMS", "Super Card 2 in 1 (English version 03.23)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_UNEMULATED_PROTECTION | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) // stops during boot, patched for now // slot, on slightly different PCB -GAME( 2003, magslot, 0, magslot, magslot, gms_3layers_state, empty_init, ROT0, "GMS", "Magic Slot (normal 1.0C)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) // needs implementing of 3rd GFX layer, correct GFX decode for 1st layer, inputs +GAME( 2003, magslot, 0, magslot, magslot, gms_3layers_state, empty_init, ROT0, "GMS", "Magic Slot (normal 1.0C)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) // needs implementing of 3rd GFX layer, correct GFX decode for 1st layer, inputs // train games -GAME( 2002, ballch, 0, train, ballch, gms_2layers_state, init_ballch, ROT0, "TVE", "Ball Challenge (20020607 1.0 OVERSEA)", MACHINE_UNEMULATED_PROTECTION | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) // stops during boot, patched for now -GAME( 2005, cots, 0, train, cots, gms_2layers_state, init_cots, ROT0, "ECM", "Creatures of the Sea (20050328 USA 6.3)", MACHINE_UNEMULATED_PROTECTION | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) // stops during boot, patched for now +GAME( 2002, ballch, 0, train, ballch, gms_2layers_state, init_ballch, ROT0, "TVE", "Ball Challenge (20020607 1.0 OVERSEA)", MACHINE_UNEMULATED_PROTECTION | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) // stops during boot, patched for now +GAME( 2005, cots, 0, train, cots, gms_2layers_state, init_cots, ROT0, "ECM", "Creatures of the Sea (20050328 USA 6.3)", MACHINE_UNEMULATED_PROTECTION | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) // stops during boot, patched for now -- cgit v1.2.3