From 56081bce92d64b964c7a868522f453ca1687b930 Mon Sep 17 00:00:00 2001 From: AJR Date: Sat, 14 Dec 2024 10:09:10 -0500 Subject: g65sc02: Remove Rockwell bit opcodes (source comment appears to be mistaken) * g65sc102, r65c102: Add internal clock divider --- src/devices/bus/bbc/tube/tube_6502.cpp | 2 +- src/devices/bus/econet/e01.cpp | 2 +- src/devices/cpu/m6502/g65sc02.cpp | 4 ++-- src/devices/cpu/m6502/g65sc02.h | 10 +++++++--- src/devices/cpu/m6502/r65c02.h | 4 ++++ src/mame/commodore/clcd.cpp | 2 +- src/mame/fidelity/excel.cpp | 2 +- 7 files changed, 17 insertions(+), 9 deletions(-) diff --git a/src/devices/bus/bbc/tube/tube_6502.cpp b/src/devices/bus/bbc/tube/tube_6502.cpp index 732fd38775a..360362634f7 100644 --- a/src/devices/bus/bbc/tube/tube_6502.cpp +++ b/src/devices/bus/bbc/tube/tube_6502.cpp @@ -165,7 +165,7 @@ void bbc_tube_65c102_device::device_add_mconfig(machine_config &config) { bbc_tube_6502_device::device_add_mconfig(config); - R65C102(config.replace(), m_maincpu, 16_MHz_XTAL / 4); // R65C102 + R65C102(config.replace(), m_maincpu, 16_MHz_XTAL); // R65C102 m_maincpu->set_addrmap(AS_PROGRAM, &bbc_tube_65c102_device::tube_6502_mem); } diff --git a/src/devices/bus/econet/e01.cpp b/src/devices/bus/econet/e01.cpp index 2009a80d223..e46ac49e379 100644 --- a/src/devices/bus/econet/e01.cpp +++ b/src/devices/bus/econet/e01.cpp @@ -245,7 +245,7 @@ void econet_e01_device::e01_mem(address_map &map) void econet_e01_device::device_add_mconfig(machine_config &config) { // basic machine hardware - R65C102(config, m_maincpu, XTAL(8'000'000)/4); // Rockwell R65C102P3 + R65C102(config, m_maincpu, XTAL(8'000'000)); // Rockwell R65C102P3 m_maincpu->set_addrmap(AS_PROGRAM, &econet_e01_device::e01_mem); MC146818(config, m_rtc, 32.768_kHz_XTAL); diff --git a/src/devices/cpu/m6502/g65sc02.cpp b/src/devices/cpu/m6502/g65sc02.cpp index 167247c2999..e9e62cd4880 100644 --- a/src/devices/cpu/m6502/g65sc02.cpp +++ b/src/devices/cpu/m6502/g65sc02.cpp @@ -4,7 +4,7 @@ g65sc02.cpp - Rockwell-class 65c02 with internal static registers, making clock stoppable? + 65c02 with internal static registers, making clock stoppable? TODO: - none of the CPU type differences are currently emulated (eg. BE pin, ML pin), @@ -21,7 +21,7 @@ DEFINE_DEVICE_TYPE(G65SC102, g65sc102_device, "g65sc102", "GTE G65SC102") DEFINE_DEVICE_TYPE(G65SC112, g65sc112_device, "g65sc112", "GTE G65SC112") g65sc02_device::g65sc02_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : - r65c02_device(mconfig, type, tag, owner, clock) + w65c02_device(mconfig, type, tag, owner, clock) { } diff --git a/src/devices/cpu/m6502/g65sc02.h b/src/devices/cpu/m6502/g65sc02.h index edd24f0f21c..e98f068b60d 100644 --- a/src/devices/cpu/m6502/g65sc02.h +++ b/src/devices/cpu/m6502/g65sc02.h @@ -4,16 +4,16 @@ g65sc02.h - Rockwell-class 65c02 with internal static registers, making clock stoppable? + 65c02 with internal static registers, making clock stoppable? ***************************************************************************/ #ifndef MAME_CPU_M6502_G65SC02_H #define MAME_CPU_M6502_G65SC02_H -#include "r65c02.h" +#include "w65c02.h" -class g65sc02_device : public r65c02_device { +class g65sc02_device : public w65c02_device { public: g65sc02_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); @@ -29,6 +29,10 @@ public: class g65sc102_device : public g65sc02_device { public: g65sc102_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks + 4 - 1) / 4; } + virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return (cycles * 4); } }; class g65sc112_device : public g65sc02_device { diff --git a/src/devices/cpu/m6502/r65c02.h b/src/devices/cpu/m6502/r65c02.h index 2a98d4be6ec..d9be47465ee 100644 --- a/src/devices/cpu/m6502/r65c02.h +++ b/src/devices/cpu/m6502/r65c02.h @@ -28,6 +28,10 @@ protected: class r65c102_device : public r65c02_device { public: r65c102_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks + 4 - 1) / 4; } + virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return (cycles * 4); } }; class r65c112_device : public r65c02_device { diff --git a/src/mame/commodore/clcd.cpp b/src/mame/commodore/clcd.cpp index 553d43a742a..c7e1642603a 100644 --- a/src/mame/commodore/clcd.cpp +++ b/src/mame/commodore/clcd.cpp @@ -719,7 +719,7 @@ INPUT_PORTS_END void clcd_state::clcd(machine_config &config) { /* basic machine hardware */ - G65SC102(config, m_maincpu, 1000000); + G65SC102(config, m_maincpu, 4000000); m_maincpu->set_addrmap(AS_PROGRAM, &clcd_state::clcd_mem); INPUT_MERGER_ANY_HIGH(config, "mainirq").output_handler().set_inputline("maincpu", g65sc102_device::IRQ_LINE); diff --git a/src/mame/fidelity/excel.cpp b/src/mame/fidelity/excel.cpp index 01678da3fe4..18d60b5ff61 100644 --- a/src/mame/fidelity/excel.cpp +++ b/src/mame/fidelity/excel.cpp @@ -460,7 +460,7 @@ INPUT_PORTS_END void excel_state::fexcel(machine_config &config) { // basic machine hardware - G65SC102(config, m_maincpu, 12_MHz_XTAL/4); // G65SC102P-3, 12.0M ceramic resonator + G65SC102(config, m_maincpu, 12_MHz_XTAL); // G65SC102P-3, 12.0M ceramic resonator (divided by 4 internally) m_maincpu->set_addrmap(AS_PROGRAM, &excel_state::fexcel_map); auto &irq_clock(CLOCK(config, "irq_clock", 600)); // from 556 timer (22nF, 102K, 1K), ideal frequency is 600Hz -- cgit v1.2.3