From 40ae1496b0fe65fa038de498247cfeb20014d531 Mon Sep 17 00:00:00 2001 From: David Haywood Date: Fri, 2 Jan 2015 15:19:56 +0000 Subject: arcompact wip (nw) --- src/emu/cpu/arcompact/arcompact.c | 12 +- src/emu/cpu/arcompact/arcompact.h | 15 ++- src/emu/cpu/arcompact/arcompact_execute.c | 209 ++++++++++++++++++++++++------ src/emu/cpu/arcompact/arcompact_make.py | 15 ++- 4 files changed, 200 insertions(+), 51 deletions(-) diff --git a/src/emu/cpu/arcompact/arcompact.c b/src/emu/cpu/arcompact/arcompact.c index 5527830be1b..da20ab7e948 100644 --- a/src/emu/cpu/arcompact/arcompact.c +++ b/src/emu/cpu/arcompact/arcompact.c @@ -24,14 +24,24 @@ const device_type ARCA5 = &device_creator; + +READ32_MEMBER( arcompact_device::arcompact_auxreg002_LPSTART_r) { return m_LP_START&0xfffffffe; } +WRITE32_MEMBER(arcompact_device::arcompact_auxreg002_LPSTART_w) { m_LP_START = data&0xfffffffe; } +READ32_MEMBER( arcompact_device::arcompact_auxreg003_LPEND_r) { return m_LP_END&0xfffffffe; } +WRITE32_MEMBER(arcompact_device::arcompact_auxreg003_LPEND_w) { m_LP_END = data&0xfffffffe; } + static ADDRESS_MAP_START( arcompact_auxreg_map, AS_IO, 32, arcompact_device ) + AM_RANGE(0x000000008, 0x00000000b) AM_READWRITE(arcompact_auxreg002_LPSTART_r, arcompact_auxreg002_LPSTART_w) + AM_RANGE(0x00000000c, 0x00000000f) AM_READWRITE(arcompact_auxreg003_LPEND_r, arcompact_auxreg003_LPEND_w) ADDRESS_MAP_END +//#define AUX_SPACE_ADDRESS_WIDTH 34 // IO space is 32 bits of dwords, so 34-bits +#define AUX_SPACE_ADDRESS_WIDTH 64 // but the MAME core requires us to use power of 2 values for >32 arcompact_device::arcompact_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : cpu_device(mconfig, ARCA5, "ARCtangent-A5", tag, owner, clock, "arca5", __FILE__) , m_program_config("program", ENDIANNESS_LITTLE, 32, 32, 0) // some docs describe these as 'middle endian'?! - , m_io_config( "io", ENDIANNESS_LITTLE, 32, 34, 0, ADDRESS_MAP_NAME( arcompact_auxreg_map ) ) // IO space is 32 bits of dwords, so 34-bits + , m_io_config( "io", ENDIANNESS_LITTLE, 32, AUX_SPACE_ADDRESS_WIDTH, 0, ADDRESS_MAP_NAME( arcompact_auxreg_map ) ) { } diff --git a/src/emu/cpu/arcompact/arcompact.h b/src/emu/cpu/arcompact/arcompact.h index 1b901fb6950..b41c3f6d472 100644 --- a/src/emu/cpu/arcompact/arcompact.h +++ b/src/emu/cpu/arcompact/arcompact.h @@ -60,6 +60,11 @@ class arcompact_device : public cpu_device public: // construction/destruction arcompact_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + + DECLARE_READ32_MEMBER( arcompact_auxreg002_LPSTART_r); + DECLARE_WRITE32_MEMBER(arcompact_auxreg002_LPSTART_w); + DECLARE_READ32_MEMBER( arcompact_auxreg003_LPEND_r); + DECLARE_WRITE32_MEMBER(arcompact_auxreg003_LPEND_w); protected: // device-level overrides @@ -174,12 +179,12 @@ protected: ARCOMPACT_RETTYPE arcompact_handle04_1c(OPS_32); ARCOMPACT_RETTYPE arcompact_handle04_1d(OPS_32); // ARCOMPACT_RETTYPE arcompact_handle04_20(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_21(OPS_32); +// ARCOMPACT_RETTYPE arcompact_handle04_21(OPS_32); ARCOMPACT_RETTYPE arcompact_handle04_22(OPS_32); ARCOMPACT_RETTYPE arcompact_handle04_23(OPS_32); ARCOMPACT_RETTYPE arcompact_handle04_28(OPS_32); ARCOMPACT_RETTYPE arcompact_handle04_29(OPS_32); - ARCOMPACT_RETTYPE arcompact_handle04_2a(OPS_32); +// ARCOMPACT_RETTYPE arcompact_handle04_2a(OPS_32); // ARCOMPACT_RETTYPE arcompact_handle04_2b(OPS_32); ARCOMPACT_RETTYPE arcompact_handle04_2f_00(OPS_32); ARCOMPACT_RETTYPE arcompact_handle04_2f_01(OPS_32); @@ -760,6 +765,10 @@ protected: ARCOMPACT_RETTYPE arcompact_handle19_0x_helper(OPS_16, const char* optext, int shift, int format); ARCOMPACT_RETTYPE arcompact_handle1e_0x_helper(OPS_16, const char* optext); ARCOMPACT_RETTYPE arcompact_handle1e_03_0x_helper(OPS_16, const char* optext); + + + UINT32 handle_jump_to_addr(int delay, int link, UINT32 address, UINT32 next_addr); + UINT32 handle_jump_to_register(int delay, int link, UINT32 reg, UINT32 next_addr, int flag); ARCOMPACT_RETTYPE get_insruction(OPS_32); @@ -780,6 +789,8 @@ protected: ARCOMPACT_HANDLER04_TYPE_PM(04_18); ARCOMPACT_HANDLER04_TYPE_PM(04_19); ARCOMPACT_HANDLER04_TYPE_PM(04_20); + ARCOMPACT_HANDLER04_TYPE_PM(04_21); + ARCOMPACT_HANDLER04_TYPE_PM(04_2a); ARCOMPACT_HANDLER04_TYPE_PM(04_2b); ARCOMPACT_HANDLER04_TYPE_PM(04_2f_02); diff --git a/src/emu/cpu/arcompact/arcompact_execute.c b/src/emu/cpu/arcompact/arcompact_execute.c index 27deef265c2..68a5de1efe7 100644 --- a/src/emu/cpu/arcompact/arcompact_execute.c +++ b/src/emu/cpu/arcompact/arcompact_execute.c @@ -1128,7 +1128,59 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_03(OPS_16) // handlers +UINT32 arcompact_device::handle_jump_to_addr(int delay, int link, UINT32 address, UINT32 next_addr) +{ + if (delay) + { + m_delayactive = 1; + m_delayjump = address; + if (link) m_delaylinks = 1; + else m_delaylinks = 0; + return next_addr; + } + else + { + if (link) m_regs[REG_BLINK] = next_addr; + return address; + } +} + +UINT32 arcompact_device::handle_jump_to_register(int delay, int link, UINT32 reg, UINT32 next_addr, int flag) +{ + if (reg == LIMM_REG) + arcompact_fatal("handle_jump_to_register called with LIMM register, call handle_jump_to_addr instead"); + + if ((reg == REG_ILINK1) || (reg == REG_ILINK2)) + { + if (flag) + { + arcompact_fatal("jump to ILINK1/ILINK2 not supported"); + return next_addr; + } + else + { + arcompact_fatal("illegal jump to ILINK1/ILINK2 not supported"); // FLAG bit must be set + return next_addr; + } + } + else + { + if (flag) + { + arcompact_fatal("illegal jump (flag bit set)"); // FLAG bit must NOT be set + return next_addr; + } + else + { + //arcompact_fatal("jump not supported"); + UINT32 target = m_regs[reg]; + return handle_jump_to_addr(delay, link, target, next_addr); + } + } + + return 0; +} ARCOMPACT_RETTYPE arcompact_device::arcompact_handle00_00(OPS_32) { @@ -2028,12 +2080,124 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_20_p11_m1(OPS_32) } +ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_21_p00(OPS_32) +{ + int size = 4; + UINT32 limm = 0; + int got_limm = 0; + + COMMON32_GET_creg + COMMON32_GET_F + + if (creg == LIMM_REG) + { + if (!got_limm) + { + GET_LIMM_32; + size = 8; + } + + handle_jump_to_addr(1,0,limm, m_pc + (size>>0)); + } + else + { + return handle_jump_to_register(1,0,creg, m_pc + (size>>0), F); // delay, no link + } + + return m_pc + (size>>0); +} + +ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_21_p01(OPS_32) +{ + int size = 4; + arcompact_log("unimplemented J.D (u6 type) %08x", op); + return m_pc + (size>>0); +} + +ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_21_p10(OPS_32) +{ + int size = 4; + arcompact_log("unimplemented J.D (s12 type) %08x", op); + return m_pc + (size>>0); +} + + +ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_21_p11_m0(OPS_32) // Jcc.D (no link, delay) +{ + int size = 4; + UINT32 limm = 0; + int got_limm = 0; + + COMMON32_GET_creg + COMMON32_GET_CONDITION; + COMMON32_GET_F + + //UINT32 c = 0; + + if (creg == LIMM_REG) + { + if (!got_limm) + { + GET_LIMM_32; + size = 8; + } + + // c = limm; + + } + else + { + // opcode iiii i--- ppII IIII F--- cccc ccmq qqqq + // Jcc [c] 0010 0RRR 1110 0000 0RRR CCCC CC0Q QQQQ + // no conditional links to ILINK1, ILINK2? + + // c = m_regs[creg]; + } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_21(OPS_32) + if (!check_condition(condition)) + return m_pc + (size>>0); + + if (!F) + { + // if F isn't set then the destination can't be ILINK1 or ILINK2 + + if ((creg == REG_ILINK1) || (creg == REG_ILINK1)) + { + arcompact_log("unimplemented Jcc.D (p11_m0 type, illegal) %08x", op); + } + else + { + arcompact_log("unimplemented Jcc.D (p11_m0 type, unimplemented) %08x", op); + } + } + + if (F) + { + // if F is set then the destination MUST be ILINK1 or ILINK2 + + if ((creg == REG_ILINK1) || (creg == REG_ILINK1)) + { + arcompact_log("unimplemented Jcc.D.F (p11_m0 type, unimplemented) %08x", op); + } + else + { + arcompact_log("unimplemented Jcc.D.F (p11_m0 type, illegal) %08x", op); + } + } + + + return m_pc + (size>>0); +} + +ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_21_p11_m1(OPS_32) { - return arcompact_handle04_helper(PARAMS, opcodes_04[0x21], /*"J.D"*/ 1,1); + int size = 4; + arcompact_log("unimplemented arcompact_handle04_21_p11_m1 J.D %08x (u6)", op); + return m_pc + (size>>0); } + + ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_22(OPS_32) { return arcompact_handle04_helper(PARAMS, opcodes_04[0x22], /*"JL"*/ 1,1); @@ -2095,47 +2259,6 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_28(OPS_32) // LPcc (loop } -ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2a(OPS_32) // Load FROM Auxiliary register TO register -{ - int size = 4; -// UINT32 limm = 0; - int got_limm = 0; - - COMMON32_GET_p; - //COMMON32_GET_breg; - - if (p == 0) - { - COMMON32_GET_creg - - if (creg == LIMM_REG) - { - if (!got_limm) - { - //GET_LIMM_32; - size = 8; - } - - } - else - { - } - } - else if (p == 1) - { - } - else if (p == 2) - { - } - else if (p == 3) - { - } - - arcompact_log("unimplemented LR %08x", op); - return m_pc + (size>>0); -} - - ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_29(OPS_32) { // leapster bios uses formats for FLAG that are not defined, bug I guess work anyway (P modes 0 / 1) diff --git a/src/emu/cpu/arcompact/arcompact_make.py b/src/emu/cpu/arcompact/arcompact_make.py index 110595c6585..a1552f71b30 100644 --- a/src/emu/cpu/arcompact/arcompact_make.py +++ b/src/emu/cpu/arcompact/arcompact_make.py @@ -244,8 +244,8 @@ def EmitGroup04(f,funcname, opname, opexecute, opwrite, opwrite_alt, ignore_a, b EmitGroup04_Flaghandler(f,funcname,opname,flagcondition,flaghandler) print >>f, " return m_pc + (size >> 0);" print >>f, "}" - print >>f, "" - print >>f, "" + print >>f, "" + print >>f, "" # the mode 0x11 m0 handler print >>f, "ARCOMPACT_RETTYPE arcompact_device::arcompact_handle%s_p11_m0(OPS_32)" % (funcname) if ignore_a == 2: @@ -283,8 +283,8 @@ def EmitGroup04(f,funcname, opname, opexecute, opwrite, opwrite_alt, ignore_a, b EmitGroup04_Flaghandler(f,funcname,opname,flagcondition,flaghandler) print >>f, " return m_pc + (size >> 0);" print >>f, "}" - print >>f, "" - print >>f, "" + print >>f, "" + print >>f, "" # xxx_S c, b, u3 format opcodes (note c is destination) @@ -305,6 +305,8 @@ def EmitGroup0d(f,funcname, opname, opexecute, opwrite): print >>f, "" print >>f, " return m_pc + (2 >> 0);" print >>f, "}" + print >>f, "" + print >>f, "" # xxx_S b <- b,c format opcodes @@ -324,6 +326,8 @@ def EmitGroup0f(f,funcname, opname, opexecute, opwrite): print >>f, "" print >>f, " return m_pc + (2 >> 0);" print >>f, "}" + print >>f, "" + print >>f, "" # xxx_S b, b, u5 format opcodes @@ -377,7 +381,8 @@ EmitGroup04(f, "04_17", "SUB1", "UINT32 result = b - (c << 1);", "m_reg EmitGroup04(f, "04_18", "SUB2", "UINT32 result = b - (c << 2);", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags ) EmitGroup04(f, "04_19", "SUB3", "UINT32 result = b - (c << 3);", "m_regs[areg] = result;", "m_regs[breg] = result;", 0,0, -1, EmitGroup04_unsupported_Flags ) -EmitGroup04(f, "04_2b", "SR", "WRITEAUX(c,b);", "", "", 1,0, -1, EmitGroup04_unsupported_Flags ) # this can't be conditional (todo) +EmitGroup04(f, "04_2a", "LR", "m_regs[breg] = READAUX(c);", "", "", 1,1, -1, EmitGroup04_no_Flags ) # this can't be conditional (todo) +EmitGroup04(f, "04_2b", "SR", "WRITEAUX(c,b);", "", "", 1,0, -1, EmitGroup04_no_Flags ) # this can't be conditional (todo) -- cgit v1.2.3