From 3c6d54b1bb04d08a0a12d8b77a8c3b44c0caa3a2 Mon Sep 17 00:00:00 2001 From: mamehaze Date: Fri, 5 Dec 2014 17:21:39 +0000 Subject: arcompact: dasm of push/pop instructions show we're on the right track, you can see the start/end of functions in the code (nw) --- src/emu/cpu/arcompact/arcompactdasm.c | 34 ++++++++++++++++++++++++++++++++-- 1 file changed, 32 insertions(+), 2 deletions(-) diff --git a/src/emu/cpu/arcompact/arcompactdasm.c b/src/emu/cpu/arcompact/arcompactdasm.c index 0ac5c57a220..e3191ca2f53 100644 --- a/src/emu/cpu/arcompact/arcompactdasm.c +++ b/src/emu/cpu/arcompact/arcompactdasm.c @@ -120,6 +120,20 @@ static const char *table01_01_0x[0x10] = /* 0f */ "" }; +static const char *table18[0x8] = +{ + /* 00 */ "LD_S (SP)", + /* 01 */ "LDB_S (SP)", + /* 02 */ "ST_S (SP)", + /* 03 */ "STB_S (SP)", + /* 04 */ "ADD_S (SP)", + /* 05 */ "ADD_S/SUB_S (SP)", + /* 06 */ "POP_S (SP)", + /* 07 */ "PUSH_S (SP)", + +}; + + #define ARCOMPACT_OPERATION ((op & 0xf800) >> 11) @@ -233,9 +247,25 @@ CPU_DISASSEMBLE(arcompact) } else - { + { size = 2; - print("%s (%04x)", basic[instruction], op & ~0xf800 ); + + switch (instruction) + { + case 0x18: + { + // Stack Pointer Based Instructions (16-bit) + // 11000 bbb iii uuuuu + UINT8 subinstr = (op & 0x00e0) >> 5; + print("%s (%04x)", table18[subinstr], op & ~0xf8e0); + break; + + } + + default: + print("%s (%04x)", basic[instruction], op & ~0xf800); + break; + } } -- cgit v1.2.3