From 32dcbe633e4640e9362d5dc420e11ee94ff91676 Mon Sep 17 00:00:00 2001 From: Pierpaolo Prazzoli Date: Tue, 1 Jan 2008 22:47:24 +0000 Subject: Fixed save states in i8051 cpu core Fixed save states in powerbls (powerbls0112u4red is fixed) --- src/emu/cpu/i8051/i8051.c | 18 +++++++++++++----- src/mame/drivers/sslam.c | 13 ++++++------- 2 files changed, 19 insertions(+), 12 deletions(-) diff --git a/src/emu/cpu/i8051/i8051.c b/src/emu/cpu/i8051/i8051.c index d4d856af716..d7a5e9300b4 100644 --- a/src/emu/cpu/i8051/i8051.c +++ b/src/emu/cpu/i8051/i8051.c @@ -114,11 +114,11 @@ typedef struct { UINT8 cur_irq; //Holds value of any current IRQ being serviced UINT8 irq_priority; //Holds value of the current IRQ Priority Level UINT8 rwm; //Signals that the current instruction is a read/write/modify instruction - int prev_used_cycles; //Track previous # of used cycles - int last_int0; //Store state of int0 - int last_int1; //Store state of int1 - UINT8 int_vec; //Pending Interrupt Vector - int priority_request; //Priority level of incoming new irq + UINT8 prev_used_cycles; //Track previous # of used cycles + UINT8 last_int0; //Store state of int0 + UINT8 last_int1; //Store state of int1 + UINT8 int_vec; //Pending Interrupt Vector + UINT8 priority_request; //Priority level of incoming new irq //SFR Registers (Note: Appear in order as they do in memory) UINT8 po; //Port 0 UINT8 sp; //Stack Pointer @@ -484,6 +484,12 @@ void i8051_init(int index, int clock, const void *config, int (*irqcallback)(int state_save_register_item("i8051", index, i8051.subtype); state_save_register_item("i8051", index, i8051.rwm ); state_save_register_item("i8051", index, i8051.cur_irq ); + state_save_register_item("i8051", index, i8051.irq_priority ); + state_save_register_item("i8051", index, i8051.prev_used_cycles ); + state_save_register_item("i8051", index, i8051.last_int0 ); + state_save_register_item("i8051", index, i8051.last_int1 ); + state_save_register_item("i8051", index, i8051.int_vec ); + state_save_register_item("i8051", index, i8051.priority_request ); //SFR Registers state_save_register_item("i8051", index, i8051.po); state_save_register_item("i8051", index, i8051.sp); @@ -505,6 +511,7 @@ void i8051_init(int index, int clock, const void *config, int (*irqcallback)(int state_save_register_item("i8051", index, i8051.ip); //8052 Only registers #if (HAS_I8052 || HAS_I8752) + state_save_register_item("i8051", index, i8051.t2con); state_save_register_item("i8051", index, i8051.rcap2l); state_save_register_item("i8051", index, i8051.rcap2h); state_save_register_item("i8051", index, i8051.tl2); @@ -513,6 +520,7 @@ void i8051_init(int index, int clock, const void *config, int (*irqcallback)(int state_save_register_item("i8051", index, i8051.psw); state_save_register_item("i8051", index, i8051.acc); state_save_register_item("i8051", index, i8051.b); + state_save_register_item_array("i8051", index, i8051.IntRam); } /* Reset registers to the initial values */ diff --git a/src/mame/drivers/sslam.c b/src/mame/drivers/sslam.c index b1ffd4349d5..d985a5a6889 100644 --- a/src/mame/drivers/sslam.c +++ b/src/mame/drivers/sslam.c @@ -98,7 +98,7 @@ UINT16 *sslam_bg_tileram, *sslam_tx_tileram, *sslam_md_tileram; UINT16 *sslam_spriteram, *sslam_regs; static UINT8 playmark_oki_control = 0, playmark_oki_command = 0; - +static UINT8 playmark_oki_bank = 0; /************************************************************************** @@ -371,7 +371,7 @@ static WRITE16_HANDLER( sslam_snd_w ) sslam_play(sslam_melody, sslam_sound); } else if (sslam_sound >= 0x60) { - sslam_snd_bank = 0; + if (sslam_snd_bank != 0) OKIM6295_set_bank_base(0, (0 * 0x40000)); sslam_snd_bank = 0; switch (sslam_sound) @@ -469,16 +469,14 @@ static WRITE8_HANDLER( playmark_oki_w ) static WRITE8_HANDLER( playmark_snd_control_w ) { - static int oki_old_bank = -1; - playmark_oki_control = data; if(data & 3) { - if(oki_old_bank != (data & 3)) + if(playmark_oki_bank != ((data & 3) - 1)) { - oki_old_bank = data & 3; - OKIM6295_set_bank_base(0, 0x40000 * (oki_old_bank - 1)); + playmark_oki_bank = (data & 3) - 1; + OKIM6295_set_bank_base(0, 0x40000 * playmark_oki_bank); } } @@ -965,6 +963,7 @@ static DRIVER_INIT( powerbls ) { state_save_register_global(playmark_oki_control); state_save_register_global(playmark_oki_command); + state_save_register_global(playmark_oki_bank); } -- cgit v1.2.3