From 300dcfaf79d0a7e12c8610d3f922df954f1f82c6 Mon Sep 17 00:00:00 2001 From: Olivier Galibert Date: Sun, 11 Feb 2024 00:13:00 +0100 Subject: Add a plg100-vl skeleton-ish. We have h8-h8 serial communications reliability issues to track. --- scripts/src/bus.lua | 15 ++ src/devices/bus/plg100/plg100.cpp | 49 ++++ src/devices/bus/plg100/plg100.h | 70 +++++ src/devices/bus/plg100/vl.cpp | 96 +++++++ src/devices/bus/plg100/vl.h | 15 ++ src/devices/bus/waveblaster/db50xg.h | 3 + src/devices/bus/waveblaster/db60xg.h | 3 + src/devices/bus/waveblaster/omniwave.h | 3 + src/devices/bus/waveblaster/wg130.h | 3 + src/devices/cpu/h8/h8.h | 2 +- src/devices/sound/swp30.cpp | 3 +- src/mame/yamaha/ymmu100.cpp | 450 +++++++++------------------------ 12 files changed, 377 insertions(+), 335 deletions(-) create mode 100644 src/devices/bus/plg100/plg100.cpp create mode 100644 src/devices/bus/plg100/plg100.h create mode 100644 src/devices/bus/plg100/vl.cpp create mode 100644 src/devices/bus/plg100/vl.h diff --git a/scripts/src/bus.lua b/scripts/src/bus.lua index 33646671a1f..a048bc78ab9 100644 --- a/scripts/src/bus.lua +++ b/scripts/src/bus.lua @@ -5518,3 +5518,18 @@ if (BUSES["PCI"]~=null) then MAME_DIR .. "src/devices/bus/pci/zr36057.h", } end + + +--------------------------------------------------- +-- +--@src/devices/bus/plg100/plg100.h,BUSES["PLG100"] = true +--------------------------------------------------- + +if (BUSES["PLG100"]~=null) then + files { + MAME_DIR .. "src/devices/bus/plg100/plg100.cpp", + MAME_DIR .. "src/devices/bus/plg100/plg100.h", + MAME_DIR .. "src/devices/bus/plg100/vl.cpp", + MAME_DIR .. "src/devices/bus/plg100/vl.h", + } +end diff --git a/src/devices/bus/plg100/plg100.cpp b/src/devices/bus/plg100/plg100.cpp new file mode 100644 index 00000000000..80da3152c7c --- /dev/null +++ b/src/devices/bus/plg100/plg100.cpp @@ -0,0 +1,49 @@ +// license:BSD-3-Clause +// copyright-holders:Olivier Galibert + +#include "emu.h" +#include "plg100.h" + +#include "vl.h" + +DEFINE_DEVICE_TYPE(PLG100_CONNECTOR, plg100_connector, "plg100_connector", "PLG100 extension connector") + +plg100_connector::plg100_connector(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + device_t(mconfig, PLG100_CONNECTOR, tag, owner, clock), + device_single_card_slot_interface(mconfig, *this), + device_mixer_interface(mconfig, *this, 2), + m_midi_tx(*this) +{ +} + +void plg100_connector::device_start() +{ + save_item(NAME(m_state_system_is_annoying)); +} + +void plg100_connector::midi_rx(int state) +{ + auto card = get_card_device(); + if(card) + card->midi_rx(state); +} + +void plg100_intf(device_slot_interface &device) +{ + device.option_add("vl", PLG100_VL); +} + +device_plg100_interface::device_plg100_interface(const machine_config &mconfig, device_t &device) : + device_interface(device, "plg100"), + m_connector(nullptr) +{ +} + +device_plg100_interface::~device_plg100_interface() +{ +} + +void device_plg100_interface::interface_pre_start() +{ + m_connector = downcast(device().owner()); +} diff --git a/src/devices/bus/plg100/plg100.h b/src/devices/bus/plg100/plg100.h new file mode 100644 index 00000000000..18864f7e2df --- /dev/null +++ b/src/devices/bus/plg100/plg100.h @@ -0,0 +1,70 @@ +// license:BSD-3-Clause +// copyright-holders:Olivier Galibert + +// The PLG100 series is a bunch of proprietary plugins for the Yamaha +// MU series of expanders. It mostly provides two midi-rate (and midi +// protocol) serial lines (in and out) and two stereo serial sample +// streams (in and out too). + +// Known existing cards: +// PLG100-DX: DX7 as a plugin +// PLG100-SG: Singing speech synthesis, e.g. a Vocaloid before the Vocaloid existed +// PLG100-VH: Voice Harmonizer, harmony effects on the A/D inputs +// PLG100-VL: Virtual Acoustic Synthesis, physical-modelling synthesis, a VL70-m on a plugin card +// PLG100-XG: MU50 as a plugin + +#ifndef MAME_BUS_PLG100_PLG100_H +#define MAME_BUS_PLG100_PLG100_H + +#pragma once + +class device_plg100_interface; + +class plg100_connector: public device_t, public device_single_card_slot_interface, public device_mixer_interface +{ +public: + template + plg100_connector(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *dflt) + : plg100_connector(mconfig, tag, owner, (uint32_t)0) + { + option_reset(); + opts(*this); + set_default_option(dflt); + set_fixed(false); + } + + plg100_connector(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + void midi_rx(int state); + auto midi_tx() { return m_midi_tx.bind(); } + + void do_midi_tx(int state) { m_midi_tx(state); } + +protected: + bool m_state_system_is_annoying = true; + devcb_write_line m_midi_tx; + + virtual void device_start() override; +}; + +class device_plg100_interface: public device_interface +{ +public: + virtual ~device_plg100_interface(); + + virtual void midi_rx(int state) = 0; + +protected: + plg100_connector *m_connector; + + device_plg100_interface(const machine_config &mconfig, device_t &device); + + virtual void interface_pre_start() override; +}; + +DECLARE_DEVICE_TYPE(PLG100_CONNECTOR, plg100_connector) + +void plg100_intf(device_slot_interface &device); + +#endif // MAME_BUS_PLG100_PLG100_H + diff --git a/src/devices/bus/plg100/vl.cpp b/src/devices/bus/plg100/vl.cpp new file mode 100644 index 00000000000..ec89fbeab0a --- /dev/null +++ b/src/devices/bus/plg100/vl.cpp @@ -0,0 +1,96 @@ +// license:BSD-3-Clause +// copyright-holders: Olivier Galibert + +// Yamaha PLG100-VL + +// Virtual Acoustic Synthesis, physical-modelling synthesis, VL70-m on a plugin board + +// Build around a h8 for the control and a dsp-v for the synthesis + +#include "emu.h" +#include "vl.h" + +#include "cpu/h8/h83002.h" +#include "sound/dspv.h" + +namespace { + +class plg100_vl_device : public device_t, public device_plg100_interface +{ +public: + plg100_vl_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); + virtual ~plg100_vl_device(); + + virtual void midi_rx(int state) override; + +protected: + virtual void device_start() override; + virtual void device_reset() override; + const tiny_rom_entry *device_rom_region() const override; + virtual void device_add_mconfig(machine_config &config) override; + +private: + required_device m_cpu; + required_device m_dspv; + + void map(address_map &map); +}; + +plg100_vl_device::plg100_vl_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + device_t(mconfig, PLG100_VL, tag, owner, clock), + device_plg100_interface(mconfig, *this), + m_cpu(*this, "cpu"), + m_dspv(*this, "dspv") +{ +} + +plg100_vl_device::~plg100_vl_device() +{ +} + +void plg100_vl_device::midi_rx(int state) +{ + m_cpu->sci_rx_w<0>(state); +} + +void plg100_vl_device::map(address_map &map) +{ + map(0x000000, 0x0fffff).rom().region("cpu", 0); + map(0x400000, 0x40007f).m(m_dspv, FUNC(dspv_device::map)); + map(0x200000, 0x20ffff).ram(); +} + +void plg100_vl_device::device_add_mconfig(machine_config &config) +{ + H83002(config, m_cpu, 10_MHz_XTAL); + m_cpu->set_addrmap(AS_PROGRAM, &plg100_vl_device::map); + m_cpu->write_sci_tx<1>().set([this] (int state) { m_connector->do_midi_tx(state); }); + + DSPV(config, m_dspv, 22.5792_MHz_XTAL); + m_dspv->add_route(0, DEVICE_SELF_OWNER, 1.0, AUTO_ALLOC_INPUT, 0); + m_dspv->add_route(1, DEVICE_SELF_OWNER, 1.0, AUTO_ALLOC_INPUT, 1); +} + +ROM_START( plg100_vl ) + ROM_REGION( 0x100000, "cpu", 0 ) + ROM_LOAD16_WORD_SWAP( "xt47810.ic03", 0x000000, 0x100000, CRC(ef472e45) SHA1(13d54c33a4708c77de2dc1e02210da107add6ce6) ) +ROM_END + +void plg100_vl_device::device_start() +{ +} + +void plg100_vl_device::device_reset() +{ + // Active-low, wired to gnd + m_cpu->set_input_line(0, ASSERT_LINE); +} + +const tiny_rom_entry *plg100_vl_device::device_rom_region() const +{ + return ROM_NAME(plg100_vl); +} + +} // anonymous namespace + +DEFINE_DEVICE_TYPE_PRIVATE(PLG100_VL, device_plg100_interface, plg100_vl_device, "plg100_vl", "Yamaha PLG100-VL") diff --git a/src/devices/bus/plg100/vl.h b/src/devices/bus/plg100/vl.h new file mode 100644 index 00000000000..57e1b520a38 --- /dev/null +++ b/src/devices/bus/plg100/vl.h @@ -0,0 +1,15 @@ +// license:BSD-3-Clause +// copyright-holders:Olivier Galibert + +#ifndef MAME_BUS_PLG100_VL_H +#define MAME_BUS_PLG100_VL_H + +// Yamaha PLG100-VL + +#pragma once + +#include "plg100.h" + +DECLARE_DEVICE_TYPE(PLG100_VL, device_plg100_interface) + +#endif // MAME_BUS_PLG100_VL_H diff --git a/src/devices/bus/waveblaster/db50xg.h b/src/devices/bus/waveblaster/db50xg.h index b4d50e3bbf9..8f6779db170 100644 --- a/src/devices/bus/waveblaster/db50xg.h +++ b/src/devices/bus/waveblaster/db50xg.h @@ -1,3 +1,6 @@ +// license:BSD-3-Clause +// copyright-holders:Olivier Galibert + #ifndef MAME_BUS_WAVEBLASTER_DB50XG_H #define MAME_BUS_WAVEBLASTER_DB50XG_H diff --git a/src/devices/bus/waveblaster/db60xg.h b/src/devices/bus/waveblaster/db60xg.h index dbdb63cff48..4cbcbc5a14e 100644 --- a/src/devices/bus/waveblaster/db60xg.h +++ b/src/devices/bus/waveblaster/db60xg.h @@ -1,3 +1,6 @@ +// license:BSD-3-Clause +// copyright-holders:Olivier Galibert + #ifndef MAME_BUS_WAVEBLASTER_DB60XG_H #define MAME_BUS_WAVEBLASTER_DB60XG_H diff --git a/src/devices/bus/waveblaster/omniwave.h b/src/devices/bus/waveblaster/omniwave.h index 1cd568eaddf..6196ff561dd 100644 --- a/src/devices/bus/waveblaster/omniwave.h +++ b/src/devices/bus/waveblaster/omniwave.h @@ -1,3 +1,6 @@ +// license:BSD-3-Clause +// copyright-holders:Olivier Galibert + #ifndef MAME_BUS_WAVEBLASTER_OMNIWAVE_H #define MAME_BUS_WAVEBLASTER_OMNIWAVE_H diff --git a/src/devices/bus/waveblaster/wg130.h b/src/devices/bus/waveblaster/wg130.h index 68fd176e22b..30113ef8971 100644 --- a/src/devices/bus/waveblaster/wg130.h +++ b/src/devices/bus/waveblaster/wg130.h @@ -1,3 +1,6 @@ +// license:BSD-3-Clause +// copyright-holders: Devin Acker + #ifndef MAME_BUS_WAVEBLASTER_WG130_H #define MAME_BUS_WAVEBLASTER_WG130_H diff --git a/src/devices/cpu/h8/h8.h b/src/devices/cpu/h8/h8.h index ab59c2c2e7c..2aaf18fa2d8 100644 --- a/src/devices/cpu/h8/h8.h +++ b/src/devices/cpu/h8/h8.h @@ -42,7 +42,7 @@ public: m_sci[sci].lookup()->do_set_external_clock_period(period); } - template void sci_rx_w(int state) { m_sci[Sci]->do_rx_w(state); } + template void sci_rx_w(int state) { if(Sci == 2) logerror("sci2 rx %d\n", state); m_sci[Sci]->do_rx_w(state); } template void sci_clk_w(int state) { m_sci[Sci]->do_clk_w(state); } void nvram_set_battery(int state) { m_nvram_battery = bool(state); } // default is 1 (nvram_enable_backup needs to be true) diff --git a/src/devices/sound/swp30.cpp b/src/devices/sound/swp30.cpp index 9427e571ca7..f592ea4b66f 100644 --- a/src/devices/sound/swp30.cpp +++ b/src/devices/sound/swp30.cpp @@ -735,7 +735,7 @@ void swp30_device::keyon_w(u16) m_lfo_phase[chan] = 0; if(1) - logerror("[%08d] keyon %02x %08x %08x %08x vol %04x env %04x %04x %04x\n", scount, chan, m_sample_start[chan], m_sample_end[chan], m_sample_address[chan], m_release_glo[chan], m_attack[chan], m_decay1[chan], m_decay2[chan]); + logerror("[%08d] keyon %02x %08x %08x %08x vol %04x env %04x %04x %04x pitch %04x pmod %04x\n", scount, chan, m_sample_start[chan], m_sample_end[chan], m_sample_address[chan], m_release_glo[chan], m_attack[chan], m_decay1[chan], m_decay2[chan], m_pitch[chan], m_lfo_step_pmod[chan]); } } m_keyon_mask = 0; @@ -1494,6 +1494,7 @@ void swp30_device::execute_run() while(adr <= target_address) { m_dpcm_current[chan] = m_dpcm_next[chan]; s32 sample = m_dpcm_next[chan] + m_dpcm[(m_rom_cache.read_dword(adr >> 2) >> (8*(adr & 3))) & 0xff]; + // logerror("## + sample %08x %02x %d\n", adr, (m_rom_cache.read_dword(adr >> 2) >> (8*(adr & 3))) & 0xff, sample); adr ++; if(sample < -0x8000) sample = -0x8000; diff --git a/src/mame/yamaha/ymmu100.cpp b/src/mame/yamaha/ymmu100.cpp index d1972ce6275..6df0d909238 100644 --- a/src/mame/yamaha/ymmu100.cpp +++ b/src/mame/yamaha/ymmu100.cpp @@ -127,6 +127,7 @@ #include "cpu/h8/h8s2655.h" #include "mulcd.h" #include "sound/swp30.h" +#include "bus/plg100/plg100.h" #include "debugger.h" #include "speaker.h" @@ -164,126 +165,34 @@ public: , m_maincpu(*this, "maincpu") , m_swp30(*this, "swp30") , m_lcd(*this, "lcd") + , m_ext1(*this, "ext1") + , m_ext2(*this, "ext2") , m_ioport_p7(*this, "P7") , m_ioport_p8(*this, "P8") { } void mu100(machine_config &config); - void regs_s1_write_tap(offs_t address, u16 data, u16 mem_mask); - void regs_s2_write_tap(offs_t address, u16 data, u16 mem_mask); - void regs_s3_write_tap(offs_t address, u16 data, u16 mem_mask); - void regs_s4a_write_tap(offs_t address, u16 data, u16 mem_mask); - void regs_s4b_write_tap(offs_t address, u16 data, u16 mem_mask); - void regs_s4c_write_tap(offs_t address, u16 data, u16 mem_mask); - void regs_lfo_write_tap(offs_t address, u16 data, u16 mem_mask); - void regs_s6_write_tap(offs_t address, u16 data, u16 mem_mask); - void regs_fp_read_tap(offs_t address, u16 data, u16 mem_mask); - void regs_fp_write_tap(offs_t address, u16 data, u16 mem_mask); - void regs_int_read_tap(offs_t address, u16 data, u16 mem_mask); - void regs_int_write_tap(offs_t address, u16 data, u16 mem_mask); - void voice_write_tap(offs_t address, u16 data, u16 mem_mask); - void voice_read_tap(offs_t address, u16 data, u16 mem_mask); - void chan_write_tap(offs_t address, u16 data, u16 mem_mask); - void prg_write_tap(offs_t address, u16 data, u16 mem_mask); - - virtual void machine_reset() override { - if(0) - m_maincpu->space(0).install_write_tap(0x214cb8, 0x214cbf, "prg select", [this](offs_t offset, u16 &data, u16 mem_mask) { - prg_write_tap(offset, data, mem_mask); - }); - if(0) - m_maincpu->space(0).install_write_tap(0x20cb10, 0x20cb10 + 0x122*0x22 - 1, "chan debug", [this](offs_t offset, u16 &data, u16 mem_mask) { - chan_write_tap(offset, data, mem_mask); - }); - if(0) - m_maincpu->space(0).install_write_tap(0x20f03e, 0x20f03e + 0x92*0x40 - 1, "voice debug", [this](offs_t offset, u16 &data, u16 mem_mask) { - voice_write_tap(offset, data, mem_mask); - }); - if(0) - m_maincpu->space(0).install_read_tap(0x20f03e, 0x20f03e + 0x92*0x40 - 1, "voice debug", [this](offs_t offset, u16 &data, u16 mem_mask) { - voice_read_tap(offset, data, mem_mask); - }); - if(0) - m_maincpu->space(0).install_readwrite_tap(0x214ca2+0x20, 0x214ca2+0x320-1, "regs fp", - [this](offs_t offset, u16 &data, u16 mem_mask) { - regs_fp_read_tap(offset, data, mem_mask); - }, - [this](offs_t offset, u16 &data, u16 mem_mask) { - regs_fp_write_tap(offset, data, mem_mask); - }); - if(0) - m_maincpu->space(0).install_readwrite_tap(0x214ca2+0x320, 0x214ca2+0x420-1, "regs int", - [this](offs_t offset, u16 &data, u16 mem_mask) { - regs_int_read_tap(offset, data, mem_mask); - }, - [this](offs_t offset, u16 &data, u16 mem_mask) { - regs_int_write_tap(offset, data, mem_mask); - }); - if(0) - m_maincpu->space(0).install_write_tap(0x214ca2+0x420, 0x214ca2+0x440-1, "regs s1", [this](offs_t offset, u16 &data, u16 mem_mask) { - regs_s1_write_tap(offset, data, mem_mask); - }); - if(0) - m_maincpu->space(0).install_write_tap(0x214ca2+0x440, 0x214ca2+0x460-1, "regs s2", [this](offs_t offset, u16 &data, u16 mem_mask) { - regs_s2_write_tap(offset, data, mem_mask); - }); - if(0) - m_maincpu->space(0).install_write_tap(0x214ca2+0x460, 0x214ca2+0x480-1, "regs s3", [this](offs_t offset, u16 &data, u16 mem_mask) { - regs_s3_write_tap(offset, data, mem_mask); - }); - if(0) - m_maincpu->space(0).install_write_tap(0x214ca2+0x480, 0x214ca2+0x4a0-1, "regs s4a", [this](offs_t offset, u16 &data, u16 mem_mask) { - regs_s4a_write_tap(offset, data, mem_mask); - }); - if(0) - m_maincpu->space(0).install_write_tap(0x214ca2+0x4a0, 0x214ca2+0x4c0-1, "regs s4b", [this](offs_t offset, u16 &data, u16 mem_mask) { - regs_s4b_write_tap(offset, data, mem_mask); - }); - if(0) - m_maincpu->space(0).install_write_tap(0x214ca2+0x4c0, 0x214ca2+0x4e0-1, "regs s4c", [this](offs_t offset, u16 &data, u16 mem_mask) { - regs_s4c_write_tap(offset, data, mem_mask); - }); - if(0) - m_maincpu->space(0).install_write_tap(0x214ca2+0x4e0, 0x214ca2+0x510-1, "regs lfo", [this](offs_t offset, u16 &data, u16 mem_mask) { - regs_lfo_write_tap(offset, data, mem_mask); - }); - if(0) - m_maincpu->space(0).install_write_tap(0x214ca2+0x510, 0x214ca2+0x520-1, "regs s6", [this](offs_t offset, u16 &data, u16 mem_mask) { - regs_s6_write_tap(offset, data, mem_mask); - }); - } - protected: virtual u16 adc_type_r(); -private: enum { P2_LCD_RS = 0x01, P2_LCD_RW = 0x02, P2_LCD_ENABLE = 0x04 }; - enum { - P6_LCD_RS = 0x04, - P6_LCD_RW = 0x02, - P6_LCD_ENABLE = 0x01 - }; - - enum { - PA_LCD_RS = 0x02, - PA_LCD_ENABLE = 0x20, - PA_LCD_RW = 0x40 - }; - required_device m_maincpu; required_device m_swp30; required_device m_lcd; + required_device m_ext1; + optional_device m_ext2; required_ioport m_ioport_p7; required_ioport m_ioport_p8; - u8 cur_p1, cur_p2, cur_p3, cur_p5, cur_p6, cur_pa, cur_pb, cur_pc, cur_pf, cur_pg; - u8 cur_ic32; + u8 m_cur_p1, m_cur_p2, m_cur_p3, m_cur_p5, m_cur_p6, m_cur_pa, m_cur_pb, m_cur_pc, m_cur_pf, m_cur_pg; + u8 m_cur_ic32, m_cur_sw; + int m_h8_tx, m_e1_tx, m_e2_tx; u16 adc_ar_r(); u16 adc_al_r(); @@ -304,7 +213,14 @@ private: void pf_w(u16 data); void pg_w(u16 data); + void ext_serial_update(); + void h8_tx(int state); + void e1_tx(int state); + void e2_tx(int state); + virtual void machine_start() override; + virtual void machine_reset() override; + void mu100_map(address_map &map); void swp30_map(address_map &map); }; @@ -315,220 +231,36 @@ public: : mu100_state(mconfig, type, tag) { } + void mu100r(machine_config &config); + private: virtual u16 adc_type_r() override; }; -void mu100_state::prg_write_tap(offs_t address, u16 data, u16 mem_mask) -{ - if(mem_mask == 0x00ff) { - static const char *names[4] = { "chorus", "variation", "insertion1", "insertion2" }; - logerror("prg_select %s %d\n", names[(address - 0x214cb8)/2], data); - } -} - -void mu100_state::regs_s1_write_tap(offs_t address, u16 data, u16 mem_mask) -{ - offs_t pc = m_maincpu->pc(); - offs_t reg = (address - 0x214ca2-0x420)/2; - if(pc != 0x72912) - logerror("regs_s1_w %03x, %04x @ %04x (%06x)\n", reg, data, mem_mask, pc); -} - -void mu100_state::regs_s2_write_tap(offs_t address, u16 data, u16 mem_mask) -{ - offs_t pc = m_maincpu->pc(); - offs_t reg = (address - 0x214ca2-0x440)/2; - if(pc != 0x72912) - logerror("regs_s2_w %03x, %04x @ %04x (%06x)\n", reg, data, mem_mask, pc); -} - -void mu100_state::regs_s3_write_tap(offs_t address, u16 data, u16 mem_mask) -{ - offs_t pc = m_maincpu->pc(); - offs_t reg = (address - 0x214ca2-0x460)/2; - if(pc != 0x72912) - logerror("regs_s3_w %03x, %04x @ %04x (%06x)\n", reg, data, mem_mask, pc); -} - -void mu100_state::regs_s4a_write_tap(offs_t address, u16 data, u16 mem_mask) -{ - offs_t pc = m_maincpu->pc(); - offs_t reg = (address - 0x214ca2-0x480)/2; - if(pc != 0x72912) - logerror("regs_s4a_w %03x, %04x @ %04x (%06x)\n", reg, data, mem_mask, pc); -} - -void mu100_state::regs_s4b_write_tap(offs_t address, u16 data, u16 mem_mask) -{ - offs_t pc = m_maincpu->pc(); - offs_t reg = (address - 0x214ca2-0x4a0)/2; - if(pc != 0x72912) - logerror("regs_s4b_w %03x, %04x @ %04x (%06x)\n", reg, data, mem_mask, pc); -} - -void mu100_state::regs_s4c_write_tap(offs_t address, u16 data, u16 mem_mask) -{ - offs_t pc = m_maincpu->pc(); - offs_t reg = (address - 0x214ca2-0x4c0)/2; - if(pc != 0x72912) - logerror("regs_s4c_w %03x, %04x @ %04x (%06x)\n", reg, data, mem_mask, pc); -} - -void mu100_state::regs_lfo_write_tap(offs_t address, u16 data, u16 mem_mask) -{ - offs_t pc = m_maincpu->pc(); - offs_t reg = (address - 0x214ca2-0x4e0)/2; - if(pc != 0x72912) - logerror("regs_lfo_w %03x, %04x @ %04x (%06x)\n", reg, data, mem_mask, pc); -} - -void mu100_state::regs_s6_write_tap(offs_t address, u16 data, u16 mem_mask) -{ - offs_t pc = m_maincpu->pc(); - offs_t reg = (address - 0x214ca2-0x510)/2; - if(pc != 0x72912) - logerror("regs_s6_w %03x, %04x @ %04x (%06x)\n", reg, data, mem_mask, pc); -} - -void mu100_state::regs_fp_read_tap(offs_t address, u16 data, u16 mem_mask) -{ - offs_t pc = m_maincpu->pc(); - offs_t reg = (address - 0x214ca2-0x20)/2; - if(pc != 0x72912) - logerror("regs_fp_r %03x, %04x @ %04x (%06x)\n", reg, data, mem_mask, pc); -} - -void mu100_state::regs_fp_write_tap(offs_t address, u16 data, u16 mem_mask) -{ - offs_t pc = m_maincpu->pc(); - offs_t reg = (address - 0x214ca2-0x20)/2; - logerror("regs_fp_w %03x, %04x @ %04x (%06x)\n", reg, data, mem_mask, pc); -} - -void mu100_state::regs_int_read_tap(offs_t address, u16 data, u16 mem_mask) -{ - offs_t pc = m_maincpu->pc(); - offs_t reg = (address - 0x214ca2-0x320)/2; - if(pc != 0x729c6) - logerror("regs_int_r %03x, %04x @ %04x (%06x)\n", reg, data, mem_mask, pc); -} - -void mu100_state::regs_int_write_tap(offs_t address, u16 data, u16 mem_mask) -{ - offs_t pc = m_maincpu->pc(); - offs_t reg = (address - 0x214ca2-0x320)/2; - logerror("regs_int_w %03x, %04x @ %04x (%06x)\n", reg, data, mem_mask, pc); -} - -struct xmap { - int slot; - const char *name; -}; - -static xmap vmap[] = { - { 0x00, "instrumenthi" }, - { 0x02, "instrumentlo" }, - { 0x04, "midi_channelhi" }, - { 0x06, "midi_channello" }, - { 0x0c, "lpf_cutoff" }, - { 0x42, "delay_time" }, - { 0x48, "active" }, - { 0x4a, "velocity" }, - { 0x51, "inverse_velocity" }, - { -1, "" }, -}; - -void mu100_state::voice_write_tap(offs_t address, u16 data, u16 mem_mask) +void mu100_state::machine_start() { - offs_t pc = m_maincpu->pc(); - offs_t off = address - 0x20f03e; - int voice = off / 0x92; - int slot = off % 0x92; - - if(mem_mask == 0xff00) - data >>= 8; - else if(mem_mask == 0x00ff) - slot++; - - std::string slotname = util::string_format("%02x", slot); - for(int i=0; vmap[i].slot != -1; i++) - if(vmap[i].slot == slot) - slotname = vmap[i].name; - - if(mem_mask == 0xffff) { - logerror("voice_w %02x:%s, %04x (%06x)\n", voice, slotname, data, pc); - } else { - logerror("voice_w %02x:%s, %02x (%06x)\n", voice, slotname, data, pc); - } + save_item(NAME(m_cur_p1)); + save_item(NAME(m_cur_p2)); + save_item(NAME(m_cur_p3)); + save_item(NAME(m_cur_p5)); + save_item(NAME(m_cur_p6)); + save_item(NAME(m_cur_pa)); + save_item(NAME(m_cur_pc)); + save_item(NAME(m_cur_pf)); + save_item(NAME(m_cur_pg)); + save_item(NAME(m_cur_ic32)); + save_item(NAME(m_cur_sw)); + save_item(NAME(m_h8_tx)); + save_item(NAME(m_e1_tx)); + save_item(NAME(m_e2_tx)); } -void mu100_state::voice_read_tap(offs_t address, u16 data, u16 mem_mask) +void mu100_state::machine_reset() { - offs_t pc = m_maincpu->pc(); - offs_t off = address - 0x20f03e; - int voice = off / 0x92; - int slot = off % 0x92; - - logerror("off %x voice %x slot %x mask %04x\n", off, voice, slot, mem_mask); - data &= mem_mask; - if(mem_mask == 0xff00) - data >>= 8; - else if(mem_mask == 0x00ff) - slot++; - - std::string slotname = util::string_format("%02x", slot); - for(int i=0; vmap[i].slot != -1; i++) - if(vmap[i].slot == slot) - slotname = vmap[i].name; - - if(mem_mask == 0xffff) { - logerror("voice_r %02x:%s, %04x (%06x)\n", voice, slotname, data, pc); - } else { - logerror("voice_r %02x:%s, %02x (%06x)\n", voice, slotname, data, pc); - } -} - -void mu100_state::chan_write_tap(offs_t address, u16 data, u16 mem_mask) -{ - offs_t pc = m_maincpu->pc(); - offs_t off = address - 0x20cb10; - int voice = off / 0x112; - int slot = off % 0x112; - if(mem_mask == 0xffff) { - if(slot == 0x102 && data == 0) - return; - if(slot == 0x100 && data == 0) - return; - if(slot == 0x0fe && data == 0) - return; - logerror("chan_w %02x:%03x, %04x (%06x)\n", voice, slot, data, pc); - } else { - if(mem_mask == 0xff00) - data >>= 8; - else - slot++; - if(slot == 0x106 && data == 0) - return; - if(slot == 0x108 && data == 0) - return; - if(slot == 0x105) // volume - return; - if(slot == 0x109 && data == 0) - return; - if(slot == 0x0e7 && data == 0) - return; - if(slot == 0x0e5 && data == 0) - return; - if(slot == 0x111 && data == 0x40) - return; - logerror("chan_w %02x:%03x, %02x (%06x)\n", voice, slot, data, pc); - } -} - -void mu100_state::machine_start() -{ - cur_p1 = cur_p2 = cur_p3 = cur_p5 = cur_p6 = cur_pa = cur_pc = cur_pf = cur_pg = cur_ic32 = 0xff; + m_cur_p1 = m_cur_p2 = m_cur_p3 = m_cur_p5 = m_cur_p6 = m_cur_pa = m_cur_pc = m_cur_pf = m_cur_pg = m_cur_ic32 = 0xff; + m_cur_sw = 0; + m_h8_tx = m_e1_tx = m_e2_tx = 1; + ext_serial_update(); } void mu100_state::mu100_map(address_map &map) @@ -575,14 +307,14 @@ u16 mu100r_state::adc_type_r() void mu100_state::p1_w(u16 data) { - cur_p1 = data; + m_cur_p1 = data; } u16 mu100_state::p1_r() { - if((cur_p2 & P2_LCD_ENABLE)) { - if(cur_p2 & P2_LCD_RW) { - if(cur_p2 & P2_LCD_RS) + if((m_cur_p2 & P2_LCD_ENABLE)) { + if(m_cur_p2 & P2_LCD_RW) { + if(m_cur_p2 & P2_LCD_RS) return m_lcd->data_read(); else return m_lcd->control_read(); @@ -590,11 +322,11 @@ u16 mu100_state::p1_r() return 0x00; } - if(!(cur_pf & 0x02)) { + if(!(m_cur_pf & 0x02)) { u8 val = 0xff; - if(!(cur_ic32 & 0x20)) + if(!(m_cur_ic32 & 0x20)) val &= m_ioport_p7->read(); - if(!(cur_ic32 & 0x40)) + if(!(m_cur_ic32 & 0x40)) val &= m_ioport_p8->read(); return val; } @@ -605,34 +337,35 @@ u16 mu100_state::p1_r() void mu100_state::p2_w(u16 data) { // LCB enable edge - if(!(cur_p2 & P2_LCD_ENABLE) && (data & P2_LCD_ENABLE)) { - if(!(cur_p2 & P2_LCD_RW)) { - if(cur_p2 & P2_LCD_RS) - m_lcd->data_write(cur_p1); + if(!(m_cur_p2 & P2_LCD_ENABLE) && (data & P2_LCD_ENABLE)) { + if(!(m_cur_p2 & P2_LCD_RW)) { + if(m_cur_p2 & P2_LCD_RS) + m_lcd->data_write(m_cur_p1); else - m_lcd->control_write(cur_p1); + m_lcd->control_write(m_cur_p1); } } m_lcd->set_contrast((data >> 3) & 7); - cur_p2 = data; + m_cur_p2 = data; } void mu100_state::p3_w(u16 data) { - cur_p3 = data; + m_cur_p3 = data; logerror("A/D gain control %d\n", (data >> 4) & 3); } void mu100_state::p5_w(u16 data) { - cur_p5 = data; + m_cur_p5 = data; logerror("Rotary reset %d\n", (data >> 3) & 1); } void mu100_state::p6_w(u16 data) { - cur_p6 = data; - logerror("pbsel %d pbreset %d soundreset %d\n", (data >> 2) & 3, (data >> 4) & 1, (data >> 5) & 1); + m_cur_p6 = data; + m_cur_sw = (m_cur_sw & 0xc) | BIT(m_cur_pf, 2, 2); + ext_serial_update(); } u16 mu100_state::p6_r() @@ -643,7 +376,7 @@ u16 mu100_state::p6_r() void mu100_state::pa_w(u16 data) { - cur_pa = data; + m_cur_pa = data; logerror("rotary encoder %d\n", (data >> 6) & 3); } @@ -655,17 +388,56 @@ u16 mu100_state::pa_r() void mu100_state::pf_w(u16 data) { - if(!(cur_pf & 0x01) && (data & 0x01)) { - cur_ic32 = cur_p1; - m_lcd->set_leds((cur_p1 & 0x1f) | ((cur_p1 & 0x80) >> 2)); + if(!(m_cur_pf & 0x01) && (data & 0x01)) { + m_cur_ic32 = m_cur_p1; + m_lcd->set_leds((m_cur_p1 & 0x1f) | ((m_cur_p1 & 0x80) >> 2)); } - cur_pf = data; + m_cur_pf = data; + m_cur_sw = (m_cur_sw & 0x7) | (BIT(m_cur_pf, 2) << 3); + ext_serial_update(); } void mu100_state::pg_w(u16 data) { - cur_pg = data; - logerror("pbsel3 %d\n", data & 1); + m_cur_pg = data; + m_cur_sw = (m_cur_sw & 0xb) | (BIT(m_cur_pg, 0) << 2); + ext_serial_update(); +} + +void mu100_state::ext_serial_update() +{ + m_ext1->midi_rx(BIT(m_cur_sw, 3) ? m_h8_tx : 1); + if(m_ext2) + m_ext2->midi_rx(BIT(m_cur_sw, 1) ? m_h8_tx : 1); + if(BIT(m_cur_sw, 2)) + if(BIT(m_cur_sw, 0)) + m_maincpu->sci_rx_w<2>(m_e1_tx && m_e2_tx); + else + m_maincpu->sci_rx_w<2>(m_e1_tx); + else + if(BIT(m_cur_sw, 0)) + m_maincpu->sci_rx_w<2>(m_e2_tx); + else + m_maincpu->sci_rx_w<2>(1); +} + +void mu100_state::h8_tx(int state) +{ + m_h8_tx = state; + ext_serial_update(); +} + +void mu100_state::e1_tx(int state) +{ + logerror("e1 tx %d\n", state); + m_e1_tx = state; + ext_serial_update(); +} + +void mu100_state::e2_tx(int state) +{ + m_e2_tx = state; + ext_serial_update(); } void mu100_state::swp30_map(address_map &map) @@ -698,9 +470,13 @@ void mu100_state::mu100(machine_config &config) m_maincpu->write_porta().set(FUNC(mu100_state::pa_w)); m_maincpu->write_portf().set(FUNC(mu100_state::pf_w)); m_maincpu->write_portg().set(FUNC(mu100_state::pg_w)); + m_maincpu->write_sci_tx<2>().set(FUNC(mu100_state::h8_tx)); MULCD(config, m_lcd); + PLG100_CONNECTOR(config, m_ext1, plg100_intf, "vl"); + m_ext1->midi_tx().set(FUNC(mu100_state::e1_tx)); + SPEAKER(config, "lspeaker").front_left(); SPEAKER(config, "rspeaker").front_right(); @@ -722,6 +498,14 @@ void mu100_state::mu100(machine_config &config) m_maincpu->write_sci_tx<0>().set(mdout, FUNC(midi_port_device::write_txd)); } +void mu100r_state::mu100r(machine_config &config) +{ + mu100(config); + + PLG100_CONNECTOR(config, m_ext2, plg100_intf, nullptr); + m_ext2->midi_tx().set(FUNC(mu100r_state::e2_tx)); +} + #define ROM_LOAD16_WORD_SWAP_BIOS(bios,name,offset,length,hash) \ ROMX_LOAD(name, offset, length, hash, ROM_GROUPWORD | ROM_REVERSE | ROM_BIOS(bios)) @@ -746,7 +530,7 @@ ROM_START( mu100 ) ROM_LOAD32_WORD( "xt463a0.ic38", 0x1000002, 0x400000, CRC(cce5f8d3) SHA1(bdca8c5158f452f2b5535c7d658c9b22c6d66048) ) ROM_END -// mu100r is identical to the mu100 +// mu100r roms are identical to the mu100 #define rom_mu100r rom_mu100 ROM_START( mu100b ) @@ -766,6 +550,6 @@ ROM_END } // anonymous namespace -SYST( 1997, mu100, 0, 0, mu100, mu100, mu100_state, empty_init, "Yamaha", "MU100", MACHINE_NOT_WORKING ) -SYST( 1997, mu100r, mu100, 0, mu100, mu100, mu100r_state, empty_init, "Yamaha", "MU100 Rackable version", MACHINE_NOT_WORKING ) -SYST( 1998, mu100b, mu100, 0, mu100, mu100, mu100_state, empty_init, "Yamaha", "MU100B", MACHINE_NOT_WORKING ) +SYST( 1997, mu100, 0, 0, mu100, mu100, mu100_state, empty_init, "Yamaha", "MU100", MACHINE_NOT_WORKING ) +SYST( 1997, mu100r, mu100, 0, mu100r, mu100, mu100r_state, empty_init, "Yamaha", "MU100 Rackable version", MACHINE_NOT_WORKING ) +SYST( 1998, mu100b, mu100, 0, mu100, mu100, mu100_state, empty_init, "Yamaha", "MU100 Screenless version", MACHINE_NOT_WORKING ) -- cgit v1.2.3