From 21d9f725a00ff08b0ad996168ceb46d88910b95f Mon Sep 17 00:00:00 2001 From: hap Date: Sat, 24 Feb 2024 15:05:24 +0100 Subject: Revert "h8_sci: Suppress SCK transition at end of transmit sequence (fixes regression in puzzlet)" This reverts commit 3c038a50af94b12a53e2c3180ee91e39247651cf. --- src/devices/cpu/h8/h8_sci.cpp | 12 ++---------- 1 file changed, 2 insertions(+), 10 deletions(-) diff --git a/src/devices/cpu/h8/h8_sci.cpp b/src/devices/cpu/h8/h8_sci.cpp index dee26a119e0..e5af601bae1 100644 --- a/src/devices/cpu/h8/h8_sci.cpp +++ b/src/devices/cpu/h8/h8_sci.cpp @@ -374,12 +374,8 @@ u64 h8_sci_device::internal_update(u64 current_time) bool new_clock = delta >= m_divider; if(new_clock != m_tx_clock_value) { machine().scheduler().synchronize(); - if(!new_clock) { + if(!new_clock) tx_dropped_edge(); - // HACK: prevent extra transition on SCK output at end of transmission sequence - if(m_tx_state == ST_IDLE) - new_clock = true; - } m_tx_clock_value = new_clock; if(m_clock_state || m_tx_clock_value) @@ -425,12 +421,8 @@ u64 h8_sci_device::internal_update(u64 current_time) bool new_clock = delta >= m_divider*8; if(new_clock != m_tx_clock_value) { machine().scheduler().synchronize(); - if(!new_clock) { + if(!new_clock) tx_dropped_edge(); - // HACK: prevent extra transition on SCK output at end of transmission sequence - if(m_tx_state == ST_IDLE) - new_clock = true; - } m_tx_clock_value = new_clock; if(m_clock_mode == clock_mode_t::INTERNAL_ASYNC_OUT && (m_clock_state || !m_tx_clock_value)) -- cgit v1.2.3