From 19ecfbe9290e0445381b23f04e8260ce7fe7f46d Mon Sep 17 00:00:00 2001 From: Angelo Salese Date: Tue, 14 Nov 2023 20:54:54 +0100 Subject: skeleton/alphasma3k.cpp: fix CPU type, add QA notes (#11744) --- src/mame/skeleton/alphasma3k.cpp | 57 +++++++++++++++++++++++++++++++--------- 1 file changed, 44 insertions(+), 13 deletions(-) diff --git a/src/mame/skeleton/alphasma3k.cpp b/src/mame/skeleton/alphasma3k.cpp index f0ecc6ba050..7983cdb73b6 100644 --- a/src/mame/skeleton/alphasma3k.cpp +++ b/src/mame/skeleton/alphasma3k.cpp @@ -1,10 +1,17 @@ // license:BSD-3-Clause // copyright-holders: -/************************************************************************************ +/*************************************************************************************************** - AlphaSmart 3000 +AlphaSmart 3000 -AlphaSmart 3000 PCB: +TODO: +- SW traps asap after writing to uninitialized A0, going off the rails. +- Snippet at PC=400148 is supposed to transfer the rest of the IPL to main RAM, + but it fails looping at PC=40016c cmpa.w A0, A1 (DragonBall-EZ core bug?) + +==================================================================================================== + +PCB: ___________ _____________ / :: |_______________________________________________________________/ \ _______/ :: :: _________ _________ ________ \_____________ @@ -29,7 +36,7 @@ Two version updaters known: TODO: - Everything -*************************************************************************************/ +***************************************************************************************************/ #include "emu.h" #include "cpu/m68000/m68000.h" @@ -51,7 +58,9 @@ public: , m_maincpu(*this, "maincpu") , m_lcdc0(*this, "ks0066_0") , m_lcdc1(*this, "ks0066_1") - , m_ram(*this, RAM_TAG) +// , m_ram(*this, RAM_TAG) + , m_ipl(*this, "ipl") + , m_ram(*this, "ram") { } @@ -61,27 +70,49 @@ protected: required_device m_maincpu; required_device m_lcdc0; required_device m_lcdc1; - required_device m_ram; +// required_device m_ram; + required_region_ptr m_ipl; + required_shared_ptr m_ram; std::unique_ptr m_tmp_bitmap; + + virtual void machine_reset() override; + +private: + void main_map(address_map &map); }; +void alphasmart3k_state::main_map(address_map &map) +{ + map(0x0000'0000, 0x0003'ffff).ram().share("ram"); + map(0x0040'0000, 0x004f'ffff).rom().region("ipl", 0); +} + static INPUT_PORTS_START( alphasmart3k ) INPUT_PORTS_END +void alphasmart3k_state::machine_reset() +{ + // TODO: expects specific initialized 68k values, including registers? + // dc.w 1111 is vector $2c + for (int i = 0; i < 0x10; i++) + m_ram[i] = m_ipl[i]; +} + void alphasmart3k_state::alphasmart3k(machine_config &config) { // Basic machine hardware - MC68328(config, m_maincpu, 16'000'000); // MC68EZ328PU16V, clock unverified + MC68EZ328(config, m_maincpu, 16'000'000); // MC68EZ328PU16V, clock unverified + m_maincpu->set_addrmap(AS_PROGRAM, &alphasmart3k_state::main_map); // Values from AlphaSmart 2000, not confirmed for AlphaSmart 3000 - // AlphaSmart 3000 uses a Data Image CM4040 LCD display + // AlphaSmart 3000 uses a Data Image CM4040 LCD display, LCD is 40x4 according to ref KS0066_F05(config, m_lcdc0, 0); - m_lcdc0->set_lcd_size(2, 40); + m_lcdc0->set_lcd_size(4, 40); KS0066_F05(config, m_lcdc1, 0); - m_lcdc1->set_lcd_size(2, 40); + m_lcdc1->set_lcd_size(4, 40); - RAM(config, RAM_TAG).set_default_size("256K"); +// RAM(config, RAM_TAG).set_default_size("256K"); SOFTWARE_LIST(config, "kapps_list").set_original("alphasmart_kapps"); } @@ -89,8 +120,8 @@ void alphasmart3k_state::alphasmart3k(machine_config &config) // ROM definitions ROM_START( asma3k ) - ROM_REGION( 0x100000, "maincpu", 0 ) - ROM_LOAD( "28f008b3.u1", 0x000000, 0x100000, CRC(73a24834) SHA1(a47e6a6d286feaba4e671a6373632222113f9276) ) + ROM_REGION16_BE( 0x100000, "ipl", 0 ) + ROM_LOAD16_WORD( "28f008b3.u1", 0x000000, 0x100000, CRC(73a24834) SHA1(a47e6a6d286feaba4e671a6373632222113f9276) ) ROM_END } // anonymous namespace -- cgit v1.2.3