From 15fec9578b74cb110760711ca6feda085098a6fb Mon Sep 17 00:00:00 2001 From: hap Date: Tue, 21 Jan 2025 00:47:08 +0100 Subject: excal: correct rom labels --- src/mame/hegenerglaser/excalibur.cpp | 11 +++++------ src/mame/hegenerglaser/glasgow.cpp | 8 ++++---- 2 files changed, 9 insertions(+), 10 deletions(-) diff --git a/src/mame/hegenerglaser/excalibur.cpp b/src/mame/hegenerglaser/excalibur.cpp index 341b49cc94e..5c1c2f86278 100644 --- a/src/mame/hegenerglaser/excalibur.cpp +++ b/src/mame/hegenerglaser/excalibur.cpp @@ -21,7 +21,7 @@ Motherboard: Interface board: - PCB label: HGS 15 101 00 B -- edge connector to module with 64KB ROM (4*2764) +- edge connector to module with 64KB ROM (4*27128) Brikett: - stripped down, only the LCD/keypad PCB @@ -44,7 +44,6 @@ number of positions 2026 for excal, and 2028 for excaltm. TODO: - verify CPU speed, see notes above -- correct ROM labels *******************************************************************************/ @@ -222,10 +221,10 @@ void excal_state::excal(machine_config &config) ROM_START( excal ) ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD16_BYTE("excalibur_1u.u1", 0x00000, 0x04000, CRC(f4b16b35) SHA1(778b1ece0fc5db88b667d550a55cb757c1280d4d) ) - ROM_LOAD16_BYTE("excalibur_1l.l1", 0x00001, 0x04000, CRC(372639b0) SHA1(fb56a19689e164175a3db10faf24ab3360264b7c) ) - ROM_LOAD16_BYTE("excalibur_2u.u2", 0x08000, 0x04000, CRC(ad039672) SHA1(4dc80600bcc7ea450102f2d0eb25be644e5e542c) ) - ROM_LOAD16_BYTE("excalibur_2l.l2", 0x08001, 0x04000, CRC(08dc7409) SHA1(6f7a336c615ff40dd4018a2150c3213bc7e7e1dc) ) + ROM_LOAD16_BYTE("1u_215_22.10.u1", 0x00000, 0x04000, CRC(f4b16b35) SHA1(778b1ece0fc5db88b667d550a55cb757c1280d4d) ) + ROM_LOAD16_BYTE("1l_215_22.10.l1", 0x00001, 0x04000, CRC(372639b0) SHA1(fb56a19689e164175a3db10faf24ab3360264b7c) ) + ROM_LOAD16_BYTE("2u_215_22.10.u2", 0x08000, 0x04000, CRC(ad039672) SHA1(4dc80600bcc7ea450102f2d0eb25be644e5e542c) ) + ROM_LOAD16_BYTE("2l_215_22.10.l2", 0x08001, 0x04000, CRC(08dc7409) SHA1(6f7a336c615ff40dd4018a2150c3213bc7e7e1dc) ) ROM_END ROM_START( excaltm ) diff --git a/src/mame/hegenerglaser/glasgow.cpp b/src/mame/hegenerglaser/glasgow.cpp index 88d8e0984b0..4f3dad29bcc 100644 --- a/src/mame/hegenerglaser/glasgow.cpp +++ b/src/mame/hegenerglaser/glasgow.cpp @@ -252,10 +252,10 @@ static INPUT_PORTS_START( glasgow ) PORT_START("WAIT") // hardwired, default to 1 PORT_CONFNAME( 0x03, 0x01, "LDS/UDS Wait States" ) PORT_CHANGED_MEMBER(DEVICE_SELF, FUNC(glasgow_state::wait_changed), 0) - PORT_CONFSETTING( 0x00, "None (12 MHz)" ) - PORT_CONFSETTING( 0x01, "1 (~9.5 MHz)" ) - PORT_CONFSETTING( 0x02, "2 (~8 MHz)" ) - PORT_CONFSETTING( 0x03, "3 (~7 Mhz)" ) + PORT_CONFSETTING( 0x00, "None (12MHz)" ) + PORT_CONFSETTING( 0x01, "1 (~9.5MHz)" ) + PORT_CONFSETTING( 0x02, "2 (~8MHz)" ) + PORT_CONFSETTING( 0x03, "3 (~7Mhz)" ) INPUT_PORTS_END -- cgit v1.2.3