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* Moved the state saving system to C++. For now the registration macros Aaron Giles2011-02-0812-33/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | are still intact. The new state_manager class has templatized methods for saving the various types, and through template specialization can save more complex system types cleanly (like bitmaps and attotimes). Added new mechanism to detect proper state save types. This is much more strict and there will likely be some games/devices that fatalerror at startup until they are remedied. Spot checking has caught the more common situations. The new state_manager is embedded directly in the running_machine, allowing objects to register state saving in their constructors now. Added NAME() macro which is a generalization of FUNC() and can be used to wrap variables that are registered when directly using the new methods as opposed to the previous macros. For example: machine->state().save_item(NAME(global_item)) Added methods in the device_t class that implicitly register state against the current device, making for a cleaner interface. Just a couple of required regexes for now: state_save_register_postload( *)\(( *)([^,;]+), * \3->state().register_postload\1\(\2 state_save_register_presave( *)\(( *)([^,;]+), * \3->state().register_presave\1\(\2
* G65816: fixed operation on PowerPC Linux where char is unsigned [R. Belmont, ↵ R. Belmont2011-02-071-1/+1
| | | | billb]
* tms57002: significantly improved build speed on lower-end h/w [R. Belmont] R. Belmont2011-02-064-243/+270
| | | | | | | | No-whatsnew explanation: this takes OPTIMIZE=3 compile time for this core from over 1 hour down to about 2 minutes on PS3 Linux. (Yes, the tms57002 itself took over an hour to compile before - the thing has 256 MB of RAM and a very slow HDD so when it hits swap, swap hits back).
* As promised, the bulk update of timer calls: Aaron Giles2011-02-0620-115/+115
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | timer_adjust_oneshot(t,...) => t->adjust(...) timer_adjust_periodic(t,...) => t->adjust(...) timer_reset(t,...) => t->reset(...) timer_enable(t,...) => t->enable(...) timer_enabled(t) => t->enabled() timer_get_param(t) => t->param() timer_get_ptr(t) => t->ptr() timer_set_param(t,...) => t->set_param(...) timer_set_ptr(t) => t->set_ptr(...) timer_timeelapsed(t) => t->elapsed() timer_timeleft(t) => t->remaining() timer_starttime(t) => t->start() timer_firetime(t) => t->expire() Also remove some stray legacy cpuexec* macros that were lurking in schedule.h): cpuexec_describe_context(m) => m->describe_context() cpuexec_boost_interleave(m,...) => m->scheduler().boot_interleave(...) cpuexec_trigger(m,...) => m->scheduler().trigger(...) cpuexec_triggertime(m,...) => m->scheduler().trigger(...) Specific regex'es used: timer_adjust_oneshot( *)\(( *)([^,;]+), * \3->adjust\1\(\2 timer_adjust_periodic( *)\(( *)([^,;]+), * \3->adjust\1\(\2 (->adjust.*), *0( *)\) \1\2\) timer_reset( *)\(( *)([^,;]+), * \3->reset\1\(\2 (->reset *\(.*)attotime::never \1 timer_enable( *)\(( *)([^,;]+), * \3->enable\1\(\2 timer_enabled( *)\(( *)([^,;)]+)\) \3->enabled\1\(\2\) timer_get_param( *)\(( *)([^,;)]+)\) \3->param\1\(\2\) timer_get_ptr( *)\(( *)([^,;)]+)\) \3->ptr\1\(\2\) timer_timeelapsed( *)\(( *)([^,;)]+)\) \3->elapsed\1\(\2\) timer_timeleft( *)\(( *)([^,;)]+)\) \3->remaining\1\(\2\) timer_starttime( *)\(( *)([^,;)]+)\) \3->start\1\(\2\) timer_firetime( *)\(( *)([^,;)]+)\) \3->expire\1\(\2\) timer_set_param( *)\(( *)([^,;]+), * \3->set_param\1\(\2 timer_set_ptr( *)\(( *)([^,;]+), * \3->set_ptr\1\(\2 cpuexec_describe_context( *)\(( *)([^,;)]+)\) \3->describe_context\1\(\2\) \&m_machine->describe_context m_machine.describe_context cpuexec_boost_interleave( *)\(( *)([^,;]+), * \3->scheduler().boost_interleave\1\(\2 cpuexec_trigger( *)\(( *)([^,;]+), * \3->scheduler().trigger\1\(\2 cpuexec_triggertime( *)\(( *)([^,;]+), * \3->scheduler().trigger\1\(\2
* Convert emu_timers to objects. Move implementation and management of Aaron Giles2011-02-0623-57/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | timers into the scheduler. Retain TIMER devices as a separate wrapper in timer.c/.h. Inline wrappers are currently provided for all timer operations; a future update will bulk clean these up. Rather than using macros which hide generation of a string-ified name for callback functions, the new methods require passing both a function pointer plus a name string. A new macro FUNC() can be used to output both, and another macro MFUNC() can be used to output a stub-wrapped class member as a callback. Also added a time() method on the machine, so that machine->time() gives the current emulated time. A wrapper for timer_get_time is currently provided but will be bulk replaced in the future. For this update, convert all classic timer_alloc, timer_set, timer_pulse, and timer_call_after_resynch calls into method calls on the scheduler. For new device timers, added methods to the device_t class that make creating and managing these much simpler. Modern devices were updated to use these. Here are the regexes used; some manual cleanup (compiler-caught) will be needed since regex doesn't handle nested parentheses cleanly 1. Convert timer_call_after_resynch calls timer_call_after_resynch( *)\(( *)([^,;]+), *([^,;]+), *([^,;]+), *([^);]+)\) \3->scheduler().synchronize\1\(\2FUNC(\6), \5, \4\) 2. Clean up trailing 0, NULL parameters (synchronize[^;]+), 0, NULL\) \1) 3. Clean up trailing NULL parameters (synchronize[^;]+), NULL\) \1) 4. Clean up completely empty parameter lists synchronize\(FUNC\(NULL\)\) synchronize() 5. Convert timer_set calls timer_set( *)\(( *)([^,;]+), *([^,;]+), *([^,;]+), *([^,;]+), *([^);]+)\) \3->scheduler().timer_set\1\(\2\4, FUNC(\7), \6, \5\) 6. Clean up trailing 0, NULL parameters (timer_set[^;]+), 0, NULL\) \1) 7. Clean up trailing NULL parameters (timer_set[^;]+), NULL\) \1) 8. Convert timer_set calls timer_pulse( *)\(( *)([^,;]+), *([^,;]+), *([^,;]+), *([^,;]+), *([^);]+)\) \3->scheduler().timer_pulse\1\(\2\4, FUNC(\7), \6, \5\) 9. Clean up trailing 0, NULL parameters (timer_pulse[^;]+), 0, NULL\) \1) 10. Clean up trailing NULL parameters (timer_pulse[^;]+), NULL\) \1) 11. Convert timer_alloc calls timer_alloc( *)\(( *)([^,;]+), *([^,;]+), *([^);]+)\) \3->scheduler().timer_alloc\1\(\2FUNC(\4), \5\) 12. Clean up trailing NULL parameters (timer_alloc[^;]+), NULL\) \1) 13. Clean up trailing 0 parameters (timer_alloc[^;]+), 0\) \1) 14. Fix oddities introduced \&m_machine->scheduler() m_machine.scheduler()
* drcbex64: fix compile on Apple GCC (no whatsnew) R. Belmont2011-02-051-2/+2
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* drcuml: fix compile on systems that use the C backend [R. Belmont] R. Belmont2011-02-051-0/+1
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* stop LOG_BIOSCALL triggering dbe when outputting parameters. smf-2011-02-051-0/+1
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* Attotime bulk conversion step: Aaron Giles2011-02-0320-69/+69
| | | | | | | | | | | | | | | | | | attotime_zero => attotime::zero attotime_never => attotime::never ATTOTIME_IN_SEC(s) => attotime::from_seconds(s) ATTOTIME_IN_MSEC(m) => attotime::from_msec(m) ATTOTIME_IN_USEC(u) => attotime::from_usec(u) ATTOTIME_IN_NSEC(n) => attotime::from_nsec(n) ATTOTIME_IN_HZ(h) => attotime::from_hz(h) Also, changed the following MCFG macros to require a full attotime specification: MCFG_TIMER_ADD_PERIODIC MCFG_QUANTUM_TIME MCFG_WATCHDOG_TIME_INIT
* Converted attotime to a class, with proper operators. Removed old Aaron Giles2011-02-039-31/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | global functions which are now superceded by the operators and methods on the class. [Aaron Giles] Required mappings are: attotime_make(a,b) => attotime(a,b) attotime_to_double(t) => t.as_double() double_to_attotime(d) => attotime::from_double(d) attotime_to_attoseconds(t) => t.as_attoseconds() attotime_to_ticks(t,f) => t.as_ticks(f) ticks_to_attotime(t,f) => attotime::from_ticks(t,f) attotime_add(a,b) => a + b attotime_add_attoseconds(a,b) => a + attotime(0, b) attotime_sub(a,b) => a - b attotime_sub_attoseconds(a,b) => a - attotime(0, b) attotime_compare(a,b) == 0 => a == b attotime_compare(a,b) != 0 => a != b attotime_compare(a,b) < 0 => a < b attotime_compare(a,b) <= 0 => a <= b attotime_compare(a,b) > 0 => a > b attotime_compare(a,b) >= 0 => a >= b attotime_mul(a,f) => a * f attotime_div(a,f) => a / f attotime_min(a,b) => min(a,b) attotime_max(a,b) => max(a,b) attotime_is_never(t) => t.is_never() attotime_string(t,p) => t.as_string(p) In addition, some existing #defines still exist but will go away: attotime_zero => attotime::zero attotime_never => attotime::never ATTOTIME_IN_SEC(s) => attotime::from_seconds(s) ATTOTIME_IN_MSEC(m) => attotime::from_msec(m) ATTOTIME_IN_USEC(u) => attotime::from_usec(u) ATTOTIME_IN_NSEC(n) => attotime::from_nsec(n) ATTOTIME_IN_HZ(h) => attotime::from_hz(h)
* Converted TMS3203X to a modern device. Aaron Giles2011-01-314-3626/+4708
| | | | | | Also removed redundant m_machine from the state and execute interfaces to fix ambiguity when using m_machine from within a device that inherits from these.
* Fixed interrupt vector in F8 CPU core [Sandro Ronco] Miodrag Milanovic2011-01-301-1/+1
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* ARM7: Fix an LDM base register write-back bug. [Tim Schuerewegen] R. Belmont2011-01-301-2/+11
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* arm7: - Improved LDM/STM unaligned word access in THUMB mode. [Tim Schuerewegen] Miodrag Milanovic2011-01-291-3/+10
| | | -Fixed LDM unaligned read in THUMB mode.
* v25: added commented line useful for decryption process Roberto Zandona2011-01-291-1/+1
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* C++-ified the DSP32 code so Andrew has something modern to work from. Aaron Giles2011-01-285-2002/+2491
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* Completed the DSP16A disassembler. [Andrew Gardner] Andrew Gardner2011-01-261-37/+129
| | | | | | | | | | | Notes out of whatsnew.txt * It's sure to have bugs, but it should get the job done for now. * It's unbelievable how many typos (major or otherwise) docs like this have. * I haven't heard from s_bastian about making the ROM images available in the monkey project, but we'll have 'em up as soon as he pops up again. * Does anyone know of any hardware that incorporated one of these? I'm looking for things to disassemble in the meantime :).
* Naming cleanups. (no whatsnew) Curt Coder2011-01-252-209/+44
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* A new WE DSP16A cpu disassembler. [Andrew Gardner] Andrew Gardner2011-01-254-0/+872
| | | | | | | | | | | | | Notes out of whatsnew.txt * This uses modern devices, but has not been tested in a driver yet, so I may have done something wrong. I will fix it when the time comes. * 60% of the disassembler is complete. I will finish it over the next few days. * There are many similarities in execution to the dsp32, and the existing 32 code will come in handy when it's time to write the execution engine. * This thing is a pleasure compared to the dsp56k.
* Added the HCD62121 cpu to cpu.mak (used by MESS) Fabio Priuli2011-01-241-0/+15
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* arm7: Fix for "MOV LR, Rx" (where Rx bit 0 = 1) + "F800" situation. This ↵ Fabio Priuli2011-01-241-1/+1
| | | | | fixes the lockup in GBA "Golden Sun: The Lost Age". [Tim Schuerewegen] sync with latest MESS, before the fix got lost in source merging
* Cleanups and version bump.mame0141u1 Aaron Giles2011-01-2435-817/+817
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* hcd62121: Fixed some instructions. No whatsnew. Wilbert Pol2011-01-234-36/+100
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* NEC DSP updates [R. Belmont, byuu, Dr. Decapitator]: R. Belmont2011-01-233-125/+261
| | | | | | | | | | | | - Now supports uPD7725 and uPD96050 - Hooked up SNES common code to use uPD96050 for ST-010/011 - Removed ST-010 HLE simulation Non-whatsnew: ST-010 is also found in some ssv.c games so this will be hooked up there soon.
* Added M6504 CPU subtype and used it in allied.c driver (no whatsnew) Miodrag Milanovic2011-01-232-1/+17
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* Add SHOW_AARON_BUG as threatened (no whatsnew) R. Belmont2011-01-231-1/+18
| | | | | | | | | Instructions: - Enable SHOW_AARON_BUG and compile - Run any Naomi game with -debug (e.g. toyfight) - Step to the MOV.L at 00000018 - Thrill to an aligned 32-bit write causing 2 incorrect writes to a 32-bit handler, complete with wrong offset. The memory system appears to think the 32-bit handler is a 16-bit handler or something.
* ARM7 updates [Tim Schuerewegen]: R. Belmont2011-01-233-1/+14
| | | | | | - Fixed "MOV x, R15, LSL #y" form as tested by ARMWrestler - Added unimplemented Thumb MOV variant used by GBA Moto GP
* ARM7 updates [Tim Schuerewegen]: R. Belmont2011-01-223-17/+25
| | | | | | - Disable 26-bit back compatibility for ARM7 variants other than ARM7500 - Fix carry flag issue on add/subtract in ARM mode
* i8085.c: Fixed inte callback not being called when the IE flag was cleared ↵ Michaël Banaan Ananas2011-01-211-7/+7
| | | | after the CPU received an interrupt. This fixes interrupts in n8080.c helifire and spacelnc. [Qwi Jibo]
* M6801 changes: [Curt Coder] Curt Coder2011-01-212-279/+514
| | | | | - implemented port 3 strobed mode - fixed port writes some more
* toaplan2: Roberto Zandona2011-01-202-3/+13
| | | | | | -Found a few more fixeight opcodes, by matching code in the interrupt routines with batsugun [Alex Jackson] -Corrected fixeight V25 address map (the YM2151 and OKI6295 are at a different location than the other games) [Alex Jackson] -Preliminary implementation of V25/V35 port output [Alex Jackson]
* M6801 changes: [Curt Coder] Curt Coder2011-01-202-108/+203
| | | | | | - added operating mode enum - fixed port writes - implemented SCI status follower bits
* Simplified UML parameters, as follows: Aaron Giles2011-01-176-2233/+2192
| | | | | | | | | | | * immediates can be passed raw, no IMM() wrapper required (and it's gone now) * fixed integer registers now use constants I0,I1,I2,etc instead of IREG(0),... * same for float registers F0,F1,F2,etc instead of FREG(0) * dynamic integer/float regs use inline functions ireg(),freg() * MEM macro is now a lower-case inline function mem() One further change on the horizon is to remove the UML_* macros in favor of inlines.
* Move memory accessors into the near cache for x64. Aaron Giles2011-01-172-2/+4
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* Removed PPC_MMU_ENABLED flag (no whatsnew) Miodrag Milanovic2011-01-171-123/+106
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* Redo most of the DRC/backend support as C++ Aaron Giles2011-01-1721-16006/+15974
| | | | | | | | | | | | | | Yes, it is intentional that the x86/x64 backends compile everywhere. Backends are now derived from drcbe_interface and implement several required overrides. x86emit.h now uses namespaces so that the x86/x64 emitters can co-exist. New file uml.h/uml.c actually describes the UML language, separating out several concepts from drcuml.c. Lots of other changes/fixes.
* VC2008 compile fixes (no whatsnew) mariuszw12011-01-161-1/+1
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* added (but disabled) NMOS Z80 ld a,i/r quirk, see DIFF for info (no whatsnew) Michaël Banaan Ananas2011-01-161-2/+27
| | | btw: mlanding is playable if you enable it, but i believe it's just by luck since it posts "sound cpu error" later anyway
* Fixing warning (it was a typo). Fabio Priuli2011-01-161-1/+1
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* Delete needless file as per AWJ Angelo Salese2011-01-161-11/+0
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* Added a mostly complete NEC V25/V35 CPU core, added working sound to ↵ Angelo Salese2011-01-1611-845/+1092
| | | | Batsugun and hooked up proper V35-controlled interrupts in Cosmic Cop / Gallop and Kengo [Alex Jackson]
* SH4: Port preliminary SH3 support from DRC. [R. Belmont] R. Belmont2011-01-163-1/+32
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* SH4: cleanup and better common/interpreter separation [R. Belmont] R. Belmont2011-01-165-73/+189
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* Added FSAVE mode 2 support to the M68040 FPU. [Barry Rodewald] Curt Coder2011-01-151-1/+15
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* H8: Fix unterminated string buffer [R. Belmont, Belegdol] R. Belmont2011-01-142-4/+4
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* Fixed an ARM7 R15 bit ignoring behaviour while in ARM state, fixes Lupin the ↵ Angelo Salese2011-01-121-3/+11
| | | | Third: the Typing ARM crashing when you coin it up. [Tim Schuerewegen]
* Fixed handling 80186 instructions [Phill Harvey-Smith] Miodrag Milanovic2011-01-103-112/+135
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* Some HD61700 fixes from MESS (no whatsnew) Miodrag Milanovic2011-01-102-10/+10
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* MSVC compatibility. Aaron Giles2011-01-071-3/+3
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* Added HD61700 CPU core used for emulate Casio PB-1000/PB-2000c in MESS ↵ Miodrag Milanovic2011-01-064-0/+3704
| | | | [Sandro Ronco]