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* sh/sh7709s.cpp: Convert the cpu cycles to bus cycles properly (#15078) Jesus Ramos2026-03-102-76/+47
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* luxor/abc1600: Refactor the MAC into a 68008 MMU. Curt Coder2026-03-102-7/+48
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* cpu/sharc/compute.hxx: Fixed saturation without resorting to comparisons. Vas Crabb2026-03-101-1/+1
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* cpu/sharc/compute.hxx: Share interpreter code for some single ALU ops and ↵ Vas Crabb2026-03-103-400/+382
| | | | dual multiplier/ALU ops, be stricter about Rn vs Fn.
* cpu/sharc: More detailed emulation of floating point addition, subtraction ↵ Vas Crabb2026-03-101-91/+191
| | | | and COPYSIGN, and some minor optimisation, for interpreter.
* cpu/sharc: More ALU refinements for the interpreter: Vas Crabb2026-03-091-61/+85
| | | | | | * Set AOS on fixed point dual add/subtract overflow. * Handle corner cases better for floating point MIN, MAX and CLIP. * Cleaned up code for floating point COMP.
* cpu/sharc: Better ALU emulation for interpreter: Vas Crabb2026-03-094-391/+468
| | | | | | | | | * Implemented fixed-point ALU overflow sticky flag (AOS). * More accurate implementation of Fn = -Fx, Fn = ABS Fx and Fn = PASS Fx. * Implemented Rn = ABS Rx and Fn = ABS(Fx - Fy). * Sorted computer function declarations and definitions to match order of instruction listings in documentation.
* sh/sh7709s.cpp: Fix bug in DRC memory accessor using clobbered IO reg (#15074) Jesus Ramos2026-03-081-11/+22
| | | | | | | Fix a shift error in the wcr1 register values Add bcr2 plumbing for determining cache line fetch reads based off BCR2. Area 0 is set via external pins so hardcoding the cv1k value, this is typically code space though so it only affects timing during copy of code to main memory
* Missing emu.h Olivier Galibert2026-03-081-0/+1
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* cpu/sharc: Implemented saturation for ALU dual add/subtract in interpreter. Vas Crabb2026-03-081-18/+13
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* cpu/sharc: Fixed several interpreter issues: Vas Crabb2026-03-084-25/+82
| | | | | | * Fixed carry flag calculation for subtract with carry. * Implemented Rn = Rx + CI and Rn = Rx + CI - 1. * Rn = Rx + 1, Rn = Rx - 1 and Rn = -Rx should saturate the result.
* cpu/sharc/sharcdrc.cpp: Fixed Rn = Rx + CI - 1 ALU operation. Vas Crabb2026-03-081-2/+2
| | | | | Neglected to git add the change after copy/pasting complementary operation above.
* -cpu/sharc: More recompiler improvements: Vas Crabb2026-03-086-205/+221
| | | | | | | | | | | | | | | | | | | | * Implemented fixed point CLIP and add/subtract with carry for recompiler. * Cleaned up and de-duplicated code for setting ASTAT flags on fixed point ALU operationf for recompiler, and fixed AC flag for subract operations. * Optimised generated code for fixed point dual add subtrat, PASS and COMP for recompiler. * Reduced unnecessary ASTAT flag copies for recompiler and added more glue that will be needed for supporting saturating arithmetic. * Cleaned up fixed point COMP code for interpreter. -machine/microtch.cpp: Added the host interface microcontroller to make it easier to look at the program (disabled for now, will be emulated in the future). -video/vrender0.cpp: The inline qualifier implies internal linkage for free functions in C++ - there's no need for static.
* cpu/sh: Add cv1k SH7709S cache handling behavior for slowdown emulation (#15054) Jesus Ramos2026-03-074-38/+618
| | | | | | | | | | | | | * Add cv1k SH7709S cache handling behavior for slowdown emulation - Handles some basic caching for the sh7709s used for cv1k titles so that they run at more appropriate speeds * sh7709s.cpp: Fix up a couple of timing handling bugs - Use the writeback flag instead of write flag as the access to external memory is what matters for those - Fix up the writeback buffer timing, we don't need to precharge twice for writes. Also rolled up the command costs the SDRAM region handling so the writes only need to add trwl to the penalty - Check for burst mode availability when determining the base cycle cost, only burst ROM and sdram can use burst access to each other area requires 4 separate accesses * sh7709s.cpp: Add some comments explaining missing/unimplemented features - Add the non-burst timing table for WCR2 - Updates and adds a couple of extra comments related to the penalties/timing
* cpu/sharc: Implemented a bit more functionality and fixed bugs: Vas Crabb2026-03-0711-328/+535
| | | | | | | | | * Implemented short word sign extension. * Fixed DAG2 (PM) register display in debugger. * Track AF dependencies when analysing instructions. * Log analysed instructions when logging UML code. * Removed misplaced break in cpu/sharc/sharcfe.cpp. * cpu/uml.h: Let C functions take any pointer/reference parameter.
* st9: Fix operand disassembly for PUSH(U)W immediate ajrhacker2026-03-061-1/+1
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* cpu/drcbex64.cpp: Avoid unnecessarily changing SSE mode on SETFMOD and when ↵ Vas Crabb2026-03-061-18/+57
| | | | leaving recompiled code.
* cpu/sharc/compute.hxx: Fixed my dumb typo. Vas Crabb2026-03-061-1/+1
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* cpu/sharc: Implemented fixed point clip and saturating arithmetic in ↵ Matthew Daniels2026-03-063-47/+67
| | | | | | | interpreter. (#15055) * Corrected logic for generating carry/overflow flags in add-with-carry and subtract-with-borrow operations. * Corrected floating point clip calculation for Fx < 0. * Implemented the LT, LE, GE and GT conditions properly.
* cpu/drcbearm64.cpp: Fixed back-end getting confused about the rounding mode ↵ Vas Crabb2026-03-061-37/+37
| | | | on entry.
* More stuff mostly related to recompiling CPUs: Vas Crabb2026-03-0617-310/+416
| | | | | | | | | | | | | | | | cpu/drcbearm64.cpp: Don't set the rounding mode on SETFMOD if it hasn't changed. cpu/e132xs.cpp: Skip more unnecessary flag calculations, use pre-calculated PC for updating G0 in memory when possible, better analysis of pre-calculated PC values when delay slots are involved. cpu/sh: Cleaned up register dependency analysis logging, fixed an instruction analysis bug. cpu/sharc: Disassemble unimplemented instructions executed in recompiled code, include tag in more fatal errors, use throw syntax to make it cleared it's an early out.
* -cpu/e132xs: Allow recompiler to skip unused condition flag calculations. Vas Crabb2026-03-055-221/+523
| | | | | | * Also fixed some instruction analysis bugs. -cpu/drcbearm64.cpp: Reduced unnecessary rounding mode changes.
* -cpu/e132xs: Log analysed instructions in UML log when using recompiler. Vas Crabb2026-03-0518-866/+1100
| | | | | | | | | | | | -cpu/powerpc: Modernised recompiler front-end code, improved instruction analysis logging. -cpu/sh: Cleaned up instruction analysis logging a little -util/client_ws.hpp, util/server_ws_impl.hpp, capcom/cps2comm.cpp: Updated some use of deprecation ASIO APIs. -nakajima/nakajies.cpp: Use range-based loops.
* v60,v30mz: correction to addc/subc overflow flag calculation hap2026-03-046-135/+103
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* 6502: m_ify Olivier Galibert2026-03-0456-7398/+7398
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* -cpu/e132xs/e132xsfe.cpp Re-wrote E1 instruction analyser. Vas Crabb2026-03-045-1285/+1000
| | | | | | | | | | Reduced redundant code, track condition flag dependencies independently, fixed a number of bugs. -cpu/e132xsdrc_ops.hxx: Don't recalculate immediate values when generating code. -cpu/powerpc/ppcfe.cpp: End instruction sequences on encountering SC.
* i80186: Improve BOUND logging. Curt Coder2026-03-021-1/+1
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* i80186: Fix iRMX interrupt mode. [Curt Coder] Curt Coder2026-03-021-35/+71
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* i80186: BOUND is signed. [Curt Coder] Curt Coder2026-03-021-5/+6
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* i80186: The invalid opcode is a trap. [Curt Coder] Curt Coder2026-03-021-2/+0
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* i8086: initialize m_ea_timing table hap2026-03-025-34/+34
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* i86: correction to adc/sbb overflow flag calculation hap2026-03-023-74/+60
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* -cpu/powerpc: Fixed floating point comparison flags. Vas Crabb2026-03-026-30/+45
| | | | | | | | | * Fixes various things that were always broken with the C and ARM backends or worked by chance with the x86-64 and i686 back-end. * Also commented out some constexpr for now. -cpu/drcfe.h: Added some helpers. -cpu/sharc/sharcfe.cpp: Don't use memset to clear loop entries.
* cpu/nec: correct name after prev commit (subc, not subb) hap2026-03-023-21/+21
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* cpu/nec: correction to addc/subb overflow flag calculation hap2026-03-023-38/+44
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* drcfe.ipp: fix compile hap2026-03-021-1/+1
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* Allow recompiling CPU cores to define their own opcode descriptions. Vas Crabb2026-03-0254-3218/+4229
| | | | | | | | | | | | | | The base opcode description now only has the parts that are used by the base recompiler front-end. CPU cores are free to define their own extensions as they see fit without being limited to pre-defined fields. The base recompiler front-end is now a template, eliminating the virtual member functions. It no longer has any dependencies on libemu, which paves the way to decoupling the recompiler front-ends and allowing the instruction analysis to be tested without the rest of the emulator. Also added a compile-time option to disable ASTAT flag update elision in the SHARC recompiler, and fixed some recompiler front-end bugs.
* cpu/tms320c2x: Small optimisation and cleanup: [FlykeSpice] Vas Crabb2026-03-012-153/+112
| | | | | | | | | | | * Templated relevant member functions on ignore ARP hack avoiding a data member check. * Made IRQ cycles a local - it's never needed outside the scope where it's used. * Skip hold logic if hold read callback is unset. * Templated some member functions with simple variations. * namco/namcos21_dsp.cpp, namco/namcos21_dsp_c67.cpp: Don't hook up unused hold/ack.
* cpu/sharc: Hooked up flag outputs for the recompiler, push out flag latch ↵ Vas Crabb2026-02-263-118/+257
| | | | state when switching from input to output.
* kaneko/kaneko_grap2.cpp: Don't split initialisation between files; ↵ Vas Crabb2026-02-261-1/+1
| | | | cpu/sharc: Fixed build.
* cpu/sharc: Hooked up flag pin outputs for the interpreter. (#15020) Matthew Daniels2026-02-263-1/+16
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* Tidy some things. Vas Crabb2026-02-251-7/+7
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* tmp94c241: Implement DMA subsystem (HDMA + DMAR) and fix port reads (#15003) Felipe Corrêa da Silva Sanches2026-02-232-4/+342
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* i386: include the 486 cracyc2026-02-211-4/+1
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* i386: adjust cs for ppro+ cracyc2026-02-211-1/+4
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* i386: use the correct bits for dpl cracyc2026-02-211-1/+1
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* i386: fix smm cracyc2026-02-211-4/+5
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* srcclean and tidy Vas Crabb2026-02-224-59/+59
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* Miscellaneous fixes: Vas Crabb2026-02-211-0/+4
| | | | | | | | | * cpu/drcbec.cpp: Work around older clang that doesn't support the floating point environment access pragma. * machine/i8251.cpp, emu/audio_effects/reverb.cpp: Fixed uninitialised data accesses. * sega/model2.cpp: Use 8251 ready output line status rather than pretending to be able to read the status register asynchronously.
* finalizr: change mcu type to M58715, hap2026-02-201-3/+12
| | | | mcs48: update notes