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* src/devices/cpu: Remove #include "debugger.h" where no longer necessary AJR2022-04-061-1/+0
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* Debugger feature improvements AJR2022-03-271-17/+18
| | | | | | | | - Add 'gbt' and 'gbf' debugger commands to step until a true or false conditional branch has been detected. - Update over 100 of the disassemblers in MAME to output a new STEP_COND flag for all conditional branches. Besides being used for execution of the new 'gbt' and 'gbf' commands, this flag also now helps the debugger 'out' command to properly handle conditional return instructions. - Remove STEP_OVER from many instructions that aren't actually subroutine calls (e.g. DJNZ on Z80). A 'gni' debugger command (go next instruction) has been added to accommodate some of the misuse. - Add instruction flag support to several more disassemblers that lacked them entirely (e.g. st62xx) - Don't pass over delay slots for debugging in ASAP core
* Debugger-related feature removals and cleanup AJR2021-08-151-1/+0
| | | | | | | | - Remove the hotspot read tracker. This was never robustly implemented, but changes to the memory system made it much less useful, and the "speedup opportunities" which it aimed to determine are not very important from a current emulation standpoint. - Remove the CURSP/GENSP state symbol and the generic sp() getter. Stacking semantics vary too much between CPU architectures for this to be of much use. (A "SP" symbol has been added to a few CPU cores whose stack pointers were otherwise not being registered.) - Remove the cached pointer to device_state_interface and the state() fast accessor from device_t. Most users of device_state_interface either already had a pointer to the specific CPU device type or needed to check first for the presence of the interface. - Change the PC memory write tracker to use pcbase(), which works even when the instruction callback is masked out, instead of peeking at the PC history index. - Remove some obsolete watchpoint-related definitions from machine.h.
* Enable GCC implicit fallthrough warning. Vas Crabb2020-11-151-1/+1
| | | | | | I've guessed whether break or [[fallthrough]] is appropriate. In cases where it looked particularly suspicious, I added a FIXME comment. All of these changes should be reviewed by someone familiar with the code.
* z8: Fix reads from Ports 0 & 1; add Z86E02 type AJR2020-09-062-2/+19
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* z8: Add optional logging for SIO AJR2020-08-231-4/+28
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* z8: Add interface notes AJR2020-08-231-0/+9
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* z8: fixed bug in decimal adjust. Fixes PRINT 654 in bert. Robbbert2020-08-121-1/+1
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* New working machines hap2020-07-211-0/+1
| | | | | | | | | -------------------- CompuChess: The Second Edition [hap, Berger, Achim] New working clones ------------------ Chess Intercontinental Traveler [hap, Berger, Achim]
* z8: fix emumem regression (nw) hap2020-05-251-1/+1
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* emumem: A little more speedup. cache and specific change syntax, and are ↵ Olivier Galibert2020-05-253-42/+42
| | | | | | | | | | | | | | | | not pointers anymore [O. Galibert] The last(?) two changes are: - Add a template parameter to everything (theoretically the address space width, in practice a level derived from it to keep as much compatibility between widths as possible) so that the shift size becomes a constant. - Change the syntax of declaring and initializing the caches and specifics so that they're embedded in the owner device. Solves lifetime issues and also removes one indirection (looking up the base dispatch pointer through the cache/specific pointer).
* sweeten most of the remaining arrays of delegates (nw) Vas Crabb2020-02-072-8/+6
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* Make many device_execute_interface functions noexcept, including the ↵ AJR2019-11-091-6/+6
| | | | | | | | "information" overrides. This also covers several time-related functions in attotime, running_machine and emu_timer. (nw) m6805: Calculate min_cycles and max_cycles once at device_start time (Nw) attotime: Add as_khz and as_mhz (nw)
* z8: Fix calculation of half carry flag. Z8671 BASIC no longer prints "12" ↵ AJR2019-07-081-6/+8
| | | | when the result is 18.
* z8: Add register pairs to debug state AJR2019-04-062-30/+15
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* (nw) Clean up the mess on master Vas Crabb2019-03-263-103/+500
| | | | | | | | | | | | | This effectively reverts b380514764cf857469bae61c11143a19f79a74c5 and c24473ddff715ecec2e258a6eb38960cf8c8e98e, restoring the state at 598cd5227223c3b04ca31f0dbc1981256d9ea3ff. Before pushing, please check that what you're about to push is sane. Check your local commit log and ensure there isn't anything out-of-place before pushing to mainline. When things like this happen, it wastes everyone's time. I really don't need this in a week when real work™ is busting my balls and I'm behind where I want to be with preparing for MAME release.
* Revert "conflict resolution (nw)" andreasnaive2019-03-253-500/+103
| | | | | This reverts commit c24473ddff715ecec2e258a6eb38960cf8c8e98e, reversing changes made to 009cba4fb8102102168ef32870892438327f3705.
* z8: Write RRn instead of Rn when disassembling INCW/DECW AJR2019-02-031-1/+2
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* z8: Fix disassembly of LD IR, R opcode AJR2019-02-021-1/+1
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* z8: Split sio_tick into two functions (nw) AJR2019-01-212-23/+30
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* z8: Mask RP properly for debug register view (nw) AJR2019-01-201-2/+2
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* z8: Add standard_irq_callback for the sake of debugging (nw) AJR2019-01-191-0/+1
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* z8682: Provide Z8 test ROM from Zilog application note AJR2019-01-181-3/+2
| | | | (nw) First 18 bytes of this (the interrupt/reset bootstrap) are identical to the previous hand-crafted binary.
* amerihok: Slow down ADPCM chip to a much more reasonable speed AJR2019-01-181-1/+1
| | | | z8: Fix TOUT output (nw)
* z8: Preliminary UART emulation AJR2019-01-182-27/+174
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* z8: Handle more timer corner cases (nw) AJR2019-01-181-1/+17
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* z8: Rewrite timer emulation, including support for most TIN and TOUT modes AJR2019-01-182-85/+278
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* z8: Add Z8682 type with (fake) internal ROM; prevent timer from endlessly ↵ AJR2019-01-172-3/+36
| | | | thrashing with a count of 1
* z8: Fix typo in pre1_write (restores noise in amerihok); misc. minor ↵ AJR2018-12-092-4/+4
| | | | cleanups (nw)
* z8: Register overhaul AJR2018-12-083-341/+507
| | | | | | - Create address space for internal register file - Add port output registers to debug state - Lock out interrupts on reset until EI
* z8: Use devcb3 instead of MCFG_ macros (nw) AJR2018-11-181-36/+8
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* (nw) sm8500: fix line accidently deleted; z8 : when pc adjusted, move yellow bar Robbbert2018-10-131-3/+12
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* (nw) z8: allow step-over with djnz Robbbert2018-09-281-17/+17
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* srcclean (nw) Vas Crabb2018-09-231-1/+1
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* (nw) z8: fixed more bugs; jtc: fixed cassette, wave sound, added quickload Robbbert2018-09-202-17/+35
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* (nw) z8: fixed numerous bugs Robbbert2018-09-172-16/+21
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* (nw) z8 : added the DA instruction Robbbert2018-09-152-1/+19
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* (nw) z8: fixed JP @ and CALL @ instructions Robbbert2018-09-131-2/+2
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* (nw) z8: fixed detection of stack type; jtc: fixed display of jtces88 Robbbert2018-09-131-4/+4
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* Add dump of preprogrammed Z8671 MCU with BASIC/DEBUG interpreter AJR2018-07-112-13/+46
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* devcb3 Vas Crabb2018-07-071-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are multiple issues with the current device callbacks: * They always dispatch through a pointer-to-member * Chained callbacks are a linked list so the branch unit can't predict the early * There's a runtime decision made on the left/right shift direction * There are runtime NULL checks on various objects * Binding a lambda isn't practical * Arbitrary transformations are not supported * When chaining callbacks it isn't clear what the MCFG_DEVCB_ modifiers apply to * It isn't possible to just append to a callback in derived configuration * The macros need a magic, hidden local called devcb * Moving code that uses the magic locals around is error-prone * Writing the MCFG_ macros to make a device usable is a pain * You can't discover applicable MCFG_ macros with intellisense * Macros are not scoped * Using an inappropriate macro isn't detected at compile time * Lots of other things This changeset overcomes the biggest obstacle to remving MCFG_ macros altogether. Essentially, to allow a devcb to be configured, call .bind() and expose the result (a bind target for the callback). Bind target methods starting with "set" repace the current callbacks; methods starting with "append" append to them. You can't reconfigure a callback after resolving it. There's no need to use a macro matching the handler signatures - use FUNC for everything. Current device is implied if no tag/finder is supplied (no need for explicit this). Lambdas are supported, and the memory space and offset are optional. These kinds of things work: * .read_cb().set([this] () { return something; }); * .read_cb().set([this] (offs_t offset) { return ~offset; }); * .write_cb().set([this] (offs_t offset, u8 data) { m_array[offset] = data; }); * .write_cb().set([this] (int state) { some_var = state; }); Arbitrary transforms are allowed, and they can modify offset/mask for example: * .read_cb().set(FUNC(my_state::handler)).transform([] (u8 data) { return bitswap<4>(data, 1, 3, 0, 2); }); * .read_cb().set(m_dev, FUNC(some_device::member)).transform([] (offs_t &offset, u8 data) { offset ^= 3; return data; }); It's possible to stack arbitrary transforms, at the cost of compile time (the whole transform stack gets inlined at compile time). Shifts count as an arbitrary transform, but mask/exor does not. Order of mask/shift/exor now matters. Modifications are applied in the specified order. These are NOT EQUIVALENT: * .read_cb().set(FUNC(my_state::handler)).mask(0x06).lshift(2); * .read_cb().set(FUNC(my_state::handler)).lshift(2).mask(0x06); The bit helper no longer reverses its behaviour for read callbacks, and I/O ports are no longer aware of the field mask. Binding a read callback to no-op is not supported - specify a constant. The GND and VCC aliases have been removed intentionally - they're TTL-centric, and were already being abused. Other quirks have been preserved, including write logger only logging when the data is non-zero (quite unhelpful in many of the cases where it's used). Legacy syntax is still supported for simple cases, but will be phased out. New devices should not have MCFG_ macros. I don't think I've missed any fundamental issues, but if I've broken something, let me know.
* diexec: Interrupt API changes (nw) AJR2018-05-181-0/+1
| | | | | | - PULSE_LINE is no longer a value. Existing uses have been changed to pulse_input_line with attotime::zero as the second argument. - Formerly only INPUT_LINE_NMI and INPUT_LINE_RESET were allowed with PULSE_LINE. INPUT_LINE_NMI no longer receives special handling; instead, CPU devices must specify which of their input lines are edge-triggered and thus may be used with zero-width pulses by overriding the execute_input_edge_triggered predicate. INPUT_LINE_RESET is still special-cased, however. - execute_default_irq_vector now allows a different default vector to be specified for each input line. This added flexibility may or may not prove useful.
* emumem: Rename direct_read_handler to memory_access_cache. Parametrize the ↵ Olivier Galibert2018-05-113-8/+8
| | | | template on more information (data width, endianness) to make it possible to turn it into an handler cache eventually, and not just a memory block cache. Make it capable of large and unaligned accesses. [O. Galibert]
* maps: Finish devices/cpu (nw) Olivier Galibert2018-04-201-6/+8
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* Reshuffle some stuff: Vas Crabb2018-03-281-2/+2
| | | | | | * Move around the debugger hooks to get a small but measurable performance increase * Remove emucore from external tools * Improve performance of DSP16 interpreter a little by generating six variants of execution loop
* don't pass so many naked pointers around (nw) Vas Crabb2018-03-252-3/+3
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* Blind faith fixed long names for almost all CPUs (nw) angelosa2018-03-151-3/+3
| | | | mb86235.cpp: renamed pcs_ptr into pcp, and added a file for future interpreter core (nw)
* destaticify initializations (nw) (#3289) wilbertpol2018-03-041-15/+13
| | | | | | * destaticify initializations (nw) * fix this->set_screen (nw)
* z8: Make address spaces big-endian AJR2018-02-211-4/+4
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* API change: Memory maps are now methods of the owner class [O. Galibert] Olivier Galibert2018-02-122-10/+10
| | | | | Also, a lot more freedom happened, that's going to be more visible soon.