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path: root/src/devices/cpu/z180/z180.cpp
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* cpu/z180/z180.cpp: Fix filename in comment (#13555) cam9002025-04-031-1/+1
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* diexec: Add callback to allow debugger to break into the middle of wait-type ↵ AJR2024-11-171-7/+13
| | | | | | | | | | instructions whose execution time is normally indefinite. When this happens, a special message may be printed to the debug console stating the location of the last actual instruction executed before the wait (if there was one). Note that since the callback ignores the current value of the program counter, this special type of debugger break cannot be entered through breakpoints or instruction stepping commands. The callback also leaves no effect on PC history tracking or trace logs. * cpu/hd61700, cpu/tms32031: Add standard IRQ callback * cpu/m68000gen.py: Change name of invoked executable to bin/python3 * cpu/m6809: Eliminate PC "massaging" for SYNC and similar instructions
* tlcs90: small spacing cleanup, remove execute_burn altogether (renamed but ↵ hap2024-09-201-4/+3
| | | | | | keeping it in z180 after seeing TODO note), kl1839vm1: execute_input_lines getter was removed from mame
* emu/devcb.h: Eliminated the need to call resolve() on callbacks. (#11333) Vas Crabb2023-06-171-6/+0
| | | | | | | | | | | | Read callbacks now need a default return value supplied at construction. Replaced isnull() with isunset() which tells you if the callback wasn't configured rather than whether it isn't safe to call. Enabled validation of device callbacks (it seems it was disabled at some point, probably accidentally). Device callbacks and object finders now implement the same interface for resolution.
* dimemory: Add the target address space to translate, wrap the constants Olivier Galibert2023-03-181-1/+2
| | | | divtlb: Wrap the constants
* cpu/z180: Added CSIO emulation. [Vas Crabb, Sandro Ronco] Vas Crabb2023-03-111-32/+50
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* Z180 ASCI (#9762) Miodrag Milanović2022-06-061-212/+44
| | | | | | | | | | | New working machines ----------------------------------- Micromint SB180 [Miodrag Milanovic] -z180: implemented ASCI serial communication [Miodrag Milanovic] -tim011: hookup serial keyboard [Miodrag Milanovic] -20pacgal: Add support for terminal
* -tim011.cpp: Hooked up floppy drives properly. (#9649) Miodrag Milanović2022-05-021-0/+16
| | | | | | | | * Hooked up floppy drives and controller properly, and implemented video display. * formats/tim011_dsk.cpp: Added TIM 011 floppy image format. -machine/upd765.cpp: If waiting for additional command bytes, treat a data register read as an open bus write (tested on real hardware) and always trigger the DRQ line even if in nodma mode. [Carl -cpu/z180: Added callbacks for tend; decrement bcr1 when DMA channel 1 is active. [Carl]
* src/devices/cpu: Remove #include "debugger.h" where no longer necessary AJR2022-04-061-1/+0
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* Debugger-related feature removals and cleanup AJR2021-08-151-1/+0
| | | | | | | | - Remove the hotspot read tracker. This was never robustly implemented, but changes to the memory system made it much less useful, and the "speedup opportunities" which it aimed to determine are not very important from a current emulation standpoint. - Remove the CURSP/GENSP state symbol and the generic sp() getter. Stacking semantics vary too much between CPU architectures for this to be of much use. (A "SP" symbol has been added to a few CPU cores whose stack pointers were otherwise not being registered.) - Remove the cached pointer to device_state_interface and the state() fast accessor from device_t. Most users of device_state_interface either already had a pointer to the specific CPU device type or needed to check first for the presence of the interface. - Change the PC memory write tracker to use pcbase(), which works even when the instruction callback is masked out, instead of peeking at the PC history index. - Remove some obsolete watchpoint-related definitions from machine.h.
* hd647180x: Eliminate data space and instead map internal RAM into program ↵ AJR2021-03-171-10/+0
| | | | space using memory view
* z180: Updates AJR2020-08-121-47/+42
| | | | | | - Correct FRC counting rate and direction - Run programmable reload timer off FRC - Emulate a subtle difference from Z80 behavior in fetching opcode after DD CB or FD CB
* emumem: A little more speedup. cache and specific change syntax, and are ↵ Olivier Galibert2020-05-251-13/+12
| | | | | | | | | | | | | | | | not pointers anymore [O. Galibert] The last(?) two changes are: - Add a template parameter to everything (theoretically the address space width, in practice a level derived from it to keep as much compatibility between widths as possible) so that the shift size becomes a constant. - Change the syntax of declaring and initializing the caches and specifics so that they're embedded in the owner device. Solves lifetime issues and also removes one indirection (looking up the base dispatch pointer through the cache/specific pointer).
* z8s180: Fix segmentation fault due to oversight in last commit (nw) AJR2020-03-221-0/+2
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* z8s180: Internalize certain registers; make clock divider software-selectable AJR2020-03-221-165/+156
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* z180: Reduce logical address width to 16 bits AJR2019-10-021-2/+2
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* z180: Minor technical correction to note (nw) AJR2019-10-021-1/+1
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* Add internal clock divider for Z180 family and adjust CPU clocks in many ↵ AJR2019-10-021-6/+10
| | | | drivers to compensate
* hd64180rp: Fix major address space configuration error (nw) AJR2019-09-301-4/+4
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* Split generic Z180 device into several subtypes. HD647180X now has specific ↵ AJR2019-09-301-39/+83
| | | | device emulation for the internal PROM, RAM and parallel ports.
* z180: Fixed verbose logging (nw) Nigel Barnes2019-08-221-6/+6
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* z180: Fix copy-and-paste error (nw) AJR2019-06-171-1/+1
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* z180: Separate out internal registers by function; get rid of a lot of ↵ AJR2019-06-171-1013/+628
| | | | not-so-useful macros (nw)
* "hardware" typo corrections (nw) Scott Stone2019-03-301-1/+1
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* srcclean and manual fixup (nw) Vas Crabb2018-08-261-4/+4
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* Z180: CSIO Flags & FRC implementation (#3882) grullosgo2018-08-231-3/+4
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* emumem: Rename direct_read_handler to memory_access_cache. Parametrize the ↵ Olivier Galibert2018-05-111-2/+2
| | | | template on more information (data width, endianness) to make it possible to turn it into an handler cache eventually, and not just a memory block cache. Make it capable of large and unaligned accesses. [O. Galibert]
* Reshuffle some stuff: Vas Crabb2018-03-281-4/+4
| | | | | | * Move around the debugger hooks to get a small but measurable performance increase * Remove emucore from external tools * Improve performance of DSP16 interpreter a little by generating six variants of execution loop
* don't pass so many naked pointers around (nw) Vas Crabb2018-03-251-2/+2
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* Blind faith fixed long names for almost all CPUs (nw) angelosa2018-03-151-1/+1
| | | | mb86235.cpp: renamed pcs_ptr into pcp, and added a file for future interpreter core (nw)
* emumem: API change [O. Galibert] Olivier Galibert2017-11-291-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * direct_read_data is now a template which takes the address bus shift as a parameter. * address_space::direct<shift>() is now a template method that takes the shift as a parameter and returns a pointer instead of a reference * the address to give to {read|write}_* on address_space or direct_read_data is now the address one wants to access Longer explanation: Up until now, the {read|write}_* methods required the caller to give the byte offset instead of the actual address. That's the same on byte-addressing CPUs, e.g. the ones everyone knows, but it's different on the word/long/quad addressing ones (tms, sharc, etc...) or the bit-addressing one (tms340x0). Changing that required templatizing the direct access interface on the bus addressing granularity, historically called address bus shift. Also, since everybody was taking the address of the reference returned by direct(), and structurally didn't have much choice in the matter, it got changed to return a pointer directly. Longest historical explanation: In a cpu core, the hottest memory access, by far, is the opcode fetching. It's also an access with very good locality (doesn't move much, tends to stay in the same rom/ram zone even when jumping around, tends not to hit handlers), which makes efficient caching worthwhile (as in, 30-50% faster core iirc on something like the 6502, but that was 20 years ago and a number of things changed since then). In fact, opcode fetching was, in the distant past, just an array lookup indexed by pc on an offset pointer, which was updated on branches. It didn't stay that way because more elaborate access is often needed (handlers, banking with instructions crossing a bank...) but it still ends up with a frontend of "if the address is still in the current range read from pointer+address otherwise do the slowpath", e.g. two usually correctly predicted branches plus the read most of the time. Then the >8 bits cpus arrived. That was ok, it just required to do the add to a u8 *, then convert to a u16/u32 * and do the read. At the asm level, it was all identical except for the final read, and read_byte/word/long being separate there was no test (and associated overhead) added in the path. Then the word-addressing CPUs arrived with, iirc, the tms cpus used in atari games. They require, to read from the pointer, to shift the address, either explicitely, or implicitely through indexing a u16 *. There were three possibilities: 1- create a new read_* method for each size and granularity. That amounts to a lot of copy/paste in the end, and functions with identical prototypes so the compiler can't detect you're using the wrong one. 2- put a variable shift in the read path. That was too expensive especially since the most critical cpus are byte-addressing (68000 at the time was the key). Having bit-adressing cpus which means the shift can either be right or left depending on the variable makes things even worse. 3- require the caller to do the shift himself when needed. The last solution was chosen, and starting that day the address was a byte offset and not the real address. Which is, actually, quite surprising when writing a new cpu core or, worse, when using the read/write methods from the driver code. But since then, C++ happened. And, in particular, templates with non-type parameters. Suddendly, solution 1 can be done without the copy/paste and with different types allowing to detect (at runtime, but systematically and at startup) if you got it wrong, while still generating optimal code. So it was time to switch to that solution and makes the address parameter sane again. Especially since it makes mucking in the rest of the memory subsystem code a lot more understandable.
* Merge pull request #2850 from BartmanAbyss/master R. Belmont2017-11-261-6/+25
|\ | | | | z180: fixed Z180_RCR_REFW; support Wait State Generator (DCNTL)
| * z180: fixed Z180_RCR_REFW; support Wait State Generator (DCNTL) bwodok2017-11-261-7/+26
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* | dvdisasm: Overhaul [O. Galibert] Olivier Galibert2017-11-261-5/+3
| | | | | | | | | | | | | | | | Disassemblers are now independant classes. Not only the code is cleaner, but unidasm has access to all the cpu cores again. The interface to the disassembly method has changed from byte buffers to objects that give a result to read methods. This also adds support for lfsr and/or paged PCs.
* | get rid of some "auto" (nw) hap2017-11-211-3/+3
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* This is too contentious, please put it up for review Vas Crabb2017-08-011-2/+2
| | | | | | Revert "Changes to debugger memory address translation" This reverts commit bb0964f9a284b15851773f5428bd602ca01cc28b.
* Changes to debugger memory address translation AJR2017-08-011-2/+2
| | | | | | - memory_translate now returns an address space number rather a boolean flag, permitting addresses in part of one space to map to an entirely different space. This is primarily intended to help MCUs which have blocks of internal memory that can be dynamically remapped, but may also allow for more accurate emulation of MMUs that drive multiple external address spaces, since the old limit of four address spaces per MAME device has been lifted. - memory_translate has also been made a const method, in spite of a couple of badly behaved CPU cores that can't honestly treat it as one. - The (read|write)_(byte|word|dword|qword|memory|opcode) accessors have been transferred from debugger_cpu to device_memory_interface, with somewhat modified arguments corresponding to the translate function it calls through to if requested.
* make device_memory_interface slightly less of a special case, use a typedef ↵ Vas Crabb2017-07-101-3/+3
| | | | to avoid nested templates everywhere (nw)
* dimemory: Lift the cap on the number of address spaces per device [O. Galibert] Olivier Galibert2017-07-031-9/+13
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* Rename AS_DECRYPTED_OPCODES to AS_OPCODES [O. Galibert] Olivier Galibert2017-07-031-2/+2
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* Move static data out of devices into the device types. This is a ↵ Vas Crabb2017-05-141-155/+154
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | significant change, so please pay attention. The core changes are: * Short name, full name and source file are no longer members of device_t, they are part of the device type * MACHINE_COFIG_START no longer needs a driver class * MACHINE_CONFIG_DERIVED_CLASS is no longer necessary * Specify the state class you want in the GAME/COMP/CONS line * The compiler will work out the base class where the driver init member is declared * There is one static device type object per driver rather than one per machine configuration Use DECLARE_DEVICE_TYPE or DECLARE_DEVICE_TYPE_NS to declare device type. * DECLARE_DEVICE_TYPE forward-declares teh device type and class, and declares extern object finders. * DECLARE_DEVICE_TYPE_NS is for devices classes in namespaces - it doesn't forward-declare the device type. Use DEFINE_DEVICE_TYPE or DEFINE_DEVICE_TYPE_NS to define device types. * These macros declare storage for the static data, and instantiate the device type and device finder templates. The rest of the changes are mostly just moving stuff out of headers that shouldn't be there, renaming stuff for consistency, and scoping stuff down where appropriate. Things I've actually messed with substantially: * More descriptive names for a lot of devices * Untangled the fantasy sound from the driver state, which necessitates breaking up sound/flip writes * Changed DECO BSMT2000 ready callback into a device delegate * Untangled Microprose 3D noise from driver state * Used object finders for CoCo multipak, KC85 D002, and Irem sound subdevices * Started to get TI-99 stuff out of the TI-990 directory and arrange bus devices properly * Started to break out common parts of Samsung ARM SoC devices * Turned some of FM, SID, SCSP DSP, EPIC12 and Voodoo cores into something resmbling C++ * Tried to make Z180 table allocation/setup a bit safer * Converted generic keyboard/terminal to not use WRITE8 - space/offset aren't relevant * Dynamically allocate generic terminal buffer so derived devices (e.g. teleprinter) can specify size * Imporved encapsulation of Z80DART channels * Refactored the SPC7110 bit table generator loop to make it more readable * Added wrappers for SNES PPU operations so members can be made protected * Factored out some boilerplate for YM chips with PSG * toaplan2 gfx * stic/intv resolution * Video System video * Out Run/Y-board sprite alignment * GIC video hookup * Amstrad CPC ROM box members * IQ151 ROM cart region * MSX cart IRQ callback resolution time * SMS passthrough control devices starting subslots I've smoke-tested several drivers, but I've probably missed something. Things I've missed will likely blow up spectacularly with failure to bind errors and the like. Let me know if there's more subtle breakage (could have happened in FM or Voodoo). And can everyone please, please try to keep stuff clean. In particular, please stop polluting the global namespace. Keep things out of headers that don't need to be there, and use things that can be scoped down rather than macros. It feels like an uphill battle trying to get this stuff under control while more of it's added.
* Fix obvious type detected by Coverity, thanks Coverity Olivier Galibert2017-04-281-1/+1
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* z180: added support for DREQ, TEND signals; fixed dma0 count, DREQ handling ↵ BartmanAbyss2017-04-251-12/+45
| | | | (#2256)
* srcclean (nw) Vas Crabb2017-03-261-10/+10
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* z180: DMA fixes [R. Belmont] arbee2017-03-051-11/+29
| | | | | - Count of 0 means 0x10000, as with other DMA controllers - Fixed scheduling so burst mode DMA is always serviced immediately with no CPU ops interleaved
* Comment correction (nw) AJR2017-03-051-2/+2
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* Correct MMOD bit for Z180 DMA AJR2017-03-051-3/+3
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* Self-registering devices prep: Vas Crabb2017-02-271-1/+1
| | | | | | | | | | | | | | * Make device_creator a variable template and get rid of the ampersands * Remove screen.h and speaker.h from emu.h and add where necessary * Centralise instantiations of screen and speaker finder templates * Add/standardise #include guards in many hearers * Remove many redundant #includes * Order #includesr to help catch headers that can't be #included alone (nw) This changes #include order to be prefix, unit header if applicable then other stuff roughly in order from most dependent to least dependent library. This helps catch headers that don't #include things that they use.
* Changed disassembler infrastructure to not use char buffers internally Nathan Woods2016-11-201-2/+2
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* NOTICE (TYPE NAME CONSOLIDATION) Miodrag Milanovic2016-10-221-20/+20
| | | | | Use standard uint64_t, uint32_t, uint16_t or uint8_t instead of UINT64, UINT32, UINT16 or UINT8 also use standard int64_t, int32_t, int16_t or int8_t instead of INT64, INT32, INT16 or INT8