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* that should be the rest of the devcb arrays switched to new syntax (nw) Vas Crabb2020-02-084-12/+12
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* Make many device_execute_interface functions noexcept, including the ↵ AJR2019-11-094-24/+27
| | | | | | | | "information" overrides. This also covers several time-related functions in attotime, running_machine and emu_timer. (nw) m6805: Calculate min_cycles and max_cycles once at device_start time (Nw) attotime: Add as_khz and as_mhz (nw)
* Make devdelegate more like devcb for configuration. This is a Vas Crabb2019-10-261-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fundamental change to show device delegates are configured. Device delegates are now aware of the current device during configuration and will resolve string tags relative to it. This means that device delegates need a device to be supplied on construction so they can find the machine configuration object. There's a one-dimensional array helper to make it easier to construct arrays of device delegates with the same owner. (I didn't make an n-dimensional one because I didn't hit a use case, but it would be a simple addition.) There's no more bind_relative_to member - just call resolve() like you would for a devcb. There's also no need to cast nullptr when creating a late bind device delegate. The flip side is that for an overloaded or non-capturing lambda you'll need to cast to the desired type. There is one less conditional branch in the hot path for calls for delegates bound to a function pointer of member function pointer. This comes at the cost of one additional unconditional branch in the hot path for calls to delegates bound to functoids (lambdas, functions that don't take an object reference, other callable objects). This applies to all delegates, not just device delegates. Address spaces will now print an error message if a late bind error is encountered while installing a handler. This will give the range and address range, hopefully making it easier to guess which memory map is faulty. For the simple case of allowing a device_delegate member to be configured, use a member like this: template <typename... T> void set_foo(T &&...args) { m_foo_cb.set(std::forward<T>(args)...); } For a case where different delegates need to be used depending on the function signature, see src/emu/screen.h (the screen update function setters). Device delegates now take a target specification and function pointer. The target may be: * Target omitted, implying the current device being configured. This can only be used during configuration. It will work as long as the current device is not removed/replaced. * A tag string relative to the current device being configured. This can only be used during configuration. It will not be callable until .resolve() is called. It will work as long as the current device is not removed/replaced. * A device finder (required_device/optional_device). The delegate will late bind to the current target of the device finder. It will not be callable until .resolve() is called. It will work properly if the target device is replaced, as long as the device finder's base object isn't removed/replaced. * A reference to an object. It will be callable immediately. It will work as long as the target object is not removed/replaced. The target types and restrictions are pretty similar to what you already have on object finders and devcb, so it shouldn't cause any surprises. Note that dereferencing a device finder will changes the effect. To illustrate this: ... required_device<some_device> m_dev; ... m_dev(*this, "dev") ... // will late bind to "dev" relative to *this // will work if "dev" hasn't been created yet or is replaced later // won't work if *this is removed/replaced // won't be callable until resolve() is called cb1.set(m_dev, FUNC(some_device::w)); ... // will bind to current target of m_dev // will not work if m_dev is not resolved // will not work if "dev" is replaced later // will be callable immediately cb2.set(*m_dev, FUNC(some_device::w)); ... The order of the target and name has been reversed for functoids (lambdas and other callable objects). This allows the NAME macro to be used on lambdas and functoids. For example: foo.set_something(NAME([this] (u8 data) { m_something = data; })); I realise the diagnostic messages get ugly if you use NAME on a large lambda. You can still give a literal name, you just have to place it after the lambda rather than before. This is uglier, but it's intentional. I'm trying to drive developers away from a certain style. While it's nice that you can put half the driver code in the memory map, it detracts from readability. It's hard to visualise the memory range mappings if the memory map functions are punctuated by large lambdas. There's also slightly higher overhead for calling a delegate bound to a functoid. If the code is prettier for trivial lambdas but uglier for non-trivial lambdas in address maps, it will hopefully steer people away from putting non-trivial lambdas in memory maps. There were some devices that were converted from using plain delegates without adding bind_relative_to calls. I fixed some of them (e.g. LaserDisc) but I probably missed some. These will likely crash on unresolved delegate calls. There are some devices that reset delegates at configuration complete or start time, preventing them from being set up during configuration (e.g. src/devices/video/ppu2c0x.cpp and src/devices/machine/68307.cpp). This goes against the design principles of how device delegates should be used, but I didn't change them because I don't trust myself to find all the places they're used. I've definitely broken some stuff with this (I know about asterix), so report issues and bear with me until I get it all fixed.
* srcclean (nw) Vas Crabb2019-10-261-1/+1
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* mw8080.cpp: add explosion lamps to internal artwork for seawolf (nw) Vas Crabb2019-10-111-2/+8
| | | | other misc cleanup (nw)
* Add HD6805U1 type for future use (nw) AJR2019-09-262-0/+18
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* m68hc05l9: Add (somewhat provisional) model-specific register names (nw) AJR2019-09-191-2/+15
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* m68hc05: Update notes (nw) AJR2019-08-031-5/+8
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* Add very preliminary MC68HC705J1A device for potgoldu580 (nw) AJR2019-08-012-0/+93
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* m6805: Eliminate the generic m6805_device type (nw) AJR2019-07-122-23/+0
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* m6805: Allow vectors to be placed at an internal boundary other than the end ↵ AJR2019-07-125-7/+33
| | | | | | of the address space (nw) geniusjr.cpp: Minor note and formatting fix (nw)
* comquest: CPU type identified (nw) AJR2019-07-122-1/+101
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* geniusjr.cpp: Switch to more likely HC05 type, at least for gj4000 (nw) AJR2019-07-122-2/+100
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* m6805: flag fix (nw) Patrick Mackinlay2019-06-041-1/+1
| | | | CLRX doesn't clear the carry flag.
* m68705: fix prescaler update (nw) Patrick Mackinlay2019-05-051-1/+1
| | | | Restore the proper behaviour of the timer.
* m68705: Prevent registration of illegal debug states for nonexistent port ↵ AJR2019-05-041-4/+6
| | | | | | latches/DDRs distate: Sanity check (nw)
* m68705: Use NVI for internal map to prevent segmentation fault (nw) AJR2019-04-152-24/+25
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* Fix clang error: unused variable 'M6805_VECTOR_INT2' ↵ AJR2019-04-151-6/+8
| | | | [-Werror,-Wunused-const-variable] (nw)
* m68705: added other hmos variants Patrick Mackinlay2019-04-152-392/+538
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* -keyboard/a1200, changela, goldnpkr, m68705prg, mexico86, pipeline, pitnrun, ↵ mooglyguy2018-12-143-67/+15
| | | | | | | | | | qix, quizpun2, stfight, tigeroad: Removed MACHINE_CONFIG. [Ryan Holtz] -m68705, m68hc05: Removed MCFG. [Ryan Holtz] -qix: First-pass cleanup. [Ryan Holtz] -core: Fixed spelling of "nonexistent". [Ryan Holtz]
* -pia6821: Removed MCFG and old devcb. [Ryan Holtz] mooglyguy2018-08-101-0/+7
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* devcb3 Vas Crabb2018-07-072-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are multiple issues with the current device callbacks: * They always dispatch through a pointer-to-member * Chained callbacks are a linked list so the branch unit can't predict the early * There's a runtime decision made on the left/right shift direction * There are runtime NULL checks on various objects * Binding a lambda isn't practical * Arbitrary transformations are not supported * When chaining callbacks it isn't clear what the MCFG_DEVCB_ modifiers apply to * It isn't possible to just append to a callback in derived configuration * The macros need a magic, hidden local called devcb * Moving code that uses the magic locals around is error-prone * Writing the MCFG_ macros to make a device usable is a pain * You can't discover applicable MCFG_ macros with intellisense * Macros are not scoped * Using an inappropriate macro isn't detected at compile time * Lots of other things This changeset overcomes the biggest obstacle to remving MCFG_ macros altogether. Essentially, to allow a devcb to be configured, call .bind() and expose the result (a bind target for the callback). Bind target methods starting with "set" repace the current callbacks; methods starting with "append" append to them. You can't reconfigure a callback after resolving it. There's no need to use a macro matching the handler signatures - use FUNC for everything. Current device is implied if no tag/finder is supplied (no need for explicit this). Lambdas are supported, and the memory space and offset are optional. These kinds of things work: * .read_cb().set([this] () { return something; }); * .read_cb().set([this] (offs_t offset) { return ~offset; }); * .write_cb().set([this] (offs_t offset, u8 data) { m_array[offset] = data; }); * .write_cb().set([this] (int state) { some_var = state; }); Arbitrary transforms are allowed, and they can modify offset/mask for example: * .read_cb().set(FUNC(my_state::handler)).transform([] (u8 data) { return bitswap<4>(data, 1, 3, 0, 2); }); * .read_cb().set(m_dev, FUNC(some_device::member)).transform([] (offs_t &offset, u8 data) { offset ^= 3; return data; }); It's possible to stack arbitrary transforms, at the cost of compile time (the whole transform stack gets inlined at compile time). Shifts count as an arbitrary transform, but mask/exor does not. Order of mask/shift/exor now matters. Modifications are applied in the specified order. These are NOT EQUIVALENT: * .read_cb().set(FUNC(my_state::handler)).mask(0x06).lshift(2); * .read_cb().set(FUNC(my_state::handler)).lshift(2).mask(0x06); The bit helper no longer reverses its behaviour for read callbacks, and I/O ports are no longer aware of the field mask. Binding a read callback to no-op is not supported - specify a constant. The GND and VCC aliases have been removed intentionally - they're TTL-centric, and were already being abused. Other quirks have been preserved, including write logger only logging when the data is non-zero (quite unhelpful in many of the cases where it's used). Legacy syntax is still supported for simple cases, but will be phased out. New devices should not have MCFG_ macros. I don't think I've missed any fundamental issues, but if I've broken something, let me know.
* as if millions of this pointers suddenly cried out in terror, and were ↵ Vas Crabb2018-06-082-63/+63
| | | | | | | suddenly silenced * streamline templates in addrmap.h * get rid of overloads on read/write member names - this will become even more important in the near future
* diexec: Interrupt API changes (nw) AJR2018-05-182-2/+4
| | | | | | - PULSE_LINE is no longer a value. Existing uses have been changed to pulse_input_line with attotime::zero as the second argument. - Formerly only INPUT_LINE_NMI and INPUT_LINE_RESET were allowed with PULSE_LINE. INPUT_LINE_NMI no longer receives special handling; instead, CPU devices must specify which of their input lines are edge-triggered and thus may be used with zero-width pulses by overriding the execute_input_edge_triggered predicate. INPUT_LINE_RESET is still special-cased, however. - execute_default_irq_vector now allows a different default vector to be specified for each input line. This added flexibility may or may not prove useful.
* emumem: Rename direct_read_handler to memory_access_cache. Parametrize the ↵ Olivier Galibert2018-05-112-4/+4
| | | | template on more information (data width, endianness) to make it possible to turn it into an handler cache eventually, and not just a memory block cache. Make it capable of large and unaligned accesses. [O. Galibert]
* maps: Finish devices/cpu (nw) Olivier Galibert2018-04-202-112/+118
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* Reshuffle some stuff: Vas Crabb2018-03-281-2/+2
| | | | | | * Move around the debugger hooks to get a small but measurable performance increase * Remove emucore from external tools * Improve performance of DSP16 interpreter a little by generating six variants of execution loop
* don't pass so many naked pointers around (nw) Vas Crabb2018-03-256-24/+24
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* Blind faith fixed long names for almost all CPUs (nw) angelosa2018-03-153-10/+10
| | | | mb86235.cpp: renamed pcs_ptr into pcp, and added a file for future interpreter core (nw)
* destaticify initializations (nw) (#3289) wilbertpol2018-03-042-28/+23
| | | | | | * destaticify initializations (nw) * fix this->set_screen (nw)
* Grammar police (nw) Olivier Galibert2018-02-241-7/+7
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* API change: Memory maps are now methods of the owner class [O. Galibert] Olivier Galibert2018-02-126-28/+28
| | | | | Also, a lot more freedom happened, that's going to be more visible soon.
* emumem: API change [O. Galibert] Olivier Galibert2017-11-292-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * direct_read_data is now a template which takes the address bus shift as a parameter. * address_space::direct<shift>() is now a template method that takes the shift as a parameter and returns a pointer instead of a reference * the address to give to {read|write}_* on address_space or direct_read_data is now the address one wants to access Longer explanation: Up until now, the {read|write}_* methods required the caller to give the byte offset instead of the actual address. That's the same on byte-addressing CPUs, e.g. the ones everyone knows, but it's different on the word/long/quad addressing ones (tms, sharc, etc...) or the bit-addressing one (tms340x0). Changing that required templatizing the direct access interface on the bus addressing granularity, historically called address bus shift. Also, since everybody was taking the address of the reference returned by direct(), and structurally didn't have much choice in the matter, it got changed to return a pointer directly. Longest historical explanation: In a cpu core, the hottest memory access, by far, is the opcode fetching. It's also an access with very good locality (doesn't move much, tends to stay in the same rom/ram zone even when jumping around, tends not to hit handlers), which makes efficient caching worthwhile (as in, 30-50% faster core iirc on something like the 6502, but that was 20 years ago and a number of things changed since then). In fact, opcode fetching was, in the distant past, just an array lookup indexed by pc on an offset pointer, which was updated on branches. It didn't stay that way because more elaborate access is often needed (handlers, banking with instructions crossing a bank...) but it still ends up with a frontend of "if the address is still in the current range read from pointer+address otherwise do the slowpath", e.g. two usually correctly predicted branches plus the read most of the time. Then the >8 bits cpus arrived. That was ok, it just required to do the add to a u8 *, then convert to a u16/u32 * and do the read. At the asm level, it was all identical except for the final read, and read_byte/word/long being separate there was no test (and associated overhead) added in the path. Then the word-addressing CPUs arrived with, iirc, the tms cpus used in atari games. They require, to read from the pointer, to shift the address, either explicitely, or implicitely through indexing a u16 *. There were three possibilities: 1- create a new read_* method for each size and granularity. That amounts to a lot of copy/paste in the end, and functions with identical prototypes so the compiler can't detect you're using the wrong one. 2- put a variable shift in the read path. That was too expensive especially since the most critical cpus are byte-addressing (68000 at the time was the key). Having bit-adressing cpus which means the shift can either be right or left depending on the variable makes things even worse. 3- require the caller to do the shift himself when needed. The last solution was chosen, and starting that day the address was a byte offset and not the real address. Which is, actually, quite surprising when writing a new cpu core or, worse, when using the read/write methods from the driver code. But since then, C++ happened. And, in particular, templates with non-type parameters. Suddendly, solution 1 can be done without the copy/paste and with different types allowing to detect (at runtime, but systematically and at startup) if you got it wrong, while still generating optimal code. So it was time to switch to that solution and makes the address parameter sane again. Especially since it makes mucking in the rest of the memory subsystem code a lot more understandable.
* dvdisasm: Overhaul [O. Galibert] Olivier Galibert2017-11-269-325/+181
| | | | | | | | Disassemblers are now independant classes. Not only the code is cleaner, but unidasm has access to all the cpu cores again. The interface to the disassembly method has changed from byte buffers to objects that give a result to read methods. This also adds support for lfsr and/or paged PCs.
* make device_memory_interface slightly less of a special case, use a typedef ↵ Vas Crabb2017-07-102-3/+3
| | | | to avoid nested templates everywhere (nw)
* dimemory: Lift the cap on the number of address spaces per device [O. Galibert] Olivier Galibert2017-07-032-6/+5
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* Move static data out of devices into the device types. This is a ↵ Vas Crabb2017-05-146-135/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | significant change, so please pay attention. The core changes are: * Short name, full name and source file are no longer members of device_t, they are part of the device type * MACHINE_COFIG_START no longer needs a driver class * MACHINE_CONFIG_DERIVED_CLASS is no longer necessary * Specify the state class you want in the GAME/COMP/CONS line * The compiler will work out the base class where the driver init member is declared * There is one static device type object per driver rather than one per machine configuration Use DECLARE_DEVICE_TYPE or DECLARE_DEVICE_TYPE_NS to declare device type. * DECLARE_DEVICE_TYPE forward-declares teh device type and class, and declares extern object finders. * DECLARE_DEVICE_TYPE_NS is for devices classes in namespaces - it doesn't forward-declare the device type. Use DEFINE_DEVICE_TYPE or DEFINE_DEVICE_TYPE_NS to define device types. * These macros declare storage for the static data, and instantiate the device type and device finder templates. The rest of the changes are mostly just moving stuff out of headers that shouldn't be there, renaming stuff for consistency, and scoping stuff down where appropriate. Things I've actually messed with substantially: * More descriptive names for a lot of devices * Untangled the fantasy sound from the driver state, which necessitates breaking up sound/flip writes * Changed DECO BSMT2000 ready callback into a device delegate * Untangled Microprose 3D noise from driver state * Used object finders for CoCo multipak, KC85 D002, and Irem sound subdevices * Started to get TI-99 stuff out of the TI-990 directory and arrange bus devices properly * Started to break out common parts of Samsung ARM SoC devices * Turned some of FM, SID, SCSP DSP, EPIC12 and Voodoo cores into something resmbling C++ * Tried to make Z180 table allocation/setup a bit safer * Converted generic keyboard/terminal to not use WRITE8 - space/offset aren't relevant * Dynamically allocate generic terminal buffer so derived devices (e.g. teleprinter) can specify size * Imporved encapsulation of Z80DART channels * Refactored the SPC7110 bit table generator loop to make it more readable * Added wrappers for SNES PPU operations so members can be made protected * Factored out some boilerplate for YM chips with PSG * toaplan2 gfx * stic/intv resolution * Video System video * Out Run/Y-board sprite alignment * GIC video hookup * Amstrad CPC ROM box members * IQ151 ROM cart region * MSX cart IRQ callback resolution time * SMS passthrough control devices starting subslots I've smoke-tested several drivers, but I've probably missed something. Things I've missed will likely blow up spectacularly with failure to bind errors and the like. Let me know if there's more subtle breakage (could have happened in FM or Voodoo). And can everyone please, please try to keep stuff clean. In particular, please stop polluting the global namespace. Keep things out of headers that don't need to be there, and use things that can be scoped down rather than macros. It feels like an uphill battle trying to get this stuff under control while more of it's added.
* more validation fixes (nw) Vas Crabb2017-03-041-1/+1
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* debugger_access: Refactor [O. Galibert] Olivier Galibert2017-03-021-7/+7
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* Self-registering devices prep: Vas Crabb2017-02-273-10/+10
| | | | | | | | | | | | | | * Make device_creator a variable template and get rid of the ampersands * Remove screen.h and speaker.h from emu.h and add where necessary * Centralise instantiations of screen and speaker finder templates * Add/standardise #include guards in many hearers * Remove many redundant #includes * Order #includesr to help catch headers that can't be #included alone (nw) This changes #include order to be prefix, unit header if applicable then other stuff roughly in order from most dependent to least dependent library. This helps catch headers that don't #include things that they use.
* tiny cleanup Vas Crabb2017-02-131-1/+1
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* Fix [MT06499](http://mametesters.org/view.php?id=6499) - probelm with edge ↵ Vas Crabb2017-02-101-1/+1
| | | | case in 68705 timer overflow interrupt
* m6805: clean up bih/bil handling Vas Crabb2017-02-105-68/+31
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* helps to get the right file, doesn't it (nw) Vas Crabb2017-02-042-2/+16
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* whoops, that's important (nw) Vas Crabb2017-02-041-0/+1
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* m68hc05: implement edge-sensitive external interrupts Vas Crabb2017-02-045-94/+194
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* m6805 updates: Vas Crabb2017-02-035-57/+967
| | | | | | | | | | * Fix disassembly of BIT opcodes * Don't burn cycles on disabled interrupts * Add partially implemented MC68HC05C8 and MC68HC705C8A * Implement 'HC05 digital I/O, timer/capture/compare and COP watchdogs * Probably still some bugs in 'HC05 peripherals Also use pure virtual method for Amiga keyboard interface (nw)
* m6805: added skeleton CMOS devices Vas Crabb2017-01-308-393/+905
| | | | | | | * Added m146805 and m68hc05 to unidasm * Made opcode tables configurable in m6805_base_device, provided tables for HMOS, CMOS and HC families * Implemented MUL instruction, made unimplemented STOP and WAIT raise fatal error * Added skeleton MC68HC05C4 with RAM and ROM in correct locations in memory map
* confirm MC68705R3 bootstrap program matches M68705U3 (and U5 for that ↵ Vas Crabb2017-01-281-1/+1
| | | | matter) [brizzo]
* srcclean (nw) Vas Crabb2017-01-221-1/+1
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