| Commit message (Collapse) | Author | Age | Files | Lines |
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in the peribox.
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for sector i/o instead of buffered steps only
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config.
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default for RTC chip.
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"mfm", "fm" and "pc" list of formats. Their contents, and which driver uses what, may need some tuning.
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* Updated sol2 to 3.2.2
* Updated pugixml to 1.10
* Increased minimum clang version to 6
* Cleaned up some stuff that can use new features
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of the real hardware.
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The global_alloc/global_free functions have outlived their usefulness.
They don't allow consistently overriding the default memory allocation
behaviour because they aren't used consistently, and we don't have
standard library allocator wrappers for them that we'd need to use them
consistently with all the standard library containers we're using. If
you need to change the default allocator behaviour, you can override the
new/delete operators, and there are ways to get more fine-grained
control that way. We're already doing that to pre-fill memory in debug
builds.
Code was already starting to depend on global_alloc/global_free wrapping
new/delete. For example some parts of the code (including the UI and
Windows debugger) was putting the result of global_alloc in a
std::unique_ptr wrappers without custom deleters, and the SPU sound
device was assuming it could use global_free to release memory allocated
with operator new. There was also code misunderstanding the behaviour
of global_alloc, for example the GROM port cartridge code was checking
for nullptr when a failure will actually throw std::bad_alloc.
As well as substituting new/delete, I've made several things use smart
pointers to reduce the chance of leaks, and fixed a couple of leaks,
too.
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https://github.com/mamedev/mame/tree/devcb-no-space branch build. (nw)
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not spin forever.
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Genmod daughterboard); correct Genmod adaptation of the peribox cards; RESET line in ioport and peribox
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starting with diimage. also fix a slight bug in the interface matching function for software list parts. (nw)
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* Changed emu_fatalerror to use util::string_format semantics
* Fixed some incorrectly marked up stuff in build scripts
* Make internal layout compression type a scoped enum (only zlib is supported still, but at least the values aren't magic numbers now)
* Fixed memory leaks in Xbox USB
* There can only be one "perfect quantum" device - enforce that only the root machine can set it, as allowing subdevices to will cause weird issues with slot cards overiding it
* Allow multiple devices to set maximum quantum and use the most restrictive one (it's maximum quantum, it would be minimum interleave)
* Got rid of device_slot_card_interface as it wasn't providing value
* Added a helper template to reduce certain kinds of boilerplate in slots/buses
* Cleaned up some particularly bad slot code (plenty more of that to do), and made some slots more idiomatic
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regularly poll the mouse but lets it update an internal counter. Also rerouted the extra mouse button to a separate input line.
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ti_fdc: Schematic shows a 2 MHz XTAL on board (nw)
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an address as a value to be written does not work with memory maps. Also fix 99/4p regression with wrong cru address access to peribox/evpc.
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SIDSEL signal is lost when no drive is selected.
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This effectively reverts b380514764cf857469bae61c11143a19f79a74c5 and
c24473ddff715ecec2e258a6eb38960cf8c8e98e, restoring the state at
598cd5227223c3b04ca31f0dbc1981256d9ea3ff.
Before pushing, please check that what you're about to push is sane.
Check your local commit log and ensure there isn't anything out-of-place
before pushing to mainline. When things like this happen, it wastes
everyone's time. I really don't need this in a week when real work™ is
busting my balls and I'm behind where I want to be with preparing for
MAME release.
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This reverts commit c24473ddff715ecec2e258a6eb38960cf8c8e98e, reversing
changes made to 009cba4fb8102102168ef32870892438327f3705.
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efo90501: Tweak dots per line to get closer to typical PAL rates (nw)
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arguments in all handlers (nw)
at29x, hdc92x4, mm58274c, rtc65271, strata, tms9901, tms9902: Simplify read/write handlers (nw)
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- Shift all CRU addresses by 1 in memory maps. This makes CRU addressing more consistent with both register values and external address lines. (CRUOUT is multiplexed with the lowest address line on the 8-bit bus versions.)
- Addressing for CRU read accesses is now the same as it has been for CRU write accesses: one address for each bit. This simplifies the CPU cores (which were already emulating bit access times), though it means some read handlers now have to do some additional work.
- CRU space is now little-endian, despite the big-endian memory organization, because less significant bits correspond to lower CRU addresses.
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