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Diffstat (limited to 'trunk/src/emu/cpu/m6805/m6805.h')
-rw-r--r--trunk/src/emu/cpu/m6805/m6805.h70
1 files changed, 70 insertions, 0 deletions
diff --git a/trunk/src/emu/cpu/m6805/m6805.h b/trunk/src/emu/cpu/m6805/m6805.h
new file mode 100644
index 00000000000..f4a195ec508
--- /dev/null
+++ b/trunk/src/emu/cpu/m6805/m6805.h
@@ -0,0 +1,70 @@
+/*** m6805: Portable 6805 emulator ******************************************/
+
+#pragma once
+
+#ifndef __M6805_H__
+#define __M6805_H__
+
+
+enum { M6805_PC=1, M6805_S, M6805_CC, M6805_A, M6805_X, M6805_IRQ_STATE };
+
+#define M6805_IRQ_LINE 0
+
+DECLARE_LEGACY_CPU_DEVICE(M6805, m6805);
+
+/****************************************************************************
+ * 68HC05EG section
+ ****************************************************************************/
+
+#define M68HC05EG_INT_IRQ (M6805_IRQ_LINE)
+#define M68HC05EG_INT_TIMER (M6805_IRQ_LINE+1)
+#define M68HC05EG_INT_CPI (M6805_IRQ_LINE+2)
+
+DECLARE_LEGACY_CPU_DEVICE(M68HC05EG, m68hc05eg);
+
+/****************************************************************************
+ * 68705 section
+ ****************************************************************************/
+#define M68705_A M6805_A
+#define M68705_PC M6805_PC
+#define M68705_S M6805_S
+#define M68705_X M6805_X
+#define M68705_CC M6805_CC
+#define M68705_IRQ_STATE M6805_IRQ_STATE
+
+#define M68705_INT_MASK 0x03
+#define M68705_IRQ_LINE M6805_IRQ_LINE
+#define M68705_INT_TIMER 0x01
+
+DECLARE_LEGACY_CPU_DEVICE(M68705, m68705);
+
+/****************************************************************************
+ * HD63705 section
+ ****************************************************************************/
+#define HD63705_A M6805_A
+#define HD63705_PC M6805_PC
+#define HD63705_S M6805_S
+#define HD63705_X M6805_X
+#define HD63705_CC M6805_CC
+#define HD63705_NMI_STATE M6805_IRQ_STATE
+#define HD63705_IRQ1_STATE M6805_IRQ_STATE+1
+#define HD63705_IRQ2_STATE M6805_IRQ_STATE+2
+#define HD63705_ADCONV_STATE M6805_IRQ_STATE+3
+
+#define HD63705_INT_MASK 0x1ff
+
+#define HD63705_INT_IRQ1 0x00
+#define HD63705_INT_IRQ2 0x01
+#define HD63705_INT_TIMER1 0x02
+#define HD63705_INT_TIMER2 0x03
+#define HD63705_INT_TIMER3 0x04
+#define HD63705_INT_PCI 0x05
+#define HD63705_INT_SCI 0x06
+#define HD63705_INT_ADCONV 0x07
+#define HD63705_INT_NMI 0x08
+
+DECLARE_LEGACY_CPU_DEVICE(HD63705, hd63705);
+
+CPU_DISASSEMBLE( m6805 );
+
+#endif /* __M6805_H__ */