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-rw-r--r--src/devices/bus/ti99/peb/evpc.cpp12
-rw-r--r--src/devices/cpu/st62xx/st62xx.cpp30
-rw-r--r--src/devices/cpu/st62xx/st62xx.h88
-rw-r--r--src/devices/cpu/st62xx/st62xx_dasm.cpp4
-rw-r--r--src/devices/cpu/tlcs870/tlcs870.cpp106
-rw-r--r--src/devices/cpu/tlcs870/tlcs870.h4
-rw-r--r--src/devices/cpu/tlcs870/tlcs870_ops.cpp176
-rw-r--r--src/devices/cpu/tlcs870/tlcs870_ops_dst.cpp86
-rw-r--r--src/devices/cpu/tlcs870/tlcs870_ops_helper.cpp58
-rw-r--r--src/devices/cpu/tlcs870/tlcs870_ops_reg.cpp226
-rw-r--r--src/devices/cpu/tlcs870/tlcs870_ops_src.cpp828
-rw-r--r--src/devices/cpu/tlcs870/tlcs870d.cpp2
-rw-r--r--src/devices/cpu/tms57002/tms57002.cpp4
-rw-r--r--src/devices/cpu/tms57002/tms57002.h4
-rw-r--r--src/devices/cpu/tms57002/tmsinstr.lst2
-rw-r--r--src/devices/cpu/z180/z180.cpp8
-rw-r--r--src/devices/machine/mb8421.cpp2
-rw-r--r--src/devices/machine/mc68681.cpp2
-rw-r--r--src/devices/machine/pcf8583.cpp12
-rw-r--r--src/devices/machine/pcf8583.h88
-rw-r--r--[-rwxr-xr-x]src/devices/machine/sda2006.cpp16
-rw-r--r--[-rwxr-xr-x]src/devices/machine/sda2006.h2
-rw-r--r--src/devices/sound/aica.cpp4
-rw-r--r--src/devices/sound/c6280.cpp6
-rw-r--r--src/devices/sound/huc6230.cpp12
-rw-r--r--src/devices/sound/qsoundhle.cpp4
-rw-r--r--src/devices/sound/qsoundhle.h22
-rw-r--r--src/devices/sound/zsg2.cpp94
-rw-r--r--src/devices/video/huc6272.cpp2
-rw-r--r--src/emu/emumem_hedp.cpp132
-rw-r--r--src/emu/emumem_hedp.h164
-rw-r--r--src/emu/screen.h2
-rw-r--r--src/mame/audio/sprint8.cpp2
-rw-r--r--src/mame/audio/taito_zm.cpp2
-rw-r--r--src/mame/audio/taito_zm.h2
-rw-r--r--src/mame/audio/targ.cpp2
-rw-r--r--src/mame/drivers/4roses.cpp2
-rw-r--r--src/mame/drivers/amaticmg.cpp2
-rw-r--r--src/mame/drivers/ambush.cpp2
-rw-r--r--src/mame/drivers/bingor.cpp2
-rw-r--r--src/mame/drivers/blitz68k.cpp12
-rw-r--r--src/mame/drivers/btime.cpp2
-rw-r--r--src/mame/drivers/cedar_magnet.cpp22
-rw-r--r--src/mame/drivers/citycon.cpp2
-rw-r--r--src/mame/drivers/coinmstr.cpp2
-rw-r--r--src/mame/drivers/coinmvga.cpp2
-rw-r--r--src/mame/drivers/cvs.cpp4
-rw-r--r--src/mame/drivers/cwheel.cpp24
-rw-r--r--src/mame/drivers/dec0.cpp6
-rw-r--r--src/mame/drivers/deco156.cpp2
-rw-r--r--src/mame/drivers/dynax.cpp2
-rw-r--r--src/mame/drivers/excali64.cpp6
-rw-r--r--src/mame/drivers/gaelco2.cpp22
-rw-r--r--src/mame/drivers/goldstar.cpp2
-rw-r--r--src/mame/drivers/goupil.cpp8
-rw-r--r--src/mame/drivers/gstream.cpp2
-rw-r--r--src/mame/drivers/hng64.cpp492
-rw-r--r--src/mame/drivers/igs_m027.cpp4
-rw-r--r--src/mame/drivers/jokrwild.cpp2
-rw-r--r--src/mame/drivers/m10.cpp24
-rw-r--r--src/mame/drivers/mainevt.cpp24
-rw-r--r--src/mame/drivers/mario.cpp16
-rw-r--r--src/mame/drivers/mastboyo.cpp2
-rw-r--r--src/mame/drivers/maygay1b.cpp14
-rw-r--r--src/mame/drivers/micropin.cpp2
-rw-r--r--src/mame/drivers/mpu12wbk.cpp2
-rw-r--r--src/mame/drivers/naomi.cpp22
-rw-r--r--src/mame/drivers/nightmare.cpp22
-rw-r--r--src/mame/drivers/nyny.cpp12
-rw-r--r--src/mame/drivers/opwolf.cpp12
-rw-r--r--src/mame/drivers/pgm.cpp2
-rw-r--r--src/mame/drivers/policetr.cpp54
-rw-r--r--src/mame/drivers/ql.cpp4
-rw-r--r--src/mame/drivers/r2dtank.cpp12
-rw-r--r--src/mame/drivers/spiders.cpp12
-rw-r--r--src/mame/drivers/super6.cpp8
-rw-r--r--src/mame/drivers/supercrd.cpp2
-rw-r--r--src/mame/drivers/system16.cpp2
-rw-r--r--src/mame/drivers/ti99_2.cpp16
-rw-r--r--src/mame/drivers/vgmplay.cpp10
-rw-r--r--src/mame/drivers/wrally.cpp2
-rw-r--r--src/mame/drivers/zodiack.cpp2
-rw-r--r--src/mame/includes/hng64.h2
-rw-r--r--src/mame/layout/vgmplay.lay2
-rw-r--r--src/mame/machine/315-5838_317-0229_comp.h6
-rw-r--r--src/mame/machine/pce_cd.cpp2
-rw-r--r--src/mame/machine/trs80m3.cpp20
-rw-r--r--src/mame/mame.lst6
-rw-r--r--src/mame/video/deco_zoomspr.cpp2
-rw-r--r--src/mame/video/hng64_3d.hxx38
-rw-r--r--src/mame/video/hng64_sprite.hxx2
-rw-r--r--src/mame/video/opwolf.cpp2
-rw-r--r--src/mame/video/powervr2.cpp2
93 files changed, 1599 insertions, 1599 deletions
diff --git a/src/devices/bus/ti99/peb/evpc.cpp b/src/devices/bus/ti99/peb/evpc.cpp
index 254b1d08a27..fc5591112d5 100644
--- a/src/devices/bus/ti99/peb/evpc.cpp
+++ b/src/devices/bus/ti99/peb/evpc.cpp
@@ -490,12 +490,12 @@ void snug_enhanced_video_device::device_add_mconfig(machine_config& config)
m_video->int_cb().set(FUNC(snug_enhanced_video_device::video_interrupt_in));
m_video->set_screen(TI_SCREEN_TAG);
screen_device& screen(SCREEN(config, TI_SCREEN_TAG, SCREEN_TYPE_RASTER));
- screen.set_raw(XTAL(21'477'272), \
- v99x8_device::HTOTAL, \
- 0, \
- v99x8_device::HVISIBLE - 1, \
- v99x8_device::VTOTAL_NTSC * 2, \
- v99x8_device::VERTICAL_ADJUST * 2, \
+ screen.set_raw(XTAL(21'477'272),
+ v99x8_device::HTOTAL,
+ 0,
+ v99x8_device::HVISIBLE - 1,
+ v99x8_device::VTOTAL_NTSC * 2,
+ v99x8_device::VERTICAL_ADJUST * 2,
v99x8_device::VVISIBLE_NTSC * 2 - 1 - v99x8_device::VERTICAL_ADJUST * 2);
screen.set_screen_update(TI_VDP_TAG, FUNC(v99x8_device::screen_update));
diff --git a/src/devices/cpu/st62xx/st62xx.cpp b/src/devices/cpu/st62xx/st62xx.cpp
index 6848844b918..6aa7b94be84 100644
--- a/src/devices/cpu/st62xx/st62xx.cpp
+++ b/src/devices/cpu/st62xx/st62xx.cpp
@@ -4,10 +4,10 @@
STmicro ST6-series microcontroller emulation skeleton
- To Do:
- - Cycle counts
- - STOP, WAIT opcodes
- - Peripherals
+ To Do:
+ - Cycle counts
+ - STOP, WAIT opcodes
+ - Peripherals
**********************************************************************/
@@ -510,7 +510,7 @@ void st6228_device::execute_run()
case 0x00: case 0x10: case 0x20: case 0x30: case 0x40: case 0x50: case 0x60: case 0x70:
case 0x80: case 0xa0: case 0xb0: case 0xc0: case 0xd0: case 0xe0: case 0xf0:
case 0x08: case 0x18: case 0x28: case 0x38: case 0x48: case 0x58: case 0x68: case 0x78:
- case 0x88: case 0xa8: case 0xb8: case 0xc8: case 0xd8: case 0xe8: case 0xf8: // JRNZ e
+ case 0x88: case 0xa8: case 0xb8: case 0xc8: case 0xd8: case 0xe8: case 0xf8: // JRNZ e
{
const int8_t e = ((int8_t)op) >> 3;
if (!(m_flags[m_mode] & FLAG_Z))
@@ -538,7 +538,7 @@ void st6228_device::execute_run()
break;
}
case 0x09: case 0x19: case 0x29: case 0x39: case 0x49: case 0x59: case 0x69: case 0x79:
- case 0x89: case 0x99: case 0xa9: case 0xb9: case 0xc9: case 0xd9: case 0xe9: case 0xf9: // JP abc
+ case 0x89: case 0x99: case 0xa9: case 0xb9: case 0xc9: case 0xd9: case 0xe9: case 0xf9: // JP abc
{
const uint8_t ab = m_program->read_byte(m_pc+1);
const uint16_t abc = ((op & 0xf0) >> 4) | (ab << 4);
@@ -548,14 +548,14 @@ void st6228_device::execute_run()
case 0x02: case 0x12: case 0x22: case 0x32: case 0x42: case 0x52: case 0x62: case 0x72:
case 0x82: case 0x92: case 0xa2: case 0xb2: case 0xc2: case 0xd2: case 0xe2: case 0xf2:
case 0x0a: case 0x1a: case 0x2a: case 0x3a: case 0x4a: case 0x5a: case 0x6a: case 0x7a:
- case 0x8a: case 0x9a: case 0xaa: case 0xba: case 0xca: case 0xda: case 0xea: case 0xfa: // JRNC abc
+ case 0x8a: case 0x9a: case 0xaa: case 0xba: case 0xca: case 0xda: case 0xea: case 0xfa: // JRNC abc
{
const int8_t e = ((int8_t)op) >> 3;
if (!(m_flags[m_mode] & FLAG_C))
m_pc += e;
break;
}
- case 0x03: case 0x23: case 0x43: case 0x63: case 0x83: case 0xa3: case 0xc3: case 0xe3: // JRR b,rr,ee
+ case 0x03: case 0x23: case 0x43: case 0x63: case 0x83: case 0xa3: case 0xc3: case 0xe3: // JRR b,rr,ee
{
const uint8_t b = (op >> 5) & 7;
const uint8_t rr = m_program->read_byte(m_pc+1);
@@ -567,7 +567,7 @@ void st6228_device::execute_run()
m_pc += ee;
break;
}
- case 0x13: case 0x33: case 0x53: case 0x73: case 0x93: case 0xb3: case 0xd3: case 0xf3: // JRS b,rr,ee
+ case 0x13: case 0x33: case 0x53: case 0x73: case 0x93: case 0xb3: case 0xd3: case 0xf3: // JRS b,rr,ee
{
const uint8_t b = (op >> 5) & 7;
const uint8_t rr = m_program->read_byte(m_pc+1);
@@ -579,7 +579,7 @@ void st6228_device::execute_run()
m_pc += 2;
break;
}
- case 0x0b: case 0x2b: case 0x4b: case 0x6b: case 0x8b: case 0xab: case 0xcb: case 0xeb: // RES b,rr
+ case 0x0b: case 0x2b: case 0x4b: case 0x6b: case 0x8b: case 0xab: case 0xcb: case 0xeb: // RES b,rr
{
const uint8_t b = (op >> 5) & 7;
const uint8_t rr = m_program->read_byte(m_pc+1);
@@ -588,7 +588,7 @@ void st6228_device::execute_run()
m_pc++;
break;
}
- case 0x1b: case 0x3b: case 0x5b: case 0x7b: case 0x9b: case 0xbb: case 0xdb: case 0xfb: // SET b,rr
+ case 0x1b: case 0x3b: case 0x5b: case 0x7b: case 0x9b: case 0xbb: case 0xdb: case 0xfb: // SET b,rr
{
const uint8_t b = (op >> 5) & 7;
const uint8_t rr = m_program->read_byte(m_pc+1);
@@ -600,7 +600,7 @@ void st6228_device::execute_run()
case 0x04: case 0x14: case 0x24: case 0x34: case 0x44: case 0x54: case 0x64: case 0x74:
case 0x84: case 0x94: case 0xa4: case 0xb4: case 0xc4: case 0xd4: case 0xe4: case 0xf4:
case 0x0c: case 0x1c: case 0x2c: case 0x3c: case 0x4c: case 0x5c: case 0x6c: case 0x7c:
- case 0x8c: case 0x9c: case 0xac: case 0xbc: case 0xcc: case 0xdc: case 0xec: case 0xfc: // JRZ e
+ case 0x8c: case 0x9c: case 0xac: case 0xbc: case 0xcc: case 0xdc: case 0xec: case 0xfc: // JRZ e
{
const int8_t e = ((int8_t)op) >> 3;
if (m_flags[m_mode] & FLAG_Z)
@@ -610,7 +610,7 @@ void st6228_device::execute_run()
case 0x06: case 0x16: case 0x26: case 0x36: case 0x46: case 0x56: case 0x66: case 0x76:
case 0x86: case 0x96: case 0xa6: case 0xb6: case 0xc6: case 0xd6: case 0xe6: case 0xf6:
case 0x0e: case 0x1e: case 0x2e: case 0x3e: case 0x4e: case 0x5e: case 0x6e: case 0x7e:
- case 0x8e: case 0x9e: case 0xae: case 0xbe: case 0xce: case 0xde: case 0xee: case 0xfe: // JRC e
+ case 0x8e: case 0x9e: case 0xae: case 0xbe: case 0xce: case 0xde: case 0xee: case 0xfe: // JRC e
{
const int8_t e = ((int8_t)op) >> 3;
if (m_flags[m_mode] & FLAG_C)
@@ -681,7 +681,7 @@ void st6228_device::execute_run()
else
m_flags[m_mode] |= FLAG_Z;
break;
- case 0x0d: // LDI rr,nn
+ case 0x0d: // LDI rr,nn
{
const uint8_t rr = m_program->read_byte(m_pc+1);
const uint8_t nn = m_program->read_byte(m_pc+2);
@@ -824,7 +824,7 @@ void st6228_device::execute_run()
else
m_flags[m_mode] |= FLAG_Z;
break;
- case 0x17: // LDI A,rr
+ case 0x17: // LDI A,rr
{
m_regs[REG_A] = m_program->read_byte(m_pc+1);
diff --git a/src/devices/cpu/st62xx/st62xx.h b/src/devices/cpu/st62xx/st62xx.h
index 8eae2774df0..f0748c44c95 100644
--- a/src/devices/cpu/st62xx/st62xx.h
+++ b/src/devices/cpu/st62xx/st62xx.h
@@ -136,47 +136,47 @@ protected:
enum
{
- PROGRAM_ROM_START = 0x40,
- REGS_START = 0x80,
- REG_X = 0x80,
- REG_Y = 0x81,
- REG_V = 0x82,
- REG_W = 0x83,
- DATA_RAM_START = 0x84,
- REG_PORTA_DATA = 0xc0,
- REG_PORTB_DATA = 0xc1,
- REG_PORTC_DATA = 0xc2,
- REG_PORTD_DATA = 0xc3,
- REG_PORTA_DIR = 0xc4,
- REG_PORTB_DIR = 0xc5,
- REG_PORTC_DIR = 0xc6,
- REG_PORTD_DIR = 0xc7,
- REG_INT_OPTION = 0xc8,
- REG_DATA_ROM_WINDOW = 0xc9,
- REG_ROM_BANK_SELECT = 0xca,
- REG_RAM_BANK_SELECT = 0xcb,
- REG_PORTA_OPTION = 0xcc,
- REG_PORTB_OPTION = 0xcd,
- REG_PORTC_OPTION = 0xce,
- REG_PORTD_OPTION = 0xcf,
- REG_AD_DATA = 0xd0,
- REG_AD_CONTROL = 0xd1,
- REG_TIMER_PRESCALE = 0xd2,
- REG_TIMER_COUNT = 0xd3,
- REG_TIMER_CONTROL = 0xd4,
- REG_UART_DATA = 0xd6,
- REG_UART_CONTROL = 0xd7,
- REG_WATCHDOG = 0xd8,
- REG_INT_POLARITY = 0xda,
- REG_SPI_INT_DISABLE = 0xdc,
- REG_SPI_DATA = 0xdd,
- REG_ARTIMER_MODE = 0xe5,
- REG_ARTIMER_ARCS0 = 0xe6,
- REG_ARTIMER_ARCS1 = 0xe7,
- REG_ARTIMER_RELOAD = 0xe9,
- REG_ARTIMER_COMPARE = 0xea,
- REG_ARTIMER_LOAD = 0xeb,
- REG_A = 0xff
+ PROGRAM_ROM_START = 0x40,
+ REGS_START = 0x80,
+ REG_X = 0x80,
+ REG_Y = 0x81,
+ REG_V = 0x82,
+ REG_W = 0x83,
+ DATA_RAM_START = 0x84,
+ REG_PORTA_DATA = 0xc0,
+ REG_PORTB_DATA = 0xc1,
+ REG_PORTC_DATA = 0xc2,
+ REG_PORTD_DATA = 0xc3,
+ REG_PORTA_DIR = 0xc4,
+ REG_PORTB_DIR = 0xc5,
+ REG_PORTC_DIR = 0xc6,
+ REG_PORTD_DIR = 0xc7,
+ REG_INT_OPTION = 0xc8,
+ REG_DATA_ROM_WINDOW = 0xc9,
+ REG_ROM_BANK_SELECT = 0xca,
+ REG_RAM_BANK_SELECT = 0xcb,
+ REG_PORTA_OPTION = 0xcc,
+ REG_PORTB_OPTION = 0xcd,
+ REG_PORTC_OPTION = 0xce,
+ REG_PORTD_OPTION = 0xcf,
+ REG_AD_DATA = 0xd0,
+ REG_AD_CONTROL = 0xd1,
+ REG_TIMER_PRESCALE = 0xd2,
+ REG_TIMER_COUNT = 0xd3,
+ REG_TIMER_CONTROL = 0xd4,
+ REG_UART_DATA = 0xd6,
+ REG_UART_CONTROL = 0xd7,
+ REG_WATCHDOG = 0xd8,
+ REG_INT_POLARITY = 0xda,
+ REG_SPI_INT_DISABLE = 0xdc,
+ REG_SPI_DATA = 0xdd,
+ REG_ARTIMER_MODE = 0xe5,
+ REG_ARTIMER_ARCS0 = 0xe6,
+ REG_ARTIMER_ARCS1 = 0xe7,
+ REG_ARTIMER_RELOAD = 0xe9,
+ REG_ARTIMER_COMPARE = 0xea,
+ REG_ARTIMER_LOAD = 0xeb,
+ REG_A = 0xff
};
enum
@@ -198,8 +198,8 @@ protected:
enum
{
- FLAG_C = 0x01,
- FLAG_Z = 0x02
+ FLAG_C = 0x01,
+ FLAG_Z = 0x02
};
enum
@@ -252,4 +252,4 @@ protected:
DECLARE_DEVICE_TYPE(ST6228, st6228_device)
-#endif // MAME_CPU_ST62XX_H \ No newline at end of file
+#endif // MAME_CPU_ST62XX_H
diff --git a/src/devices/cpu/st62xx/st62xx_dasm.cpp b/src/devices/cpu/st62xx/st62xx_dasm.cpp
index 0f3c9b4c999..7328cc32a7c 100644
--- a/src/devices/cpu/st62xx/st62xx_dasm.cpp
+++ b/src/devices/cpu/st62xx/st62xx_dasm.cpp
@@ -4,8 +4,8 @@
STmicro ST6-series microcontroller disassembler
- To Do:
- - Named registers/bits
+ To Do:
+ - Named registers/bits
**********************************************************************/
diff --git a/src/devices/cpu/tlcs870/tlcs870.cpp b/src/devices/cpu/tlcs870/tlcs870.cpp
index 79af9af88b4..c29db26f769 100644
--- a/src/devices/cpu/tlcs870/tlcs870.cpp
+++ b/src/devices/cpu/tlcs870/tlcs870.cpp
@@ -94,7 +94,7 @@ void tlcs870_device::tmp87ph40an_mem(address_map &map)
map(0x003c, 0x003c).rw(FUNC(tlcs870_device::il_l_r), FUNC(tlcs870_device::il_l_w)); // Interrupt latch
map(0x003d, 0x003d).rw(FUNC(tlcs870_device::il_h_r), FUNC(tlcs870_device::il_h_w)); //
-
+
// 0x3e reserved
map(0x003f, 0x003f).rw(FUNC(tlcs870_device::psw_r), FUNC(tlcs870_device::rbs_w)); // Program status word / Register bank selector
@@ -296,9 +296,9 @@ WRITE8_MEMBER(tlcs870_device::tc1cr_w)
LOG("%d: SCAP1/MCAP1/METT1/MPPG1\n", (m_TC1CR & 0x40) ? 1 : 0);
LOG("%d: TC1S-1 (TC1 Start Control)\n", (m_TC1CR & 0x20) ? 1 : 0);
LOG("%d: TC1S-0 (TC1 Start Control)\n", (m_TC1CR & 0x10) ? 1 : 0);
- LOG("%d: TC1CK-1 (TC1 Source Clock select)\n", (m_TC1CR & 0x08) ? 1 : 0);
- LOG("%d: TC1CK-0 (TC1 Source Clock select)\n", (m_TC1CR & 0x04) ? 1 : 0);
- LOG("%d: TC1M-1 (TC1 Mode Select)\n", (m_TC1CR & 0x02) ? 1 : 0);
+ LOG("%d: TC1CK-1 (TC1 Source Clock select)\n", (m_TC1CR & 0x08) ? 1 : 0);
+ LOG("%d: TC1CK-0 (TC1 Source Clock select)\n", (m_TC1CR & 0x04) ? 1 : 0);
+ LOG("%d: TC1M-1 (TC1 Mode Select)\n", (m_TC1CR & 0x02) ? 1 : 0);
LOG("%d: TC1M-0 (TC1 Mode Select)\n", (m_TC1CR & 0x01) ? 1 : 0);
}
@@ -371,9 +371,9 @@ WRITE8_MEMBER(tlcs870_device::tc2cr_w)
LOG("%d: (invalid)\n", (m_TC2CR & 0x40) ? 1 : 0);
LOG("%d: TC2S (TC2 Start Control)\n", (m_TC2CR & 0x20) ? 1 : 0);
LOG("%d: TC2CK-2 (TC2 Source Clock select)\n", (m_TC2CR & 0x10) ? 1 : 0);
- LOG("%d: TC2CK-1 (TC2 Source Clock select)\n", (m_TC2CR & 0x08) ? 1 : 0);
- LOG("%d: TC2CK-0 (TC2 Source Clock select)\n", (m_TC2CR & 0x04) ? 1 : 0);
- LOG("%d: (invalid)\n", (m_TC2CR & 0x02) ? 1 : 0);
+ LOG("%d: TC2CK-1 (TC2 Source Clock select)\n", (m_TC2CR & 0x08) ? 1 : 0);
+ LOG("%d: TC2CK-0 (TC2 Source Clock select)\n", (m_TC2CR & 0x04) ? 1 : 0);
+ LOG("%d: (invalid)\n", (m_TC2CR & 0x02) ? 1 : 0);
LOG("%d: TC2M (TC2 Mode Select)\n", (m_TC2CR & 0x01) ? 1 : 0);
}
@@ -403,9 +403,9 @@ WRITE8_MEMBER(tlcs870_device::tc3cr_w)
LOG("%d: SCAP (Software Capture Control)\n", (m_TC3CR & 0x40) ? 1 : 0);
LOG("%d: (invalid)\n", (m_TC3CR & 0x20) ? 1 : 0);
LOG("%d: TC3S (TC3 Start Control)\n", (m_TC3CR & 0x10) ? 1 : 0);
- LOG("%d: TC3CK-1 (TC3 Source Clock select)\n", (m_TC3CR & 0x08) ? 1 : 0);
- LOG("%d: TC3CK-0 (TC3 Source Clock select)\n", (m_TC3CR & 0x04) ? 1 : 0);
- LOG("%d: (invalid)\n", (m_TC3CR & 0x02) ? 1 : 0);
+ LOG("%d: TC3CK-1 (TC3 Source Clock select)\n", (m_TC3CR & 0x08) ? 1 : 0);
+ LOG("%d: TC3CK-0 (TC3 Source Clock select)\n", (m_TC3CR & 0x04) ? 1 : 0);
+ LOG("%d: (invalid)\n", (m_TC3CR & 0x02) ? 1 : 0);
LOG("%d: TC3M (TC3 Mode Select)\n", (m_TC3CR & 0x01) ? 1 : 0);
}
@@ -440,9 +440,9 @@ WRITE8_MEMBER(tlcs870_device::tc4cr_w)
LOG("%d: TFF4-0 (Timer F/F 4 Control)\n", (m_TC4CR & 0x40) ? 1 : 0);
LOG("%d: (invalid)\n", (m_TC4CR & 0x20) ? 1 : 0);
LOG("%d: TC4S (TC4 Start Control)\n", (m_TC4CR & 0x10) ? 1 : 0);
- LOG("%d: TC4CK-1 (TC4 Source Clock select)\n", (m_TC4CR & 0x08) ? 1 : 0);
- LOG("%d: TC4CK-0 (TC4 Source Clock select)\n", (m_TC4CR & 0x04) ? 1 : 0);
- LOG("%d: TC4M-1 (TC4 Mode Select)\n", (m_TC4CR & 0x02) ? 1 : 0);
+ LOG("%d: TC4CK-1 (TC4 Source Clock select)\n", (m_TC4CR & 0x08) ? 1 : 0);
+ LOG("%d: TC4CK-0 (TC4 Source Clock select)\n", (m_TC4CR & 0x04) ? 1 : 0);
+ LOG("%d: TC4M-1 (TC4 Mode Select)\n", (m_TC4CR & 0x02) ? 1 : 0);
LOG("%d: TC4M-0 (TC4 Mode Select)\n", (m_TC4CR & 0x01) ? 1 : 0);
}
@@ -453,7 +453,7 @@ WRITE8_MEMBER(tlcs870_device::treg4_w)
// Time Base Timer
-// this is used with TLCS870_IRQ_INTTBT (FFF2 INTTBT) (not used by hng64)
+// this is used with TLCS870_IRQ_INTTBT (FFF2 INTTBT) (not used by hng64)
// the divider output makes use of PORT1 bit 3, which must be properly configured
WRITE8_MEMBER(tlcs870_device::tbtcr_w)
{
@@ -464,9 +464,9 @@ WRITE8_MEMBER(tlcs870_device::tbtcr_w)
LOG("%d: DVOCK-1 (Divide Output Frequency Selection)n", (m_TBTCR & 0x40) ? 1 : 0);
LOG("%d: DVOCK-0 (Divide Output Frequency Selection)\n", (m_TBTCR & 0x20) ? 1 : 0);
LOG("%d: DV7CK (?)\n", (m_TBTCR & 0x10) ? 1 : 0);
- LOG("%d: TBTEN (Time Base Timer Enable)\n", (m_TBTCR & 0x08) ? 1 : 0);
- LOG("%d: TBTCK-2 (Time Base Timer Interrupt Frequency)\n", (m_TBTCR & 0x04) ? 1 : 0);
- LOG("%d: TBTCK-1 (Time Base Timer Interrupt Frequency)\n", (m_TBTCR & 0x02) ? 1 : 0);
+ LOG("%d: TBTEN (Time Base Timer Enable)\n", (m_TBTCR & 0x08) ? 1 : 0);
+ LOG("%d: TBTCK-2 (Time Base Timer Interrupt Frequency)\n", (m_TBTCR & 0x04) ? 1 : 0);
+ LOG("%d: TBTCK-1 (Time Base Timer Interrupt Frequency)\n", (m_TBTCR & 0x02) ? 1 : 0);
LOG("%d: TBTCK-0 (Time Base Timer Interrupt Frequency)\n", (m_TBTCR & 0x01) ? 1 : 0);
}
@@ -489,9 +489,9 @@ WRITE8_MEMBER(tlcs870_device::sio1cr1_w)
LOG("%d: SIOINH1 (Abort/Continue transfer)\n", (m_SIOCR1[0] & 0x40) ? 1 : 0);
LOG("%d: SIOM1-2 (Serial Mode)\n", (m_SIOCR1[0] & 0x20) ? 1 : 0);
LOG("%d: SIOM1-1 (Serial Mode)\n", (m_SIOCR1[0] & 0x10) ? 1 : 0);
- LOG("%d: SIOM1-0 (Serial Mode)\n", (m_SIOCR1[0] & 0x08) ? 1 : 0);
- LOG("%d: SCK1-2 (Serial Clock)\n", (m_SIOCR1[0] & 0x04) ? 1 : 0);
- LOG("%d: SCK1-1 (Serial Clock)\n", (m_SIOCR1[0] & 0x02) ? 1 : 0);
+ LOG("%d: SIOM1-0 (Serial Mode)\n", (m_SIOCR1[0] & 0x08) ? 1 : 0);
+ LOG("%d: SCK1-2 (Serial Clock)\n", (m_SIOCR1[0] & 0x04) ? 1 : 0);
+ LOG("%d: SCK1-1 (Serial Clock)\n", (m_SIOCR1[0] & 0x02) ? 1 : 0);
LOG("%d: SCK1-0 (Serial Clock)\n", (m_SIOCR1[0] & 0x01) ? 1 : 0);
m_transfer_mode[0] = (m_SIOCR1[0] & 0x38) >> 3;
@@ -503,7 +503,7 @@ WRITE8_MEMBER(tlcs870_device::sio1cr1_w)
m_receive_bits[0] = 0;
break;
- case 0x2:
+ case 0x2:
LOG("(Serial set to 4-bit transmit mode)\n");
m_transmit_bits[0] = 4;
m_receive_bits[0] = 0;
@@ -523,7 +523,7 @@ WRITE8_MEMBER(tlcs870_device::sio1cr1_w)
case 0x6:
LOG("(Serial set to 4-bit receive mode)\n");
m_transmit_bits[0] = 0;
- m_receive_bits[0] = 4;
+ m_receive_bits[0] = 4;
break;
default:
@@ -540,7 +540,7 @@ WRITE8_MEMBER(tlcs870_device::sio1cr1_w)
m_transfer_shiftreg[0] = 0;
m_transfer_pos[0] = 0;
- m_serial_transmit_timer[0]->adjust(attotime::zero);
+ m_serial_transmit_timer[0]->adjust(attotime::zero);
}
}
@@ -554,9 +554,9 @@ WRITE8_MEMBER(tlcs870_device::sio1cr2_w)
LOG("%d: (invalid)\n", (m_SIOCR2[0] & 0x40) ? 1 : 0);
LOG("%d: (invalid)\n", (m_SIOCR2[0] & 0x20) ? 1 : 0);
LOG("%d: WAIT1-1 (Wait Control\n", (m_SIOCR2[0] & 0x10) ? 1 : 0);
- LOG("%d: WAIT1-0 (Wait Control)\n", (m_SIOCR2[0] & 0x08) ? 1 : 0);
- LOG("%d: BUF1-2 (Number of Transfer Bytes)\n", (m_SIOCR2[0] & 0x04) ? 1 : 0);
- LOG("%d: BUF1-1 (Number of Transfer Bytes)\n", (m_SIOCR2[0] & 0x02) ? 1 : 0);
+ LOG("%d: WAIT1-0 (Wait Control)\n", (m_SIOCR2[0] & 0x08) ? 1 : 0);
+ LOG("%d: BUF1-2 (Number of Transfer Bytes)\n", (m_SIOCR2[0] & 0x04) ? 1 : 0);
+ LOG("%d: BUF1-1 (Number of Transfer Bytes)\n", (m_SIOCR2[0] & 0x02) ? 1 : 0);
LOG("%d: BUF1-0 (Number of Transfer Bytes)\n", (m_SIOCR2[0] & 0x01) ? 1 : 0);
m_transfer_numbytes[0] = (m_SIOCR2[0] & 0x7);
@@ -567,7 +567,7 @@ WRITE8_MEMBER(tlcs870_device::sio1cr2_w)
READ8_MEMBER(tlcs870_device::sio1sr_r)
{
/* TS-- ----
-
+
T = Transfer in Progress
S = Shift in Progress
@@ -625,9 +625,9 @@ WRITE8_MEMBER(tlcs870_device::sio2cr1_w)
LOG("%d: SIOINH2 (Abort/Continue transfer)\n", (m_SIOCR1[1] & 0x40) ? 1 : 0);
LOG("%d: SIOM2-2 (Serial Mode)\n", (m_SIOCR1[1] & 0x20) ? 1 : 0);
LOG("%d: SIOM2-1 (Serial Mode)\n", (m_SIOCR1[1] & 0x10) ? 1 : 0);
- LOG("%d: SIOM2-0 (Serial Mode)\n", (m_SIOCR1[1] & 0x08) ? 1 : 0);
- LOG("%d: SCK2-2 (Serial Clock)\n", (m_SIOCR1[1] & 0x04) ? 1 : 0);
- LOG("%d: SCK2-1 (Serial Clock)\n", (m_SIOCR1[1] & 0x02) ? 1 : 0);
+ LOG("%d: SIOM2-0 (Serial Mode)\n", (m_SIOCR1[1] & 0x08) ? 1 : 0);
+ LOG("%d: SCK2-2 (Serial Clock)\n", (m_SIOCR1[1] & 0x04) ? 1 : 0);
+ LOG("%d: SCK2-1 (Serial Clock)\n", (m_SIOCR1[1] & 0x02) ? 1 : 0);
LOG("%d: SCK2-0 (Serial Clock)\n", (m_SIOCR1[1] & 0x01) ? 1 : 0);
}
@@ -640,9 +640,9 @@ WRITE8_MEMBER(tlcs870_device::sio2cr2_w)
LOG("%d: (invalid)\n", (m_SIOCR2[1] & 0x40) ? 1 : 0);
LOG("%d: (invalid)\n", (m_SIOCR2[1] & 0x20) ? 1 : 0);
LOG("%d: WAIT2-1 (Wait Control\n", (m_SIOCR2[1] & 0x10) ? 1 : 0);
- LOG("%d: WAIT2-0 (Wait Control)\n", (m_SIOCR2[1] & 0x08) ? 1 : 0);
- LOG("%d: BUF2-2 (Number of Transfer Bytes)\n", (m_SIOCR2[1] & 0x04) ? 1 : 0);
- LOG("%d: BUF2-1 (Number of Transfer Bytes)\n", (m_SIOCR2[1] & 0x02) ? 1 : 0);
+ LOG("%d: WAIT2-0 (Wait Control)\n", (m_SIOCR2[1] & 0x08) ? 1 : 0);
+ LOG("%d: BUF2-2 (Number of Transfer Bytes)\n", (m_SIOCR2[1] & 0x04) ? 1 : 0);
+ LOG("%d: BUF2-1 (Number of Transfer Bytes)\n", (m_SIOCR2[1] & 0x02) ? 1 : 0);
LOG("%d: BUF2-0 (Number of Transfer Bytes)\n", (m_SIOCR2[1] & 0x01) ? 1 : 0);
}
@@ -653,7 +653,7 @@ TIMER_CALLBACK_MEMBER(tlcs870_device::sio1_transmit_cb)
READ8_MEMBER(tlcs870_device::sio2sr_r)
{
/* TS-- ----
-
+
T = Transfer in Progress
S = Shift in Progress
@@ -672,9 +672,9 @@ WRITE8_MEMBER(tlcs870_device::wdtcr1_w)
LOG("%d: (invalid)\n", (m_WDTCR1 & 0x40) ? 1 : 0);
LOG("%d: (invalid)\n", (m_WDTCR1 & 0x20) ? 1 : 0);
LOG("%d: (invalid)\n", (m_WDTCR1 & 0x10) ? 1 : 0);
- LOG("%d: WDTEN (Watchdog Timer Enable, also req disable code to WDTCR2)\n", (m_WDTCR1 & 0x08) ? 1 : 0);
- LOG("%d: WDTT-1 (Watchdog Timer Detection Time)\n", (m_WDTCR1 & 0x04) ? 1 : 0);
- LOG("%d: WDTT-0 (Watchdog Timer Detection Time)\n", (m_WDTCR1 & 0x02) ? 1 : 0);
+ LOG("%d: WDTEN (Watchdog Timer Enable, also req disable code to WDTCR2)\n", (m_WDTCR1 & 0x08) ? 1 : 0);
+ LOG("%d: WDTT-1 (Watchdog Timer Detection Time)\n", (m_WDTCR1 & 0x04) ? 1 : 0);
+ LOG("%d: WDTT-0 (Watchdog Timer Detection Time)\n", (m_WDTCR1 & 0x02) ? 1 : 0);
LOG("%d: WDTOUT (Watchdog Timer Output select, 0 = interrupt, 1 = reset out)\n",(m_WDTCR1 & 0x01) ? 1 : 0);
// WDTOUT cannot be set to 1 by software
@@ -708,9 +708,9 @@ WRITE8_MEMBER(tlcs870_device::syscr1_w)
LOG("%d: RELM (release method for STOP, 0 edge, 1 level)\n", (m_SYSCR1 & 0x40) ? 1 : 0);
LOG("%d: RETM (return mode after STOP, 0 normal, 1 slow)\n", (m_SYSCR1 & 0x20) ? 1 : 0);
LOG("%d: OUTEN (port output control during STOP)\n", (m_SYSCR1 & 0x10) ? 1 : 0);
- LOG("%d: WUT-1 (warm up time at STOP release)\n", (m_SYSCR1 & 0x08) ? 1 : 0);
- LOG("%d: WUT-0 (warm up time at STOP release)\n", (m_SYSCR1 & 0x04) ? 1 : 0);
- LOG("%d: (invalid)\n", (m_SYSCR1 & 0x02) ? 1 : 0);
+ LOG("%d: WUT-1 (warm up time at STOP release)\n", (m_SYSCR1 & 0x08) ? 1 : 0);
+ LOG("%d: WUT-0 (warm up time at STOP release)\n", (m_SYSCR1 & 0x04) ? 1 : 0);
+ LOG("%d: (invalid)\n", (m_SYSCR1 & 0x02) ? 1 : 0);
LOG("%d: (invalid)\n", (m_SYSCR1 & 0x01) ? 1 : 0);
}
@@ -723,9 +723,9 @@ WRITE8_MEMBER(tlcs870_device::syscr2_w)
LOG("%d: XTEN (Low Frequency Oscillator control)\n", (m_SYSCR2 & 0x40) ? 1 : 0);
LOG("%d: SYSCK (system clock select 0 high, 1 low)\n", (m_SYSCR2 & 0x20) ? 1 : 0);
LOG("%d: IDLE (IDLE mode start)\n", (m_SYSCR2 & 0x10) ? 1 : 0); // hng64 sets this in case of ram test failures
- LOG("%d: (invalid)\n", (m_SYSCR2 & 0x08) ? 1 : 0);
- LOG("%d: (invalid)\n", (m_SYSCR2 & 0x04) ? 1 : 0);
- LOG("%d: (invalid)\n", (m_SYSCR2 & 0x02) ? 1 : 0);
+ LOG("%d: (invalid)\n", (m_SYSCR2 & 0x08) ? 1 : 0);
+ LOG("%d: (invalid)\n", (m_SYSCR2 & 0x04) ? 1 : 0);
+ LOG("%d: (invalid)\n", (m_SYSCR2 & 0x02) ? 1 : 0);
LOG("%d: (invalid)\n", (m_SYSCR2 & 0x01) ? 1 : 0);
}
@@ -760,12 +760,12 @@ READ8_MEMBER(tlcs870_device::adcdr_r)
return m_ADCDR;
}
-/*
+/*
ADCCR register bits
es-apppp
-
+
e = end flag (1 = done, data available in ADCDR, 0 = not requested / not finished) (r/o)
s = start flag (1 = request data be processed and put in ADCDR)
@@ -810,9 +810,9 @@ WRITE8_MEMBER(tlcs870_device::eintcr_w)
LOG("%d: INT0EN (Interrupt 0 enable)\n", (m_EINTCR & 0x40) ? 1 : 0);
LOG("%d: (invalid)\n", (m_EINTCR & 0x20) ? 1 : 0);
LOG("%d: INT4ES (edge select)\n", (m_EINTCR & 0x10) ? 1 : 0);
- LOG("%d: INT3ES (edge select)\n", (m_EINTCR & 0x08) ? 1 : 0);
- LOG("%d: INT2ES (edge select)\n", (m_EINTCR & 0x04) ? 1 : 0);
- LOG("%d: INT1ES (edge select)\n", (m_EINTCR & 0x02) ? 1 : 0);
+ LOG("%d: INT3ES (edge select)\n", (m_EINTCR & 0x08) ? 1 : 0);
+ LOG("%d: INT2ES (edge select)\n", (m_EINTCR & 0x04) ? 1 : 0);
+ LOG("%d: INT1ES (edge select)\n", (m_EINTCR & 0x02) ? 1 : 0);
LOG("%d: (invalid)\n", (m_EINTCR & 0x01) ? 1 : 0);
/* For edge select register 0 = rising edge, 1 = falling edge
@@ -858,15 +858,15 @@ WRITE8_MEMBER(tlcs870_device::eir_h_w)
LOG("%d: EF12 (External Interrupt 4)\n", (m_EIR & 0x1000) ? 1 : 0);
LOG("%d: EF11 (External Interrupt 3)\n", (m_EIR & 0x0800) ? 1 : 0);
LOG("%d: EF10 (8-bit TC4 Interrupt)\n", (m_EIR & 0x0400) ? 1 : 0);
- LOG("%d: EF9 (Serial Interface 1 Interrupt)\n", (m_EIR & 0x0200) ? 1 : 0);
+ LOG("%d: EF9 (Serial Interface 1 Interrupt)\n", (m_EIR & 0x0200) ? 1 : 0);
LOG("%d: EF8 (8-bit TC3 Interrupt)\n", (m_EIR & 0x0100) ? 1 : 0);
}
/*
- the READ/WRITE/MODIFY operations cannot be used to clear interrupt latches
+ the READ/WRITE/MODIFY operations cannot be used to clear interrupt latches
- also you can't set a latch by writing '1' to it, only clear a latch
- by writing 0 to it
+ also you can't set a latch by writing '1' to it, only clear a latch
+ by writing 0 to it
*/
READ8_MEMBER(tlcs870_device::il_l_r)
@@ -1028,7 +1028,7 @@ void tlcs870_device::execute_run()
void tlcs870_device::device_reset()
{
m_pc.d = RM16(0xfffe);
-
+
m_RBS = 0x00;
m_EIR = 0x0000;
m_IL = 0x0000;
diff --git a/src/devices/cpu/tlcs870/tlcs870.h b/src/devices/cpu/tlcs870/tlcs870.h
index 7d23d08c71e..93390d1be0c 100644
--- a/src/devices/cpu/tlcs870/tlcs870.h
+++ b/src/devices/cpu/tlcs870/tlcs870.h
@@ -174,7 +174,7 @@ private:
uint8_t m_port_out_latch[8];
int m_read_input_port;
uint8_t m_port0_cr, m_port1_cr, m_port6_cr, m_port7_cr;
-
+
DECLARE_READ8_MEMBER(port0_r);
DECLARE_READ8_MEMBER(port1_r);
DECLARE_READ8_MEMBER(port2_r);
@@ -279,7 +279,7 @@ private:
uint16_t m_TREG1B;
uint8_t m_TC1CR;
uint16_t m_TREG2;
- uint8_t m_TC2CR;
+ uint8_t m_TC2CR;
uint8_t m_TREG3A;
uint8_t m_TREG3B;
uint8_t m_TC3CR;
diff --git a/src/devices/cpu/tlcs870/tlcs870_ops.cpp b/src/devices/cpu/tlcs870/tlcs870_ops.cpp
index 3a14f319ae2..f215774b5d0 100644
--- a/src/devices/cpu/tlcs870/tlcs870_ops.cpp
+++ b/src/devices/cpu/tlcs870/tlcs870_ops.cpp
@@ -4,7 +4,7 @@
Toshiba TLCS-870 Series MCUs
- direct opcodes, no prefix
+ direct opcodes, no prefix
*************************************************************************************************************/
@@ -158,7 +158,7 @@ void tlcs870_device::do_NOP(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- NOP 0000 0000 - - - - 1
+ NOP 0000 0000 - - - - 1
*/
m_cycles = 1;
}
@@ -167,7 +167,7 @@ void tlcs870_device::do_SWAP_A(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- SWAP A 0000 0001 1 - - - 3
+ SWAP A 0000 0001 1 - - - 3
*/
m_cycles = 3;
@@ -178,7 +178,7 @@ void tlcs870_device::do_MUL_W_A(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- MUL W, A 0000 0010 Z Z - - 7
+ MUL W, A 0000 0010 Z Z - - 7
*/
m_cycles = 7;
@@ -189,7 +189,7 @@ void tlcs870_device::do_DIV_WA_C(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- DIV WA, C 0000 0011 Z Z C - 7
+ DIV WA, C 0000 0011 Z Z C - 7
*/
m_cycles = 7;
@@ -199,10 +199,10 @@ void tlcs870_device::do_DIV_WA_C(const uint8_t opbyte0)
void tlcs870_device::do_RETI(const uint8_t opbyte0)
{
/*
- Return from maskable interrupt service (how does this differ from RETN?)
+ Return from maskable interrupt service (how does this differ from RETN?)
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- RETI 0000 0100 * * * * 6
+ RETI 0000 0100 * * * * 6
*/
m_cycles = 6;
@@ -218,7 +218,7 @@ void tlcs870_device::do_RET(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- RET 0000 0101 - - - - 6
+ RET 0000 0101 - - - - 6
*/
m_cycles = 6;
@@ -230,7 +230,7 @@ void tlcs870_device::do_POP_PSW(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- POP PSW 0000 0110 * * * * 3
+ POP PSW 0000 0110 * * * * 3
*/
m_cycles = 3;
@@ -243,7 +243,7 @@ void tlcs870_device::do_PUSH_PSW(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- POP PSW 0000 0111 - - - - 2
+ POP PSW 0000 0111 - - - - 2
*/
m_cycles = 2;
@@ -256,7 +256,7 @@ void tlcs870_device::do_DAA_A(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- DAA A 0000 1010 C Z C H 2
+ DAA A 0000 1010 C Z C H 2
*/
m_cycles = 2;
@@ -271,7 +271,7 @@ void tlcs870_device::do_DAS_A(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- DAS A 0000 1011 C Z C H 2
+ DAS A 0000 1011 C Z C H 2
*/
m_cycles = 2;
@@ -286,7 +286,7 @@ void tlcs870_device::do_CLR_CF(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- CLR CF 0000 1100 1 - 0 - 1
+ CLR CF 0000 1100 1 - 0 - 1
*/
m_cycles = 1;
@@ -298,7 +298,7 @@ void tlcs870_device::do_SET_CF(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- SET CF 0000 1101 0 - 1 - 1
+ SET CF 0000 1101 0 - 1 - 1
*/
m_cycles = 1;
@@ -310,7 +310,7 @@ void tlcs870_device::do_CPL_CF(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- CPL CF 0000 1110 * - * - 1
+ CPL CF 0000 1110 * - * - 1
*/
m_cycles = 1;
@@ -330,7 +330,7 @@ void tlcs870_device::do_LD_RBS_n(const uint8_t opbyte0) // register bank switchi
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- LD RBS, n 0000 1111 0000 nnnn 1 - - - 4
+ LD RBS, n 0000 1111 0000 nnnn 1 - - - 4
*/
m_cycles = 4;
@@ -344,7 +344,7 @@ void tlcs870_device::do_INC_rr(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- INC rr 0001 00rr C Z - - 2
+ INC rr 0001 00rr C Z - - 2
*/
m_cycles = 2;
@@ -371,7 +371,7 @@ void tlcs870_device::do_LD_rr_mn(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- LD rr,mn 0001 01rr nnnn nnnn mmmm mmmm 1 - - - 3
+ LD rr,mn 0001 01rr nnnn nnnn mmmm mmmm 1 - - - 3
*/
m_cycles = 3;
@@ -385,7 +385,7 @@ void tlcs870_device::do_DEC_rr(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- DEC rr 0001 10rr C Z - - 2
+ DEC rr 0001 10rr C Z - - 2
*/
m_cycles = 2;
@@ -419,7 +419,7 @@ void tlcs870_device::do_SHLC_A(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- SHLC A 0001 1100 C Z * - 1
+ SHLC A 0001 1100 C Z * - 1
*/
m_cycles = 1;
@@ -434,7 +434,7 @@ void tlcs870_device::do_SHRC_A(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- SHRC A 0001 1101 C Z * - 1
+ SHRC A 0001 1101 C Z * - 1
*/
m_cycles = 1;
@@ -449,7 +449,7 @@ void tlcs870_device::do_ROLC_A(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- ROLC A 0001 1110 C Z * - 1
+ ROLC A 0001 1110 C Z * - 1
*/
m_cycles = 1;
@@ -464,7 +464,7 @@ void tlcs870_device::do_RORC_A(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- RORC A 0001 1111 C Z * - 1
+ RORC A 0001 1111 C Z * - 1
*/
m_cycles = 1;
@@ -479,7 +479,7 @@ void tlcs870_device::do_INC_inx(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- INC (x) 0010 0000 xxxx xxxx C Z - - 5
+ INC (x) 0010 0000 xxxx xxxx C Z - - 5
*/
m_cycles = 5;
@@ -507,7 +507,7 @@ void tlcs870_device::do_INC_inHL(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- INC (HL) 0010 0001 C Z - - 4
+ INC (HL) 0010 0001 C Z - - 4
*/
m_cycles = 4;
@@ -534,7 +534,7 @@ void tlcs870_device::do_LD_A_inx(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- LD A, (x) 0010 0010 xxxx xxxx 1 Z - - 3
+ LD A, (x) 0010 0010 xxxx xxxx 1 Z - - 3
*/
m_cycles = 3;
@@ -553,7 +553,7 @@ void tlcs870_device::do_LD_A_inHL(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- LD A, (HL) 0010 0011 1 Z - - 2
+ LD A, (HL) 0010 0011 1 Z - - 2
*/
m_cycles = 2;
@@ -572,7 +572,7 @@ void tlcs870_device::do_LD_inx_iny(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- LD (x), (y) 0010 0110 yyyy yyyy xxxx xxxx 1 Z - - 5
+ LD (x), (y) 0010 0110 yyyy yyyy xxxx xxxx 1 Z - - 5
*/
m_cycles = 5;
@@ -593,7 +593,7 @@ void tlcs870_device::do_DEC_inx(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- DEC (x) 0010 1000 xxxx xxxx C Z - - 5
+ DEC (x) 0010 1000 xxxx xxxx C Z - - 5
*/
m_cycles = 5;
@@ -627,7 +627,7 @@ void tlcs870_device::do_DEC_inHL(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- DEC (HL) 0010 1001 C Z - - 4
+ DEC (HL) 0010 1001 C Z - - 4
*/
m_cycles = 4;
@@ -661,7 +661,7 @@ void tlcs870_device::do_LD_inx_A(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- LD (x), A 0010 1010 xxxx xxxx 1 - - - 3
+ LD (x), A 0010 1010 xxxx xxxx 1 - - - 3
*/
m_cycles = 3;
@@ -680,7 +680,7 @@ void tlcs870_device::do_LD_inHL_A(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- LD (HL), A 0010 1011 1 - - - 2
+ LD (HL), A 0010 1011 1 - - - 2
*/
m_cycles = 2;
@@ -696,7 +696,7 @@ void tlcs870_device::do_LD_inx_n(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- LD (x), n 0010 1100 xxxx xxxx nnnn nnnn 1 - - - 4
+ LD (x), n 0010 1100 xxxx xxxx nnnn nnnn 1 - - - 4
*/
m_cycles = 4;
@@ -712,7 +712,7 @@ void tlcs870_device::do_LD_inHL_n(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- LD (HL), n 0010 1101 nnnn nnnn 1 - - - 3
+ LD (HL), n 0010 1101 nnnn nnnn 1 - - - 3
*/
m_cycles = 3;
@@ -728,7 +728,7 @@ void tlcs870_device::do_CLR_inx(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- CLR (x) 0010 1110 xxxx xxxx 1 - - - 4
+ CLR (x) 0010 1110 xxxx xxxx 1 - - - 4
*/
m_cycles = 4;
@@ -743,7 +743,7 @@ void tlcs870_device::do_CLR_inHL(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- CLR (HL) 0010 1111 1 - - - 2
+ CLR (HL) 0010 1111 1 - - - 2
*/
m_cycles = 2;
@@ -757,7 +757,7 @@ void tlcs870_device::do_LD_r_n(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- LD r,n 0011 0rrr nnnn nnnn 1 - - - 2
+ LD r,n 0011 0rrr nnnn nnnn 1 - - - 2
*/
m_cycles = 2;
@@ -773,9 +773,9 @@ void tlcs870_device::do_SET_inxbit(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- SET (x).b 0100 0bbb xxxx xxxx Z * - - 5
+ SET (x).b 0100 0bbb xxxx xxxx Z * - - 5
- (opbyte0 == 0x40) && (opval == 0x3a) is EI
+ (opbyte0 == 0x40) && (opval == 0x3a) is EI
*/
m_cycles = 5;
@@ -807,9 +807,9 @@ void tlcs870_device::do_CLR_inxbit(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- CLR (x).b 0100 1bbb xxxx xxxx Z * - - 5
+ CLR (x).b 0100 1bbb xxxx xxxx Z * - - 5
- (opbyte0 == 0x48) && (opval == 0x3a) is DI
+ (opbyte0 == 0x48) && (opval == 0x3a) is DI
*/
m_cycles = 5;
@@ -841,7 +841,7 @@ void tlcs870_device::do_LD_A_r(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- LD A, r 0101 0rrr 1 Z - - 1
+ LD A, r 0101 0rrr 1 Z - - 1
*/
m_cycles = 1;
@@ -858,7 +858,7 @@ void tlcs870_device::do_LD_r_A(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- LD r, A 0101 1rrr 1 Z - - 1
+ LD r, A 0101 1rrr 1 Z - - 1
*/
m_cycles = 1;
@@ -875,7 +875,7 @@ void tlcs870_device::do_INC_r(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- INC r 0110 0rrr C Z - - 1
+ INC r 0110 0rrr C Z - - 1
*/
m_cycles = 1;
@@ -901,7 +901,7 @@ void tlcs870_device::do_DEC_r(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- DEC r 0110 1rrr C Z - - 1
+ DEC r 0110 1rrr C Z - - 1
*/
m_cycles = 1;
@@ -933,10 +933,10 @@ void tlcs870_device::do_DEC_r(const uint8_t opbyte0)
void tlcs870_device::do_JRS_T_a(const uint8_t opbyte0)
{
/*
- Jump Relative Short, if True
+ Jump Relative Short, if True
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- JRS T, a 100d dddd 1 - - - 4 (2 if not taken)
+ JRS T, a 100d dddd 1 - - - 4 (2 if not taken)
*/
m_cycles = 2;
@@ -950,7 +950,7 @@ void tlcs870_device::do_JRS_T_a(const uint8_t opbyte0)
m_cycles += 2;
m_addr = m_tmppc + 2 + val;
}
-
+
// always gets set?
set_JF();
}
@@ -958,10 +958,10 @@ void tlcs870_device::do_JRS_T_a(const uint8_t opbyte0)
void tlcs870_device::do_JRS_F_a(const uint8_t opbyte0)
{
/*
- Jump Relative Short, if False
+ Jump Relative Short, if False
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- JRS F, a 101d dddd 1 - - - 4 (2 if not taken)
+ JRS F, a 101d dddd 1 - - - 4 (2 if not taken)
*/
m_cycles = 2;
@@ -975,7 +975,7 @@ void tlcs870_device::do_JRS_F_a(const uint8_t opbyte0)
m_cycles += 2;
m_addr = m_tmppc + 2 + val;
}
-
+
// manual isn't clear in description, but probably always set?
set_JF();
}
@@ -983,10 +983,10 @@ void tlcs870_device::do_JRS_F_a(const uint8_t opbyte0)
void tlcs870_device::do_CALLV_n(const uint8_t opbyte0)
{
/*
- Call Vector
+ Call Vector
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- CALLV n 1100 nnnn - - - - 7
+ CALLV n 1100 nnnn - - - - 7
*/
m_cycles = 7;
@@ -1002,14 +1002,14 @@ void tlcs870_device::do_JR_cc_a(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- JR T, a 1101 0110 dddd dddd 1 - - - 4 (2 if not taken)
- JR F, a 1101 0111 dddd dddd 1 - - - 4 (2 if not taken)
- JR EQ, a (Z, a) 1101 0000 dddd dddd 1 - - - 4 (2 if not taken)
- JR NE, a (NZ, a) 1101 0001 dddd dddd 1 - - - 4 (2 if not taken)
- JR CS, a (LT, a) 1101 0010 dddd dddd 1 - - - 4 (2 if not taken)
- JR CC, a (GE, a) 1101 0011 dddd dddd 1 - - - 4 (2 if not taken)
- JR LE, a 1101 0100 dddd dddd 1 - - - 4 (2 if not taken)
- JR GT, a 1101 0101 dddd dddd 1 - - - 4 (2 if not taken)
+ JR T, a 1101 0110 dddd dddd 1 - - - 4 (2 if not taken)
+ JR F, a 1101 0111 dddd dddd 1 - - - 4 (2 if not taken)
+ JR EQ, a (Z, a) 1101 0000 dddd dddd 1 - - - 4 (2 if not taken)
+ JR NE, a (NZ, a) 1101 0001 dddd dddd 1 - - - 4 (2 if not taken)
+ JR CS, a (LT, a) 1101 0010 dddd dddd 1 - - - 4 (2 if not taken)
+ JR CC, a (GE, a) 1101 0011 dddd dddd 1 - - - 4 (2 if not taken)
+ JR LE, a 1101 0100 dddd dddd 1 - - - 4 (2 if not taken)
+ JR GT, a 1101 0101 dddd dddd 1 - - - 4 (2 if not taken)
*/
m_cycles = 2;
@@ -1034,9 +1034,9 @@ void tlcs870_device::do_LD_CF_inxbit(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- LD CF, (x).b 1101 1bbb xxxx xxxx ~C - * - 4
+ LD CF, (x).b 1101 1bbb xxxx xxxx ~C - * - 4
- aka TEST (x).b
+ aka TEST (x).b
*/
m_cycles = 4;
@@ -1057,7 +1057,7 @@ void tlcs870_device::do_LD_SP_mn(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- LD SP ,mn 1111 1010 nnnn nnnn mmmm mmmm 1 - - - 3
+ LD SP ,mn 1111 1010 nnnn nnnn mmmm mmmm 1 - - - 3
*/
m_cycles = 3;
@@ -1070,7 +1070,7 @@ void tlcs870_device::do_JR_a(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- JR a 1111 1011 dddd dddd 1 - - - 4
+ JR a 1111 1011 dddd dddd 1 - - - 4
*/
m_cycles = 4;
@@ -1086,7 +1086,7 @@ void tlcs870_device::do_CALL_mn(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- CALL mn 1111 1100 nnnn nnnn mmmm mmmm - - - - 6
+ CALL mn 1111 1100 nnnn nnnn mmmm mmmm - - - - 6
*/
m_cycles = 6;
@@ -1102,7 +1102,7 @@ void tlcs870_device::do_CALLP_n(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- CALLP n 1111 1101 nnnn nnnn - - - - 6
+ CALLP n 1111 1101 nnnn nnnn - - - - 6
*/
m_cycles = 6;
@@ -1118,7 +1118,7 @@ void tlcs870_device::do_JP_mn(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- JP mn 1111 1110 nnnn nnnn mmmm mmmm 1 - - - 4
+ JP mn 1111 1110 nnnn nnnn mmmm mmmm 1 - - - 4
*/
m_cycles = 4;
@@ -1130,8 +1130,8 @@ void tlcs870_device::do_JP_mn(const uint8_t opbyte0)
void tlcs870_device::do_ff_opcode(const uint8_t opbyte0)
{
/*
- OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- SWI 1111 1111 - - - - 9 (1 if already in NMI)
+ OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
+ SWI 1111 1111 - - - - 9 (1 if already in NMI)
*/
m_cycles = 9; // TODO: 1 if in NMI this acts as a NOP
@@ -1147,14 +1147,14 @@ void tlcs870_device::do_ALUOP_A_n(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- ADDC A, n 0111 0000 nnnn nnnn C Z C H 2
- ADD A, n 0111 0001 nnnn nnnn C Z C H 2
- SUBB A, n 0111 0010 nnnn nnnn C Z C H 2
- SUB A, n 0111 0011 nnnn nnnn C Z C H 2
- AND A, n 0111 0100 nnnn nnnn Z Z - - 2
- XOR A, n 0111 0101 nnnn nnnn Z Z - - 2
- OR A, n 0111 0110 nnnn nnnn Z Z - - 2
- CMP A, n 0111 0111 nnnn nnnn Z Z C H 2
+ ADDC A, n 0111 0000 nnnn nnnn C Z C H 2
+ ADD A, n 0111 0001 nnnn nnnn C Z C H 2
+ SUBB A, n 0111 0010 nnnn nnnn C Z C H 2
+ SUB A, n 0111 0011 nnnn nnnn C Z C H 2
+ AND A, n 0111 0100 nnnn nnnn Z Z - - 2
+ XOR A, n 0111 0101 nnnn nnnn Z Z - - 2
+ OR A, n 0111 0110 nnnn nnnn Z Z - - 2
+ CMP A, n 0111 0111 nnnn nnnn Z Z C H 2
*/
m_cycles = 2;
@@ -1173,14 +1173,14 @@ void tlcs870_device::do_ALUOP_A_inx(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- ADDC A, (x) 0111 1000 xxxx xxxx C Z C H 4
- ADD A, (x) 0111 1001 xxxx xxxx C Z C H 4
- SUBB A, (x) 0111 1010 xxxx xxxx C Z C H 4
- SUB A, (x) 0111 1011 xxxx xxxx C Z C H 4
- AND A, (x) 0111 1100 xxxx xxxx Z Z - - 4
- XOR A, (x) 0111 1101 xxxx xxxx Z Z - - 4
- OR A, (x) 0111 1110 xxxx xxxx Z Z - - 4
- CMP A, (x) 0111 1111 xxxx xxxx Z Z C H 4
+ ADDC A, (x) 0111 1000 xxxx xxxx C Z C H 4
+ ADD A, (x) 0111 1001 xxxx xxxx C Z C H 4
+ SUBB A, (x) 0111 1010 xxxx xxxx C Z C H 4
+ SUB A, (x) 0111 1011 xxxx xxxx C Z C H 4
+ AND A, (x) 0111 1100 xxxx xxxx Z Z - - 4
+ XOR A, (x) 0111 1101 xxxx xxxx Z Z - - 4
+ OR A, (x) 0111 1110 xxxx xxxx Z Z - - 4
+ CMP A, (x) 0111 1111 xxxx xxxx Z Z C H 4
*/
m_cycles = 4;
@@ -1204,7 +1204,7 @@ void tlcs870_device::do_LDW_inx_mn(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- LDW (x), mn 0010 0100 xxxx xxxx nnnn nnnn mmmm mmmm 1 - - - 6
+ LDW (x), mn 0010 0100 xxxx xxxx nnnn nnnn mmmm mmmm 1 - - - 6
*/
m_cycles = 6;
@@ -1221,7 +1221,7 @@ void tlcs870_device::do_LDW_inHL_mn(const uint8_t opbyte0)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- LDW (HL), mn 0010 0101 nnnn nnnn mmmm mmmm 1 - - - 5
+ LDW (HL), mn 0010 0101 nnnn nnnn mmmm mmmm 1 - - - 5
*/
m_cycles = 5;
diff --git a/src/devices/cpu/tlcs870/tlcs870_ops_dst.cpp b/src/devices/cpu/tlcs870/tlcs870_ops_dst.cpp
index 3f5a77d0217..058368d5a5d 100644
--- a/src/devices/cpu/tlcs870/tlcs870_ops_dst.cpp
+++ b/src/devices/cpu/tlcs870/tlcs870_ops_dst.cpp
@@ -6,19 +6,19 @@
(dst) prefix ops (f0 to f7 subtable)
- (dst) address depends on the first byte of the opcode
+ (dst) address depends on the first byte of the opcode
- F0 (x)
- F1 invalid (would be (PC+A) based on the src table, check for undefined behavior?)
- F2 (DE)
- F3 (HL)
- F4 (HL+d)
- F5 invalid (would be (HL+C) based on the src table, check for undefined behavior?)
- F6 (HL+)
- F7 (-HL)
+ F0 (x)
+ F1 invalid (would be (PC+A) based on the src table, check for undefined behavior?)
+ F2 (DE)
+ F3 (HL)
+ F4 (HL+d)
+ F5 invalid (would be (HL+C) based on the src table, check for undefined behavior?)
+ F6 (HL+)
+ F7 (-HL)
- note, in cases where the address is an immediate value, not a register (x) and (HL+d) the
- immediate value is directly after the first byte of the opcode
+ note, in cases where the address is an immediate value, not a register (x) and (HL+d) the
+ immediate value is directly after the first byte of the opcode
*************************************************************************************************************/
@@ -83,17 +83,17 @@ void tlcs870_device::do_LD_indst_rr(const uint8_t opbyte0, const uint8_t opbyte1
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- LD (x), rr 1111 0000 xxxx xxxx 0001 00rr 1 - - - 5
- LD (PC+A), rr invalid encoding (all PC+A are invalid for dst) ? ? ? ? ?
- LD (DE), rr 1111 0010 0001 00rr 1 - - - 4
- LD (HL), rr 1111 0011 0001 00rr 1 - - - 4
- LD (HL+d), rr 1111 0100 dddd dddd 0001 00rr 1 - - - 6
- LD (HL+C), rr invalid encoding (all HL+C are invalid for dst) ? ? ? ? ?
- LD (HL+), rr not listed, invalid due to 16-bit op? ? ? ? ? ?
- LD (-HL), rr not listed, invalid due to 16-bit op? ? ? ? ? ?
-
- aka LD (dst),rr
- (dst) can only be (x) (pp) or (HL+d) ? not (HL+) or (-HL) ?
+ LD (x), rr 1111 0000 xxxx xxxx 0001 00rr 1 - - - 5
+ LD (PC+A), rr invalid encoding (all PC+A are invalid for dst) ? ? ? ? ?
+ LD (DE), rr 1111 0010 0001 00rr 1 - - - 4
+ LD (HL), rr 1111 0011 0001 00rr 1 - - - 4
+ LD (HL+d), rr 1111 0100 dddd dddd 0001 00rr 1 - - - 6
+ LD (HL+C), rr invalid encoding (all HL+C are invalid for dst) ? ? ? ? ?
+ LD (HL+), rr not listed, invalid due to 16-bit op? ? ? ? ? ?
+ LD (-HL), rr not listed, invalid due to 16-bit op? ? ? ? ? ?
+
+ aka LD (dst),rr
+ (dst) can only be (x) (pp) or (HL+d) ? not (HL+) or (-HL) ?
*/
m_cycles += 4;
@@ -111,17 +111,17 @@ void tlcs870_device::do_LD_indst_n(const uint8_t opbyte0, const uint8_t opbyte1,
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- LD (x), n not listed, redundant encoding? ? ? ? ? ?
- LD (PC+A), n invalid encoding (all PC+A are invalid for dst) ? ? ? ? ?
- LD (DE), n 1111 0010 0010 1100 nnnn nnnn 1 - - - 4
- LD (HL), n not listed, redundant encoding? ? ? ? ? ?
- LD (HL+d), n 1111 0100 dddd dddd 0010 1100 nnnn nnnn 1 - - - 6
- LD (HL+C), n invalid encoding (all HL+C are invalid for dst) ? ? ? ? ?
- LD (HL+), n 1111 0110 0010 1100 nnnn nnnn 1 - - - 5
- LD (-HL), n 1111 0111 0010 1100 nnnn nnnn 1 - - - 5
-
- aka (dst),n
- (dst) can only be (DE), (HL+), (-HL), or (HL+d) because (x) and (HL) are redundant encodings?
+ LD (x), n not listed, redundant encoding? ? ? ? ? ?
+ LD (PC+A), n invalid encoding (all PC+A are invalid for dst) ? ? ? ? ?
+ LD (DE), n 1111 0010 0010 1100 nnnn nnnn 1 - - - 4
+ LD (HL), n not listed, redundant encoding? ? ? ? ? ?
+ LD (HL+d), n 1111 0100 dddd dddd 0010 1100 nnnn nnnn 1 - - - 6
+ LD (HL+C), n invalid encoding (all HL+C are invalid for dst) ? ? ? ? ?
+ LD (HL+), n 1111 0110 0010 1100 nnnn nnnn 1 - - - 5
+ LD (-HL), n 1111 0111 0010 1100 nnnn nnnn 1 - - - 5
+
+ aka (dst),n
+ (dst) can only be (DE), (HL+), (-HL), or (HL+d) because (x) and (HL) are redundant encodings?
*/
m_cycles += 4;
@@ -135,16 +135,16 @@ void tlcs870_device::do_LD_indst_r(const uint8_t opbyte0, const uint8_t opbyte1,
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- LD (x), r 1111 0000 xxxx xxxx 0101 1rrr 1 - - - 4
- LD (PC+A), r invalid encoding (all PC+A are invalid for dst) ? ? ? ? ?
- LD (DE), r 1111 0010 0101 1rrr 1 - - - 3
- LD (HL), r 1111 0011 0101 1rrr 1 - - - 3
- LD (HL+d), r 1111 0100 dddd dddd 0101 1rrr 1 - - - 5
- LD (HL+C), r invalid encoding (all HL+C are invalid for dst) ? ? ? ? ?
- LD (HL+), r 1111 0110 0101 0rrr 1 - - - 4 (invalid if r is H or L)
- LD (-HL), r 1111 0111 0101 0rrr 1 - - - 4
-
- aka LD (dst),r
+ LD (x), r 1111 0000 xxxx xxxx 0101 1rrr 1 - - - 4
+ LD (PC+A), r invalid encoding (all PC+A are invalid for dst) ? ? ? ? ?
+ LD (DE), r 1111 0010 0101 1rrr 1 - - - 3
+ LD (HL), r 1111 0011 0101 1rrr 1 - - - 3
+ LD (HL+d), r 1111 0100 dddd dddd 0101 1rrr 1 - - - 5
+ LD (HL+C), r invalid encoding (all HL+C are invalid for dst) ? ? ? ? ?
+ LD (HL+), r 1111 0110 0101 0rrr 1 - - - 4 (invalid if r is H or L)
+ LD (-HL), r 1111 0111 0101 0rrr 1 - - - 4
+
+ aka LD (dst),r
*/
m_cycles += 3;
diff --git a/src/devices/cpu/tlcs870/tlcs870_ops_helper.cpp b/src/devices/cpu/tlcs870/tlcs870_ops_helper.cpp
index c2fb2fb90cb..d0e6f9de3ef 100644
--- a/src/devices/cpu/tlcs870/tlcs870_ops_helper.cpp
+++ b/src/devices/cpu/tlcs870/tlcs870_ops_helper.cpp
@@ -216,35 +216,35 @@ const bool tlcs870_device::check_jump_condition(int param1)
return takejump;
}
-/*
- All 16-bit ALU ops that would set the 'H' flag list the behavior as undefined.
- Logically the half flag would be the 8/9 bit carry (usual C flag) in a 16-bit
- op, but since this isn't listed as being the case there's a chance the behavior
- is something unexpected, such as still using the 3/4 carry, or, if it's
- internally handled as 4 4-bit operations, maybe the 12/13 bit carry
-
- This needs testing on hardware.
-
- (8-bit) JF ZF CF HF
- ADDC C Z C H
- ADD C Z C H
- SUBB C Z C H
- SUB C Z C H
- AND Z Z - -
- XOR Z Z - -
- OR Z Z - -
- CMP Z Z C H
-
- (16-bit)
- ADDC C Z C U
- ADD C Z C U
- SUBB C Z C U
- SUB C Z C U
- AND Z Z - -
- XOR Z Z - -
- OR Z Z - -
- CMP Z Z C U
-
+/*
+ All 16-bit ALU ops that would set the 'H' flag list the behavior as undefined.
+ Logically the half flag would be the 8/9 bit carry (usual C flag) in a 16-bit
+ op, but since this isn't listed as being the case there's a chance the behavior
+ is something unexpected, such as still using the 3/4 carry, or, if it's
+ internally handled as 4 4-bit operations, maybe the 12/13 bit carry
+
+ This needs testing on hardware.
+
+ (8-bit) JF ZF CF HF
+ ADDC C Z C H
+ ADD C Z C H
+ SUBB C Z C H
+ SUB C Z C H
+ AND Z Z - -
+ XOR Z Z - -
+ OR Z Z - -
+ CMP Z Z C H
+
+ (16-bit)
+ ADDC C Z C U
+ ADD C Z C U
+ SUBB C Z C U
+ SUB C Z C U
+ AND Z Z - -
+ XOR Z Z - -
+ OR Z Z - -
+ CMP Z Z C U
+
*/
uint8_t tlcs870_device::do_add_8bit(uint16_t param1, uint16_t param2)
diff --git a/src/devices/cpu/tlcs870/tlcs870_ops_reg.cpp b/src/devices/cpu/tlcs870/tlcs870_ops_reg.cpp
index 9a5177d5831..74cbd7d071a 100644
--- a/src/devices/cpu/tlcs870/tlcs870_ops_reg.cpp
+++ b/src/devices/cpu/tlcs870/tlcs870_ops_reg.cpp
@@ -6,31 +6,31 @@
(reg) prefix ops (e8 to ef subtable)
- (reg) implies one of the follow registers
+ (reg) implies one of the follow registers
(8-bit mode operations)
- E8 A
- E9 W
- EA C
- EB B
- EC E
- ED D
- EE L
- EF H
-
- (16-bit mode operations)
+ E8 A
+ E9 W
+ EA C
+ EB B
+ EC E
+ ED D
+ EE L
+ EF H
+
+ (16-bit mode operations)
E8 WA
- E9 BC
- EA DE
- EB HL
- EC WA
- ED BC
- EE DE
- EF HL
-
- (RETN operation - special)
- E8 RETN
- E9-EF invalid
+ E9 BC
+ EA DE
+ EB HL
+ EC WA
+ ED BC
+ EE DE
+ EF HL
+
+ (RETN operation - special)
+ E8 RETN
+ E9-EF invalid
*************************************************************************************************************/
@@ -145,9 +145,9 @@ void tlcs870_device::do_RETN(const uint8_t opbyte0, const uint8_t opbyte1)
if (opbyte0 == 0xe8)
{
/*
- Return from non-maskable interrupt service (how does this differ from RETI?)
- OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- RETN 1110 1000 0000 0100 * * * * 7
+ Return from non-maskable interrupt service (how does this differ from RETI?)
+ OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
+ RETN 1110 1000 0000 0100 * * * * 7
*/
m_cycles = 7;
@@ -169,7 +169,7 @@ void tlcs870_device::do_SWAP_g(const uint8_t opbyte0, const uint8_t opbyte1)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- SWAP g 1110 1ggg 0000 0001 1 - - - 4
+ SWAP g 1110 1ggg 0000 0001 1 - - - 4
*/
m_cycles = 4;
@@ -181,7 +181,7 @@ void tlcs870_device::do_DAA_g(const uint8_t opbyte0, const uint8_t opbyte1)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- DAS g 1110 1ggg 0000 1010 C Z C H 3
+ DAS g 1110 1ggg 0000 1010 C Z C H 3
*/
m_cycles = 3;
@@ -197,7 +197,7 @@ void tlcs870_device::do_DAS_g(const uint8_t opbyte0, const uint8_t opbyte1)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- DAS g 1110 1ggg 0000 1011 C Z C H 3
+ DAS g 1110 1ggg 0000 1011 C Z C H 3
*/
m_cycles = 3;
@@ -212,9 +212,9 @@ void tlcs870_device::do_DAS_g(const uint8_t opbyte0, const uint8_t opbyte1)
void tlcs870_device::do_SHLC_g(const uint8_t opbyte0, const uint8_t opbyte1)
{
/*
- Logical Shift Left with Carry Flag
+ Logical Shift Left with Carry Flag
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- SHLC g 1110 1ggg 0001 1100 C Z * - 2
+ SHLC g 1110 1ggg 0001 1100 C Z * - 2
*/
m_cycles = 2;
@@ -228,9 +228,9 @@ void tlcs870_device::do_SHLC_g(const uint8_t opbyte0, const uint8_t opbyte1)
void tlcs870_device::do_SHRC_g(const uint8_t opbyte0, const uint8_t opbyte1)
{
/*
- Logical Shift Right with Carry Flag
+ Logical Shift Right with Carry Flag
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- SHRC g 1110 1ggg 0001 1101 C Z * - 2
+ SHRC g 1110 1ggg 0001 1101 C Z * - 2
*/
m_cycles = 2;
@@ -244,9 +244,9 @@ void tlcs870_device::do_SHRC_g(const uint8_t opbyte0, const uint8_t opbyte1)
void tlcs870_device::do_ROLC_g(const uint8_t opbyte0, const uint8_t opbyte1)
{
/*
- Rotate Left through Carry flag
+ Rotate Left through Carry flag
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- ROLC g 1110 1ggg 0001 1110 C Z * - 2
+ ROLC g 1110 1ggg 0001 1110 C Z * - 2
*/
m_cycles = 2;
@@ -261,9 +261,9 @@ void tlcs870_device::do_ROLC_g(const uint8_t opbyte0, const uint8_t opbyte1)
void tlcs870_device::do_RORC_g(const uint8_t opbyte0, const uint8_t opbyte1)
{
/*
- Rotate Right through Carry flag
+ Rotate Right through Carry flag
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- RORC g 1110 1ggg 0001 1111 C Z * - 2
+ RORC g 1110 1ggg 0001 1111 C Z * - 2
*/
m_cycles = 2;
@@ -279,7 +279,7 @@ void tlcs870_device::do_LD_r_g(const uint8_t opbyte0, const uint8_t opbyte1)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- LD r, g 1110 1ggg 0101 1rrr 1 Z - - 2
+ LD r, g 1110 1ggg 0101 1rrr 1 Z - - 2
*/
m_cycles = 2;
@@ -296,7 +296,7 @@ void tlcs870_device::do_XCH_r_g(const uint8_t opbyte0, const uint8_t opbyte1)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- XCG r, g 1110 1ggg 1010 1rrr 1 Z - - 3
+ XCG r, g 1110 1ggg 1010 1rrr 1 Z - - 3
*/
m_cycles = 3;
@@ -320,14 +320,14 @@ void tlcs870_device::do_ALUOP_A_g(const uint8_t opbyte0, const uint8_t opbyte1)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- ADDC A, g 1110 1ggg 0110 0000 C Z C H 2
- ADD A, g 1110 1ggg 0110 0001 C Z C H 2
- SUBB A, g 1110 1ggg 0110 0010 C Z C H 2
- SUB A, g 1110 1ggg 0110 0011 C Z C H 2
- AND A, g 1110 1ggg 0110 0100 Z Z - - 2
- XOR A, g 1110 1ggg 0110 0101 Z Z - - 2
- OR A, g 1110 1ggg 0110 0110 Z Z - - 2
- CMP A, g 1110 1ggg 0110 0111 Z Z C H 2
+ ADDC A, g 1110 1ggg 0110 0000 C Z C H 2
+ ADD A, g 1110 1ggg 0110 0001 C Z C H 2
+ SUBB A, g 1110 1ggg 0110 0010 C Z C H 2
+ SUB A, g 1110 1ggg 0110 0011 C Z C H 2
+ AND A, g 1110 1ggg 0110 0100 Z Z - - 2
+ XOR A, g 1110 1ggg 0110 0101 Z Z - - 2
+ OR A, g 1110 1ggg 0110 0110 Z Z - - 2
+ CMP A, g 1110 1ggg 0110 0111 Z Z C H 2
*/
m_cycles = 2;
@@ -345,14 +345,14 @@ void tlcs870_device::do_ALUOP_g_A(const uint8_t opbyte0, const uint8_t opbyte1)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- ADDC g, A 1110 1ggg 0110 1000 C Z C H 3
- ADD g, A 1110 1ggg 0110 1001 C Z C H 3
- SUBB g, A 1110 1ggg 0110 1010 C Z C H 3
- SUB g, A 1110 1ggg 0110 1011 C Z C H 3
- AND g, A 1110 1ggg 0110 1100 Z Z - - 3
- XOR g, A 1110 1ggg 0110 1101 Z Z - - 3
- OR g, A 1110 1ggg 0110 1110 Z Z - - 3
- CMP g, A 1110 1ggg 0110 1111 Z Z C H 3
+ ADDC g, A 1110 1ggg 0110 1000 C Z C H 3
+ ADD g, A 1110 1ggg 0110 1001 C Z C H 3
+ SUBB g, A 1110 1ggg 0110 1010 C Z C H 3
+ SUB g, A 1110 1ggg 0110 1011 C Z C H 3
+ AND g, A 1110 1ggg 0110 1100 Z Z - - 3
+ XOR g, A 1110 1ggg 0110 1101 Z Z - - 3
+ OR g, A 1110 1ggg 0110 1110 Z Z - - 3
+ CMP g, A 1110 1ggg 0110 1111 Z Z C H 3
*/
m_cycles = 3;
@@ -369,14 +369,14 @@ void tlcs870_device::do_ALUOP_g_n(const uint8_t opbyte0, const uint8_t opbyte1)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- ADDC g, n 1110 1ggg 0111 0000 nnnn nnnn C Z C H 3
- ADD g, n 1110 1ggg 0111 0001 nnnn nnnn C Z C H 3
- SUBB g, n 1110 1ggg 0111 0010 nnnn nnnn C Z C H 3
- SUB g, n 1110 1ggg 0111 0011 nnnn nnnn C Z C H 3
- AND g, n 1110 1ggg 0111 0100 nnnn nnnn Z Z - - 3
- XOR g, n 1110 1ggg 0111 0101 nnnn nnnn Z Z - - 3
- OR g, n 1110 1ggg 0111 0110 nnnn nnnn Z Z - - 3
- CMP g, n 1110 1ggg 0111 0111 nnnn nnnn Z Z C H 3
+ ADDC g, n 1110 1ggg 0111 0000 nnnn nnnn C Z C H 3
+ ADD g, n 1110 1ggg 0111 0001 nnnn nnnn C Z C H 3
+ SUBB g, n 1110 1ggg 0111 0010 nnnn nnnn C Z C H 3
+ SUB g, n 1110 1ggg 0111 0011 nnnn nnnn C Z C H 3
+ AND g, n 1110 1ggg 0111 0100 nnnn nnnn Z Z - - 3
+ XOR g, n 1110 1ggg 0111 0101 nnnn nnnn Z Z - - 3
+ OR g, n 1110 1ggg 0111 0110 nnnn nnnn Z Z - - 3
+ CMP g, n 1110 1ggg 0111 0111 nnnn nnnn Z Z C H 3
*/
m_cycles = 3;
@@ -400,14 +400,14 @@ void tlcs870_device::do_ALUOP_WA_gg(const uint8_t opbyte0, const uint8_t opbyte1
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- ADDC WA, gg 1110 10gg 0011 0000 C Z C U 4
- ADD WA, gg 1110 10gg 0011 0001 C Z C U 4
- SUBB WA, gg 1110 10gg 0011 0010 C Z C U 4
- SUB WA, gg 1110 10gg 0011 0011 C Z C U 4
- AND WA, gg 1110 10gg 0011 0100 Z Z - - 4
- XOR WA, gg 1110 10gg 0011 0101 Z Z - - 4
- OR WA, gg 1110 10gg 0011 0110 Z Z - - 4
- CMP WA, gg 1110 10gg 0011 0111 Z Z C U 4
+ ADDC WA, gg 1110 10gg 0011 0000 C Z C U 4
+ ADD WA, gg 1110 10gg 0011 0001 C Z C U 4
+ SUBB WA, gg 1110 10gg 0011 0010 C Z C U 4
+ SUB WA, gg 1110 10gg 0011 0011 C Z C U 4
+ AND WA, gg 1110 10gg 0011 0100 Z Z - - 4
+ XOR WA, gg 1110 10gg 0011 0101 Z Z - - 4
+ OR WA, gg 1110 10gg 0011 0110 Z Z - - 4
+ CMP WA, gg 1110 10gg 0011 0111 Z Z C U 4
*/
m_cycles = 4;
@@ -426,14 +426,14 @@ void tlcs870_device::do_ALUOP_gg_mn(const uint8_t opbyte0, const uint8_t opbyte1
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- ADDC gg, mn 1110 10gg 0011 1000 nnnn nnnn mmmm mmmm C Z C U 4
- ADD gg, mn 1110 10gg 0011 1001 nnnn nnnn mmmm mmmm C Z C U 4
- SUBB gg, mn 1110 10gg 0011 1010 nnnn nnnn mmmm mmmm C Z C U 4
- SUB gg, mn 1110 10gg 0011 1011 nnnn nnnn mmmm mmmm C Z C U 4
- AND gg, mn 1110 10gg 0011 1100 nnnn nnnn mmmm mmmm Z Z - - 4
- XOR gg, mn 1110 10gg 0011 1101 nnnn nnnn mmmm mmmm Z Z - - 4
- OR gg, mn 1110 10gg 0011 1110 nnnn nnnn mmmm mmmm Z Z - - 4
- CMP gg, mn 1110 10gg 0011 1111 nnnn nnnn mmmm mmmm Z Z C U 4
+ ADDC gg, mn 1110 10gg 0011 1000 nnnn nnnn mmmm mmmm C Z C U 4
+ ADD gg, mn 1110 10gg 0011 1001 nnnn nnnn mmmm mmmm C Z C U 4
+ SUBB gg, mn 1110 10gg 0011 1010 nnnn nnnn mmmm mmmm C Z C U 4
+ SUB gg, mn 1110 10gg 0011 1011 nnnn nnnn mmmm mmmm C Z C U 4
+ AND gg, mn 1110 10gg 0011 1100 nnnn nnnn mmmm mmmm Z Z - - 4
+ XOR gg, mn 1110 10gg 0011 1101 nnnn nnnn mmmm mmmm Z Z - - 4
+ OR gg, mn 1110 10gg 0011 1110 nnnn nnnn mmmm mmmm Z Z - - 4
+ CMP gg, mn 1110 10gg 0011 1111 nnnn nnnn mmmm mmmm Z Z C U 4
*/
m_cycles = 4;
@@ -459,8 +459,8 @@ void tlcs870_device::do_SET_inppbit(const uint8_t opbyte0, const uint8_t opbyte1
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- SET (DE).g 1110 1ggg 1000 0010 Z * - - 5
- SET (HL).g 1110 1ggg 1000 0011 Z * - - 5
+ SET (DE).g 1110 1ggg 1000 0010 Z * - - 5
+ SET (HL).g 1110 1ggg 1000 0011 Z * - - 5
*/
m_cycles = 5;
@@ -489,8 +489,8 @@ void tlcs870_device::do_CLR_inppbit(const uint8_t opbyte0, const uint8_t opbyte1
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- CLR (DE).g 1110 1ggg 1000 1010 Z * - - 5
- CLR (HL).g 1110 1ggg 1000 1011 Z * - - 5
+ CLR (DE).g 1110 1ggg 1000 1010 Z * - - 5
+ CLR (HL).g 1110 1ggg 1000 1011 Z * - - 5
*/
m_cycles = 5;
@@ -520,8 +520,8 @@ void tlcs870_device::do_CPL_inpp_indirectbit(const uint8_t opbyte0, const uint8_
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- CPL (DE).g 1110 1ggg 1001 0010 Z * - - 5
- CPL (HL).g 1110 1ggg 1001 0011 Z * - - 5
+ CPL (DE).g 1110 1ggg 1001 0010 Z * - - 5
+ CPL (HL).g 1110 1ggg 1001 0011 Z * - - 5
*/
m_cycles = 5;
@@ -555,8 +555,8 @@ void tlcs870_device::do_LD_inpp_indirectbit_CF(const uint8_t opbyte0, const uint
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- LD (DE).g, CF 1110 1ggg 1001 1010 1 - - - 5
- LD (HL).g, CF 1110 1ggg 1001 1011 1 - - - 5
+ LD (DE).g, CF 1110 1ggg 1001 1010 1 - - - 5
+ LD (HL).g, CF 1110 1ggg 1001 1011 1 - - - 5
*/
m_cycles = 5;
@@ -585,10 +585,10 @@ void tlcs870_device::do_LD_CF_inpp_indirectbit(const uint8_t opbyte0, const uint
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- LD CF, (DE).g 1110 1ggg 1001 1110 ~C - * - 4
- LD CF, (HL).g 1110 1ggg 1001 1111 ~C - * - 4
+ LD CF, (DE).g 1110 1ggg 1001 1110 ~C - * - 4
+ LD CF, (HL).g 1110 1ggg 1001 1111 ~C - * - 4
- aka aka TEST (pp).g
+ aka aka TEST (pp).g
*/
m_cycles = 4;
@@ -610,7 +610,7 @@ void tlcs870_device::do_SET_gbit(const uint8_t opbyte0, const uint8_t opbyte1)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- SET g.b 1110 1ggg 0100 0bbb Z * - - 3
+ SET g.b 1110 1ggg 0100 0bbb Z * - - 3
*/
m_cycles = 3;
@@ -639,7 +639,7 @@ void tlcs870_device::do_CLR_gbit(const uint8_t opbyte0, const uint8_t opbyte1)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- CLR g.b 1110 1ggg 0100 1bbb Z * - - 3
+ CLR g.b 1110 1ggg 0100 1bbb Z * - - 3
*/
m_cycles = 3;
@@ -668,7 +668,7 @@ void tlcs870_device::do_CPL_gbit(const uint8_t opbyte0, const uint8_t opbyte1)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- CPL g.b 1110 1ggg 1100 0bbb Z * - - 3
+ CPL g.b 1110 1ggg 1100 0bbb Z * - - 3
*/
m_cycles = 3;
@@ -701,7 +701,7 @@ void tlcs870_device::do_LD_gbit_CF(const uint8_t opbyte0, const uint8_t opbyte1)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- LD g.b, CF 1110 1ggg 1100 1bbb 1 - - - 2
+ LD g.b, CF 1110 1ggg 1100 1bbb 1 - - - 2
*/
m_cycles = 2;
@@ -730,7 +730,7 @@ void tlcs870_device::do_XOR_CF_gbit(const uint8_t opbyte0, const uint8_t opbyte1
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- XOR CF, g.b 1110 1ggg 1101 0bbb ~C - * - 2
+ XOR CF, g.b 1110 1ggg 1101 0bbb ~C - * - 2
*/
m_cycles = 2;
@@ -776,9 +776,9 @@ void tlcs870_device::do_LD_CF_gbit(const uint8_t opbyte0, const uint8_t opbyte1)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- LD CF, g.b 1110 1ggg 1101 1bbb ~C - * - 2
+ LD CF, g.b 1110 1ggg 1101 1bbb ~C - * - 2
- aka TEST g.b
+ aka TEST g.b
*/
m_cycles = 2;
@@ -802,12 +802,12 @@ void tlcs870_device::do_MUL_gg(const uint8_t opbyte0, const uint8_t opbyte1)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- MUL W, A not listed (redundant encoding?) ? ? ? ? ?
- MUL B, C 1110 1010 0000 0010 Z Z - - 8
- MUL D, E 1110 1010 0000 0010 Z Z - - 8
- MUL H, L 1110 1011 0000 0010 Z Z - - 8
+ MUL W, A not listed (redundant encoding?) ? ? ? ? ?
+ MUL B, C 1110 1010 0000 0010 Z Z - - 8
+ MUL D, E 1110 1010 0000 0010 Z Z - - 8
+ MUL H, L 1110 1011 0000 0010 Z Z - - 8
- aka MUL ggH, ggL (odd syntax, basically MUL gg)
+ aka MUL ggH, ggL (odd syntax, basically MUL gg)
*/
m_cycles = 8;
@@ -819,10 +819,10 @@ void tlcs870_device::do_DIV_gg_C(const uint8_t opbyte0, const uint8_t opbyte1)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- DIV WA, C not listed (redundant encoding?) ? ? ? ? ?
- DIV BC, C not listed (illegal?) ? ? ? ? ?
- DIV DE, C 1110 1010 0000 0011 Z Z C - 8
- DIV HL, C 1110 1011 0000 0011 Z Z C - 8
+ DIV WA, C not listed (redundant encoding?) ? ? ? ? ?
+ DIV BC, C not listed (illegal?) ? ? ? ? ?
+ DIV DE, C 1110 1010 0000 0011 Z Z C - 8
+ DIV HL, C 1110 1011 0000 0011 Z Z C - 8
*/
m_cycles = 8;
@@ -834,7 +834,7 @@ void tlcs870_device::do_POP_gg(const uint8_t opbyte0, const uint8_t opbyte1)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- POP gg 1110 10gg 0000 0110 - - - - 5
+ POP gg 1110 10gg 0000 0110 - - - - 5
*/
m_cycles = 5;
@@ -848,7 +848,7 @@ void tlcs870_device::do_PUSH_gg(const uint8_t opbyte0, const uint8_t opbyte1)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- PUSH gg 1110 10gg 0000 0111 - - - - 4
+ PUSH gg 1110 10gg 0000 0111 - - - - 4
*/
m_cycles = 4;
@@ -863,7 +863,7 @@ void tlcs870_device::do_LD_SP_gg(const uint8_t opbyte0, const uint8_t opbyte1)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- LD SP, gg 1110 10gg 1111 1010 1 - - - 3
+ LD SP, gg 1110 10gg 1111 1010 1 - - - 3
*/
m_cycles = 3;
@@ -875,7 +875,7 @@ void tlcs870_device::do_LD_gg_SP(const uint8_t opbyte0, const uint8_t opbyte1)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- LD gg, SP 1110 10gg 1111 1011 1 - - - 3
+ LD gg, SP 1110 10gg 1111 1011 1 - - - 3
*/
m_cycles = 3;
@@ -887,7 +887,7 @@ void tlcs870_device::do_LD_rr_gg(const uint8_t opbyte0, const uint8_t opbyte1)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- LD rr, gg 1110 10gg 0001 00rr 1 - - - 2
+ LD rr, gg 1110 10gg 0001 00rr 1 - - - 2
*/
m_cycles = 2;
@@ -902,7 +902,7 @@ void tlcs870_device::do_XCH_rr_gg(const uint8_t opbyte0, const uint8_t opbyte1)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- XCH rr, gg 1110 10gg 0001 01rr 1 - - - 3
+ XCH rr, gg 1110 10gg 0001 01rr 1 - - - 3
*/
m_cycles = 3;
@@ -920,7 +920,7 @@ void tlcs870_device::do_CALL_gg(const uint8_t opbyte0, const uint8_t opbyte1)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- CALL gg 1110 10gg 1111 1100 - - - - 6
+ CALL gg 1110 10gg 1111 1100 - - - - 6
*/
m_cycles = 6;
@@ -938,7 +938,7 @@ void tlcs870_device::do_JP_gg(const uint8_t opbyte0, const uint8_t opbyte1)
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- JP gg 1110 10gg 1111 1110 1 - - - 3
+ JP gg 1110 10gg 1111 1110 1 - - - 3
*/
m_cycles = 3;
diff --git a/src/devices/cpu/tlcs870/tlcs870_ops_src.cpp b/src/devices/cpu/tlcs870/tlcs870_ops_src.cpp
index 6295d9c06b3..3f4103f7b4a 100644
--- a/src/devices/cpu/tlcs870/tlcs870_ops_src.cpp
+++ b/src/devices/cpu/tlcs870/tlcs870_ops_src.cpp
@@ -6,19 +6,19 @@
(src) prefix ops (e0 to e7 subtable)
- (src) address depends on the first byte of the opcode
+ (src) address depends on the first byte of the opcode
- E0 (x)
- E1 (PC+A)
- E2 (DE)
- E3 (HL)
- E4 (HL+d)
- E5 (HL+C)
- E6 (HL+)
- E7 (-HL)
+ E0 (x)
+ E1 (PC+A)
+ E2 (DE)
+ E3 (HL)
+ E4 (HL+d)
+ E5 (HL+C)
+ E6 (HL+)
+ E7 (-HL)
- note, in cases where the address is an immediate value, not a register (x) and (HL+d) the
- immediate value is directly after the first byte of the opcode
+ note, in cases where the address is an immediate value, not a register (x) and (HL+d) the
+ immediate value is directly after the first byte of the opcode
*************************************************************************************************************/
@@ -109,16 +109,16 @@ void tlcs870_device::do_LD_rr_insrc(const uint8_t opbyte0, const uint8_t opbyte1
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- LD rr, (x) 1110 0000 xxxx xxxx 0001 01rr 1 - - - 5
- LD rr, (PC+A) 1110 0001 0001 01rr 1 - - - 6
- LD rr, (DE) 1110 0010 0001 01rr 1 - - - 4
- LD rr, (HL) 1110 0011 0001 01rr 1 - - - 4
- LD rr, (HL+d) 1110 0100 dddd dddd 0001 01rr 1 - - - 6
- LD rr, (HL+C) 1110 0101 0001 01rr 1 - - - 6
- LD rr, (HL+) not listed, invalid due to 16-bit op? ? ? ? ? ?
- LD rr, (-HL) not listed, invalid due to 16-bit op? ? ? ? ? ?
-
- aka LD rr, (src)
+ LD rr, (x) 1110 0000 xxxx xxxx 0001 01rr 1 - - - 5
+ LD rr, (PC+A) 1110 0001 0001 01rr 1 - - - 6
+ LD rr, (DE) 1110 0010 0001 01rr 1 - - - 4
+ LD rr, (HL) 1110 0011 0001 01rr 1 - - - 4
+ LD rr, (HL+d) 1110 0100 dddd dddd 0001 01rr 1 - - - 6
+ LD rr, (HL+C) 1110 0101 0001 01rr 1 - - - 6
+ LD rr, (HL+) not listed, invalid due to 16-bit op? ? ? ? ? ?
+ LD rr, (-HL) not listed, invalid due to 16-bit op? ? ? ? ? ?
+
+ aka LD rr, (src)
*/
m_cycles += 4;
@@ -135,16 +135,16 @@ void tlcs870_device::do_INC_insrc(const uint8_t opbyte0, const uint8_t opbyte1,
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- INC (x) not listed, redundant encoding? ? ? ? ? ?
- INC (PC+A) 1110 0001 0010 0000 C Z - - 6
- INC (DE) 1110 0010 0010 0000 C Z - - 4
- INC (HL) not listed, redundant encoding? ? ? ? ? ?
- INC (HL+d) 1110 0100 dddd dddd 0010 0000 C Z - - 6
- INC (HL+C) 1110 0101 0010 0000 C Z - - 6
- INC (HL+) 1110 0110 0010 0000 C Z - - 5
- INC (-HL) 1110 0111 0010 0000 C Z - - 5
-
- aka INC (src)
+ INC (x) not listed, redundant encoding? ? ? ? ? ?
+ INC (PC+A) 1110 0001 0010 0000 C Z - - 6
+ INC (DE) 1110 0010 0010 0000 C Z - - 4
+ INC (HL) not listed, redundant encoding? ? ? ? ? ?
+ INC (HL+d) 1110 0100 dddd dddd 0010 0000 C Z - - 6
+ INC (HL+C) 1110 0101 0010 0000 C Z - - 6
+ INC (HL+) 1110 0110 0010 0000 C Z - - 5
+ INC (-HL) 1110 0111 0010 0000 C Z - - 5
+
+ aka INC (src)
*/
m_cycles += 4;
@@ -169,16 +169,16 @@ void tlcs870_device::do_DEC_insrc(const uint8_t opbyte0, const uint8_t opbyte1,
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- DEC (x) not listed, redundant encoding? ? ? ? ? ?
- DEC (PC+A) 1110 0001 0010 1000 C Z - - 6
- DEC (DE) 1110 0010 0010 1000 C Z - - 4
- DEC (HL) not listed, redundant encoding? ? ? ? ? ?
- DEC (HL+d) 1110 0100 dddd dddd 0010 1000 C Z - - 6
- DEC (HL+C) 1110 0101 0010 1000 C Z - - 6
- DEC (HL+) 1110 0110 0010 1000 C Z - - 5
- DEC (-HL) 1110 0111 0010 1000 C Z - - 5
-
- aka DEC (src)
+ DEC (x) not listed, redundant encoding? ? ? ? ? ?
+ DEC (PC+A) 1110 0001 0010 1000 C Z - - 6
+ DEC (DE) 1110 0010 0010 1000 C Z - - 4
+ DEC (HL) not listed, redundant encoding? ? ? ? ? ?
+ DEC (HL+d) 1110 0100 dddd dddd 0010 1000 C Z - - 6
+ DEC (HL+C) 1110 0101 0010 1000 C Z - - 6
+ DEC (HL+) 1110 0110 0010 1000 C Z - - 5
+ DEC (-HL) 1110 0111 0010 1000 C Z - - 5
+
+ aka DEC (src)
*/
m_cycles += 4;
@@ -211,17 +211,17 @@ void tlcs870_device::do_ROLD_A_insrc(const uint8_t opbyte0, const uint8_t opbyte
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- ROLD A, (x) 1110 0000 xxxx xxxx 0000 1000 1 0 0 0 8
- ROLD A, (PC+A) not listed, invalid? ? ? ? ? ?
- ROLD A, (DE) 1110 0010 0000 1000 1 0 0 0 7
- ROLD A, (HL) 1110 0011 0000 1000 1 0 0 0 7
- ROLD A, (HL+d) 1110 0100 dddd dddd 0000 1000 1 0 0 0 9
- ROLD A, (HL+C) 1110 0101 0000 1000 1 0 0 0 9
- ROLD A, (HL+) 1110 0110 0000 1000 1 0 0 0 8
- ROLD A, (-HL) 1110 0111 0000 1000 1 0 0 0 8
-
- aka ROLD A,(src)
- 12-bit left rotation using lower 4 bits of REG_A and content of (src)
+ ROLD A, (x) 1110 0000 xxxx xxxx 0000 1000 1 0 0 0 8
+ ROLD A, (PC+A) not listed, invalid? ? ? ? ? ?
+ ROLD A, (DE) 1110 0010 0000 1000 1 0 0 0 7
+ ROLD A, (HL) 1110 0011 0000 1000 1 0 0 0 7
+ ROLD A, (HL+d) 1110 0100 dddd dddd 0000 1000 1 0 0 0 9
+ ROLD A, (HL+C) 1110 0101 0000 1000 1 0 0 0 9
+ ROLD A, (HL+) 1110 0110 0000 1000 1 0 0 0 8
+ ROLD A, (-HL) 1110 0111 0000 1000 1 0 0 0 8
+
+ aka ROLD A,(src)
+ 12-bit left rotation using lower 4 bits of REG_A and content of (src)
*/
m_cycles += 7;
@@ -242,17 +242,17 @@ void tlcs870_device::do_RORD_A_insrc(const uint8_t opbyte0, const uint8_t opbyte
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- RORD A, (x) 1110 0000 xxxx xxxx 0000 1001 1 0 0 0 8
- RORD A, (PC+A) not listed, invalid? ? ? ? ? ?
- RORD A, (DE) 1110 0010 0000 1001 1 0 0 0 7
- RORD A, (HL) 1110 0011 0000 1001 1 0 0 0 7
- RORD A, (HL+d) 1110 0100 dddd dddd 0000 1001 1 0 0 0 9
- RORD A, (HL+C) 1110 0101 0000 1001 1 0 0 0 9
- RORD A, (HL+) 1110 0110 0000 1001 1 0 0 0 8
- RORD A, (-HL) 1110 0111 0000 1001 1 0 0 0 8
-
- aka RORD A,(src)
- 12-bit right rotation using lower 4 bits of REG_A and content of (src)
+ RORD A, (x) 1110 0000 xxxx xxxx 0000 1001 1 0 0 0 8
+ RORD A, (PC+A) not listed, invalid? ? ? ? ? ?
+ RORD A, (DE) 1110 0010 0000 1001 1 0 0 0 7
+ RORD A, (HL) 1110 0011 0000 1001 1 0 0 0 7
+ RORD A, (HL+d) 1110 0100 dddd dddd 0000 1001 1 0 0 0 9
+ RORD A, (HL+C) 1110 0101 0000 1001 1 0 0 0 9
+ RORD A, (HL+) 1110 0110 0000 1001 1 0 0 0 8
+ RORD A, (-HL) 1110 0111 0000 1001 1 0 0 0 8
+
+ aka RORD A,(src)
+ 12-bit right rotation using lower 4 bits of REG_A and content of (src)
*/
m_cycles += 7;
@@ -275,16 +275,16 @@ void tlcs870_device::do_LD_inx_insrc(const uint8_t opbyte0, const uint8_t opbyte
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- LD (x), (x) not listed, invalid? or redundant? ? ? ? ? ?
- LD (x), (PC+A) 1110 0001 0010 0110 xxxx xxxx 1 U - - 7
- LD (x), (DE) 1110 0010 0010 0110 xxxx xxxx 1 U - - 5
- LD (x), (HL) 1110 0011 0010 0110 xxxx xxxx 1 U - - 5
- LD (x), (HL+d) 1110 0100 dddd dddd 0010 0110 xxxx xxxx 1 U - - 7
- LD (x), (HL+C) 1110 0101 0010 0110 xxxx xxxx 1 U - - 7
- LD (x), (HL+) not listed, invalid? ? ? ? ? ?
- LD (x), (-HL) not listed, invalid? ? ? ? ? ?
-
- aka LD (x),(src)
+ LD (x), (x) not listed, invalid? or redundant? ? ? ? ? ?
+ LD (x), (PC+A) 1110 0001 0010 0110 xxxx xxxx 1 U - - 7
+ LD (x), (DE) 1110 0010 0010 0110 xxxx xxxx 1 U - - 5
+ LD (x), (HL) 1110 0011 0010 0110 xxxx xxxx 1 U - - 5
+ LD (x), (HL+d) 1110 0100 dddd dddd 0010 0110 xxxx xxxx 1 U - - 7
+ LD (x), (HL+C) 1110 0101 0010 0110 xxxx xxxx 1 U - - 7
+ LD (x), (HL+) not listed, invalid? ? ? ? ? ?
+ LD (x), (-HL) not listed, invalid? ? ? ? ? ?
+
+ aka LD (x),(src)
*/
m_cycles += 5;
@@ -300,16 +300,16 @@ void tlcs870_device::do_LD_inHL_insrc(const uint8_t opbyte0, const uint8_t opbyt
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- LD (HL), (x) 1110 0000 xxxx xxxx 0010 0111 1 Z - - 5
- LD (HL), (PC+A) 1110 0001 0010 0111 1 Z - - 6
- LD (HL), (DE) 1110 0010 0010 0111 1 Z - - 4
- LD (HL), (HL) 1110 0011 0010 0111 1 Z - - 4
- LD (HL), (HL+d) 1110 0100 dddd dddd 0010 0111 1 Z - - 6
- LD (HL), (HL+C) 1110 0101 0010 0111 1 Z - - 6
- LD (HL), (HL+) not listed, invalid? ? ? ? ? ?
- LD (HL), (-HL) not listed, invalid? ? ? ? ? ?
-
- aka LD (HL),(src)
+ LD (HL), (x) 1110 0000 xxxx xxxx 0010 0111 1 Z - - 5
+ LD (HL), (PC+A) 1110 0001 0010 0111 1 Z - - 6
+ LD (HL), (DE) 1110 0010 0010 0111 1 Z - - 4
+ LD (HL), (HL) 1110 0011 0010 0111 1 Z - - 4
+ LD (HL), (HL+d) 1110 0100 dddd dddd 0010 0111 1 Z - - 6
+ LD (HL), (HL+C) 1110 0101 0010 0111 1 Z - - 6
+ LD (HL), (HL+) not listed, invalid? ? ? ? ? ?
+ LD (HL), (-HL) not listed, invalid? ? ? ? ? ?
+
+ aka LD (HL),(src)
*/
m_cycles += 4;
@@ -327,16 +327,16 @@ void tlcs870_device::do_LD_r_insrc(const uint8_t opbyte0, const uint8_t opbyte1,
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- LD r, (x) 1110 0000 xxxx xxxx 0101 1rrr 1 Z - - 4
- LD r, (PC+A) 1110 0001 0101 1rrr 1 Z - - 5
- LD r, (DE) 1110 0010 0101 1rrr 1 Z - - 3
- LD r, (HL) 1110 0011 0101 1rrr 1 Z - - 3
- LD r, (HL+d) 1110 0100 dddd dddd 0101 1rrr 1 Z - - 5
- LD r, (HL+C) 1110 0101 0101 1rrr 1 Z - - 5
- LD r, (HL+) 1110 0110 0101 1rrr 1 Z - - 4 (invalid if r is H or L)
- LD r, (-HL) 1110 0111 0101 1rrr 1 Z - - 4
-
- aka LD r, (src)
+ LD r, (x) 1110 0000 xxxx xxxx 0101 1rrr 1 Z - - 4
+ LD r, (PC+A) 1110 0001 0101 1rrr 1 Z - - 5
+ LD r, (DE) 1110 0010 0101 1rrr 1 Z - - 3
+ LD r, (HL) 1110 0011 0101 1rrr 1 Z - - 3
+ LD r, (HL+d) 1110 0100 dddd dddd 0101 1rrr 1 Z - - 5
+ LD r, (HL+C) 1110 0101 0101 1rrr 1 Z - - 5
+ LD r, (HL+) 1110 0110 0101 1rrr 1 Z - - 4 (invalid if r is H or L)
+ LD r, (-HL) 1110 0111 0101 1rrr 1 Z - - 4
+
+ aka LD r, (src)
*/
m_cycles += 3;
@@ -354,16 +354,16 @@ void tlcs870_device::do_MCMP_insrc_n(const uint8_t opbyte0, const uint8_t opbyte
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- MCMP (x), n 1110 0000 xxxx xxxx 0010 1111 nnnn nnnn Z Z C H 6
- MCMP (PC+A), n 1110 0001 0010 1111 nnnn nnnn Z Z C H 7
- MCMP (DE), n 1110 0010 0010 1111 nnnn nnnn Z Z C H 5
- MCMP (HL), n 1110 0011 0010 1111 nnnn nnnn Z Z C H 5
- MCMP (HL+d), n 1110 0100 dddd dddd 0010 1111 nnnn nnnn Z Z C H 7
- MCMP (HL+C), n 1110 0101 0010 1111 nnnn nnnn Z Z C H 7
- MCMP (HL+), n 1110 0110 0010 1111 nnnn nnnn Z Z C H 6
- MCMP (-HL), n 1110 0111 0010 1111 nnnn nnnn Z Z C H 6
-
- aka MCMP (src), n
+ MCMP (x), n 1110 0000 xxxx xxxx 0010 1111 nnnn nnnn Z Z C H 6
+ MCMP (PC+A), n 1110 0001 0010 1111 nnnn nnnn Z Z C H 7
+ MCMP (DE), n 1110 0010 0010 1111 nnnn nnnn Z Z C H 5
+ MCMP (HL), n 1110 0011 0010 1111 nnnn nnnn Z Z C H 5
+ MCMP (HL+d), n 1110 0100 dddd dddd 0010 1111 nnnn nnnn Z Z C H 7
+ MCMP (HL+C), n 1110 0101 0010 1111 nnnn nnnn Z Z C H 7
+ MCMP (HL+), n 1110 0110 0010 1111 nnnn nnnn Z Z C H 6
+ MCMP (-HL), n 1110 0111 0010 1111 nnnn nnnn Z Z C H 6
+
+ aka MCMP (src), n
*/
m_cycles += 5;
@@ -403,16 +403,16 @@ void tlcs870_device::do_XCH_r_insrc(const uint8_t opbyte0, const uint8_t opbyte1
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- XCH r, (x) 1110 0000 xxxx xxxx 1010 1rrr 1 Z - - 5
- XCH r, (PC+A) 1110 0001 1010 1rrr 1 Z - - 6
- XCH r, (DE) 1110 0010 1010 1rrr 1 Z - - 4
- XCH r, (HL) 1110 0011 1010 1rrr 1 Z - - 4
- XCH r, (HL+d) 1110 0100 dddd dddd 1010 1rrr 1 Z - - 6
- XCH r, (HL+C) 1110 0101 1010 1rrr 1 Z - - 6
- XCH r, (HL+) 1110 0110 1010 1rrr 1 Z - - 5 (invalid if r is H or L)
- XCH r, (-HL) 1110 0111 1010 1rrr 1 Z - - 5
-
- aka XCH r,(src)
+ XCH r, (x) 1110 0000 xxxx xxxx 1010 1rrr 1 Z - - 5
+ XCH r, (PC+A) 1110 0001 1010 1rrr 1 Z - - 6
+ XCH r, (DE) 1110 0010 1010 1rrr 1 Z - - 4
+ XCH r, (HL) 1110 0011 1010 1rrr 1 Z - - 4
+ XCH r, (HL+d) 1110 0100 dddd dddd 1010 1rrr 1 Z - - 6
+ XCH r, (HL+C) 1110 0101 1010 1rrr 1 Z - - 6
+ XCH r, (HL+) 1110 0110 1010 1rrr 1 Z - - 5 (invalid if r is H or L)
+ XCH r, (-HL) 1110 0111 1010 1rrr 1 Z - - 5
+
+ aka XCH r,(src)
*/
m_cycles += 4;
@@ -444,79 +444,79 @@ void tlcs870_device::do_ALUOP_insrc_inHL(const uint8_t opbyte0, const uint8_t op
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- ADDC (x), (HL) 1110 0000 xxxx xxxx 0110 0000 C Z C H 7
- ADDC (PC+A), (HL) 1110 0001 0110 0000 C Z C H 8
- ADDC (DE), (HL) 1110 0010 0110 0000 C Z C H 6
- ADDC (HL), (HL) 1110 0011 0110 0000 C Z C H 6
- ADDC (HL+d), (HL) 1110 0100 dddd dddd 0110 0000 C Z C H 8
- ADDC (HL+C), (HL) 1110 0101 0110 0000 C Z C H 8
- ADDC (HL+), (HL) not listed, invalid? ? ? ? ? ?
- ADDC (-HL), (HL) not listed, invalid? ? ? ? ? ?
-
- ADD (x), (HL) 1110 0000 xxxx xxxx 0110 0001 C Z C H 7
- ADD (PC+A), (HL) 1110 0001 0110 0001 C Z C H 8
- ADD (DE), (HL) 1110 0010 0110 0001 C Z C H 6
- ADD (HL), (HL) 1110 0011 0110 0001 C Z C H 6
- ADD (HL+d), (HL) 1110 0100 dddd dddd 0110 0001 C Z C H 8
- ADD (HL+C), (HL) 1110 0101 0110 0001 C Z C H 8
- ADD (HL+), (HL) not listed, invalid? ? ? ? ? ?
- ADD (-HL), (HL) not listed, invalid? ? ? ? ? ?
-
- SUBB (x), (HL) 1110 0000 xxxx xxxx 0110 0010 C Z C H 7
- SUBB (PC+A), (HL) 1110 0001 0110 0010 C Z C H 8
- SUBB (DE), (HL) 1110 0010 0110 0010 C Z C H 6
- SUBB (HL), (HL) 1110 0011 0110 0010 C Z C H 6
- SUBB (HL+d), (HL) 1110 0100 dddd dddd 0110 0010 C Z C H 8
- SUBB (HL+C), (HL) 1110 0101 0110 0010 C Z C H 8
- SUBB (HL+), (HL) not listed, invalid? ? ? ? ? ?
- SUBB (-HL), (HL) not listed, invalid? ? ? ? ? ?
-
- SUB (x), (HL) 1110 0000 xxxx xxxx 0110 0011 C Z C H 7
- SUB (PC+A), (HL) 1110 0001 0110 0011 C Z C H 8
- SUB (DE), (HL) 1110 0010 0110 0011 C Z C H 6
- SUB (HL), (HL) 1110 0011 0110 0011 C Z C H 6
- SUB (HL+d), (HL) 1110 0100 dddd dddd 0110 0011 C Z C H 8
- SUB (HL+C), (HL) 1110 0101 0110 0011 C Z C H 8
- SUB (HL+), (HL) not listed, invalid? ? ? ? ? ?
- SUB (-HL), (HL) not listed, invalid? ? ? ? ? ?
-
- AND (x), (HL) 1110 0000 xxxx xxxx 0110 0100 Z Z - - 7
- AND (PC+A), (HL) 1110 0001 0110 0100 Z Z - - 8
- AND (DE), (HL) 1110 0010 0110 0100 Z Z - - 6
- AND (HL), (HL) 1110 0011 0110 0100 Z Z - - 6
- AND (HL+d), (HL) 1110 0100 dddd dddd 0110 0100 Z Z - - 8
- AND (HL+C), (HL) 1110 0101 0110 0100 Z Z - - 8
- AND (HL+), (HL) not listed, invalid? ? ? ? ? ?
- AND (-HL), (HL) not listed, invalid? ? ? ? ? ?
-
- XOR (x), (HL) 1110 0000 xxxx xxxx 0110 0101 Z Z - - 7
- XOR (PC+A), (HL) 1110 0001 0110 0101 Z Z - - 8
- XOR (DE), (HL) 1110 0010 0110 0101 Z Z - - 6
- XOR (HL), (HL) 1110 0011 0110 0101 Z Z - - 6
- XOR (HL+d), (HL) 1110 0100 dddd dddd 0110 0101 Z Z - - 8
- XOR (HL+C), (HL) 1110 0101 0110 0101 Z Z - - 8
- XOR (HL+), (HL) not listed, invalid? ? ? ? ? ?
- XOR (-HL), (HL) not listed, invalid? ? ? ? ? ?
-
- OR (x), (HL) 1110 0000 xxxx xxxx 0110 0110 Z Z - - 7
- OR (PC+A), (HL) 1110 0001 0110 0110 Z Z - - 8
- OR (DE), (HL) 1110 0010 0110 0110 Z Z - - 6
- OR (HL), (HL) 1110 0011 0110 0110 Z Z - - 6
- OR (HL+d), (HL) 1110 0100 dddd dddd 0110 0110 Z Z - - 8
- OR (HL+C), (HL) 1110 0101 0110 0110 Z Z - - 8
- OR (HL+), (HL) not listed, invalid? ? ? ? ? ?
- OR (-HL), (HL) not listed, invalid? ? ? ? ? ?
-
- CMP (x), (HL) 1110 0000 xxxx xxxx 0110 0111 Z Z C H 6
- CMP (PC+A), (HL) 1110 0001 0110 0111 Z Z C H 7
- CMP (DE), (HL) 1110 0010 0110 0111 Z Z C H 5
- CMP (HL), (HL) 1110 0011 0110 0111 Z Z C H 5
- CMP (HL+d), (HL) 1110 0100 dddd dddd 0110 0111 Z Z C H 7
- CMP (HL+C), (HL) 1110 0101 0110 0111 Z Z C H 7
- CMP (HL+), (HL) not listed, invalid? ? ? ? ? ?
- CMP (-HL), (HL) not listed, invalid? ? ? ? ? ?
-
- aka (ALU OP) (src), (HL)
+ ADDC (x), (HL) 1110 0000 xxxx xxxx 0110 0000 C Z C H 7
+ ADDC (PC+A), (HL) 1110 0001 0110 0000 C Z C H 8
+ ADDC (DE), (HL) 1110 0010 0110 0000 C Z C H 6
+ ADDC (HL), (HL) 1110 0011 0110 0000 C Z C H 6
+ ADDC (HL+d), (HL) 1110 0100 dddd dddd 0110 0000 C Z C H 8
+ ADDC (HL+C), (HL) 1110 0101 0110 0000 C Z C H 8
+ ADDC (HL+), (HL) not listed, invalid? ? ? ? ? ?
+ ADDC (-HL), (HL) not listed, invalid? ? ? ? ? ?
+
+ ADD (x), (HL) 1110 0000 xxxx xxxx 0110 0001 C Z C H 7
+ ADD (PC+A), (HL) 1110 0001 0110 0001 C Z C H 8
+ ADD (DE), (HL) 1110 0010 0110 0001 C Z C H 6
+ ADD (HL), (HL) 1110 0011 0110 0001 C Z C H 6
+ ADD (HL+d), (HL) 1110 0100 dddd dddd 0110 0001 C Z C H 8
+ ADD (HL+C), (HL) 1110 0101 0110 0001 C Z C H 8
+ ADD (HL+), (HL) not listed, invalid? ? ? ? ? ?
+ ADD (-HL), (HL) not listed, invalid? ? ? ? ? ?
+
+ SUBB (x), (HL) 1110 0000 xxxx xxxx 0110 0010 C Z C H 7
+ SUBB (PC+A), (HL) 1110 0001 0110 0010 C Z C H 8
+ SUBB (DE), (HL) 1110 0010 0110 0010 C Z C H 6
+ SUBB (HL), (HL) 1110 0011 0110 0010 C Z C H 6
+ SUBB (HL+d), (HL) 1110 0100 dddd dddd 0110 0010 C Z C H 8
+ SUBB (HL+C), (HL) 1110 0101 0110 0010 C Z C H 8
+ SUBB (HL+), (HL) not listed, invalid? ? ? ? ? ?
+ SUBB (-HL), (HL) not listed, invalid? ? ? ? ? ?
+
+ SUB (x), (HL) 1110 0000 xxxx xxxx 0110 0011 C Z C H 7
+ SUB (PC+A), (HL) 1110 0001 0110 0011 C Z C H 8
+ SUB (DE), (HL) 1110 0010 0110 0011 C Z C H 6
+ SUB (HL), (HL) 1110 0011 0110 0011 C Z C H 6
+ SUB (HL+d), (HL) 1110 0100 dddd dddd 0110 0011 C Z C H 8
+ SUB (HL+C), (HL) 1110 0101 0110 0011 C Z C H 8
+ SUB (HL+), (HL) not listed, invalid? ? ? ? ? ?
+ SUB (-HL), (HL) not listed, invalid? ? ? ? ? ?
+
+ AND (x), (HL) 1110 0000 xxxx xxxx 0110 0100 Z Z - - 7
+ AND (PC+A), (HL) 1110 0001 0110 0100 Z Z - - 8
+ AND (DE), (HL) 1110 0010 0110 0100 Z Z - - 6
+ AND (HL), (HL) 1110 0011 0110 0100 Z Z - - 6
+ AND (HL+d), (HL) 1110 0100 dddd dddd 0110 0100 Z Z - - 8
+ AND (HL+C), (HL) 1110 0101 0110 0100 Z Z - - 8
+ AND (HL+), (HL) not listed, invalid? ? ? ? ? ?
+ AND (-HL), (HL) not listed, invalid? ? ? ? ? ?
+
+ XOR (x), (HL) 1110 0000 xxxx xxxx 0110 0101 Z Z - - 7
+ XOR (PC+A), (HL) 1110 0001 0110 0101 Z Z - - 8
+ XOR (DE), (HL) 1110 0010 0110 0101 Z Z - - 6
+ XOR (HL), (HL) 1110 0011 0110 0101 Z Z - - 6
+ XOR (HL+d), (HL) 1110 0100 dddd dddd 0110 0101 Z Z - - 8
+ XOR (HL+C), (HL) 1110 0101 0110 0101 Z Z - - 8
+ XOR (HL+), (HL) not listed, invalid? ? ? ? ? ?
+ XOR (-HL), (HL) not listed, invalid? ? ? ? ? ?
+
+ OR (x), (HL) 1110 0000 xxxx xxxx 0110 0110 Z Z - - 7
+ OR (PC+A), (HL) 1110 0001 0110 0110 Z Z - - 8
+ OR (DE), (HL) 1110 0010 0110 0110 Z Z - - 6
+ OR (HL), (HL) 1110 0011 0110 0110 Z Z - - 6
+ OR (HL+d), (HL) 1110 0100 dddd dddd 0110 0110 Z Z - - 8
+ OR (HL+C), (HL) 1110 0101 0110 0110 Z Z - - 8
+ OR (HL+), (HL) not listed, invalid? ? ? ? ? ?
+ OR (-HL), (HL) not listed, invalid? ? ? ? ? ?
+
+ CMP (x), (HL) 1110 0000 xxxx xxxx 0110 0111 Z Z C H 6
+ CMP (PC+A), (HL) 1110 0001 0110 0111 Z Z C H 7
+ CMP (DE), (HL) 1110 0010 0110 0111 Z Z C H 5
+ CMP (HL), (HL) 1110 0011 0110 0111 Z Z C H 5
+ CMP (HL+d), (HL) 1110 0100 dddd dddd 0110 0111 Z Z C H 7
+ CMP (HL+C), (HL) 1110 0101 0110 0111 Z Z C H 7
+ CMP (HL+), (HL) not listed, invalid? ? ? ? ? ?
+ CMP (-HL), (HL) not listed, invalid? ? ? ? ? ?
+
+ aka (ALU OP) (src), (HL)
*/
m_cycles += 6;
@@ -541,89 +541,89 @@ void tlcs870_device::do_ALUOP_insrc_n(const uint8_t opbyte0, const uint8_t opbyt
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- ADDC (x), n 1110 0000 xxxx xxxx 0111 0000 nnnn nnnn C Z C H 6
- ADDC (PC+A), n 1110 0001 0111 0000 nnnn nnnn C Z C H 7
- ADDC (DE), n 1110 0010 0111 0000 nnnn nnnn C Z C H 5
- ADDC (HL), n 1110 0011 0111 0000 nnnn nnnn C Z C H 5
- ADDC (HL+d), n 1110 0100 dddd dddd 0111 0000 nnnn nnnn C Z C H 7
- ADDC (HL+C), n 1110 0101 0111 0000 nnnn nnnn C Z C H 7
- ADDC (HL+), n 1110 0110 0111 0000 nnnn nnnn C Z C H 6
- ADDC (-HL), n 1110 0111 0111 0000 nnnn nnnn C Z C H 6
-
- ADD (x), n 1110 0000 xxxx xxxx 0111 0001 nnnn nnnn C Z C H 6
- ADD (PC+A), n 1110 0001 0111 0001 nnnn nnnn C Z C H 7
- ADD (DE), n 1110 0010 0111 0001 nnnn nnnn C Z C H 5
- ADD (HL), n 1110 0011 0111 0001 nnnn nnnn C Z C H 5
- ADD (HL+d), n 1110 0100 dddd dddd 0111 0001 nnnn nnnn C Z C H 7
- ADD (HL+C), n 1110 0101 0111 0001 nnnn nnnn C Z C H 7
- ADD (HL+), n 1110 0110 0111 0001 nnnn nnnn C Z C H 6
- ADD (-HL), n 1110 0111 0111 0001 nnnn nnnn C Z C H 6
-
- SUBB (x), n 1110 0000 xxxx xxxx 0111 0010 nnnn nnnn C Z C H 6
- SUBB (PC+A), n 1110 0001 0111 0010 nnnn nnnn C Z C H 7
- SUBB (DE), n 1110 0010 0111 0010 nnnn nnnn C Z C H 5
- SUBB (HL), n 1110 0011 0111 0010 nnnn nnnn C Z C H 5
- SUBB (HL+d), n 1110 0100 dddd dddd 0111 0010 nnnn nnnn C Z C H 7
- SUBB (HL+C), n 1110 0101 0111 0010 nnnn nnnn C Z C H 7
- SUBB (HL+), n 1110 0110 0111 0010 nnnn nnnn C Z C H 6
- SUBB (-HL), n 1110 0111 0111 0010 nnnn nnnn C Z C H 6
-
- SUB (x), n 1110 0000 xxxx xxxx 0111 0011 nnnn nnnn C Z C H 6
- SUB (PC+A), n 1110 0001 0111 0011 nnnn nnnn C Z C H 7
- SUB (DE), n 1110 0010 0111 0011 nnnn nnnn C Z C H 5
- SUB (HL), n 1110 0011 0111 0011 nnnn nnnn C Z C H 5
- SUB (HL+d), n 1110 0100 dddd dddd 0111 0011 nnnn nnnn C Z C H 7
- SUB (HL+C), n 1110 0101 0111 0011 nnnn nnnn C Z C H 7
- SUB (HL+), n 1110 0110 0111 0011 nnnn nnnn C Z C H 6
- SUB (-HL), n 1110 0111 0111 0011 nnnn nnnn C Z C H 6
-
- AND (x), n 1110 0000 xxxx xxxx 0111 0100 nnnn nnnn Z Z - - 6
- AND (PC+A), n 1110 0001 0111 0100 nnnn nnnn Z Z - - 7
- AND (DE), n 1110 0010 0111 0100 nnnn nnnn Z Z - - 5
- AND (HL), n 1110 0011 0111 0100 nnnn nnnn Z Z - - 5
- AND (HL+d), n 1110 0100 dddd dddd 0111 0100 nnnn nnnn Z Z - - 7
- AND (HL+C), n 1110 0101 0111 0100 nnnn nnnn Z Z - - 7
- AND (HL+), n 1110 0110 0111 0100 nnnn nnnn Z Z - - 6
- AND (-HL), n 1110 0111 0111 0100 nnnn nnnn Z Z - - 6
-
- XOR (x), n 1110 0000 xxxx xxxx 0111 0101 nnnn nnnn Z Z - - 6
- XOR (PC+A), n 1110 0001 0111 0101 nnnn nnnn Z Z - - 7
- XOR (DE), n 1110 0010 0111 0101 nnnn nnnn Z Z - - 5
- XOR (HL), n 1110 0011 0111 0101 nnnn nnnn Z Z - - 5
- XOR (HL+d), n 1110 0100 dddd dddd 0111 0101 nnnn nnnn Z Z - - 7
- XOR (HL+C), n 1110 0101 0111 0101 nnnn nnnn Z Z - - 7
- XOR (HL+), n 1110 0110 0111 0101 nnnn nnnn Z Z - - 6
- XOR (-HL), n 1110 0111 0111 0101 nnnn nnnn Z Z - - 6
-
- OR (x), n 1110 0000 xxxx xxxx 0111 0110 nnnn nnnn Z Z - - 6
- OR (PC+A), n 1110 0001 0111 0110 nnnn nnnn Z Z - - 7
- OR (DE), n 1110 0010 0111 0110 nnnn nnnn Z Z - - 5
- OR (HL), n 1110 0011 0111 0110 nnnn nnnn Z Z - - 5
- OR (HL+d), n 1110 0100 dddd dddd 0111 0110 nnnn nnnn Z Z - - 7
- OR (HL+C), n 1110 0101 0111 0110 nnnn nnnn Z Z - - 7
- OR (HL+), n 1110 0110 0111 0110 nnnn nnnn Z Z - - 6
- OR (-HL), n 1110 0111 0111 0110 nnnn nnnn Z Z - - 6
-
- CMP (x), n 1110 0000 xxxx xxxx 0111 0111 nnnn nnnn Z Z C H 5
- CMP (PC+A), n 1110 0001 0111 0111 nnnn nnnn Z Z C H 6
- CMP (DE), n 1110 0010 0111 0111 nnnn nnnn Z Z C H 4
- CMP (HL), n 1110 0011 0111 0111 nnnn nnnn Z Z C H 4
- CMP (HL+d), n 1110 0100 dddd dddd 0111 0111 nnnn nnnn Z Z C H 6
- CMP (HL+C), n 1110 0101 0111 0111 nnnn nnnn Z Z C H 6
- CMP (HL+), n 1110 0110 0111 0111 nnnn nnnn Z Z C H 5
- CMP (-HL), n 1110 0111 0111 0111 nnnn nnnn Z Z C H 5
-
- aka (ALU OP) (src), n
+ ADDC (x), n 1110 0000 xxxx xxxx 0111 0000 nnnn nnnn C Z C H 6
+ ADDC (PC+A), n 1110 0001 0111 0000 nnnn nnnn C Z C H 7
+ ADDC (DE), n 1110 0010 0111 0000 nnnn nnnn C Z C H 5
+ ADDC (HL), n 1110 0011 0111 0000 nnnn nnnn C Z C H 5
+ ADDC (HL+d), n 1110 0100 dddd dddd 0111 0000 nnnn nnnn C Z C H 7
+ ADDC (HL+C), n 1110 0101 0111 0000 nnnn nnnn C Z C H 7
+ ADDC (HL+), n 1110 0110 0111 0000 nnnn nnnn C Z C H 6
+ ADDC (-HL), n 1110 0111 0111 0000 nnnn nnnn C Z C H 6
+
+ ADD (x), n 1110 0000 xxxx xxxx 0111 0001 nnnn nnnn C Z C H 6
+ ADD (PC+A), n 1110 0001 0111 0001 nnnn nnnn C Z C H 7
+ ADD (DE), n 1110 0010 0111 0001 nnnn nnnn C Z C H 5
+ ADD (HL), n 1110 0011 0111 0001 nnnn nnnn C Z C H 5
+ ADD (HL+d), n 1110 0100 dddd dddd 0111 0001 nnnn nnnn C Z C H 7
+ ADD (HL+C), n 1110 0101 0111 0001 nnnn nnnn C Z C H 7
+ ADD (HL+), n 1110 0110 0111 0001 nnnn nnnn C Z C H 6
+ ADD (-HL), n 1110 0111 0111 0001 nnnn nnnn C Z C H 6
+
+ SUBB (x), n 1110 0000 xxxx xxxx 0111 0010 nnnn nnnn C Z C H 6
+ SUBB (PC+A), n 1110 0001 0111 0010 nnnn nnnn C Z C H 7
+ SUBB (DE), n 1110 0010 0111 0010 nnnn nnnn C Z C H 5
+ SUBB (HL), n 1110 0011 0111 0010 nnnn nnnn C Z C H 5
+ SUBB (HL+d), n 1110 0100 dddd dddd 0111 0010 nnnn nnnn C Z C H 7
+ SUBB (HL+C), n 1110 0101 0111 0010 nnnn nnnn C Z C H 7
+ SUBB (HL+), n 1110 0110 0111 0010 nnnn nnnn C Z C H 6
+ SUBB (-HL), n 1110 0111 0111 0010 nnnn nnnn C Z C H 6
+
+ SUB (x), n 1110 0000 xxxx xxxx 0111 0011 nnnn nnnn C Z C H 6
+ SUB (PC+A), n 1110 0001 0111 0011 nnnn nnnn C Z C H 7
+ SUB (DE), n 1110 0010 0111 0011 nnnn nnnn C Z C H 5
+ SUB (HL), n 1110 0011 0111 0011 nnnn nnnn C Z C H 5
+ SUB (HL+d), n 1110 0100 dddd dddd 0111 0011 nnnn nnnn C Z C H 7
+ SUB (HL+C), n 1110 0101 0111 0011 nnnn nnnn C Z C H 7
+ SUB (HL+), n 1110 0110 0111 0011 nnnn nnnn C Z C H 6
+ SUB (-HL), n 1110 0111 0111 0011 nnnn nnnn C Z C H 6
+
+ AND (x), n 1110 0000 xxxx xxxx 0111 0100 nnnn nnnn Z Z - - 6
+ AND (PC+A), n 1110 0001 0111 0100 nnnn nnnn Z Z - - 7
+ AND (DE), n 1110 0010 0111 0100 nnnn nnnn Z Z - - 5
+ AND (HL), n 1110 0011 0111 0100 nnnn nnnn Z Z - - 5
+ AND (HL+d), n 1110 0100 dddd dddd 0111 0100 nnnn nnnn Z Z - - 7
+ AND (HL+C), n 1110 0101 0111 0100 nnnn nnnn Z Z - - 7
+ AND (HL+), n 1110 0110 0111 0100 nnnn nnnn Z Z - - 6
+ AND (-HL), n 1110 0111 0111 0100 nnnn nnnn Z Z - - 6
+
+ XOR (x), n 1110 0000 xxxx xxxx 0111 0101 nnnn nnnn Z Z - - 6
+ XOR (PC+A), n 1110 0001 0111 0101 nnnn nnnn Z Z - - 7
+ XOR (DE), n 1110 0010 0111 0101 nnnn nnnn Z Z - - 5
+ XOR (HL), n 1110 0011 0111 0101 nnnn nnnn Z Z - - 5
+ XOR (HL+d), n 1110 0100 dddd dddd 0111 0101 nnnn nnnn Z Z - - 7
+ XOR (HL+C), n 1110 0101 0111 0101 nnnn nnnn Z Z - - 7
+ XOR (HL+), n 1110 0110 0111 0101 nnnn nnnn Z Z - - 6
+ XOR (-HL), n 1110 0111 0111 0101 nnnn nnnn Z Z - - 6
+
+ OR (x), n 1110 0000 xxxx xxxx 0111 0110 nnnn nnnn Z Z - - 6
+ OR (PC+A), n 1110 0001 0111 0110 nnnn nnnn Z Z - - 7
+ OR (DE), n 1110 0010 0111 0110 nnnn nnnn Z Z - - 5
+ OR (HL), n 1110 0011 0111 0110 nnnn nnnn Z Z - - 5
+ OR (HL+d), n 1110 0100 dddd dddd 0111 0110 nnnn nnnn Z Z - - 7
+ OR (HL+C), n 1110 0101 0111 0110 nnnn nnnn Z Z - - 7
+ OR (HL+), n 1110 0110 0111 0110 nnnn nnnn Z Z - - 6
+ OR (-HL), n 1110 0111 0111 0110 nnnn nnnn Z Z - - 6
+
+ CMP (x), n 1110 0000 xxxx xxxx 0111 0111 nnnn nnnn Z Z C H 5
+ CMP (PC+A), n 1110 0001 0111 0111 nnnn nnnn Z Z C H 6
+ CMP (DE), n 1110 0010 0111 0111 nnnn nnnn Z Z C H 4
+ CMP (HL), n 1110 0011 0111 0111 nnnn nnnn Z Z C H 4
+ CMP (HL+d), n 1110 0100 dddd dddd 0111 0111 nnnn nnnn Z Z C H 6
+ CMP (HL+C), n 1110 0101 0111 0111 nnnn nnnn Z Z C H 6
+ CMP (HL+), n 1110 0110 0111 0111 nnnn nnnn Z Z C H 5
+ CMP (-HL), n 1110 0111 0111 0111 nnnn nnnn Z Z C H 5
+
+ aka (ALU OP) (src), n
*/
m_cycles += 5;
const uint8_t n = READ8();
const int aluop = (opbyte1 & 0x7);
-
+
if (aluop != 0x07)
m_read_input_port = 0; // reads output latch, not actual ports if accessing memory mapped ports
-
+
const uint8_t val = RM8(srcaddr);
const uint8_t result = do_alu_8bit(aluop, val, n);
@@ -639,79 +639,79 @@ void tlcs870_device::do_ALUOP_A_insrc(const uint8_t opbyte0, const uint8_t opbyt
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- ADDC A, (x) 1110 0000 xxxx xxxx 0111 1000 C Z C H 4
- ADDC A, (PC+A) 1110 0001 0111 1000 C Z C H 5
- ADDC A, (DE) 1110 0010 0111 1000 C Z C H 3
- ADDC A, (HL) 1110 0011 0111 1000 C Z C H 3
- ADDC A, (HL+d) 1110 0100 dddd dddd 0111 1000 C Z C H 5
- ADDC A, (HL+C) 1110 0101 0111 1000 C Z C H 5
- ADDC A, (HL+) 1110 0110 0111 1000 C Z C H 4
- ADDC A, (-HL) 1110 0111 0111 1000 C Z C H 4
-
- ADD A, (x) 1110 0000 xxxx xxxx 0111 1001 C Z C H 4
- ADD A, (PC+A) 1110 0001 0111 1001 C Z C H 5
- ADD A, (DE) 1110 0010 0111 1001 C Z C H 3
- ADD A, (HL) 1110 0011 0111 1001 C Z C H 3
- ADD A, (HL+d) 1110 0100 dddd dddd 0111 1001 C Z C H 5
- ADD A, (HL+C) 1110 0101 0111 1001 C Z C H 5
- ADD A, (HL+) 1110 0110 0111 1001 C Z C H 4
- ADD A, (-HL) 1110 0111 0111 1001 C Z C H 4
-
- SUBB A, (x) 1110 0000 xxxx xxxx 0111 1010 C Z C H 4
- SUBB A, (PC+A) 1110 0001 0111 1010 C Z C H 5
- SUBB A, (DE) 1110 0010 0111 1010 C Z C H 3
- SUBB A, (HL) 1110 0011 0111 1010 C Z C H 3
- SUBB A, (HL+d) 1110 0100 dddd dddd 0111 1010 C Z C H 5
- SUBB A, (HL+C) 1110 0101 0111 1010 C Z C H 5
- SUBB A, (HL+) 1110 0110 0111 1010 C Z C H 4
- SUBB A, (-HL) 1110 0111 0111 1010 C Z C H 4
-
- SUB A, (x) 1110 0000 xxxx xxxx 0111 1011 C Z C H 4
- SUB A, (PC+A) 1110 0001 0111 1011 C Z C H 5
- SUB A, (DE) 1110 0010 0111 1011 C Z C H 3
- SUB A, (HL) 1110 0011 0111 1011 C Z C H 3
- SUB A, (HL+d) 1110 0100 dddd dddd 0111 1011 C Z C H 5
- SUB A, (HL+C) 1110 0101 0111 1011 C Z C H 5
- SUB A, (HL+) 1110 0110 0111 1011 C Z C H 4
- SUB A, (-HL) 1110 0111 0111 1011 C Z C H 4
-
- AND A, (x) 1110 0000 xxxx xxxx 0111 1100 Z Z - - 4
- AND A, (PC+A) 1110 0001 0111 1100 Z Z - - 5
- AND A, (DE) 1110 0010 0111 1100 Z Z - - 3
- AND A, (HL) 1110 0011 0111 1100 Z Z - - 3
- AND A, (HL+d) 1110 0100 dddd dddd 0111 1100 Z Z - - 5
- AND A, (HL+C) 1110 0101 0111 1100 Z Z - - 5
- AND A, (HL+) 1110 0110 0111 1100 Z Z - - 4
- AND A, (-HL) 1110 0111 0111 1100 Z Z - - 4
-
- XOR A, (x) 1110 0000 xxxx xxxx 0111 1101 Z Z - - 4
- XOR A, (PC+A) 1110 0001 0111 1101 Z Z - - 5
- XOR A, (DE) 1110 0010 0111 1101 Z Z - - 3
- XOR A, (HL) 1110 0011 0111 1101 Z Z - - 3
- XOR A, (HL+d) 1110 0100 dddd dddd 0111 1101 Z Z - - 5
- XOR A, (HL+C) 1110 0101 0111 1101 Z Z - - 5
- XOR A, (HL+) 1110 0110 0111 1101 Z Z - - 4
- XOR A, (-HL) 1110 0111 0111 1101 Z Z - - 4
-
- OR A, (x) 1110 0000 xxxx xxxx 0111 1110 Z Z - - 4
- OR A, (PC+A) 1110 0001 0111 1110 Z Z - - 5
- OR A, (DE) 1110 0010 0111 1110 Z Z - - 3
- OR A, (HL) 1110 0011 0111 1110 Z Z - - 3
- OR A, (HL+d) 1110 0100 dddd dddd 0111 1110 Z Z - - 5
- OR A, (HL+C) 1110 0101 0111 1110 Z Z - - 5
- OR A, (HL+) 1110 0110 0111 1110 Z Z - - 4
- OR A, (-HL) 1110 0111 0111 1110 Z Z - - 4
-
- CMP A, (x) 1110 0000 xxxx xxxx 0111 1111 Z Z C H 4
- CMP A, (PC+A) 1110 0001 0111 1111 Z Z C H 5
- CMP A, (DE) 1110 0010 0111 1111 Z Z C H 3
- CMP A, (HL) 1110 0011 0111 1111 Z Z C H 3
- CMP A, (HL+d) 1110 0100 dddd dddd 0111 1111 Z Z C H 5
- CMP A, (HL+C) 1110 0101 0111 1111 Z Z C H 5
- CMP A, (HL+) 1110 0110 0111 1111 Z Z C H 4
- CMP A, (-HL) 1110 0111 0111 1111 Z Z C H 4
-
- aka (ALU OP) A, (src)
+ ADDC A, (x) 1110 0000 xxxx xxxx 0111 1000 C Z C H 4
+ ADDC A, (PC+A) 1110 0001 0111 1000 C Z C H 5
+ ADDC A, (DE) 1110 0010 0111 1000 C Z C H 3
+ ADDC A, (HL) 1110 0011 0111 1000 C Z C H 3
+ ADDC A, (HL+d) 1110 0100 dddd dddd 0111 1000 C Z C H 5
+ ADDC A, (HL+C) 1110 0101 0111 1000 C Z C H 5
+ ADDC A, (HL+) 1110 0110 0111 1000 C Z C H 4
+ ADDC A, (-HL) 1110 0111 0111 1000 C Z C H 4
+
+ ADD A, (x) 1110 0000 xxxx xxxx 0111 1001 C Z C H 4
+ ADD A, (PC+A) 1110 0001 0111 1001 C Z C H 5
+ ADD A, (DE) 1110 0010 0111 1001 C Z C H 3
+ ADD A, (HL) 1110 0011 0111 1001 C Z C H 3
+ ADD A, (HL+d) 1110 0100 dddd dddd 0111 1001 C Z C H 5
+ ADD A, (HL+C) 1110 0101 0111 1001 C Z C H 5
+ ADD A, (HL+) 1110 0110 0111 1001 C Z C H 4
+ ADD A, (-HL) 1110 0111 0111 1001 C Z C H 4
+
+ SUBB A, (x) 1110 0000 xxxx xxxx 0111 1010 C Z C H 4
+ SUBB A, (PC+A) 1110 0001 0111 1010 C Z C H 5
+ SUBB A, (DE) 1110 0010 0111 1010 C Z C H 3
+ SUBB A, (HL) 1110 0011 0111 1010 C Z C H 3
+ SUBB A, (HL+d) 1110 0100 dddd dddd 0111 1010 C Z C H 5
+ SUBB A, (HL+C) 1110 0101 0111 1010 C Z C H 5
+ SUBB A, (HL+) 1110 0110 0111 1010 C Z C H 4
+ SUBB A, (-HL) 1110 0111 0111 1010 C Z C H 4
+
+ SUB A, (x) 1110 0000 xxxx xxxx 0111 1011 C Z C H 4
+ SUB A, (PC+A) 1110 0001 0111 1011 C Z C H 5
+ SUB A, (DE) 1110 0010 0111 1011 C Z C H 3
+ SUB A, (HL) 1110 0011 0111 1011 C Z C H 3
+ SUB A, (HL+d) 1110 0100 dddd dddd 0111 1011 C Z C H 5
+ SUB A, (HL+C) 1110 0101 0111 1011 C Z C H 5
+ SUB A, (HL+) 1110 0110 0111 1011 C Z C H 4
+ SUB A, (-HL) 1110 0111 0111 1011 C Z C H 4
+
+ AND A, (x) 1110 0000 xxxx xxxx 0111 1100 Z Z - - 4
+ AND A, (PC+A) 1110 0001 0111 1100 Z Z - - 5
+ AND A, (DE) 1110 0010 0111 1100 Z Z - - 3
+ AND A, (HL) 1110 0011 0111 1100 Z Z - - 3
+ AND A, (HL+d) 1110 0100 dddd dddd 0111 1100 Z Z - - 5
+ AND A, (HL+C) 1110 0101 0111 1100 Z Z - - 5
+ AND A, (HL+) 1110 0110 0111 1100 Z Z - - 4
+ AND A, (-HL) 1110 0111 0111 1100 Z Z - - 4
+
+ XOR A, (x) 1110 0000 xxxx xxxx 0111 1101 Z Z - - 4
+ XOR A, (PC+A) 1110 0001 0111 1101 Z Z - - 5
+ XOR A, (DE) 1110 0010 0111 1101 Z Z - - 3
+ XOR A, (HL) 1110 0011 0111 1101 Z Z - - 3
+ XOR A, (HL+d) 1110 0100 dddd dddd 0111 1101 Z Z - - 5
+ XOR A, (HL+C) 1110 0101 0111 1101 Z Z - - 5
+ XOR A, (HL+) 1110 0110 0111 1101 Z Z - - 4
+ XOR A, (-HL) 1110 0111 0111 1101 Z Z - - 4
+
+ OR A, (x) 1110 0000 xxxx xxxx 0111 1110 Z Z - - 4
+ OR A, (PC+A) 1110 0001 0111 1110 Z Z - - 5
+ OR A, (DE) 1110 0010 0111 1110 Z Z - - 3
+ OR A, (HL) 1110 0011 0111 1110 Z Z - - 3
+ OR A, (HL+d) 1110 0100 dddd dddd 0111 1110 Z Z - - 5
+ OR A, (HL+C) 1110 0101 0111 1110 Z Z - - 5
+ OR A, (HL+) 1110 0110 0111 1110 Z Z - - 4
+ OR A, (-HL) 1110 0111 0111 1110 Z Z - - 4
+
+ CMP A, (x) 1110 0000 xxxx xxxx 0111 1111 Z Z C H 4
+ CMP A, (PC+A) 1110 0001 0111 1111 Z Z C H 5
+ CMP A, (DE) 1110 0010 0111 1111 Z Z C H 3
+ CMP A, (HL) 1110 0011 0111 1111 Z Z C H 3
+ CMP A, (HL+d) 1110 0100 dddd dddd 0111 1111 Z Z C H 5
+ CMP A, (HL+C) 1110 0101 0111 1111 Z Z C H 5
+ CMP A, (HL+) 1110 0110 0111 1111 Z Z C H 4
+ CMP A, (-HL) 1110 0111 0111 1111 Z Z C H 4
+
+ aka (ALU OP) A, (src)
*/
m_cycles += 3;
@@ -735,16 +735,16 @@ void tlcs870_device::do_CALL_insrc(const uint8_t opbyte0, const uint8_t opbyte1,
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- CALL (x) 1110 0000 xxxx xxxx 1111 1100 - - - - 9
- CALL (PC+A) 1110 0001 1111 1100 - - - - 10
- CALL (DE) 1110 0010 1111 1100 - - - - 8
- CALL (HL) 1110 0011 1111 1100 - - - - 8
- CALL (HL+d) 1110 0100 dddd dddd 1111 1100 - - - - 10
- CALL (HL+C) 1110 0101 1111 1100 - - - - 10
- CALL (HL+) not listed, invalid due to 16-bit op? ? ? ? ? ?
- CALL (-HL) not listed, invalid due to 16-bit op? ? ? ? ? ?
-
- aka CALL (src)
+ CALL (x) 1110 0000 xxxx xxxx 1111 1100 - - - - 9
+ CALL (PC+A) 1110 0001 1111 1100 - - - - 10
+ CALL (DE) 1110 0010 1111 1100 - - - - 8
+ CALL (HL) 1110 0011 1111 1100 - - - - 8
+ CALL (HL+d) 1110 0100 dddd dddd 1111 1100 - - - - 10
+ CALL (HL+C) 1110 0101 1111 1100 - - - - 10
+ CALL (HL+) not listed, invalid due to 16-bit op? ? ? ? ? ?
+ CALL (-HL) not listed, invalid due to 16-bit op? ? ? ? ? ?
+
+ aka CALL (src)
*/
m_cycles += 8;
@@ -762,16 +762,16 @@ void tlcs870_device::do_JP_insrc(const uint8_t opbyte0, const uint8_t opbyte1, c
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- JP (x) 1110 0000 xxxx xxxx 1111 1110 1 - - - 6
- JP (PC+A) 1110 0001 1111 1110 1 - - - 7
- JP (DE) 1110 0010 1111 1110 1 - - - 5
- JP (HL) 1110 0011 1111 1110 1 - - - 5
- JP (HL+d) 1110 0100 dddd dddd 1111 1110 1 - - - 7
- JP (HL+C) 1110 0101 1111 1110 1 - - - 7
- JP (HL+) not listed, invalid due to 16-bit op? ? ? ? ? ?
- JP (-HL) not listed, invalid due to 16-bit op? ? ? ? ? ?
-
- aka JP (src)
+ JP (x) 1110 0000 xxxx xxxx 1111 1110 1 - - - 6
+ JP (PC+A) 1110 0001 1111 1110 1 - - - 7
+ JP (DE) 1110 0010 1111 1110 1 - - - 5
+ JP (HL) 1110 0011 1111 1110 1 - - - 5
+ JP (HL+d) 1110 0100 dddd dddd 1111 1110 1 - - - 7
+ JP (HL+C) 1110 0101 1111 1110 1 - - - 7
+ JP (HL+) not listed, invalid due to 16-bit op? ? ? ? ? ?
+ JP (-HL) not listed, invalid due to 16-bit op? ? ? ? ? ?
+
+ aka JP (src)
*/
m_cycles += 5;
@@ -788,16 +788,16 @@ void tlcs870_device::do_XOR_CF_insrcbit(const uint8_t opbyte0, const uint8_t opb
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- XOR CF, (x).b 1110 0000 xxxx xxxx 1101 0bbb ~C - * - 4
- XOR CF, (PC+A).b 1110 0001 1101 0bbb ~C - * - 5
- XOR CF, (DE).b 1110 0010 1101 0bbb ~C - * - 3
- XOR CF, (HL).b 1110 0011 1101 0bbb ~C - * - 3
- XOR CF, (HL+d).b 1110 0100 dddd dddd 1101 0bbb ~C - * - 5
- XOR CF, (HL+C).b 1110 0101 1101 0bbb ~C - * - 5
- XOR CF, (HL+).b 1110 0110 1101 0bbb ~C - * - 4
- XOR CF, (-HL).b 1110 0111 1101 0bbb ~C - * - 4
-
- aka XOR CF,(src).b
+ XOR CF, (x).b 1110 0000 xxxx xxxx 1101 0bbb ~C - * - 4
+ XOR CF, (PC+A).b 1110 0001 1101 0bbb ~C - * - 5
+ XOR CF, (DE).b 1110 0010 1101 0bbb ~C - * - 3
+ XOR CF, (HL).b 1110 0011 1101 0bbb ~C - * - 3
+ XOR CF, (HL+d).b 1110 0100 dddd dddd 1101 0bbb ~C - * - 5
+ XOR CF, (HL+C).b 1110 0101 1101 0bbb ~C - * - 5
+ XOR CF, (HL+).b 1110 0110 1101 0bbb ~C - * - 4
+ XOR CF, (-HL).b 1110 0111 1101 0bbb ~C - * - 4
+
+ aka XOR CF,(src).b
*/
m_cycles += 3;
@@ -843,16 +843,16 @@ void tlcs870_device::do_LD_insrcbit_CF(const uint8_t opbyte0, const uint8_t opby
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- LD (x).b, CF 1110 0000 xxxx xxxx 1100 1bbb 1 - - - 5
- LD (PC+A).b, CF 1110 0001 1100 1bbb 1 - - - 6
- LD (DE).b, CF 1110 0010 1100 1bbb 1 - - - 4
- LD (HL).b, CF 1110 0011 1100 1bbb 1 - - - 4
- LD (HL+d).b, CF 1110 0100 dddd dddd 1100 1bbb 1 - - - 6
- LD (HL+C).b, CF 1110 0101 1100 1bbb 1 - - - 6
- LD (HL+).b, CF 1110 0110 1100 1bbb 1 - - - 5
- LD (-HL).b, CF 1110 0111 1100 1bbb 1 - - - 5
-
- aka LD (src).b,CF
+ LD (x).b, CF 1110 0000 xxxx xxxx 1100 1bbb 1 - - - 5
+ LD (PC+A).b, CF 1110 0001 1100 1bbb 1 - - - 6
+ LD (DE).b, CF 1110 0010 1100 1bbb 1 - - - 4
+ LD (HL).b, CF 1110 0011 1100 1bbb 1 - - - 4
+ LD (HL+d).b, CF 1110 0100 dddd dddd 1100 1bbb 1 - - - 6
+ LD (HL+C).b, CF 1110 0101 1100 1bbb 1 - - - 6
+ LD (HL+).b, CF 1110 0110 1100 1bbb 1 - - - 5
+ LD (-HL).b, CF 1110 0111 1100 1bbb 1 - - - 5
+
+ aka LD (src).b,CF
*/
m_cycles += 4;
@@ -881,16 +881,16 @@ void tlcs870_device::do_CPL_insrcbit(const uint8_t opbyte0, const uint8_t opbyte
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- CPL (x).b 1110 0000 xxxx xxxx 1100 0bbb Z * - - 5
- CPL (PC+A).b 1110 0001 1100 0bbb Z * - - 6
- CPL (DE).b 1110 0010 1100 0bbb Z * - - 4
- CPL (HL).b 1110 0011 1100 0bbb Z * - - 4
- CPL (HL+d).b 1110 0100 dddd dddd 1100 0bbb Z * - - 6
- CPL (HL+C).b 1110 0101 1100 0bbb Z * - - 6
- CPL (HL+).b 1110 0110 1100 0bbb Z * - - 5
- CPL (-HL).b 1110 0111 1100 0bbb Z * - - 5
-
- aka CPL (src).b
+ CPL (x).b 1110 0000 xxxx xxxx 1100 0bbb Z * - - 5
+ CPL (PC+A).b 1110 0001 1100 0bbb Z * - - 6
+ CPL (DE).b 1110 0010 1100 0bbb Z * - - 4
+ CPL (HL).b 1110 0011 1100 0bbb Z * - - 4
+ CPL (HL+d).b 1110 0100 dddd dddd 1100 0bbb Z * - - 6
+ CPL (HL+C).b 1110 0101 1100 0bbb Z * - - 6
+ CPL (HL+).b 1110 0110 1100 0bbb Z * - - 5
+ CPL (-HL).b 1110 0111 1100 0bbb Z * - - 5
+
+ aka CPL (src).b
*/
m_cycles += 4;
@@ -924,16 +924,16 @@ void tlcs870_device::do_LD_CF_insrcbit(const uint8_t opbyte0, const uint8_t opby
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- LD CF, (x).b 1110 0000 xxxx xxxx 1101 1bbb ~C - * - 4
- LD CF, (PC+A).b 1110 0001 1101 1bbb ~C - * - 5
- LD CF, (DE).b 1110 0010 1101 1bbb ~C - * - 3
- LD CF, (HL).b 1110 0011 1101 1bbb ~C - * - 3
- LD CF, (HL+d).b 1110 0100 dddd dddd 1101 1bbb ~C - * - 5
- LD CF, (HL+C).b 1110 0101 1101 1bbb ~C - * - 5
- LD CF, (HL+).b 1110 0110 1101 1bbb ~C - * - 4
- LD CF, (-HL).b 1110 0111 1101 1bbb ~C - * - 4
-
- aka LD CF,(src).b or TEST (src).b
+ LD CF, (x).b 1110 0000 xxxx xxxx 1101 1bbb ~C - * - 4
+ LD CF, (PC+A).b 1110 0001 1101 1bbb ~C - * - 5
+ LD CF, (DE).b 1110 0010 1101 1bbb ~C - * - 3
+ LD CF, (HL).b 1110 0011 1101 1bbb ~C - * - 3
+ LD CF, (HL+d).b 1110 0100 dddd dddd 1101 1bbb ~C - * - 5
+ LD CF, (HL+C).b 1110 0101 1101 1bbb ~C - * - 5
+ LD CF, (HL+).b 1110 0110 1101 1bbb ~C - * - 4
+ LD CF, (-HL).b 1110 0111 1101 1bbb ~C - * - 4
+
+ aka LD CF,(src).b or TEST (src).b
*/
m_cycles += 3;
@@ -953,16 +953,16 @@ void tlcs870_device::do_SET_insrcbit(const uint8_t opbyte0, const uint8_t opbyte
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- SET (x).b 1110 0000 xxxx xxxx 0100 0bbb Z * - - 5
- SET (PC+A).b 1110 0001 0100 0bbb Z * - - 6
- SET (DE).b 1110 0010 0100 0bbb Z * - - 4
- SET (HL).b 1110 0011 0100 0bbb Z * - - 4
- SET (HL+d).b 1110 0100 dddd dddd 0100 0bbb Z * - - 6
- SET (HL+C).b 1110 0101 0100 0bbb Z * - - 6
- SET (HL+).b 1110 0110 0100 0bbb Z * - - 5
- SET (-HL).b 1110 0111 0100 0bbb Z * - - 5
-
- aka SET (src).b
+ SET (x).b 1110 0000 xxxx xxxx 0100 0bbb Z * - - 5
+ SET (PC+A).b 1110 0001 0100 0bbb Z * - - 6
+ SET (DE).b 1110 0010 0100 0bbb Z * - - 4
+ SET (HL).b 1110 0011 0100 0bbb Z * - - 4
+ SET (HL+d).b 1110 0100 dddd dddd 0100 0bbb Z * - - 6
+ SET (HL+C).b 1110 0101 0100 0bbb Z * - - 6
+ SET (HL+).b 1110 0110 0100 0bbb Z * - - 5
+ SET (-HL).b 1110 0111 0100 0bbb Z * - - 5
+
+ aka SET (src).b
*/
m_cycles += 4;
@@ -992,16 +992,16 @@ void tlcs870_device::do_CLR_insrcbit(const uint8_t opbyte0, const uint8_t opbyte
{
/*
OP (opbyte0) (immval0) (opbyte1) (immval1) (immval2) JF ZF CF HF cycles
- CLR (x).b 1110 0000 xxxx xxxx 0100 1bbb Z * - - 5
- CLR (PC+A).b 1110 0001 0100 1bbb Z * - - 6
- CLR (DE).b 1110 0010 0100 1bbb Z * - - 4
- CLR (HL).b 1110 0011 0100 1bbb Z * - - 4
- CLR (HL+d).b 1110 0100 dddd dddd 0100 1bbb Z * - - 6
- CLR (HL+C).b 1110 0101 0100 1bbb Z * - - 6
- CLR (HL+).b 1110 0110 0100 1bbb Z * - - 5
- CLR (-HL).b 1110 0111 0100 1bbb Z * - - 5
-
- aka CLR (src).b
+ CLR (x).b 1110 0000 xxxx xxxx 0100 1bbb Z * - - 5
+ CLR (PC+A).b 1110 0001 0100 1bbb Z * - - 6
+ CLR (DE).b 1110 0010 0100 1bbb Z * - - 4
+ CLR (HL).b 1110 0011 0100 1bbb Z * - - 4
+ CLR (HL+d).b 1110 0100 dddd dddd 0100 1bbb Z * - - 6
+ CLR (HL+C).b 1110 0101 0100 1bbb Z * - - 6
+ CLR (HL+).b 1110 0110 0100 1bbb Z * - - 5
+ CLR (-HL).b 1110 0111 0100 1bbb Z * - - 5
+
+ aka CLR (src).b
*/
m_cycles += 4;
diff --git a/src/devices/cpu/tlcs870/tlcs870d.cpp b/src/devices/cpu/tlcs870/tlcs870d.cpp
index 50b7b12f05d..7900e764158 100644
--- a/src/devices/cpu/tlcs870/tlcs870d.cpp
+++ b/src/devices/cpu/tlcs870/tlcs870d.cpp
@@ -1469,7 +1469,7 @@ void tlcs870_disassembler::decode_register_prefix(uint8_t b0)
case 0xae:
case 0xaf:
// XCH r,g
- m_op = XCH;
+ m_op = XCH;
//m_flagsaffected |= FLAG_J | FLAG_Z;
diff --git a/src/devices/cpu/tms57002/tms57002.cpp b/src/devices/cpu/tms57002/tms57002.cpp
index 569f0b83a86..01ec9364e63 100644
--- a/src/devices/cpu/tms57002/tms57002.cpp
+++ b/src/devices/cpu/tms57002/tms57002.cpp
@@ -637,7 +637,7 @@ uint32_t tms57002_device::get_cmem(uint8_t addr)
cmem[addr] = update[update_counter_tail];
update_counter_tail = (update_counter_tail + 1) & 0x0f;
update_empty();
-
+
if(update_counter_head == update_counter_tail)
sti &= ~S_UPDATE;
@@ -794,7 +794,7 @@ void tms57002_device::execute_run()
else
xm_step_write();
}
-
+
macc_read = macc_write;
macc_write = macc;
diff --git a/src/devices/cpu/tms57002/tms57002.h b/src/devices/cpu/tms57002/tms57002.h
index 754d61bbeb1..28e57dc7969 100644
--- a/src/devices/cpu/tms57002/tms57002.h
+++ b/src/devices/cpu/tms57002/tms57002.h
@@ -141,10 +141,10 @@ private:
uint32_t xm_adr;
uint8_t host[4], hidx, allow_update;
-
+
uint32_t update[16];
uint8_t update_counter_head, update_counter_tail;
-
+
cd cache;
devcb_write_line m_dready_callback;
diff --git a/src/devices/cpu/tms57002/tmsinstr.lst b/src/devices/cpu/tms57002/tmsinstr.lst
index d73d2690f41..8ecd850a76f 100644
--- a/src/devices/cpu/tms57002/tmsinstr.lst
+++ b/src/devices/cpu/tms57002/tmsinstr.lst
@@ -545,7 +545,7 @@ zacc 1 10 1 n
zmac 1 30 1 n
zmac
-
+
raom 2b 3c 1 n f
raom
/* Undocumented instruction, reset ALU saturation flag */
diff --git a/src/devices/cpu/z180/z180.cpp b/src/devices/cpu/z180/z180.cpp
index 24ad1c3919d..b9b3c0fe418 100644
--- a/src/devices/cpu/z180/z180.cpp
+++ b/src/devices/cpu/z180/z180.cpp
@@ -364,7 +364,7 @@ bool z180_device::get_tend1()
#define Z180_CNTR_RESET 0x07
#define Z180_CNTR_RMASK 0xff
-#define Z180_CNTR_WMASK 0x4f /* Original: 0x7f - Modified: 0x4f - Inhibits setting up TI & RI flags due to the lack of CSIO implementation */
+#define Z180_CNTR_WMASK 0x4f /* Original: 0x7f - Modified: 0x4f - Inhibits setting up TI & RI flags due to the lack of CSIO implementation */
/* 0b CSI/O transmit/receive register */
#define Z180_TRDR_RESET 0x00
@@ -2390,7 +2390,7 @@ void z180_device::handle_io_timers(int cycles)
void z180_device::execute_run()
{
int curcycles;
-
+
/* check for NMIs on the way in; they can only be set externally */
/* via timers, and can't be dynamically enabled, so it is safe */
/* to just check here */
@@ -2441,7 +2441,7 @@ again:
if (!m_HALT)
{
m_R++;
- IO_FRC++; /* Added FRC counting, not implemented yet */
+ IO_FRC++; /* Added FRC counting, not implemented yet */
m_extra_cycles = 0;
curcycles = exec_op(ROP());
curcycles += m_extra_cycles;
@@ -2500,7 +2500,7 @@ again:
if (!m_HALT)
{
m_R++;
- IO_FRC++; /* Added FRC counting, not implemented yet */
+ IO_FRC++; /* Added FRC counting, not implemented yet */
m_extra_cycles = 0;
curcycles = exec_op(ROP());
curcycles += m_extra_cycles;
diff --git a/src/devices/machine/mb8421.cpp b/src/devices/machine/mb8421.cpp
index ce10f754d5e..a5b08f5ea90 100644
--- a/src/devices/machine/mb8421.cpp
+++ b/src/devices/machine/mb8421.cpp
@@ -9,7 +9,7 @@
MB843x is same as MB842x, except that it supports slave mode for 16-bit or
32-bit expansion. It makes sure there are no clashes with the _BUSY pin.
- IDT71321 is function compatible, but not pin compatible with MB8421
+ IDT71321 is function compatible, but not pin compatible with MB8421
**********************************************************************/
diff --git a/src/devices/machine/mc68681.cpp b/src/devices/machine/mc68681.cpp
index bc8244b731f..abb427feb48 100644
--- a/src/devices/machine/mc68681.cpp
+++ b/src/devices/machine/mc68681.cpp
@@ -760,7 +760,7 @@ WRITE8_MEMBER(xr68c681_device::write)
data &= 0x0f;
break;
}
-
+
mc68681_device::write(space, offset, data, mem_mask); /* pass on 68681 command */
}
diff --git a/src/devices/machine/pcf8583.cpp b/src/devices/machine/pcf8583.cpp
index 1865c882629..47babd1a2ac 100644
--- a/src/devices/machine/pcf8583.cpp
+++ b/src/devices/machine/pcf8583.cpp
@@ -4,12 +4,12 @@
Philips PCF8583 Clock and Calendar with 240 x 8-bit RAM
- TODO:
- - Alarm mode
- - Event-counter mode
- - Clock select
- - Clock output
- - Interrupts
+ TODO:
+ - Alarm mode
+ - Event-counter mode
+ - Clock select
+ - Clock output
+ - Interrupts
*********************************************************************/
diff --git a/src/devices/machine/pcf8583.h b/src/devices/machine/pcf8583.h
index 0031ef78dfe..f8d98295cb1 100644
--- a/src/devices/machine/pcf8583.h
+++ b/src/devices/machine/pcf8583.h
@@ -6,15 +6,15 @@
**********************************************************************
- The PCF8583 comes in three package configurations:
+ The PCF8583 comes in three package configurations:
- PCF8583P - 8-pin dual-inline package (DIP8)
- PCF8583T - 8-pin small-outline package (SO8)
- PCF8583BS - 20-pin thin quad-flat package (HVQFN20)
+ PCF8583P - 8-pin dual-inline package (DIP8)
+ PCF8583T - 8-pin small-outline package (SO8)
+ PCF8583BS - 20-pin thin quad-flat package (HVQFN20)
**********************************************************************
- DIP8 pinning: ____ ____
+ DIP8 pinning: ____ ____
| \/ |
OSCI 1 | | 8 Vdd
OSCI 2 | | 7 /INT
@@ -24,7 +24,7 @@
**********************************************************************
- SO8 pinning: _____ _____
+ SO8 pinning: _____ _____
| | \/ |
OSCI 1 | | | 8 Vdd
OSCI 2 | | | 7 /INT
@@ -34,10 +34,10 @@
**********************************************************************
- HVQFN20 pinning:
- NC NC NC NC NC
- 20 19 18 17 16
- __________________
+ HVQFN20 pinning:
+ NC NC NC NC NC
+ 20 19 18 17 16
+ __________________
| |
| __________ |
| | | |
@@ -95,45 +95,45 @@ protected:
private:
enum
{
- REG_CONTROL = 0x00,
- REG_HUNDREDTHS = 0x01,
- REG_SECONDS = 0x02,
- REG_MINUTES = 0x03,
- REG_HOURS = 0x04,
- REG_YEAR_DATE = 0x05,
- REG_MONTH_DAY = 0x06,
- REG_TIMER = 0x07,
- REG_ALARM_CONTROL = 0x08,
- REG_ALARM_HUNDREDTHS = 0x09,
- REG_ALARM_SECONDS = 0x0a,
- REG_ALARM_MINUTES = 0x0b,
- REG_ALARM_HOURS = 0x0c,
- REG_ALARM_DATE = 0x0d,
- REG_ALARM_MONTH = 0x0e,
- REG_ALARM_TIMER = 0x0f
+ REG_CONTROL = 0x00,
+ REG_HUNDREDTHS = 0x01,
+ REG_SECONDS = 0x02,
+ REG_MINUTES = 0x03,
+ REG_HOURS = 0x04,
+ REG_YEAR_DATE = 0x05,
+ REG_MONTH_DAY = 0x06,
+ REG_TIMER = 0x07,
+ REG_ALARM_CONTROL = 0x08,
+ REG_ALARM_HUNDREDTHS = 0x09,
+ REG_ALARM_SECONDS = 0x0a,
+ REG_ALARM_MINUTES = 0x0b,
+ REG_ALARM_HOURS = 0x0c,
+ REG_ALARM_DATE = 0x0d,
+ REG_ALARM_MONTH = 0x0e,
+ REG_ALARM_TIMER = 0x0f
};
enum
{
- CONTROL_STOP_BIT = 0x80
+ CONTROL_STOP_BIT = 0x80
};
static const device_timer_id TIMER_TICK = 0;
// get/set date
- uint8_t get_date_year() { return (m_data[REG_YEAR_DATE] >> 6) & 3; }
- void set_date_year(uint8_t year) { m_data[REG_YEAR_DATE] = (m_data[REG_YEAR_DATE] & 0x3f) | ((year % 4) << 6); }
- uint8_t get_date_month() { return bcd_to_integer(m_data[6] & 0x1f); }
- void set_date_month(uint8_t month) { m_data[REG_MONTH_DAY] = (m_data[REG_MONTH_DAY] & 0xe0) | (convert_to_bcd(month) & 0x1f); }
- uint8_t get_date_day() { return bcd_to_integer(m_data[REG_YEAR_DATE] & 0x3f); }
- void set_date_day(uint8_t day) { m_data[REG_YEAR_DATE] = (m_data[REG_YEAR_DATE] & 0xc0) | (convert_to_bcd(day) & 0x3f); }
+ uint8_t get_date_year() { return (m_data[REG_YEAR_DATE] >> 6) & 3; }
+ void set_date_year(uint8_t year) { m_data[REG_YEAR_DATE] = (m_data[REG_YEAR_DATE] & 0x3f) | ((year % 4) << 6); }
+ uint8_t get_date_month() { return bcd_to_integer(m_data[6] & 0x1f); }
+ void set_date_month(uint8_t month) { m_data[REG_MONTH_DAY] = (m_data[REG_MONTH_DAY] & 0xe0) | (convert_to_bcd(month) & 0x1f); }
+ uint8_t get_date_day() { return bcd_to_integer(m_data[REG_YEAR_DATE] & 0x3f); }
+ void set_date_day(uint8_t day) { m_data[REG_YEAR_DATE] = (m_data[REG_YEAR_DATE] & 0xc0) | (convert_to_bcd(day) & 0x3f); }
// get/set time
- uint8_t get_time_hour() { return bcd_to_integer(m_data[REG_HOURS]); }
- void set_time_hour(uint8_t hour) { m_data[REG_HOURS] = convert_to_bcd(hour); }
- uint8_t get_time_minute() { return bcd_to_integer(m_data[REG_MINUTES]); }
+ uint8_t get_time_hour() { return bcd_to_integer(m_data[REG_HOURS]); }
+ void set_time_hour(uint8_t hour) { m_data[REG_HOURS] = convert_to_bcd(hour); }
+ uint8_t get_time_minute() { return bcd_to_integer(m_data[REG_MINUTES]); }
void set_time_minute(uint8_t minute){ m_data[REG_MINUTES] = convert_to_bcd(minute); }
- uint8_t get_time_second() { return bcd_to_integer(m_data[REG_SECONDS]); }
+ uint8_t get_time_second() { return bcd_to_integer(m_data[REG_SECONDS]); }
void set_time_second(uint8_t second){ m_data[REG_SECONDS] = convert_to_bcd(second); }
void write_register(uint8_t offset, uint8_t data);
@@ -144,18 +144,18 @@ private:
// internal state
uint8_t m_data[256];
- int m_scl;
- int m_sda;
- int m_inp;
- bool m_transfer_active;
+ int m_scl;
+ int m_sda;
+ int m_inp;
+ bool m_transfer_active;
int m_bit_index;
- bool m_irq;
+ bool m_irq;
uint8_t m_data_recv_index;
uint8_t m_data_recv;
uint8_t m_mode;
uint8_t m_pos;
- uint8_t m_write_address;
- uint8_t m_read_address;
+ uint8_t m_write_address;
+ uint8_t m_read_address;
emu_timer * m_timer;
enum { RTC_MODE_NONE, RTC_MODE_SEND, RTC_MODE_RECV };
diff --git a/src/devices/machine/sda2006.cpp b/src/devices/machine/sda2006.cpp
index aef96819c8f..853e5cf871d 100755..100644
--- a/src/devices/machine/sda2006.cpp
+++ b/src/devices/machine/sda2006.cpp
@@ -5,15 +5,15 @@
#include "machine/sda2006.h"
//-------------------------------------------------
-//
+//
// Siemens SDA2006 512-bit (32x16) NV EEPROM
-//
+//
// TODO:
// - 8/12 bit controll word selection (currently emulates only 8 bt one)
// - INV pin
// - better( and correct) state flow
// - read mode, with reversed data stream
-//
+//
//-------------------------------------------------
enum {
@@ -23,8 +23,8 @@ enum {
CMD_UNKNOWN
};
-#define EEPROM_CAPACITY 0x40
-#define EEPROM_ADDRESS_MASK 0x1f
+#define EEPROM_CAPACITY 0x40
+#define EEPROM_ADDRESS_MASK 0x1f
// device type definition
DEFINE_DEVICE_TYPE(SDA2006, sda2006_device, "sda2006", "SDA2006 EEPROM")
@@ -173,7 +173,7 @@ WRITE_LINE_MEMBER( sda2006_device::write_clock )
m_write_stream_length = 0;
while(counter>0){
reversed_stream<<=1;
-
+
if (m_write_stream & mask) {
reversed_stream |= 1;
}
@@ -182,7 +182,7 @@ WRITE_LINE_MEMBER( sda2006_device::write_clock )
}
uint32_t command = bitswap<8>(m_write_stream, 7,6,5,4,3,0,1,2);
-
+
switch (command&3){
case CMD_WRITE: m_eeprom_data[(reversed_stream>>16) & EEPROM_ADDRESS_MASK] = reversed_stream & 0xffff; break;
case CMD_READ:
@@ -191,7 +191,7 @@ WRITE_LINE_MEMBER( sda2006_device::write_clock )
m_eeprom_state = EEPROM_READ;
break;
case CMD_READ_REVERSED:
- case CMD_UNKNOWN: break;
+ case CMD_UNKNOWN: break;
}
} else {
diff --git a/src/devices/machine/sda2006.h b/src/devices/machine/sda2006.h
index c17f655ef0a..31657be6344 100755..100644
--- a/src/devices/machine/sda2006.h
+++ b/src/devices/machine/sda2006.h
@@ -4,7 +4,7 @@
#define MAME_MACHINE_SDA2006_H
#pragma once
-
+
// sda2006_device
diff --git a/src/devices/sound/aica.cpp b/src/devices/sound/aica.cpp
index 4ad7c2f5995..e304b5a6fc4 100644
--- a/src/devices/sound/aica.cpp
+++ b/src/devices/sound/aica.cpp
@@ -14,7 +14,7 @@
- Some minor other tweeks (no EGHOLD, slighly more capable DSP)
TODO:
- - Where are EXTS Connected?
+ - Where are EXTS Connected?
*/
#include "emu.h"
@@ -980,7 +980,7 @@ void aica_device::w16(address_space &space,unsigned int addr,unsigned short val)
else if(addr<0x45c0)
*((unsigned short *) (m_DSP.EFREG+(addr-0x4580)/4))=val;
//else if(addr<0x45c8)
- // *((unsigned short *) (m_DSP.EXTS+(addr-0x45c0)/2))=val; // Read only
+ // *((unsigned short *) (m_DSP.EXTS+(addr-0x45c0)/2))=val; // Read only
}
}
diff --git a/src/devices/sound/c6280.cpp b/src/devices/sound/c6280.cpp
index 1b3665d40f8..647a7e5f4cb 100644
--- a/src/devices/sound/c6280.cpp
+++ b/src/devices/sound/c6280.cpp
@@ -36,9 +36,9 @@
- http://www.hudsonsoft.net/ww/about/about.html
- http://www.hudson.co.jp/corp/eng/coinfo/history.html
- Integrated on:
- HuC6280 CPU (PC Engine/TurboGrafx 16)
- HuC6230 Sound Chip (PC-FX, with OKI ADPCM)
+ Integrated on:
+ HuC6280 CPU (PC Engine/TurboGrafx 16)
+ HuC6230 Sound Chip (PC-FX, with OKI ADPCM)
*/
diff --git a/src/devices/sound/huc6230.cpp b/src/devices/sound/huc6230.cpp
index f762b2ad7f2..23155c4dc7f 100644
--- a/src/devices/sound/huc6230.cpp
+++ b/src/devices/sound/huc6230.cpp
@@ -2,12 +2,12 @@
// copyright-holders:cam900
/*
Hudson HuC6230 SoundBox
- HuC6280 PSG with ADPCM
+ HuC6280 PSG with ADPCM
- TODO:
- - Volume is linear?
- - Make it actually working
- - Implement CDDA Volume
+ TODO:
+ - Volume is linear?
+ - Make it actually working
+ - Implement CDDA Volume
*/
#include "emu.h"
@@ -52,7 +52,7 @@ void huc6230_device::sound_stream_update(sound_stream &stream, stream_sample_t *
if (!channel->m_interpolate)
sample = channel->m_curr_sample;
else
- sample = ((channel->m_prev_sample * (frq - channel->m_pos)) +
+ sample = ((channel->m_prev_sample * (frq - channel->m_pos)) +
(channel->m_curr_sample * channel->m_pos)) >> m_adpcm_freq;
outputs[0][i] = clamp(outputs[0][i] + ((sample * channel->m_lvol) >> 2), -32768, 32767);
diff --git a/src/devices/sound/qsoundhle.cpp b/src/devices/sound/qsoundhle.cpp
index 833c31c2e97..2fac6a79012 100644
--- a/src/devices/sound/qsoundhle.cpp
+++ b/src/devices/sound/qsoundhle.cpp
@@ -237,7 +237,7 @@ void qsound_hle_device::init_register_map()
m_register_map[(i << 3) + 4] = (uint16_t*)&m_voice[i].m_loop_len;
m_register_map[(i << 3) + 5] = (uint16_t*)&m_voice[i].m_end_addr;
m_register_map[(i << 3) + 6] = (uint16_t*)&m_voice[i].m_volume;
- m_register_map[(i << 3) + 7] = nullptr; // unused
+ m_register_map[(i << 3) + 7] = nullptr; // unused
m_register_map[i + 0x80] = (uint16_t*)&m_voice_pan[i];
m_register_map[i + 0xba] = (uint16_t*)&m_voice[i].m_echo;
}
@@ -277,7 +277,7 @@ int16_t qsound_hle_device::read_sample(uint16_t bank, uint16_t address)
bank &= 0x7FFF;
const uint32_t rom_addr = (bank << 16) | (address << 0);
const uint8_t sample_data = read_byte(rom_addr);
- return (int16_t)(sample_data << 8); // bit0-7 is tied to ground
+ return (int16_t)(sample_data << 8); // bit0-7 is tied to ground
}
/********************************************************************/
diff --git a/src/devices/sound/qsoundhle.h b/src/devices/sound/qsoundhle.h
index dfaded4d4bc..53d1300b583 100644
--- a/src/devices/sound/qsoundhle.h
+++ b/src/devices/sound/qsoundhle.h
@@ -38,18 +38,18 @@ private:
// DSP ROM sample map
enum {
- DATA_PAN_TAB = 0x110,
- DATA_ADPCM_TAB = 0x9dc,
- DATA_FILTER_TAB = 0xd53, // dual filter mode, 5 tables * 95 taps each
- DATA_FILTER_TAB2 = 0xf2e, // overlapping data (95+15+95)
+ DATA_PAN_TAB = 0x110,
+ DATA_ADPCM_TAB = 0x9dc,
+ DATA_FILTER_TAB = 0xd53, // dual filter mode, 5 tables * 95 taps each
+ DATA_FILTER_TAB2 = 0xf2e, // overlapping data (95+15+95)
STATE_BOOT = 0x000,
- STATE_INIT1 = 0x288,
- STATE_INIT2 = 0x61a,
- STATE_REFRESH1 = 0x039,
- STATE_REFRESH2 = 0x04f,
- STATE_NORMAL1 = 0x314,
- STATE_NORMAL2 = 0x6b2
+ STATE_INIT1 = 0x288,
+ STATE_INIT2 = 0x61a,
+ STATE_REFRESH1 = 0x039,
+ STATE_REFRESH2 = 0x04f,
+ STATE_NORMAL1 = 0x314,
+ STATE_NORMAL2 = 0x6b2
};
const uint16_t PAN_TABLE_DRY = 0;
@@ -87,7 +87,7 @@ private:
// Q1 Filter
struct qsound_fir {
- int m_tap_count = 0; // usually 95
+ int m_tap_count = 0; // usually 95
int m_delay_pos = 0;
uint16_t m_table_pos = 0;
int16_t m_taps[95] = { 0 };
diff --git a/src/devices/sound/zsg2.cpp b/src/devices/sound/zsg2.cpp
index 92ddef50212..6e97ce01f43 100644
--- a/src/devices/sound/zsg2.cpp
+++ b/src/devices/sound/zsg2.cpp
@@ -6,47 +6,47 @@
Written by Olivier Galibert
MAME conversion by R. Belmont
Working emulation by The Talentuous Hands Of The Popularious hap
- Properly working emulation by superctr
+ Properly working emulation by superctr
---------------------------------------------------------
- Register map:
- 000-5fe : Channel specific registers
- (high) (low)
- +000 : xxxxxxxx -------- : Start address (low)
- +000 : -------- xxxxxxxx : Unknown register (usually cleared)
- +002 : xxxxxxxx -------- : Address page
- : -------- xxxxxxxx : Start address (high)
- +004 : -------- -------- : Unknown register (usually cleared)
- +006 : -----x-- -------- : Unknown bit, always set
- +008 : xxxxxxxx xxxxxxxx : Frequency
- +00a : xxxxxxxx -------- : DSP ch 3 (right) output gain
- : -------- xxxxxxxx : Loop address (low)
- +00c : xxxxxxxx xxxxxxxx : End address
- +00e : xxxxxxxx -------- : DSP ch 2 (Left) output gain
- : -------- xxxxxxxx : Loop address (high)
- +010 : xxxxxxxx xxxxxxxx : Initial filter time constant
- +012 : xxxxxxxx xxxxxxxx : Current filter time constant
- +014 : xxxxxxxx xxxxxxxx : Initial volume
- +016 : xxxxxxxx xxxxxxxx : Current volume
- +018 : xxxxxxxx xxxxxxxx : Target filter time constant
- +01a : xxxxxxxx -------- : DSP ch 1 (chorus) output gain
- : -------- xxxxxxxx : Filter ramping speed
- +01c : xxxxxxxx xxxxxxxx : Target volume
- +01e : xxxxxxxx -------- : DSP ch 0 (reverb) output gain
- : -------- xxxxxxxx : Filter ramping speed
- 600-604 : Key on flags (each bit corresponds to a channel)
- 608-60c : Key off flags (each bit corresponds to a channel)
- 618 : Unknown register (usually 0x5cbc is written)
- 61a : Unknown register (usually 0x5cbc is written)
- 620 : Unknown register (usually 0x0128 is written)
- 628 : Unknown register (usually 0x0066 is written)
- 630 : Unknown register (usually 0x0001 is written)
- 638 : ROM readback address low
- 63a : ROM readback address high
- 63c : ROM readback word low
- 63e : ROM readback word high
-
- ---------------------------------------------------------
+ Register map:
+ 000-5fe : Channel specific registers
+ (high) (low)
+ +000 : xxxxxxxx -------- : Start address (low)
+ +000 : -------- xxxxxxxx : Unknown register (usually cleared)
+ +002 : xxxxxxxx -------- : Address page
+ : -------- xxxxxxxx : Start address (high)
+ +004 : -------- -------- : Unknown register (usually cleared)
+ +006 : -----x-- -------- : Unknown bit, always set
+ +008 : xxxxxxxx xxxxxxxx : Frequency
+ +00a : xxxxxxxx -------- : DSP ch 3 (right) output gain
+ : -------- xxxxxxxx : Loop address (low)
+ +00c : xxxxxxxx xxxxxxxx : End address
+ +00e : xxxxxxxx -------- : DSP ch 2 (Left) output gain
+ : -------- xxxxxxxx : Loop address (high)
+ +010 : xxxxxxxx xxxxxxxx : Initial filter time constant
+ +012 : xxxxxxxx xxxxxxxx : Current filter time constant
+ +014 : xxxxxxxx xxxxxxxx : Initial volume
+ +016 : xxxxxxxx xxxxxxxx : Current volume
+ +018 : xxxxxxxx xxxxxxxx : Target filter time constant
+ +01a : xxxxxxxx -------- : DSP ch 1 (chorus) output gain
+ : -------- xxxxxxxx : Filter ramping speed
+ +01c : xxxxxxxx xxxxxxxx : Target volume
+ +01e : xxxxxxxx -------- : DSP ch 0 (reverb) output gain
+ : -------- xxxxxxxx : Filter ramping speed
+ 600-604 : Key on flags (each bit corresponds to a channel)
+ 608-60c : Key off flags (each bit corresponds to a channel)
+ 618 : Unknown register (usually 0x5cbc is written)
+ 61a : Unknown register (usually 0x5cbc is written)
+ 620 : Unknown register (usually 0x0128 is written)
+ 628 : Unknown register (usually 0x0066 is written)
+ 630 : Unknown register (usually 0x0001 is written)
+ 638 : ROM readback address low
+ 63a : ROM readback address high
+ 63c : ROM readback word low
+ 63e : ROM readback word high
+
+ ---------------------------------------------------------
Additional notes on the sample format, reverse-engineered
by Olivier Galibert and David Haywood:
@@ -553,15 +553,15 @@ void zsg2_device::control_w(int reg, uint16_t data)
break;
}
-// case 0x0c: //These registers are sometimes written to by the CPU. Unknown purpose.
-// break;
-// case 0x0d:
-// break;
-// case 0x10:
-// break;
+// case 0x0c: //These registers are sometimes written to by the CPU. Unknown purpose.
+// break;
+// case 0x0d:
+// break;
+// case 0x10:
+// break;
-// case 0x18:
-// break;
+// case 0x18:
+// break;
case 0x1c:
// rom readback address low (low 2 bits always 0)
diff --git a/src/devices/video/huc6272.cpp b/src/devices/video/huc6272.cpp
index 264e896bbd3..8fd271afc0a 100644
--- a/src/devices/video/huc6272.cpp
+++ b/src/devices/video/huc6272.cpp
@@ -6,7 +6,7 @@
TODO:
- Use NSCSI instead of legacy one!
- - ADPCM Transfer is correct?
+ - ADPCM Transfer is correct?
***************************************************************************/
diff --git a/src/emu/emumem_hedp.cpp b/src/emu/emumem_hedp.cpp
index 84b43191d1d..84a592fbfbd 100644
--- a/src/emu/emumem_hedp.cpp
+++ b/src/emu/emumem_hedp.cpp
@@ -5,62 +5,62 @@
#include "emumem_hea.h"
#include "emumem_hedp.h"
-template<int Width, int AddrShift, int Endian, typename READ> template<typename R>
- std::enable_if_t<std::is_same<R, read8_delegate>::value ||
- std::is_same<R, read16_delegate>::value ||
- std::is_same<R, read32_delegate>::value ||
- std::is_same<R, read64_delegate>::value,
- typename emu::detail::handler_entry_size<Width>::uX> handler_entry_read_delegate<Width, AddrShift, Endian, READ>::read_impl(offs_t offset, uX mem_mask)
+template<int Width, int AddrShift, int Endian, typename READ> template<typename R>
+ std::enable_if_t<std::is_same<R, read8_delegate>::value ||
+ std::is_same<R, read16_delegate>::value ||
+ std::is_same<R, read32_delegate>::value ||
+ std::is_same<R, read64_delegate>::value,
+ typename emu::detail::handler_entry_size<Width>::uX> handler_entry_read_delegate<Width, AddrShift, Endian, READ>::read_impl(offs_t offset, uX mem_mask)
{
return m_delegate(*inh::m_space, ((offset - inh::m_address_base) & inh::m_address_mask) >> (Width + AddrShift), mem_mask);
}
-template<int Width, int AddrShift, int Endian, typename READ> template<typename R>
- std::enable_if_t<std::is_same<R, read8m_delegate>::value ||
- std::is_same<R, read16m_delegate>::value ||
- std::is_same<R, read32m_delegate>::value ||
- std::is_same<R, read64m_delegate>::value,
- typename emu::detail::handler_entry_size<Width>::uX> handler_entry_read_delegate<Width, AddrShift, Endian, READ>::read_impl(offs_t offset, uX mem_mask)
+template<int Width, int AddrShift, int Endian, typename READ> template<typename R>
+ std::enable_if_t<std::is_same<R, read8m_delegate>::value ||
+ std::is_same<R, read16m_delegate>::value ||
+ std::is_same<R, read32m_delegate>::value ||
+ std::is_same<R, read64m_delegate>::value,
+ typename emu::detail::handler_entry_size<Width>::uX> handler_entry_read_delegate<Width, AddrShift, Endian, READ>::read_impl(offs_t offset, uX mem_mask)
{
return m_delegate(*inh::m_space, ((offset - inh::m_address_base) & inh::m_address_mask) >> (Width + AddrShift));
}
-template<int Width, int AddrShift, int Endian, typename READ> template<typename R>
- std::enable_if_t<std::is_same<R, read8s_delegate>::value ||
- std::is_same<R, read16s_delegate>::value ||
- std::is_same<R, read32s_delegate>::value ||
- std::is_same<R, read64s_delegate>::value,
- typename emu::detail::handler_entry_size<Width>::uX> handler_entry_read_delegate<Width, AddrShift, Endian, READ>::read_impl(offs_t offset, uX mem_mask)
+template<int Width, int AddrShift, int Endian, typename READ> template<typename R>
+ std::enable_if_t<std::is_same<R, read8s_delegate>::value ||
+ std::is_same<R, read16s_delegate>::value ||
+ std::is_same<R, read32s_delegate>::value ||
+ std::is_same<R, read64s_delegate>::value,
+ typename emu::detail::handler_entry_size<Width>::uX> handler_entry_read_delegate<Width, AddrShift, Endian, READ>::read_impl(offs_t offset, uX mem_mask)
{
return m_delegate(((offset - inh::m_address_base) & inh::m_address_mask) >> (Width + AddrShift), mem_mask);
}
-template<int Width, int AddrShift, int Endian, typename READ> template<typename R>
- std::enable_if_t<std::is_same<R, read8sm_delegate>::value ||
- std::is_same<R, read16sm_delegate>::value ||
- std::is_same<R, read32sm_delegate>::value ||
- std::is_same<R, read64sm_delegate>::value,
- typename emu::detail::handler_entry_size<Width>::uX> handler_entry_read_delegate<Width, AddrShift, Endian, READ>::read_impl(offs_t offset, uX mem_mask)
+template<int Width, int AddrShift, int Endian, typename READ> template<typename R>
+ std::enable_if_t<std::is_same<R, read8sm_delegate>::value ||
+ std::is_same<R, read16sm_delegate>::value ||
+ std::is_same<R, read32sm_delegate>::value ||
+ std::is_same<R, read64sm_delegate>::value,
+ typename emu::detail::handler_entry_size<Width>::uX> handler_entry_read_delegate<Width, AddrShift, Endian, READ>::read_impl(offs_t offset, uX mem_mask)
{
return m_delegate(((offset - inh::m_address_base) & inh::m_address_mask) >> (Width + AddrShift));
}
-template<int Width, int AddrShift, int Endian, typename READ> template<typename R>
- std::enable_if_t<std::is_same<R, read8mo_delegate>::value ||
- std::is_same<R, read16mo_delegate>::value ||
- std::is_same<R, read32mo_delegate>::value ||
- std::is_same<R, read64mo_delegate>::value,
- typename emu::detail::handler_entry_size<Width>::uX> handler_entry_read_delegate<Width, AddrShift, Endian, READ>::read_impl(offs_t offset, uX mem_mask)
+template<int Width, int AddrShift, int Endian, typename READ> template<typename R>
+ std::enable_if_t<std::is_same<R, read8mo_delegate>::value ||
+ std::is_same<R, read16mo_delegate>::value ||
+ std::is_same<R, read32mo_delegate>::value ||
+ std::is_same<R, read64mo_delegate>::value,
+ typename emu::detail::handler_entry_size<Width>::uX> handler_entry_read_delegate<Width, AddrShift, Endian, READ>::read_impl(offs_t offset, uX mem_mask)
{
return m_delegate(*inh::m_space);
}
-template<int Width, int AddrShift, int Endian, typename READ> template<typename R>
- std::enable_if_t<std::is_same<R, read8smo_delegate>::value ||
- std::is_same<R, read16smo_delegate>::value ||
- std::is_same<R, read32smo_delegate>::value ||
- std::is_same<R, read64smo_delegate>::value,
- typename emu::detail::handler_entry_size<Width>::uX> handler_entry_read_delegate<Width, AddrShift, Endian, READ>::read_impl(offs_t offset, uX mem_mask)
+template<int Width, int AddrShift, int Endian, typename READ> template<typename R>
+ std::enable_if_t<std::is_same<R, read8smo_delegate>::value ||
+ std::is_same<R, read16smo_delegate>::value ||
+ std::is_same<R, read32smo_delegate>::value ||
+ std::is_same<R, read64smo_delegate>::value,
+ typename emu::detail::handler_entry_size<Width>::uX> handler_entry_read_delegate<Width, AddrShift, Endian, READ>::read_impl(offs_t offset, uX mem_mask)
{
return m_delegate();
}
@@ -76,61 +76,61 @@ template<int Width, int AddrShift, int Endian, typename READ> std::string handle
}
template<int Width, int AddrShift, int Endian, typename WRITE> template<typename W>
- std::enable_if_t<std::is_same<W, write8_delegate>::value ||
- std::is_same<W, write16_delegate>::value ||
- std::is_same<W, write32_delegate>::value ||
- std::is_same<W, write64_delegate>::value,
- void> handler_entry_write_delegate<Width, AddrShift, Endian, WRITE>::write_impl(offs_t offset, uX data, uX mem_mask)
+ std::enable_if_t<std::is_same<W, write8_delegate>::value ||
+ std::is_same<W, write16_delegate>::value ||
+ std::is_same<W, write32_delegate>::value ||
+ std::is_same<W, write64_delegate>::value,
+ void> handler_entry_write_delegate<Width, AddrShift, Endian, WRITE>::write_impl(offs_t offset, uX data, uX mem_mask)
{
m_delegate(*inh::m_space, ((offset - inh::m_address_base) & inh::m_address_mask) >> (Width + AddrShift), data, mem_mask);
}
template<int Width, int AddrShift, int Endian, typename WRITE> template<typename W>
- std::enable_if_t<std::is_same<W, write8m_delegate>::value ||
- std::is_same<W, write16m_delegate>::value ||
- std::is_same<W, write32m_delegate>::value ||
- std::is_same<W, write64m_delegate>::value,
- void> handler_entry_write_delegate<Width, AddrShift, Endian, WRITE>::write_impl(offs_t offset, uX data, uX mem_mask)
+ std::enable_if_t<std::is_same<W, write8m_delegate>::value ||
+ std::is_same<W, write16m_delegate>::value ||
+ std::is_same<W, write32m_delegate>::value ||
+ std::is_same<W, write64m_delegate>::value,
+ void> handler_entry_write_delegate<Width, AddrShift, Endian, WRITE>::write_impl(offs_t offset, uX data, uX mem_mask)
{
m_delegate(*inh::m_space, ((offset - inh::m_address_base) & inh::m_address_mask) >> (Width + AddrShift), data);
}
template<int Width, int AddrShift, int Endian, typename WRITE> template<typename W>
- std::enable_if_t<std::is_same<W, write8s_delegate>::value ||
- std::is_same<W, write16s_delegate>::value ||
- std::is_same<W, write32s_delegate>::value ||
- std::is_same<W, write64s_delegate>::value,
- void> handler_entry_write_delegate<Width, AddrShift, Endian, WRITE>::write_impl(offs_t offset, uX data, uX mem_mask)
+ std::enable_if_t<std::is_same<W, write8s_delegate>::value ||
+ std::is_same<W, write16s_delegate>::value ||
+ std::is_same<W, write32s_delegate>::value ||
+ std::is_same<W, write64s_delegate>::value,
+ void> handler_entry_write_delegate<Width, AddrShift, Endian, WRITE>::write_impl(offs_t offset, uX data, uX mem_mask)
{
m_delegate(((offset - inh::m_address_base) & inh::m_address_mask) >> (Width + AddrShift), data, mem_mask);
}
template<int Width, int AddrShift, int Endian, typename WRITE> template<typename W>
- std::enable_if_t<std::is_same<W, write8sm_delegate>::value ||
- std::is_same<W, write16sm_delegate>::value ||
- std::is_same<W, write32sm_delegate>::value ||
- std::is_same<W, write64sm_delegate>::value,
- void> handler_entry_write_delegate<Width, AddrShift, Endian, WRITE>::write_impl(offs_t offset, uX data, uX mem_mask)
+ std::enable_if_t<std::is_same<W, write8sm_delegate>::value ||
+ std::is_same<W, write16sm_delegate>::value ||
+ std::is_same<W, write32sm_delegate>::value ||
+ std::is_same<W, write64sm_delegate>::value,
+ void> handler_entry_write_delegate<Width, AddrShift, Endian, WRITE>::write_impl(offs_t offset, uX data, uX mem_mask)
{
m_delegate(((offset - inh::m_address_base) & inh::m_address_mask) >> (Width + AddrShift), data);
}
template<int Width, int AddrShift, int Endian, typename WRITE> template<typename W>
- std::enable_if_t<std::is_same<W, write8mo_delegate>::value ||
- std::is_same<W, write16mo_delegate>::value ||
- std::is_same<W, write32mo_delegate>::value ||
- std::is_same<W, write64mo_delegate>::value,
- void> handler_entry_write_delegate<Width, AddrShift, Endian, WRITE>::write_impl(offs_t offset, uX data, uX mem_mask)
+ std::enable_if_t<std::is_same<W, write8mo_delegate>::value ||
+ std::is_same<W, write16mo_delegate>::value ||
+ std::is_same<W, write32mo_delegate>::value ||
+ std::is_same<W, write64mo_delegate>::value,
+ void> handler_entry_write_delegate<Width, AddrShift, Endian, WRITE>::write_impl(offs_t offset, uX data, uX mem_mask)
{
m_delegate(*inh::m_space, data);
}
template<int Width, int AddrShift, int Endian, typename WRITE> template<typename W>
- std::enable_if_t<std::is_same<W, write8smo_delegate>::value ||
- std::is_same<W, write16smo_delegate>::value ||
- std::is_same<W, write32smo_delegate>::value ||
- std::is_same<W, write64smo_delegate>::value,
- void> handler_entry_write_delegate<Width, AddrShift, Endian, WRITE>::write_impl(offs_t offset, uX data, uX mem_mask)
+ std::enable_if_t<std::is_same<W, write8smo_delegate>::value ||
+ std::is_same<W, write16smo_delegate>::value ||
+ std::is_same<W, write32smo_delegate>::value ||
+ std::is_same<W, write64smo_delegate>::value,
+ void> handler_entry_write_delegate<Width, AddrShift, Endian, WRITE>::write_impl(offs_t offset, uX data, uX mem_mask)
{
m_delegate(data);
}
diff --git a/src/emu/emumem_hedp.h b/src/emu/emumem_hedp.h
index 4b21085f7a9..cba4877b20c 100644
--- a/src/emu/emumem_hedp.h
+++ b/src/emu/emumem_hedp.h
@@ -21,47 +21,47 @@ public:
private:
READ m_delegate;
- template<typename R>
- std::enable_if_t<std::is_same<R, read8_delegate>::value ||
- std::is_same<R, read16_delegate>::value ||
- std::is_same<R, read32_delegate>::value ||
- std::is_same<R, read64_delegate>::value,
- uX> read_impl(offs_t offset, uX mem_mask);
-
- template<typename R>
- std::enable_if_t<std::is_same<R, read8m_delegate>::value ||
- std::is_same<R, read16m_delegate>::value ||
- std::is_same<R, read32m_delegate>::value ||
- std::is_same<R, read64m_delegate>::value,
- uX> read_impl(offs_t offset, uX mem_mask);
-
- template<typename R>
- std::enable_if_t<std::is_same<R, read8s_delegate>::value ||
- std::is_same<R, read16s_delegate>::value ||
- std::is_same<R, read32s_delegate>::value ||
- std::is_same<R, read64s_delegate>::value,
- uX> read_impl(offs_t offset, uX mem_mask);
-
- template<typename R>
- std::enable_if_t<std::is_same<R, read8sm_delegate>::value ||
- std::is_same<R, read16sm_delegate>::value ||
- std::is_same<R, read32sm_delegate>::value ||
- std::is_same<R, read64sm_delegate>::value,
- uX> read_impl(offs_t offset, uX mem_mask);
-
- template<typename R>
- std::enable_if_t<std::is_same<R, read8mo_delegate>::value ||
- std::is_same<R, read16mo_delegate>::value ||
- std::is_same<R, read32mo_delegate>::value ||
- std::is_same<R, read64mo_delegate>::value,
- uX> read_impl(offs_t offset, uX mem_mask);
-
- template<typename R>
- std::enable_if_t<std::is_same<R, read8smo_delegate>::value ||
- std::is_same<R, read16smo_delegate>::value ||
- std::is_same<R, read32smo_delegate>::value ||
- std::is_same<R, read64smo_delegate>::value,
- uX> read_impl(offs_t offset, uX mem_mask);
+ template<typename R>
+ std::enable_if_t<std::is_same<R, read8_delegate>::value ||
+ std::is_same<R, read16_delegate>::value ||
+ std::is_same<R, read32_delegate>::value ||
+ std::is_same<R, read64_delegate>::value,
+ uX> read_impl(offs_t offset, uX mem_mask);
+
+ template<typename R>
+ std::enable_if_t<std::is_same<R, read8m_delegate>::value ||
+ std::is_same<R, read16m_delegate>::value ||
+ std::is_same<R, read32m_delegate>::value ||
+ std::is_same<R, read64m_delegate>::value,
+ uX> read_impl(offs_t offset, uX mem_mask);
+
+ template<typename R>
+ std::enable_if_t<std::is_same<R, read8s_delegate>::value ||
+ std::is_same<R, read16s_delegate>::value ||
+ std::is_same<R, read32s_delegate>::value ||
+ std::is_same<R, read64s_delegate>::value,
+ uX> read_impl(offs_t offset, uX mem_mask);
+
+ template<typename R>
+ std::enable_if_t<std::is_same<R, read8sm_delegate>::value ||
+ std::is_same<R, read16sm_delegate>::value ||
+ std::is_same<R, read32sm_delegate>::value ||
+ std::is_same<R, read64sm_delegate>::value,
+ uX> read_impl(offs_t offset, uX mem_mask);
+
+ template<typename R>
+ std::enable_if_t<std::is_same<R, read8mo_delegate>::value ||
+ std::is_same<R, read16mo_delegate>::value ||
+ std::is_same<R, read32mo_delegate>::value ||
+ std::is_same<R, read64mo_delegate>::value,
+ uX> read_impl(offs_t offset, uX mem_mask);
+
+ template<typename R>
+ std::enable_if_t<std::is_same<R, read8smo_delegate>::value ||
+ std::is_same<R, read16smo_delegate>::value ||
+ std::is_same<R, read32smo_delegate>::value ||
+ std::is_same<R, read64smo_delegate>::value,
+ uX> read_impl(offs_t offset, uX mem_mask);
};
template<int Width, int AddrShift, int Endian, typename WRITE> class handler_entry_write_delegate : public handler_entry_write_address<Width, AddrShift, Endian>
@@ -80,47 +80,47 @@ public:
private:
WRITE m_delegate;
- template<typename W>
- std::enable_if_t<std::is_same<W, write8_delegate>::value ||
- std::is_same<W, write16_delegate>::value ||
- std::is_same<W, write32_delegate>::value ||
- std::is_same<W, write64_delegate>::value,
- void> write_impl(offs_t offset, uX data, uX mem_mask);
-
- template<typename W>
- std::enable_if_t<std::is_same<W, write8m_delegate>::value ||
- std::is_same<W, write16m_delegate>::value ||
- std::is_same<W, write32m_delegate>::value ||
- std::is_same<W, write64m_delegate>::value,
- void> write_impl(offs_t offset, uX data, uX mem_mask);
-
- template<typename W>
- std::enable_if_t<std::is_same<W, write8s_delegate>::value ||
- std::is_same<W, write16s_delegate>::value ||
- std::is_same<W, write32s_delegate>::value ||
- std::is_same<W, write64s_delegate>::value,
- void> write_impl(offs_t offset, uX data, uX mem_mask);
-
- template<typename W>
- std::enable_if_t<std::is_same<W, write8sm_delegate>::value ||
- std::is_same<W, write16sm_delegate>::value ||
- std::is_same<W, write32sm_delegate>::value ||
- std::is_same<W, write64sm_delegate>::value,
- void> write_impl(offs_t offset, uX data, uX mem_mask);
-
- template<typename W>
- std::enable_if_t<std::is_same<W, write8mo_delegate>::value ||
- std::is_same<W, write16mo_delegate>::value ||
- std::is_same<W, write32mo_delegate>::value ||
- std::is_same<W, write64mo_delegate>::value,
- void> write_impl(offs_t offset, uX data, uX mem_mask);
-
- template<typename W>
- std::enable_if_t<std::is_same<W, write8smo_delegate>::value ||
- std::is_same<W, write16smo_delegate>::value ||
- std::is_same<W, write32smo_delegate>::value ||
- std::is_same<W, write64smo_delegate>::value,
- void> write_impl(offs_t offset, uX data, uX mem_mask);
+ template<typename W>
+ std::enable_if_t<std::is_same<W, write8_delegate>::value ||
+ std::is_same<W, write16_delegate>::value ||
+ std::is_same<W, write32_delegate>::value ||
+ std::is_same<W, write64_delegate>::value,
+ void> write_impl(offs_t offset, uX data, uX mem_mask);
+
+ template<typename W>
+ std::enable_if_t<std::is_same<W, write8m_delegate>::value ||
+ std::is_same<W, write16m_delegate>::value ||
+ std::is_same<W, write32m_delegate>::value ||
+ std::is_same<W, write64m_delegate>::value,
+ void> write_impl(offs_t offset, uX data, uX mem_mask);
+
+ template<typename W>
+ std::enable_if_t<std::is_same<W, write8s_delegate>::value ||
+ std::is_same<W, write16s_delegate>::value ||
+ std::is_same<W, write32s_delegate>::value ||
+ std::is_same<W, write64s_delegate>::value,
+ void> write_impl(offs_t offset, uX data, uX mem_mask);
+
+ template<typename W>
+ std::enable_if_t<std::is_same<W, write8sm_delegate>::value ||
+ std::is_same<W, write16sm_delegate>::value ||
+ std::is_same<W, write32sm_delegate>::value ||
+ std::is_same<W, write64sm_delegate>::value,
+ void> write_impl(offs_t offset, uX data, uX mem_mask);
+
+ template<typename W>
+ std::enable_if_t<std::is_same<W, write8mo_delegate>::value ||
+ std::is_same<W, write16mo_delegate>::value ||
+ std::is_same<W, write32mo_delegate>::value ||
+ std::is_same<W, write64mo_delegate>::value,
+ void> write_impl(offs_t offset, uX data, uX mem_mask);
+
+ template<typename W>
+ std::enable_if_t<std::is_same<W, write8smo_delegate>::value ||
+ std::is_same<W, write16smo_delegate>::value ||
+ std::is_same<W, write32smo_delegate>::value ||
+ std::is_same<W, write64smo_delegate>::value,
+ void> write_impl(offs_t offset, uX data, uX mem_mask);
};
diff --git a/src/emu/screen.h b/src/emu/screen.h
index 3215fc6cd7e..8445c4779d7 100644
--- a/src/emu/screen.h
+++ b/src/emu/screen.h
@@ -341,7 +341,7 @@ private:
// inline configuration data
screen_type_enum m_type; // type of screen
int m_orientation; // orientation flags combined with system flags
- std::pair<unsigned, unsigned> m_phys_aspect; // physical aspect ratio
+ std::pair<unsigned, unsigned> m_phys_aspect; // physical aspect ratio
bool m_oldstyle_vblank_supplied; // MCFG_SCREEN_VBLANK_TIME macro used
attoseconds_t m_refresh; // default refresh period
attoseconds_t m_vblank; // duration of a VBLANK
diff --git a/src/mame/audio/sprint8.cpp b/src/mame/audio/sprint8.cpp
index 74c4fea6d09..e187173cbcd 100644
--- a/src/mame/audio/sprint8.cpp
+++ b/src/mame/audio/sprint8.cpp
@@ -331,4 +331,4 @@ MACHINE_CONFIG_START(sprint8_state::sprint8_audio)
motor.q_out_cb<6>().set("discrete", FUNC(discrete_device::write_line<SPRINT8_MOTOR7_EN>));
motor.q_out_cb<7>().set("discrete", FUNC(discrete_device::write_line<SPRINT8_MOTOR8_EN>));
MACHINE_CONFIG_END
-; \ No newline at end of file
+;
diff --git a/src/mame/audio/taito_zm.cpp b/src/mame/audio/taito_zm.cpp
index bdb1da11987..4e931efd9dd 100644
--- a/src/mame/audio/taito_zm.cpp
+++ b/src/mame/audio/taito_zm.cpp
@@ -115,7 +115,7 @@ void taito_zoom_device::update_status_pin(int state)
{
printf("inside callback set status to %d\n",state);
m_soundcpu->set_input_line(1, state);
- machine().scheduler().synchronize(); // the fix to all problems
+ machine().scheduler().synchronize(); // the fix to all problems
}
void taito_zoom_device::taitozoom_mn_map(address_map &map)
diff --git a/src/mame/audio/taito_zm.h b/src/mame/audio/taito_zm.h
index 0fc63114738..11d32a8d23d 100644
--- a/src/mame/audio/taito_zm.h
+++ b/src/mame/audio/taito_zm.h
@@ -57,7 +57,7 @@ private:
uint8_t m_tms_ctrl;
bool m_use_flash;
std::unique_ptr<uint8_t[]> m_snd_shared_ram;
-
+
void update_status_pin(int state);
};
diff --git a/src/mame/audio/targ.cpp b/src/mame/audio/targ.cpp
index 08567e3e1de..11320a14ba9 100644
--- a/src/mame/audio/targ.cpp
+++ b/src/mame/audio/targ.cpp
@@ -63,7 +63,7 @@ WRITE8_MEMBER( exidy_state::targ_audio_1_w )
/* shot */
if (FALLING_EDGE(0x02) && !m_samples->playing(0)) m_samples->start(0,1);
- if (RISING_EDGE(0x02)) m_samples->start(0,1);
+ if (RISING_EDGE(0x02)) m_samples->start(0,1);
/* crash */
if (RISING_EDGE(0x20))
diff --git a/src/mame/drivers/4roses.cpp b/src/mame/drivers/4roses.cpp
index 9fdbf48c848..e80e9dca94e 100644
--- a/src/mame/drivers/4roses.cpp
+++ b/src/mame/drivers/4roses.cpp
@@ -460,7 +460,7 @@ MACHINE_CONFIG_START(_4roses_state::_4roses)
MCFG_DEVICE_PROGRAM_MAP(_4roses_map)
MCFG_DEVICE_OPCODES_MAP(_4roses_opcodes_map)
-// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
+// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
/* video hardware */
diff --git a/src/mame/drivers/amaticmg.cpp b/src/mame/drivers/amaticmg.cpp
index 7c8e5eafca2..bc575f01d2f 100644
--- a/src/mame/drivers/amaticmg.cpp
+++ b/src/mame/drivers/amaticmg.cpp
@@ -849,7 +849,7 @@ MACHINE_CONFIG_START(amaticmg_state::amaticmg)
MCFG_DEVICE_PROGRAM_MAP(amaticmg_map)
MCFG_DEVICE_IO_MAP(amaticmg_portmap)
-// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
+// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
/* 3x 8255 */
MCFG_DEVICE_ADD("ppi8255_0", I8255A, 0)
diff --git a/src/mame/drivers/ambush.cpp b/src/mame/drivers/ambush.cpp
index 83462718b38..1ef64c55042 100644
--- a/src/mame/drivers/ambush.cpp
+++ b/src/mame/drivers/ambush.cpp
@@ -1,4 +1,4 @@
-// license: BSD-3-Clause
+// license: BSD-3-Clause
// copyright-holders: Zsolt Vasvari, Dirk Best
/***************************************************************************
diff --git a/src/mame/drivers/bingor.cpp b/src/mame/drivers/bingor.cpp
index c6d1d54596c..94cf6b99993 100644
--- a/src/mame/drivers/bingor.cpp
+++ b/src/mame/drivers/bingor.cpp
@@ -701,7 +701,7 @@ MACHINE_CONFIG_START(bingor_state::bingor)
MCFG_DEVICE_ADD("pic", PIC16C57, 12000000) //?? Mhz
MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_bingor)
-// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
+// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
diff --git a/src/mame/drivers/blitz68k.cpp b/src/mame/drivers/blitz68k.cpp
index f25f1272a96..8ad214c4749 100644
--- a/src/mame/drivers/blitz68k.cpp
+++ b/src/mame/drivers/blitz68k.cpp
@@ -1816,7 +1816,7 @@ MACHINE_CONFIG_START(blitz68k_state::bankrob)
// MC68HC705C8P (MCU2)
-// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
+// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
@@ -1846,7 +1846,7 @@ MACHINE_CONFIG_START(blitz68k_state::bankroba)
// MC68HC705C8P (MCU)
-// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
+// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
@@ -1875,7 +1875,7 @@ MACHINE_CONFIG_START(blitz68k_state::deucesw2)
// MC68HC705C8P (MCU)
-// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
+// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
@@ -1906,7 +1906,7 @@ MACHINE_CONFIG_START(blitz68k_state::dualgame)
// MC68HC705C8P (MCU2)
-// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
+// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
@@ -1935,7 +1935,7 @@ MACHINE_CONFIG_START(blitz68k_state::hermit)
// MC68HC705C8P (MCU)
-// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
+// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
@@ -1969,7 +1969,7 @@ MACHINE_CONFIG_START(blitz68k_state::maxidbl)
// MC68HC705C8P (MCU3)
-// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
+// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
diff --git a/src/mame/drivers/btime.cpp b/src/mame/drivers/btime.cpp
index 4d0db81edce..404b898b6ee 100644
--- a/src/mame/drivers/btime.cpp
+++ b/src/mame/drivers/btime.cpp
@@ -2019,7 +2019,7 @@ void btime_state::init_tisland()
unmapped area that causes the game to fail in several circumstances.On the Cassette
version the RLA (33) is in reality a BIT (24),so I'm guessing that there's something
wrong going on in the encryption scheme.
-
+
There are other locations with similar problems. These ROMs have NOT yet been
confirmed on multiple PCBs, so this could still be a bad dump.
*/
diff --git a/src/mame/drivers/cedar_magnet.cpp b/src/mame/drivers/cedar_magnet.cpp
index 8f28bd4d21d..843d5adcb45 100644
--- a/src/mame/drivers/cedar_magnet.cpp
+++ b/src/mame/drivers/cedar_magnet.cpp
@@ -27,7 +27,7 @@
notes:
- high scores will be defaulted if the data in the table is corrupt, the games give no
option to do this otherwise. A backup copy of the score table is kept, so you also
- have to enter and exit service mode.
+ have to enter and exit service mode.
*/
@@ -852,10 +852,10 @@ ROM_END
/*
Data after 0xd56b0 would not read consistently, however the game only appears to use the first 24 tracks (up to 0x48fff)
- as it loads once on startup, not during gameplay, and all tracks before that gave consistent reads. There is data after this
- point but it is likely leftovers from another game / whatever was on the disk before, so for our purposes this should be fine.
+ as it loads once on startup, not during gameplay, and all tracks before that gave consistent reads. There is data after this
+ point but it is likely leftovers from another game / whatever was on the disk before, so for our purposes this should be fine.
- Some bullets do seem to spawn from locations where there are no enemies, but I think this is just annoying game design.
+ Some bullets do seem to spawn from locations where there are no enemies, but I think this is just annoying game design.
*/
ROM_START( mag_war )
BIOS_ROM
@@ -865,7 +865,7 @@ ROM_START( mag_war )
ROM_END
/*
- Data read 100% consistently with multiple drives
+ Data read 100% consistently with multiple drives
*/
ROM_START( mag_wara )
BIOS_ROM
@@ -875,7 +875,7 @@ ROM_START( mag_wara )
ROM_END
/*
- Data read 100% consistently with multiple drives
+ Data read 100% consistently with multiple drives
*/
ROM_START( mag_burn )
BIOS_ROM
@@ -885,12 +885,12 @@ ROM_START( mag_burn )
ROM_END
/*
- Data read 100% consistently with non-original drive (usually gives worse results)
- later tracks showed differences with original drive on each read (around 0xeef80 onwards, doesn't seem to be game data)
+ Data read 100% consistently with non-original drive (usually gives worse results)
+ later tracks showed differences with original drive on each read (around 0xeef80 onwards, doesn't seem to be game data)
- weirdly there's was a single byte in an earlier track that read consistently, but in a different way for each drive
- 0x2480e: 9d (non-original) vs 1d (original drive)
- 1d seems to be correct as the same data is also elsewhere on the disc
+ weirdly there's was a single byte in an earlier track that read consistently, but in a different way for each drive
+ 0x2480e: 9d (non-original) vs 1d (original drive)
+ 1d seems to be correct as the same data is also elsewhere on the disc
*/
ROM_START( mag_day )
BIOS_ROM
diff --git a/src/mame/drivers/citycon.cpp b/src/mame/drivers/citycon.cpp
index 7e13d7c0bc9..9df45c061c1 100644
--- a/src/mame/drivers/citycon.cpp
+++ b/src/mame/drivers/citycon.cpp
@@ -304,7 +304,7 @@ ROM_START( citycona )
ROM_LOAD( "citycon_82s123n.r4", 0x0100, 0x0020, CRC(29221e13) SHA1(232fd02811f157197c7ce44716dc495ed49a80cc) )
ROM_LOAD( "citycon_82s129.l6", 0x0200, 0x0100, CRC(91a7b6e3) SHA1(6135b264a69978d17aa8636d24eb1eba41d16c89) )
- // Same PROM content on J10 and L6 sockets
+ // Same PROM content on J10 and L6 sockets
//ROM_LOAD( "citycon_82s129.j10", 0x0300, 0x0100, CRC(91a7b6e3) SHA1(6135b264a69978d17aa8636d24eb1eba41d16c89) )
ROM_REGION( 0x0600, "plds", 0 )
diff --git a/src/mame/drivers/coinmstr.cpp b/src/mame/drivers/coinmstr.cpp
index d3ba04f7adf..2fc4f6ec92e 100644
--- a/src/mame/drivers/coinmstr.cpp
+++ b/src/mame/drivers/coinmstr.cpp
@@ -1325,7 +1325,7 @@ MACHINE_CONFIG_START(coinmstr_state::jpcoin)
MCFG_DEVICE_MODIFY("maincpu")
MCFG_DEVICE_PROGRAM_MAP(jpcoin_map)
MCFG_DEVICE_IO_MAP(jpcoin_io_map)
-// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
+// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
MACHINE_CONFIG_END
/*
diff --git a/src/mame/drivers/coinmvga.cpp b/src/mame/drivers/coinmvga.cpp
index 3a6f6cccf5c..c74de251f78 100644
--- a/src/mame/drivers/coinmvga.cpp
+++ b/src/mame/drivers/coinmvga.cpp
@@ -644,7 +644,7 @@ MACHINE_CONFIG_START(coinmvga_state::coinmvga)
MCFG_DEVICE_IO_MAP(coinmvga_io_map)
MCFG_DEVICE_VBLANK_INT_DRIVER("screen", coinmvga_state, vblank_irq) /* wrong, fix me */
-// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
+// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
diff --git a/src/mame/drivers/cvs.cpp b/src/mame/drivers/cvs.cpp
index 2efaa6cb419..3fdc6e71f2a 100644
--- a/src/mame/drivers/cvs.cpp
+++ b/src/mame/drivers/cvs.cpp
@@ -1597,7 +1597,7 @@ void cvs_state::init_superbik()
READ8_MEMBER(cvs_state::hero_prot_r)
{
u8 *ROM = memregion("maincpu")->base() + 0x73f0;
-
+
switch (offset + 0x73f0)
{
case 0x73f0: // pc: 7d, ab9
@@ -1608,7 +1608,7 @@ READ8_MEMBER(cvs_state::hero_prot_r)
case 0x73f2: // pc: 86, needs to match read from 0x73f0
return 0xff & 0x7e; // 0x04 at this address in ROM
-
+
case 0x73f9: // pc: A9f, not sure what this is suppose to do?
return 0x00; // 0x1e at this address in ROM
diff --git a/src/mame/drivers/cwheel.cpp b/src/mame/drivers/cwheel.cpp
index 482ef54e4d3..4351cade431 100644
--- a/src/mame/drivers/cwheel.cpp
+++ b/src/mame/drivers/cwheel.cpp
@@ -2,18 +2,18 @@
// copyright-holders:Ryan Holtz
/******************************************************************************
- Gamebar Catherine Wheel skeleton driver
-
- Notable parts:
- - ST62T28C6: 8-bit microcontroller from STmicro, ST6 series
- - 3x MM5450N LED drivers
- - 8MHz crystal oscillator
- - 60x red LEDs in a circle
- - 5x 7-segment 1-digit LEDs
- - ULN2003A darlington transistor array
-
- TODO:
- - Everything
+ Gamebar Catherine Wheel skeleton driver
+
+ Notable parts:
+ - ST62T28C6: 8-bit microcontroller from STmicro, ST6 series
+ - 3x MM5450N LED drivers
+ - 8MHz crystal oscillator
+ - 60x red LEDs in a circle
+ - 5x 7-segment 1-digit LEDs
+ - ULN2003A darlington transistor array
+
+ TODO:
+ - Everything
*******************************************************************************/
diff --git a/src/mame/drivers/dec0.cpp b/src/mame/drivers/dec0.cpp
index ae2f1ac7686..445892464e9 100644
--- a/src/mame/drivers/dec0.cpp
+++ b/src/mame/drivers/dec0.cpp
@@ -1972,9 +1972,9 @@ MACHINE_CONFIG_END
MACHINE_CONFIG_START(dec0_state::ffantasybl)
dec0(config);
-// H6280(config, m_subcpu, XTAL(21'477'272) / 16);
-// m_subcpu->set_addrmap(AS_PROGRAM, &dec0_state::hippodrm_sub_map);
-// m_subcpu->add_route(ALL_OUTPUTS, "mono", 0); // internal sound unused
+// H6280(config, m_subcpu, XTAL(21'477'272) / 16);
+// m_subcpu->set_addrmap(AS_PROGRAM, &dec0_state::hippodrm_sub_map);
+// m_subcpu->add_route(ALL_OUTPUTS, "mono", 0); // internal sound unused
// MCFG_QUANTUM_TIME(attotime::from_hz(300)) /* Interleave between H6280 & 68000 */
diff --git a/src/mame/drivers/deco156.cpp b/src/mame/drivers/deco156.cpp
index 7a5de2512b5..57c8db238c0 100644
--- a/src/mame/drivers/deco156.cpp
+++ b/src/mame/drivers/deco156.cpp
@@ -10,7 +10,7 @@
How to get the version and region:
Heavy Smash: Exit test mode
- World Cup Volleyball 95: Boot the game holding down player 2 button 1
+ World Cup Volleyball 95: Boot the game holding down player 2 button 1
Emulation by Bryan McPhail, mish@tendril.co.uk
*/
diff --git a/src/mame/drivers/dynax.cpp b/src/mame/drivers/dynax.cpp
index 6b3a3a748b5..f1e40db1b14 100644
--- a/src/mame/drivers/dynax.cpp
+++ b/src/mame/drivers/dynax.cpp
@@ -4203,7 +4203,7 @@ MACHINE_CONFIG_START(dynax_state::cdracula)
MCFG_MACHINE_START_OVERRIDE(dynax_state,dynax)
MCFG_MACHINE_RESET_OVERRIDE(dynax_state,dynax)
-// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); // no battery
+// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); // no battery
RST_POS_BUFFER(config, m_mainirq, 0).int_callback().set_inputline(m_maincpu, 0);
diff --git a/src/mame/drivers/excali64.cpp b/src/mame/drivers/excali64.cpp
index 689667dd6e0..839da6a9652 100644
--- a/src/mame/drivers/excali64.cpp
+++ b/src/mame/drivers/excali64.cpp
@@ -617,11 +617,11 @@ MACHINE_CONFIG_START(excali64_state::excali64)
MCFG_Z80DMA_OUT_IORQ_CB(WRITE8(*this, excali64_state, io_write_byte))
TTL74123(config, m_u12, 0);
- m_u12->set_connection_type(TTL74123_GROUNDED); /* Hook up type (no idea what this means) */
+ m_u12->set_connection_type(TTL74123_GROUNDED); /* Hook up type (no idea what this means) */
m_u12->set_resistor_value(RES_K(100)); /* resistor connected between RCext & 5v */
m_u12->set_capacitor_value(CAP_U(100)); /* capacitor connected between Cext and RCext */
- m_u12->set_a_pin_value(0); /* A pin - grounded */
- m_u12->set_b_pin_value(1); /* B pin - driven by port e4 bit 5 */
+ m_u12->set_a_pin_value(0); /* A pin - grounded */
+ m_u12->set_b_pin_value(1); /* B pin - driven by port e4 bit 5 */
m_u12->set_clear_pin_value(1); /* Clear pin - pulled high */
m_u12->out_cb().set(FUNC(excali64_state::motor_w));
diff --git a/src/mame/drivers/gaelco2.cpp b/src/mame/drivers/gaelco2.cpp
index 9023804abdb..97df3103c2f 100644
--- a/src/mame/drivers/gaelco2.cpp
+++ b/src/mame/drivers/gaelco2.cpp
@@ -715,9 +715,9 @@ MACHINE_CONFIG_START(bang_state::bang)
LS259(config, m_mainlatch);
m_mainlatch->q_out_cb<0>().set(FUNC(gaelco2_state::coin1_counter_w));
m_mainlatch->q_out_cb<1>().set(FUNC(gaelco2_state::coin2_counter_w));
- m_mainlatch->q_out_cb<4>().set("eeprom", FUNC(eeprom_serial_93cxx_device::di_write)); /* EEPROM data */
- m_mainlatch->q_out_cb<5>().set("eeprom", FUNC(eeprom_serial_93cxx_device::clk_write)); /* EEPROM serial clock */
- m_mainlatch->q_out_cb<6>().set("eeprom", FUNC(eeprom_serial_93cxx_device::cs_write)); /* EEPROM chip select */
+ m_mainlatch->q_out_cb<4>().set("eeprom", FUNC(eeprom_serial_93cxx_device::di_write)); /* EEPROM data */
+ m_mainlatch->q_out_cb<5>().set("eeprom", FUNC(eeprom_serial_93cxx_device::clk_write)); /* EEPROM serial clock */
+ m_mainlatch->q_out_cb<6>().set("eeprom", FUNC(eeprom_serial_93cxx_device::cs_write)); /* EEPROM chip select */
/* video hardware */
MCFG_DEVICE_ADD("spriteram", BUFFERED_SPRITERAM16)
@@ -1565,9 +1565,9 @@ MACHINE_CONFIG_START(gaelco2_state::snowboar)
LS259(config, m_mainlatch);
m_mainlatch->q_out_cb<0>().set(FUNC(gaelco2_state::coin1_counter_w));
m_mainlatch->q_out_cb<1>().set(FUNC(gaelco2_state::coin2_counter_w));
- m_mainlatch->q_out_cb<4>().set("eeprom", FUNC(eeprom_serial_93cxx_device::di_write)); /* EEPROM data */
- m_mainlatch->q_out_cb<5>().set("eeprom", FUNC(eeprom_serial_93cxx_device::clk_write)); /* EEPROM serial clock */
- m_mainlatch->q_out_cb<6>().set("eeprom", FUNC(eeprom_serial_93cxx_device::cs_write)); /* EEPROM chip select */
+ m_mainlatch->q_out_cb<4>().set("eeprom", FUNC(eeprom_serial_93cxx_device::di_write)); /* EEPROM data */
+ m_mainlatch->q_out_cb<5>().set("eeprom", FUNC(eeprom_serial_93cxx_device::clk_write)); /* EEPROM serial clock */
+ m_mainlatch->q_out_cb<6>().set("eeprom", FUNC(eeprom_serial_93cxx_device::cs_write)); /* EEPROM chip select */
/* video hardware */
MCFG_DEVICE_ADD("spriteram", BUFFERED_SPRITERAM16)
@@ -1608,9 +1608,9 @@ MACHINE_CONFIG_START(gaelco2_state::maniacsqs)
LS259(config, m_mainlatch);
m_mainlatch->q_out_cb<0>().set(FUNC(gaelco2_state::coin1_counter_w));
m_mainlatch->q_out_cb<1>().set(FUNC(gaelco2_state::coin2_counter_w));
- m_mainlatch->q_out_cb<4>().set("eeprom", FUNC(eeprom_serial_93cxx_device::di_write)); /* EEPROM data */
- m_mainlatch->q_out_cb<5>().set("eeprom", FUNC(eeprom_serial_93cxx_device::clk_write)); /* EEPROM serial clock */
- m_mainlatch->q_out_cb<6>().set("eeprom", FUNC(eeprom_serial_93cxx_device::cs_write)); /* EEPROM chip select */
+ m_mainlatch->q_out_cb<4>().set("eeprom", FUNC(eeprom_serial_93cxx_device::di_write)); /* EEPROM data */
+ m_mainlatch->q_out_cb<5>().set("eeprom", FUNC(eeprom_serial_93cxx_device::clk_write)); /* EEPROM serial clock */
+ m_mainlatch->q_out_cb<6>().set("eeprom", FUNC(eeprom_serial_93cxx_device::cs_write)); /* EEPROM chip select */
/* video hardware */
MCFG_DEVICE_ADD("spriteram", BUFFERED_SPRITERAM16)
@@ -1855,8 +1855,8 @@ MACHINE_CONFIG_START(wrally2_state::wrally2)
LS259(config, m_mainlatch); // IC6
m_mainlatch->q_out_cb<0>().set(FUNC(gaelco2_state::coin1_counter_w));
m_mainlatch->q_out_cb<1>().set(FUNC(gaelco2_state::coin2_counter_w));
- m_mainlatch->q_out_cb<5>().set(FUNC(wrally2_state::wrally2_adc_clk)); /* ADCs clock-in line */
- m_mainlatch->q_out_cb<6>().set(FUNC(wrally2_state::wrally2_adc_cs)); /* ADCs chip select line */
+ m_mainlatch->q_out_cb<5>().set(FUNC(wrally2_state::wrally2_adc_clk)); /* ADCs clock-in line */
+ m_mainlatch->q_out_cb<6>().set(FUNC(wrally2_state::wrally2_adc_cs)); /* ADCs chip select line */
/* video hardware */
MCFG_DEVICE_ADD("spriteram", BUFFERED_SPRITERAM16)
diff --git a/src/mame/drivers/goldstar.cpp b/src/mame/drivers/goldstar.cpp
index 71c3122bf54..942326cf61d 100644
--- a/src/mame/drivers/goldstar.cpp
+++ b/src/mame/drivers/goldstar.cpp
@@ -9324,7 +9324,7 @@ MACHINE_CONFIG_START(unkch_state::megaline)
MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_megaline)
MCFG_PALETTE_ADD("palette", 256)
MCFG_PALETTE_INIT_OWNER(goldstar_state, lucky8)
-// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1);
+// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1);
MCFG_VIDEO_START_OVERRIDE(goldstar_state,goldstar)
diff --git a/src/mame/drivers/goupil.cpp b/src/mame/drivers/goupil.cpp
index 2edb7938366..8b092ed4124 100644
--- a/src/mame/drivers/goupil.cpp
+++ b/src/mame/drivers/goupil.cpp
@@ -551,15 +551,15 @@ void goupil_base_state::base(machine_config &config)
FLOPPY_CONNECTOR(config, m_floppy1, goupil_floppies, "525qd", floppy_image_device::default_floppy_formats);
i8279_device &i8279_kb1(I8279(config, "i8279_kb1", CPU_CLOCK));
- i8279_kb1.out_sl_callback().set(FUNC(goupil_g1_state::scanlines_kbd1_w)); // scan SL lines
- i8279_kb1.in_rl_callback().set(FUNC(goupil_g1_state::kbd1_r)); // kbd RL lines
+ i8279_kb1.out_sl_callback().set(FUNC(goupil_g1_state::scanlines_kbd1_w)); // scan SL lines
+ i8279_kb1.in_rl_callback().set(FUNC(goupil_g1_state::kbd1_r)); // kbd RL lines
i8279_kb1.in_shift_callback().set(FUNC(goupil_g1_state::shift_kb1_r));
i8279_kb1.in_ctrl_callback().set(FUNC(goupil_g1_state::ctrl_kb1_r));
i8279_kb1.out_irq_callback().set(m_via_keyb, FUNC(via6522_device::write_ca1));
i8279_device &i8279_kb2(I8279(config, "i8279_kb2", CPU_CLOCK));
- i8279_kb2.out_sl_callback().set(FUNC(goupil_g1_state::scanlines_kbd2_w)); // scan SL lines
- i8279_kb2.in_rl_callback().set(FUNC(goupil_g1_state::kbd2_r)); // kbd RL lines
+ i8279_kb2.out_sl_callback().set(FUNC(goupil_g1_state::scanlines_kbd2_w)); // scan SL lines
+ i8279_kb2.in_rl_callback().set(FUNC(goupil_g1_state::kbd2_r)); // kbd RL lines
i8279_kb2.in_shift_callback().set_constant(1);
i8279_kb2.in_ctrl_callback().set_constant(1);
}
diff --git a/src/mame/drivers/gstream.cpp b/src/mame/drivers/gstream.cpp
index 5718ce91c6a..7fd776c0629 100644
--- a/src/mame/drivers/gstream.cpp
+++ b/src/mame/drivers/gstream.cpp
@@ -869,7 +869,7 @@ MACHINE_CONFIG_START(gstream_state::x2222)
MCFG_DEVICE_IO_MAP(x2222_io)
MCFG_DEVICE_VBLANK_INT_DRIVER("screen", gstream_state, irq0_line_hold)
-// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1);
+// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1);
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
diff --git a/src/mame/drivers/hng64.cpp b/src/mame/drivers/hng64.cpp
index fd676786f03..10d02f4944d 100644
--- a/src/mame/drivers/hng64.cpp
+++ b/src/mame/drivers/hng64.cpp
@@ -122,9 +122,9 @@ No. PCB Label IC Markings IC Package
23 ROM1 ALTERA EPC1PC8 DIP8 (130817 bytes, archived as ROM1.BIN)
24 SRAM5 TC55257DFL-85L SOP28
- * The IDT 7133 / 7143 lack interrupts and just act as 0x1000 bytes (2x 0x800 16-bit words) of RAM
- IDT 7133 - 32K (2K X 16 Bit) MASTER Dual-Port SRAM
- IDT 7143 - 32K (2K X 16 Bit) SLAVE Dual-Port SRAM
+ * The IDT 7133 / 7143 lack interrupts and just act as 0x1000 bytes (2x 0x800 16-bit words) of RAM
+ IDT 7133 - 32K (2K X 16 Bit) MASTER Dual-Port SRAM
+ IDT 7143 - 32K (2K X 16 Bit) SLAVE Dual-Port SRAM
PCB Layout (Bottom)
@@ -206,9 +206,9 @@ Notes:
2. If the game cart is not plugged in, the hardware shows nothing on screen.
3. The IOCTR I/O MCU runs at 8 MHz.
- *"IDT71321 is function-compatible (but not pin-compatible) with MB8421" ( src\devices\machine\mb8421.cpp )
- It appears unlikely the interrupt function of the DPRAM is unused unless address pins are all inverted as
- there aren't any accesses to 7ff / 7fe outside of the RAM testing, commands are put at byte 0 by the MIPS
+ *"IDT71321 is function-compatible (but not pin-compatible) with MB8421" ( src\devices\machine\mb8421.cpp )
+ It appears unlikely the interrupt function of the DPRAM is unused unless address pins are all inverted as
+ there aren't any accesses to 7ff / 7fe outside of the RAM testing, commands are put at byte 0 by the MIPS
Hyper Neo Geo game cartridges
-----------------------------
@@ -634,13 +634,13 @@ WRITE32_MEMBER(hng64_state::hng64_irqc_w)
I'm not really convinced these are commands in this sense based on code analysis, probably just a non-standard way of controlling the lines
- command table:
- 0x0b = ? mode input polling (sams64, bbust2, sams64_2 & roadedge) (*)
- 0x0c = cut down connections, treats the dualport to be normal RAM
- 0x11 = ? mode input polling (fatfurwa, xrally, buriki) (*)
- 0x20 = asks for MCU machine code (probably not, this is also written in the function after the TLCS870 requests an interrupt on the MIPS)
+ command table:
+ 0x0b = ? mode input polling (sams64, bbust2, sams64_2 & roadedge) (*)
+ 0x0c = cut down connections, treats the dualport to be normal RAM
+ 0x11 = ? mode input polling (fatfurwa, xrally, buriki) (*)
+ 0x20 = asks for MCU machine code (probably not, this is also written in the function after the TLCS870 requests an interrupt on the MIPS)
- (*) 0x11 is followed by 0x0b if the latter is used, JVS-esque indirect/direct mode?
+ (*) 0x11 is followed by 0x0b if the latter is used, JVS-esque indirect/direct mode?
----
*/
@@ -714,19 +714,19 @@ Beast Busters 2 outputs (all at offset == 0x1c):
/*
- MIPS clearly writes commands for the TLCS870 MCU at 00 here
- first command it writes after the startup checks is 0x0a, it should also trigger an EXTINT0 on the TLCS870
- around that time, as the EXTINT0 reads the command.
-
- call at CBB0 in the MCU is to read the command from shared RAM
- value is used in the jump table at CBC5
- command 0x0a points at ccbd
- which starts with a call to copy 0x40 bytes of data from 0x200 in shared RAM to the internal RAM of the MCU
- the MIPS (at least in Fatal Fury) uploads this data to shared RAM prior to the call.
-
- need to work out what triggers the interrupt, as a write to 0 wouldn't as the Dual Port RAM interrupts
- are on addresses 0x7fe and 0x7ff (we're using an address near the system regs, based on code analysis
- it seems correct, see hng64_mips_to_iomcu_irq_w )
+ MIPS clearly writes commands for the TLCS870 MCU at 00 here
+ first command it writes after the startup checks is 0x0a, it should also trigger an EXTINT0 on the TLCS870
+ around that time, as the EXTINT0 reads the command.
+
+ call at CBB0 in the MCU is to read the command from shared RAM
+ value is used in the jump table at CBC5
+ command 0x0a points at ccbd
+ which starts with a call to copy 0x40 bytes of data from 0x200 in shared RAM to the internal RAM of the MCU
+ the MIPS (at least in Fatal Fury) uploads this data to shared RAM prior to the call.
+
+ need to work out what triggers the interrupt, as a write to 0 wouldn't as the Dual Port RAM interrupts
+ are on addresses 0x7fe and 0x7ff (we're using an address near the system regs, based on code analysis
+ it seems correct, see hng64_mips_to_iomcu_irq_w )
*/
WRITE8_MEMBER(hng64_state::hng64_dualport_w)
@@ -1498,202 +1498,202 @@ void hng64_state::set_irq(uint32_t irq_vector)
- is there an irq mask mechanism?
- is irq level cleared too when the irq acks?
- IRQ level read at 0x80008cac
- IO RAM is at bf808000 on the MIPS
-
- -- irq table in Fatal Fury WA - 'empty' entries just do minimum 'interrupt service' with no real function.
- 80000400: 80039F20 irq00 vblank irq
- 80000404: 80039F84 1rq01 jump based on ram content
- 80000408: 8003A08C irq02 'empty'
- 8000040C: 8006FF04 irq03 3d FIFO?
- 80000410: A0000410 irq04 INVALID
- 80000414: A0000414 irq05 INVALID
- 80000418: A0000418 irq06 INVALID
- 8000041C: A000041C irq07 INVALID
- 80000420: A0000420 irq08 INVALID
- 80000424: 8003A00C irq09 'empty' writes to sysreg 1074 instead of loading/storing regs tho
- 80000428: 80039FD0 irq0a 'empty' writes to sysreg 1074 instead of loading/storing regs tho
- 8000042C: 8003A0C0 irq0b 'empty'(network on xrally?) writes to sysreg 1074 instead of loading/storing regs tho
- 80000430: 8003A050 irq0c 'empty' writes to sysreg 1074 instead of loading/storing regs tho
- 80000434: A0000434 irq0d INVALID
- 80000438: A0000438 irq0e INVALID
- 8000043C: A000043C irq0f INVALID
- 80000440: A0000440 irq10 INVALID
- 80000444: 8003A0FC irq11 IO MCU related? write to sysreg 1084 instead of loading/storing regs, accesses dualport RAM
- 80000448: A0000448 irq12 INVALID
- 8000044C: A000044C irq13 INVALID
- 80000450: A0000450 irq14 INVALID
- 80000454: A0000454 irq15 INVALID
- 80000458: A0000458 irq16 INVALID
- 8000045C: 8003A1D4 irq17 'empty' write to sysreg 1084 instead of loading/storing regs tho (like irq 0x11)
- 80000460: A0000460 irq18 INVALID
- (all other entries, invalid)
-
- Xrally (invalid IRQs are more obviously invalid, pointing at 0)
- 80000400: 80016ED0 irq00
- 80000404: 80016F58 irq01
- 80000408: 80017048 irq02
- 8000040C: 80013484 irq03
- 80000410: 00000000 irq04 INVALID
- 80000414: 00000000 irq05 INVALID
- 80000418: 00000000 irq06 INVALID
- 8000041C: 00000000 irq07 INVALID
- 80000420: 00000000 irq08 INVALID
- 80000424: 80016FC8 irq09
- 80000428: 80016F8C irq0a
- 8000042C: 8001707C irq0b
- 80000430: 8001700C irq0c
- 80000434: 00000000 irq0d INVALID
- 80000438: 00000000 irq0e INVALID
- 8000043C: 00000000 irq0f INVALID
- 80000440: 00000000 irq10 INVALID
- 80000444: 800170C0 irq11
- 80000448: 00000000 irq12 INVALID
- 8000044C: 00000000 irq13 INVALID
- 80000450: 00000000 irq14 INVALID
- 80000454: 00000000 irq15 INVALID
- 80000458: 00000000 irq16 INVALID
- 8000045C: 80017198 irq17
- 80000460: 00000000 irq18 INVALID
- (all other entries, invalid)
-
- Buriki
- 80000400: 800C49C4
- 80000404: 800C4748
- 80000408: 800C4828
- 8000040C: 800C4B80
- 80000410: 00000000
- 80000414: 00000000
- 80000418: 00000000
- 8000041C: 00000000
- 80000420: 00000000
- 80000424: 800C47B0
- 80000428: 800C4778
- 8000042C: 800C4858
- 80000430: 800C47F0
- 80000434: 00000000
- 80000438: 00000000
- 8000043C: 00000000
- 80000440: 00000000
- 80000444: 800C4890
- 80000448: 00000000
- 8000044C: 00000000
- 80000450: 00000000
- 80000454: 00000000
- 80000458: 00000000
- 8000045C: 800C498C
- 80000460: 00000000
-
- Beast Busters 2
- 80000400: 8000E9D8
- 80000404: 8000EAFC
- 80000408: 8000EBFC
- 8000040C: 80012D90
- 80000410: FFFFFFFF
- 80000414: FFFFFFFF
- 80000418: FFFFFFFF
- 8000041C: FFFFFFFF
- 80000420: FFFFFFFF
- 80000424: 8000EB74
- 80000428: 8000EB34
- 8000042C: 8000EC34
- 80000430: 8000EBBC
- 80000434: FFFFFFFF
- 80000438: FFFFFFFF
- 8000043C: FFFFFFFF
- 80000440: FFFFFFFF
- 80000444: 8000E508
- 80000448: FFFFFFFF
- 8000044C: FFFFFFFF
- 80000450: FFFFFFFF
- 80000454: FFFFFFFF
- 80000458: FFFFFFFF
- 8000045C: FFFFFFFF irq17 INVALID (not even a stub routine here)
- 80000460: FFFFFFFF
-
- Roads Edge
- 80000400: 80028B04
- 80000404: 80028B88
- 80000408: 80028C68
- 8000040C: 80036FAC
- 80000410: 00000000
- 80000414: 00000000
- 80000418: 00000000
- 8000041C: 00000000
- 80000420: 00000000
- 80000424: 80028BF0
- 80000428: 80028BB8
- 8000042C: 80028C98
- 80000430: 80028C30
- 80000434: 00000000
- 80000438: 00000000
- 8000043C: 00000000
- 80000440: 00000000
- 80000444: 80027340
- 80000448: 00000000
- 8000044C: 00000000
- 80000450: 00000000
- 80000454: 00000000
- 80000458: 00000000
- 8000045C: 00000000 irq17 INVALID (not even a stub routine here)
- 80000460: 00000000
-
- SamSho 64 code is more complex, irqs point to functions that get a jump address from a fixed ram location for each IRQ, most are invalid tho?
- the ingame table is copied from 80005DD0
- bootup ingame
- 80000400: 800C03E0 irq00 80005dd0 800c02e0 800cfcc8
- 80000404: 800C041C irq01 80005dd4 800c0000
- 80000408: 800C0458 irq02 80005dd8 800c0000
- 8000040C: 800C0494 irq03 80005ddc 800c3054 800cfd58
- 80000410: 800C04D0 irq04 80005de0 800c3070 800cfdf8 - interesting because this level is invalid on other games
- 80000414: 800C032C irq05 80000478 00000000
- 80000418: 800C0368 irq06 80000478 00000000
- 8000041C: 800C03A4 irq07 80000478 00000000
- 80000420: 800C050C irq08 80005df0 800c0000
- 80000424: 800C0548 irq09 80005df4 800c0000
- 80000428: 800C0584 irq0a 80005df8 800c0000
- 8000042C: 800C05C0 irq0b 80005dfc 800c0000
- 80000430: 800C05FC irq0c 80005e00 800c0000
- 80000434: 800C02F0 irq0d 80000478 00000000
- 80000438: 800C02F0 irq0e 80000478 00000000
- 8000043C: 800C02F0 irq0f 80000478 00000000
- 80000440: 800C0638 irq10 80005e10 800c0000
- 80000444: 800C0674 irq11 80005e14 800c0000
- 80000448: 800C06B0 irq12 80005e18 800c0000
- 8000044C: 800C06EC irq13 80005e1c 800c0000
- 80000450: 800C0728 irq14 80005e20 800c0000
- 80000454: 800C0764 irq15 80005e24 800c0000
- 80000458: 800C07A0 irq16 80005e28 800c0000
- 8000045C: 800C07DC irq17 80005e2c 800c0000
- 80000460: 00000000 (invalid)
-
- SamSho 64 2 is the same types as SamSho 64
- bootup ingame
- 80000400: 801008DC irq00 802011e0 801007e0 8011f6b4
- 80000404: 80100918 irq01 802011e4 80100500
- 80000408: 80100954 irq02 802011e8 80100500
- 8000040C: 80100990 irq03 802011ec 80101b38 8011f7b8
- 80000410: 801009CC irq04 802011f0 80101b54 80101b54
- 80000414: 80100828 irq05 80000478 0000000b
- 80000418: 80100864 irq06 80000478 0000000b
- 8000041C: 801008A0 irq07 80000478 0000000b
- 80000420: 80100A08 irq08 80201200 80100500
- 80000424: 80100A44 irq09 80201204 80100500
- 80000428: 80100A80 irq0a 80201208 80100500
- 8000042C: 80100ABC irq0b 8020120c 80100500
- 80000430: 80100AF8 irq0c 80201210 80100500
- 80000434: 801007EC irq0d 80000478 0000000b
- 80000438: 801007EC irq0e 80000478 0000000b
- 8000043C: 801007EC irq0f 80000478 0000000b
- 80000440: 80100B34 irq10 80201220 80100500
- 80000444: 80100B70 irq11 80201224 80100500
- 80000448: 80100BAC irq12 80201228 80100500
- 8000044C: 80100BE8 irq13 8020122c 80100500
- 80000450: 80100C24 irq14 80201230 80100500
- 80000454: 80100C60 irq15 80201234 80100500
- 80000458: 80100C9C irq16 80201238 80100500
- 8000045C: 80100CD8 irq17 8020123c 80100500
- 80000460: 00000000 (invalid)
+ IRQ level read at 0x80008cac
+ IO RAM is at bf808000 on the MIPS
+
+ -- irq table in Fatal Fury WA - 'empty' entries just do minimum 'interrupt service' with no real function.
+ 80000400: 80039F20 irq00 vblank irq
+ 80000404: 80039F84 1rq01 jump based on ram content
+ 80000408: 8003A08C irq02 'empty'
+ 8000040C: 8006FF04 irq03 3d FIFO?
+ 80000410: A0000410 irq04 INVALID
+ 80000414: A0000414 irq05 INVALID
+ 80000418: A0000418 irq06 INVALID
+ 8000041C: A000041C irq07 INVALID
+ 80000420: A0000420 irq08 INVALID
+ 80000424: 8003A00C irq09 'empty' writes to sysreg 1074 instead of loading/storing regs tho
+ 80000428: 80039FD0 irq0a 'empty' writes to sysreg 1074 instead of loading/storing regs tho
+ 8000042C: 8003A0C0 irq0b 'empty'(network on xrally?) writes to sysreg 1074 instead of loading/storing regs tho
+ 80000430: 8003A050 irq0c 'empty' writes to sysreg 1074 instead of loading/storing regs tho
+ 80000434: A0000434 irq0d INVALID
+ 80000438: A0000438 irq0e INVALID
+ 8000043C: A000043C irq0f INVALID
+ 80000440: A0000440 irq10 INVALID
+ 80000444: 8003A0FC irq11 IO MCU related? write to sysreg 1084 instead of loading/storing regs, accesses dualport RAM
+ 80000448: A0000448 irq12 INVALID
+ 8000044C: A000044C irq13 INVALID
+ 80000450: A0000450 irq14 INVALID
+ 80000454: A0000454 irq15 INVALID
+ 80000458: A0000458 irq16 INVALID
+ 8000045C: 8003A1D4 irq17 'empty' write to sysreg 1084 instead of loading/storing regs tho (like irq 0x11)
+ 80000460: A0000460 irq18 INVALID
+ (all other entries, invalid)
+
+ Xrally (invalid IRQs are more obviously invalid, pointing at 0)
+ 80000400: 80016ED0 irq00
+ 80000404: 80016F58 irq01
+ 80000408: 80017048 irq02
+ 8000040C: 80013484 irq03
+ 80000410: 00000000 irq04 INVALID
+ 80000414: 00000000 irq05 INVALID
+ 80000418: 00000000 irq06 INVALID
+ 8000041C: 00000000 irq07 INVALID
+ 80000420: 00000000 irq08 INVALID
+ 80000424: 80016FC8 irq09
+ 80000428: 80016F8C irq0a
+ 8000042C: 8001707C irq0b
+ 80000430: 8001700C irq0c
+ 80000434: 00000000 irq0d INVALID
+ 80000438: 00000000 irq0e INVALID
+ 8000043C: 00000000 irq0f INVALID
+ 80000440: 00000000 irq10 INVALID
+ 80000444: 800170C0 irq11
+ 80000448: 00000000 irq12 INVALID
+ 8000044C: 00000000 irq13 INVALID
+ 80000450: 00000000 irq14 INVALID
+ 80000454: 00000000 irq15 INVALID
+ 80000458: 00000000 irq16 INVALID
+ 8000045C: 80017198 irq17
+ 80000460: 00000000 irq18 INVALID
+ (all other entries, invalid)
+
+ Buriki
+ 80000400: 800C49C4
+ 80000404: 800C4748
+ 80000408: 800C4828
+ 8000040C: 800C4B80
+ 80000410: 00000000
+ 80000414: 00000000
+ 80000418: 00000000
+ 8000041C: 00000000
+ 80000420: 00000000
+ 80000424: 800C47B0
+ 80000428: 800C4778
+ 8000042C: 800C4858
+ 80000430: 800C47F0
+ 80000434: 00000000
+ 80000438: 00000000
+ 8000043C: 00000000
+ 80000440: 00000000
+ 80000444: 800C4890
+ 80000448: 00000000
+ 8000044C: 00000000
+ 80000450: 00000000
+ 80000454: 00000000
+ 80000458: 00000000
+ 8000045C: 800C498C
+ 80000460: 00000000
+
+ Beast Busters 2
+ 80000400: 8000E9D8
+ 80000404: 8000EAFC
+ 80000408: 8000EBFC
+ 8000040C: 80012D90
+ 80000410: FFFFFFFF
+ 80000414: FFFFFFFF
+ 80000418: FFFFFFFF
+ 8000041C: FFFFFFFF
+ 80000420: FFFFFFFF
+ 80000424: 8000EB74
+ 80000428: 8000EB34
+ 8000042C: 8000EC34
+ 80000430: 8000EBBC
+ 80000434: FFFFFFFF
+ 80000438: FFFFFFFF
+ 8000043C: FFFFFFFF
+ 80000440: FFFFFFFF
+ 80000444: 8000E508
+ 80000448: FFFFFFFF
+ 8000044C: FFFFFFFF
+ 80000450: FFFFFFFF
+ 80000454: FFFFFFFF
+ 80000458: FFFFFFFF
+ 8000045C: FFFFFFFF irq17 INVALID (not even a stub routine here)
+ 80000460: FFFFFFFF
+
+ Roads Edge
+ 80000400: 80028B04
+ 80000404: 80028B88
+ 80000408: 80028C68
+ 8000040C: 80036FAC
+ 80000410: 00000000
+ 80000414: 00000000
+ 80000418: 00000000
+ 8000041C: 00000000
+ 80000420: 00000000
+ 80000424: 80028BF0
+ 80000428: 80028BB8
+ 8000042C: 80028C98
+ 80000430: 80028C30
+ 80000434: 00000000
+ 80000438: 00000000
+ 8000043C: 00000000
+ 80000440: 00000000
+ 80000444: 80027340
+ 80000448: 00000000
+ 8000044C: 00000000
+ 80000450: 00000000
+ 80000454: 00000000
+ 80000458: 00000000
+ 8000045C: 00000000 irq17 INVALID (not even a stub routine here)
+ 80000460: 00000000
+
+ SamSho 64 code is more complex, irqs point to functions that get a jump address from a fixed ram location for each IRQ, most are invalid tho?
+ the ingame table is copied from 80005DD0
+ bootup ingame
+ 80000400: 800C03E0 irq00 80005dd0 800c02e0 800cfcc8
+ 80000404: 800C041C irq01 80005dd4 800c0000
+ 80000408: 800C0458 irq02 80005dd8 800c0000
+ 8000040C: 800C0494 irq03 80005ddc 800c3054 800cfd58
+ 80000410: 800C04D0 irq04 80005de0 800c3070 800cfdf8 - interesting because this level is invalid on other games
+ 80000414: 800C032C irq05 80000478 00000000
+ 80000418: 800C0368 irq06 80000478 00000000
+ 8000041C: 800C03A4 irq07 80000478 00000000
+ 80000420: 800C050C irq08 80005df0 800c0000
+ 80000424: 800C0548 irq09 80005df4 800c0000
+ 80000428: 800C0584 irq0a 80005df8 800c0000
+ 8000042C: 800C05C0 irq0b 80005dfc 800c0000
+ 80000430: 800C05FC irq0c 80005e00 800c0000
+ 80000434: 800C02F0 irq0d 80000478 00000000
+ 80000438: 800C02F0 irq0e 80000478 00000000
+ 8000043C: 800C02F0 irq0f 80000478 00000000
+ 80000440: 800C0638 irq10 80005e10 800c0000
+ 80000444: 800C0674 irq11 80005e14 800c0000
+ 80000448: 800C06B0 irq12 80005e18 800c0000
+ 8000044C: 800C06EC irq13 80005e1c 800c0000
+ 80000450: 800C0728 irq14 80005e20 800c0000
+ 80000454: 800C0764 irq15 80005e24 800c0000
+ 80000458: 800C07A0 irq16 80005e28 800c0000
+ 8000045C: 800C07DC irq17 80005e2c 800c0000
+ 80000460: 00000000 (invalid)
+
+ SamSho 64 2 is the same types as SamSho 64
+ bootup ingame
+ 80000400: 801008DC irq00 802011e0 801007e0 8011f6b4
+ 80000404: 80100918 irq01 802011e4 80100500
+ 80000408: 80100954 irq02 802011e8 80100500
+ 8000040C: 80100990 irq03 802011ec 80101b38 8011f7b8
+ 80000410: 801009CC irq04 802011f0 80101b54 80101b54
+ 80000414: 80100828 irq05 80000478 0000000b
+ 80000418: 80100864 irq06 80000478 0000000b
+ 8000041C: 801008A0 irq07 80000478 0000000b
+ 80000420: 80100A08 irq08 80201200 80100500
+ 80000424: 80100A44 irq09 80201204 80100500
+ 80000428: 80100A80 irq0a 80201208 80100500
+ 8000042C: 80100ABC irq0b 8020120c 80100500
+ 80000430: 80100AF8 irq0c 80201210 80100500
+ 80000434: 801007EC irq0d 80000478 0000000b
+ 80000438: 801007EC irq0e 80000478 0000000b
+ 8000043C: 801007EC irq0f 80000478 0000000b
+ 80000440: 80100B34 irq10 80201220 80100500
+ 80000444: 80100B70 irq11 80201224 80100500
+ 80000448: 80100BAC irq12 80201228 80100500
+ 8000044C: 80100BE8 irq13 8020122c 80100500
+ 80000450: 80100C24 irq14 80201230 80100500
+ 80000454: 80100C60 irq15 80201234 80100500
+ 80000458: 80100C9C irq16 80201238 80100500
+ 8000045C: 80100CD8 irq17 8020123c 80100500
+ 80000460: 00000000 (invalid)
Register 111c is connected to the interrupts and written in each one (IRQ ack / latch clear?)
@@ -1701,26 +1701,26 @@ void hng64_state::set_irq(uint32_t irq_vector)
HNG64 writing to SYSTEM Registers 0x0000111c == 0x00000002. (PC=80009b5c) 0x01 <empty> (not empty of ffwa)
HNG64 writing to SYSTEM Registers 0x0000111c == 0x00000004. (PC=80009b64) 0x02 <empty>
HNG64 writing to SYSTEM Registers 0x0000111c == 0x00000008. (PC=80009b6c) 0x03 3d fifo processed irq
- 00010
- 00020
- 00040
- 00080
- 00100
+ 00010
+ 00020
+ 00040
+ 00080
+ 00100
HNG64 writing to SYSTEM Registers 0x0000111c == 0x00000200. (PC=80009b70) 0x09
HNG64 writing to SYSTEM Registers 0x0000111c == 0x00000400. (PC=80009b78) 0x0a
HNG64 writing to SYSTEM Registers 0x0000111c == 0x00000800. (PC=80009b88) 0x0b network irq, needed by xrally and roadedge
- 01000
- 02000
- 04000
- 08000
- 10000
+ 01000
+ 02000
+ 04000
+ 08000
+ 10000
HNG64 writing to SYSTEM Registers 0x0000111c == 0x00020000. (PC=80009b80) 0x11 MCU related irq?
- 40000
- 80000
- 100000
- 200000
- 400000
- 800000 0x17 MCU related irq?
+ 40000
+ 80000
+ 100000
+ 200000
+ 400000
+ 800000 0x17 MCU related irq?
samsho64 / samsho64_2 does this during running:
HNG64 writing to SYSTEM Registers 0x0000111c == 0x00000000. (PC=800008fc) just checking?
@@ -1922,13 +1922,13 @@ WRITE8_MEMBER(hng64_state::hng64_shoot_lamps7_w)
}
/*
- Beast Busters 2 outputs (all written to offset 0x1c in dualport ram):
- 0x00000001 start #1
- 0x00000002 start #2
- 0x00000004 start #3
- 0x00001000 gun #1
- 0x00002000 gun #2
- 0x00004000 gun #3
+ Beast Busters 2 outputs (all written to offset 0x1c in dualport ram):
+ 0x00000001 start #1
+ 0x00000002 start #2
+ 0x00000004 start #3
+ 0x00001000 gun #1
+ 0x00002000 gun #2
+ 0x00004000 gun #3
*/
WRITE8_MEMBER(hng64_state::hng64_shoot_lamps6_w)
@@ -2227,13 +2227,13 @@ MACHINE_CONFIG_END
ROM_LOAD_HNG64_BIOS( 2, "bios_export.bin", 0x00000, 0x080000, CRC(bbf07ec6) SHA1(5656aa077f6a6d43953f15b5123eea102a9d5313) ) \
ROM_SYSTEM_BIOS( 3, "korea", "Korea" ) \
ROM_LOAD_HNG64_BIOS( 3, "bios_korea.bin", 0x00000, 0x080000, CRC(ac953e2e) SHA1(f502188ef252b7c9d04934c4b525730a116de48b) ) \
- /* KL5C80 BIOS (network CPU) */ \
+ /* KL5C80 BIOS (network CPU) */ \
ROM_REGION( 0x0100000, "user2", 0 ) \
ROM_LOAD ( "from1.bin", 0x000000, 0x080000, CRC(6b933005) SHA1(e992747f46c48b66e5509fe0adf19c91250b00c7) ) \
/* FPGA (unknown) */ \
ROM_REGION( 0x0100000, "fpga", 0 ) /* FPGA data */ \
ROM_LOAD ( "rom1.bin", 0x000000, 0x01ff32, CRC(4a6832dc) SHA1(ae504f7733c2f40450157cd1d3b85bc83fac8569) ) \
- /* TMP87PH40AN (I/O MCU) */ \
+ /* TMP87PH40AN (I/O MCU) */ \
ROM_REGION( 0x10000, "iomcu", 0 ) /* "64Bit I/O Controller Ver 1.0 1997.06.29(C)SNK" internal ID string */ \
ROM_LOAD ( "tmp87ph40an.bin", 0x8000, 0x8000, CRC(b70df21f) SHA1(5b742e8a0bbf4c0ae4f4398d34c7058fb24acc92) )
diff --git a/src/mame/drivers/igs_m027.cpp b/src/mame/drivers/igs_m027.cpp
index 3d296c35720..326c29e80f4 100644
--- a/src/mame/drivers/igs_m027.cpp
+++ b/src/mame/drivers/igs_m027.cpp
@@ -331,7 +331,7 @@ MACHINE_CONFIG_START(igs_m027_state::igs_majhong)
MCFG_DEVICE_ADD("maincpu", ARM7, 20000000)
MCFG_DEVICE_PROGRAM_MAP(igs_majhong_map)
-// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
+// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
MCFG_SCREEN_ADD("screen", RASTER)
@@ -364,7 +364,7 @@ MACHINE_CONFIG_START(igs_m027_state::amazonia)
MCFG_DEVICE_ADD("maincpu", ARM7, 20000000)
MCFG_DEVICE_PROGRAM_MAP(igs_majhong_map)
-// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
+// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
diff --git a/src/mame/drivers/jokrwild.cpp b/src/mame/drivers/jokrwild.cpp
index 2c5b1f53cf5..c2ae2c7f257 100644
--- a/src/mame/drivers/jokrwild.cpp
+++ b/src/mame/drivers/jokrwild.cpp
@@ -415,7 +415,7 @@ MACHINE_CONFIG_START(jokrwild_state::jokrwild)
MCFG_DEVICE_ADD("maincpu", M6809, MASTER_CLOCK/2) /* guess */
MCFG_DEVICE_PROGRAM_MAP(jokrwild_map)
-// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
+// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
pia6821_device &pia0(PIA6821(config, "pia0", 0));
pia0.readpa_handler().set_ioport("IN0");
diff --git a/src/mame/drivers/m10.cpp b/src/mame/drivers/m10.cpp
index a1032ab00d1..c10c017db51 100644
--- a/src/mame/drivers/m10.cpp
+++ b/src/mame/drivers/m10.cpp
@@ -838,22 +838,22 @@ MACHINE_CONFIG_START(m10_state::m10)
/* 74LS123 */
TTL74123(config, m_ic8j1, 0); /* completely illegible */
- m_ic8j1->set_connection_type(TTL74123_NOT_GROUNDED_DIODE); /* the hook up type */
- m_ic8j1->set_resistor_value(RES_K(1)); /* resistor connected to RCext */
- m_ic8j1->set_capacitor_value(CAP_U(1)); /* capacitor connected to Cext and RCext */
- m_ic8j1->set_a_pin_value(1); /* A pin - driven by the CRTC */
- m_ic8j1->set_b_pin_value(1); /* B pin - pulled high */
- m_ic8j1->set_clear_pin_value(1); /* Clear pin - pulled high */
+ m_ic8j1->set_connection_type(TTL74123_NOT_GROUNDED_DIODE); /* the hook up type */
+ m_ic8j1->set_resistor_value(RES_K(1)); /* resistor connected to RCext */
+ m_ic8j1->set_capacitor_value(CAP_U(1)); /* capacitor connected to Cext and RCext */
+ m_ic8j1->set_a_pin_value(1); /* A pin - driven by the CRTC */
+ m_ic8j1->set_b_pin_value(1); /* B pin - pulled high */
+ m_ic8j1->set_clear_pin_value(1); /* Clear pin - pulled high */
m_ic8j1->out_cb().set(FUNC(m10_state::ic8j1_output_changed));
TTL74123(config, m_ic8j2, 0);
- m_ic8j2->set_connection_type(TTL74123_NOT_GROUNDED_DIODE); /* the hook up type */
+ m_ic8j2->set_connection_type(TTL74123_NOT_GROUNDED_DIODE); /* the hook up type */
/* 10k + 20k variable resistor */
- m_ic8j2->set_resistor_value(RES_K(22)); /* resistor connected to RCext */
- m_ic8j2->set_capacitor_value(CAP_U(2.2)); /* capacitor connected to Cext and RCext */
- m_ic8j2->set_a_pin_value(1); /* A pin - driven by the CRTC */
- m_ic8j2->set_b_pin_value(1); /* B pin - pulled high */
- m_ic8j2->set_clear_pin_value(1); /* Clear pin - pulled high */
+ m_ic8j2->set_resistor_value(RES_K(22)); /* resistor connected to RCext */
+ m_ic8j2->set_capacitor_value(CAP_U(2.2)); /* capacitor connected to Cext and RCext */
+ m_ic8j2->set_a_pin_value(1); /* A pin - driven by the CRTC */
+ m_ic8j2->set_b_pin_value(1); /* B pin - pulled high */
+ m_ic8j2->set_clear_pin_value(1); /* Clear pin - pulled high */
m_ic8j2->out_cb().set(FUNC(m10_state::ic8j2_output_changed));
/* sound hardware */
diff --git a/src/mame/drivers/mainevt.cpp b/src/mame/drivers/mainevt.cpp
index 9f6ec0439d7..96d1ac86cc1 100644
--- a/src/mame/drivers/mainevt.cpp
+++ b/src/mame/drivers/mainevt.cpp
@@ -11,9 +11,9 @@ Notes:
- Schematics show a palette/work RAM bank selector, but this doesn't seem
to be used?
-- Devastators: has player-trench collision detection issues, player isn't
+- Devastators: has player-trench collision detection issues, player isn't
supposed to go through them.
-
+
- Devastators: shadows don't work. Bit 7 of the sprite attribute is always 0,
could there be a global enable flag in the 051960?
This is particularly evident in level 2 where plane shadows cover other sprites.
@@ -23,8 +23,8 @@ Notes:
- Devastators: sprite zooming for the planes in level 2 is particularly bad.
-- Devastators: title screen white backdrop is always supposed to flicker,
- it currently do that only from second/fourth attract cycles (supposed to always
+- Devastators: title screen white backdrop is always supposed to flicker,
+ it currently do that only from second/fourth attract cycles (supposed to always
flicker from PCB video);
***************************************************************************/
@@ -432,10 +432,10 @@ MACHINE_CONFIG_START(mainevt_state::mainevt)
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
-// MCFG_SCREEN_REFRESH_RATE(60)
-// MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
-// MCFG_SCREEN_SIZE(64*8, 32*8)
-// MCFG_SCREEN_VISIBLE_AREA(14*8, (64-14)*8-1, 2*8, 30*8-1 )
+// MCFG_SCREEN_REFRESH_RATE(60)
+// MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
+// MCFG_SCREEN_SIZE(64*8, 32*8)
+// MCFG_SCREEN_VISIBLE_AREA(14*8, (64-14)*8-1, 2*8, 30*8-1 )
MCFG_SCREEN_RAW_PARAMS(XTAL(24'000'000)/3, 528, 14*8, (64-14)*8, 256, 16, 240) // assume 59.17 like Devastators
MCFG_SCREEN_UPDATE_DRIVER(mainevt_state, screen_update_mainevt)
MCFG_SCREEN_PALETTE("palette")
@@ -481,10 +481,10 @@ MACHINE_CONFIG_START(mainevt_state::devstors)
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
-// MCFG_SCREEN_REFRESH_RATE(60)
-// MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
-// MCFG_SCREEN_SIZE(64*8, 32*8)
-// MCFG_SCREEN_VISIBLE_AREA(13*8, (64-13)*8-1, 2*8, 30*8-1 )
+// MCFG_SCREEN_REFRESH_RATE(60)
+// MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
+// MCFG_SCREEN_SIZE(64*8, 32*8)
+// MCFG_SCREEN_VISIBLE_AREA(13*8, (64-13)*8-1, 2*8, 30*8-1 )
MCFG_SCREEN_RAW_PARAMS(XTAL(24'000'000)/3, 528, 13*8, (64-13)*8, 256, 16, 240) // measured 59.17
MCFG_SCREEN_UPDATE_DRIVER(mainevt_state, screen_update_dv)
MCFG_SCREEN_PALETTE("palette")
diff --git a/src/mame/drivers/mario.cpp b/src/mame/drivers/mario.cpp
index 036e3d48d49..1ffb77dd821 100644
--- a/src/mame/drivers/mario.cpp
+++ b/src/mame/drivers/mario.cpp
@@ -349,14 +349,14 @@ MACHINE_CONFIG_START(mario_state::mario_base)
MCFG_Z80DMA_OUT_MREQ_CB(WRITE8(*this, mario_state, memory_write_byte))
ls259_device &mainlatch(LS259(config, "mainlatch")); // 2L (7E80H)
- mainlatch.q_out_cb<0>().set(FUNC(mario_state::gfx_bank_w)); // ~T ROM
- mainlatch.q_out_cb<1>().set_nop(); // 2 PSL
- mainlatch.q_out_cb<2>().set(FUNC(mario_state::flip_w)); // FLIP
- mainlatch.q_out_cb<3>().set(FUNC(mario_state::palette_bank_w)); // CREF 0
- mainlatch.q_out_cb<4>().set(FUNC(mario_state::nmi_mask_w)); // NMI EI
- mainlatch.q_out_cb<5>().set("z80dma", FUNC(z80dma_device::rdy_w)); // DMA SET
- mainlatch.q_out_cb<6>().set(FUNC(mario_state::coin_counter_1_w)); // COUNTER 2 (misnumbered on schematic)
- mainlatch.q_out_cb<7>().set(FUNC(mario_state::coin_counter_2_w)); // COUNTER 1 (misnumbered on schematic)
+ mainlatch.q_out_cb<0>().set(FUNC(mario_state::gfx_bank_w)); // ~T ROM
+ mainlatch.q_out_cb<1>().set_nop(); // 2 PSL
+ mainlatch.q_out_cb<2>().set(FUNC(mario_state::flip_w)); // FLIP
+ mainlatch.q_out_cb<3>().set(FUNC(mario_state::palette_bank_w)); // CREF 0
+ mainlatch.q_out_cb<4>().set(FUNC(mario_state::nmi_mask_w)); // NMI EI
+ mainlatch.q_out_cb<5>().set("z80dma", FUNC(z80dma_device::rdy_w)); // DMA SET
+ mainlatch.q_out_cb<6>().set(FUNC(mario_state::coin_counter_1_w)); // COUNTER 2 (misnumbered on schematic)
+ mainlatch.q_out_cb<7>().set(FUNC(mario_state::coin_counter_2_w)); // COUNTER 1 (misnumbered on schematic)
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
diff --git a/src/mame/drivers/mastboyo.cpp b/src/mame/drivers/mastboyo.cpp
index 4b08e93e1ab..c8c71205d4e 100644
--- a/src/mame/drivers/mastboyo.cpp
+++ b/src/mame/drivers/mastboyo.cpp
@@ -168,7 +168,7 @@ static INPUT_PORTS_START( mastboyo )
PORT_DIPNAME( 0x80, 0x80, "Test Inicial" )
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
-// PORT_SERVICE( 0x80, IP_ACTIVE_LOW ) <--- Why to mask and hide the test mode???
+// PORT_SERVICE( 0x80, IP_ACTIVE_LOW ) <--- Why to mask and hide the test mode???
INPUT_PORTS_END
diff --git a/src/mame/drivers/maygay1b.cpp b/src/mame/drivers/maygay1b.cpp
index b6799c9e29b..07d86582e3b 100644
--- a/src/mame/drivers/maygay1b.cpp
+++ b/src/mame/drivers/maygay1b.cpp
@@ -784,13 +784,13 @@ MACHINE_CONFIG_START(maygay1b_state::maygay_m1)
pia.writepb_handler().set(FUNC(maygay1b_state::m1_pia_portb_w));
hc259_device &mainlatch(HC259(config, "mainlatch")); // U29
- mainlatch.q_out_cb<0>().set(FUNC(maygay1b_state::ramen_w)); // m_RAMEN
- mainlatch.q_out_cb<1>().set(FUNC(maygay1b_state::alarmen_w)); // AlarmEn
- mainlatch.q_out_cb<2>().set(FUNC(maygay1b_state::nmien_w)); // Enable
- mainlatch.q_out_cb<3>().set(FUNC(maygay1b_state::rts_w)); // RTS
- mainlatch.q_out_cb<4>().set(FUNC(maygay1b_state::psurelay_w)); // PSURelay
- mainlatch.q_out_cb<5>().set(FUNC(maygay1b_state::wdog_w)); // WDog
- mainlatch.q_out_cb<6>().set(FUNC(maygay1b_state::srsel_w)); // Srsel
+ mainlatch.q_out_cb<0>().set(FUNC(maygay1b_state::ramen_w)); // m_RAMEN
+ mainlatch.q_out_cb<1>().set(FUNC(maygay1b_state::alarmen_w)); // AlarmEn
+ mainlatch.q_out_cb<2>().set(FUNC(maygay1b_state::nmien_w)); // Enable
+ mainlatch.q_out_cb<3>().set(FUNC(maygay1b_state::rts_w)); // RTS
+ mainlatch.q_out_cb<4>().set(FUNC(maygay1b_state::psurelay_w)); // PSURelay
+ mainlatch.q_out_cb<5>().set(FUNC(maygay1b_state::wdog_w)); // WDog
+ mainlatch.q_out_cb<6>().set(FUNC(maygay1b_state::srsel_w)); // Srsel
MCFG_S16LF01_ADD("vfd",0)
SPEAKER(config, "lspeaker").front_left();
diff --git a/src/mame/drivers/micropin.cpp b/src/mame/drivers/micropin.cpp
index 14201e08ff0..c0c01f897e5 100644
--- a/src/mame/drivers/micropin.cpp
+++ b/src/mame/drivers/micropin.cpp
@@ -342,7 +342,7 @@ MACHINE_CONFIG_START(micropin_state::pentacup2)
MCFG_DEVICE_IO_MAP(pentacup2_io)
//MCFG_DEVICE_PERIODIC_INT_DRIVER(micropin_state, irq2_line_hold, 50)
-// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
+// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
/* Sound */
genpin_audio(config);
diff --git a/src/mame/drivers/mpu12wbk.cpp b/src/mame/drivers/mpu12wbk.cpp
index d9b90c1c128..563e0662d3e 100644
--- a/src/mame/drivers/mpu12wbk.cpp
+++ b/src/mame/drivers/mpu12wbk.cpp
@@ -496,7 +496,7 @@ MACHINE_CONFIG_START(mpu12wbk_state::mpu12wbk)
MCFG_DEVICE_ADD("maincpu", MC6809, MASTER_CLOCK)
MCFG_DEVICE_PROGRAM_MAP(mpu12wbk_map)
-// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
+// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
diff --git a/src/mame/drivers/naomi.cpp b/src/mame/drivers/naomi.cpp
index f5169bf1774..578fc400624 100644
--- a/src/mame/drivers/naomi.cpp
+++ b/src/mame/drivers/naomi.cpp
@@ -9853,17 +9853,17 @@ ROM_START( clubkcyc )
ROM_LOAD( "317-0358-com.pic", 0x000000, 0x004000, CRC(dd33e50f) SHA1(c51712754022fc3adc350fa0714bf60fd0d163cf) )
/*
- Cycraft Motion PC:
- Mainboard Advantech PCM-5820
- CAN Module PCM-3680
- IO Module PCM-3724
- 128mb PC133 Ram
-
- SanDisk CF With Linux:
- Simuline CYCRAFT
- SMCP: V1.65
- GAME: Club-Kart
- (c) 2003 Simuline Inc.
+ Cycraft Motion PC:
+ Mainboard Advantech PCM-5820
+ CAN Module PCM-3680
+ IO Module PCM-3724
+ 128mb PC133 Ram
+
+ SanDisk CF With Linux:
+ Simuline CYCRAFT
+ SMCP: V1.65
+ GAME: Club-Kart
+ (c) 2003 Simuline Inc.
*/
DISK_REGION( "cycraft" )
DISK_IMAGE( "cycraft_clubkart_smcp_v1.65", 0, SHA1(c77df6eaf425e4e86f871914aa024debc1940713) )
diff --git a/src/mame/drivers/nightmare.cpp b/src/mame/drivers/nightmare.cpp
index e748132b6f2..9310db538fd 100644
--- a/src/mame/drivers/nightmare.cpp
+++ b/src/mame/drivers/nightmare.cpp
@@ -51,7 +51,7 @@
2x CDP1852 (I/O).
1x Xtal @ 2.9500 MHz.
-
+
Sound ROM is missing.
Overall the board is pretty much dead, no interruptions observed, no video sync output.
@@ -114,7 +114,7 @@
PINOUTS
-------
-
+
Main Board:
@@ -135,7 +135,7 @@
J3: Pin marked 4 ---> IC8 CDP1852CE, pin 16. J4: Pin marked GND -> GND.
J3: Pin marked 5 ---> IC8 CDP1852CE, pin 18.
J3: Pin marked 6 ---> IC8 CDP1852CE, pin 20.
- J3: Pin marked 7 ---> IC8 CDP1852CE, pin 22. J5: Pin marked GND --> GND.
+ J3: Pin marked 7 ---> IC8 CDP1852CE, pin 22. J5: Pin marked GND --> GND.
J3: Pin marked D ---> IC7 CDP1802ACE, pin 21. J5: Pins marked 1-8 -> CPU data bus.
J3: Pin marked GND -> GND . J5: Pin marked 9 ----> Mainboard IC5 CD4001, pin 11.
J3: Pin marked T ---> IC7 CDP1802ACE, pin 22.
@@ -169,7 +169,7 @@
Since STWL is connected to GND, the control word is set to 8-bit lenght.
-
+
Sound Board:
(also used on some Pinball machines)
@@ -409,8 +409,8 @@ static INPUT_PORTS_START( nightmare )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN2 )
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
- PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_COCKTAIL
@@ -437,10 +437,10 @@ void nightmare_state::nightmare(machine_config &config)
CDP1802(config, m_soundcpu, SOUND_CLOCK);
m_soundcpu->set_addrmap(AS_PROGRAM, &nightmare_state::nightmare_sound_map);
m_soundcpu->set_addrmap(AS_IO, &nightmare_state::nightmare_sound_io_map);
- m_soundcpu->set_disable();
+ m_soundcpu->set_disable();
/* i/o hardware */
- cdp1852_device &ic8(CDP1852(config, "ic8"));
+ cdp1852_device &ic8(CDP1852(config, "ic8"));
ic8.mode_cb().set_constant(0);
ic8.di_cb().set_ioport("IN0");
@@ -448,7 +448,7 @@ void nightmare_state::nightmare(machine_config &config)
ic9.mode_cb().set_constant(0);
ic9.di_cb().set_ioport("IN1");
- cdp1852_device &ic10(CDP1852(config, "ic10"));
+ cdp1852_device &ic10(CDP1852(config, "ic10"));
ic10.mode_cb().set_constant(1);
ic10.do_cb().set(FUNC(nightmare_state::ic10_w));
@@ -475,10 +475,10 @@ ROM_START( nightmare )
ROM_LOAD( "nm1-ib1.bin", 0x2000, 0x2000, CRC(c10695f7) SHA1(929467fe7529782e8181d3caae3a67bb0a8d8753) )
ROM_LOAD( "nm1-ic1.bin", 0x4000, 0x2000, CRC(a3117246) SHA1(ca9601401f7ab34200c969e41ffae50bee0aca4d) )
- ROM_REGION( 0x10000, "cdp1802_sound", 0 )
+ ROM_REGION( 0x10000, "cdp1802_sound", 0 )
ROM_LOAD( "sound.bin", 0x0000, 0x4000, NO_DUMP )
- ROM_REGION( 0x40, "eeprom", 0 )
+ ROM_REGION( 0x40, "eeprom", 0 )
ROM_LOAD( "eeprom", 0x00, 0x40, CRC(7824e1f8) SHA1(2ccac62b4e8abcb2b3d66fa4025947fea184664e) )
ROM_END
diff --git a/src/mame/drivers/nyny.cpp b/src/mame/drivers/nyny.cpp
index 6dd450ac0d4..beac5ad47bf 100644
--- a/src/mame/drivers/nyny.cpp
+++ b/src/mame/drivers/nyny.cpp
@@ -626,12 +626,12 @@ MACHINE_CONFIG_START(nyny_state::nyny)
/* 74LS123 */
TTL74123(config, m_ic48_1, 0);
- m_ic48_1->set_connection_type(TTL74123_GROUNDED); /* the hook up type */
- m_ic48_1->set_resistor_value(RES_K(22)); /* resistor connected to RCext */
- m_ic48_1->set_capacitor_value(CAP_U(0.01)); /* capacitor connected to Cext and RCext */
- m_ic48_1->set_a_pin_value(1); /* A pin - driven by the CRTC */
- m_ic48_1->set_b_pin_value(1); /* B pin - pulled high */
- m_ic48_1->set_clear_pin_value(1); /* Clear pin - pulled high */
+ m_ic48_1->set_connection_type(TTL74123_GROUNDED); /* the hook up type */
+ m_ic48_1->set_resistor_value(RES_K(22)); /* resistor connected to RCext */
+ m_ic48_1->set_capacitor_value(CAP_U(0.01)); /* capacitor connected to Cext and RCext */
+ m_ic48_1->set_a_pin_value(1); /* A pin - driven by the CRTC */
+ m_ic48_1->set_b_pin_value(1); /* B pin - pulled high */
+ m_ic48_1->set_clear_pin_value(1); /* Clear pin - pulled high */
m_ic48_1->out_cb().set(FUNC(nyny_state::ic48_1_74123_output_changed));
PIA6821(config, m_pia1, 0);
diff --git a/src/mame/drivers/opwolf.cpp b/src/mame/drivers/opwolf.cpp
index e2d085af9f9..1cfcd4607b0 100644
--- a/src/mame/drivers/opwolf.cpp
+++ b/src/mame/drivers/opwolf.cpp
@@ -334,7 +334,7 @@ READ8_MEMBER(opwolf_state::z80_input2_r)
WRITE8_MEMBER(opwolf_state::counters_w)
{
//logerror("counters_w data=%2x\n",data );
-
+
machine().bookkeeping().coin_lockout_w(1, data & 0x80);
machine().bookkeeping().coin_lockout_w(0, data & 0x40);
machine().bookkeeping().coin_counter_w(1, data & 0x20);
@@ -358,11 +358,11 @@ WRITE8_MEMBER(opwolf_state::sound_bankswitch_w)
void opwolf_state::opwolf_map(address_map &map)
{
map(0x000000, 0x03ffff).rom();
-// map(0x0f0000, 0x0f07ff).mirror(0xf000).r(FUNC(opwolf_state::opwolf_cchip_data_r));
-// map(0x0f0802, 0x0f0803).mirror(0xf000).r(FUNC(opwolf_state::opwolf_cchip_status_r));
-// map(0x0ff000, 0x0ff7ff).w(FUNC(opwolf_state::opwolf_cchip_data_w));
-// map(0x0ff802, 0x0ff803).w(FUNC(opwolf_state::opwolf_cchip_status_w));
-// map(0x0ffc00, 0x0ffc01).w(FUNC(opwolf_state::opwolf_cchip_bank_w));
+// map(0x0f0000, 0x0f07ff).mirror(0xf000).r(FUNC(opwolf_state::opwolf_cchip_data_r));
+// map(0x0f0802, 0x0f0803).mirror(0xf000).r(FUNC(opwolf_state::opwolf_cchip_status_r));
+// map(0x0ff000, 0x0ff7ff).w(FUNC(opwolf_state::opwolf_cchip_data_w));
+// map(0x0ff802, 0x0ff803).w(FUNC(opwolf_state::opwolf_cchip_status_w));
+// map(0x0ffc00, 0x0ffc01).w(FUNC(opwolf_state::opwolf_cchip_bank_w));
map(0x0f0000, 0x0f07ff).mirror(0xf000).rw(m_cchip, FUNC(taito_cchip_device::mem68_r), FUNC(taito_cchip_device::mem68_w)).umask16(0x00ff);
map(0x0f0800, 0x0f0fff).mirror(0xf000).rw(m_cchip, FUNC(taito_cchip_device::asic_r), FUNC(taito_cchip_device::asic68_w)).umask16(0x00ff);
map(0x100000, 0x107fff).ram();
diff --git a/src/mame/drivers/pgm.cpp b/src/mame/drivers/pgm.cpp
index e0bdb8a21d3..cf3415aed40 100644
--- a/src/mame/drivers/pgm.cpp
+++ b/src/mame/drivers/pgm.cpp
@@ -4992,6 +4992,6 @@ GAME( 2008, kovshxas, kovshp, pgm_arm_type1, kovsh, pgm_arm_ty
//乱世拳皇/Luànshì quánhuáng
GAME( 200?, kovlsqh, kovshp, pgm_arm_type1, kovsh, pgm_arm_type1_state, init_kovlsqh2, ROT0, "bootleg", "Luanshi Quanhuang (bootleg of Knights of Valour Super Heroes Plus, ver. 200CN)", MACHINE_IMPERFECT_SOUND | MACHINE_UNEMULATED_PROTECTION | MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
GAME( 200?, kovlsqh2, kovshp, pgm_arm_type1, kovsh, pgm_arm_type1_state, init_kovlsqh2, ROT0, "bootleg", "Luanshi Quanhuang 2 (bootleg of Knights of Valour Super Heroes Plus, ver. 200CN)", MACHINE_IMPERFECT_SOUND | MACHINE_UNEMULATED_PROTECTION | MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
-//乱世街霸/Luànshì jiē b
+//乱世街霸/Luànshì jiē bà
GAME( 200?, kovlsjb, kovshp, pgm_arm_type1, kovsh, pgm_arm_type1_state, init_kovlsqh2, ROT0, "bootleg", "Luanshi Jie Ba (bootleg of Knights of Valour Super Heroes Plus, ver. 200CN, set 1)", MACHINE_IMPERFECT_SOUND | MACHINE_UNEMULATED_PROTECTION | MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
GAME( 200?, kovlsjba, kovshp, pgm_arm_type1, kovsh, pgm_arm_type1_state, init_kovlsqh2, ROT0, "bootleg", "Luanshi Jie Ba (bootleg of Knights of Valour Super Heroes Plus, ver. 200CN, set 2)", MACHINE_IMPERFECT_SOUND | MACHINE_UNEMULATED_PROTECTION | MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE ) /* need internal rom of IGS027A */
diff --git a/src/mame/drivers/policetr.cpp b/src/mame/drivers/policetr.cpp
index 67a7cccfe47..73d1c587440 100644
--- a/src/mame/drivers/policetr.cpp
+++ b/src/mame/drivers/policetr.cpp
@@ -284,40 +284,40 @@ void sshooter_state::mem(address_map &map)
static INPUT_PORTS_START( policetr )
PORT_START("IN0")
- PORT_BIT( 0x00010000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /P2SPR1 (note 1) */
- PORT_BIT( 0x00020000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /P2PUSH3 (note 1) */
- PORT_BIT( 0x00040000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /P2PUSH2 (note 1) */
- PORT_BIT( 0x00080000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /P2USH1 (note 1) */
- PORT_BIT( 0x00100000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /P2RIGHT (note 1) */
- PORT_BIT( 0x00200000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /P2LEFT (note 1) */
- PORT_BIT( 0x00400000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /P2DOWN (note 1) */
- PORT_BIT( 0x00800000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /P2UP (note 1) */
- PORT_BIT( 0x01000000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /P1SPR1 (note 1) */
- PORT_BIT( 0x02000000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /P1PUSH3 (note 1) */
- PORT_BIT( 0x04000000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /P1PUSH2 (note 1) */
- PORT_BIT( 0x08000000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /P1PUSH1 (note 1) */
- PORT_BIT( 0x10000000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /P1RIGHT (note 1) */
- PORT_BIT( 0x20000000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /P1LEFT (note 1) */
- PORT_BIT( 0x40000000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /P1DOWN (note 1) */
- PORT_BIT( 0x80000000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /P1UP (note 1) */
+ PORT_BIT( 0x00010000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /P2SPR1 (note 1) */
+ PORT_BIT( 0x00020000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /P2PUSH3 (note 1) */
+ PORT_BIT( 0x00040000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /P2PUSH2 (note 1) */
+ PORT_BIT( 0x00080000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /P2USH1 (note 1) */
+ PORT_BIT( 0x00100000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /P2RIGHT (note 1) */
+ PORT_BIT( 0x00200000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /P2LEFT (note 1) */
+ PORT_BIT( 0x00400000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /P2DOWN (note 1) */
+ PORT_BIT( 0x00800000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /P2UP (note 1) */
+ PORT_BIT( 0x01000000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /P1SPR1 (note 1) */
+ PORT_BIT( 0x02000000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /P1PUSH3 (note 1) */
+ PORT_BIT( 0x04000000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /P1PUSH2 (note 1) */
+ PORT_BIT( 0x08000000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /P1PUSH1 (note 1) */
+ PORT_BIT( 0x10000000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /P1RIGHT (note 1) */
+ PORT_BIT( 0x20000000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /P1LEFT (note 1) */
+ PORT_BIT( 0x40000000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /P1DOWN (note 1) */
+ PORT_BIT( 0x80000000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /P1UP (note 1) */
PORT_START("IN1")
PORT_BIT( 0x00010000, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x00020000, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x00040000, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x00080000, IP_ACTIVE_LOW, IPT_COIN1 )
- PORT_BIT( 0x00100000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /TILT (note 1) */
+ PORT_BIT( 0x00100000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /TILT (note 1) */
PORT_BIT( 0x00200000, IP_ACTIVE_LOW, IPT_SERVICE1 )
- PORT_BIT( 0x00400000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /SERVICE (note 1) */
- PORT_BIT( 0x00800000, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, policetr_state, bsmt_status_r, nullptr)
- PORT_BIT( 0x01000000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
- PORT_BIT( 0x02000000, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* /XSW2 (note 2) */
- PORT_BIT( 0x04000000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
- PORT_BIT( 0x08000000, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* /XSW2 (note 2) */
- PORT_BIT( 0x10000000, IP_ACTIVE_LOW, IPT_UNUSED ) /* TKTSNS (note 3) */
- PORT_BIT( 0x20000000, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("eeprom", eeprom_serial_93cxx_device, do_read) /* EEPROM read */
- PORT_BIT( 0x40000000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /VOLMDN (note 1) */
- PORT_BIT( 0x80000000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /VOLMUP (note 1) */
+ PORT_BIT( 0x00400000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /SERVICE (note 1) */
+ PORT_BIT( 0x00800000, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(DEVICE_SELF, policetr_state, bsmt_status_r, nullptr)
+ PORT_BIT( 0x01000000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
+ PORT_BIT( 0x02000000, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* /XSW2 (note 2) */
+ PORT_BIT( 0x04000000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
+ PORT_BIT( 0x08000000, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* /XSW2 (note 2) */
+ PORT_BIT( 0x10000000, IP_ACTIVE_LOW, IPT_UNUSED ) /* TKTSNS (note 3) */
+ PORT_BIT( 0x20000000, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("eeprom", eeprom_serial_93cxx_device, do_read) /* EEPROM read */
+ PORT_BIT( 0x40000000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /VOLMDN (note 1) */
+ PORT_BIT( 0x80000000, IP_ACTIVE_LOW, IPT_UNUSED ) /* /VOLMUP (note 1) */
/* Note 1: Input is unused but is shown in the service menu and noted as written on the I/O schematic in the Police Trainer manual. */
/* Note 2: It is unknown if this input is used, but it is noted as written on the I/O schematic in the Police Trainer manual. */
diff --git a/src/mame/drivers/ql.cpp b/src/mame/drivers/ql.cpp
index 7a5e5799dba..148b2e2385b 100644
--- a/src/mame/drivers/ql.cpp
+++ b/src/mame/drivers/ql.cpp
@@ -1009,9 +1009,9 @@ void ql_state::opd(machine_config &config)
void ql_state::megaopd(machine_config &config)
{
- ql(config);
+ ql(config);
// internal ram
- m_ram->set_default_size("256K");
+ m_ram->set_default_size("256K");
}
*/
diff --git a/src/mame/drivers/r2dtank.cpp b/src/mame/drivers/r2dtank.cpp
index 7d5feaa3c0c..e029d18f330 100644
--- a/src/mame/drivers/r2dtank.cpp
+++ b/src/mame/drivers/r2dtank.cpp
@@ -466,12 +466,12 @@ MACHINE_CONFIG_START(r2dtank_state::r2dtank)
/* 74LS123 */
ttl74123_device &ttl74123(TTL74123(config, "74123", 0));
- ttl74123.set_connection_type(TTL74123_GROUNDED); /* the hook up type */
- ttl74123.set_resistor_value(RES_K(22)); /* resistor connected to RCext */
- ttl74123.set_capacitor_value(CAP_U(0.01)); /* capacitor connected to Cext and RCext */
- ttl74123.set_a_pin_value(1); /* A pin - driven by the CRTC */
- ttl74123.set_b_pin_value(1); /* B pin - pulled high */
- ttl74123.set_clear_pin_value(1); /* Clear pin - pulled high */
+ ttl74123.set_connection_type(TTL74123_GROUNDED); /* the hook up type */
+ ttl74123.set_resistor_value(RES_K(22)); /* resistor connected to RCext */
+ ttl74123.set_capacitor_value(CAP_U(0.01)); /* capacitor connected to Cext and RCext */
+ ttl74123.set_a_pin_value(1); /* A pin - driven by the CRTC */
+ ttl74123.set_b_pin_value(1); /* B pin - pulled high */
+ ttl74123.set_clear_pin_value(1); /* Clear pin - pulled high */
ttl74123.out_cb().set(FUNC(r2dtank_state::ttl74123_output_changed));
PIA6821(config, m_pia_main, 0);
diff --git a/src/mame/drivers/spiders.cpp b/src/mame/drivers/spiders.cpp
index 392e600cda7..b3f2ee5a0eb 100644
--- a/src/mame/drivers/spiders.cpp
+++ b/src/mame/drivers/spiders.cpp
@@ -571,12 +571,12 @@ MACHINE_CONFIG_START(spiders_state::spiders)
m_pia[3]->irqa_handler().set_inputline("audiocpu", M6802_IRQ_LINE);
ttl74123_device &ic60(TTL74123(config, "ic60", 0));
- ic60.set_connection_type(TTL74123_GROUNDED); /* the hook up type */
- ic60.set_resistor_value(RES_K(22)); /* resistor connected to RCext */
- ic60.set_capacitor_value(CAP_U(0.01)); /* capacitor connected to Cext and RCext */
- ic60.set_a_pin_value(1); /* A pin - driven by the CRTC */
- ic60.set_b_pin_value(1); /* B pin - pulled high */
- ic60.set_clear_pin_value(1); /* Clear pin - pulled high */
+ ic60.set_connection_type(TTL74123_GROUNDED); /* the hook up type */
+ ic60.set_resistor_value(RES_K(22)); /* resistor connected to RCext */
+ ic60.set_capacitor_value(CAP_U(0.01)); /* capacitor connected to Cext and RCext */
+ ic60.set_a_pin_value(1); /* A pin - driven by the CRTC */
+ ic60.set_b_pin_value(1); /* B pin - pulled high */
+ ic60.set_clear_pin_value(1); /* Clear pin - pulled high */
ic60.out_cb().set(FUNC(spiders_state::ic60_74123_output_changed));
/* audio hardware */
diff --git a/src/mame/drivers/super6.cpp b/src/mame/drivers/super6.cpp
index 15d0032d57d..a704a203c95 100644
--- a/src/mame/drivers/super6.cpp
+++ b/src/mame/drivers/super6.cpp
@@ -402,10 +402,10 @@ WRITE_LINE_MEMBER( super6_state::fdc_drq_w )
// no evidence of daisy chain in use - removed for now
//static const z80_daisy_config super6_daisy_chain[] =
//{
-// { Z80CTC_TAG },
-// { Z80DART_TAG },
-// { Z80PIO_TAG },
-// { nullptr }
+// { Z80CTC_TAG },
+// { Z80DART_TAG },
+// { Z80PIO_TAG },
+// { nullptr }
//};
diff --git a/src/mame/drivers/supercrd.cpp b/src/mame/drivers/supercrd.cpp
index 9e83a78dcde..ab8dfc3288c 100644
--- a/src/mame/drivers/supercrd.cpp
+++ b/src/mame/drivers/supercrd.cpp
@@ -423,7 +423,7 @@ MACHINE_CONFIG_START(supercrd_state::supercrd)
MCFG_DEVICE_ADD("maincpu", Z80, MASTER_CLOCK/8) /* 2MHz, guess */
MCFG_DEVICE_PROGRAM_MAP(supercrd_map)
-// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
+// NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
// MCFG_DEVICE_ADD("ppi8255_0", I8255, 0)
// MCFG_DEVICE_ADD("ppi8255_1", I8255, 0)
diff --git a/src/mame/drivers/system16.cpp b/src/mame/drivers/system16.cpp
index c1b48641ed0..7a1197cc50a 100644
--- a/src/mame/drivers/system16.cpp
+++ b/src/mame/drivers/system16.cpp
@@ -3125,7 +3125,7 @@ ROM_START( dduxbl )
ROM_REGION( 0x10000, "soundcpu", 0 ) /* sound CPU */
ROM_LOAD( "dduxb01.bin", 0x0000, 0x8000, CRC(0dbef0d7) SHA1(8b9afb2fcb946cec467b1e691c267194b503f841) )
-
+
/* stuff below isn't used but loaded because it was on the board .. */
ROM_REGION( 0x0200, "proms", 0 )
ROM_LOAD( "dduxb_5_82s129.b1", 0x0000, 0x0100, CRC(a7c22d96) SHA1(160deae8053b09c09328325246598b3518c7e20b) )
diff --git a/src/mame/drivers/ti99_2.cpp b/src/mame/drivers/ti99_2.cpp
index 85604d10689..d910d0327ef 100644
--- a/src/mame/drivers/ti99_2.cpp
+++ b/src/mame/drivers/ti99_2.cpp
@@ -417,12 +417,12 @@ void ti99_2_state::ti99_224(machine_config& config)
using namespace bus::ti99::internal;
screen_device& screen(SCREEN(config, TI992_SCREEN_TAG, SCREEN_TYPE_RASTER));
- screen.set_raw(XTAL(10'738'635) / 2, \
+ screen.set_raw(XTAL(10'738'635) / 2,
video992_device::TOTAL_HORZ,
video992_device::HORZ_DISPLAY_START-12,
- video992_device::HORZ_DISPLAY_START + 256 + 12, \
- video992_device::TOTAL_VERT_NTSC, \
- video992_device::VERT_DISPLAY_START_NTSC - 12, \
+ video992_device::HORZ_DISPLAY_START + 256 + 12,
+ video992_device::TOTAL_VERT_NTSC,
+ video992_device::VERT_DISPLAY_START_NTSC - 12,
video992_device::VERT_DISPLAY_START_NTSC + 192 + 12 );
screen.set_screen_update(TI992_VDC_TAG, FUNC(video992_device::screen_update));
@@ -441,12 +441,12 @@ void ti99_2_state::ti99_232(machine_config& config)
using namespace bus::ti99::internal;
screen_device& screen(SCREEN(config, TI992_SCREEN_TAG, SCREEN_TYPE_RASTER));
- screen.set_raw(XTAL(10'738'635) / 2, \
+ screen.set_raw(XTAL(10'738'635) / 2,
video992_device::TOTAL_HORZ,
video992_device::HORZ_DISPLAY_START-12,
- video992_device::HORZ_DISPLAY_START + 256 + 12, \
- video992_device::TOTAL_VERT_NTSC, \
- video992_device::VERT_DISPLAY_START_NTSC - 12, \
+ video992_device::HORZ_DISPLAY_START + 256 + 12,
+ video992_device::TOTAL_VERT_NTSC,
+ video992_device::VERT_DISPLAY_START_NTSC - 12,
video992_device::VERT_DISPLAY_START_NTSC + 192 + 12 );
screen.set_screen_update(TI992_VDC_TAG, FUNC(video992_device::screen_update));
diff --git a/src/mame/drivers/vgmplay.cpp b/src/mame/drivers/vgmplay.cpp
index a3a37f27178..056940ed3d6 100644
--- a/src/mame/drivers/vgmplay.cpp
+++ b/src/mame/drivers/vgmplay.cpp
@@ -2284,7 +2284,7 @@ QUICKLOAD_LOAD_MEMBER(vgmplay_state, load_file)
m_file_data.resize(quickload_size);
- if (!quickload_size ||
+ if (!quickload_size ||
image.fread(&m_file_data[0], quickload_size) != quickload_size)
{
m_file_data.clear();
@@ -2322,7 +2322,7 @@ QUICKLOAD_LOAD_MEMBER(vgmplay_state, load_file)
str.avail_out = decomp.size() - str.total_out;
err = inflate(&str, Z_SYNC_FLUSH);
} while(err == Z_OK);
-
+
if(err != Z_STREAM_END)
{
logerror("broken gzip file\n");
@@ -2536,14 +2536,14 @@ QUICKLOAD_LOAD_MEMBER(vgmplay_state, load_file)
m_ga20[0]->set_unscaled_clock(version >= 0x171 && header_size >= 0xe4 ? r32(0xe0) & ~0x40000000 : 0);
m_ga20[1]->set_unscaled_clock(version >= 0x171 && header_size >= 0xe4 && (r32(0xe0) & 0x40000000) ? r32(0xe0) & ~0x40000000 : 0);
-
+
for (device_t &child : subdevices())
if (child.clock() != 0)
logerror("%s %d\n", child.tag(), child.clock());
//for (auto &stream : machine().sound().streams())
- // if (stream->sample_rate() != 0)
- // logerror("%s %d\n", stream->device().tag(), stream->sample_rate());
+ // if (stream->sample_rate() != 0)
+ // logerror("%s %d\n", stream->device().tag(), stream->sample_rate());
machine().schedule_soft_reset();
diff --git a/src/mame/drivers/wrally.cpp b/src/mame/drivers/wrally.cpp
index 8d485f27bd9..bb5566b1491 100644
--- a/src/mame/drivers/wrally.cpp
+++ b/src/mame/drivers/wrally.cpp
@@ -292,7 +292,7 @@ MACHINE_CONFIG_START(wrally_state::wrally)
m_outlatch->q_out_cb<1>().set(FUNC(wrally_state::coin2_lockout_w));
m_outlatch->q_out_cb<2>().set(FUNC(wrally_state::coin1_counter_w));
m_outlatch->q_out_cb<3>().set(FUNC(wrally_state::coin2_counter_w));
- m_outlatch->q_out_cb<4>().set_nop(); /* Sound muting */
+ m_outlatch->q_out_cb<4>().set_nop(); /* Sound muting */
m_outlatch->q_out_cb<5>().set(FUNC(wrally_state::flipscreen_w)); /* Flip screen */
m_outlatch->q_out_cb<6>().set_nop(); /* ??? */
m_outlatch->q_out_cb<7>().set_nop(); /* ??? */
diff --git a/src/mame/drivers/zodiack.cpp b/src/mame/drivers/zodiack.cpp
index 03c67485ee5..10e379f8640 100644
--- a/src/mame/drivers/zodiack.cpp
+++ b/src/mame/drivers/zodiack.cpp
@@ -515,7 +515,7 @@ void zodiack_state::zodiack(machine_config &config)
orca_ovg_40c_device &videopcb(ORCA_OVG_40C(config, "videopcb", 0));
videopcb.set_palette("videopcb:palette");
-
+
/* sound hardware */
SPEAKER(config, "mono").front_center();
diff --git a/src/mame/includes/hng64.h b/src/mame/includes/hng64.h
index 4cc273c09b5..c4d6965f2f3 100644
--- a/src/mame/includes/hng64.h
+++ b/src/mame/includes/hng64.h
@@ -342,7 +342,7 @@ private:
DECLARE_READ8_MEMBER(hng64_fbcontrol_r);
DECLARE_WRITE8_MEMBER(hng64_fbcontrol_w);
-
+
DECLARE_WRITE16_MEMBER(hng64_fbunkpair_w);
DECLARE_WRITE16_MEMBER(hng64_fbscroll_w);
diff --git a/src/mame/layout/vgmplay.lay b/src/mame/layout/vgmplay.lay
index abc86f786bf..d79b1a07916 100644
--- a/src/mame/layout/vgmplay.lay
+++ b/src/mame/layout/vgmplay.lay
@@ -1,4 +1,4 @@
-<?xml version="1.0"?>
+<?xml version="1.0"?>
<mamelayout version="2">
<!--
Activity LEDs:
diff --git a/src/mame/machine/315-5838_317-0229_comp.h b/src/mame/machine/315-5838_317-0229_comp.h
index ebd26ae38b4..4e4ab7d2d6a 100644
--- a/src/mame/machine/315-5838_317-0229_comp.h
+++ b/src/mame/machine/315-5838_317-0229_comp.h
@@ -9,8 +9,8 @@
DECLARE_DEVICE_TYPE(SEGA315_5838_COMP, sega_315_5838_comp_device)
-class sega_315_5838_comp_device : public device_t,
- public device_rom_interface
+class sega_315_5838_comp_device : public device_t,
+ public device_rom_interface
{
public:
// construction/destruction
@@ -30,7 +30,7 @@ public:
HACK_MODE_NO_KEY,
HACK_MODE_DOA
};
-
+
void set_hack_mode(int mode) { m_hackmode = mode; }
protected:
diff --git a/src/mame/machine/pce_cd.cpp b/src/mame/machine/pce_cd.cpp
index 1f882bfcf20..94986e2a424 100644
--- a/src/mame/machine/pce_cd.cpp
+++ b/src/mame/machine/pce_cd.cpp
@@ -242,7 +242,7 @@ void pce_cd_device::nvram_init(nvram_device &nvram, void *data, size_t size)
// TODO: left and right speaker tags should be passed from the parent config, instead of using the hard-coded ones below!?!
MACHINE_CONFIG_START(pce_cd_device::device_add_mconfig)
- NVRAM(config, "bram").set_custom_handler(FUNC(pce_cd_device::nvram_init));
+ NVRAM(config, "bram").set_custom_handler(FUNC(pce_cd_device::nvram_init));
MCFG_CDROM_ADD("cdrom")
MCFG_CDROM_INTERFACE("pce_cdrom")
diff --git a/src/mame/machine/trs80m3.cpp b/src/mame/machine/trs80m3.cpp
index 3c4b8296a84..ff02d8a32f0 100644
--- a/src/mame/machine/trs80m3.cpp
+++ b/src/mame/machine/trs80m3.cpp
@@ -442,16 +442,16 @@ INTERRUPT_GEN_MEMBER(trs80m3_state::rtc_interrupt)
}
// Also, if cpu is in wait, unlock it and trigger NMI
// Don't, it breaks disk loading
-// if (m_wait)
-// {
-// m_wait = false;
-// m_maincpu->set_input_line(Z80_INPUT_LINE_WAIT, CLEAR_LINE);
-// if (BIT(m_nmi_mask, 6))
-// {
-// m_nmi_data |= 0x40;
-// m_maincpu->set_input_line(INPUT_LINE_NMI, HOLD_LINE);
-// }
-// }
+// if (m_wait)
+// {
+// m_wait = false;
+// m_maincpu->set_input_line(Z80_INPUT_LINE_WAIT, CLEAR_LINE);
+// if (BIT(m_nmi_mask, 6))
+// {
+// m_nmi_data |= 0x40;
+// m_maincpu->set_input_line(INPUT_LINE_NMI, HOLD_LINE);
+// }
+// }
}
// The floppy sector has been read. Enable CPU and NMI.
diff --git a/src/mame/mame.lst b/src/mame/mame.lst
index 3d6c564ccfc..02f4588c54a 100644
--- a/src/mame/mame.lst
+++ b/src/mame/mame.lst
@@ -1160,7 +1160,7 @@ ambushj // (c) 1983 Nippon Amuse license
ambushv // (c) 1983 Volt Electronics license
dkong3abl // bootleg
mariobl // bootleg
-mariobla // bootleg
+mariobla // bootleg
@source:amerihok.cpp
amerihok //
@@ -10824,7 +10824,7 @@ superbik // (c) 1983 Century
wallst // (c) 1982 Century
@source:cwheel.cpp
-cwheel // (c) 19?? Gamebar
+cwheel // (c) 19?? Gamebar
@source:cxgz80.cpp
ch2001 //
@@ -30285,7 +30285,7 @@ vandykejal2 // UPL-90064 (c) Jaleco
trocana // NTC / NMK
@source:nightmare.cpp
-nightmare // (c) 1982 E.F.O.
+nightmare // (c) 1982 E.F.O.
@source:nokia_3310.cpp
noki3210 //
diff --git a/src/mame/video/deco_zoomspr.cpp b/src/mame/video/deco_zoomspr.cpp
index 8502fb4ebde..3413231f01d 100644
--- a/src/mame/video/deco_zoomspr.cpp
+++ b/src/mame/video/deco_zoomspr.cpp
@@ -240,7 +240,7 @@ void deco_zoomspr_device::dragngun_draw_sprites( bitmap_rgb32 &bitmap, const rec
0x00000020 - ? Used for background at 'frog' boss and title screen dragon.
0x00000040 - ? priority?
0x00000080 - Alpha blending enable
- 0x40000000 - Additive/Subtractable blend? (dragngun)
+ 0x40000000 - Additive/Subtractable blend? (dragngun)
Word 7 :
diff --git a/src/mame/video/hng64_3d.hxx b/src/mame/video/hng64_3d.hxx
index 218c54b5abc..810c1e21586 100644
--- a/src/mame/video/hng64_3d.hxx
+++ b/src/mame/video/hng64_3d.hxx
@@ -19,15 +19,15 @@ hng64_poly_renderer::hng64_poly_renderer(hng64_state& state)
/* Hardware calls these '3d buffers'
- They're only read during the startup check, never written
+ They're only read during the startup check, never written
- They're definitely mirrored in the startup test, according to ElSemi
+ They're definitely mirrored in the startup test, according to ElSemi
- The games run in interlace mode, so buffer resolution can be half the effective screen height
+ The games run in interlace mode, so buffer resolution can be half the effective screen height
- 30100000-3011ffff is framebuffer A0 (512x256 8-bit?) (pal data?)
- 30120000-3013ffff is framebuffer A1 (512x256 8-bit?) (pal data?)
- 30140000-3015ffff is ZBuffer A (512x256 8-bit?)
+ 30100000-3011ffff is framebuffer A0 (512x256 8-bit?) (pal data?)
+ 30120000-3013ffff is framebuffer A1 (512x256 8-bit?) (pal data?)
+ 30140000-3015ffff is ZBuffer A (512x256 8-bit?)
*/
READ32_MEMBER(hng64_state::hng64_fbram1_r)
@@ -93,16 +93,16 @@ WRITE32_MEMBER(hng64_state::dl_control_w)
/* m_activeDisplayList is not currently connected to anything, it seems unlikely there are different banks.
games typically write up to 8 lots of 0x200 data, writing bit 0 between them
- bit 0 (0x01) process DMA from 3d FIFO to framebuffer?
- bit 1 (0x02) written before first set of dl data each frame on some games, but not on SS?
+ bit 0 (0x01) process DMA from 3d FIFO to framebuffer?
+ bit 1 (0x02) written before first set of dl data each frame on some games, but not on SS?
bit 2 (0x04) reset buffer count (startup only)
*/
/*
if (data & 0x01)
- m_activeDisplayList = 0;
+ m_activeDisplayList = 0;
else if (data & 0x02)
- m_activeDisplayList = 1;
+ m_activeDisplayList = 1;
*/
/*
@@ -110,7 +110,7 @@ WRITE32_MEMBER(hng64_state::dl_control_w)
if(data & 2) // swap buffers
{
- clear3d();
+ clear3d();
}
*/
}
@@ -118,7 +118,7 @@ WRITE32_MEMBER(hng64_state::dl_control_w)
READ32_MEMBER(hng64_state::dl_vreg_r)
{
/* tested with possible masked bits 0xf003 (often masking 0xf000 or 0x0003)
-
+
various wait loops on bit 0x02 (bit 1) after sending 3d commands
tests failing on other bits can cause display list writes to be skipped
@@ -927,7 +927,7 @@ void hng64_state::hng64_command3d(const uint16_t* packet)
switch (packet[0])
{
- case 0x0000: // NOP?
+ case 0x0000: // NOP?
/* Appears to be a NOP (or 'end of list for this frame, ignore everything after' doesn't stop stray 3d objects in game for xrally/roadedge
although does stop a partial hng64 logo being displayed assuming that's meant to be kept onscreen by some other means without valid data) */
break;
@@ -1029,11 +1029,11 @@ void hng64_state::clear3d()
*
* | Bits | Use
* | |
- * -------+ 7654-3210-+----------------
+ * -------+ 7654-3210-+----------------
* 0 | ---- --xy | x = Reads in Fatal Fury WA, if on then there isn't a 3d refresh (busy flag?). y = set at POST/service modes, almost likely fb disable
* 1 | ---- ---- |
* 2 | ccc- b--- | c = framebuffer color base, 0x311800 in Fatal Fury WA, 0x313800 in Buriki One (or not?) b = don't clear buffer
- * 3 | ---- ---- |
+ * 3 | ---- ---- |
*/
READ8_MEMBER(hng64_state::hng64_fbcontrol_r)
@@ -1046,12 +1046,12 @@ WRITE8_MEMBER(hng64_state::hng64_fbcontrol_w)
{
/* roadedge does the following to turn off the framebuffer clear (leave trails) and then turn it back on when selecting a car
- ':maincpu' (8001EDE0): hng64_fbcontrol_w (002) 10 (disable frame buffer clear)
- ':maincpu' (8001FE4C): hng64_fbcontrol_w (002) 38 (normal)
+ ':maincpu' (8001EDE0): hng64_fbcontrol_w (002) 10 (disable frame buffer clear)
+ ':maincpu' (8001FE4C): hng64_fbcontrol_w (002) 38 (normal)
during the Hyper Neogeo 64 logo it has a value of
':maincpu' (8005AA44): hng64_fbcontrol_w (002) 18
-
+
sams64 does
':maincpu' (800C13C4): hng64_fbcontrol_r (002) (ANDs with 0x07, ORs with 0x18)
':maincpu' (800C13D0): hng64_fbcontrol_w (002) 18
@@ -1090,7 +1090,7 @@ WRITE8_MEMBER(hng64_state::hng64_fbunkbyte_w)
}
else
{
- logerror("%s: hng64_unkbyte_w (%03x - unexpected) %02x \n", machine().describe_context(), offset, data);
+ logerror("%s: hng64_unkbyte_w (%03x - unexpected) %02x \n", machine().describe_context(), offset, data);
}
}
diff --git a/src/mame/video/hng64_sprite.hxx b/src/mame/video/hng64_sprite.hxx
index f58478c61c5..9093b4a7f2a 100644
--- a/src/mame/video/hng64_sprite.hxx
+++ b/src/mame/video/hng64_sprite.hxx
@@ -92,7 +92,7 @@ void hng64_state::draw_sprites(screen_device &screen, bitmap_rgb32 &bitmap, cons
zoomx = (source[1]&0x0000ffff)>>0;
int filtervalue = 0x000;
-
+
// This flips between ingame and other screens for roadedge, where the sprites which are filtered definitely needs to change and the game explicitly swaps the values in the sprite list at the same time.
// m_spriteregs[2] could also play a part as it also flips between 0x00000000 and 0x000fffff at the same time
// Samsho games also set the upper 3 bits which could be related, samsho games still have some unwanted sprites (but also use the other 'sprite clear' mechanism)
diff --git a/src/mame/video/opwolf.cpp b/src/mame/video/opwolf.cpp
index c53e7779dcc..ad0f039bad5 100644
--- a/src/mame/video/opwolf.cpp
+++ b/src/mame/video/opwolf.cpp
@@ -52,7 +52,7 @@ uint32_t opwolf_state::screen_update_opwolf(screen_device &screen, bitmap_ind16
screen.priority().fill(0, cliprect);
// Sprite/tilemap priority is hardwired by the PAL16L8 at location 19
-
+
m_pc080sn->tilemap_draw(screen, bitmap, cliprect, layer[0], TILEMAP_DRAW_OPAQUE, 1);
m_pc080sn->tilemap_draw(screen, bitmap, cliprect, layer[1], 0, 2);
diff --git a/src/mame/video/powervr2.cpp b/src/mame/video/powervr2.cpp
index 942a02a820d..beb8e3f6857 100644
--- a/src/mame/video/powervr2.cpp
+++ b/src/mame/video/powervr2.cpp
@@ -2783,7 +2783,7 @@ void powervr2_device::render_tri(bitmap_rgb32 &bitmap, texinfo *ti, const vert *
}
}
} else {
- render_tri_sorted<&powervr2_device::sample_nontextured>(bitmap, ti, v+i0, v+i1, v+i2);
+ render_tri_sorted<&powervr2_device::sample_nontextured>(bitmap, ti, v+i0, v+i1, v+i2);
}
}