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-rw-r--r--src/devices/cpu/i86/i186.cpp148
-rw-r--r--src/devices/cpu/i86/i186.h2
-rw-r--r--src/devices/cpu/i86/i286.cpp20
-rw-r--r--src/devices/cpu/i86/i286.h2
-rw-r--r--src/devices/cpu/i86/i86.cpp22
-rw-r--r--src/devices/cpu/i86/i86.h4
-rw-r--r--src/mame/audio/mw8080bw.cpp2
-rw-r--r--src/mame/includes/rmnimbus.h5
-rw-r--r--src/mame/machine/decocass.cpp96
-rw-r--r--src/mame/machine/harddriv.cpp73
-rw-r--r--src/mame/machine/rmnimbus.cpp20
-rw-r--r--src/mame/video/rmnimbus.cpp4
12 files changed, 201 insertions, 197 deletions
diff --git a/src/devices/cpu/i86/i186.cpp b/src/devices/cpu/i86/i186.cpp
index ce8d0db83bd..be1ff32e459 100644
--- a/src/devices/cpu/i86/i186.cpp
+++ b/src/devices/cpu/i86/i186.cpp
@@ -166,14 +166,14 @@ device_memory_interface::space_config_vector i80186_cpu_device::memory_space_con
uint8_t i80186_cpu_device::fetch_op()
{
- uint8_t data = m_direct_opcodes->read_byte(pc(), m_fetch_xor);
+ uint8_t data = m_direct_opcodes->read_byte(update_pc(), m_fetch_xor);
m_ip++;
return data;
}
uint8_t i80186_cpu_device::fetch()
{
- uint8_t data = m_direct_opcodes->read_byte(pc(), m_fetch_xor);
+ uint8_t data = m_direct_opcodes->read_byte(update_pc(), m_fetch_xor);
m_ip++;
return data;
}
@@ -237,7 +237,7 @@ void i80186_cpu_device::execute_run()
}
}
- debugger_instruction_hook( this, pc() );
+ debugger_instruction_hook( this, update_pc() );
uint8_t op = fetch_op();
@@ -281,7 +281,7 @@ void i80186_cpu_device::execute_run()
if (tmp<low || tmp>high)
interrupt(5);
CLK(BOUND);
- logerror("%06x: bound %04x high %04x low %04x tmp\n", pc(), high, low, tmp);
+ logerror("%06x: bound %04x high %04x low %04x tmp\n", m_pc, high, low, tmp);
}
break;
@@ -352,7 +352,7 @@ void i80186_cpu_device::execute_run()
m_sregs[DS] = m_src;
break;
default:
- logerror("%06x: Mov Sreg - Invalid register\n", pc());
+ logerror("%06x: Mov Sreg - Invalid register\n", m_pc);
m_ip = m_prev_ip;
interrupt(6);
break;
@@ -548,7 +548,7 @@ void i80186_cpu_device::execute_run()
if(!common_op(op))
{
m_icount -= 10; // UD fault timing?
- logerror("%06x: Invalid Opcode %02x\n", pc(), op);
+ logerror("%06x: Invalid Opcode %02x\n", m_pc, op);
m_ip = m_prev_ip;
interrupt(6); // 80186 has #UD
break;
@@ -862,7 +862,7 @@ void i80186_cpu_device::update_interrupt_state()
{
if((IntNo >= 2) && (m_intr.ext[IntNo - 2] & EXTINT_CTRL_CASCADE))
{
- logerror("i186: %06x: irq %d use when set for cascade mode\n", pc(), IntNo);
+ logerror("i186: %06x: irq %d use when set for cascade mode\n", m_pc, IntNo);
m_intr.request &= ~(0x10 << IntNo);
continue;
}
@@ -913,7 +913,7 @@ void i80186_cpu_device::handle_eoi(int data)
case 0x0d: m_intr.in_service &= ~0x20; break;
case 0x0e: m_intr.in_service &= ~0x40; break;
case 0x0f: m_intr.in_service &= ~0x80; break;
- default: logerror("%05X:ERROR - 80186 EOI with unknown vector %02X\n", pc(), data & 0x1f);
+ default: logerror("%05X:ERROR - 80186 EOI with unknown vector %02X\n", m_pc, data & 0x1f);
}
if (LOG_INTERRUPTS) logerror("(%f) **** Got EOI for vector %02X\n", machine().time().as_double(), data & 0x1f);
}
@@ -1169,7 +1169,7 @@ void i80186_cpu_device::internal_timer_update(int which, int new_count, int new_
/* check for control bits we don't handle */
diff = new_control ^ t->control;
if (diff & 0x0010)
- logerror("%05X:ERROR! -unsupported timer mode %04X\n", pc(), new_control);
+ logerror("%05X:ERROR! -unsupported timer mode %04X\n", m_pc, new_control);
/* if we have real changes, update things */
if (diff != 0)
@@ -1241,7 +1241,7 @@ void i80186_cpu_device::update_dma_control(int which, int new_control)
/* check for control bits we don't handle */
diff = new_control ^ d->control;
if ((LOG_DMA) && (diff & 0x6811))
- logerror("%05X:ERROR! - unsupported DMA mode %04X\n", pc(), new_control);
+ logerror("%05X:ERROR! - unsupported DMA mode %04X\n", m_pc, new_control);
if (LOG_DMA) logerror("Initiated DMA %d - count = %04X, source = %04X, dest = %04X\n", which, d->count, d->source, d->dest);
@@ -1263,7 +1263,7 @@ void i80186_cpu_device::drq_callback(int which)
if (!(dma->control & ST_STOP))
{
if(LOG_DMA)
- logerror("%05X:ERROR! - drq%d with dma channel stopped\n", pc(), which);
+ logerror("%05X:ERROR! - drq%d with dma channel stopped\n", m_pc, which);
return;
}
@@ -1331,21 +1331,21 @@ READ16_MEMBER(i80186_cpu_device::internal_port_r)
switch (offset)
{
case 0x11:
- if (LOG_PORTS) logerror("%05X:ERROR - read from 80186 EOI\n", pc());
+ if (LOG_PORTS) logerror("%05X:ERROR - read from 80186 EOI\n", m_pc);
break;
case 0x12:
- if (LOG_PORTS) logerror("%05X:read 80186 interrupt poll\n", pc());
+ if (LOG_PORTS) logerror("%05X:read 80186 interrupt poll\n", m_pc);
if (m_intr.poll_status & 0x8000)
int_callback(*this, 0);
return m_intr.poll_status;
case 0x13:
- if (LOG_PORTS) logerror("%05X:read 80186 interrupt poll status\n", pc());
+ if (LOG_PORTS) logerror("%05X:read 80186 interrupt poll status\n", m_pc);
return m_intr.poll_status;
case 0x14:
- if (LOG_PORTS) logerror("%05X:read 80186 interrupt mask\n", pc());
+ if (LOG_PORTS) logerror("%05X:read 80186 interrupt mask\n", m_pc);
temp = (m_intr.timer >> 3) & 0x01;
temp |= (m_intr.dma[0] >> 1) & 0x04;
temp |= (m_intr.dma[1] >> 0) & 0x08;
@@ -1356,56 +1356,56 @@ READ16_MEMBER(i80186_cpu_device::internal_port_r)
return temp;
case 0x15:
- if (LOG_PORTS) logerror("%05X:read 80186 interrupt priority mask\n", pc());
+ if (LOG_PORTS) logerror("%05X:read 80186 interrupt priority mask\n", m_pc);
return m_intr.priority_mask;
case 0x16:
- if (LOG_PORTS) logerror("%05X:read 80186 interrupt in-service\n", pc());
+ if (LOG_PORTS) logerror("%05X:read 80186 interrupt in-service\n", m_pc);
return m_intr.in_service;
case 0x17:
- if (LOG_PORTS) logerror("%05X:read 80186 interrupt request\n", pc());
+ if (LOG_PORTS) logerror("%05X:read 80186 interrupt request\n", m_pc);
temp = m_intr.request & ~0x0001;
if (m_intr.status & 0x0007)
temp |= 1;
return temp;
case 0x18:
- if (LOG_PORTS) logerror("%05X:read 80186 interrupt status\n", pc());
+ if (LOG_PORTS) logerror("%05X:read 80186 interrupt status\n", m_pc);
return m_intr.status;
case 0x19:
- if (LOG_PORTS) logerror("%05X:read 80186 timer interrupt control\n", pc());
+ if (LOG_PORTS) logerror("%05X:read 80186 timer interrupt control\n", m_pc);
return m_intr.timer;
case 0x1a:
- if (LOG_PORTS) logerror("%05X:read 80186 DMA 0 interrupt control\n", pc());
+ if (LOG_PORTS) logerror("%05X:read 80186 DMA 0 interrupt control\n", m_pc);
return m_intr.dma[0];
case 0x1b:
- if (LOG_PORTS) logerror("%05X:read 80186 DMA 1 interrupt control\n", pc());
+ if (LOG_PORTS) logerror("%05X:read 80186 DMA 1 interrupt control\n", m_pc);
return m_intr.dma[1];
case 0x1c:
- if (LOG_PORTS) logerror("%05X:read 80186 INT 0 interrupt control\n", pc());
+ if (LOG_PORTS) logerror("%05X:read 80186 INT 0 interrupt control\n", m_pc);
return m_intr.ext[0];
case 0x1d:
- if (LOG_PORTS) logerror("%05X:read 80186 INT 1 interrupt control\n", pc());
+ if (LOG_PORTS) logerror("%05X:read 80186 INT 1 interrupt control\n", m_pc);
return m_intr.ext[1];
case 0x1e:
- if (LOG_PORTS) logerror("%05X:read 80186 INT 2 interrupt control\n", pc());
+ if (LOG_PORTS) logerror("%05X:read 80186 INT 2 interrupt control\n", m_pc);
return m_intr.ext[2];
case 0x1f:
- if (LOG_PORTS) logerror("%05X:read 80186 INT 3 interrupt control\n", pc());
+ if (LOG_PORTS) logerror("%05X:read 80186 INT 3 interrupt control\n", m_pc);
return m_intr.ext[3];
case 0x28:
case 0x2c:
case 0x30:
- if (LOG_PORTS) logerror("%05X:read 80186 Timer %d count\n", pc(), (offset - 0x28) / 4);
+ if (LOG_PORTS) logerror("%05X:read 80186 Timer %d count\n", m_pc, (offset - 0x28) / 4);
which = (offset - 0x28) / 4;
if (ACCESSING_BITS_0_7)
internal_timer_sync(which);
@@ -1414,76 +1414,76 @@ READ16_MEMBER(i80186_cpu_device::internal_port_r)
case 0x29:
case 0x2d:
case 0x31:
- if (LOG_PORTS) logerror("%05X:read 80186 Timer %d max A\n", pc(), (offset - 0x29) / 4);
+ if (LOG_PORTS) logerror("%05X:read 80186 Timer %d max A\n", m_pc, (offset - 0x29) / 4);
which = (offset - 0x29) / 4;
return m_timer[which].maxA;
case 0x2a:
case 0x2e:
- if (LOG_PORTS) logerror("%05X:read 80186 Timer %d max B\n", pc(), (offset - 0x2a) / 4);
+ if (LOG_PORTS) logerror("%05X:read 80186 Timer %d max B\n", m_pc, (offset - 0x2a) / 4);
which = (offset - 0x2a) / 4;
return m_timer[which].maxB;
case 0x2b:
case 0x2f:
case 0x33:
- if (LOG_PORTS) logerror("%05X:read 80186 Timer %d control\n", pc(), (offset - 0x2b) / 4);
+ if (LOG_PORTS) logerror("%05X:read 80186 Timer %d control\n", m_pc, (offset - 0x2b) / 4);
which = (offset - 0x2b) / 4;
return m_timer[which].control;
case 0x50:
- if (LOG_PORTS) logerror("%05X:read 80186 upper chip select\n", pc());
+ if (LOG_PORTS) logerror("%05X:read 80186 upper chip select\n", m_pc);
return m_mem.upper;
case 0x51:
- if (LOG_PORTS) logerror("%05X:read 80186 lower chip select\n", pc());
+ if (LOG_PORTS) logerror("%05X:read 80186 lower chip select\n", m_pc);
return m_mem.lower;
case 0x52:
- if (LOG_PORTS) logerror("%05X:read 80186 peripheral chip select\n", pc());
+ if (LOG_PORTS) logerror("%05X:read 80186 peripheral chip select\n", m_pc);
return m_mem.peripheral;
case 0x53:
- if (LOG_PORTS) logerror("%05X:read 80186 middle chip select\n", pc());
+ if (LOG_PORTS) logerror("%05X:read 80186 middle chip select\n", m_pc);
return m_mem.middle;
case 0x54:
- if (LOG_PORTS) logerror("%05X:read 80186 middle P chip select\n", pc());
+ if (LOG_PORTS) logerror("%05X:read 80186 middle P chip select\n", m_pc);
return m_mem.middle_size;
case 0x60:
case 0x68:
- if (LOG_PORTS) logerror("%05X:read 80186 DMA%d lower source address\n", pc(), (offset - 0x60) / 8);
+ if (LOG_PORTS) logerror("%05X:read 80186 DMA%d lower source address\n", m_pc, (offset - 0x60) / 8);
which = (offset - 0x60) / 8;
return m_dma[which].source;
case 0x61:
case 0x69:
- if (LOG_PORTS) logerror("%05X:read 80186 DMA%d upper source address\n", pc(), (offset - 0x61) / 8);
+ if (LOG_PORTS) logerror("%05X:read 80186 DMA%d upper source address\n", m_pc, (offset - 0x61) / 8);
which = (offset - 0x61) / 8;
return m_dma[which].source >> 16;
case 0x62:
case 0x6a:
- if (LOG_PORTS) logerror("%05X:read 80186 DMA%d lower dest address\n", pc(), (offset - 0x62) / 8);
+ if (LOG_PORTS) logerror("%05X:read 80186 DMA%d lower dest address\n", m_pc, (offset - 0x62) / 8);
which = (offset - 0x62) / 8;
return m_dma[which].dest;
case 0x63:
case 0x6b:
- if (LOG_PORTS) logerror("%05X:read 80186 DMA%d upper dest address\n", pc(), (offset - 0x63) / 8);
+ if (LOG_PORTS) logerror("%05X:read 80186 DMA%d upper dest address\n", m_pc, (offset - 0x63) / 8);
which = (offset - 0x63) / 8;
return m_dma[which].dest >> 16;
case 0x64:
case 0x6c:
- if (LOG_PORTS) logerror("%05X:read 80186 DMA%d transfer count\n", pc(), (offset - 0x64) / 8);
+ if (LOG_PORTS) logerror("%05X:read 80186 DMA%d transfer count\n", m_pc, (offset - 0x64) / 8);
which = (offset - 0x64) / 8;
return m_dma[which].count;
case 0x65:
case 0x6d:
- if (LOG_PORTS) logerror("%05X:read 80186 DMA%d control\n", pc(), (offset - 0x65) / 8);
+ if (LOG_PORTS) logerror("%05X:read 80186 DMA%d control\n", m_pc, (offset - 0x65) / 8);
which = (offset - 0x65) / 8;
return m_dma[which].control;
@@ -1491,7 +1491,7 @@ READ16_MEMBER(i80186_cpu_device::internal_port_r)
return m_reloc;
default:
- if (LOG_PORTS) logerror("%05X:read 80186 port %02X\n", pc(), offset);
+ if (LOG_PORTS) logerror("%05X:read 80186 port %02X\n", m_pc, offset);
break;
}
@@ -1511,21 +1511,21 @@ WRITE16_MEMBER(i80186_cpu_device::internal_port_w)
switch (offset)
{
case 0x11:
- if (LOG_PORTS) logerror("%05X:80186 EOI = %04X\n", pc(), data);
+ if (LOG_PORTS) logerror("%05X:80186 EOI = %04X\n", m_pc, data);
handle_eoi(0x8000);
update_interrupt_state();
break;
case 0x12:
- if (LOG_PORTS) logerror("%05X:ERROR - write to 80186 interrupt poll = %04X\n", pc(), data);
+ if (LOG_PORTS) logerror("%05X:ERROR - write to 80186 interrupt poll = %04X\n", m_pc, data);
break;
case 0x13:
- if (LOG_PORTS) logerror("%05X:ERROR - write to 80186 interrupt poll status = %04X\n", pc(), data);
+ if (LOG_PORTS) logerror("%05X:ERROR - write to 80186 interrupt poll status = %04X\n", m_pc, data);
break;
case 0x14:
- if (LOG_PORTS) logerror("%05X:80186 interrupt mask = %04X\n", pc(), data);
+ if (LOG_PORTS) logerror("%05X:80186 interrupt mask = %04X\n", m_pc, data);
m_intr.timer = (m_intr.timer & ~0x08) | ((data << 3) & 0x08);
m_intr.dma[0] = (m_intr.dma[0] & ~0x08) | ((data << 1) & 0x08);
m_intr.dma[1] = (m_intr.dma[1] & ~0x08) | ((data << 0) & 0x08);
@@ -1537,67 +1537,67 @@ WRITE16_MEMBER(i80186_cpu_device::internal_port_w)
break;
case 0x15:
- if (LOG_PORTS) logerror("%05X:80186 interrupt priority mask = %04X\n", pc(), data);
+ if (LOG_PORTS) logerror("%05X:80186 interrupt priority mask = %04X\n", m_pc, data);
m_intr.priority_mask = data & 0x0007;
update_interrupt_state();
break;
case 0x16:
- if (LOG_PORTS) logerror("%05X:80186 interrupt in-service = %04X\n", pc(), data);
+ if (LOG_PORTS) logerror("%05X:80186 interrupt in-service = %04X\n", m_pc, data);
m_intr.in_service = data & 0x00ff;
update_interrupt_state();
break;
case 0x17:
- if (LOG_PORTS) logerror("%05X:80186 interrupt request = %04X\n", pc(), data);
+ if (LOG_PORTS) logerror("%05X:80186 interrupt request = %04X\n", m_pc, data);
m_intr.request = (m_intr.request & ~0x000c) | (data & 0x000c);
update_interrupt_state();
break;
case 0x18:
- if (LOG_PORTS) logerror("%05X:WARNING - wrote to 80186 interrupt status = %04X\n", pc(), data);
+ if (LOG_PORTS) logerror("%05X:WARNING - wrote to 80186 interrupt status = %04X\n", m_pc, data);
m_intr.status = (m_intr.status & ~0x8007) | (data & 0x8007);
update_interrupt_state();
break;
case 0x19:
- if (LOG_PORTS) logerror("%05X:80186 timer interrupt contol = %04X\n", pc(), data);
+ if (LOG_PORTS) logerror("%05X:80186 timer interrupt contol = %04X\n", m_pc, data);
m_intr.timer = data & 0x000f;
update_interrupt_state();
break;
case 0x1a:
- if (LOG_PORTS) logerror("%05X:80186 DMA 0 interrupt control = %04X\n", pc(), data);
+ if (LOG_PORTS) logerror("%05X:80186 DMA 0 interrupt control = %04X\n", m_pc, data);
m_intr.dma[0] = data & 0x000f;
update_interrupt_state();
break;
case 0x1b:
- if (LOG_PORTS) logerror("%05X:80186 DMA 1 interrupt control = %04X\n", pc(), data);
+ if (LOG_PORTS) logerror("%05X:80186 DMA 1 interrupt control = %04X\n", m_pc, data);
m_intr.dma[1] = data & 0x000f;
update_interrupt_state();
break;
case 0x1c:
- if (LOG_PORTS) logerror("%05X:80186 INT 0 interrupt control = %04X\n", pc(), data);
+ if (LOG_PORTS) logerror("%05X:80186 INT 0 interrupt control = %04X\n", m_pc, data);
m_intr.ext[0] = data & 0x007f;
update_interrupt_state();
break;
case 0x1d:
- if (LOG_PORTS) logerror("%05X:80186 INT 1 interrupt control = %04X\n", pc(), data);
+ if (LOG_PORTS) logerror("%05X:80186 INT 1 interrupt control = %04X\n", m_pc, data);
m_intr.ext[1] = data & 0x007f;
update_interrupt_state();
break;
case 0x1e:
- if (LOG_PORTS) logerror("%05X:80186 INT 2 interrupt control = %04X\n", pc(), data);
+ if (LOG_PORTS) logerror("%05X:80186 INT 2 interrupt control = %04X\n", m_pc, data);
m_intr.ext[2] = data & 0x001f;
update_interrupt_state();
break;
case 0x1f:
- if (LOG_PORTS) logerror("%05X:80186 INT 3 interrupt control = %04X\n", pc(), data);
+ if (LOG_PORTS) logerror("%05X:80186 INT 3 interrupt control = %04X\n", m_pc, data);
m_intr.ext[3] = data & 0x001f;
update_interrupt_state();
break;
@@ -1605,7 +1605,7 @@ WRITE16_MEMBER(i80186_cpu_device::internal_port_w)
case 0x28:
case 0x2c:
case 0x30:
- if (LOG_PORTS) logerror("%05X:80186 Timer %d count = %04X\n", pc(), (offset - 0x28) / 4, data);
+ if (LOG_PORTS) logerror("%05X:80186 Timer %d count = %04X\n", m_pc, (offset - 0x28) / 4, data);
which = (offset - 0x28) / 4;
internal_timer_update(which, data, -1, -1, -1);
break;
@@ -1613,14 +1613,14 @@ WRITE16_MEMBER(i80186_cpu_device::internal_port_w)
case 0x29:
case 0x2d:
case 0x31:
- if (LOG_PORTS) logerror("%05X:80186 Timer %d max A = %04X\n", pc(), (offset - 0x29) / 4, data);
+ if (LOG_PORTS) logerror("%05X:80186 Timer %d max A = %04X\n", m_pc, (offset - 0x29) / 4, data);
which = (offset - 0x29) / 4;
internal_timer_update(which, -1, data, -1, -1);
break;
case 0x2a:
case 0x2e:
- if (LOG_PORTS) logerror("%05X:80186 Timer %d max B = %04X\n", pc(), (offset - 0x2a) / 4, data);
+ if (LOG_PORTS) logerror("%05X:80186 Timer %d max B = %04X\n", m_pc, (offset - 0x2a) / 4, data);
which = (offset - 0x2a) / 4;
internal_timer_update(which, -1, -1, data, -1);
break;
@@ -1628,79 +1628,79 @@ WRITE16_MEMBER(i80186_cpu_device::internal_port_w)
case 0x2b:
case 0x2f:
case 0x33:
- if (LOG_PORTS) logerror("%05X:80186 Timer %d control = %04X\n", pc(), (offset - 0x2b) / 4, data);
+ if (LOG_PORTS) logerror("%05X:80186 Timer %d control = %04X\n", m_pc, (offset - 0x2b) / 4, data);
which = (offset - 0x2b) / 4;
internal_timer_update(which, -1, -1, -1, data);
break;
case 0x50:
- if (LOG_PORTS) logerror("%05X:80186 upper chip select = %04X\n", pc(), data);
+ if (LOG_PORTS) logerror("%05X:80186 upper chip select = %04X\n", m_pc, data);
m_mem.upper = data | 0xc038;
m_out_chip_select_func(0, m_mem.upper, 0xffff);
break;
case 0x51:
- if (LOG_PORTS) logerror("%05X:80186 lower chip select = %04X\n", pc(), data);
+ if (LOG_PORTS) logerror("%05X:80186 lower chip select = %04X\n", m_pc, data);
m_mem.lower = (data & 0x3fff) | 0x0038;
m_out_chip_select_func(1, m_mem.lower, 0xffff);
break;
case 0x52:
- if (LOG_PORTS) logerror("%05X:80186 peripheral chip select = %04X\n", pc(), data);
+ if (LOG_PORTS) logerror("%05X:80186 peripheral chip select = %04X\n", m_pc, data);
m_mem.peripheral = data | 0x0038;
m_out_chip_select_func(2, m_mem.peripheral, 0xffff);
break;
case 0x53:
- if (LOG_PORTS) logerror("%05X:80186 middle chip select = %04X\n", pc(), data);
+ if (LOG_PORTS) logerror("%05X:80186 middle chip select = %04X\n", m_pc, data);
m_mem.middle = data | 0x01f8;
m_out_chip_select_func(3, m_mem.middle, 0xffff);
break;
case 0x54:
- if (LOG_PORTS) logerror("%05X:80186 middle P chip select = %04X\n", pc(), data);
+ if (LOG_PORTS) logerror("%05X:80186 middle P chip select = %04X\n", m_pc, data);
m_mem.middle_size = data | 0x8038;
m_out_chip_select_func(4, m_mem.middle_size, 0xffff);
break;
case 0x60:
case 0x68:
- if (LOG_PORTS) logerror("%05X:80186 DMA%d lower source address = %04X\n", pc(), (offset - 0x60) / 8, data);
+ if (LOG_PORTS) logerror("%05X:80186 DMA%d lower source address = %04X\n", m_pc, (offset - 0x60) / 8, data);
which = (offset - 0x60) / 8;
m_dma[which].source = (m_dma[which].source & ~0x0ffff) | (data & 0x0ffff);
break;
case 0x61:
case 0x69:
- if (LOG_PORTS) logerror("%05X:80186 DMA%d upper source address = %04X\n", pc(), (offset - 0x61) / 8, data);
+ if (LOG_PORTS) logerror("%05X:80186 DMA%d upper source address = %04X\n", m_pc, (offset - 0x61) / 8, data);
which = (offset - 0x61) / 8;
m_dma[which].source = (m_dma[which].source & ~0xf0000) | ((data << 16) & 0xf0000);
break;
case 0x62:
case 0x6a:
- if (LOG_PORTS) logerror("%05X:80186 DMA%d lower dest address = %04X\n", pc(), (offset - 0x62) / 8, data);
+ if (LOG_PORTS) logerror("%05X:80186 DMA%d lower dest address = %04X\n", m_pc, (offset - 0x62) / 8, data);
which = (offset - 0x62) / 8;
m_dma[which].dest = (m_dma[which].dest & ~0x0ffff) | (data & 0x0ffff);
break;
case 0x63:
case 0x6b:
- if (LOG_PORTS) logerror("%05X:80186 DMA%d upper dest address = %04X\n", pc(), (offset - 0x63) / 8, data);
+ if (LOG_PORTS) logerror("%05X:80186 DMA%d upper dest address = %04X\n", m_pc, (offset - 0x63) / 8, data);
which = (offset - 0x63) / 8;
m_dma[which].dest = (m_dma[which].dest & ~0xf0000) | ((data << 16) & 0xf0000);
break;
case 0x64:
case 0x6c:
- if (LOG_PORTS) logerror("%05X:80186 DMA%d transfer count = %04X\n", pc(), (offset - 0x64) / 8, data);
+ if (LOG_PORTS) logerror("%05X:80186 DMA%d transfer count = %04X\n", m_pc, (offset - 0x64) / 8, data);
which = (offset - 0x64) / 8;
m_dma[which].count = data;
break;
case 0x65:
case 0x6d:
- if (LOG_PORTS) logerror("%05X:80186 DMA%d control = %04X\n", pc(), (offset - 0x65) / 8, data);
+ if (LOG_PORTS) logerror("%05X:80186 DMA%d control = %04X\n", m_pc, (offset - 0x65) / 8, data);
which = (offset - 0x65) / 8;
update_dma_control(which, data);
if((m_dma[which].control & (SYNC_MASK | ST_STOP | TIMER_DRQ)) == ST_STOP)
@@ -1712,7 +1712,7 @@ WRITE16_MEMBER(i80186_cpu_device::internal_port_w)
break;
case 0x7f:
- if (LOG_PORTS) logerror("%05X:80186 relocation register = %04X\n", pc(), data);
+ if (LOG_PORTS) logerror("%05X:80186 relocation register = %04X\n", m_pc, data);
if ((data & 0x1fff) != (m_reloc & 0x1fff))
{
uint32_t newmap = (data & 0xfff) << 8;
@@ -1727,7 +1727,7 @@ WRITE16_MEMBER(i80186_cpu_device::internal_port_w)
break;
default:
- if (LOG_PORTS) logerror("%05X:80186 port %02X = %04X\n", pc(), offset, data);
+ if (LOG_PORTS) logerror("%05X:80186 port %02X = %04X\n", m_pc, offset, data);
break;
}
}
diff --git a/src/devices/cpu/i86/i186.h b/src/devices/cpu/i86/i186.h
index 81990a481f6..0144b7ffecb 100644
--- a/src/devices/cpu/i86/i186.h
+++ b/src/devices/cpu/i86/i186.h
@@ -47,7 +47,7 @@ protected:
virtual uint32_t execute_input_lines() const override { return 1; }
virtual uint8_t fetch_op() override;
virtual uint8_t fetch() override;
- uint32_t pc() { return m_pc = (m_sregs[CS] << 4) + m_ip; }
+ uint32_t update_pc() { return m_pc = (m_sregs[CS] << 4) + m_ip; }
virtual uint8_t read_port_byte(uint16_t port) override;
virtual uint16_t read_port_word(uint16_t port) override;
diff --git a/src/devices/cpu/i86/i286.cpp b/src/devices/cpu/i86/i286.cpp
index c3418b16efc..e3eeca0d53b 100644
--- a/src/devices/cpu/i86/i286.cpp
+++ b/src/devices/cpu/i86/i286.cpp
@@ -592,7 +592,7 @@ void i80286_cpu_device::switch_task(uint16_t ntask, int type)
uint8_t r, lr;
uint32_t naddr, oaddr, ldtaddr;
int i;
- logerror("i286: %06x This program uses TSSs, how rare. Please report this to the developers.\n", pc());
+ logerror("i286: %06x This program uses TSSs, how rare. Please report this to the developers.\n", m_pc);
if(TBL(ntask))
throw TRAP(FAULT_TS, IDXTBL(ntask));
@@ -1026,7 +1026,7 @@ uint8_t i80286_cpu_device::fetch_op()
if(m_ip > m_limit[CS])
throw TRAP(FAULT_GP, 0);
- data = m_direct_opcodes->read_byte( pc() & m_amask, m_fetch_xor );
+ data = m_direct_opcodes->read_byte( update_pc() & m_amask, m_fetch_xor );
m_ip++;
return data;
}
@@ -1037,7 +1037,7 @@ uint8_t i80286_cpu_device::fetch()
if(m_ip > m_limit[CS])
throw TRAP(FAULT_GP, 0);
- data = m_direct_opcodes->read_byte( pc() & m_amask, m_fetch_xor );
+ data = m_direct_opcodes->read_byte( update_pc() & m_amask, m_fetch_xor );
m_ip++;
return data;
}
@@ -1112,7 +1112,7 @@ void i80286_cpu_device::execute_run()
}
}
- debugger_instruction_hook( this, pc() & m_amask );
+ debugger_instruction_hook( this, update_pc() & m_amask );
uint8_t op = fetch_op();
@@ -1428,7 +1428,7 @@ reg.base = BASE(desc); (void)(r); reg.limit = LIMIT(desc); }
if (tmp<low || tmp>high)
interrupt(5);
CLK(BOUND);
- logerror("%06x: bound %04x high %04x low %04x tmp\n", pc(), high, low, tmp);
+ logerror("%06x: bound %04x high %04x low %04x tmp\n", m_pc, high, low, tmp);
}
break;
@@ -1505,7 +1505,7 @@ reg.base = BASE(desc); (void)(r); reg.limit = LIMIT(desc); }
m_modrm = fetch();
if((m_modrm & 0x38) > 0x18)
{
- logerror("%06x: Mov Sreg - Invalid register\n", pc());
+ logerror("%06x: Mov Sreg - Invalid register\n", m_pc);
throw TRAP(FAULT_UD, (uint16_t)-1);
}
PutRMWord(m_sregs[(m_modrm & 0x38) >> 3]);
@@ -1529,7 +1529,7 @@ reg.base = BASE(desc); (void)(r); reg.limit = LIMIT(desc); }
data_descriptor(DS, m_src);
break;
default:
- logerror("%06x: Mov Sreg - Invalid register\n", pc());
+ logerror("%06x: Mov Sreg - Invalid register\n", m_pc);
throw TRAP(FAULT_UD, (uint16_t)-1);
}
break;
@@ -1792,7 +1792,7 @@ reg.base = BASE(desc); (void)(r); reg.limit = LIMIT(desc); }
case 0xf0: // i_lock
if(PM && (CPL > m_IOPL))
throw TRAP(FAULT_GP, 0);
- logerror("%06x: Warning - BUSLOCK\n", pc());
+ logerror("%06x: Warning - BUSLOCK\n", m_pc);
m_no_interrupt = 1;
CLK(NOP);
break;
@@ -1869,7 +1869,7 @@ reg.base = BASE(desc); (void)(r); reg.limit = LIMIT(desc); }
CLKM(PUSH_R16,PUSH_M16);
break;
default:
- logerror("%06x: FF Pre with unimplemented mod\n", pc());
+ logerror("%06x: FF Pre with unimplemented mod\n", m_pc);
throw TRAP(FAULT_UD,(uint16_t)-1);
}
}
@@ -1905,7 +1905,7 @@ reg.base = BASE(desc); (void)(r); reg.limit = LIMIT(desc); }
if(!common_op(op))
{
m_icount -= 10; // UD fault timing?
- logerror("%06x: Invalid Opcode %02x\n", pc(), op);
+ logerror("%06x: Invalid Opcode %02x\n", m_pc, op);
m_ip = m_prev_ip;
throw TRAP(FAULT_UD, (uint16_t)-1);
}
diff --git a/src/devices/cpu/i86/i286.h b/src/devices/cpu/i86/i286.h
index 6d880ccad80..5499107f308 100644
--- a/src/devices/cpu/i86/i286.h
+++ b/src/devices/cpu/i86/i286.h
@@ -112,7 +112,7 @@ private:
void switch_task(uint16_t ntask, int type);
void trap(uint32_t error);
int verify(uint16_t selector, int operation, uint8_t rights, bool valid);
- uint32_t pc() { return m_pc = m_base[CS] + m_ip; }
+ uint32_t update_pc() { return m_pc = m_base[CS] + m_ip; }
int m_trap_level;
uint16_t m_msw;
diff --git a/src/devices/cpu/i86/i86.cpp b/src/devices/cpu/i86/i86.cpp
index 5a4b3a2208a..bd9c15324cb 100644
--- a/src/devices/cpu/i86/i86.cpp
+++ b/src/devices/cpu/i86/i86.cpp
@@ -139,7 +139,7 @@ device_memory_interface::space_config_vector i8086_cpu_device::memory_space_conf
uint8_t i8086_cpu_device::fetch_op()
{
uint8_t data;
- data = m_direct_opcodes->read_byte(pc(), m_fetch_xor);
+ data = m_direct_opcodes->read_byte(update_pc(), m_fetch_xor);
m_ip++;
return data;
}
@@ -147,7 +147,7 @@ uint8_t i8086_cpu_device::fetch_op()
uint8_t i8086_cpu_device::fetch()
{
uint8_t data;
- data = m_direct_opcodes->read_byte(pc(), m_fetch_xor);
+ data = m_direct_opcodes->read_byte(update_pc(), m_fetch_xor);
m_ip++;
return data;
}
@@ -210,7 +210,7 @@ void i8086_cpu_device::execute_run()
if (!m_seg_prefix)
{
- debugger_instruction_hook( this, pc() );
+ debugger_instruction_hook( this, update_pc() );
}
uint8_t op = fetch_op();
@@ -284,7 +284,7 @@ void i8086_cpu_device::execute_run()
case 0xdd:
case 0xde:
case 0xdf:
- m_esc_opcode_handler(pc() - 1);
+ m_esc_opcode_handler(m_pc - 1);
m_modrm = fetch();
if(m_modrm < 0xc0)
m_esc_data_handler(get_ea(1, I8086_READ));
@@ -297,7 +297,7 @@ void i8086_cpu_device::execute_run()
if(!common_op(op))
{
m_icount -= 10;
- logerror("%06x: Invalid Opcode %02x\n", pc(), op);
+ logerror("%06x: Invalid Opcode %02x\n", m_pc, op);
break;
}
break;
@@ -2100,7 +2100,7 @@ bool i8086_common_cpu_device::common_op(uint8_t op)
case 0xf0: // i_lock
case 0xf1: // 0xf1 is 0xf0; verified on real CPU
- logerror("%06x: Warning - BUSLOCK\n", pc());
+ logerror("%06x: Warning - BUSLOCK\n", m_pc);
m_lock = true;
m_no_interrupt = 1;
CLK(NOP);
@@ -2125,7 +2125,7 @@ bool i8086_common_cpu_device::common_op(uint8_t op)
case 0xae: CLK(OVERRIDE); if (c) do { i_scasb(); c--; } while (c>0 && !ZF && m_icount>0); m_regs.w[CX]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
case 0xaf: CLK(OVERRIDE); if (c) do { i_scasw(); c--; } while (c>0 && !ZF && m_icount>0); m_regs.w[CX]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
default:
- logerror("%06x: REPNE invalid\n", pc());
+ logerror("%06x: REPNE invalid\n", m_pc);
// Decrement IP so the normal instruction will be executed next
m_ip--;
invalid = true;
@@ -2158,7 +2158,7 @@ bool i8086_common_cpu_device::common_op(uint8_t op)
case 0xae: CLK(OVERRIDE); if (c) do { i_scasb(); c--; } while (c>0 && ZF && m_icount>0); m_regs.w[CX]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
case 0xaf: CLK(OVERRIDE); if (c) do { i_scasw(); c--; } while (c>0 && ZF && m_icount>0); m_regs.w[CX]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
default:
- logerror("%06x: REPE invalid\n", pc());
+ logerror("%06x: REPE invalid\n", m_pc);
// Decrement IP so the normal instruction will be executed next
m_ip--;
invalid = true;
@@ -2173,7 +2173,7 @@ bool i8086_common_cpu_device::common_op(uint8_t op)
break;
case 0xf4: // i_hlt
- //logerror("%s: %06x: HALT\n", tag(), pc());
+ //logerror("%s: %06x: HALT\n", tag(), m_pc);
m_icount = 0;
m_halt = true;
break;
@@ -2418,7 +2418,7 @@ bool i8086_common_cpu_device::common_op(uint8_t op)
CLKM(INCDEC_R8,INCDEC_M8);
break;
default:
- logerror("%06x: FE Pre with unimplemented mod\n", pc());
+ logerror("%06x: FE Pre with unimplemented mod\n", m_pc);
break;
}
}
@@ -2474,7 +2474,7 @@ bool i8086_common_cpu_device::common_op(uint8_t op)
CLKM(PUSH_R16,PUSH_M16);
break;
default:
- logerror("%06x: FF Pre with unimplemented mod\n", pc());
+ logerror("%06x: FF Pre with unimplemented mod\n", m_pc);
break;
}
}
diff --git a/src/devices/cpu/i86/i86.h b/src/devices/cpu/i86/i86.h
index dc280d204af..5e4fcc170fe 100644
--- a/src/devices/cpu/i86/i86.h
+++ b/src/devices/cpu/i86/i86.h
@@ -390,7 +390,6 @@ protected:
virtual uint32_t execute_input_lines() const override { return 1; }
virtual uint8_t fetch_op() override;
virtual uint8_t fetch() override;
- uint32_t pc() { return m_pc = (m_sregs[CS] << 4) + m_ip; }
address_space_config m_program_config;
address_space_config m_opcodes_config;
@@ -402,6 +401,9 @@ protected:
devcb_write_line m_out_if_func;
devcb_write32 m_esc_opcode_handler;
devcb_write32 m_esc_data_handler;
+
+protected:
+ uint32_t update_pc() { return m_pc = (m_sregs[CS] << 4) + m_ip; }
};
class i8088_cpu_device : public i8086_cpu_device
diff --git a/src/mame/audio/mw8080bw.cpp b/src/mame/audio/mw8080bw.cpp
index 970ddb9938b..526b614e1d6 100644
--- a/src/mame/audio/mw8080bw.cpp
+++ b/src/mame/audio/mw8080bw.cpp
@@ -248,7 +248,7 @@ WRITE8_MEMBER(mw8080bw_state::gunfight_audio_w)
break;
default:
- logerror("%04x: Unknown sh port write %02x\n", space.device().safe_pc(), data);
+ logerror("%04x: Unknown sh port write %02x\n", m_maincpu->pc(), data);
break;
}
}
diff --git a/src/mame/includes/rmnimbus.h b/src/mame/includes/rmnimbus.h
index 88ba462dd94..7e3e474f1a4 100644
--- a/src/mame/includes/rmnimbus.h
+++ b/src/mame/includes/rmnimbus.h
@@ -13,6 +13,7 @@
#pragma once
#include "cpu/i86/i186.h"
+#include "cpu/mcs51/mcs51.h"
#include "machine/z80dart.h"
#include "machine/wd_fdc.h"
#include "bus/scsi/scsi.h"
@@ -58,7 +59,8 @@ class rmnimbus_state : public driver_device
public:
rmnimbus_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu"),
+ m_maincpu(*this, MAINCPU_TAG),
+ m_iocpu(*this, IOCPU_TAG),
m_msm(*this, MSM5205_TAG),
m_scsibus(*this, SCSIBUS_TAG),
m_ram(*this, RAM_TAG),
@@ -83,6 +85,7 @@ public:
static constexpr feature_type imperfect_features() { return feature::MOUSE; }
required_device<i80186_cpu_device> m_maincpu;
+ required_device<i8031_device> m_iocpu;
required_device<msm5205_device> m_msm;
required_device<scsi_port_device> m_scsibus;
required_device<ram_device> m_ram;
diff --git a/src/mame/machine/decocass.cpp b/src/mame/machine/decocass.cpp
index 435e3957277..653c967b014 100644
--- a/src/mame/machine/decocass.cpp
+++ b/src/mame/machine/decocass.cpp
@@ -257,7 +257,7 @@ READ8_MEMBER(decocass_type1_state::decocass_type1_r)
data = (BIT(data, 0) << 0) | (BIT(data, 1) << 1) | 0x7c;
LOG(4,("%10s 6502-PC: %04x decocass_type1_r(%02x): $%02x <- (%s %s)\n",
- machine().time().as_string(6), space.device().safe_pcbase(), offset, data,
+ machine().time().as_string(6), m_maincpu->pcbase(), offset, data,
(data & 1) ? "OBF" : "-",
(data & 2) ? "IBF" : "-"));
}
@@ -310,7 +310,7 @@ READ8_MEMBER(decocass_type1_state::decocass_type1_r)
}
LOG(3,("%10s 6502-PC: %04x decocass_type1_r(%02x): $%02x\n",
- machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
+ machine().time().as_string(6), m_maincpu->pcbase(), offset, data));
m_latch1 = save; /* latch the data for the next A0 == 0 read */
}
@@ -518,7 +518,7 @@ READ8_MEMBER(decocass_type2_state::decocass_type2_r)
{
uint8_t *prom = memregion("dongle")->base();
data = prom[256 * m_type2_d2_latch + m_type2_promaddr];
- LOG(3,("%10s 6502-PC: %04x decocass_type2_r(%02x): $%02x <- prom[%03x]\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data, 256 * m_type2_d2_latch + m_type2_promaddr));
+ LOG(3,("%10s 6502-PC: %04x decocass_type2_r(%02x): $%02x <- prom[%03x]\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, 256 * m_type2_d2_latch + m_type2_promaddr));
}
else
{
@@ -532,7 +532,7 @@ READ8_MEMBER(decocass_type2_state::decocass_type2_r)
else
data = offset & 0xff;
- LOG(3,("%10s 6502-PC: %04x decocass_type2_r(%02x): $%02x <- 8041-%s\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data, offset & 1 ? "STATUS" : "DATA"));
+ LOG(3,("%10s 6502-PC: %04x decocass_type2_r(%02x): $%02x <- 8041-%s\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, offset & 1 ? "STATUS" : "DATA"));
}
return data;
}
@@ -543,18 +543,18 @@ WRITE8_MEMBER(decocass_type2_state::decocass_type2_w)
{
if (1 == (offset & 1))
{
- LOG(4,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> set PROM+D2 latch", machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
+ LOG(4,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> set PROM+D2 latch", machine().time().as_string(6), m_maincpu->pcbase(), offset, data));
}
else
{
m_type2_promaddr = data;
- LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> set PROM addr $%02x\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data, m_type2_promaddr));
+ LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> set PROM addr $%02x\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, m_type2_promaddr));
return;
}
}
else
{
- LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s ", machine().time().as_string(6), space.device().safe_pcbase(), offset, data, offset & 1 ? "8041-CMND" : "8041 DATA"));
+ LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s ", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, offset & 1 ? "8041-CMND" : "8041 DATA"));
}
if (1 == (offset & 1))
{
@@ -600,7 +600,7 @@ READ8_MEMBER(decocass_type3_state::decocass_type3_r)
{
uint8_t *prom = memregion("dongle")->base();
data = prom[m_type3_ctrs];
- LOG(3,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x <- prom[$%03x]\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data, m_type3_ctrs));
+ LOG(3,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x <- prom[$%03x]\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, m_type3_ctrs));
if (++m_type3_ctrs == 4096)
m_type3_ctrs = 0;
}
@@ -609,12 +609,12 @@ READ8_MEMBER(decocass_type3_state::decocass_type3_r)
if (0 == (offset & E5XX_MASK))
{
data = m_mcu->upi41_master_r(space,1);
- LOG(4,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x <- 8041 STATUS\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
+ LOG(4,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x <- 8041 STATUS\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data));
}
else
{
data = 0xff; /* open data bus? */
- LOG(4,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x <- open bus\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
+ LOG(4,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x <- open bus\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data));
}
}
}
@@ -623,7 +623,7 @@ READ8_MEMBER(decocass_type3_state::decocass_type3_r)
if (1 == m_type3_pal_19)
{
save = data = 0xff; /* open data bus? */
- LOG(3,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x <- open bus", machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
+ LOG(3,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x <- open bus", machine().time().as_string(6), m_maincpu->pcbase(), offset, data));
}
else
{
@@ -765,7 +765,7 @@ READ8_MEMBER(decocass_type3_state::decocass_type3_r)
(BIT(save, 7) << 7);
}
m_type3_d0_latch = save & 1;
- LOG(3,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x '%c' <- 8041-DATA\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data, (data >= 32) ? data : '.'));
+ LOG(3,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x '%c' <- 8041-DATA\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, (data >= 32) ? data : '.'));
}
else
{
@@ -779,7 +779,7 @@ READ8_MEMBER(decocass_type3_state::decocass_type3_r)
(BIT(save, 5) << 5) |
(BIT(save, 6) << 7) |
(BIT(save, 7) << 6);
- LOG(3,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data, (data >= 32) ? data : '.'));
+ LOG(3,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, (data >= 32) ? data : '.'));
m_type3_d0_latch = save & 1;
}
}
@@ -795,7 +795,7 @@ WRITE8_MEMBER(decocass_type3_state::decocass_type3_w)
if (1 == m_type3_pal_19)
{
m_type3_ctrs = data << 4;
- LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data, "LDCTRS"));
+ LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, "LDCTRS"));
return;
}
else
@@ -807,11 +807,11 @@ WRITE8_MEMBER(decocass_type3_state::decocass_type3_w)
if (1 == m_type3_pal_19)
{
/* write nowhere?? */
- LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data, "nowhere?"));
+ LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, "nowhere?"));
return;
}
}
- LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA"));
+ LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA"));
m_mcu->upi41_master_w(space,offset, data);
}
@@ -837,12 +837,12 @@ READ8_MEMBER(decocass_type4_state::decocass_type4_r)
if (0 == (offset & E5XX_MASK))
{
data = m_mcu->upi41_master_r(space,1);
- LOG(4,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x <- 8041 STATUS\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
+ LOG(4,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x <- 8041 STATUS\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data));
}
else
{
data = 0xff; /* open data bus? */
- LOG(4,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x <- open bus\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
+ LOG(4,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x <- open bus\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data));
}
}
else
@@ -852,7 +852,7 @@ READ8_MEMBER(decocass_type4_state::decocass_type4_r)
uint8_t *prom = machine().root_device().memregion("dongle")->base();
data = prom[m_type4_ctrs];
- LOG(3,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x '%c' <- PROM[%04x]\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data, (data >= 32) ? data : '.', m_type4_ctrs));
+ LOG(3,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x '%c' <- PROM[%04x]\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, (data >= 32) ? data : '.', m_type4_ctrs));
m_type4_ctrs = (m_type4_ctrs + 1) & 0x7fff;
}
else
@@ -860,12 +860,12 @@ READ8_MEMBER(decocass_type4_state::decocass_type4_r)
if (0 == (offset & E5XX_MASK))
{
data = m_mcu->upi41_master_r(space,0);
- LOG(3,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data, (data >= 32) ? data : '.'));
+ LOG(3,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, (data >= 32) ? data : '.'));
}
else
{
data = 0xff; /* open data bus? */
- LOG(4,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x <- open bus\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
+ LOG(4,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x <- open bus\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data));
}
}
}
@@ -880,7 +880,7 @@ WRITE8_MEMBER(decocass_type4_state::decocass_type4_w)
if (1 == m_type4_latch)
{
m_type4_ctrs = (m_type4_ctrs & 0x00ff) | ((data & 0x7f) << 8);
- LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> CTRS MSB (%04x)\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data, m_type4_ctrs));
+ LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> CTRS MSB (%04x)\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, m_type4_ctrs));
return;
}
else
@@ -894,11 +894,11 @@ WRITE8_MEMBER(decocass_type4_state::decocass_type4_w)
if (m_type4_latch)
{
m_type4_ctrs = (m_type4_ctrs & 0xff00) | data;
- LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> CTRS LSB (%04x)\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data, m_type4_ctrs));
+ LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> CTRS LSB (%04x)\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, m_type4_ctrs));
return;
}
}
- LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA"));
+ LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA"));
m_mcu->upi41_master_w(space,offset, data);
}
@@ -920,12 +920,12 @@ READ8_MEMBER(decocass_type5_state::decocass_type5_r)
if (0 == (offset & E5XX_MASK))
{
data = m_mcu->upi41_master_r(space,1);
- LOG(4,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x <- 8041 STATUS\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
+ LOG(4,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x <- 8041 STATUS\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data));
}
else
{
data = 0xff; /* open data bus? */
- LOG(4,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x <- open bus\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
+ LOG(4,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x <- open bus\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data));
}
}
else
@@ -933,19 +933,19 @@ READ8_MEMBER(decocass_type5_state::decocass_type5_r)
if (m_type5_latch)
{
data = 0x55; /* Only a fixed value? It looks like this is all we need to do */
- LOG(3,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x '%c' <- fixed value???\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data, (data >= 32) ? data : '.'));
+ LOG(3,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x '%c' <- fixed value???\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, (data >= 32) ? data : '.'));
}
else
{
if (0 == (offset & E5XX_MASK))
{
data = m_mcu->upi41_master_r(space,0);
- LOG(3,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data, (data >= 32) ? data : '.'));
+ LOG(3,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, (data >= 32) ? data : '.'));
}
else
{
data = 0xff; /* open data bus? */
- LOG(4,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x <- open bus\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
+ LOG(4,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x <- open bus\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data));
}
}
}
@@ -959,7 +959,7 @@ WRITE8_MEMBER(decocass_type5_state::decocass_type5_w)
{
if (1 == m_type5_latch)
{
- LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data, "latch #2??"));
+ LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, "latch #2??"));
return;
}
else
@@ -971,11 +971,11 @@ WRITE8_MEMBER(decocass_type5_state::decocass_type5_w)
if (m_type5_latch)
{
/* write nowhere?? */
- LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data, "nowhere?"));
+ LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, "nowhere?"));
return;
}
}
- LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA"));
+ LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA"));
m_mcu->upi41_master_w(space,offset, data);
}
@@ -996,12 +996,12 @@ READ8_MEMBER(decocass_nodong_state::decocass_nodong_r)
if (0 == (offset & E5XX_MASK))
{
data = m_mcu->upi41_master_r(space,1);
- LOG(4,("%10s 6502-PC: %04x decocass_nodong_r(%02x): $%02x <- 8041 STATUS\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
+ LOG(4,("%10s 6502-PC: %04x decocass_nodong_r(%02x): $%02x <- 8041 STATUS\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data));
}
else
{
data = 0xff; /* open data bus? */
- LOG(4,("%10s 6502-PC: %04x decocass_nodong_r(%02x): $%02x <- open bus\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
+ LOG(4,("%10s 6502-PC: %04x decocass_nodong_r(%02x): $%02x <- open bus\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data));
}
}
else
@@ -1009,12 +1009,12 @@ READ8_MEMBER(decocass_nodong_state::decocass_nodong_r)
if (0 == (offset & E5XX_MASK))
{
data = m_mcu->upi41_master_r(space,0);
- LOG(3,("%10s 6502-PC: %04x decocass_nodong_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data, (data >= 32) ? data : '.'));
+ LOG(3,("%10s 6502-PC: %04x decocass_nodong_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, (data >= 32) ? data : '.'));
}
else
{
data = 0xff; /* open data bus? */
- LOG(4,("%10s 6502-PC: %04x decocass_nodong_r(%02x): $%02x <- open bus\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
+ LOG(4,("%10s 6502-PC: %04x decocass_nodong_r(%02x): $%02x <- open bus\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data));
}
}
@@ -1040,12 +1040,12 @@ READ8_MEMBER(decocass_widel_state::decocass_widel_r)
if (m_widel_latch && !machine().side_effect_disabled())
m_widel_ctrs = (m_widel_ctrs + 0x100) & 0xfffff;
data = m_mcu->upi41_master_r(space,1);
- LOG(4,("%10s 6502-PC: %04x decocass_widel_r(%02x): $%02x <- 8041 STATUS\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
+ LOG(4,("%10s 6502-PC: %04x decocass_widel_r(%02x): $%02x <- 8041 STATUS\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data));
}
else
{
data = 0xff; /* open data bus? */
- LOG(4,("%10s 6502-PC: %04x decocass_widel_r(%02x): $%02x <- open bus\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
+ LOG(4,("%10s 6502-PC: %04x decocass_widel_r(%02x): $%02x <- open bus\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data));
}
}
else
@@ -1055,7 +1055,7 @@ READ8_MEMBER(decocass_widel_state::decocass_widel_r)
uint8_t *prom = machine().root_device().memregion("dongle")->base();
data = prom[m_widel_ctrs];
- LOG(3,("%10s 6502-PC: %04x decocass_widel_r(%02x): $%02x '%c' <- PROM[%04x]\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data, (data >= 32) ? data : '.', m_widel_ctrs));
+ LOG(3,("%10s 6502-PC: %04x decocass_widel_r(%02x): $%02x '%c' <- PROM[%04x]\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, (data >= 32) ? data : '.', m_widel_ctrs));
if (!machine().side_effect_disabled())
m_widel_ctrs = (m_widel_ctrs + 1) & 0xfffff;
@@ -1065,12 +1065,12 @@ READ8_MEMBER(decocass_widel_state::decocass_widel_r)
if (0 == (offset & E5XX_MASK))
{
data = m_mcu->upi41_master_r(space,0);
- LOG(3,("%10s 6502-PC: %04x decocass_widel_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data, (data >= 32) ? data : '.'));
+ LOG(3,("%10s 6502-PC: %04x decocass_widel_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, (data >= 32) ? data : '.'));
}
else
{
data = 0xff; /* open data bus? */
- LOG(4,("%10s 6502-PC: %04x decocass_widel_r(%02x): $%02x <- open bus\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data));
+ LOG(4,("%10s 6502-PC: %04x decocass_widel_r(%02x): $%02x <- open bus\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data));
}
}
}
@@ -1089,7 +1089,7 @@ WRITE8_MEMBER(decocass_widel_state::decocass_widel_w)
// Counterintuitive though it may seem, the value written is probably just ignored.
// Treasure Island depends on this clearing the lower bits as well.
m_widel_ctrs = 0;
- LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> CTRS MSB (%04x)\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data, m_widel_ctrs));
+ LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> CTRS MSB (%04x)\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, m_widel_ctrs));
return;
}
else
@@ -1103,11 +1103,11 @@ WRITE8_MEMBER(decocass_widel_state::decocass_widel_w)
if (m_widel_latch)
{
m_widel_ctrs = (m_widel_ctrs & 0xfff00) | data;
- LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> CTRS LSB (%04x)\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data, m_widel_ctrs));
+ LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> CTRS LSB (%04x)\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, m_widel_ctrs));
return;
}
}
- LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", machine().time().as_string(6), space.device().safe_pcbase(), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA"));
+ LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", machine().time().as_string(6), m_maincpu->pcbase(), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA"));
m_mcu->upi41_master_w(space,offset, data);
}
@@ -1642,7 +1642,7 @@ WRITE8_MEMBER(decocass_state::i8041_p1_w)
{
LOG(4,("%10s 8041-PC: %03x i8041_p1_w: $%02x (%s%s%s%s%s%s%s%s)\n",
machine().time().as_string(6),
- space.device().safe_pcbase(),
+ m_maincpu->pcbase(),
data,
data & 0x01 ? "" : "DATA-WRT",
data & 0x02 ? "" : " DATA-CLK",
@@ -1678,7 +1678,7 @@ READ8_MEMBER(decocass_state::i8041_p1_r)
{
LOG(4,("%10s 8041-PC: %03x i8041_p1_r: $%02x (%s%s%s%s%s%s%s%s)\n",
machine().time().as_string(6),
- space.device().safe_pcbase(),
+ m_maincpu->pcbase(),
data,
data & 0x01 ? "" : "DATA-WRT",
data & 0x02 ? "" : " DATA-CLK",
@@ -1699,7 +1699,7 @@ WRITE8_MEMBER(decocass_state::i8041_p2_w)
{
LOG(4,("%10s 8041-PC: %03x i8041_p2_w: $%02x (%s%s%s%s%s%s%s%s)\n",
machine().time().as_string(6),
- space.device().safe_pcbase(),
+ m_maincpu->pcbase(),
data,
data & 0x01 ? "" : "FNO/",
data & 0x02 ? "" : " EOT/",
@@ -1724,7 +1724,7 @@ READ8_MEMBER(decocass_state::i8041_p2_r)
{
LOG(4,("%10s 8041-PC: %03x i8041_p2_r: $%02x (%s%s%s%s%s%s%s%s)\n",
machine().time().as_string(6),
- space.device().safe_pcbase(),
+ m_maincpu->pcbase(),
data,
data & 0x01 ? "" : "FNO/",
data & 0x02 ? "" : " EOT/",
diff --git a/src/mame/machine/harddriv.cpp b/src/mame/machine/harddriv.cpp
index 3a1756aecb5..a6199aa9679 100644
--- a/src/mame/machine/harddriv.cpp
+++ b/src/mame/machine/harddriv.cpp
@@ -521,7 +521,7 @@ WRITE16_MEMBER( harddriv_state::hdgsp_io_w )
{
m_last_gsp_shiftreg = new_shiftreg;
if (new_shiftreg)
- space.device().execute().yield();
+ m_gsp->yield();
}
}
@@ -611,12 +611,12 @@ WRITE16_MEMBER( harddriv_state::hd68k_adsp_data_w )
/* any write to $1FFF is taken to be a trigger; synchronize the CPUs */
if (offset == 0x1fff)
{
- logerror("%06X:ADSP sync address written (%04X)\n", space.device().safe_pcbase(), data);
+ logerror("%06X:ADSP sync address written (%04X)\n", m_maincpu->pcbase(), data);
machine().scheduler().synchronize();
m_adsp->signal_interrupt_trigger();
}
else
- logerror("%06X:ADSP W@%04X (%04X)\n", space.device().safe_pcbase(), offset, data);
+ logerror("%06X:ADSP W@%04X (%04X)\n", m_maincpu->pcbase(), offset, data);
}
@@ -730,7 +730,7 @@ WRITE16_MEMBER( harddriv_state::hd68k_adsp_control_w )
/* a yield in this case is not enough */
/* we would need to increase the interleaving otherwise */
/* note that this only affects the test mode */
- space.device().execute().spin();
+ m_maincpu->spin();
}
break;
@@ -747,14 +747,14 @@ WRITE16_MEMBER( harddriv_state::hd68k_adsp_control_w )
/* a yield in this case is not enough */
/* we would need to increase the interleaving otherwise */
/* note that this only affects the test mode */
- space.device().execute().spin();
+ m_maincpu->spin();
}
break;
case 7:
logerror("ADSP reset = %d\n", val);
m_adsp->set_input_line(INPUT_LINE_RESET, val ? CLEAR_LINE : ASSERT_LINE);
- space.device().execute().yield();
+ m_maincpu->yield();
break;
default:
@@ -766,7 +766,7 @@ WRITE16_MEMBER( harddriv_state::hd68k_adsp_control_w )
WRITE16_MEMBER( harddriv_state::hd68k_adsp_irq_clear_w )
{
- logerror("%06X:68k clears ADSP interrupt\n", space.device().safe_pcbase());
+ logerror("%06X:68k clears ADSP interrupt\n", m_maincpu->pcbase());
m_adsp_irq_state = 0;
update_interrupts();
}
@@ -777,7 +777,7 @@ READ16_MEMBER( harddriv_state::hd68k_adsp_irq_state_r )
int result = 0xfffd;
if (m_adsp_xflag) result ^= 2;
if (m_adsp_irq_state) result ^= 1;
- logerror("%06X:68k reads ADSP interrupt state = %04x\n", space.device().safe_pcbase(), result);
+ logerror("%06X:68k reads ADSP interrupt state = %04x\n", m_maincpu->pcbase(), result);
return result;
}
@@ -809,7 +809,7 @@ READ16_MEMBER( harddriv_state::hdadsp_special_r )
break;
default:
- logerror("%04X:hdadsp_special_r(%04X)\n", space.device().safe_pcbase(), offset);
+ logerror("%04X:hdadsp_special_r(%04X)\n", m_adsp->pcbase(), offset);
break;
}
return 0;
@@ -837,7 +837,7 @@ WRITE16_MEMBER( harddriv_state::hdadsp_special_w )
break;
case 6: /* /GINT */
- logerror("%04X:ADSP signals interrupt\n", space.device().safe_pcbase());
+ logerror("%04X:ADSP signals interrupt\n", m_adsp->pcbase());
m_adsp_irq_state = 1;
update_interrupts();
break;
@@ -847,7 +847,7 @@ WRITE16_MEMBER( harddriv_state::hdadsp_special_w )
break;
default:
- logerror("%04X:hdadsp_special_w(%04X)=%04X\n", space.device().safe_pcbase(), offset, data);
+ logerror("%04X:hdadsp_special_w(%04X)=%04X\n", m_adsp->pcbase(), offset, data);
break;
}
}
@@ -907,7 +907,7 @@ WRITE16_MEMBER( harddriv_state::hd68k_ds3_control_w )
update_ds3_sirq();
}
m_ds3_sreset = val;
- space.device().execute().yield();
+ m_maincpu->yield();
}
break;
@@ -932,7 +932,7 @@ WRITE16_MEMBER( harddriv_state::hd68k_ds3_control_w )
/* a yield in this case is not enough */
/* we would need to increase the interleaving otherwise */
/* note that this only affects the test mode */
- space.device().execute().spin();
+ m_maincpu->spin();
}
break;
@@ -948,7 +948,7 @@ WRITE16_MEMBER( harddriv_state::hd68k_ds3_control_w )
update_ds3_irq();
}
m_ds3_reset = val;
- space.device().execute().yield();
+ m_maincpu->yield();
logerror("DS III reset = %d\n", val);
break;
@@ -983,15 +983,15 @@ READ16_MEMBER( harddriv_state::hd68k_ds3_girq_state_r )
READ16_MEMBER( harddriv_state::hd68k_ds3_gdata_r )
{
- offs_t pc = space.device().safe_pc();
+ offs_t pc = m_maincpu->pc();
m_ds3_gflag = 0;
update_ds3_irq();
- logerror("%06X:hd68k_ds3_gdata_r(%04X)\n", space.device().safe_pcbase(), m_ds3_gdata);
+ logerror("%06X:hd68k_ds3_gdata_r(%04X)\n", m_maincpu->pcbase(), m_ds3_gdata);
/* attempt to optimize the transfer if conditions are right */
- if (&space.device() == m_maincpu && pc == m_ds3_transfer_pc &&
+ if (pc == m_ds3_transfer_pc &&
!(!m_ds3_g68flag && m_ds3_g68irqs) && !(m_ds3_gflag && m_ds3_gfirqs))
{
uint32_t destaddr = m_maincpu->state_int(M68K_A1);
@@ -1000,12 +1000,13 @@ READ16_MEMBER( harddriv_state::hd68k_ds3_gdata_r )
uint16_t i6 = m_adsp->state_int((mstat & 1) ? ADSP2100_MR0 : ADSP2100_MR0_SEC);
uint16_t l6 = m_adsp->state_int(ADSP2100_L6) - 1;
uint16_t m7 = m_adsp->state_int(ADSP2100_M7);
+ auto &mspace = m_maincpu->space(AS_PROGRAM);
logerror("%06X:optimizing 68k transfer, %d words\n", m_maincpu->pcbase(), count68k);
while (count68k > 0 && m_adsp_data_memory[0x16e6] > 0)
{
- space.write_word(destaddr, m_ds3_gdata);
+ mspace.write_word(destaddr, m_ds3_gdata);
{
m_adsp_data_memory[0x16e6]--;
m_ds3_gdata = m_adsp_pgm_memory[i6] >> 8;
@@ -1021,7 +1022,7 @@ READ16_MEMBER( harddriv_state::hd68k_ds3_gdata_r )
/* if we just cleared the IRQ, we are going to do some VERY timing critical reads */
/* it is important that all the CPUs be in sync before we continue, so spin a little */
/* while to let everyone else catch up */
- space.device().execute().spin_until_trigger(DS3_TRIGGER);
+ m_maincpu->spin_until_trigger(DS3_TRIGGER);
machine().scheduler().trigger(DS3_TRIGGER, attotime::from_usec(5));
return m_ds3_gdata;
@@ -1030,7 +1031,7 @@ READ16_MEMBER( harddriv_state::hd68k_ds3_gdata_r )
WRITE16_MEMBER( harddriv_state::hd68k_ds3_gdata_w )
{
- logerror("%06X:hd68k_ds3_gdata_w(%04X)\n", space.device().safe_pcbase(), m_ds3_gdata);
+ logerror("%06X:hd68k_ds3_gdata_w(%04X)\n", m_maincpu->pcbase(), m_ds3_gdata);
COMBINE_DATA(&m_ds3_g68data);
m_ds3_g68flag = 1;
@@ -1049,7 +1050,7 @@ WRITE16_MEMBER( harddriv_state::hd68k_ds3_gdata_w )
WRITE16_MEMBER( harddriv_state::hd68k_ds3_sirq_clear_w )
{
- logerror("%06X:68k clears ADSP interrupt\n", space.device().safe_pcbase());
+ logerror("%06X:68k clears ADSP interrupt\n", m_maincpu->pcbase());
m_sound_int_state = 0;
update_interrupts();
}
@@ -1074,7 +1075,7 @@ READ16_MEMBER( harddriv_state::hd68k_ds3_sdata_r )
/* if we just cleared the IRQ, we are going to do some VERY timing critical reads */
/* it is important that all the CPUs be in sync before we continue, so spin a little */
/* while to let everyone else catch up */
- space.device().execute().spin_until_trigger(DS3_STRIGGER);
+ m_maincpu->spin_until_trigger(DS3_STRIGGER);
machine().scheduler().trigger(DS3_STRIGGER, attotime::from_usec(5));
return m_ds3_sdata;
@@ -1425,7 +1426,7 @@ WRITE16_MEMBER( harddriv_state::hdds3_special_w )
switch (offset & 7)
{
case 0:
- logerror("%04X:ADSP sets gdata to %04X\n", space.device().safe_pcbase(), data);
+ logerror("%s:ADSP sets gdata to %04X\n", machine().describe_context(), data);
m_ds3_gdata = data;
m_ds3_gflag = 1;
update_ds3_irq();
@@ -1435,7 +1436,7 @@ WRITE16_MEMBER( harddriv_state::hdds3_special_w )
break;
case 1:
- logerror("%04X:ADSP sets interrupt = %d\n", space.device().safe_pcbase(), (data >> 1) & 1);
+ logerror("%s:ADSP sets interrupt = %d\n", machine().describe_context(), (data >> 1) & 1);
m_adsp_irq_state = (data >> 1) & 1;
update_interrupts();
break;
@@ -1860,10 +1861,10 @@ READ16_MEMBER( harddriv_state::hdgsp_speedup_r )
/* if both this address and the other important address are not $ffff */
/* then we can spin until something gets written */
if (result != 0xffff && m_gsp_speedup_addr[1][0] != 0xffff &&
- &space.device() == m_gsp && space.device().safe_pc() == m_gsp_speedup_pc)
+ m_gsp->pc() == m_gsp_speedup_pc)
{
m_gsp_speedup_count[0]++;
- space.device().execute().spin_until_interrupt();
+ m_gsp->spin_until_interrupt();
}
return result;
@@ -1904,11 +1905,11 @@ READ16_MEMBER( harddriv_state::rdgsp_speedup1_r )
uint16_t result = m_gsp_speedup_addr[0][offset];
/* if this address is equal to $f000, spin until something gets written */
- if (&space.device() == m_gsp && space.device().safe_pc() == m_gsp_speedup_pc &&
- (uint8_t)result < space.device().state().state_int(TMS34010_A1))
+ if (m_gsp->pc() == m_gsp_speedup_pc &&
+ (uint8_t)result < m_gsp->state_int(TMS34010_A1))
{
m_gsp_speedup_count[0]++;
- space.device().execute().spin_until_interrupt();
+ m_gsp->spin_until_interrupt();
}
return result;
@@ -1918,8 +1919,6 @@ READ16_MEMBER( harddriv_state::rdgsp_speedup1_r )
WRITE16_MEMBER( harddriv_state::rdgsp_speedup1_w )
{
COMBINE_DATA(&m_gsp_speedup_addr[0][offset]);
- if (&space.device() != m_gsp)
- m_gsp->signal_interrupt_trigger();
}
@@ -1939,10 +1938,10 @@ READ16_MEMBER( harddriv_state::hdmsp_speedup_r )
{
int data = m_msp_speedup_addr[offset];
- if (data == 0 && &space.device() == m_msp && space.device().safe_pc() == m_msp_speedup_pc)
+ if (data == 0 && m_msp->pc() == m_msp_speedup_pc)
{
m_msp_speedup_count[0]++;
- space.device().execute().spin_until_interrupt();
+ m_msp->spin_until_interrupt();
}
return data;
@@ -1972,10 +1971,10 @@ READ16_MEMBER( harddriv_state::hdadsp_speedup_r )
{
int data = m_adsp_data_memory[0x1fff];
- if (data == 0xffff && &space.device() == m_adsp && space.device().safe_pc() <= 0x3b)
+ if (data == 0xffff && m_adsp->pc() <= 0x3b)
{
m_adsp_speedup_count[0]++;
- space.device().execute().spin_until_interrupt();
+ m_adsp->spin_until_interrupt();
}
return data;
@@ -1986,10 +1985,10 @@ READ16_MEMBER( harddriv_state::hdds3_speedup_r )
{
int data = *m_ds3_speedup_addr;
- if (data != 0 && &space.device() == m_adsp && space.device().safe_pc() == m_ds3_speedup_pc)
+ if (data != 0 && m_adsp->pc() == m_ds3_speedup_pc)
{
m_adsp_speedup_count[2]++;
- space.device().execute().spin_until_interrupt();
+ m_adsp->spin_until_interrupt();
}
return data;
diff --git a/src/mame/machine/rmnimbus.cpp b/src/mame/machine/rmnimbus.cpp
index d37fcf92e80..43a2dccb92e 100644
--- a/src/mame/machine/rmnimbus.cpp
+++ b/src/mame/machine/rmnimbus.cpp
@@ -1073,7 +1073,7 @@ READ8_MEMBER(rmnimbus_state::scsi_r)
{
int result = 0;
- int pc=space.device().safe_pc();
+ int pc=m_maincpu->pc();
char drive[5];
floppy_image_device *floppy;
@@ -1153,7 +1153,7 @@ WRITE8_MEMBER(rmnimbus_state::fdc_ctl_w)
WRITE8_MEMBER(rmnimbus_state::scsi_w)
{
- int pc=space.device().safe_pc();
+ int pc=m_maincpu->pc();
if(LOG_DISK_HDD)
logerror("Nimbus HDCW at %05X write of %02X to %04X\n",pc,data,(offset*2)+0x410);
@@ -1272,7 +1272,7 @@ void rmnimbus_state::ipc_dumpregs()
READ8_MEMBER(rmnimbus_state::nimbus_pc8031_r)
{
- int pc=space.device().safe_pc();
+ int pc=m_maincpu->pc();
uint8_t result;
switch(offset*2)
@@ -1296,7 +1296,7 @@ READ8_MEMBER(rmnimbus_state::nimbus_pc8031_r)
WRITE8_MEMBER(rmnimbus_state::nimbus_pc8031_w)
{
- int pc=space.device().safe_pc();
+ int pc=m_maincpu->pc();
switch(offset*2)
{
@@ -1322,7 +1322,7 @@ WRITE8_MEMBER(rmnimbus_state::nimbus_pc8031_w)
READ8_MEMBER(rmnimbus_state::nimbus_pc8031_iou_r)
{
- int pc=space.device().safe_pc();
+ int pc=m_iocpu->pc();
uint8_t result = 0;
switch (offset & 0x01)
@@ -1347,7 +1347,7 @@ READ8_MEMBER(rmnimbus_state::nimbus_pc8031_iou_r)
WRITE8_MEMBER(rmnimbus_state::nimbus_pc8031_iou_w)
{
- int pc=space.device().safe_pc();
+ int pc=m_iocpu->pc();
if(LOG_PC8031)
logerror("8031 PCIOW %04X write of %02X to %04X\n",pc,data,offset);
@@ -1386,7 +1386,7 @@ WRITE8_MEMBER(rmnimbus_state::nimbus_pc8031_iou_w)
READ8_MEMBER(rmnimbus_state::nimbus_pc8031_port_r)
{
- int pc=space.device().safe_pc();
+ int pc=m_iocpu->pc();
uint8_t result = 0;
if(LOG_PC8031_PORT)
@@ -1404,7 +1404,7 @@ READ8_MEMBER(rmnimbus_state::nimbus_pc8031_port_r)
WRITE8_MEMBER(rmnimbus_state::nimbus_pc8031_port_w)
{
- int pc=space.device().safe_pc();
+ int pc=m_iocpu->pc();
switch (offset)
{
@@ -1435,7 +1435,7 @@ WRITE8_MEMBER(rmnimbus_state::nimbus_pc8031_port_w)
/* IO Unit */
READ8_MEMBER(rmnimbus_state::nimbus_iou_r)
{
- int pc=space.device().safe_pc();
+ int pc=m_maincpu->pc();
uint8_t result=0;
if(offset==0)
@@ -1451,7 +1451,7 @@ READ8_MEMBER(rmnimbus_state::nimbus_iou_r)
WRITE8_MEMBER(rmnimbus_state::nimbus_iou_w)
{
- int pc=space.device().safe_pc();
+ int pc=m_maincpu->pc();
if(LOG_IOU)
logerror("Nimbus IOUW %08X write of %02X to %04X\n",pc,data,(offset*2)+0x92);
diff --git a/src/mame/video/rmnimbus.cpp b/src/mame/video/rmnimbus.cpp
index f0bf729de8b..940de72d834 100644
--- a/src/mame/video/rmnimbus.cpp
+++ b/src/mame/video/rmnimbus.cpp
@@ -93,7 +93,7 @@ READ16_MEMBER(rmnimbus_state::nimbus_video_io_r)
}
if(DEBUG_SET(DEBUG_TEXT))
- logerror("Nimbus video IOR at %05X from %04X mask=%04X, data=%04X\n",space.device().safe_pc(),(offset*2),mem_mask,result);
+ logerror("Nimbus video IOR at %05X from %04X mask=%04X, data=%04X\n",m_maincpu->pc(),(offset*2),mem_mask,result);
return result;
}
@@ -208,7 +208,7 @@ WRITE16_MEMBER(rmnimbus_state::nimbus_video_io_w)
if(offset < 0x14)
{
if(DEBUG_SET(DEBUG_TEXT))
- logerror("Nimbus video IOW at %05X write of %04X to %04X mask=%04X\n",space.device().safe_pc(),data,(offset*2),mem_mask);
+ logerror("Nimbus video IOW at %05X write of %04X to %04X mask=%04X\n",m_maincpu->pc(),data,(offset*2),mem_mask);
if(DEBUG_SET(DEBUG_DB))
logerror("dw %05X,%05X\n",(offset*2),data);