diff options
Diffstat (limited to 'src')
30 files changed, 1683 insertions, 1272 deletions
diff --git a/src/devices/machine/68230pit.cpp b/src/devices/machine/68230pit.cpp index 7398543dd52..3354738f954 100644 --- a/src/devices/machine/68230pit.cpp +++ b/src/devices/machine/68230pit.cpp @@ -433,6 +433,7 @@ void pit68230_device::wr_pitreg_tcr(UINT8 data) } else { + pit_timer->adjust(attotime::never, TIMER_ID_PIT, attotime::never); m_tcr = tout + tiack + irq + sqr; // remove this when the variables are used for the different modes!! Just here to to avoid warnings } } diff --git a/src/devices/machine/68230pit.h b/src/devices/machine/68230pit.h index ae71b0ba1ee..0c304bd1970 100644 --- a/src/devices/machine/68230pit.h +++ b/src/devices/machine/68230pit.h @@ -197,7 +197,7 @@ protected: virtual void device_start () override; virtual void device_reset () override; virtual void device_timer (emu_timer &timer, device_timer_id id, int param, void *ptr) override; - // virtual void execute_run () override; + int m_icount; devcb_write8 m_pa_out_cb; diff --git a/src/devices/machine/fga002.cpp b/src/devices/machine/fga002.cpp new file mode 100644 index 00000000000..4cd77414612 --- /dev/null +++ b/src/devices/machine/fga002.cpp @@ -0,0 +1,512 @@ +// license:BSD-3-Clause +// copyright-holders:Joakim Larsson Edstrom +/********************************************************************** +* +* Force Computer FGA-002 Force Gate Array +* +* Documetation: http://bitsavers.informatik.uni-stuttgart.de/pdf/forceComputers/201559_FGA-002_Nov96.pdf +* +* The FGA-002 gate array is a high speed CMOS device manufactured in 1.2 micron technology and containing 24,000 gates in a 281 pin PGA +* package. It provides interfaces to the 68020/30 microprocessor as well as a VMEbus compatible interface. +* The auxilary interface of the gate array is a high speed data channel used by the internal 32 bit DMA controller. The interface +* allows data transfer rates of up to 6 MByte/second. The timing of the local I/O interface is programmable and provides +* easy interfacing of local I/O devices. All control, address and data lines of the CPU and the VMEbus are either directly connected or +* connected via buffers to the gate array allowing easy implementation and usage. The gate array registers are programmed by the local CPU. +* +* FEATURES: +* - Programmable decoding for CPU and VME access to the local main memory +* - Interrupt management for internal and external interrupt sources +* - 32 bit multi-port DMA Controller +* - FORCE Message Broadcast slave interface with 2 message channels +* - 8 interrupt capable MAILBOXES +* - 8 bit TIMER with 16 selectable internal source clocks +* +* +* CAUTION (from the documentation - no unducumented registers are currently emulated ) +* The FGA-002 gate array contains registers, which are used to configure the gate array for special external hardware +* requirements. These registers are reserved and will be setup by the boot software according to the hardware environment in which the gate array is +* implemented. These registers must not be changed by the user. Some of these hardware configuration registers also contain user selectable bits. +* Programming the contents of these registers has to be done carefully without changing the bits initialized by the boot software. +* Registers not described must not be programmed. Unqualified changes of register bits may have unpredictable consequences for the gate array and +* external hardware. It is expressly forbidden to change register bits, except those defined for the user. +* +*/ +#include "fga002.h" + +#define VERBOSE 0 + +#define LOG(x) do { if (VERBOSE) logerror x; } while (0) +#define LOGR(x) +#if VERBOSE == 2 +#define logerror printf +#endif + +#ifdef _MSC_VER +#define FUNCNAME __func__ +#define LLFORMAT "%I64%" +#else +#define FUNCNAME __PRETTY_FUNCTION__ +#define LLFORMAT "%lld" +#endif + +//************************************************************************** +// DEVICE DEFINITIONS +//************************************************************************** +// device type definition +const device_type FGA002 = &device_creator<fga002_device>; + +//************************************************************************** +// LIVE DEVICE +//************************************************************************** + +//------------------------------------------------- +// fga002_device - constructor +//------------------------------------------------- + +fga002_device::fga002_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT32 variant, const char *shortname, const char *source) + : device_t(mconfig, type, name, tag, owner, clock, shortname, source) +{ +} + +fga002_device::fga002_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) + : device_t(mconfig, FGA002, "FGA-002", tag, owner, clock, "fga002", __FILE__) +{ +} + +void fga002_device::device_start() +{ + LOG(("%s\n", FUNCNAME)); + + // Timers + fga_timer = timer_alloc(TIMER_ID_FGA); + + save_pointer (NAME (m_fga002), sizeof(m_fga002)); +} + +void fga002_device::device_reset() +{ + LOG(("%s\n", FUNCNAME)); + /* Reset values for the FGA-002 */ + memset(&m_fga002[0], 0, sizeof(m_fga002)); + m_fga002[FGA_RSVMECALL] = 0x80; + m_fga002[FGA_RSKEYRES] = 0x80; + m_fga002[FGA_RSCPUCALL] = 0x80; + m_fga002[FGA_RSLOCSW] = 0x80; + m_fga002[FGA_ISTIM0] = 0x80; + m_fga002[FGA_ISDMANORM] = 0x80; + m_fga002[FGA_ISDMAERR] = 0x80; + m_fga002[FGA_ISFMB0REF] = 0x80; + m_fga002[FGA_ISFMB1REF] = 0x80; + m_fga002[FGA_ISPARITY] = 0x80; + m_fga002[FGA_ISABORT] = 0x80; + m_fga002[FGA_ISACFAIL] = 0x80; + m_fga002[FGA_ISSYSFAIL] = 0x80; + m_fga002[FGA_ISFMB0MES] = 0x80; + m_fga002[FGA_ISFMB1MES] = 0x80; +} + +//------------------------------------------------- +// device_timer - handler timer events +//------------------------------------------------- +void fga002_device::device_timer (emu_timer &timer, device_timer_id id, INT32 param, void *ptr) +{ + switch(id) + { + case TIMER_ID_FGA: + if (m_tim0count-- == 0) // Zero detect + { + if ((m_fga002[FGA_TIM0CTL] & REG_TIM0CTL_ZERO_STOP) == 0) + { + fga_timer->adjust(attotime::never, TIMER_ID_FGA, attotime::never); + } + else + { + if ((m_fga002[FGA_TIM0CTL] & REG_TIM0CTL_AUTOPRELOAD) == 0) + m_tim0count &= 0xff; + else + m_tim0count = m_fga002[FGA_TIM0PRELOAD]; + } + } + break; + default: + LOG(("Unhandled Timer ID %d\n", id)); + break; + } +} + + + +/* The FGA002 Timer + + FEATURES + - 8 bit Synchronous Counter + - 16 selectable clocks with frequencies from 1MHz to 0.5 Hz + - Autopreload and Zerostop operating modes + - Watchdog Timer operation + - SYSFAIL and/or interrupt generation + - Vectored interrupt + - Interrupt levels selectable by software +*/ + +/* Timer Preload Register TIM0PRELOAD + The Timer Preload Register TIM0PRELOAD contains the preset value which can be loaded into the counter circuit. The default + value of this register after reset is $00. The TIM0PRELOAD register can be read at any time but must not be altered if the + timer is running. + [7:0] The Timer Preload register contains the 8 bit value that is loaded into the counter if the + Autopreload option in the TIM0CTL register is selected and the counter reaches the value zero. + Also, if a write access to the TIM0COUNT register is performed, the counter is loaded with the value + stored in the Timer Preload Register. +*/ +void fga002_device::do_fga002reg_tim0preload_w(UINT8 data) +{ + LOG(("%s(%02x)\n", FUNCNAME, data)); + m_fga002[FGA_TIM0PRELOAD] = data; +} + +UINT8 fga002_device::do_fga002reg_tim0preload_r() +{ + LOG(("%s() %02x\n", FUNCNAME, m_fga002[FGA_TIM0PRELOAD])); + return m_fga002[FGA_TIM0PRELOAD]; +} + +/* Timer Control Register TIM0CTL + In the Timer Control Register TIM0CTL the operating mode and the clock source of the timer can be selected. The Timer + Control Register is grouped into two major fields. Bits 7-4 define the operating mode of the timer and the sysfail option. + Bits 3-0 select the source clock applied to the timer. The TIM0CTL register is cleared to $00 after any reset operation. + [7] Zerostop This bit selects whether the counter stops when reaching zero count or continues counting down. The value the + counter will decrement to next depends on the setting of bit 6 of this register, which is the Autopreload bit. + 1 = The counter continues counting down. + 0 = The counter stops on zero count. + [6] Autopreload This bit selects whether the counter rolls over from $00 to the value $FF and continues counting down or is + preset by the contents of the timer preload register after reaching the zero count. The Autopreload option may be + ignored if the counter is programmed to stop on zero count. + 1 The Autopreload option is enabled. When the counter has passed from $01 to $00, the value stored in the Preload + register will be transferred to the counter on the first clock edge following the zero count clock. After + that transfer the counter continues decrementing from the new value. + 0 The Autopreload option is disabled. After the counter has reached zero it will roll over to the value $FF and + continue counting down. + [5] Sysfail This bit enables/disables the sysfail generation by the timer. If this option is enabled, the SFAILO output pin of the FGA-002 + gate array will be asserted low when the timer triggers the timer interrupt. The sysfail signal is negated when the timer + interrupt is cleared. 1 = enabled 0 = disabled + [4] Start/Stop: This bit controls the timer start and stop operation. 1 = start 0 = stop + [3:0] Clock select This bitfield provides selection of the source clock for timer operation. + 3..0 source clock period + 0000 1 microsecond + 0001 2 microseconds + 0010 4 microseconds + 0011 8 microseconds + 0100 16 microseconds + 0101 32 microseconds + 0110 64 microseconds + 0111 128 microseconds + 1000 256 microseconds + 1001 512 microseconds + 1010 2 milliseconds + 1011 8 milliseconds + 1100 32 milliseconds + 1101 125 milliseconds + 1110 500 milliseconds + 1111 2 seconds +*/ + +void fga002_device::do_fga002reg_tim0ctl_w(UINT8 data) +{ + LOG(("%s(%02x)\n", FUNCNAME, data)); + if ((data & REG_TIM0CTL_START_STOP) != (m_fga002[FGA_TIM0CTL] & REG_TIM0CTL_START_STOP)) + { + if ((data & REG_TIM0CTL_START_STOP) == 0) + fga_timer->adjust(attotime::never, TIMER_ID_FGA, attotime::never); + else + { + switch (data & REG_TIM0CTL_CLK_MSK) + { + case REG_TIM0CTL_CLK_1_MIC: fga_timer->adjust(attotime::from_usec(1), TIMER_ID_FGA, attotime::from_usec(1)); break; + case REG_TIM0CTL_CLK_2_MIC: fga_timer->adjust(attotime::from_usec(2), TIMER_ID_FGA, attotime::from_usec(2)); break; + case REG_TIM0CTL_CLK_4_MIC: fga_timer->adjust(attotime::from_usec(4), TIMER_ID_FGA, attotime::from_usec(4)); break; + case REG_TIM0CTL_CLK_8_MIC: fga_timer->adjust(attotime::from_usec(8), TIMER_ID_FGA, attotime::from_usec(8)); break; + case REG_TIM0CTL_CLK_16_MIC: fga_timer->adjust(attotime::from_usec(16), TIMER_ID_FGA, attotime::from_usec(16)); break; + case REG_TIM0CTL_CLK_32_MIC: fga_timer->adjust(attotime::from_usec(32), TIMER_ID_FGA, attotime::from_usec(32)); break; + case REG_TIM0CTL_CLK_64_MIC: fga_timer->adjust(attotime::from_usec(64), TIMER_ID_FGA, attotime::from_usec(64)); break; + case REG_TIM0CTL_CLK_128_MIC: fga_timer->adjust(attotime::from_usec(128), TIMER_ID_FGA, attotime::from_usec(128)); break; + case REG_TIM0CTL_CLK_256_MIC: fga_timer->adjust(attotime::from_usec(256), TIMER_ID_FGA, attotime::from_usec(256)); break; + case REG_TIM0CTL_CLK_512_MIC: fga_timer->adjust(attotime::from_usec(512), TIMER_ID_FGA, attotime::from_usec(512)); break; + case REG_TIM0CTL_CLK_2_MIL: fga_timer->adjust(attotime::from_msec(2), TIMER_ID_FGA, attotime::from_msec(2)); break; + case REG_TIM0CTL_CLK_8_MIL: fga_timer->adjust(attotime::from_msec(8), TIMER_ID_FGA, attotime::from_msec(8)); break; + case REG_TIM0CTL_CLK_32_MIL: fga_timer->adjust(attotime::from_msec(32), TIMER_ID_FGA, attotime::from_msec(32)); break; + case REG_TIM0CTL_CLK_125_MIL: fga_timer->adjust(attotime::from_msec(125), TIMER_ID_FGA, attotime::from_msec(125)); break; + case REG_TIM0CTL_CLK_500_MIL: fga_timer->adjust(attotime::from_msec(500), TIMER_ID_FGA, attotime::from_msec(500)); break; + case REG_TIM0CTL_CLK_2_SEC: fga_timer->adjust(attotime::from_seconds(2), TIMER_ID_FGA, attotime::from_seconds(2)); break; + default: logerror("REG_TIM0CTL programmer error, please report\n"); break; // Should never happen + } + } + } + // TODO: Support SYSFAIL flag on interrupt + m_fga002[FGA_TIM0CTL] = data; +} + +UINT8 fga002_device::do_fga002reg_tim0ctl_r() +{ + LOG(("%s() %02x\n", FUNCNAME, m_fga002[FGA_TIM0CTL])); + return m_fga002[FGA_TIM0CTL]; +} + +/* Timer Count Register TIM0COUNT + The Timer Count Register TIM0COUNT contains the current value of the timer/counter. A write access to this register will + load the counter with the value stored in the Timer Preload Register. The written data will be ignored. + It is permitted to perform read/write accesses to the Timer Count Register when the timer is running. + The Timer Count Register is initialized to the value $FF after reset. + [7:0] Timer Count Value +*/ +void fga002_device::do_fga002reg_tim0count_w(UINT8 data) +{ + LOG(("%s(%02x)\n", FUNCNAME, data)); + m_tim0count = m_fga002[FGA_TIM0PRELOAD]; +} + +UINT8 fga002_device::do_fga002reg_tim0count_r() +{ + LOG(("%s() %02x\n", FUNCNAME, m_tim0count)); + return m_tim0count; +} + +/* Timer Interrupt Control Register ICRTIM0 + Timer Interrupt Control is performed by the Timer Interrupt Control Register ICRTIM0 which enables/disables the interrupt + and selects the interrupt level. + [3] IRQ enable, 1 = timer interrupt channel enabled, 0 = disabled + [2:0] IRQ level 000 = interrupt disabled 001-111 = Level 1 to 7 interrupt +*/ +void fga002_device::do_fga002reg_icrtim0_w(UINT8 data) +{ + LOG(("%s(%02x)\n", FUNCNAME, data)); + m_fga002[FGA_ICRTIM0] = data; +} + +UINT8 fga002_device::do_fga002reg_icrtim0_r() +{ + LOG(("%s() %02x\n", FUNCNAME, m_fga002[FGA_ICRTIM0])); + return m_fga002[FGA_ICRTIM0]; +} + +/* Timer Interrupt Status Register ISTIM0 + ISTIM0 displays a pending timer interrupt. This bit is always readable and indicates 0 if the timer interrupt has been triggered. A write access to the + ISTIM0 register clears the timer interrupt. The data written to this register will be ignored. + [7] The IRQ Status register bit displays if a timer interrupt request is pending. 1 = no interrupt is pending. 0 = interrupt is pending + [6:0] not used +*/ +void fga002_device::do_fga002reg_istim0_w(UINT8 data) +{ + LOG(("%s(%02x)\n", FUNCNAME, data)); + m_fga002[FGA_ISTIM0] &= ~REG_ISTIM0_TIM_INT; // Clear timer interrupt status +} + +UINT8 fga002_device::do_fga002reg_istim0_r() +{ + LOG(("%s() %02x\n", FUNCNAME, m_fga002[FGA_ISTIM0])); + return m_fga002[FGA_ISTIM0]; +} + + +WRITE8_MEMBER (fga002_device::write){ + LOG(("%s[%04x] <- %02x - ", FUNCNAME, offset, data)); + switch(offset) + { + case FGA_SPECIALENA : LOG(("FGA_SPECIALENA - not implemented\n")); m_fga002[FGA_SPECIALENA] = data; break; + case FGA_RSVMECALL : LOG(("FGA_RSVMECALL - not implemented\n")); m_fga002[FGA_RSVMECALL] = data; break; + case FGA_RSKEYRES : LOG(("FGA_RSKEYRES - not implemented\n")); m_fga002[FGA_RSKEYRES] = data; break; + case FGA_RSCPUCALL : LOG(("FGA_RSCPUCALL - not implemented\n")); m_fga002[FGA_RSCPUCALL] = data; break; + case FGA_RSLOCSW : LOG(("FGA_RSLOCSW - not implemented\n")); m_fga002[FGA_RSLOCSW] = data; break; + case FGA_ICRMBOX0 : LOG(("FGA_ICRMBOX0 - not implemented\n")); m_fga002[FGA_ICRMBOX0] = data; break; + case FGA_ICRMBOX1 : LOG(("FGA_ICRMBOX1 - not implemented\n")); m_fga002[FGA_ICRMBOX1] = data; break; + case FGA_ICRMBOX2 : LOG(("FGA_ICRMBOX2 - not implemented\n")); m_fga002[FGA_ICRMBOX2] = data; break; + case FGA_ICRMBOX3 : LOG(("FGA_ICRMBOX3 - not implemented\n")); m_fga002[FGA_ICRMBOX3] = data; break; + case FGA_ICRMBOX4 : LOG(("FGA_ICRMBOX4 - not implemented\n")); m_fga002[FGA_ICRMBOX4] = data; break; + case FGA_ICRMBOX5 : LOG(("FGA_ICRMBOX5 - not implemented\n")); m_fga002[FGA_ICRMBOX5] = data; break; + case FGA_ICRMBOX6 : LOG(("FGA_ICRMBOX6 - not implemented\n")); m_fga002[FGA_ICRMBOX6] = data; break; + case FGA_ICRMBOX7 : LOG(("FGA_ICRMBOX7 - not implemented\n")); m_fga002[FGA_ICRMBOX7] = data; break; + case FGA_VMEPAGE : LOG(("FGA_VMEPAGE - not implemented\n")); m_fga002[FGA_VMEPAGE ] = data; break; + case FGA_ICRVME1 : LOG(("FGA_ICRVME1 - not implemented\n")); m_fga002[FGA_ICRVME1] = data; break; + case FGA_ICRVME2 : LOG(("FGA_ICRVME2 - not implemented\n")); m_fga002[FGA_ICRVME2] = data; break; + case FGA_ICRVME3 : LOG(("FGA_ICRVME3 - not implemented\n")); m_fga002[FGA_ICRVME3] = data; break; + case FGA_ICRVME4 : LOG(("FGA_ICRVME4 - not implemented\n")); m_fga002[FGA_ICRVME4] = data; break; + case FGA_ICRVME5 : LOG(("FGA_ICRVME5 - not implemented\n")); m_fga002[FGA_ICRVME5] = data; break; + case FGA_ICRVME6 : LOG(("FGA_ICRVME6 - not implemented\n")); m_fga002[FGA_ICRVME6] = data; break; + case FGA_ICRVME7 : LOG(("FGA_ICRVME7 - not implemented\n")); m_fga002[FGA_ICRVME7] = data; break; + case FGA_ICRTIM0 : do_fga002reg_icrtim0_w(data); break; + case FGA_ICRDMANORM : LOG(("FGA_ICRDMANORM - not implemented\n")); m_fga002[FGA_ICRDMANORM] = data; break; + case FGA_ICRDMAERR : LOG(("FGA_ICRDMAERR - not implemented\n")); m_fga002[FGA_ICRDMAERR] = data; break; + case FGA_CTL1 : LOG(("FGA_CTL1 - not implemented\n")); m_fga002[FGA_CTL1] = data; break; + case FGA_CTL2 : LOG(("FGA_CTL2 - not implemented\n")); m_fga002[FGA_CTL2] = data; break; + case FGA_ICRFMB0REF : LOG(("FGA_ICRFMB0REF - not implemented\n")); m_fga002[FGA_ICRFMB0REF] = data; break; + case FGA_ICRFMB1REF : LOG(("FGA_ICRFMB1REF - not implemented\n")); m_fga002[FGA_ICRFMB1REF] = data; break; + case FGA_ICRFMB0MES : LOG(("FGA_ICRFMB0MES - not implemented\n")); m_fga002[FGA_ICRFMB0MES] = data; break; + case FGA_ICRFMB1MES : LOG(("FGA_ICRFMB1MES - not implemented\n")); m_fga002[FGA_ICRFMB1MES] = data; break; + case FGA_CTL3 : LOG(("FGA_CTL3 - not implemented\n")); m_fga002[FGA_CTL3] = data; break; + case FGA_CTL4 : LOG(("FGA_CTL4 - not implemented\n")); m_fga002[FGA_CTL4] = data; break; + case FGA_ICRPARITY : LOG(("FGA_ICRPARITY - not implemented\n")); m_fga002[FGA_ICRPARITY] = data; break; + case FGA_AUXPINCTL : LOG(("FGA_AUXPINCTL - not implemented\n")); m_fga002[FGA_AUXPINCTL] = data; break; + case FGA_CTL5 : LOG(("FGA_CTL5 - not implemented\n")); m_fga002[FGA_CTL5] = data; break; + case FGA_AUXFIFWEX : LOG(("FGA_AUXFIFWEX - not implemented\n")); m_fga002[FGA_AUXFIFWEX] = data; break; + case FGA_AUXFIFREX : LOG(("FGA_AUXFIFREX - not implemented\n")); m_fga002[FGA_AUXFIFREX] = data; break; + case FGA_CTL6 : LOG(("FGA_CTL6 - not implemented\n")); m_fga002[FGA_CTL6] = data; break; + case FGA_CTL7 : LOG(("FGA_CTL7 - not implemented\n")); m_fga002[FGA_CTL7] = data; break; + case FGA_CTL8 : LOG(("FGA_CTL8 - not implemented\n")); m_fga002[FGA_CTL8] = data; break; + case FGA_CTL9 : LOG(("FGA_CTL9 - not implemented\n")); m_fga002[FGA_CTL9] = data; break; + case FGA_ICRABORT : LOG(("FGA_ICRABORT - not implemented\n")); m_fga002[FGA_ICRABORT] = data; break; + case FGA_ICRACFAIL : LOG(("FGA_ICRACFAIL - not implemented\n")); m_fga002[FGA_ICRACFAIL] = data; break; + case FGA_ICRSYSFAIL : LOG(("FGA_ICRSYSFAIL - not implemented\n")); m_fga002[FGA_ICRSYSFAIL] = data; break; + case FGA_ICRLOCAL0 : LOG(("FGA_ICRLOCAL0 - not implemented\n")); m_fga002[FGA_ICRLOCAL0] = data; break; + case FGA_ICRLOCAL1 : LOG(("FGA_ICRLOCAL1 - not implemented\n")); m_fga002[FGA_ICRLOCAL1] = data; break; + case FGA_ICRLOCAL2 : LOG(("FGA_ICRLOCAL2 - not implemented\n")); m_fga002[FGA_ICRLOCAL2] = data; break; + case FGA_ICRLOCAL3 : LOG(("FGA_ICRLOCAL3 - not implemented\n")); m_fga002[FGA_ICRLOCAL3] = data; break; + case FGA_ICRLOCAL4 : LOG(("FGA_ICRLOCAL4 - not implemented\n")); m_fga002[FGA_ICRLOCAL4] = data; break; + case FGA_ICRLOCAL5 : LOG(("FGA_ICRLOCAL5 - not implemented\n")); m_fga002[FGA_ICRLOCAL5] = data; break; + case FGA_ICRLOCAL6 : LOG(("FGA_ICRLOCAL6 - not implemented\n")); m_fga002[FGA_ICRLOCAL6] = data; break; + case FGA_ICRLOCAL7 : LOG(("FGA_ICRLOCAL7 - not implemented\n")); m_fga002[FGA_ICRLOCAL7] = data; break; + case FGA_ENAMCODE : LOG(("FGA_ENAMCODE - not implemented\n")); m_fga002[FGA_ENAMCODE] = data; break; + case FGA_CTL10 : LOG(("FGA_CTL10 - not implemented\n")); m_fga002[FGA_CTL10] = data; break; + case FGA_CTL11 : LOG(("FGA_CTL11 - not implemented\n")); m_fga002[FGA_CTL11] = data; break; + case FGA_MAINUM : LOG(("FGA_MAINUM - not implemented\n")); m_fga002[FGA_MAINUM] = data; break; + case FGA_MAINUU : LOG(("FGA_MAINUU - not implemented\n")); m_fga002[FGA_MAINUU] = data; break; + case FGA_BOTTOMPAGEU : LOG(("FGA_BOTTOMPAGEU - not implemented\n")); m_fga002[FGA_BOTTOMPAGEU] = data; break; + case FGA_BOTTOMPAGEL : LOG(("FGA_BOTTOMPAGEL - not implemented\n")); m_fga002[FGA_BOTTOMPAGEL] = data; break; + case FGA_TOPPAGEU : LOG(("FGA_TOPPAGEU - not implemented\n")); m_fga002[FGA_TOPPAGEU] = data; break; + case FGA_TOPPAGEL : LOG(("FGA_TOPPAGEL - not implemented\n")); m_fga002[FGA_TOPPAGEL] = data; break; + case FGA_MYVMEPAGE : LOG(("FGA_MYVMEPAGE - not implemented\n")); m_fga002[FGA_MYVMEPAGE] = data; break; + case FGA_TIM0PRELOAD : do_fga002reg_tim0preload_w(data); break; + case FGA_TIM0CTL : do_fga002reg_tim0ctl_w(data); break; + case FGA_DMASRCATT : LOG(("FGA_DMASRCATT - not implemented\n")); m_fga002[FGA_DMASRCATT] = data; break; + case FGA_DMADSTATT : LOG(("FGA_DMADSTATT - not implemented\n")); m_fga002[FGA_DMADSTATT] = data; break; + case FGA_DMA_GENERAL : LOG(("FGA_DMA_GENERAL - not implemented\n")); m_fga002[FGA_DMA_GENERAL] = data; break; + case FGA_CTL12 : LOG(("FGA_CTL12 - not implemented\n")); m_fga002[FGA_CTL12] = data; break; + case FGA_LIOTIMING : LOG(("FGA_LIOTIMING - not implemented\n")); m_fga002[FGA_LIOTIMING] = data; break; + case FGA_LOCALIACK : LOG(("FGA_LOCALIACK - not implemented\n")); m_fga002[FGA_LOCALIACK] = data; break; + case FGA_FMBCTL : LOG(("FGA_FMBCTL - not implemented\n")); m_fga002[FGA_FMBCTL] = data; break; + case FGA_FMBAREA : LOG(("FGA_FMBAREA - not implemented\n")); m_fga002[FGA_FMBAREA] = data; break; + case FGA_AUXSRCSTART : LOG(("FGA_AUXSRCSTART - not implemented\n")); m_fga002[FGA_AUXSRCSTART] = data; break; + case FGA_AUXDSTSTART : LOG(("FGA_AUXDSTSTART - not implemented\n")); m_fga002[FGA_AUXDSTSTART] = data; break; + case FGA_AUXSRCTERM : LOG(("FGA_AUXSRCTERM - not implemented\n")); m_fga002[FGA_AUXSRCTERM] = data; break; + case FGA_AUXDSTTERM : LOG(("FGA_AUXDSTTERM - not implemented\n")); m_fga002[FGA_AUXDSTTERM] = data; break; + case FGA_CTL13 : LOG(("FGA_CTL13 - not implemented\n")); m_fga002[FGA_CTL13] = data; break; + case FGA_CTL14 : LOG(("FGA_CTL14 - not implemented\n")); m_fga002[FGA_CTL14] = data; break; + case FGA_CTL15 : LOG(("FGA_CTL15 - not implemented\n")); m_fga002[FGA_CTL15] = data; break; + case FGA_CTL16 : LOG(("FGA_CTL16 - not implemented\n")); m_fga002[FGA_CTL16] = data; break; + case FGA_ISTIM0 : do_fga002reg_istim0_w(data); break; + case FGA_ISDMANORM : LOG(("FGA_ISDMANORM - not implemented\n")); m_fga002[FGA_ISDMANORM] = data; break; + case FGA_ISDMAERR : LOG(("FGA_ISDMAERR - not implemented\n")); m_fga002[FGA_ISDMAERR] = data; break; + case FGA_ISFMB0REF : LOG(("FGA_ISFMB0REF - not implemented\n")); m_fga002[FGA_ISFMB0REF] = data; break; + case FGA_ISFMB1REF : LOG(("FGA_ISFMB1REF - not implemented\n")); m_fga002[FGA_ISFMB1REF] = data; break; + case FGA_ISPARITY : LOG(("FGA_ISPARITY - not implemented\n")); m_fga002[FGA_ISPARITY] = data; break; + case FGA_DMARUNCTL : LOG(("FGA_DMARUNCTL - not implemented\n")); m_fga002[FGA_DMARUNCTL] = data; break; + case FGA_ISABORT : LOG(("FGA_ISABORT - not implemented\n")); m_fga002[FGA_ISABORT] = data; break; + case FGA_ISFMB0MES : LOG(("FGA_ISFMB0MES - not implemented\n")); m_fga002[FGA_ISFMB0MES] = data; break; + case FGA_ISFMB1MES : LOG(("FGA_ISFMB1MES - not implemented\n")); m_fga002[FGA_ISFMB1MES] = data; break; + case FGA_ABORTPIN : LOG(("FGA_ABORTPIN - not implemented\n")); m_fga002[FGA_ABORTPIN] = data; break; + case FGA_TIM0COUNT : do_fga002reg_tim0count_w(data); break; + default: + LOG(("Unsupported register %04x\n", offset)); + } +} + +READ8_MEMBER (fga002_device::read){ + UINT8 ret = 0; + + LOG(("%s[%04x] ", FUNCNAME, offset)); + switch(offset) + { + case FGA_SPECIALENA : ret = m_fga002[FGA_SPECIALENA]; LOG(("FGA_SPECIALENA returns %02x - not implemented\n", ret)); break; + case FGA_RSVMECALL : ret = m_fga002[FGA_RSVMECALL]; LOG(("FGA_RSVMECALL returns %02x - not implemented\n", ret)); break; + case FGA_RSKEYRES : ret = m_fga002[FGA_RSKEYRES]; LOG(("FGA_RSKEYRES returns %02x - not implemented\n", ret)); break; + case FGA_RSCPUCALL : ret = m_fga002[FGA_RSCPUCALL]; LOG(("FGA_RSCPUCALL returns %02x - not implemented\n", ret)); break; + case FGA_RSLOCSW : ret = m_fga002[FGA_RSLOCSW]; LOG(("FGA_RSLOCSW returns %02x - not implemented\n", ret)); break; + case FGA_ICRMBOX0 : ret = m_fga002[FGA_ICRMBOX0]; LOG(("FGA_ICRMBOX0 returns %02x - not implemented\n", ret)); break; + case FGA_ICRMBOX1 : ret = m_fga002[FGA_ICRMBOX1]; LOG(("FGA_ICRMBOX1 returns %02x - not implemented\n", ret)); break; + case FGA_ICRMBOX2 : ret = m_fga002[FGA_ICRMBOX2]; LOG(("FGA_ICRMBOX2 returns %02x - not implemented\n", ret)); break; + case FGA_ICRMBOX3 : ret = m_fga002[FGA_ICRMBOX3]; LOG(("FGA_ICRMBOX3 returns %02x - not implemented\n", ret)); break; + case FGA_ICRMBOX4 : ret = m_fga002[FGA_ICRMBOX4]; LOG(("FGA_ICRMBOX4 returns %02x - not implemented\n", ret)); break; + case FGA_ICRMBOX5 : ret = m_fga002[FGA_ICRMBOX5]; LOG(("FGA_ICRMBOX5 returns %02x - not implemented\n", ret)); break; + case FGA_ICRMBOX6 : ret = m_fga002[FGA_ICRMBOX6]; LOG(("FGA_ICRMBOX6 returns %02x - not implemented\n", ret)); break; + case FGA_ICRMBOX7 : ret = m_fga002[FGA_ICRMBOX7]; LOG(("FGA_ICRMBOX7 returns %02x - not implemented\n", ret)); break; + case FGA_VMEPAGE : ret = m_fga002[FGA_VMEPAGE]; LOG(("FGA_VMEPAGE returns %02x - not implemented\n", ret)); break; + case FGA_ICRVME1 : ret = m_fga002[FGA_ICRVME1]; LOG(("FGA_ICRVME1 returns %02x - not implemented\n", ret)); break; + case FGA_ICRVME2 : ret = m_fga002[FGA_ICRVME2]; LOG(("FGA_ICRVME2 returns %02x - not implemented\n", ret)); break; + case FGA_ICRVME3 : ret = m_fga002[FGA_ICRVME3]; LOG(("FGA_ICRVME3 returns %02x - not implemented\n", ret)); break; + case FGA_ICRVME4 : ret = m_fga002[FGA_ICRVME4]; LOG(("FGA_ICRVME4 returns %02x - not implemented\n", ret)); break; + case FGA_ICRVME5 : ret = m_fga002[FGA_ICRVME5]; LOG(("FGA_ICRVME5 returns %02x - not implemented\n", ret)); break; + case FGA_ICRVME6 : ret = m_fga002[FGA_ICRVME6]; LOG(("FGA_ICRVME6 returns %02x - not implemented\n", ret)); break; + case FGA_ICRVME7 : ret = m_fga002[FGA_ICRVME7]; LOG(("FGA_ICRVME7 returns %02x - not implemented\n", ret)); break; + case FGA_ICRTIM0 : ret = do_fga002reg_icrtim0_r(); break; + case FGA_ICRDMANORM : ret = m_fga002[FGA_ICRDMANORM]; LOG(("FGA_ICRDMANORM returns %02x - not implemented\n", ret)); break; + case FGA_ICRDMAERR : ret = m_fga002[FGA_ICRDMAERR]; LOG(("FGA_ICRDMAERR returns %02x - not implemented\n", ret)); break; + case FGA_CTL1 : ret = m_fga002[FGA_CTL1]; LOG(("FGA_CTL1 returns %02x - not implemented\n", ret)); break; + case FGA_CTL2 : ret = m_fga002[FGA_CTL2]; LOG(("FGA_CTL2 returns %02x - not implemented\n", ret)); break; + case FGA_ICRFMB0REF : ret = m_fga002[FGA_ICRFMB0REF]; LOG(("FGA_ICRFMB0REF returns %02x - not implemented\n", ret)); break; + case FGA_ICRFMB1REF : ret = m_fga002[FGA_ICRFMB1REF]; LOG(("FGA_ICRFMB1REF returns %02x - not implemented\n", ret)); break; + case FGA_ICRFMB0MES : ret = m_fga002[FGA_ICRFMB0MES]; LOG(("FGA_ICRFMB0MES returns %02x - not implemented\n", ret)); break; + case FGA_ICRFMB1MES : ret = m_fga002[FGA_ICRFMB1MES]; LOG(("FGA_ICRFMB1MES returns %02x - not implemented\n", ret)); break; + case FGA_CTL3 : ret = m_fga002[FGA_CTL3]; LOG(("FGA_CTL3 returns %02x - not implemented\n", ret)); break; + case FGA_CTL4 : ret = m_fga002[FGA_CTL4]; LOG(("FGA_CTL4 returns %02x - not implemented\n", ret)); break; + case FGA_ICRPARITY : ret = m_fga002[FGA_ICRPARITY]; LOG(("FGA_ICRPARITY returns %02x - not implemented\n", ret)); break; + case FGA_AUXPINCTL : ret = m_fga002[FGA_AUXPINCTL]; LOG(("FGA_AUXPINCTL returns %02x - not implemented\n", ret)); break; + case FGA_CTL5 : ret = m_fga002[FGA_CTL5]; LOG(("FGA_CTL5 returns %02x - not implemented\n", ret)); break; + case FGA_AUXFIFWEX : ret = m_fga002[FGA_AUXFIFWEX]; LOG(("FGA_AUXFIFWEX returns %02x - not implemented\n", ret)); break; + case FGA_AUXFIFREX : ret = m_fga002[FGA_AUXFIFREX]; LOG(("FGA_AUXFIFREX returns %02x - not implemented\n", ret)); break; + case FGA_CTL6 : ret = m_fga002[FGA_CTL6]; LOG(("FGA_CTL6 returns %02x - not implemented\n", ret)); break; + case FGA_CTL7 : ret = m_fga002[FGA_CTL7]; LOG(("FGA_CTL7 returns %02x - not implemented\n", ret)); break; + case FGA_CTL8 : ret = m_fga002[FGA_CTL8]; LOG(("FGA_CTL8 returns %02x - not implemented\n", ret)); break; + case FGA_CTL9 : ret = m_fga002[FGA_CTL9]; LOG(("FGA_CTL9 returns %02x - not implemented\n", ret)); break; + case FGA_ICRABORT : ret = m_fga002[FGA_ICRABORT]; LOG(("FGA_ICRABORT returns %02x - not implemented\n", ret)); break; + case FGA_ICRACFAIL : ret = m_fga002[FGA_ICRACFAIL]; LOG(("FGA_ICRACFAIL returns %02x - not implemented\n", ret)); break; + case FGA_ICRSYSFAIL : ret = m_fga002[FGA_ICRSYSFAIL]; LOG(("FGA_ICRSYSFAIL returns %02x - not implemented\n", ret)); break; + case FGA_ICRLOCAL0 : ret = m_fga002[FGA_ICRLOCAL0]; LOG(("FGA_ICRLOCAL0 returns %02x - not implemented\n", ret)); break; + case FGA_ICRLOCAL1 : ret = m_fga002[FGA_ICRLOCAL1]; LOG(("FGA_ICRLOCAL1 returns %02x - not implemented\n", ret)); break; + case FGA_ICRLOCAL2 : ret = m_fga002[FGA_ICRLOCAL2]; LOG(("FGA_ICRLOCAL2 returns %02x - not implemented\n", ret)); break; + case FGA_ICRLOCAL3 : ret = m_fga002[FGA_ICRLOCAL3]; LOG(("FGA_ICRLOCAL3 returns %02x - not implemented\n", ret)); break; + case FGA_ICRLOCAL4 : ret = m_fga002[FGA_ICRLOCAL4]; LOG(("FGA_ICRLOCAL4 returns %02x - not implemented\n", ret)); break; + case FGA_ICRLOCAL5 : ret = m_fga002[FGA_ICRLOCAL5]; LOG(("FGA_ICRLOCAL5 returns %02x - not implemented\n", ret)); break; + case FGA_ICRLOCAL6 : ret = m_fga002[FGA_ICRLOCAL6]; LOG(("FGA_ICRLOCAL6 returns %02x - not implemented\n", ret)); break; + case FGA_ICRLOCAL7 : ret = m_fga002[FGA_ICRLOCAL7]; LOG(("FGA_ICRLOCAL7 returns %02x - not implemented\n", ret)); break; + case FGA_ENAMCODE : ret = m_fga002[FGA_ENAMCODE]; LOG(("FGA_ENAMCODE returns %02x - not implemented\n", ret)); break; + case FGA_CTL10 : ret = m_fga002[FGA_CTL10]; LOG(("FGA_CTL10 returns %02x - not implemented\n", ret)); break; + case FGA_CTL11 : ret = m_fga002[FGA_CTL11]; LOG(("FGA_CTL11 returns %02x - not implemented\n", ret)); break; + case FGA_MAINUM : ret = m_fga002[FGA_MAINUM]; LOG(("FGA_MAINUM returns %02x - not implemented\n", ret)); break; + case FGA_MAINUU : ret = m_fga002[FGA_MAINUU]; LOG(("FGA_MAINUU returns %02x - not implemented\n", ret)); break; + case FGA_BOTTOMPAGEU : ret = m_fga002[FGA_BOTTOMPAGEU]; LOG(("FGA_BOTTOMPAGEU returns %02x - not implemented\n", ret)); break; + case FGA_BOTTOMPAGEL : ret = m_fga002[FGA_BOTTOMPAGEL]; LOG(("FGA_BOTTOMPAGEL returns %02x - not implemented\n", ret)); break; + case FGA_TOPPAGEU : ret = m_fga002[FGA_TOPPAGEU]; LOG(("FGA_TOPPAGEU returns %02x - not implemented\n", ret)); break; + case FGA_TOPPAGEL : ret = m_fga002[FGA_TOPPAGEL]; LOG(("FGA_TOPPAGEL returns %02x - not implemented\n", ret)); break; + case FGA_MYVMEPAGE : ret = m_fga002[FGA_MYVMEPAGE]; LOG(("FGA_MYVMEPAGE returns %02x - not implemented\n", ret)); break; + case FGA_TIM0PRELOAD : ret = do_fga002reg_tim0preload_r(); break; + case FGA_TIM0CTL : ret = do_fga002reg_tim0ctl_r(); break; + case FGA_DMASRCATT : ret = m_fga002[FGA_DMASRCATT]; LOG(("FGA_DMASRCATT returns %02x - not implemented\n", ret)); break; + case FGA_DMADSTATT : ret = m_fga002[FGA_DMADSTATT]; LOG(("FGA_DMADSTATT returns %02x - not implemented\n", ret)); break; + case FGA_DMA_GENERAL : ret = m_fga002[FGA_DMA_GENERAL]; LOG(("FGA_DMA_GENERAL returns %02x - not implemented\n", ret)); break; + case FGA_CTL12 : ret = m_fga002[FGA_CTL12]; LOG(("FGA_CTL12 returns %02x - not implemented\n", ret)); break; + case FGA_LIOTIMING : ret = m_fga002[FGA_LIOTIMING]; LOG(("FGA_LIOTIMING returns %02x - not implemented\n", ret)); break; + case FGA_LOCALIACK : ret = m_fga002[FGA_LOCALIACK]; LOG(("FGA_LOCALIACK returns %02x - not implemented\n", ret)); break; + case FGA_FMBCTL : ret = m_fga002[FGA_FMBCTL]; LOG(("FGA_FMBCTL returns %02x - not implemented\n", ret)); break; + case FGA_FMBAREA : ret = m_fga002[FGA_FMBAREA]; LOG(("FGA_FMBAREA returns %02x - not implemented\n", ret)); break; + case FGA_AUXSRCSTART : ret = m_fga002[FGA_AUXSRCSTART]; LOG(("FGA_AUXSRCSTART returns %02x - not implemented\n", ret)); break; + case FGA_AUXDSTSTART : ret = m_fga002[FGA_AUXDSTSTART]; LOG(("FGA_AUXDSTSTART returns %02x - not implemented\n", ret)); break; + case FGA_AUXSRCTERM : ret = m_fga002[FGA_AUXSRCTERM]; LOG(("FGA_AUXSRCTERM returns %02x - not implemented\n", ret)); break; + case FGA_AUXDSTTERM : ret = m_fga002[FGA_AUXDSTTERM]; LOG(("FGA_AUXDSTTERM returns %02x - not implemented\n", ret)); break; + case FGA_CTL13 : ret = m_fga002[FGA_CTL13]; LOG(("FGA_CTL13 returns %02x - not implemented\n", ret)); break; + case FGA_CTL14 : ret = m_fga002[FGA_CTL14]; LOG(("FGA_CTL14 returns %02x - not implemented\n", ret)); break; + case FGA_CTL15 : ret = m_fga002[FGA_CTL15]; LOG(("FGA_CTL15 returns %02x - not implemented\n", ret)); break; + case FGA_CTL16 : ret = m_fga002[FGA_CTL16]; LOG(("FGA_CTL16 returns %02x - not implemented\n", ret)); break; + case FGA_ISTIM0 : ret = do_fga002reg_istim0_r(); break; + case FGA_ISDMANORM : ret = m_fga002[FGA_ISDMANORM]; LOG(("FGA_ISDMANORM returns %02x - not implemented\n", ret)); break; + case FGA_ISDMAERR : ret = m_fga002[FGA_ISDMAERR]; LOG(("FGA_ISDMAERR returns %02x - not implemented\n", ret)); break; + case FGA_ISFMB0REF : ret = m_fga002[FGA_ISFMB0REF]; LOG(("FGA_ISFMB0REF returns %02x - not implemented\n", ret)); break; + case FGA_ISFMB1REF : ret = m_fga002[FGA_ISFMB1REF]; LOG(("FGA_ISFMB1REF returns %02x - not implemented\n", ret)); break; + case FGA_ISPARITY : ret = m_fga002[FGA_ISPARITY]; LOG(("FGA_ISPARITY returns %02x - not implemented\n", ret)); break; + case FGA_DMARUNCTL : ret = m_fga002[FGA_DMARUNCTL]; LOG(("FGA_DMARUNCTL returns %02x - not implemented\n", ret)); break; + case FGA_ISABORT : ret = m_fga002[FGA_ISABORT]; LOG(("FGA_ISABORT returns %02x - not implemented\n", ret)); break; + case FGA_ISFMB0MES : ret = m_fga002[FGA_ISFMB0MES]; LOG(("FGA_ISFMB0MES returns %02x - not implemented\n", ret)); break; + case FGA_ISFMB1MES : ret = m_fga002[FGA_ISFMB1MES]; LOG(("FGA_ISFMB1MES returns %02x - not implemented\n", ret)); break; + case FGA_ABORTPIN : ret = m_fga002[FGA_ABORTPIN]; LOG(("FGA_ABORTPIN returns %02x - not implemented\n", ret)); break; + case FGA_TIM0COUNT : ret = do_fga002reg_tim0count_r(); break; + default: + LOG(("Unsupported register %04x\n", offset)); + } + return ret; +} diff --git a/src/devices/machine/fga002.h b/src/devices/machine/fga002.h new file mode 100644 index 00000000000..80401da5b84 --- /dev/null +++ b/src/devices/machine/fga002.h @@ -0,0 +1,181 @@ +// license:BSD-3-Clause +// copyright-holders:Joakim Larsson Edstrom +#ifndef __FGA002_H__ +#define __FGA002_H__ + +#include "emu.h" + +#define MCFG_FGA002_ADD(_tag, _clock) MCFG_DEVICE_ADD(_tag, FGA002, _clock) + +//************************************************************************** +// TYPE DEFINITIONS +//************************************************************************** + +// ======================> fga002_device + +class fga002_device : public device_t +{ + public: + // construction/destruction + fga002_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT32 variant, const char *shortname, const char *source); + fga002_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + + DECLARE_WRITE8_MEMBER (write); + DECLARE_READ8_MEMBER (read); + protected: + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; + virtual void device_timer (emu_timer &timer, device_timer_id id, int param, void *ptr) override; + private: + UINT8 m_tim0count; + UINT8 m_fga002[0x500]; + + /* Timer functions */ + UINT8 do_fga002reg_tim0preload_r(); + void do_fga002reg_tim0preload_w(UINT8 data); + UINT8 do_fga002reg_tim0ctl_r(); + void do_fga002reg_tim0ctl_w(UINT8 data); + UINT8 do_fga002reg_tim0count_r(); + void do_fga002reg_tim0count_w(UINT8 data); + UINT8 do_fga002reg_icrtim0_r(); + void do_fga002reg_icrtim0_w(UINT8 data); + UINT8 do_fga002reg_istim0_r(); + void do_fga002reg_istim0_w(UINT8 data); + emu_timer *fga_timer; + enum + { + TIMER_ID_FGA + }; + enum { + REG_TIM0CTL_ZERO_STOP = 0x80, + REG_TIM0CTL_AUTOPRELOAD = 0x40, + REG_TIM0CTL_SYSFAIL = 0x20, + REG_TIM0CTL_START_STOP = 0x10, + REG_TIM0CTL_CLK_MSK = 0x0f, + REG_TIM0CTL_CLK_1_MIC = 0x00, + REG_TIM0CTL_CLK_2_MIC = 0x01, + REG_TIM0CTL_CLK_4_MIC = 0x02, + REG_TIM0CTL_CLK_8_MIC = 0x03, + REG_TIM0CTL_CLK_16_MIC = 0x04, + REG_TIM0CTL_CLK_32_MIC = 0x05, + REG_TIM0CTL_CLK_64_MIC = 0x06, + REG_TIM0CTL_CLK_128_MIC = 0x07, + REG_TIM0CTL_CLK_256_MIC = 0x08, + REG_TIM0CTL_CLK_512_MIC = 0x09, + REG_TIM0CTL_CLK_2_MIL = 0x0a, + REG_TIM0CTL_CLK_8_MIL = 0x0b, + REG_TIM0CTL_CLK_32_MIL = 0x0c, + REG_TIM0CTL_CLK_125_MIL = 0x0d, + REG_TIM0CTL_CLK_500_MIL = 0x0e, + REG_TIM0CTL_CLK_2_SEC = 0x0f, + }; + enum { + REG_ISTIM0_TIM_INT = 0x80, + }; + + /* Register offsets */ + enum { + FGA_ICRMBOX0 = 0x0000, + FGA_ICRMBOX1 = 0x0004, + FGA_ICRMBOX2 = 0x0008, + FGA_ICRMBOX3 = 0x000c, + FGA_ICRMBOX4 = 0x0010, + FGA_ICRMBOX5 = 0x0014, + FGA_ICRMBOX6 = 0x0018, + FGA_ICRMBOX7 = 0x001C, + FGA_VMEPAGE = 0x0200, + FGA_ICRVME1 = 0x0204, + FGA_ICRVME2 = 0x0208, + FGA_ICRVME3 = 0x020c, + FGA_ICRVME4 = 0x0210, + FGA_ICRVME5 = 0x0214, + FGA_ICRVME6 = 0x0218, + FGA_ICRVME7 = 0x021c, + FGA_ICRTIM0 = 0x0220, + FGA_ICRDMANORM = 0x0230, + FGA_ICRDMAERR = 0x0234, + FGA_CTL1 = 0x0238, + FGA_CTL2 = 0x023c, + FGA_ICRFMB0REF = 0x0240, + FGA_ICRFMB1REF = 0x0244, + FGA_ICRFMB0MES = 0x0248, + FGA_ICRFMB1MES = 0x024c, + FGA_CTL3 = 0x0250, + FGA_CTL4 = 0x0254, + FGA_ICRPARITY = 0x0258, + FGA_AUXPINCTL = 0x0260, + FGA_CTL5 = 0x0264, + FGA_AUXFIFWEX = 0x0268, + FGA_AUXFIFREX = 0x026c, + FGA_CTL6 = 0x0270, + FGA_CTL7 = 0x0274, + FGA_CTL8 = 0x0278, + FGA_CTL9 = 0x027c, + FGA_ICRABORT = 0x0280, + FGA_ICRACFAIL = 0x0284, + FGA_ICRSYSFAIL = 0x0288, + FGA_ICRLOCAL0 = 0x028c, + FGA_ICRLOCAL1 = 0x0290, + FGA_ICRLOCAL2 = 0x0294, + FGA_ICRLOCAL3 = 0x0298, + FGA_ICRLOCAL4 = 0x029c, + FGA_ICRLOCAL5 = 0x02a0, + FGA_ICRLOCAL6 = 0x02a4, + FGA_ICRLOCAL7 = 0x02a8, + FGA_ENAMCODE = 0x02b4, + FGA_CTL10 = 0x02c0, + FGA_CTL11 = 0x02c4, + FGA_MAINUM = 0x02c8, + FGA_MAINUU = 0x02cc, + FGA_BOTTOMPAGEU = 0x02d0, + FGA_BOTTOMPAGEL = 0x02d4, + FGA_TOPPAGEU = 0x02d8, + FGA_TOPPAGEL = 0x02dc, + FGA_MYVMEPAGE = 0x02fc, + FGA_TIM0PRELOAD = 0x0300, + FGA_TIM0CTL = 0x0310, + FGA_DMASRCATT = 0x0320, + FGA_DMADSTATT = 0x0324, + FGA_DMA_GENERAL = 0x0328, + FGA_CTL12 = 0x032c, + FGA_LIOTIMING = 0x0330, + FGA_LOCALIACK = 0x0334, + FGA_FMBCTL = 0x0338, + FGA_FMBAREA = 0x033c, + FGA_AUXSRCSTART = 0x0340, + FGA_AUXDSTSTART = 0x0344, + FGA_AUXSRCTERM = 0x0348, + FGA_AUXDSTTERM = 0x034c, + FGA_CTL13 = 0x0350, + FGA_CTL14 = 0x0354, + FGA_CTL15 = 0x0358, + FGA_CTL16 = 0x035c, + FGA_SPECIALENA = 0x0424, + FGA_ISTIM0 = 0x04a0, + FGA_ISDMANORM = 0x04b0, + FGA_ISDMAERR = 0x04b4, + FGA_ISFMB0REF = 0x04b8, + FGA_ISFMB1REF = 0x04bc, + FGA_ISPARITY = 0x04c0, + FGA_DMARUNCTL = 0x04c4, + FGA_ISABORT = 0x04c8, + FGA_ISACFAIL = 0x04cc, + FGA_ISFMB0MES = 0x04e0, + FGA_ISFMB1MES = 0x04e4, + FGA_ISSYSFAIL = 0x04d0, + FGA_ABORTPIN = 0x04d4, + FGA_RSVMECALL = 0x04f0, + FGA_RSKEYRES = 0x04f4, + FGA_RSCPUCALL = 0x04f8, + FGA_RSLOCSW = 0x04fc, + FGA_TIM0COUNT = 0x0c00, + }; + +}; + + +// device type definition +extern const device_type FGA002; +#endif // __FGA002_H__ + diff --git a/src/devices/machine/scnxx562.cpp b/src/devices/machine/scnxx562.cpp index ca217d61d1d..cbd3f67a861 100644 --- a/src/devices/machine/scnxx562.cpp +++ b/src/devices/machine/scnxx562.cpp @@ -150,10 +150,14 @@ duscc_device::duscc_device(const machine_config &mconfig, device_type type, cons m_out_dtra_cb(*this), m_out_rtsa_cb(*this), m_out_synca_cb(*this), + m_out_rtxca_cb(*this), + m_out_trxca_cb(*this), m_out_txdb_cb(*this), m_out_dtrb_cb(*this), m_out_rtsb_cb(*this), m_out_syncb_cb(*this), + m_out_rtxcb_cb(*this), + m_out_trxcb_cb(*this), m_out_int_cb(*this), m_variant(variant), m_gsr(0), @@ -174,10 +178,14 @@ duscc_device::duscc_device(const machine_config &mconfig, const char *tag, devic m_out_dtra_cb(*this), m_out_rtsa_cb(*this), m_out_synca_cb(*this), + m_out_rtxca_cb(*this), + m_out_trxca_cb(*this), m_out_txdb_cb(*this), m_out_dtrb_cb(*this), m_out_rtsb_cb(*this), m_out_syncb_cb(*this), + m_out_rtxcb_cb(*this), + m_out_trxcb_cb(*this), m_out_int_cb(*this), m_variant(TYPE_DUSCC), m_gsr(0), @@ -208,16 +216,22 @@ duscc68C562_device::duscc68C562_device(const machine_config &mconfig, const char void duscc_device::device_start() { LOG(("%s\n", FUNCNAME)); + // resolve callbacks m_out_txda_cb.resolve_safe(); m_out_dtra_cb.resolve_safe(); m_out_rtsa_cb.resolve_safe(); m_out_synca_cb.resolve_safe(); + m_out_rtxca_cb.resolve_safe(); + m_out_trxca_cb.resolve_safe(); m_out_txdb_cb.resolve_safe(); m_out_dtrb_cb.resolve_safe(); m_out_rtsb_cb.resolve_safe(); m_out_syncb_cb.resolve_safe(); + m_out_rtxcb_cb.resolve_safe(); + m_out_trxcb_cb.resolve_safe(); + m_out_int_cb.resolve_safe(); // state saving - stuff with runtime values @@ -531,6 +545,10 @@ duscc_channel::duscc_channel(const machine_config &mconfig, const char *tag, dev = m_cid = /*m_ivr = m_icr = m_sea = m_ivrm = */ m_mrr = m_ier1 = m_ier2 = m_ier3 = m_trcr = m_rflr = m_ftlr = m_trmsr = m_telr = 0; + // Reset all states + m_rtxc = 0; + m_trxc = 0; + for (auto & elem : m_rx_data_fifo) elem = 0; for (auto & elem : m_rx_error_fifo) @@ -559,6 +577,11 @@ void duscc_channel::device_start() m_cid = (m_uart->m_variant & SET_CMOS) ? 0x7f : 0xff; // TODO: support CMOS rev A = 0xbf + // Timers + duscc_timer = timer_alloc(TIMER_ID); + rtxc_timer = timer_alloc(TIMER_ID_RTXC); + trxc_timer = timer_alloc(TIMER_ID_TRXC); + // state saving save_item(NAME(m_cmr1)); save_item(NAME(m_cmr2)); @@ -600,6 +623,8 @@ void duscc_channel::device_start() save_item(NAME(m_ftlr)); save_item(NAME(m_trmsr)); save_item(NAME(m_telr)); + save_item(NAME(m_rtxc)); + save_item(NAME(m_trxc)); save_item(NAME(m_rx_data_fifo)); save_item(NAME(m_rx_error_fifo)); save_item(NAME(m_rx_fifo_rp)); @@ -665,6 +690,9 @@ void duscc_channel::device_reset() m_ftlr =0x33; m_trmsr =0x00; m_telr =0x10; + m_rtxc =0x00; + m_trxc =0x00; + // reset external lines TODO: check relation to control bits and reset set_rts(1); @@ -681,10 +709,220 @@ void duscc_channel::device_reset() void duscc_channel::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) { + switch(id) + { + case TIMER_ID: + if (m_ct-- == 0) // Zero detect + { + m_ictsr |= REG_ICTSR_ZERO_DET; // set zero detection bit + + // Generate interrupt? + if ( ( (m_ctcr & REG_CTCR_ZERO_DET_INT) == 1 ) && + ( (m_uart->m_icr & (m_index == duscc_device::CHANNEL_A ? duscc_device::REG_ICR_CHA : duscc_device::REG_ICR_CHB) ) != 0) ) + { + //trigger_interrupt(); + } + + // Preload or rollover? + if (( m_ctcr & REG_CTCR_ZERO_DET_CTL) == 0) + { + m_ct = m_ctpr; + } + else + { + m_ct = 0xffff; + } + + // Is Counter/Timer output on the RTxC pin? + if (( m_pcr & REG_PCR_RTXC_MASK) == REG_PCR_RTXC_CNTR_OUT) + { + if ((m_ctcr & REG_CTCR_TIM_OC) == 0) // Toggle? + { + m_rtxc = (~m_rtxc) & 1; + } + else // Pulse! + { + m_rtxc = 1; + rtxc_timer->adjust(attotime::from_hz(clock()), TIMER_ID_RTXC, attotime::from_hz(clock())); + } + if (m_index == duscc_device::CHANNEL_A) + m_uart->m_out_rtxca_cb(m_rtxc); + else + m_uart->m_out_rtxcb_cb(m_rtxc); + } + + // Is Counter/Timer output on the TRXC pin? + if (( m_pcr & REG_PCR_TRXC_MASK) == REG_PCR_TRXC_CNTR_OUT) + { + if ((m_ctcr & REG_CTCR_TIM_OC) == 0) // Toggle? + { + m_trxc = (~m_trxc) & 1; + } + else // Pulse! + { + m_trxc = 1; + trxc_timer->adjust(attotime::from_hz(clock()), TIMER_ID_TRXC, attotime::from_hz(clock())); + } + if (m_index == duscc_device::CHANNEL_A) + m_uart->m_out_trxca_cb(m_trxc); + else + m_uart->m_out_trxcb_cb(m_trxc); + } + } + else + { // clear zero detection bit + m_ictsr &= ~REG_ICTSR_ZERO_DET; + } + break; + case TIMER_ID_RTXC: // Terminate zero detection pulse + m_rtxc = 0; + rtxc_timer->adjust(attotime::never); + if (m_index == duscc_device::CHANNEL_A) + m_uart->m_out_rtxca_cb(m_rtxc); + else + m_uart->m_out_rtxcb_cb(m_rtxc); + break; + case TIMER_ID_TRXC: // Terminate zero detection pulse + m_trxc = 0; + trxc_timer->adjust(attotime::never); + if (m_index == duscc_device::CHANNEL_A) + m_uart->m_out_trxca_cb(m_trxc); + else + m_uart->m_out_trxcb_cb(m_trxc); + break; + default: + LOGR(("Unhandled Timer ID %d\n", id)); + break; + } // LOG(("%s %d\n", FUNCNAME, id)); device_serial_interface::device_timer(timer, id, param, ptr); } +/* The DUSCC 16 bit Timer + Counter/Timer Control and Value Registers + There are five registers in this set consisting of the following: + 1. Counterltimer control register (CTCRAlB). + 2. Counterltimer preset Highland Low registers (CTPRHAlB, CTPRLAlB). + 3. Counter/bmer (current value) High and Low registers (CTHAlB, CTLAlB) + The control register contains the operational information for the counterltimer. The preset registers contain the count which is + loaded into the counterltimer circuits. The third group contains the current value of the counterltimer as it operates. +*/ +/* Counter/Timer Control Register (CTCRA/CTCRB) + [7] Zero Detect Interrupt - This bit determines whether the assertion of the CIT ZERO COUNT status bit (ICTSR[6)) causes an + interrupt to be generated if set to 1 and the Master interrupt control bit (ICR[0:1]) is set + [6] Zero Detect Control - his bit determines the action of the counter upon reaching zero count + 0 - The counter/timer is preset to the value contained in the counterltimer preset registers (CTPRL, CTPRH) at the next clock edge. + 1 - The counterltimer continues counting without preset. The value at the next clock edge will be H'FFFF'. + [5] CounterlTimer Output Control - This bit selects the output waveform when the counterltimer is selected to be output on TRxC or RTxC. + 0 - The output toggles each time the CIT reaches zero count. The output is cleared to Low by either of the preset counterltimer commands. + 1 - The output is a single clock positive width pulse each time the CIT reaches zero count. (The duration of this pulse is one clock period.) + [4:3] Clock Select - This field selects whether the clock selected by [2:0J is prescaled prior to being applied to the input of the CIT. + 0 0 No prescaling. + 0 1 Divide clock by 16. + 1 0 Divide clock by 32. + 1 1 Divide clock by 64. + [2:0] Clock Source - This field selects the clock source for the counterltimer. + 000 RTxC pin. Pin must be programmed as input. + 001 TRxC pin. Pin must be programmed as input. + 010 Source is the crystal oscillator or system clock input divided by four. + 011 This selects a special mode of operation. In this mode the counter, after receiving the 'start CIT' command, delays the + start of counting until the RxD input goes Low. It continues counting until the RxD input goes High, then stops and sets + the CIT zero count status bit. The CPU can use the value in the CIT to determine the bit rate of the incoming data. + The clock is the crystal oscillator or system clock input divided by four. + 100 Source is the 32X BRG output selected by RTR[3:0J of own channel. + 101 Source is the 32X BRG output selected by TTR[3:0J of own channel. + 110 Source is the internal signal which loads received characters from the receive shift register into the receiver + FIFO. When operating in this mode, the FIFOed EOM status bit (RSR[7)) shall be set when the character which + causes the count to go to zero is loaded into the receive FIFO. + 111 Source is the internal signal which transfers characters from the data bus into the transmit FIFO. When operating in this + mode, and if the TEOM on zero count or done control bit (TPR[4)) is asserted, the FIFOed send EOM command will + be automatically asserted when the character which causes the count to go to zero is loaded into the transmit FIFO. +*/ +UINT8 duscc_channel::do_dusccreg_ctcr_r() +{ + LOG(("%s(%02x)\n", FUNCNAME, m_ctcr)); + return m_ctcr; +} + +void duscc_channel::do_dusccreg_ctcr_w(UINT8 data) +{ + LOG(("%s(%02x) - not supported yet\n", FUNCNAME, data)); + m_ctcr = data; + return; +} + +/* Counterrrimer Preset High Register (CTPRHA, CTPRHB) + [7:0) MSB - This register contains the eight most significant bits of the value loaded into the counter/timer upon receipt of the load CIT + from preset regsiter command or when.the counter/timer reaches zero count and the zero detect control bit (CTCR[6]) is negated. + The minimum 16-bit counter/timer preset value is H'0002'. +*/ +UINT8 duscc_channel::do_dusccreg_ctprh_r() +{ + UINT8 ret = ((m_ctpr >> 8) & 0xff ); + LOG(("%s(%02x)\n", FUNCNAME, ret)); + + // return m_ctprh; + return ret; +} + +void duscc_channel::do_dusccreg_ctprh_w(UINT8 data) +{ + LOG(("%s(%02x) - not supported yet\n", FUNCNAME, data)); + // m_ctprh = data; + m_ctpr &= ~0x0000ff00; + m_ctpr |= ((data << 8) & 0x0000ff00); + return; +} + +/* CounterfTimer Preset Low Register (CTPRLA, CTPRLB) + [7:0) lSB - This register contains the eight least significant bits of the value loaded into the counter/timer upon receipt of the load CIT + from preset register command or when the counter/timer reaches zero count and the zero detect control bit (CTCR[6]) is negated. + The minimum 16-bit counter/timer preset value is H'0002'. +*/ +UINT8 duscc_channel::do_dusccreg_ctprl_r() +{ + UINT8 ret = (m_ctpr & 0xff); + LOG(("%s(%02x)\n", FUNCNAME, ret)); + // return m_ctprl; + return ret; +} + +void duscc_channel::do_dusccreg_ctprl_w(UINT8 data) +{ + LOG(("%s(%02x) - not supported yet\n", FUNCNAME, data)); + // m_ctprl = data; + m_ctpr &= ~0x000000ff; + m_ctpr |= (data & 0x000000ff); + return; +} + +/* Counter/Timer High Register (CTHA, CTHB) Read only + [7:0] MSB - A read of this 'register' provides the eight most significant bits of the current value of the counter/timer. it is + recommended that the CIT be stopped via a stop counter command before it is read in order to prevent errors which may occur due to + the read being performed while the CIT is changing. This count may be continued after the register is read. +*/ + +UINT8 duscc_channel::do_dusccreg_cth_r() +{ + UINT8 ret = ((m_ct >> 8) & 0xff ); + LOG(("%s(%02x)\n", FUNCNAME, ret)); + + return ret; +} + + +/* Counter/Timer Low Register (CTLA, CTLB) Read only + [7:0] lSB - A read of this 'register' provides the eight least significant bits of the current value of the counter/timer. It is + recommended that the CIT be stopped via a stop counter command before it is read, in order to prevent errors which may occur due to + the read being performed while the CIT is changing. This count may be continued after the register is read. +*/ +UINT8 duscc_channel::do_dusccreg_ctl_r() +{ + UINT8 ret = (m_ct & 0xff); + LOG(("%s(%02x)\n", FUNCNAME, ret)); + // return m_ctl; + return ret; +} //------------------------------------------------- // tra_callback - @@ -943,51 +1181,12 @@ UINT8 duscc_channel::do_dusccreg_rtr_r() return m_rtr; } -UINT8 duscc_channel::do_dusccreg_ctprh_r() -{ - UINT8 ret = ((m_ctpr >> 8) & 0xff ); - LOG(("%s(%02x)\n", FUNCNAME, ret)); - - // return m_ctprh; - return ret; -} - -UINT8 duscc_channel::do_dusccreg_ctprl_r() -{ - UINT8 ret = (m_ctpr & 0xff); - LOG(("%s(%02x)\n", FUNCNAME, ret)); - // return m_ctprl; - return ret; -} - -UINT8 duscc_channel::do_dusccreg_ctcr_r() -{ - LOG(("%s(%02x)\n", FUNCNAME, m_ctcr)); - return m_ctcr; -} - UINT8 duscc_channel::do_dusccreg_omr_r() { LOG(("%s(%02x)\n", FUNCNAME, m_omr)); return m_omr; } -UINT8 duscc_channel::do_dusccreg_cth_r() -{ - UINT8 ret = ((m_ct >> 8) & 0xff ); - LOG(("%s(%02x)\n", FUNCNAME, ret)); - - return ret; -} - -UINT8 duscc_channel::do_dusccreg_ctl_r() -{ - UINT8 ret = (m_ct & 0xff); - LOG(("%s(%02x)\n", FUNCNAME, ret)); - // return m_ctl; - return ret; -} - UINT8 duscc_channel::do_dusccreg_pcr_r() { LOG(("%s(%02x)\n", FUNCNAME, m_pcr)); @@ -1595,31 +1794,6 @@ void duscc_channel::do_dusccreg_rtr_w(UINT8 data) return; } -void duscc_channel::do_dusccreg_ctprh_w(UINT8 data) -{ - LOG(("%s(%02x) - not supported yet\n", FUNCNAME, data)); - // m_ctprh = data; - m_ctpr &= ~0x0000ff00; - m_ctpr |= ((data << 8) & 0x0000ff00); - return; -} - -void duscc_channel::do_dusccreg_ctprl_w(UINT8 data) -{ - LOG(("%s(%02x) - not supported yet\n", FUNCNAME, data)); - // m_ctprl = data; - m_ctpr &= ~0x000000ff; - m_ctpr |= (data & 0x000000ff); - return; -} - -void duscc_channel::do_dusccreg_ctcr_w(UINT8 data) -{ - LOG(("%s(%02x) - not supported yet\n", FUNCNAME, data)); - m_ctcr = data; - return; -} - /* Output and Miscellaneous Register (OMRA, OMRB) [7:5] Transmitted Residual Character Length - In BOP modes, this field determines the number of bits transmitted for the last character in the information field. This length applies to: @@ -1744,6 +1918,8 @@ void duscc_channel::do_dusccreg_pcr_w(UINT8 data) */ void duscc_channel::do_dusccreg_ccr_w(UINT8 data) { + int rate; + m_ccr = data; LOG(("%s\n", FUNCNAME)); switch(m_ccr) @@ -1810,6 +1986,33 @@ void duscc_channel::do_dusccreg_ccr_w(UINT8 data) m_rcv = 0; m_uart->m_gsr &= ~(m_index == duscc_device::CHANNEL_A ? REG_GSR_CHAN_A_RXREADY : REG_GSR_CHAN_B_RXREADY); break; + + // COUNTER/TIMER COMMANDS + + /* Start. Starts the counteritimer and prescaler. */ + case REG_CCR_START_TIMER: LOG(("- Start Counter/Timer\n")); + rate = 100; // TODO: calculate correct rate + duscc_timer->adjust(attotime::from_hz(rate), TIMER_ID_RTXC, attotime::from_hz(rate)); + break; + + /* Stop. Stops the counter/timer and prescaler. Since the command may be asynchronous with the selected clock source, + the counter/timer and/or prescaler may count one or more additional cycles before stopping.. */ + case REG_CCR_STOP_TIMER: LOG(("- Stop Counter/Timer\n")); + duscc_timer->adjust(attotime::never); + break; + + /* Preset to FFFF. Presets the counter timer to H'FFFF' and the prescaler to its initial value. This command causes the + C/T output to go Low.*/ + case REG_CCR_PRST_FFFF: LOG(("- Preset 0xffff to Counter/Timer\n")); + m_ct = 0xffff; + break; + + /* Preset from CTPRH/CTPRL. Transfers the current value in the counter/timer preset registers to the counter/timer and + presets the prescaler to its initial value. This command causes the C/T output to go Low. */ + case REG_CCR_PRST_CTPR: LOG(("- Preset CTPR to Counter/Timer\n")); + m_ct = m_ctpr; + break; + default: LOG((" - command %02x not implemented yet\n", data)); } return; diff --git a/src/devices/machine/scnxx562.h b/src/devices/machine/scnxx562.h index 636122aa665..ee07df1b124 100644 --- a/src/devices/machine/scnxx562.h +++ b/src/devices/machine/scnxx562.h @@ -87,6 +87,12 @@ #define MCFG_DUSCC_OUT_SYNCA_CB(_devcb) \ devcb = &duscc_device::set_out_synca_callback(*device, DEVCB_##_devcb); +#define MCFG_DUSCC_OUT_TRXCA_CB(_devcb) \ + devcb = &duscc_device::set_out_trxca_callback(*device, DEVCB_##_devcb); + +#define MCFG_DUSCC_OUT_RTXCA_CB(_devcb) \ + devcb = &duscc_device::set_out_rtxca_callback(*device, DEVCB_##_devcb); + // Port B callbacks #define MCFG_DUSCC_OUT_TXDB_CB(_devcb) \ devcb = &duscc_device::set_out_txdb_callback(*device, DEVCB_##_devcb); @@ -100,7 +106,11 @@ #define MCFG_DUSCC_OUT_SYNCB_CB(_devcb) \ devcb = &duscc_device::set_out_syncb_callback(*device, DEVCB_##_devcb); +#define MCFG_DUSCC_OUT_TRXCB_CB(_devcb) \ + devcb = &duscc_device::set_out_trxcb_callback(*device, DEVCB_##_devcb); +#define MCFG_DUSCC_OUT_RTXCB_CB(_devcb) \ + devcb = &duscc_device::set_out_rtxcb_callback(*device, DEVCB_##_devcb); //************************************************************************** // TYPE DEFINITIONS @@ -280,7 +290,11 @@ protected: REG_CCR_DISABLE_TX = 0x03, REG_CCR_RESET_RX = 0x40, REG_CCR_ENABLE_RX = 0x42, - REG_CCR_DISABLE_RX = 0x43 + REG_CCR_DISABLE_RX = 0x43, + REG_CCR_START_TIMER = 0x80, + REG_CCR_STOP_TIMER = 0x81, + REG_CCR_PRST_FFFF = 0x82, + REG_CCR_PRST_CTPR = 0x83, }; enum @@ -406,6 +420,7 @@ protected: enum { + REG_ICTSR_ZERO_DET = 0x40, REG_ICTSR_DELTA_CTS = 0x10, REG_ICTSR_DCD = 0x08, REG_ICTSR_CTS = 0x04, @@ -472,10 +487,25 @@ protected: REG_TELR = 0x5f, }; + // Timers + emu_timer *duscc_timer; + emu_timer *rtxc_timer; + emu_timer *trxc_timer; + + UINT8 m_rtxc; + UINT8 m_trxc; + + + enum + { + REG_CTCR_ZERO_DET_INT = 0x80, + REG_CTCR_ZERO_DET_CTL = 0x40, + REG_CTCR_TIM_OC = 0x20, + }; + enum { - TIMER_ID_BAUD, - TIMER_ID_XTAL, + TIMER_ID, TIMER_ID_RTXC, TIMER_ID_TRXC }; @@ -581,11 +611,15 @@ public: template<class _Object> static devcb_base &set_out_dtra_callback(device_t &device, _Object object) { return downcast<duscc_device &>(device).m_out_dtra_cb.set_callback(object); } template<class _Object> static devcb_base &set_out_rtsa_callback(device_t &device, _Object object) { return downcast<duscc_device &>(device).m_out_rtsa_cb.set_callback(object); } template<class _Object> static devcb_base &set_out_synca_callback(device_t &device, _Object object) { return downcast<duscc_device &>(device).m_out_synca_cb.set_callback(object); } + template<class _Object> static devcb_base &set_out_rtxca_callback(device_t &device, _Object object) { return downcast<duscc_device &>(device).m_out_rtxca_cb.set_callback(object); } + template<class _Object> static devcb_base &set_out_trxca_callback(device_t &device, _Object object) { return downcast<duscc_device &>(device).m_out_trxca_cb.set_callback(object); } template<class _Object> static devcb_base &set_out_txdb_callback(device_t &device, _Object object) { return downcast<duscc_device &>(device).m_out_txdb_cb.set_callback(object); } template<class _Object> static devcb_base &set_out_dtrb_callback(device_t &device, _Object object) { return downcast<duscc_device &>(device).m_out_dtrb_cb.set_callback(object); } template<class _Object> static devcb_base &set_out_rtsb_callback(device_t &device, _Object object) { return downcast<duscc_device &>(device).m_out_rtsb_cb.set_callback(object); } template<class _Object> static devcb_base &set_out_syncb_callback(device_t &device, _Object object) { return downcast<duscc_device &>(device).m_out_syncb_cb.set_callback(object); } + template<class _Object> static devcb_base &set_out_rtxcb_callback(device_t &device, _Object object) { return downcast<duscc_device &>(device).m_out_rtxcb_cb.set_callback(object); } + template<class _Object> static devcb_base &set_out_trxcb_callback(device_t &device, _Object object) { return downcast<duscc_device &>(device).m_out_trxcb_cb.set_callback(object); } static void configure_channels(device_t &device, int rxa, int txa, int rxb, int txb) { @@ -674,11 +708,15 @@ protected: devcb_write_line m_out_dtra_cb; devcb_write_line m_out_rtsa_cb; devcb_write_line m_out_synca_cb; + devcb_write_line m_out_rtxca_cb; + devcb_write_line m_out_trxca_cb; devcb_write_line m_out_txdb_cb; devcb_write_line m_out_dtrb_cb; devcb_write_line m_out_rtsb_cb; devcb_write_line m_out_syncb_cb; + devcb_write_line m_out_rtxcb_cb; + devcb_write_line m_out_trxcb_cb; devcb_write_line m_out_int_cb; diff --git a/src/emu/diimage.cpp b/src/emu/diimage.cpp index ebf7804fbad..52ad80910f5 100644 --- a/src/emu/diimage.cpp +++ b/src/emu/diimage.cpp @@ -148,10 +148,10 @@ void device_image_interface::device_compute_hash(hash_collection &hashes, const hashes.compute(reinterpret_cast<const UINT8 *>(data), length, types); } -/*------------------------------------------------- - set_image_filename - specifies the filename of - an image --------------------------------------------------*/ +//------------------------------------------------- +// set_image_filename - specifies the filename of +// an image +//------------------------------------------------- image_error_t device_image_interface::set_image_filename(const char *filename) { @@ -189,28 +189,29 @@ image_error_t device_image_interface::set_image_filename(const char *filename) CREATION FORMATS ****************************************************************************/ -/*------------------------------------------------- - device_get_named_creatable_format - - accesses a specific image format available for - image creation by name --------------------------------------------------*/ +//------------------------------------------------- +// device_get_named_creatable_format - +// accesses a specific image format available for +// image creation by name +//------------------------------------------------- const image_device_format *device_image_interface::device_get_named_creatable_format(const char *format_name) { for (auto &format : m_formatlist) - if (strcmp(format->name(), format_name) == 0) + if (strcmp(format->name().c_str(), format_name) == 0) return format.get(); return nullptr; } + /**************************************************************************** ERROR HANDLING ****************************************************************************/ -/*------------------------------------------------- - image_clear_error - clear out any specified - error --------------------------------------------------*/ +//------------------------------------------------- +// image_clear_error - clear out any specified +// error +//------------------------------------------------- void device_image_interface::clear_error() { @@ -223,10 +224,11 @@ void device_image_interface::clear_error() -/*------------------------------------------------- - error - returns the error text for an image - error --------------------------------------------------*/ +//------------------------------------------------- +// error - returns the error text for an image +// error +//------------------------------------------------- + static const char *const messages[] = { "", @@ -246,9 +248,9 @@ const char *device_image_interface::error() -/*------------------------------------------------- - seterror - specifies an error on an image --------------------------------------------------*/ +//------------------------------------------------- +// seterror - specifies an error on an image +//------------------------------------------------- void device_image_interface::seterror(image_error_t err, const char *message) { @@ -262,10 +264,10 @@ void device_image_interface::seterror(image_error_t err, const char *message) -/*------------------------------------------------- - message - used to display a message while - loading --------------------------------------------------*/ +//------------------------------------------------- +// message - used to display a message while +// loading +//------------------------------------------------- void device_image_interface::message(const char *format, ...) { @@ -288,11 +290,12 @@ void device_image_interface::message(const char *format, ...) WORKING DIRECTORIES ***************************************************************************/ -/*------------------------------------------------- - try_change_working_directory - tries to change - the working directory, but only if the directory - actually exists --------------------------------------------------*/ +//------------------------------------------------- +// try_change_working_directory - tries to change +// the working directory, but only if the directory +// actually exists +//------------------------------------------------- + bool device_image_interface::try_change_working_directory(const char *subdir) { const osd::directory::entry *entry; @@ -314,26 +317,28 @@ bool device_image_interface::try_change_working_directory(const char *subdir) directory.reset(); } - /* did we successfully identify the directory? */ + // did we successfully identify the directory? if (success) m_working_directory = util::zippath_combine(m_working_directory.c_str(), subdir); return success; } -/*------------------------------------------------- - setup_working_directory - sets up the working - directory according to a few defaults --------------------------------------------------*/ + + +//------------------------------------------------- +// setup_working_directory - sets up the working +// directory according to a few defaults +//------------------------------------------------- void device_image_interface::setup_working_directory() { - /* first set up the working directory to be the starting directory */ + // first set up the working directory to be the starting directory osd_get_full_path(m_working_directory, "."); - /* now try browsing down to "software" */ + // now try browsing down to "software" if (try_change_working_directory("software")) { - /* now down to a directory for this computer */ + // now down to a directory for this computer int gamedrv = driver_list::find(device().machine().system()); while(gamedrv != -1 && !try_change_working_directory(driver_list::driver(gamedrv).name)) { @@ -342,6 +347,7 @@ void device_image_interface::setup_working_directory() } } + //------------------------------------------------- // working_directory - returns the working // directory to use for this image; this is @@ -350,7 +356,7 @@ void device_image_interface::setup_working_directory() const char * device_image_interface::working_directory() { - /* check to see if we've never initialized the working directory */ + // check to see if we've never initialized the working directory if (m_working_directory.empty()) setup_working_directory(); @@ -358,9 +364,9 @@ const char * device_image_interface::working_directory() } -/*------------------------------------------------- - get_software_region --------------------------------------------------*/ +//------------------------------------------------- +// get_software_region +//------------------------------------------------- UINT8 *device_image_interface::get_software_region(const char *tag) { @@ -375,9 +381,9 @@ UINT8 *device_image_interface::get_software_region(const char *tag) } -/*------------------------------------------------- - image_get_software_region_length --------------------------------------------------*/ +//------------------------------------------------- +// image_get_software_region_length +//------------------------------------------------- UINT32 device_image_interface::get_software_region_length(const char *tag) { @@ -390,9 +396,9 @@ UINT32 device_image_interface::get_software_region_length(const char *tag) } -/*------------------------------------------------- - image_get_feature - -------------------------------------------------*/ +//------------------------------------------------- +// image_get_feature +//------------------------------------------------- const char *device_image_interface::get_feature(const char *feature_name) { @@ -418,12 +424,13 @@ bool device_image_interface::load_software_region(const char *tag, optional_shar return size > 0; } -/**************************************************************************** - Hash info loading - If the hash is not checked and the relevant info not loaded, force that info - to be loaded -****************************************************************************/ +// **************************************************************************** +// Hash info loading +// +// If the hash is not checked and the relevant info not loaded, force that info +// to be loaded +// **************************************************************************** void device_image_interface::run_hash(void (*partialhash)(hash_collection &, const unsigned char *, unsigned long, const char *), hash_collection &hashes, const char *types) @@ -437,7 +444,7 @@ void device_image_interface::run_hash(void (*partialhash)(hash_collection &, con buf.resize(size); memset(&buf[0], 0, size); - /* read the file */ + // read the file fseek(0, SEEK_SET); fread(&buf[0], size); @@ -446,7 +453,7 @@ void device_image_interface::run_hash(void (*partialhash)(hash_collection &, con else hashes.compute(&buf[0], size, types); - /* cleanup */ + // cleanup fseek(0, SEEK_SET); } @@ -456,20 +463,20 @@ void device_image_interface::image_checkhash() { device_image_partialhash_func partialhash; - /* only calculate CRC if it hasn't been calculated, and the open_mode is read only */ + // only calculate CRC if it hasn't been calculated, and the open_mode is read only UINT32 crcval; if (!m_hash.crc(crcval) && m_readonly && !m_created) { - /* do not cause a linear read of 600 megs please */ - /* TODO: use SHA1 in the CHD header as the hash */ + // do not cause a linear read of 600 megs please + // TODO: use SHA1 in the CHD header as the hash if (image_type() == IO_CDROM) return; - /* Skip calculating the hash when we have an image mounted through a software list */ + // Skip calculating the hash when we have an image mounted through a software list if ( m_software_info_ptr ) return; - /* retrieve the partial hash func */ + // retrieve the partial hash func partialhash = get_partial_hash(); run_hash(partialhash, m_hash, hash_collection::HASH_TYPES_ALL); @@ -487,20 +494,21 @@ UINT32 device_image_interface::crc() return crc; } -/**************************************************************************** - Battery functions +// **************************************************************************** +// Battery functions +// +// These functions provide transparent access to battery-backed RAM on an +// image; typically for cartridges. +// **************************************************************************** - These functions provide transparent access to battery-backed RAM on an - image; typically for cartridges. -****************************************************************************/ +//------------------------------------------------- +// battery_load - retrieves the battery +// backed RAM for an image. The file name is +// created from the machine driver name and the +// image name. +//------------------------------------------------- -/*------------------------------------------------- - battery_load - retrieves the battery - backed RAM for an image. The file name is - created from the machine driver name and the - image name. --------------------------------------------------*/ void device_image_interface::battery_load(void *buffer, int length, int fill) { assert_always(buffer && (length > 0), "Must specify sensical buffer/length"); @@ -515,7 +523,7 @@ void device_image_interface::battery_load(void *buffer, int length, int fill) if (filerr == osd_file::error::NONE) bytes_read = file.read(buffer, length); - /* fill remaining bytes (if necessary) */ + // fill remaining bytes (if necessary) memset(((char *)buffer) + bytes_read, fill, length - bytes_read); } @@ -527,35 +535,38 @@ void device_image_interface::battery_load(void *buffer, int length, void *def_bu int bytes_read = 0; std::string fname = std::string(device().machine().system().name).append(PATH_SEPARATOR).append(m_basename_noext.c_str()).append(".nv"); - /* try to open the battery file and read it in, if possible */ + // try to open the battery file and read it in, if possible emu_file file(device().machine().options().nvram_directory(), OPEN_FLAG_READ); filerr = file.open(fname.c_str()); if (filerr == osd_file::error::NONE) bytes_read = file.read(buffer, length); - /* if no file was present, copy the default battery */ + // if no file was present, copy the default battery if (bytes_read == 0 && def_buffer) memcpy((char *)buffer, (char *)def_buffer, length); } -/*------------------------------------------------- - battery_save - stores the battery - backed RAM for an image. The file name is - created from the machine driver name and the - image name. --------------------------------------------------*/ + +//------------------------------------------------- +// battery_save - stores the battery +// backed RAM for an image. The file name is +// created from the machine driver name and the +// image name. +//------------------------------------------------- + void device_image_interface::battery_save(const void *buffer, int length) { assert_always(buffer && (length > 0), "Must specify sensical buffer/length"); std::string fname = std::string(device().machine().system().name).append(PATH_SEPARATOR).append(m_basename_noext.c_str()).append(".nv"); - /* try to open the battery file and write it out, if possible */ + // try to open the battery file and write it out, if possible emu_file file(device().machine().options().nvram_directory(), OPEN_FLAG_WRITE | OPEN_FLAG_CREATE | OPEN_FLAG_CREATE_PATHS); osd_file::error filerr = file.open(fname.c_str()); if (filerr == osd_file::error::NONE) file.write(buffer, length); } + //------------------------------------------------- // uses_file_extension - update configuration // based on completed device setup @@ -583,38 +594,40 @@ bool device_image_interface::uses_file_extension(const char *file_extension) con return result; } -/**************************************************************************** - IMAGE LOADING -****************************************************************************/ -/*------------------------------------------------- - is_loaded - quick check to determine whether an - image is loaded --------------------------------------------------*/ +// *************************************************************************** +// IMAGE LOADING +// *************************************************************************** + +//------------------------------------------------- +// is_loaded - quick check to determine whether an +// image is loaded +//------------------------------------------------- bool device_image_interface::is_loaded() { return (m_file != nullptr); } -/*------------------------------------------------- - load_image_by_path - loads an image with a - specific path --------------------------------------------------*/ + +//------------------------------------------------- +// load_image_by_path - loads an image with a +// specific path +//------------------------------------------------- image_error_t device_image_interface::load_image_by_path(UINT32 open_flags, const char *path) { image_error_t err; std::string revised_path; - /* attempt to read the file */ + // attempt to read the file auto const filerr = util::zippath_fopen(path, open_flags, m_file, revised_path); - /* did the open succeed? */ + // did the open succeed? switch(filerr) { case osd_file::error::NONE: - /* success! */ + // success! m_readonly = (open_flags & OPEN_FLAG_WRITE) ? 0 : 1; m_created = (open_flags & OPEN_FLAG_CREATE) ? 1 : 0; err = IMAGE_ERROR_SUCCESS; @@ -622,17 +635,17 @@ image_error_t device_image_interface::load_image_by_path(UINT32 open_flags, cons case osd_file::error::NOT_FOUND: case osd_file::error::ACCESS_DENIED: - /* file not found (or otherwise cannot open); continue */ + // file not found (or otherwise cannot open); continue err = IMAGE_ERROR_FILENOTFOUND; break; case osd_file::error::OUT_OF_MEMORY: - /* out of memory */ + // out of memory err = IMAGE_ERROR_OUTOFMEMORY; break; case osd_file::error::ALREADY_OPEN: - /* this shouldn't happen */ + // this shouldn't happen err = IMAGE_ERROR_ALREADYOPEN; break; @@ -640,12 +653,12 @@ image_error_t device_image_interface::load_image_by_path(UINT32 open_flags, cons case osd_file::error::TOO_MANY_FILES: case osd_file::error::INVALID_DATA: default: - /* other errors */ + // other errors err = IMAGE_ERROR_INTERNAL; break; } - /* if successful, set the file name */ + // if successful, set the file name if (filerr == osd_file::error::NONE) set_image_filename(revised_path.c_str()); @@ -659,14 +672,14 @@ int device_image_interface::reopen_for_write(const char *path) image_error_t err; std::string revised_path; - /* attempt to open the file for writing*/ + // attempt to open the file for writing auto const filerr = util::zippath_fopen(path, OPEN_FLAG_READ|OPEN_FLAG_WRITE|OPEN_FLAG_CREATE, m_file, revised_path); - /* did the open succeed? */ + // did the open succeed? switch(filerr) { case osd_file::error::NONE: - /* success! */ + // success! m_readonly = 0; m_created = 1; err = IMAGE_ERROR_SUCCESS; @@ -674,17 +687,17 @@ int device_image_interface::reopen_for_write(const char *path) case osd_file::error::NOT_FOUND: case osd_file::error::ACCESS_DENIED: - /* file not found (or otherwise cannot open); continue */ + // file not found (or otherwise cannot open); continue err = IMAGE_ERROR_FILENOTFOUND; break; case osd_file::error::OUT_OF_MEMORY: - /* out of memory */ + // out of memory err = IMAGE_ERROR_OUTOFMEMORY; break; case osd_file::error::ALREADY_OPEN: - /* this shouldn't happen */ + // this shouldn't happen err = IMAGE_ERROR_ALREADYOPEN; break; @@ -692,28 +705,29 @@ int device_image_interface::reopen_for_write(const char *path) case osd_file::error::TOO_MANY_FILES: case osd_file::error::INVALID_DATA: default: - /* other errors */ + // other errors err = IMAGE_ERROR_INTERNAL; break; } - /* if successful, set the file name */ + // if successful, set the file name if (filerr == osd_file::error::NONE) set_image_filename(revised_path.c_str()); return err; } -/*------------------------------------------------- - determine_open_plan - determines which open - flags to use, and in what order --------------------------------------------------*/ + +//------------------------------------------------- +// determine_open_plan - determines which open +// flags to use, and in what order +//------------------------------------------------- void device_image_interface::determine_open_plan(int is_create, UINT32 *open_plan) { int i = 0; - /* emit flags */ + // emit flags if (!is_create && is_readable() && is_writeable()) open_plan[i++] = OPEN_FLAG_READ | OPEN_FLAG_WRITE; if (!is_create && !is_readable() && is_writeable()) @@ -725,11 +739,12 @@ void device_image_interface::determine_open_plan(int is_create, UINT32 *open_pla open_plan[i] = 0; } -/*------------------------------------------------- - dump_wrong_and_correct_checksums - dump an - error message containing the wrong and the - correct checksums for a given software item --------------------------------------------------*/ + +//------------------------------------------------- +// dump_wrong_and_correct_checksums - dump an +// error message containing the wrong and the +// correct checksums for a given software item +//------------------------------------------------- static void dump_wrong_and_correct_checksums(const hash_collection &hashes, const hash_collection &acthashes) { @@ -737,17 +752,18 @@ static void dump_wrong_and_correct_checksums(const hash_collection &hashes, cons osd_printf_error(" FOUND: %s\n", acthashes.macro_string().c_str()); } -/*------------------------------------------------- - verify_length_and_hash - verify the length - and hash signatures of a file --------------------------------------------------*/ + +//------------------------------------------------- +// verify_length_and_hash - verify the length +// and hash signatures of a file +//------------------------------------------------- static int verify_length_and_hash(emu_file *file, const char *name, UINT32 explength, const hash_collection &hashes) { int retVal = 0; if (file==nullptr) return 0; - /* verify length */ + // verify length UINT32 actlength = file->size(); if (explength != actlength) { @@ -755,21 +771,21 @@ static int verify_length_and_hash(emu_file *file, const char *name, UINT32 exple retVal++; } - /* If there is no good dump known, write it */ + // If there is no good dump known, write it hash_collection &acthashes = file->hashes(hashes.hash_types().c_str()); if (hashes.flag(hash_collection::FLAG_NO_DUMP)) { osd_printf_error("%s NO GOOD DUMP KNOWN\n", name); } - /* verify checksums */ + // verify checksums else if (hashes != acthashes) { - /* otherwise, it's just bad */ + // otherwise, it's just bad osd_printf_error("%s WRONG CHECKSUMS:\n", name); dump_wrong_and_correct_checksums(hashes, acthashes); retVal++; } - /* If it matches, but it is actually a bad dump, write it */ + // If it matches, but it is actually a bad dump, write it else if (hashes.flag(hash_collection::FLAG_BAD_DUMP)) { osd_printf_error("%s NEEDS REDUMP\n",name); @@ -777,9 +793,10 @@ static int verify_length_and_hash(emu_file *file, const char *name, UINT32 exple return retVal; } -/*------------------------------------------------- - load_software - software image loading --------------------------------------------------*/ + +//------------------------------------------------- +// load_software - software image loading +//------------------------------------------------- bool device_image_interface::load_software(software_list_device &swlist, const char *swname, const rom_entry *start) { @@ -789,11 +806,11 @@ bool device_image_interface::load_software(software_list_device &swlist, const c int warningcount = 0; for (region = start; region != nullptr; region = rom_next_region(region)) { - /* loop until we hit the end of this region */ + // loop until we hit the end of this region const rom_entry *romp = region + 1; while (!ROMENTRY_ISREGIONEND(romp)) { - /* handle files */ + // handle files if (ROMENTRY_ISFILE(romp)) { osd_file::error filerr = osd_file::error::NOT_FOUND; @@ -882,9 +899,10 @@ bool device_image_interface::load_software(software_list_device &swlist, const c return retVal; } -/*------------------------------------------------- - load_internal - core image loading --------------------------------------------------*/ + +//------------------------------------------------- +// load_internal - core image loading +//------------------------------------------------- bool device_image_interface::load_internal(const char *path, bool is_create, int create_format, option_resolution *create_args, bool just_load) { @@ -897,16 +915,16 @@ bool device_image_interface::load_internal(const char *path, bool is_create, int std::string pathstr(path); bool filename_has_period = (pathstr.find_last_of('.') != -1) ? TRUE : FALSE; - /* first unload the image */ + // first unload the image unload(); - /* clear any possible error messages */ + // clear any possible error messages clear_error(); - /* we are now loading */ + // we are now loading m_is_loading = TRUE; - /* record the filename */ + // record the filename m_err = set_image_filename(path); if (m_err) @@ -914,7 +932,7 @@ bool device_image_interface::load_internal(const char *path, bool is_create, int if (core_opens_image_file()) { - /* Check if there's a software list defined for this device and use that if we're not creating an image */ + // Check if there's a software list defined for this device and use that if we're not creating an image if (!filename_has_period && !just_load) { softload = load_software_part(path, m_software_part_ptr); @@ -941,20 +959,20 @@ bool device_image_interface::load_internal(const char *path, bool is_create, int if (is_create || filename_has_period) { - /* determine open plan */ + // determine open plan determine_open_plan(is_create, open_plan); - /* attempt to open the file in various ways */ + // attempt to open the file in various ways for (i = 0; !m_file && open_plan[i]; i++) { - /* open the file */ + // open the file m_err = load_image_by_path(open_plan[i], path); if (m_err && (m_err != IMAGE_ERROR_FILENOTFOUND)) goto done; } } - /* Copy some image information when we have been loaded through a software list */ + // Copy some image information when we have been loaded through a software list if ( m_software_info_ptr ) { // sanitize @@ -968,7 +986,7 @@ bool device_image_interface::load_internal(const char *path, bool is_create, int //m_playable = m_software_info_ptr->supported(); } - /* did we fail to find the file? */ + // did we fail to find the file? if (!is_loaded() && !softload) { m_err = IMAGE_ERROR_FILENOTFOUND; @@ -976,7 +994,7 @@ bool device_image_interface::load_internal(const char *path, bool is_create, int } } - /* call device load or create */ + // call device load or create m_create_format = create_format; m_create_args = create_args; @@ -985,7 +1003,7 @@ bool device_image_interface::load_internal(const char *path, bool is_create, int if (m_err) goto done; } - /* success! */ + // success! done: if (just_load) { @@ -1022,18 +1040,19 @@ done: -/*------------------------------------------------- - load - load an image into MESS --------------------------------------------------*/ +//------------------------------------------------- +// load - load an image into MAME +//------------------------------------------------- bool device_image_interface::load(const char *path) { return load_internal(path, FALSE, 0, nullptr, FALSE); } -/*------------------------------------------------- - open_image_file - opening plain image file --------------------------------------------------*/ + +//------------------------------------------------- +// open_image_file - opening plain image file +//------------------------------------------------- bool device_image_interface::open_image_file(emu_options &options) { @@ -1049,10 +1068,11 @@ bool device_image_interface::open_image_file(emu_options &options) return false; } -/*------------------------------------------------- - image_finish_load - special call - only use - from core --------------------------------------------------*/ + +//------------------------------------------------- +// image_finish_load - special call - only use +// from core +//------------------------------------------------- bool device_image_interface::finish_load() { @@ -1073,7 +1093,7 @@ bool device_image_interface::finish_load() } else { - /* using device load */ + // using device load err = call_load(); if (err) { @@ -1089,9 +1109,10 @@ bool device_image_interface::finish_load() return err; } -/*------------------------------------------------- - create - create a image --------------------------------------------------*/ + +//------------------------------------------------- +// create - create a image +//------------------------------------------------- bool device_image_interface::create(const char *path, const image_device_format *create_format, option_resolution *create_args) { @@ -1109,10 +1130,10 @@ bool device_image_interface::create(const char *path, const image_device_format } -/*------------------------------------------------- - clear - clear all internal data pertaining - to an image --------------------------------------------------*/ +//------------------------------------------------- +// clear - clear all internal data pertaining +// to an image +//------------------------------------------------- void device_image_interface::clear() { @@ -1136,9 +1157,10 @@ void device_image_interface::clear() m_software_list_name.clear(); } -/*------------------------------------------------- - unload - main call to unload an image --------------------------------------------------*/ + +//------------------------------------------------- +// unload - main call to unload an image +//------------------------------------------------- void device_image_interface::unload() { @@ -1150,9 +1172,10 @@ void device_image_interface::unload() clear_error(); } -/*------------------------------------------------- - update_names - update brief and instance names --------------------------------------------------*/ + +//------------------------------------------------- +// update_names - update brief and instance names +//------------------------------------------------- void device_image_interface::update_names(const device_type device_type, const char *inst, const char *brief) { @@ -1357,7 +1380,7 @@ std::string device_image_interface::software_get_default_slot(const char *defaul return result; } -/* ----------------------------------------------------------------------- */ +//---------------------------------------------------------------------------- static int image_fseek_thunk(void *file, INT64 offset, int whence) { @@ -1383,7 +1406,7 @@ static UINT64 image_fsize_thunk(void *file) return image->length(); } -/* ----------------------------------------------------------------------- */ +//---------------------------------------------------------------------------- struct io_procs image_ioprocs = { diff --git a/src/emu/diimage.h b/src/emu/diimage.h index 53b3f21eefb..92d87fc6b87 100644 --- a/src/emu/diimage.h +++ b/src/emu/diimage.h @@ -78,10 +78,10 @@ public: m_extensions(extensions), m_optspec(optspec) { } - const char *name() const { return m_name.c_str(); } - const char *description() const { return m_description.c_str(); } - const char *extensions() const { return m_extensions.c_str(); } - const char *optspec() const { return m_optspec.c_str(); } + const std::string &name() const { return m_name; } + const std::string &description() const { return m_description; } + const std::string &extensions() const { return m_extensions; } + const std::string &optspec() const { return m_optspec; } private: std::string m_name; @@ -133,6 +133,8 @@ typedef void (*device_image_partialhash_func)(hash_collection &, const unsigned class device_image_interface : public device_interface { public: + typedef std::vector<std::unique_ptr<image_device_format>> formatlist_type; + // construction/destruction device_image_interface(const machine_config &mconfig, device_t &device); virtual ~device_image_interface(); @@ -221,7 +223,7 @@ public: const char *instance_name() const { return m_instance_name.c_str(); } const char *brief_instance_name() const { return m_brief_instance_name.c_str(); } bool uses_file_extension(const char *file_extension) const; - const std::vector<std::unique_ptr<image_device_format>> &formatlist() const { return m_formatlist; } + const formatlist_type &formatlist() const { return m_formatlist; } bool load(const char *path); bool open_image_file(emu_options &options); @@ -315,7 +317,7 @@ protected: std::string m_instance_name; /* creation info */ - std::vector<std::unique_ptr<image_device_format>> m_formatlist; + formatlist_type m_formatlist; /* in the case of arcade cabinet with fixed carts inserted, we want to disable command line cart loading... */ diff --git a/src/frontend/mame/ui/filecreate.cpp b/src/frontend/mame/ui/filecreate.cpp index 584815e7de5..7ea9fc53173 100644 --- a/src/frontend/mame/ui/filecreate.cpp +++ b/src/frontend/mame/ui/filecreate.cpp @@ -136,41 +136,18 @@ FILE CREATE MENU ***************************************************************************/ //------------------------------------------------- -// is_valid_filename_char - tests to see if a -// character is valid in a filename -//------------------------------------------------- - -static int is_valid_filename_char(unicode_char unichar) -{ - // this should really be in the OSD layer, and it shouldn't be 7-bit bullshit - static const char valid_filename_char[] = - { - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 00-0f - 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 10-1f - 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 0, // !"#$%&'()*+,-./ - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, // 0123456789:;<=>? - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, // @ABCDEFGHIJKLMNO - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, // PQRSTUVWXYZ[\]^_ - 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, // `abcdefghijklmno - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, // pqrstuvwxyz{|}~ - }; - return (unichar < ARRAY_LENGTH(valid_filename_char)) && valid_filename_char[unichar]; -} - - -//------------------------------------------------- // ctor //------------------------------------------------- -menu_file_create::menu_file_create(mame_ui_manager &mui, render_container *container, device_image_interface *image, std::string ¤t_directory, std::string ¤t_file, bool *ok) +menu_file_create::menu_file_create(mame_ui_manager &mui, render_container *container, device_image_interface *image, std::string ¤t_directory, std::string ¤t_file, bool &ok) : menu(mui, container) , m_current_directory(current_directory) , m_current_file(current_file) , m_current_format(nullptr) + , m_ok(ok) { m_image = image; - m_ok = ok; - *m_ok = true; + m_ok = true; auto const sep = current_file.rfind(PATH_SEPARATOR); m_filename.reserve(1024); @@ -271,12 +248,12 @@ void menu_file_create::handle() case IPT_SPECIAL: if (get_selection() == ITEMREF_NEW_IMAGE_NAME) { - input_character(m_filename, event->unichar, &is_valid_filename_char); + input_character(m_filename, event->unichar, &osd_is_valid_filename_char); reset(reset_options::REMEMBER_POSITION); } break; case IPT_UI_CANCEL: - *m_ok = false; + m_ok = false; break; } } diff --git a/src/frontend/mame/ui/filecreate.h b/src/frontend/mame/ui/filecreate.h index f56386026d0..8935fcb1e47 100644 --- a/src/frontend/mame/ui/filecreate.h +++ b/src/frontend/mame/ui/filecreate.h @@ -38,7 +38,7 @@ private: class menu_file_create : public menu { public: - menu_file_create(mame_ui_manager &mui, render_container *container, device_image_interface *image, std::string ¤t_directory, std::string ¤t_file, bool *ok); + menu_file_create(mame_ui_manager &mui, render_container *container, device_image_interface *image, std::string ¤t_directory, std::string ¤t_file, bool &ok); virtual ~menu_file_create() override; virtual void populate() override; virtual void handle() override; @@ -52,7 +52,7 @@ private: std::string m_filename; protected: - bool * m_ok; + bool & m_ok; }; // ======================> menu_select_format diff --git a/src/frontend/mame/ui/floppycntrl.cpp b/src/frontend/mame/ui/floppycntrl.cpp index d09609dca9b..0fc1408f603 100644 --- a/src/frontend/mame/ui/floppycntrl.cpp +++ b/src/frontend/mame/ui/floppycntrl.cpp @@ -157,7 +157,7 @@ void menu_control_floppy_image::handle() break; case menu_select_rw::result::WRITE_OTHER: - menu::stack_push<menu_file_create>(ui(), container, image, m_current_directory, m_current_file, &create_ok); + menu::stack_push<menu_file_create>(ui(), container, image, m_current_directory, m_current_file, create_ok); state = CHECK_CREATE; break; diff --git a/src/frontend/mame/ui/imgcntrl.cpp b/src/frontend/mame/ui/imgcntrl.cpp index f58fb81bc33..e6521f931c0 100644 --- a/src/frontend/mame/ui/imgcntrl.cpp +++ b/src/frontend/mame/ui/imgcntrl.cpp @@ -278,7 +278,7 @@ void menu_control_device_image::handle() break; case menu_file_selector::result::CREATE: - menu::stack_push<menu_file_create>(ui(), container, image, m_current_directory, m_current_file, &create_ok); + menu::stack_push<menu_file_create>(ui(), container, image, m_current_directory, m_current_file, create_ok); state = CHECK_CREATE; break; diff --git a/src/mame/drivers/fccpu30.cpp b/src/mame/drivers/fccpu30.cpp index 37e293e5098..cfef6508309 100644 --- a/src/mame/drivers/fccpu30.cpp +++ b/src/mame/drivers/fccpu30.cpp @@ -19,52 +19,52 @@ * ||||--||_____________________________________________________________ * ||||--|| | * || || _ |__ - * || | | | - * || | | | - * || | | | - * || | | | - * || | | | - * || | | | - * || | |VME| - * || | | | - * || | |P1 | - * || | | | - * || | | | - * || | | | - * || | | | - * || | | | - * || | | | - * || |_| | - * || |___| - * || | - * || | - * || | - * || | - * || | - * || | - * || | - * || | - * || |___ - * || _| | - * || | | | - * || | | | - * || | | | - * || | | | - * || | |VME| - * || | | | - * || | |P2 | - * || | | | - * || | | | - * || | | | - * || | | | - * || | | | - * || | | | - * || | | | - * || | | | - * || |_| | - * || |___| - * || || + - * ||||--|| | + * || +----------------+ | | | + * RST O=== | | | | | + * || | | | | | + * ABT O=== | FGA-002 | | | | + RUN/HLT C| GREEN/RED +------------+ | | | | | + BUS MST C| GREEN/unlit |System flash| | | | | | + * || +------------+ | | | |VME| + * rot [O SW4 +------------+ +----------------+ | | | + * swtshs|| |System Flash| | |P1 | + * [O SW3 +------------+ +----------+ | | | + * || +------------+ | | | | | + * || |System Flash| | 68030 | | | | + * | || +------------+ | | | | | + * |--| +------------+ | | | | | + * AUI | | |System Flash| +----------+ | | | + * eth| | +------------+ |_| | + * | | +----------+ |___| + * | | +-----+ | | | + * |--| |SIA | | 68882 | | + * | || |7992 | | | | + * || +-----+ J28 | | | + * || +------+ +----------+ | + * || | Opt | | + * ||| | Boot | | + * +---+ | PROM | | + * Ser | = +----------+ +------+ +--------+ |___ + * #3 | = | LANCE | +------+ | SCSI | _ _| | + * | = | 7970 | | Def | | 87034 | | | | + * +---+ | | | Boot | | | | | | + * ||| | | | PROM | +--------+ | | | + * || +----------+ +------+ | | | + * ||| +----+ J36 +------+ | |VME| + * +---+ |NV- | | FDC | | | | + * Ser | = | RAM| |37C65C| | |P2 | + * #2 | = | | +------+ | | | + * | = +----+ | 5 row | + * +---+ +--------+ +--------+ | conn- | + * ||| +-----+ | DUSCC1 | | PIT1 | | ector| + * || | OPT | | 68562 | | 68230 | | | | + * ||| |NVRAM| | | | | | | | + * +---+ | | +--------+ +--------+ | | | + * Ser | = | | ____ +--------+ +--------+ | | | + * #1 | = | | / \ | DUSCC2 | | PIT2 | |_ _| | + * | = | | BATTERY | 68562 | | 68230 | |___| + * || +---+ +-----+ \____/ | | | | + + * ||||--|| +--------+ +--------+ | * ||||--||--------------------------------------------------------------+ * || * @@ -160,6 +160,7 @@ #include "cpu/m68000/m68000.h" #include "machine/scnxx562.h" #include "machine/68230pit.h" +#include "machine/fga002.h" #include "machine/nvram.h" #include "bus/rs232/rs232.h" #include "machine/clock.h" @@ -189,14 +190,12 @@ fccpu30_state(const machine_config &mconfig, device_type type, const char *tag) , m_dusccterm(*this, "duscc") , m_pit1 (*this, "pit1") , m_pit2 (*this, "pit2") + , m_fga002 (*this, "fga002") { } DECLARE_READ32_MEMBER (bootvect_r); DECLARE_WRITE32_MEMBER (bootvect_w); - /* FGA-002 - Force Gate Array */ - DECLARE_READ8_MEMBER (fga8_r); - DECLARE_WRITE8_MEMBER (fga8_w); /* Rotary switch PIT input */ DECLARE_READ8_MEMBER (rotary_rd); @@ -218,12 +217,11 @@ private: required_device<pit68230_device> m_pit1; required_device<pit68230_device> m_pit2; + required_device<fga002_device> m_fga002; + // Pointer to System ROMs needed by bootvect_r and masking RAM buffer for post reset accesses UINT32 *m_sysrom; UINT32 m_sysram[2]; - - // FGA-002 - UINT8 m_fga002[0x500]; }; static ADDRESS_MAP_START (fccpu30_mem, AS_PROGRAM, 32, fccpu30_state) @@ -236,7 +234,7 @@ static ADDRESS_MAP_START (fccpu30_mem, AS_PROGRAM, 32, fccpu30_state) AM_RANGE (0xff800c00, 0xff800dff) AM_DEVREADWRITE8("pit1", pit68230_device, read, write, 0xffffffff) AM_RANGE (0xff800e00, 0xff800fff) AM_DEVREADWRITE8("pit2", pit68230_device, read, write, 0xffffffff) AM_RANGE (0xffc00000, 0xffcfffff) AM_RAM AM_SHARE ("nvram") /* On-board SRAM with battery backup (nvram) */ - AM_RANGE (0xffd00000, 0xffd004ff) AM_READWRITE8(fga8_r, fga8_w, 0xffffffff) /* FGA-002 Force Gate Array */ + AM_RANGE (0xffd00000, 0xffdfffff) AM_DEVREADWRITE8("fga002", fga002_device, read, write, 0xffffffff) /* FGA-002 Force Gate Array */ AM_RANGE (0xffe00000, 0xffefffff) AM_ROM AM_REGION("roms", 0x800000) //AM_RANGE(0x100000, 0xfeffff) AM_READWRITE(vme_a24_r, vme_a24_w) /* VMEbus Rev B addresses (24 bits) - not verified */ @@ -247,100 +245,6 @@ ADDRESS_MAP_END static INPUT_PORTS_START (fccpu30) INPUT_PORTS_END -#define FGA_ICRMBOX0 0x0000 -#define FGA_ICRMBOX1 0x0004 -#define FGA_ICRMBOX2 0x0008 -#define FGA_ICRMBOX3 0x000c -#define FGA_ICRMBOX4 0x0010 -#define FGA_ICRMBOX5 0x0014 -#define FGA_ICRMBOX6 0x0018 -#define FGA_ICRMBOX7 0x001C -#define FGA_VMEPAGE 0x0200 -#define FGA_ICRVME1 0x0204 -#define FGA_ICRVME2 0x0208 -#define FGA_ICRVME3 0x020c -#define FGA_ICRVME4 0x0210 -#define FGA_ICRVME5 0x0214 -#define FGA_ICRVME6 0x0218 -#define FGA_ICRVME7 0x021c -#define FGA_ICRTIM0 0x0220 -#define FGA_ICRDMANORM 0x0230 -#define FGA_ICRDMAERR 0x0234 -#define FGA_CTL1 0x0238 -#define FGA_CTL2 0x023c -#define FGA_ICRFMB0REF 0x0240 -#define FGA_ICRFMB1REF 0x0244 -#define FGA_ICRFMB0MES 0x0248 -#define FGA_ICRFMB1MES 0x024c -#define FGA_CTL3 0x0250 -#define FGA_CTL4 0x0254 -#define FGA_ICRPARITY 0x0258 -#define FGA_AUXPINCTL 0x0260 -#define FGA_CTL5 0x0264 -#define FGA_AUXFIFWEX 0x0268 -#define FGA_AUXFIFREX 0x026c -#define FGA_CTL6 0x0270 -#define FGA_CTL7 0x0274 -#define FGA_CTL8 0x0278 -#define FGA_CTL9 0x027c -#define FGA_ICRABORT 0x0280 -#define FGA_ICRACFAIL 0x0284 -#define FGA_ICRSYSFAIL 0x0288 -#define FGA_ICRLOCAL0 0x028c -#define FGA_ICRLOCAL1 0x0290 -#define FGA_ICRLOCAL2 0x0294 -#define FGA_ICRLOCAL3 0x0298 -#define FGA_ICRLOCAL4 0x029c -#define FGA_ICRLOCAL5 0x02a0 -#define FGA_ICRLOCAL6 0x02a4 -#define FGA_ICRLOCAL7 0x02a8 -#define FGA_ENAMCODE 0x02b4 -#define FGA_CTL10 0x02c0 -#define FGA_CTL11 0x02c4 -#define FGA_MAINUM 0x02c8 -#define FGA_MAINUU 0x02cc -#define FGA_BOTTOMPAGEU 0x02d0 -#define FGA_BOTTOMPAGEL 0x02d4 -#define FGA_TOPPAGEU 0x02d8 -#define FGA_TOPPAGEL 0x02dc -#define FGA_MYVMEPAGE 0x02fc -#define FGA_TIM0PRELOAD 0x0300 -#define FGA_TIM0CTL 0x0310 -#define FGA_DMASRCATT 0x0320 -#define FGA_DMADSTATT 0x0324 -#define FGA_DMA_GENERAL 0x0328 -#define FGA_CTL12 0x032c -#define FGA_LIOTIMING 0x0330 -#define FGA_LOCALIACK 0x0334 -#define FGA_FMBCTL 0x0338 -#define FGA_FMBAREA 0x033c -#define FGA_AUXSRCSTART 0x0340 -#define FGA_AUXDSTSTART 0x0344 -#define FGA_AUXSRCTERM 0x0348 -#define FGA_AUXDSTTERM 0x034c -#define FGA_CTL13 0x0350 -#define FGA_CTL14 0x0354 -#define FGA_CTL15 0x0358 -#define FGA_CTL16 0x035c -#define FGA_SPECIALENA 0x0424 -#define FGA_ISTIM0 0x04a0 -#define FGA_ISDMANORM 0x04b0 -#define FGA_ISDMAERR 0x04b4 -#define FGA_ISFMB0REF 0x04b8 -#define FGA_ISFMB1REF 0x04bc -#define FGA_ISPARITY 0x04c0 -#define FGA_DMARUNCTL 0x04c4 -#define FGA_ISABORT 0x04c8 -#define FGA_ISACFAIL 0x04cc -#define FGA_ISFMB0MES 0x04e0 -#define FGA_ISFMB1MES 0x04e4 -#define FGA_ISSYSFAIL 0x04d0 -#define FGA_ABORTPIN 0x04d4 -#define FGA_RSVMECALL 0x04f0 -#define FGA_RSKEYRES 0x04f4 -#define FGA_RSCPUCALL 0x04f8 -#define FGA_RSLOCSW 0x04fc - /* Start it up */ void fccpu30_state::machine_start () { @@ -348,7 +252,6 @@ void fccpu30_state::machine_start () save_pointer (NAME (m_sysrom), sizeof(m_sysrom)); save_pointer (NAME (m_sysram), sizeof(m_sysram)); - save_pointer (NAME (m_fga002), sizeof(m_fga002)); /* Setup pointer to bootvector in ROM for bootvector handler bootvect_r */ m_sysrom = (UINT32*)(memregion ("roms")->base () + 0x800000); @@ -361,24 +264,6 @@ void fccpu30_state::machine_reset () /* Reset pointer to bootvector in ROM for bootvector handler bootvect_r */ if (m_sysrom == &m_sysram[0]) /* Condition needed because memory map is not setup first time */ m_sysrom = (UINT32*)(memregion ("roms")->base () + 0x800000); - - /* Reset values for the FGA-002 */ - memset(&m_fga002[0], 0, sizeof(m_fga002)); - m_fga002[FGA_RSVMECALL] = 0x80; - m_fga002[FGA_RSKEYRES] = 0x80; - m_fga002[FGA_RSCPUCALL] = 0x80; - m_fga002[FGA_RSLOCSW] = 0x80; - m_fga002[FGA_ISTIM0] = 0x80; - m_fga002[FGA_ISDMANORM] = 0x80; - m_fga002[FGA_ISDMAERR] = 0x80; - m_fga002[FGA_ISFMB0REF] = 0x80; - m_fga002[FGA_ISFMB1REF] = 0x80; - m_fga002[FGA_ISPARITY] = 0x80; - m_fga002[FGA_ISABORT] = 0x80; - m_fga002[FGA_ISACFAIL] = 0x80; - m_fga002[FGA_ISSYSFAIL] = 0x80; - m_fga002[FGA_ISFMB0MES] = 0x80; - m_fga002[FGA_ISFMB1MES] = 0x80; } /* Boot vector handler, the PCB hardwires the first 8 bytes from 0xff800000 to 0x0 at reset*/ @@ -393,229 +278,6 @@ WRITE32_MEMBER (fccpu30_state::bootvect_w){ } /* - * FGA-002 driver, might deserve its own driver but will rest here until another board wants it - * -The FGA-002 gate array is a high speed CMOS device manufactured in 1.2 micron technology and -containing 24,000 gates in a 281 pin PGA package. It provides interfaces to the 68020/30 microprocessor -as well as a VMEbus compatible interface. The auxilary interface of the gate array is a high speed data -channel used by the internal 32 bit DMA controller. The interface allows data transfer rates of up to -6 MByte/second. The timing of the local I/O interface is programmable and provides easy interfacing of -local I/O devices. All control, address and data lines of the CPU and the VMEbus are either directly -connected or connected via buffers to the gate array allowing easy implementation and usage. -The gate array registers are programmed by the local CPU. - -FEATURES: -- Programmable decoding for CPU and VME access to the local main memory -- Interrupt management for internal and external interrupt sources -- 32 bit multi-port DMA Controller -- FORCE Message Broadcast slave interface with 2 message channels -- 8 interrupt capable MAILBOXES -- 8 bit TIMER with 16 selectable internal source clocks -*/ -WRITE8_MEMBER (fccpu30_state::fga8_w){ - LOG(("%s[%04x] <- %02x - ", FUNCNAME, offset, data)); - switch(offset) - { - case FGA_SPECIALENA : LOG(("FGA_SPECIALENA - not implemented\n")); m_fga002[FGA_SPECIALENA] = data; break; - case FGA_RSVMECALL : LOG(("FGA_RSVMECALL - not implemented\n")); m_fga002[FGA_RSVMECALL] = data; break; - case FGA_RSKEYRES : LOG(("FGA_RSKEYRES - not implemented\n")); m_fga002[FGA_RSKEYRES] = data; break; - case FGA_RSCPUCALL : LOG(("FGA_RSCPUCALL - not implemented\n")); m_fga002[FGA_RSCPUCALL] = data; break; - case FGA_RSLOCSW : LOG(("FGA_RSLOCSW - not implemented\n")); m_fga002[FGA_RSLOCSW] = data; break; - case FGA_ICRMBOX0 : LOG(("FGA_ICRMBOX0 - not implemented\n")); m_fga002[FGA_ICRMBOX0] = data; break; - case FGA_ICRMBOX1 : LOG(("FGA_ICRMBOX1 - not implemented\n")); m_fga002[FGA_ICRMBOX1] = data; break; - case FGA_ICRMBOX2 : LOG(("FGA_ICRMBOX2 - not implemented\n")); m_fga002[FGA_ICRMBOX2] = data; break; - case FGA_ICRMBOX3 : LOG(("FGA_ICRMBOX3 - not implemented\n")); m_fga002[FGA_ICRMBOX3] = data; break; - case FGA_ICRMBOX4 : LOG(("FGA_ICRMBOX4 - not implemented\n")); m_fga002[FGA_ICRMBOX4] = data; break; - case FGA_ICRMBOX5 : LOG(("FGA_ICRMBOX5 - not implemented\n")); m_fga002[FGA_ICRMBOX5] = data; break; - case FGA_ICRMBOX6 : LOG(("FGA_ICRMBOX6 - not implemented\n")); m_fga002[FGA_ICRMBOX6] = data; break; - case FGA_ICRMBOX7 : LOG(("FGA_ICRMBOX7 - not implemented\n")); m_fga002[FGA_ICRMBOX7] = data; break; - case FGA_VMEPAGE : LOG(("FGA_VMEPAGE - not implemented\n")); m_fga002[FGA_VMEPAGE ] = data; break; - case FGA_ICRVME1 : LOG(("FGA_ICRVME1 - not implemented\n")); m_fga002[FGA_ICRVME1] = data; break; - case FGA_ICRVME2 : LOG(("FGA_ICRVME2 - not implemented\n")); m_fga002[FGA_ICRVME2] = data; break; - case FGA_ICRVME3 : LOG(("FGA_ICRVME3 - not implemented\n")); m_fga002[FGA_ICRVME3] = data; break; - case FGA_ICRVME4 : LOG(("FGA_ICRVME4 - not implemented\n")); m_fga002[FGA_ICRVME4] = data; break; - case FGA_ICRVME5 : LOG(("FGA_ICRVME5 - not implemented\n")); m_fga002[FGA_ICRVME5] = data; break; - case FGA_ICRVME6 : LOG(("FGA_ICRVME6 - not implemented\n")); m_fga002[FGA_ICRVME6] = data; break; - case FGA_ICRVME7 : LOG(("FGA_ICRVME7 - not implemented\n")); m_fga002[FGA_ICRVME7] = data; break; - case FGA_ICRTIM0 : LOG(("FGA_ICRTIM0 - not implemented\n")); m_fga002[FGA_ICRTIM0] = data; break; - case FGA_ICRDMANORM : LOG(("FGA_ICRDMANORM - not implemented\n")); m_fga002[FGA_ICRDMANORM] = data; break; - case FGA_ICRDMAERR : LOG(("FGA_ICRDMAERR - not implemented\n")); m_fga002[FGA_ICRDMAERR] = data; break; - case FGA_CTL1 : LOG(("FGA_CTL1 - not implemented\n")); m_fga002[FGA_CTL1] = data; break; - case FGA_CTL2 : LOG(("FGA_CTL2 - not implemented\n")); m_fga002[FGA_CTL2] = data; break; - case FGA_ICRFMB0REF : LOG(("FGA_ICRFMB0REF - not implemented\n")); m_fga002[FGA_ICRFMB0REF] = data; break; - case FGA_ICRFMB1REF : LOG(("FGA_ICRFMB1REF - not implemented\n")); m_fga002[FGA_ICRFMB1REF] = data; break; - case FGA_ICRFMB0MES : LOG(("FGA_ICRFMB0MES - not implemented\n")); m_fga002[FGA_ICRFMB0MES] = data; break; - case FGA_ICRFMB1MES : LOG(("FGA_ICRFMB1MES - not implemented\n")); m_fga002[FGA_ICRFMB1MES] = data; break; - case FGA_CTL3 : LOG(("FGA_CTL3 - not implemented\n")); m_fga002[FGA_CTL3] = data; break; - case FGA_CTL4 : LOG(("FGA_CTL4 - not implemented\n")); m_fga002[FGA_CTL4] = data; break; - case FGA_ICRPARITY : LOG(("FGA_ICRPARITY - not implemented\n")); m_fga002[FGA_ICRPARITY] = data; break; - case FGA_AUXPINCTL : LOG(("FGA_AUXPINCTL - not implemented\n")); m_fga002[FGA_AUXPINCTL] = data; break; - case FGA_CTL5 : LOG(("FGA_CTL5 - not implemented\n")); m_fga002[FGA_CTL5] = data; break; - case FGA_AUXFIFWEX : LOG(("FGA_AUXFIFWEX - not implemented\n")); m_fga002[FGA_AUXFIFWEX] = data; break; - case FGA_AUXFIFREX : LOG(("FGA_AUXFIFREX - not implemented\n")); m_fga002[FGA_AUXFIFREX] = data; break; - case FGA_CTL6 : LOG(("FGA_CTL6 - not implemented\n")); m_fga002[FGA_CTL6] = data; break; - case FGA_CTL7 : LOG(("FGA_CTL7 - not implemented\n")); m_fga002[FGA_CTL7] = data; break; - case FGA_CTL8 : LOG(("FGA_CTL8 - not implemented\n")); m_fga002[FGA_CTL8] = data; break; - case FGA_CTL9 : LOG(("FGA_CTL9 - not implemented\n")); m_fga002[FGA_CTL9] = data; break; - case FGA_ICRABORT : LOG(("FGA_ICRABORT - not implemented\n")); m_fga002[FGA_ICRABORT] = data; break; - case FGA_ICRACFAIL : LOG(("FGA_ICRACFAIL - not implemented\n")); m_fga002[FGA_ICRACFAIL] = data; break; - case FGA_ICRSYSFAIL : LOG(("FGA_ICRSYSFAIL - not implemented\n")); m_fga002[FGA_ICRSYSFAIL] = data; break; - case FGA_ICRLOCAL0 : LOG(("FGA_ICRLOCAL0 - not implemented\n")); m_fga002[FGA_ICRLOCAL0] = data; break; - case FGA_ICRLOCAL1 : LOG(("FGA_ICRLOCAL1 - not implemented\n")); m_fga002[FGA_ICRLOCAL1] = data; break; - case FGA_ICRLOCAL2 : LOG(("FGA_ICRLOCAL2 - not implemented\n")); m_fga002[FGA_ICRLOCAL2] = data; break; - case FGA_ICRLOCAL3 : LOG(("FGA_ICRLOCAL3 - not implemented\n")); m_fga002[FGA_ICRLOCAL3] = data; break; - case FGA_ICRLOCAL4 : LOG(("FGA_ICRLOCAL4 - not implemented\n")); m_fga002[FGA_ICRLOCAL4] = data; break; - case FGA_ICRLOCAL5 : LOG(("FGA_ICRLOCAL5 - not implemented\n")); m_fga002[FGA_ICRLOCAL5] = data; break; - case FGA_ICRLOCAL6 : LOG(("FGA_ICRLOCAL6 - not implemented\n")); m_fga002[FGA_ICRLOCAL6] = data; break; - case FGA_ICRLOCAL7 : LOG(("FGA_ICRLOCAL7 - not implemented\n")); m_fga002[FGA_ICRLOCAL7] = data; break; - case FGA_ENAMCODE : LOG(("FGA_ENAMCODE - not implemented\n")); m_fga002[FGA_ENAMCODE] = data; break; - case FGA_CTL10 : LOG(("FGA_CTL10 - not implemented\n")); m_fga002[FGA_CTL10] = data; break; - case FGA_CTL11 : LOG(("FGA_CTL11 - not implemented\n")); m_fga002[FGA_CTL11] = data; break; - case FGA_MAINUM : LOG(("FGA_MAINUM - not implemented\n")); m_fga002[FGA_MAINUM] = data; break; - case FGA_MAINUU : LOG(("FGA_MAINUU - not implemented\n")); m_fga002[FGA_MAINUU] = data; break; - case FGA_BOTTOMPAGEU : LOG(("FGA_BOTTOMPAGEU - not implemented\n")); m_fga002[FGA_BOTTOMPAGEU] = data; break; - case FGA_BOTTOMPAGEL : LOG(("FGA_BOTTOMPAGEL - not implemented\n")); m_fga002[FGA_BOTTOMPAGEL] = data; break; - case FGA_TOPPAGEU : LOG(("FGA_TOPPAGEU - not implemented\n")); m_fga002[FGA_TOPPAGEU] = data; break; - case FGA_TOPPAGEL : LOG(("FGA_TOPPAGEL - not implemented\n")); m_fga002[FGA_TOPPAGEL] = data; break; - case FGA_MYVMEPAGE : LOG(("FGA_MYVMEPAGE - not implemented\n")); m_fga002[FGA_MYVMEPAGE] = data; break; - case FGA_TIM0PRELOAD : LOG(("FGA_TIM0PRELOAD - not implemented\n")); m_fga002[FGA_TIM0PRELOAD] = data; break; - case FGA_TIM0CTL : LOG(("FGA_TIM0CTL - not implemented\n")); m_fga002[FGA_TIM0CTL] = data; break; - case FGA_DMASRCATT : LOG(("FGA_DMASRCATT - not implemented\n")); m_fga002[FGA_DMASRCATT] = data; break; - case FGA_DMADSTATT : LOG(("FGA_DMADSTATT - not implemented\n")); m_fga002[FGA_DMADSTATT] = data; break; - case FGA_DMA_GENERAL : LOG(("FGA_DMA_GENERAL - not implemented\n")); m_fga002[FGA_DMA_GENERAL] = data; break; - case FGA_CTL12 : LOG(("FGA_CTL12 - not implemented\n")); m_fga002[FGA_CTL12] = data; break; - case FGA_LIOTIMING : LOG(("FGA_LIOTIMING - not implemented\n")); m_fga002[FGA_LIOTIMING] = data; break; - case FGA_LOCALIACK : LOG(("FGA_LOCALIACK - not implemented\n")); m_fga002[FGA_LOCALIACK] = data; break; - case FGA_FMBCTL : LOG(("FGA_FMBCTL - not implemented\n")); m_fga002[FGA_FMBCTL] = data; break; - case FGA_FMBAREA : LOG(("FGA_FMBAREA - not implemented\n")); m_fga002[FGA_FMBAREA] = data; break; - case FGA_AUXSRCSTART : LOG(("FGA_AUXSRCSTART - not implemented\n")); m_fga002[FGA_AUXSRCSTART] = data; break; - case FGA_AUXDSTSTART : LOG(("FGA_AUXDSTSTART - not implemented\n")); m_fga002[FGA_AUXDSTSTART] = data; break; - case FGA_AUXSRCTERM : LOG(("FGA_AUXSRCTERM - not implemented\n")); m_fga002[FGA_AUXSRCTERM] = data; break; - case FGA_AUXDSTTERM : LOG(("FGA_AUXDSTTERM - not implemented\n")); m_fga002[FGA_AUXDSTTERM] = data; break; - case FGA_CTL13 : LOG(("FGA_CTL13 - not implemented\n")); m_fga002[FGA_CTL13] = data; break; - case FGA_CTL14 : LOG(("FGA_CTL14 - not implemented\n")); m_fga002[FGA_CTL14] = data; break; - case FGA_CTL15 : LOG(("FGA_CTL15 - not implemented\n")); m_fga002[FGA_CTL15] = data; break; - case FGA_CTL16 : LOG(("FGA_CTL16 - not implemented\n")); m_fga002[FGA_CTL16] = data; break; - case FGA_ISTIM0 : LOG(("FGA_ISTIM0 - not implemented\n")); m_fga002[FGA_ISTIM0] = data; break; - case FGA_ISDMANORM : LOG(("FGA_ISDMANORM - not implemented\n")); m_fga002[FGA_ISDMANORM] = data; break; - case FGA_ISDMAERR : LOG(("FGA_ISDMAERR - not implemented\n")); m_fga002[FGA_ISDMAERR] = data; break; - case FGA_ISFMB0REF : LOG(("FGA_ISFMB0REF - not implemented\n")); m_fga002[FGA_ISFMB0REF] = data; break; - case FGA_ISFMB1REF : LOG(("FGA_ISFMB1REF - not implemented\n")); m_fga002[FGA_ISFMB1REF] = data; break; - case FGA_ISPARITY : LOG(("FGA_ISPARITY - not implemented\n")); m_fga002[FGA_ISPARITY] = data; break; - case FGA_DMARUNCTL : LOG(("FGA_DMARUNCTL - not implemented\n")); m_fga002[FGA_DMARUNCTL] = data; break; - case FGA_ISABORT : LOG(("FGA_ISABORT - not implemented\n")); m_fga002[FGA_ISABORT] = data; break; - case FGA_ISFMB0MES : LOG(("FGA_ISFMB0MES - not implemented\n")); m_fga002[FGA_ISFMB0MES] = data; break; - case FGA_ISFMB1MES : LOG(("FGA_ISFMB1MES - not implemented\n")); m_fga002[FGA_ISFMB1MES] = data; break; - case FGA_ABORTPIN : LOG(("FGA_ABORTPIN - not implemented\n")); m_fga002[FGA_ABORTPIN] = data; break; - default: - LOG(("Unsupported register %04x\n", offset)); - } -} - -READ8_MEMBER (fccpu30_state::fga8_r){ - UINT8 ret = 0; - - LOG(("%s[%04x] ", FUNCNAME, offset)); - switch(offset) - { - case FGA_SPECIALENA : ret = m_fga002[FGA_SPECIALENA]; LOG(("FGA_SPECIALENA returns %02x - not implemented\n", ret)); break; - case FGA_RSVMECALL : ret = m_fga002[FGA_RSVMECALL]; LOG(("FGA_RSVMECALL returns %02x - not implemented\n", ret)); break; - case FGA_RSKEYRES : ret = m_fga002[FGA_RSKEYRES]; LOG(("FGA_RSKEYRES returns %02x - not implemented\n", ret)); break; - case FGA_RSCPUCALL : ret = m_fga002[FGA_RSCPUCALL]; LOG(("FGA_RSCPUCALL returns %02x - not implemented\n", ret)); break; - case FGA_RSLOCSW : ret = m_fga002[FGA_RSLOCSW]; LOG(("FGA_RSLOCSW returns %02x - not implemented\n", ret)); break; - case FGA_ICRMBOX0 : ret = m_fga002[FGA_ICRMBOX0]; LOG(("FGA_ICRMBOX0 returns %02x - not implemented\n", ret)); break; - case FGA_ICRMBOX1 : ret = m_fga002[FGA_ICRMBOX1]; LOG(("FGA_ICRMBOX1 returns %02x - not implemented\n", ret)); break; - case FGA_ICRMBOX2 : ret = m_fga002[FGA_ICRMBOX2]; LOG(("FGA_ICRMBOX2 returns %02x - not implemented\n", ret)); break; - case FGA_ICRMBOX3 : ret = m_fga002[FGA_ICRMBOX3]; LOG(("FGA_ICRMBOX3 returns %02x - not implemented\n", ret)); break; - case FGA_ICRMBOX4 : ret = m_fga002[FGA_ICRMBOX4]; LOG(("FGA_ICRMBOX4 returns %02x - not implemented\n", ret)); break; - case FGA_ICRMBOX5 : ret = m_fga002[FGA_ICRMBOX5]; LOG(("FGA_ICRMBOX5 returns %02x - not implemented\n", ret)); break; - case FGA_ICRMBOX6 : ret = m_fga002[FGA_ICRMBOX6]; LOG(("FGA_ICRMBOX6 returns %02x - not implemented\n", ret)); break; - case FGA_ICRMBOX7 : ret = m_fga002[FGA_ICRMBOX7]; LOG(("FGA_ICRMBOX7 returns %02x - not implemented\n", ret)); break; - case FGA_VMEPAGE : ret = m_fga002[FGA_VMEPAGE]; LOG(("FGA_VMEPAGE returns %02x - not implemented\n", ret)); break; - case FGA_ICRVME1 : ret = m_fga002[FGA_ICRVME1]; LOG(("FGA_ICRVME1 returns %02x - not implemented\n", ret)); break; - case FGA_ICRVME2 : ret = m_fga002[FGA_ICRVME2]; LOG(("FGA_ICRVME2 returns %02x - not implemented\n", ret)); break; - case FGA_ICRVME3 : ret = m_fga002[FGA_ICRVME3]; LOG(("FGA_ICRVME3 returns %02x - not implemented\n", ret)); break; - case FGA_ICRVME4 : ret = m_fga002[FGA_ICRVME4]; LOG(("FGA_ICRVME4 returns %02x - not implemented\n", ret)); break; - case FGA_ICRVME5 : ret = m_fga002[FGA_ICRVME5]; LOG(("FGA_ICRVME5 returns %02x - not implemented\n", ret)); break; - case FGA_ICRVME6 : ret = m_fga002[FGA_ICRVME6]; LOG(("FGA_ICRVME6 returns %02x - not implemented\n", ret)); break; - case FGA_ICRVME7 : ret = m_fga002[FGA_ICRVME7]; LOG(("FGA_ICRVME7 returns %02x - not implemented\n", ret)); break; - case FGA_ICRTIM0 : ret = m_fga002[FGA_ICRTIM0]; LOG(("FGA_ICRTIM0 returns %02x - not implemented\n", ret)); break; - case FGA_ICRDMANORM : ret = m_fga002[FGA_ICRDMANORM]; LOG(("FGA_ICRDMANORM returns %02x - not implemented\n", ret)); break; - case FGA_ICRDMAERR : ret = m_fga002[FGA_ICRDMAERR]; LOG(("FGA_ICRDMAERR returns %02x - not implemented\n", ret)); break; - case FGA_CTL1 : ret = m_fga002[FGA_CTL1]; LOG(("FGA_CTL1 returns %02x - not implemented\n", ret)); break; - case FGA_CTL2 : ret = m_fga002[FGA_CTL2]; LOG(("FGA_CTL2 returns %02x - not implemented\n", ret)); break; - case FGA_ICRFMB0REF : ret = m_fga002[FGA_ICRFMB0REF]; LOG(("FGA_ICRFMB0REF returns %02x - not implemented\n", ret)); break; - case FGA_ICRFMB1REF : ret = m_fga002[FGA_ICRFMB1REF]; LOG(("FGA_ICRFMB1REF returns %02x - not implemented\n", ret)); break; - case FGA_ICRFMB0MES : ret = m_fga002[FGA_ICRFMB0MES]; LOG(("FGA_ICRFMB0MES returns %02x - not implemented\n", ret)); break; - case FGA_ICRFMB1MES : ret = m_fga002[FGA_ICRFMB1MES]; LOG(("FGA_ICRFMB1MES returns %02x - not implemented\n", ret)); break; - case FGA_CTL3 : ret = m_fga002[FGA_CTL3]; LOG(("FGA_CTL3 returns %02x - not implemented\n", ret)); break; - case FGA_CTL4 : ret = m_fga002[FGA_CTL4]; LOG(("FGA_CTL4 returns %02x - not implemented\n", ret)); break; - case FGA_ICRPARITY : ret = m_fga002[FGA_ICRPARITY]; LOG(("FGA_ICRPARITY returns %02x - not implemented\n", ret)); break; - case FGA_AUXPINCTL : ret = m_fga002[FGA_AUXPINCTL]; LOG(("FGA_AUXPINCTL returns %02x - not implemented\n", ret)); break; - case FGA_CTL5 : ret = m_fga002[FGA_CTL5]; LOG(("FGA_CTL5 returns %02x - not implemented\n", ret)); break; - case FGA_AUXFIFWEX : ret = m_fga002[FGA_AUXFIFWEX]; LOG(("FGA_AUXFIFWEX returns %02x - not implemented\n", ret)); break; - case FGA_AUXFIFREX : ret = m_fga002[FGA_AUXFIFREX]; LOG(("FGA_AUXFIFREX returns %02x - not implemented\n", ret)); break; - case FGA_CTL6 : ret = m_fga002[FGA_CTL6]; LOG(("FGA_CTL6 returns %02x - not implemented\n", ret)); break; - case FGA_CTL7 : ret = m_fga002[FGA_CTL7]; LOG(("FGA_CTL7 returns %02x - not implemented\n", ret)); break; - case FGA_CTL8 : ret = m_fga002[FGA_CTL8]; LOG(("FGA_CTL8 returns %02x - not implemented\n", ret)); break; - case FGA_CTL9 : ret = m_fga002[FGA_CTL9]; LOG(("FGA_CTL9 returns %02x - not implemented\n", ret)); break; - case FGA_ICRABORT : ret = m_fga002[FGA_ICRABORT]; LOG(("FGA_ICRABORT returns %02x - not implemented\n", ret)); break; - case FGA_ICRACFAIL : ret = m_fga002[FGA_ICRACFAIL]; LOG(("FGA_ICRACFAIL returns %02x - not implemented\n", ret)); break; - case FGA_ICRSYSFAIL : ret = m_fga002[FGA_ICRSYSFAIL]; LOG(("FGA_ICRSYSFAIL returns %02x - not implemented\n", ret)); break; - case FGA_ICRLOCAL0 : ret = m_fga002[FGA_ICRLOCAL0]; LOG(("FGA_ICRLOCAL0 returns %02x - not implemented\n", ret)); break; - case FGA_ICRLOCAL1 : ret = m_fga002[FGA_ICRLOCAL1]; LOG(("FGA_ICRLOCAL1 returns %02x - not implemented\n", ret)); break; - case FGA_ICRLOCAL2 : ret = m_fga002[FGA_ICRLOCAL2]; LOG(("FGA_ICRLOCAL2 returns %02x - not implemented\n", ret)); break; - case FGA_ICRLOCAL3 : ret = m_fga002[FGA_ICRLOCAL3]; LOG(("FGA_ICRLOCAL3 returns %02x - not implemented\n", ret)); break; - case FGA_ICRLOCAL4 : ret = m_fga002[FGA_ICRLOCAL4]; LOG(("FGA_ICRLOCAL4 returns %02x - not implemented\n", ret)); break; - case FGA_ICRLOCAL5 : ret = m_fga002[FGA_ICRLOCAL5]; LOG(("FGA_ICRLOCAL5 returns %02x - not implemented\n", ret)); break; - case FGA_ICRLOCAL6 : ret = m_fga002[FGA_ICRLOCAL6]; LOG(("FGA_ICRLOCAL6 returns %02x - not implemented\n", ret)); break; - case FGA_ICRLOCAL7 : ret = m_fga002[FGA_ICRLOCAL7]; LOG(("FGA_ICRLOCAL7 returns %02x - not implemented\n", ret)); break; - case FGA_ENAMCODE : ret = m_fga002[FGA_ENAMCODE]; LOG(("FGA_ENAMCODE returns %02x - not implemented\n", ret)); break; - case FGA_CTL10 : ret = m_fga002[FGA_CTL10]; LOG(("FGA_CTL10 returns %02x - not implemented\n", ret)); break; - case FGA_CTL11 : ret = m_fga002[FGA_CTL11]; LOG(("FGA_CTL11 returns %02x - not implemented\n", ret)); break; - case FGA_MAINUM : ret = m_fga002[FGA_MAINUM]; LOG(("FGA_MAINUM returns %02x - not implemented\n", ret)); break; - case FGA_MAINUU : ret = m_fga002[FGA_MAINUU]; LOG(("FGA_MAINUU returns %02x - not implemented\n", ret)); break; - case FGA_BOTTOMPAGEU : ret = m_fga002[FGA_BOTTOMPAGEU]; LOG(("FGA_BOTTOMPAGEU returns %02x - not implemented\n", ret)); break; - case FGA_BOTTOMPAGEL : ret = m_fga002[FGA_BOTTOMPAGEL]; LOG(("FGA_BOTTOMPAGEL returns %02x - not implemented\n", ret)); break; - case FGA_TOPPAGEU : ret = m_fga002[FGA_TOPPAGEU]; LOG(("FGA_TOPPAGEU returns %02x - not implemented\n", ret)); break; - case FGA_TOPPAGEL : ret = m_fga002[FGA_TOPPAGEL]; LOG(("FGA_TOPPAGEL returns %02x - not implemented\n", ret)); break; - case FGA_MYVMEPAGE : ret = m_fga002[FGA_MYVMEPAGE]; LOG(("FGA_MYVMEPAGE returns %02x - not implemented\n", ret)); break; - case FGA_TIM0PRELOAD : ret = m_fga002[FGA_TIM0PRELOAD]; LOG(("FGA_TIM0PRELOAD returns %02x - not implemented\n", ret)); break; - case FGA_TIM0CTL : ret = m_fga002[FGA_TIM0CTL]; LOG(("FGA_TIM0CTL returns %02x - not implemented\n", ret)); break; - case FGA_DMASRCATT : ret = m_fga002[FGA_DMASRCATT]; LOG(("FGA_DMASRCATT returns %02x - not implemented\n", ret)); break; - case FGA_DMADSTATT : ret = m_fga002[FGA_DMADSTATT]; LOG(("FGA_DMADSTATT returns %02x - not implemented\n", ret)); break; - case FGA_DMA_GENERAL : ret = m_fga002[FGA_DMA_GENERAL]; LOG(("FGA_DMA_GENERAL returns %02x - not implemented\n", ret)); break; - case FGA_CTL12 : ret = m_fga002[FGA_CTL12]; LOG(("FGA_CTL12 returns %02x - not implemented\n", ret)); break; - case FGA_LIOTIMING : ret = m_fga002[FGA_LIOTIMING]; LOG(("FGA_LIOTIMING returns %02x - not implemented\n", ret)); break; - case FGA_LOCALIACK : ret = m_fga002[FGA_LOCALIACK]; LOG(("FGA_LOCALIACK returns %02x - not implemented\n", ret)); break; - case FGA_FMBCTL : ret = m_fga002[FGA_FMBCTL]; LOG(("FGA_FMBCTL returns %02x - not implemented\n", ret)); break; - case FGA_FMBAREA : ret = m_fga002[FGA_FMBAREA]; LOG(("FGA_FMBAREA returns %02x - not implemented\n", ret)); break; - case FGA_AUXSRCSTART : ret = m_fga002[FGA_AUXSRCSTART]; LOG(("FGA_AUXSRCSTART returns %02x - not implemented\n", ret)); break; - case FGA_AUXDSTSTART : ret = m_fga002[FGA_AUXDSTSTART]; LOG(("FGA_AUXDSTSTART returns %02x - not implemented\n", ret)); break; - case FGA_AUXSRCTERM : ret = m_fga002[FGA_AUXSRCTERM]; LOG(("FGA_AUXSRCTERM returns %02x - not implemented\n", ret)); break; - case FGA_AUXDSTTERM : ret = m_fga002[FGA_AUXDSTTERM]; LOG(("FGA_AUXDSTTERM returns %02x - not implemented\n", ret)); break; - case FGA_CTL13 : ret = m_fga002[FGA_CTL13]; LOG(("FGA_CTL13 returns %02x - not implemented\n", ret)); break; - case FGA_CTL14 : ret = m_fga002[FGA_CTL14]; LOG(("FGA_CTL14 returns %02x - not implemented\n", ret)); break; - case FGA_CTL15 : ret = m_fga002[FGA_CTL15]; LOG(("FGA_CTL15 returns %02x - not implemented\n", ret)); break; - case FGA_CTL16 : ret = m_fga002[FGA_CTL16]; LOG(("FGA_CTL16 returns %02x - not implemented\n", ret)); break; - case FGA_ISTIM0 : ret = m_fga002[FGA_ISTIM0]; LOG(("FGA_ISTIM0 returns %02x - not implemented\n", ret)); break; - case FGA_ISDMANORM : ret = m_fga002[FGA_ISDMANORM]; LOG(("FGA_ISDMANORM returns %02x - not implemented\n", ret)); break; - case FGA_ISDMAERR : ret = m_fga002[FGA_ISDMAERR]; LOG(("FGA_ISDMAERR returns %02x - not implemented\n", ret)); break; - case FGA_ISFMB0REF : ret = m_fga002[FGA_ISFMB0REF]; LOG(("FGA_ISFMB0REF returns %02x - not implemented\n", ret)); break; - case FGA_ISFMB1REF : ret = m_fga002[FGA_ISFMB1REF]; LOG(("FGA_ISFMB1REF returns %02x - not implemented\n", ret)); break; - case FGA_ISPARITY : ret = m_fga002[FGA_ISPARITY]; LOG(("FGA_ISPARITY returns %02x - not implemented\n", ret)); break; - case FGA_DMARUNCTL : ret = m_fga002[FGA_DMARUNCTL]; LOG(("FGA_DMARUNCTL returns %02x - not implemented\n", ret)); break; - case FGA_ISABORT : ret = m_fga002[FGA_ISABORT]; LOG(("FGA_ISABORT returns %02x - not implemented\n", ret)); break; - case FGA_ISFMB0MES : ret = m_fga002[FGA_ISFMB0MES]; LOG(("FGA_ISFMB0MES returns %02x - not implemented\n", ret)); break; - case FGA_ISFMB1MES : ret = m_fga002[FGA_ISFMB1MES]; LOG(("FGA_ISFMB1MES returns %02x - not implemented\n", ret)); break; - case FGA_ABORTPIN : ret = m_fga002[FGA_ABORTPIN]; LOG(("FGA_ABORTPIN returns %02x - not implemented\n", ret)); break; - default: - LOG(("Unsupported register %04x\n", offset)); - } - return ret; -} - -/* * Rotary Switches - to configure the board * * Table 25: PI/T #1 Interface Signals @@ -690,7 +352,11 @@ READ8_MEMBER (fccpu30_state::rotary_rd){ */ READ8_MEMBER (fccpu30_state::board_mem_id_rd){ LOG(("%s\n", FUNCNAME)); - return 0x6A; // CPU-30 R4 with 4Mb of shared RAM. TODO: make this configurable from commandline or artwork + // return 0x6A; // CPU-30 R4 with 4Mb of shared RAM. TODO: make this configurable from commandline or artwork + // return 0x57; // blankt 53 56 + // return 0x36; // CPU-26 1Mb 36 MHz + // return 0x35; // CPU-26 1Mb 36 MHz + return 0x36; // CPU-26 1Mb 36 MHz } #if 0 @@ -719,7 +385,7 @@ WRITE16_MEMBER (fccpu30_state::vme_a16_w){ */ static MACHINE_CONFIG_START (fccpu30, fccpu30_state) /* basic machine hardware */ - MCFG_CPU_ADD ("maincpu", M68030, XTAL_16MHz) + MCFG_CPU_ADD ("maincpu", M68030, XTAL_25MHz) MCFG_CPU_PROGRAM_MAP (fccpu30_mem) MCFG_NVRAM_ADD_0FILL("nvram") @@ -733,22 +399,35 @@ static MACHINE_CONFIG_START (fccpu30, fccpu30_state) MCFG_RS232_RXD_HANDLER (DEVWRITELINE ("duscc", duscc68562_device, rxa_w)) MCFG_RS232_CTS_HANDLER (DEVWRITELINE ("duscc", duscc68562_device, ctsa_w)) -// MCFG_DUSCC68562_ADD("duscc2", DUSCC_CLOCK, 0, 0, 0, 0 ) + MCFG_DUSCC68562_ADD("duscc2", DUSCC_CLOCK, 0, 0, 0, 0 ) /* PIT Parallel Interface and Timer device, assuming strapped for on board clock */ - MCFG_DEVICE_ADD ("pit1", PIT68230, XTAL_16MHz / 2) + MCFG_DEVICE_ADD ("pit1", PIT68230, XTAL_16MHz / 2) // The PIT clock is not verified on schema but reversed from behaviour MCFG_PIT68230_PA_INPUT_CB(READ8(fccpu30_state, rotary_rd)) - MCFG_DEVICE_ADD ("pit2", PIT68230, XTAL_16MHz / 2) + MCFG_DEVICE_ADD ("pit2", PIT68230, XTAL_16MHz / 2) // Th PIT clock is not verified on schema but reversed from behaviour MCFG_PIT68230_PB_INPUT_CB(READ8(fccpu30_state, board_mem_id_rd)) + + /* FGA-002, Force Gate Array */ + MCFG_FGA002_ADD("fga002", 0) MACHINE_CONFIG_END /* ROM definitions */ ROM_START (fccpu30) ROM_REGION32_BE(0x900000, "roms", 0) - ROM_LOAD32_BYTE("CPU30UU.bin", 0x000000, 0x20000, CRC(66e95cc2) SHA1(acdb468a3a5974295b81271d617de7f101098891) ) - ROM_LOAD32_BYTE("CPU30UP.bin", 0x000001, 0x20000, CRC(dfed1f68) SHA1(71478a77d5ab5da0fabcd78e69537919b560e3b8) ) - ROM_LOAD32_BYTE("CPU30LO.bin", 0x000002, 0x20000, CRC(fefa88ed) SHA1(71a9ad807c0c2da5c6f6a6dc68c73ad8b52f3ea9) ) - ROM_LOAD32_BYTE("CPU30LL.bin", 0x000003, 0x20000, CRC(a03ebf46) SHA1(48fa0268cb10e20679c093e02574dbd9925f95d1) ) + +// Boots with Board ID set to: 0x36 + ROM_LOAD16_BYTE("CPU33LO.BIN", 0x000001, 0x40000, CRC (49895fdf) SHA1 (733abd144c95225a2faf920490e31df2a27f8e03)) + ROM_LOAD16_BYTE("CPU33UP.BIN", 0x000000, 0x40000, CRC (cfe75e94) SHA1 (d40e0635a48607be25f7c58c74b53b7e58fe735d)) + +// Boots with Board ID set to: 0x36 (no display yet) +#if 0 + ROM_LOAD32_BYTE("CPU30LL.BIN", 0x000003, 0x20000, CRC (a03ebf46) SHA1 (48fa0268cb10e20679c093e02574dbd9925f95d1)) + ROM_LOAD32_BYTE("CPU30LO.BIN", 0x000002, 0x20000, CRC (fefa88ed) SHA1 (71a9ad807c0c2da5c6f6a6dc68c73ad8b52f3ea9)) + ROM_LOAD32_BYTE("CPU30UP.BIN", 0x000001, 0x20000, CRC (dfed1f68) SHA1 (71478a77d5ab5da0fabcd78e69537919b560e3b8)) + ROM_LOAD32_BYTE("CPU30UU.BIN", 0x000000, 0x20000, CRC (66e95cc2) SHA1 (acdb468a3a5974295b81271d617de7f101098891)) +#endif + +// Same binary for many boards, attempts to detect CPU speed etc, currently failing detection but boots system roms anyway ROM_LOAD ("PGA-002.bin", 0x800000, 0x10000, CRC(faa38972) SHA1(651dfc2f9a865fc6adf49dad90f9e705f2889919) ) ROM_END diff --git a/src/mame/drivers/fromance.cpp b/src/mame/drivers/fromance.cpp index 505475f2192..6d6069f56d3 100644 --- a/src/mame/drivers/fromance.cpp +++ b/src/mame/drivers/fromance.cpp @@ -722,54 +722,49 @@ static INPUT_PORTS_START( daiyogen ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_START("DSW1") - PORT_DIPNAME( 0x01, 0x00, "DIPSW 1-1" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x01, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x00, "DIPSW 1-2" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x02, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x00, "DIPSW 1-3" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x04, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x00, "DIPSW 1-4" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x08, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x00, "DIPSW 1-5" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x10, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x00, DEF_STR( Demo_Sounds ) ) + PORT_DIPNAME( 0x01, 0x00, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW1:!1") + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) + PORT_DIPNAME( 0x06, 0x00, "Player Initial Score" ) PORT_DIPLOCATION("SW1:!2,!3") + PORT_DIPSETTING( 0x00, "1,000" ) + PORT_DIPSETTING( 0x04, "1,500" ) + PORT_DIPSETTING( 0x02, "2,000" ) + PORT_DIPSETTING( 0x06, "3,000" ) + PORT_DIPNAME( 0x18, 0x00, "Computer Difficulty" ) PORT_DIPLOCATION("SW1:!4,!5") + PORT_DIPSETTING( 0x10, DEF_STR( Easy ) ) + PORT_DIPSETTING( 0x00, DEF_STR( Normal ) ) + PORT_DIPSETTING( 0x08, DEF_STR( Hard ) ) + PORT_DIPSETTING( 0x18, DEF_STR( Very_Hard ) ) + PORT_DIPNAME( 0x20, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:!6") PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x00, "DIPSW 1-7" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x40, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x00, "DIPSW 1-8" ) + PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "SW1:!7" ) + PORT_DIPNAME( 0x80, 0x00, "YAKUMAN STOP" ) PORT_DIPLOCATION("SW1:!8") // not sure what this is supposed to mean PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPSETTING( 0x80, DEF_STR( On ) ) PORT_START("DSW2") - PORT_DIPNAME( 0x01, 0x00, "DIPSW 2-1" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x01, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x00, "DIPSW 2-2" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x02, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x00, "DIPSW 2-3" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x04, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x00, "DIPSW 2-4" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x08, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x00, "DIPSW 2-5" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x10, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x00, "DIPSW 2-6" ) + PORT_DIPNAME( 0x07, 0x00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:!1,!2,!3") + PORT_DIPSETTING( 0x00, "1" ) + PORT_DIPSETTING( 0x04, "2" ) + PORT_DIPSETTING( 0x02, "3" ) + PORT_DIPSETTING( 0x06, "4" ) + PORT_DIPSETTING( 0x01, "5" ) + PORT_DIPSETTING( 0x05, "6" ) + PORT_DIPSETTING( 0x03, "7" ) + PORT_DIPSETTING( 0x07, "8" ) + PORT_DIPNAME( 0x18, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW2:!4,!5") + PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) + PORT_DIPSETTING( 0x10, DEF_STR( 1C_2C ) ) + PORT_DIPSETTING( 0x08, DEF_STR( 2C_1C ) ) + PORT_DIPSETTING( 0x18, DEF_STR( 3C_1C ) ) + PORT_DIPNAME( 0x20, 0x00, "Ignore FURITEN" ) PORT_DIPLOCATION("SW2:!6") PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPSETTING( 0x20, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x00, "DIPSW 2-7" ) + PORT_DIPNAME( 0x40, 0x00, "PINFU with TSUMO" ) PORT_DIPLOCATION("SW2:!7") PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPSETTING( 0x40, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x00, DEF_STR( Flip_Screen ) ) + PORT_DIPNAME( 0x80, 0x00, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW2:!8") PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPSETTING( 0x80, DEF_STR( On ) ) @@ -875,57 +870,51 @@ static INPUT_PORTS_START( mjnatsu ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 ) // COIN1 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_START("DSW1") - PORT_DIPNAME( 0x01, 0x00, "DIPSW 1-1" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x01, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x00, "DIPSW 1-2" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x02, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x00, "DIPSW 1-3" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x04, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x00, "DIPSW 1-4" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x08, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x00, "Voices" ) - PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x00, "DIPSW 1-6" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x20, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x00, "DIPSW 1-7" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x40, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x00, "DIPSW 1-8" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x80, DEF_STR( On ) ) - - PORT_START("DSW2") - PORT_DIPNAME( 0x01, 0x00, "DIPSW 2-1" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x01, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x00, "DIPSW 2-2" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x02, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x00, "DIPSW 2-3" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x04, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x00, "DIPSW 2-4" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x08, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x00, "DIPSW 2-5" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x10, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x00, "DIPSW 2-6" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x20, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x00, "DIPSW 2-7" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x40, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x00, DEF_STR( Flip_Screen ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x80, DEF_STR( On ) ) + PORT_START("DSW2") + PORT_DIPNAME( 0x07, 0x00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:!1,!2,!3") + PORT_DIPSETTING( 0x00, "1" ) + PORT_DIPSETTING( 0x04, "2" ) + PORT_DIPSETTING( 0x02, "3" ) + PORT_DIPSETTING( 0x06, "4" ) + PORT_DIPSETTING( 0x01, "5" ) + PORT_DIPSETTING( 0x05, "6" ) + PORT_DIPSETTING( 0x03, "7" ) + PORT_DIPSETTING( 0x07, "8" ) + PORT_DIPNAME( 0x18, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:!4,!5") + PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) + PORT_DIPSETTING( 0x10, DEF_STR( 1C_2C ) ) + PORT_DIPSETTING( 0x08, DEF_STR( 2C_1C ) ) + PORT_DIPSETTING( 0x18, DEF_STR( 3C_1C ) ) + PORT_DIPNAME( 0x20, 0x00, "Ignore FURITEN" ) PORT_DIPLOCATION("SW1:!6") + PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x20, DEF_STR( On ) ) + PORT_DIPNAME( 0x40, 0x00, "PINFU with TSUMO" ) PORT_DIPLOCATION("SW1:!7") + PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x40, DEF_STR( On ) ) + PORT_DIPNAME( 0x80, 0x00, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:!8") + PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x80, DEF_STR( On ) ) + + PORT_START("DSW1") + PORT_DIPNAME( 0x01, 0x00, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW2:!1") + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) + PORT_DIPNAME( 0x06, 0x00, "Player Initial Score" ) PORT_DIPLOCATION("SW2:!2,!3") + PORT_DIPSETTING( 0x00, "1,000" ) + PORT_DIPSETTING( 0x04, "2,000" ) + PORT_DIPSETTING( 0x02, "3,000" ) + PORT_DIPSETTING( 0x06, "5,000" ) + PORT_DIPNAME( 0x08, 0x00, "Start GOLD" ) PORT_DIPLOCATION("SW2:!4") + PORT_DIPSETTING( 0x00, "1,000" ) + PORT_DIPSETTING( 0x08, "6,000" ) + PORT_DIPNAME( 0x10, 0x00, "Item Shop Voice" ) PORT_DIPLOCATION("SW2:!5") + PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x20, 0x00, "Stop Button (N)" ) PORT_DIPLOCATION("SW2:!6") + PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPUNUSED_DIPLOC( 0x40, 0x00, "SW2:!7" ) + PORT_DIPUNUSED_DIPLOC( 0x80, 0x00, "SW2:!8" ) PORT_INCLUDE( mahjong_panel ) INPUT_PORTS_END diff --git a/src/mame/drivers/jalmah.cpp b/src/mame/drivers/jalmah.cpp index 426aab1e010..932a6df347b 100644 --- a/src/mame/drivers/jalmah.cpp +++ b/src/mame/drivers/jalmah.cpp @@ -1268,13 +1268,13 @@ static INPUT_PORTS_START( kakumei ) PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW2:1") PORT_DIPSETTING( 0x0001, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPUNKNOWN_DIPLOC( 0x0002, 0x0002, "SW2:2" ) // Unused according to the manual + PORT_DIPUNUSED_DIPLOC( 0x0002, 0x0002, "SW2:2" ) // Unused according to the manual PORT_SERVICE_DIPLOC( 0x0004, IP_ACTIVE_LOW, "SW2:3" ) - PORT_DIPUNKNOWN_DIPLOC( 0x0008, 0x0008, "SW2:4" ) // Unused according to the manual - PORT_DIPUNKNOWN_DIPLOC( 0x0010, 0x0010, "SW2:5" ) // Unused according to the manual - PORT_DIPUNKNOWN_DIPLOC( 0x0020, 0x0020, "SW2:6" ) // Unused according to the manual - PORT_DIPUNKNOWN_DIPLOC( 0x0040, 0x0040, "SW2:7" ) // Unused according to the manual - PORT_DIPUNKNOWN_DIPLOC( 0x0080, 0x0080, "SW2:8" ) // Unused according to the manual + PORT_DIPUNUSED_DIPLOC( 0x0008, 0x0008, "SW2:4" ) // Unused according to the manual + PORT_DIPUNUSED_DIPLOC( 0x0010, 0x0010, "SW2:5" ) // Unused according to the manual + PORT_DIPUNUSED_DIPLOC( 0x0020, 0x0020, "SW2:6" ) // Unused according to the manual + PORT_DIPUNUSED_DIPLOC( 0x0040, 0x0040, "SW2:7" ) // Unused according to the manual + PORT_DIPUNUSED_DIPLOC( 0x0080, 0x0080, "SW2:8" ) // Unused according to the manual PORT_DIPNAME( 0x0700, 0x0700, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:1,2,3") PORT_DIPSETTING( 0x0100, DEF_STR( 4C_1C ) ) PORT_DIPSETTING( 0x0200, DEF_STR( 3C_1C ) ) @@ -1289,9 +1289,9 @@ static INPUT_PORTS_START( kakumei ) PORT_DIPSETTING( 0x1000, DEF_STR( Normal ) ) PORT_DIPSETTING( 0x0800, DEF_STR( Hard ) ) PORT_DIPSETTING( 0x0000, DEF_STR( Hardest ) ) - PORT_DIPUNKNOWN_DIPLOC( 0x2000, 0x2000, "SW1:6" ) // Unused according to the manual - PORT_DIPUNKNOWN_DIPLOC( 0x4000, 0x4000, "SW1:7" ) // Unused according to the manual - PORT_DIPUNKNOWN_DIPLOC( 0x8000, 0x8000, "SW1:8" ) // Unused according to the manual + PORT_DIPUNUSED_DIPLOC( 0x2000, 0x2000, "SW1:6" ) // Unused according to the manual + PORT_DIPUNUSED_DIPLOC( 0x4000, 0x4000, "SW1:7" ) // Unused according to the manual + PORT_DIPUNUSED_DIPLOC( 0x8000, 0x8000, "SW1:8" ) // Unused according to the manual INPUT_PORTS_END static INPUT_PORTS_START( kakumei2 ) diff --git a/src/mame/drivers/nbmj8891.cpp b/src/mame/drivers/nbmj8891.cpp index a1c6e2b9e4d..4c68272189e 100644 --- a/src/mame/drivers/nbmj8891.cpp +++ b/src/mame/drivers/nbmj8891.cpp @@ -767,93 +767,7 @@ INPUT_PORTS_END static INPUT_PORTS_START( msjiken ) PORT_START("DSWA") - PORT_DIPNAME( 0x07, 0x07, DEF_STR( Difficulty ) ) - PORT_DIPSETTING( 0x07, "1 (Easy)" ) - PORT_DIPSETTING( 0x06, "2" ) - PORT_DIPSETTING( 0x05, "3" ) - PORT_DIPSETTING( 0x04, "4" ) - PORT_DIPSETTING( 0x03, "5" ) - PORT_DIPSETTING( 0x02, "6" ) - PORT_DIPSETTING( 0x01, "7" ) - PORT_DIPSETTING( 0x00, "8 (Hard)" ) - PORT_DIPNAME( 0x08, 0x08, DEF_STR( Coinage ) ) - PORT_DIPSETTING( 0x08, DEF_STR( 1C_1C ) ) - PORT_DIPSETTING( 0x00, DEF_STR( 1C_2C ) ) - PORT_DIPNAME( 0x10, 0x10, DEF_STR( Flip_Screen ) ) - PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x00, DEF_STR( Demo_Sounds ) ) - PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x00, "Game Sounds" ) - PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x80, "Control Type" ) - PORT_DIPSETTING( 0x80, "ROYAL" ) - PORT_DIPSETTING( 0x00, "JAMMA" ) - - PORT_START("DSWB") - PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - - PORT_START("SYSTEM") - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, nbmj8891_state, nb1413m3_busyflag_r, nullptr) // DRAW BUSY - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED ) // - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE3 ) // MEMORY RESET - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE2 ) // ANALYZER - PORT_SERVICE( 0x10, IP_ACTIVE_LOW ) // TEST - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Credit Clear") PORT_CODE(KEYCODE_4) // CREDIT CLEAR - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 ) // COIN1 - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 ) // SERVICE - - PORT_INCLUDE( nbmjcontrols ) - - PORT_START("JAMMA1") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1 ) - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED ) - - PORT_START("JAMMA2") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON2 ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT) PORT_4WAY - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT) PORT_4WAY - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN) PORT_4WAY - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_UP) PORT_4WAY - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED ) -INPUT_PORTS_END - -static INPUT_PORTS_START( telmahjn ) - PORT_START("DSWA") - PORT_DIPNAME( 0x07, 0x07, DEF_STR( Difficulty ) ) + PORT_DIPNAME( 0x07, 0x07, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:1,2,3") PORT_DIPSETTING( 0x07, "1 (Easy)" ) PORT_DIPSETTING( 0x06, "2" ) PORT_DIPSETTING( 0x05, "3" ) @@ -862,47 +776,24 @@ static INPUT_PORTS_START( telmahjn ) PORT_DIPSETTING( 0x02, "6" ) PORT_DIPSETTING( 0x01, "7" ) PORT_DIPSETTING( 0x00, "8 (Hard)" ) - PORT_DIPNAME( 0x08, 0x08, DEF_STR( Coinage ) ) + PORT_DIPNAME( 0x08, 0x08, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:4") PORT_DIPSETTING( 0x08, DEF_STR( 1C_1C ) ) PORT_DIPSETTING( 0x00, DEF_STR( 1C_2C ) ) - PORT_DIPNAME( 0x10, 0x10, DEF_STR( Flip_Screen ) ) + PORT_DIPNAME( 0x10, 0x10, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:5") PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x00, DEF_STR( Demo_Sounds ) ) + PORT_DIPNAME( 0x20, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:6") PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x00, "Game Sounds" ) + PORT_DIPNAME( 0x40, 0x00, "Game Sounds" ) PORT_DIPLOCATION("SW1:7") PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x80, "Control Type" ) + PORT_DIPNAME( 0x80, 0x80, "Control Type" ) PORT_DIPLOCATION("SW1:8") PORT_DIPSETTING( 0x80, "ROYAL" ) PORT_DIPSETTING( 0x00, "JAMMA" ) PORT_START("DSWB") - PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_START("SYSTEM") PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, nbmj8891_state, nb1413m3_busyflag_r, nullptr) // DRAW BUSY @@ -3827,7 +3718,7 @@ ROM_END GAME( 1988, msjiken, 0, msjiken, msjiken, driver_device, 0, ROT270, "Nichibutsu", "Mahjong Satsujin Jiken (Japan 881017)", MACHINE_SUPPORTS_SAVE ) GAME( 1988, hanamomo, 0, hanamomo, hanamomo, driver_device, 0, ROT0, "Nichibutsu", "Mahjong Hana no Momoko gumi (Japan 881201)", MACHINE_SUPPORTS_SAVE ) GAME( 1988, hanamomb, hanamomo, hanamomo, hanamomo, driver_device, 0, ROT0, "Nichibutsu", "Mahjong Hana no Momoko gumi (Japan 881125)", MACHINE_SUPPORTS_SAVE ) -GAME( 1988, telmahjn, 0, telmahjn, telmahjn, nbmj8891_state, telmahjn, ROT270, "Nichibutsu", "Telephone Mahjong (Japan 890111)", MACHINE_SUPPORTS_SAVE ) +GAME( 1988, telmahjn, 0, telmahjn, msjiken, nbmj8891_state, telmahjn, ROT270, "Nichibutsu", "Telephone Mahjong (Japan 890111)", MACHINE_SUPPORTS_SAVE ) GAME( 1989, gionbana, 0, gionbana, gionbana, nbmj8891_state, gionbana, ROT0, "Nichibutsu", "Gionbana (Japan 890120)", MACHINE_SUPPORTS_SAVE ) GAME( 1989, mgion, 0, mgion, mgion, driver_device, 0, ROT0, "Nichibutsu", "Gionbana [BET] (Japan 890207)", MACHINE_SUPPORTS_SAVE ) GAME( 1989, omotesnd, 0, omotesnd, omotesnd, nbmj8891_state, omotesnd, ROT0, "Anime Tec", "Omotesandou (Japan 890215)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/osd/modules/file/posixfile.cpp b/src/osd/modules/file/posixfile.cpp index 53b4e1c9893..09ed0ac7984 100644 --- a/src/osd/modules/file/posixfile.cpp +++ b/src/osd/modules/file/posixfile.cpp @@ -39,6 +39,7 @@ // MAME headers #include "posixfile.h" +#include "unicode.h" #include <cassert> #include <cerrno> @@ -66,7 +67,6 @@ constexpr char PATHSEPCH = '\\'; constexpr char INVPATHSEPCH = '/'; #else constexpr char PATHSEPCH = '/'; -constexpr char INVPATHSEPCH = '\\'; #endif @@ -164,7 +164,11 @@ private: bool is_path_separator(char c) { +#if defined(WIN32) return (c == PATHSEPCH) || (c == INVPATHSEPCH); +#else + return c == PATHSEPCH; +#endif } @@ -176,7 +180,7 @@ osd_file::error create_path_recursive(std::string const &path) { // if there's still a separator, and it's not the root, nuke it and recurse auto const sep = path.rfind(PATHSEPCH); - if ((sep != std::string::npos) && (sep > 0) && (path[sep] != ':') && (path[sep - 1] != PATHSEPCH)) + if ((sep != std::string::npos) && (sep > 0) && (path[sep - 1] != PATHSEPCH)) { osd_file::error const err = create_path_recursive(path.substr(0, sep)); if (err != osd_file::error::NONE) @@ -235,8 +239,10 @@ osd_file::error osd_file::open(std::string const &path, std::uint32_t openflags, // convert the path into something compatible dst = path; +#if defined(WIN32) for (auto it = dst.begin(); it != dst.end(); ++it) *it = (INVPATHSEPCH == *it) ? PATHSEPCH : *it; +#endif osd_subst_env(dst, dst); // attempt to open the file @@ -461,7 +467,48 @@ const char *osd_get_volume_name(int idx) return "/"; else return nullptr; - } +} + + +//============================================================ +// osd_is_valid_filename_char +//============================================================ + +bool osd_is_valid_filename_char(unicode_char uchar) +{ + // The only one that's actually invalid is the slash + // The other two are just problematic because they're the escape character and path separator + return osd_is_valid_filepath_char(uchar) +#if defined(WIN32) + && uchar != PATHSEPCH + && uchar != INVPATHSEPCH +#else + && uchar != PATHSEPCH + && uchar != '\\' +#endif + && uchar != ':'; +} + + +//============================================================ +// osd_is_valid_filepath_char +//============================================================ + +bool osd_is_valid_filepath_char(unicode_char uchar) +{ + // One could argue that colon should be in here too because it functions as path separator + return uchar >= 0x20 + && !(uchar >= '\x7F' && uchar <= '\x9F') +#if defined(WIN32) + && uchar != '<' + && uchar != '>' + && uchar != '\"' + && uchar != '|' + && uchar != '?' + && uchar != '*' +#endif + && uchar_isvalid(uchar); +} //============================================================ diff --git a/src/osd/modules/file/winfile.cpp b/src/osd/modules/file/winfile.cpp index c304259b915..1885925f9ee 100644 --- a/src/osd/modules/file/winfile.cpp +++ b/src/osd/modules/file/winfile.cpp @@ -14,6 +14,7 @@ #include "strconv.h" #include "winutil.h" #include "winutf8.h" +#include "unicode.h" // MAME headers #include "osdcore.h" @@ -466,6 +467,39 @@ const char *osd_get_volume_name(int idx) //============================================================ +// osd_is_valid_filename_char +//============================================================ + +bool osd_is_valid_filename_char(unicode_char uchar) +{ + return osd_is_valid_filepath_char(uchar) + && uchar != '/' + && uchar != '\\' + && uchar != ':'; +} + + + +//============================================================ +// osd_is_valid_filepath_char +//============================================================ + +bool osd_is_valid_filepath_char(unicode_char uchar) +{ + return uchar >= 0x20 + && uchar != '<' + && uchar != '>' + && uchar != '\"' + && uchar != '|' + && uchar != '?' + && uchar != '*' + && !(uchar >= '\x7F' && uchar <= '\x9F') + && uchar_isvalid(uchar); +} + + + +//============================================================ // win_error_to_file_error //============================================================ diff --git a/src/osd/modules/lib/osdobj_common.cpp b/src/osd/modules/lib/osdobj_common.cpp index 1587ef63b7f..7659905ec88 100644 --- a/src/osd/modules/lib/osdobj_common.cpp +++ b/src/osd/modules/lib/osdobj_common.cpp @@ -147,7 +147,6 @@ const options_entry osd_options::s_option_entries[] = { OSDOPTION_BGFX_DEBUG, "0", OPTION_BOOLEAN, "enable BGFX debugging statistics" }, { OSDOPTION_BGFX_SCREEN_CHAINS, "default", OPTION_STRING, "comma-delimited list of screen chain JSON names, colon-delimited per-window" }, { OSDOPTION_BGFX_SHADOW_MASK, "slot-mask.png", OPTION_STRING, "shadow mask texture name" }, - { OSDOPTION_BGFX_AVI_NAME, "bgfx.avi", OPTION_STRING, "filename for BGFX output logging" }, // End of list { nullptr } diff --git a/src/osd/modules/lib/osdobj_common.h b/src/osd/modules/lib/osdobj_common.h index 7d4238fcbbd..8b7e5c1f117 100644 --- a/src/osd/modules/lib/osdobj_common.h +++ b/src/osd/modules/lib/osdobj_common.h @@ -83,7 +83,6 @@ #define OSDOPTION_BGFX_DEBUG "bgfx_debug" #define OSDOPTION_BGFX_SCREEN_CHAINS "bgfx_screen_chains" #define OSDOPTION_BGFX_SHADOW_MASK "bgfx_shadow_mask" -#define OSDOPTION_BGFX_AVI_NAME "bgfx_avi_name" //============================================================ // TYPE DEFINITIONS @@ -157,7 +156,6 @@ public: bool bgfx_debug() const { return bool_value(OSDOPTION_BGFX_DEBUG); } const char *bgfx_screen_chains() const { return value(OSDOPTION_BGFX_SCREEN_CHAINS); } const char *bgfx_shadow_mask() const { return value(OSDOPTION_BGFX_SHADOW_MASK); } - const char *bgfx_avi_name() const { return value(OSDOPTION_BGFX_AVI_NAME); } private: static const options_entry s_option_entries[]; diff --git a/src/osd/modules/render/aviwrite.cpp b/src/osd/modules/render/aviwrite.cpp index 9ff7c5ab17d..38bc55f1c0c 100644 --- a/src/osd/modules/render/aviwrite.cpp +++ b/src/osd/modules/render/aviwrite.cpp @@ -27,17 +27,14 @@ avi_write::~avi_write() } } -void avi_write::record(std::string name) +void avi_write::record() { if (m_recording) { end_avi_recording(); } - if (name != "") - { - begin_avi_recording(name); - } + begin_avi_recording(); } void avi_write::stop() @@ -46,7 +43,7 @@ void avi_write::stop() end_avi_recording(); } -void avi_write::begin_avi_recording(std::string name) +void avi_write::begin_avi_recording() { // stop any existing recording end_avi_recording(); @@ -73,25 +70,20 @@ void avi_write::begin_avi_recording(std::string name) info.audio_samplebits = 16; info.audio_samplerate = m_machine.sample_rate(); - // create a new temporary movie file - osd_file::error filerr; - std::string fullpath; - { - emu_file tempfile(m_machine.options().snapshot_directory(), OPEN_FLAG_WRITE | OPEN_FLAG_CREATE | OPEN_FLAG_CREATE_PATHS); - filerr = tempfile.open(name.c_str()); - - // compute the frame time - m_frame_period = attotime::from_seconds(1000) / info.video_timescale; + // compute the frame time + m_frame_period = attotime::from_seconds(1000) / info.video_timescale; - // if we succeeded, make a copy of the name and create the real file over top - if (filerr == osd_file::error::NONE) - { - fullpath = tempfile.fullpath(); - } - } + // create a new temporary movie file + emu_file tempfile(m_machine.options().snapshot_directory(), OPEN_FLAG_WRITE | OPEN_FLAG_CREATE | OPEN_FLAG_CREATE_PATHS); + + osd_file::error filerr = m_machine.video().open_next(tempfile, "avi"); + // if we succeeded, make a copy of the name and create the real file over top if (filerr == osd_file::error::NONE) { + std::string fullpath = tempfile.fullpath(); + tempfile.close(); + // create the file and free the string avi_file::error avierr = avi_file::create(fullpath, info, m_output_file); if (avierr != avi_file::error::NONE) diff --git a/src/osd/modules/render/aviwrite.h b/src/osd/modules/render/aviwrite.h index ce6325d6815..cfa7779cf15 100644 --- a/src/osd/modules/render/aviwrite.h +++ b/src/osd/modules/render/aviwrite.h @@ -22,7 +22,7 @@ public: avi_write(running_machine& machine, uint32_t width, uint32_t height); ~avi_write(); - void record(std::string name); + void record(); void stop(); void audio_frame(const INT16 *buffer, int samples_this_frame); void video_frame(bitmap_rgb32& snap); @@ -31,7 +31,7 @@ public: bool recording() const { return m_recording; } private: - void begin_avi_recording(std::string name); + void begin_avi_recording(); void end_avi_recording(); running_machine& m_machine; diff --git a/src/osd/modules/render/d3d/d3dhlsl.cpp b/src/osd/modules/render/d3d/d3dhlsl.cpp index f3ef869c87f..54d63e1029e 100644 --- a/src/osd/modules/render/d3d/d3dhlsl.cpp +++ b/src/osd/modules/render/d3d/d3dhlsl.cpp @@ -19,6 +19,7 @@ // MAMEOS headers #include "winmain.h" #include "window.h" +#include "modules/render/aviwrite.h" #include "modules/render/drawd3d.h" #include "d3dcomm.h" #include "strconv.h" @@ -27,15 +28,124 @@ //============================================================ -// GLOBALS +// PROTOTYPES //============================================================ +static void get_vector(const char *data, int count, float *out, bool report_error); + //============================================================ -// PROTOTYPES +// HLSL post-render AVI recorder //============================================================ -static void get_vector(const char *data, int count, float *out, bool report_error); +class movie_recorder +{ +public: + movie_recorder(running_machine& machine, renderer_d3d9 *d3d, int width, int height) + : m_initialized(false), m_d3d(d3d), m_width(width), m_height(height) + , m_sys_texture(nullptr), m_sys_surface(nullptr) + , m_vid_texture(nullptr), m_vid_surface(nullptr) + { + HRESULT result; + + m_avi_writer = std::make_unique<avi_write>(machine, width, height); + + m_frame.allocate(width, height); + if (!m_frame.valid()) + return; + + result = d3d->get_device()->CreateTexture(width, height, 1, D3DUSAGE_DYNAMIC, D3DFMT_A8R8G8B8, D3DPOOL_SYSTEMMEM, &m_sys_texture, nullptr); + if (FAILED(result)) + { + osd_printf_verbose("Direct3D: Unable to init system-memory target for HLSL AVI dumping (%08lX)\n", result); + return; + } + m_sys_texture->GetSurfaceLevel(0, &m_sys_surface); + + result = d3d->get_device()->CreateTexture(width, height, 1, D3DUSAGE_RENDERTARGET, D3DFMT_A8R8G8B8, D3DPOOL_DEFAULT, &m_vid_texture, nullptr); + if (FAILED(result)) + { + osd_printf_verbose("Direct3D: Unable to init video-memory target for HLSL AVI dumping (%08lX)\n", result); + return; + } + m_vid_texture->GetSurfaceLevel(0, &m_vid_surface); + + m_initialized = true; + } + + ~movie_recorder() + { + if (m_sys_texture != nullptr) + m_sys_texture->Release(); + + if (m_sys_surface != nullptr) + m_sys_surface->Release(); + + if (m_vid_texture != nullptr) + m_vid_texture->Release(); + + if (m_vid_surface != nullptr) + m_vid_surface->Release(); + } + + void record() + { + if (!m_initialized) + return; + + m_avi_writer->record(); + } + + void save_frame() + { + if (!m_initialized) + return; + + // copy the frame from video memory, where it is not accessible, to system memory + HRESULT result = m_d3d->get_device()->GetRenderTargetData(m_vid_surface, m_sys_surface); + if (FAILED(result)) + return; + + D3DLOCKED_RECT rect; + result = m_sys_surface->LockRect(&rect, nullptr, D3DLOCK_DISCARD); + if (FAILED(result)) + return; + + for (int y = 0; y < m_height; y++) + { + DWORD *src = (DWORD *)((BYTE *)rect.pBits + y * rect.Pitch); + UINT32 *dst = &m_frame.pix32(y); + + for (int x = 0; x < m_width; x++) + { + *dst++ = *src++; + } + } + + result = m_sys_surface->UnlockRect(); + if (FAILED(result)) + osd_printf_verbose("Direct3D: Error %08lX during texture UnlockRect call\n", result); + + m_avi_writer->video_frame(m_frame); + } + + IDirect3DSurface9 * target_surface() { return m_vid_surface; } + +private: + bool m_initialized; + + renderer_d3d9 * m_d3d; + + std::unique_ptr<avi_write> m_avi_writer; + + bitmap_rgb32 m_frame; + int m_width; + int m_height; + IDirect3DTexture9 * m_sys_texture; // texture in system memory + IDirect3DSurface9 * m_sys_surface; // surface in system memory + IDirect3DTexture9 * m_vid_texture; // texture in video memory + IDirect3DSurface9 * m_vid_surface; // surface in video memory +}; //============================================================ @@ -43,12 +153,15 @@ static void get_vector(const char *data, int count, float *out, bool report_erro //============================================================ shaders::shaders() : - d3dintf(nullptr), machine(nullptr), d3d(nullptr), post_fx_enable(false), oversampling_enable(false), num_screens(0), curr_screen(0), - shadow_texture(nullptr), options(nullptr), avi_output_file(nullptr), avi_frame(0), avi_copy_surface(nullptr), avi_copy_texture(nullptr), avi_final_target(nullptr), avi_final_texture(nullptr), - black_surface(nullptr), black_texture(nullptr), render_snap(false), snap_rendered(false), snap_copy_target(nullptr), snap_copy_texture(nullptr), snap_target(nullptr), snap_texture(nullptr), - snap_width(0), snap_height(0), initialized(false), backbuffer(nullptr), curr_effect(nullptr), default_effect(nullptr), prescale_effect(nullptr), post_effect(nullptr), - distortion_effect(nullptr), focus_effect(nullptr), phosphor_effect(nullptr), deconverge_effect(nullptr), color_effect(nullptr), ntsc_effect(nullptr), bloom_effect(nullptr), - downsample_effect(nullptr), vector_effect(nullptr), curr_texture(nullptr), curr_render_target(nullptr), curr_poly(nullptr) + d3dintf(nullptr), machine(nullptr), d3d(nullptr), post_fx_enable(false), oversampling_enable(false), + num_screens(0), curr_screen(0), shadow_texture(nullptr), options(nullptr), black_surface(nullptr), + black_texture(nullptr), recording_movie(false),render_snap(false), snap_copy_target(nullptr), + snap_copy_texture(nullptr), snap_target(nullptr), snap_texture(nullptr), snap_width(0), snap_height(0), + initialized(false), backbuffer(nullptr), curr_effect(nullptr), default_effect(nullptr), + prescale_effect(nullptr), post_effect(nullptr), distortion_effect(nullptr), focus_effect(nullptr), + phosphor_effect(nullptr), deconverge_effect(nullptr), color_effect(nullptr), ntsc_effect(nullptr), + bloom_effect(nullptr), downsample_effect(nullptr), vector_effect(nullptr), curr_texture(nullptr), + curr_render_target(nullptr), curr_poly(nullptr) { } @@ -73,15 +186,13 @@ shaders::~shaders() //============================================================ -// shaders::window_save +// shaders::save_snapshot //============================================================ -void shaders::window_save() +void shaders::save_snapshot() { if (!enabled()) - { return; - } HRESULT result = d3d->get_device()->CreateTexture(snap_width, snap_height, 1, D3DUSAGE_DYNAMIC, D3DFMT_A8R8G8B8, D3DPOOL_SYSTEMMEM, &snap_copy_texture, nullptr); if (FAILED(result)) @@ -100,88 +211,31 @@ void shaders::window_save() snap_texture->GetSurfaceLevel(0, &snap_target); render_snap = true; - snap_rendered = false; } //============================================================ -// shaders::window_record +// shaders::record_movie //============================================================ -void shaders::window_record() +void shaders::record_movie() { if (!enabled()) - { return; - } - - windows_options &options = downcast<windows_options &>(machine->options()); - const char *filename = options.d3d_hlsl_write(); - if (avi_output_file != nullptr) - { - end_avi_recording(); - } - else if (filename[0] != 0) - { - begin_avi_recording(filename); - } -} - - -//============================================================ -// shaders::avi_update_snap -//============================================================ - -void shaders::avi_update_snap(IDirect3DSurface9 *surface) -{ - if (!enabled()) - { - return; - } - - D3DLOCKED_RECT rect; - - // if we don't have a bitmap, or if it's not the right size, allocate a new one - if (!avi_snap.valid() || snap_width != avi_snap.width() || snap_height != avi_snap.height()) - { - avi_snap.allocate(snap_width, snap_height); - } - - // copy the texture - HRESULT result = d3d->get_device()->GetRenderTargetData(surface, avi_copy_surface); - if (FAILED(result)) + if (recording_movie) { + recorder.reset(); + recording_movie = false; return; } - // lock the texture - result = avi_copy_surface->LockRect(&rect, nullptr, D3DLOCK_DISCARD); - if (FAILED(result)) - { - return; - } - - // loop over Y - for (int srcy = 0; srcy < snap_height; srcy++) - { - DWORD *src = (DWORD *)((BYTE *)rect.pBits + srcy * rect.Pitch); - UINT32 *dst = &avi_snap.pix32(srcy); - - for (int x = 0; x < snap_width; x++) - { - *dst++ = *src++; - } - } - - // unlock - result = avi_copy_surface->UnlockRect(); - if (FAILED(result)) - osd_printf_verbose("Direct3D: Error %08lX during texture UnlockRect call\n", result); + recorder = std::make_unique<movie_recorder>(*machine, d3d, snap_width, snap_height); + recorder->record(); + recording_movie = true; } - //============================================================ // hlsl_render_snapshot //============================================================ @@ -189,39 +243,26 @@ void shaders::avi_update_snap(IDirect3DSurface9 *surface) void shaders::render_snapshot(IDirect3DSurface9 *surface) { if (!enabled()) - { return; - } - D3DLOCKED_RECT rect; - - render_snap = false; - - // if we don't have a bitmap, or if it's not the right size, allocate a new one - if (!avi_snap.valid() || snap_width != avi_snap.width() || snap_height != avi_snap.height()) - { - avi_snap.allocate(snap_width, snap_height); - } + bitmap_rgb32 snapshot(snap_width, snap_height); + if (!snapshot.valid()) + return; // copy the texture HRESULT result = d3d->get_device()->GetRenderTargetData(surface, snap_copy_target); if (FAILED(result)) - { return; - } - // lock the texture + D3DLOCKED_RECT rect; result = snap_copy_target->LockRect(&rect, nullptr, D3DLOCK_DISCARD); if (FAILED(result)) - { return; - } - // loop over Y - for (int srcy = 0; srcy < snap_height; srcy++) + for (int y = 0; y < snap_height; y++) { - DWORD *src = (DWORD *)((BYTE *)rect.pBits + srcy * rect.Pitch); - UINT32 *dst = &avi_snap.pix32(srcy); + DWORD *src = (DWORD *)((BYTE *)rect.pBits + y * rect.Pitch); + UINT32 *dst = &snapshot.pix32(y); for (int x = 0; x < snap_width; x++) { @@ -232,9 +273,7 @@ void shaders::render_snapshot(IDirect3DSurface9 *surface) emu_file file(machine->options().snapshot_directory(), OPEN_FLAG_WRITE | OPEN_FLAG_CREATE | OPEN_FLAG_CREATE_PATHS); osd_file::error filerr = machine->video().open_next(file, "png"); if (filerr != osd_file::error::NONE) - { return; - } // add two text entries describing the image std::string text1 = std::string(emulator_info::get_appname()).append(" ").append(emulator_info::get_build_version()); @@ -244,16 +283,13 @@ void shaders::render_snapshot(IDirect3DSurface9 *surface) png_add_text(&pnginfo, "System", text2.c_str()); // now do the actual work - png_error error = png_write_bitmap(file, &pnginfo, avi_snap, 1 << 24, nullptr); + png_error error = png_write_bitmap(file, &pnginfo, snapshot, 1 << 24, nullptr); if (error != PNGERR_NONE) - { osd_printf_error("Error generating PNG for HLSL snapshot: png_error = %d\n", error); - } // free any data allocated png_free(&pnginfo); - // unlock result = snap_copy_target->UnlockRect(); if (FAILED(result)) osd_printf_verbose("Direct3D: Error %08lX during texture UnlockRect call\n", result); @@ -285,141 +321,6 @@ void shaders::render_snapshot(IDirect3DSurface9 *surface) //============================================================ -// shaders::record_texture -//============================================================ - -void shaders::record_texture() -{ - if (!enabled()) - { - return; - } - - IDirect3DSurface9 *surface = avi_final_target; - - // ignore if nothing to do - if (avi_output_file == nullptr || surface == nullptr) - { - return; - } - - // get the current time - attotime curtime = machine->time(); - - avi_update_snap(surface); - - // loop until we hit the right time - while (avi_next_frame_time <= curtime) - { - // handle an AVI recording - // write the next frame - avi_file::error avierr = avi_output_file->append_video_frame(avi_snap); - if (avierr != avi_file::error::NONE) - { - end_avi_recording(); - return; - } - - // advance time - avi_next_frame_time += avi_frame_period; - avi_frame++; - } -} - - -//============================================================ -// shaders::end_avi_recording -//============================================================ - -void shaders::end_avi_recording() -{ - if (!enabled()) - { - return; - } - - if (avi_output_file) - { - avi_output_file.reset(); - } - - avi_output_file = nullptr; - avi_frame = 0; -} - - -//============================================================ -// shaders::begin_avi_recording -//============================================================ - -void shaders::begin_avi_recording(const char *name) -{ - if (!enabled()) - { - return; - } - - // stop any existing recording - end_avi_recording(); - - // reset the state - avi_frame = 0; - avi_next_frame_time = machine->time(); - - // build up information about this new movie - avi_file::movie_info info; - info.video_format = 0; - info.video_timescale = 1000 * ((machine->first_screen() != nullptr) ? ATTOSECONDS_TO_HZ(machine->first_screen()->frame_period().m_attoseconds) : screen_device::DEFAULT_FRAME_RATE); - info.video_sampletime = 1000; - info.video_numsamples = 0; - info.video_width = snap_width; - info.video_height = snap_height; - info.video_depth = 24; - - info.audio_format = 0; - info.audio_timescale = machine->sample_rate(); - info.audio_sampletime = 1; - info.audio_numsamples = 0; - info.audio_channels = 2; - info.audio_samplebits = 16; - info.audio_samplerate = machine->sample_rate(); - - // create a new temporary movie file - osd_file::error filerr; - std::string fullpath; - - emu_file tempfile(machine->options().snapshot_directory(), OPEN_FLAG_WRITE | OPEN_FLAG_CREATE | OPEN_FLAG_CREATE_PATHS); - if (name != nullptr) - { - filerr = tempfile.open(name); - } - else - { - filerr = machine->video().open_next(tempfile, "avi"); - } - - // compute the frame time - avi_frame_period = attotime::from_seconds(1000) / info.video_timescale; - - // if we succeeded, make a copy of the name and create the real file over top - if (filerr == osd_file::error::NONE) - { - fullpath = tempfile.fullpath(); - } - - if (filerr == osd_file::error::NONE) - { - // create the file and free the string - avi_file::error avierr = avi_file::create(fullpath, info, avi_output_file); - if (avierr != avi_file::error::NONE) - { - osd_printf_error("Error creating AVI: %s\n", avi_file::error_string(avierr)); - } - } -} - - -//============================================================ // remove_cache_target - remove an active cache target //============================================================ @@ -757,29 +658,15 @@ int shaders::create_resources() result = d3d->get_device()->SetRenderTarget(0, black_surface); if (FAILED(result)) osd_printf_verbose("Direct3D: Error %08lX during device SetRenderTarget call\n", result); + result = d3d->get_device()->Clear(0, nullptr, D3DCLEAR_TARGET, D3DCOLOR_ARGB(0,0,0,0), 0, 0); if (FAILED(result)) osd_printf_verbose("Direct3D: Error %08lX during device clear call\n", result); + result = d3d->get_device()->SetRenderTarget(0, backbuffer); if (FAILED(result)) osd_printf_verbose("Direct3D: Error %08lX during device SetRenderTarget call\n", result); - result = d3d->get_device()->CreateTexture(snap_width, snap_height, 1, D3DUSAGE_DYNAMIC, D3DFMT_A8R8G8B8, D3DPOOL_SYSTEMMEM, &avi_copy_texture, nullptr); - if (FAILED(result)) - { - osd_printf_verbose("Direct3D: Unable to init system-memory target for HLSL AVI dumping (%08lX)\n", result); - return 1; - } - avi_copy_texture->GetSurfaceLevel(0, &avi_copy_surface); - - result = d3d->get_device()->CreateTexture(snap_width, snap_height, 1, D3DUSAGE_RENDERTARGET, D3DFMT_A8R8G8B8, D3DPOOL_DEFAULT, &avi_final_texture, nullptr); - if (FAILED(result)) - { - osd_printf_verbose("Direct3D: Unable to init video-memory target for HLSL AVI dumping (%08lX)\n", result); - return 1; - } - avi_final_texture->GetSurfaceLevel(0, &avi_final_target); - emu_file file(machine->options().art_path(), OPEN_FLAG_READ); render_load_png(shadow_bitmap, file, nullptr, options->shadow_mask_texture); @@ -948,16 +835,6 @@ void shaders::begin_draw() //============================================================ -// shaders::begin_frame -//============================================================ - -void shaders::begin_frame() -{ - record_texture(); -} - - -//============================================================ // shaders::blit //============================================================ @@ -1010,24 +887,6 @@ void shaders::blit( //============================================================ -// shaders::end_frame -//============================================================ - -void shaders::end_frame() -{ - if (!enabled()) - { - return; - } - - if (render_snap && snap_rendered) - { - render_snapshot(snap_target); - } -} - - -//============================================================ // shaders::find_render_target //============================================================ @@ -1400,8 +1259,6 @@ int shaders::vector_pass(d3d_render_target *rt, int source_index, poly_info *pol curr_effect = vector_effect; curr_effect->update_uniforms(); - // curr_effect->set_float("TimeRatio", options->vector_time_ratio); - // curr_effect->set_float("TimeScale", options->vector_time_scale); curr_effect->set_float("LengthRatio", options->vector_length_ratio); curr_effect->set_float("LengthScale", options->vector_length_scale); curr_effect->set_float("BeamSmooth", options->vector_beam_smooth); @@ -1440,15 +1297,15 @@ int shaders::screen_pass(d3d_render_target *rt, int source_index, poly_info *pol // we do not clear the backbuffer here because multiple screens might be rendered into blit(backbuffer, false, poly->type(), vertnum, poly->count()); - if (avi_output_file != nullptr) + if (recording_movie) { - blit(avi_final_target, false, poly->type(), vertnum, poly->count()); + blit(recorder->target_surface(), false, poly->type(), vertnum, poly->count()); HRESULT result = d3d->get_device()->SetRenderTarget(0, backbuffer); if (FAILED(result)) - { osd_printf_verbose("Direct3D: Error %08lX during device SetRenderTarget call\n", result); - } + + recorder->save_frame(); } if (render_snap) @@ -1457,11 +1314,11 @@ int shaders::screen_pass(d3d_render_target *rt, int source_index, poly_info *pol HRESULT result = d3d->get_device()->SetRenderTarget(0, backbuffer); if (FAILED(result)) - { osd_printf_verbose("Direct3D: Error %08lX during device SetRenderTarget call\n", result); - } - snap_rendered = true; + render_snapshot(snap_target); + + render_snap = false; } return next_index; @@ -1875,7 +1732,8 @@ void shaders::delete_resources() return; } - end_avi_recording(); + recording_movie = false; + recorder.reset(); if (options != nullptr) { @@ -1965,30 +1823,6 @@ void shaders::delete_resources() black_texture = nullptr; } - if (avi_copy_texture != nullptr) - { - avi_copy_texture->Release(); - avi_copy_texture = nullptr; - } - - if (avi_copy_surface != nullptr) - { - avi_copy_surface->Release(); - avi_copy_surface = nullptr; - } - - if (avi_final_texture != nullptr) - { - avi_final_texture->Release(); - avi_final_texture = nullptr; - } - - if (avi_final_target != nullptr) - { - avi_final_target->Release(); - avi_final_target = nullptr; - } - shadow_bitmap.reset(); } diff --git a/src/osd/modules/render/d3d/d3dhlsl.h b/src/osd/modules/render/d3d/d3dhlsl.h index 130b48c26e5..4200b4a3faf 100644 --- a/src/osd/modules/render/d3d/d3dhlsl.h +++ b/src/osd/modules/render/d3d/d3dhlsl.h @@ -10,7 +10,6 @@ #define __WIN_D3DHLSL__ #include <vector> -#include "aviio.h" #include "../frontend/mame/ui/menuitem.h" #include "../frontend/mame/ui/slider.h" #include "modules/lib/osdlib.h" @@ -158,6 +157,7 @@ private: class d3d_render_target; class cache_target; class renderer_d3d9; +class movie_recorder; /* hlsl_options is the information about runtime-mutable Direct3D HLSL options */ /* in the future this will be moved into an OSD/emu shared buffer */ @@ -284,9 +284,6 @@ public: d3d_render_target* get_vector_target(render_primitive *prim); bool create_vector_target(render_primitive *prim); - void begin_frame(); - void end_frame(); - void begin_draw(); void end_draw(); @@ -297,13 +294,9 @@ public: bool add_render_target(renderer_d3d9* d3d, render_primitive *prim, texture_info* texture, int source_width, int source_height, int target_width, int target_height); bool add_cache_target(renderer_d3d9* d3d, texture_info* texture, int source_width, int source_height, int target_width, int target_height, int screen_index); - void window_save(); - void window_record(); - bool recording() const { return avi_output_file != nullptr; } + void save_snapshot(); + void record_movie(); - void avi_update_snap(IDirect3DSurface9 *surface); - void render_snapshot(IDirect3DSurface9 *surface); - void record_texture(); void init_fsfx_quad(); void set_texture(texture_info *info); @@ -326,8 +319,7 @@ private: void blit(IDirect3DSurface9 *dst, bool clear_dst, D3DPRIMITIVETYPE prim_type, UINT32 prim_index, UINT32 prim_count); void enumerate_screens(); - void end_avi_recording(); - void begin_avi_recording(const char *name); + void render_snapshot(IDirect3DSurface9 *surface); d3d_render_target* find_render_target(int source_width, int source_height, UINT32 screen_index, UINT32 page_index); cache_target * find_cache_target(UINT32 screen_index, int width, int height); @@ -364,21 +356,13 @@ private: texture_info * shadow_texture; // shadow mask texture for post-processing shader hlsl_options * options; // current options - avi_file::ptr avi_output_file; // AVI file - bitmap_rgb32 avi_snap; // AVI snapshot - int avi_frame; // AVI frame - attotime avi_frame_period; // AVI frame period - attotime avi_next_frame_time; // AVI next frame time - IDirect3DSurface9 * avi_copy_surface; // AVI destination surface in system memory - IDirect3DTexture9 * avi_copy_texture; // AVI destination texture in system memory - IDirect3DSurface9 * avi_final_target; // AVI upscaled surface - IDirect3DTexture9 * avi_final_texture; // AVI upscaled texture - IDirect3DSurface9 * black_surface; // black dummy surface IDirect3DTexture9 * black_texture; // black dummy texture + bool recording_movie; // ongoing movie recording + std::unique_ptr<movie_recorder> recorder; // HLSL post-render movie recorder + bool render_snap; // whether or not to take HLSL post-render snapshot - bool snap_rendered; // whether we just rendered our HLSL post-render shot or not IDirect3DSurface9 * snap_copy_target; // snapshot destination surface in system memory IDirect3DTexture9 * snap_copy_texture; // snapshot destination surface in system memory IDirect3DSurface9 * snap_target; // snapshot upscaled surface diff --git a/src/osd/modules/render/drawbgfx.cpp b/src/osd/modules/render/drawbgfx.cpp index dec0110157a..79b7c5d4a70 100644 --- a/src/osd/modules/render/drawbgfx.cpp +++ b/src/osd/modules/render/drawbgfx.cpp @@ -270,7 +270,7 @@ void renderer_bgfx::record() } else { - m_avi_writer->record(m_options.bgfx_avi_name()); + m_avi_writer->record(); m_avi_target = m_targets->create_target("avibuffer", bgfx::TextureFormat::RGBA8, m_width[0], m_height[0], TARGET_STYLE_CUSTOM, false, true, 1, 0); m_avi_texture = bgfx::createTexture2D(m_width[0], m_height[0], 1, bgfx::TextureFormat::RGBA8, BGFX_TEXTURE_BLIT_DST | BGFX_TEXTURE_READ_BACK); } diff --git a/src/osd/modules/render/drawd3d.cpp b/src/osd/modules/render/drawd3d.cpp index 64ac2ca6774..83aab350052 100644 --- a/src/osd/modules/render/drawd3d.cpp +++ b/src/osd/modules/render/drawd3d.cpp @@ -142,12 +142,12 @@ void renderer_d3d9::toggle_fsfx() void renderer_d3d9::record() { - get_shaders()->window_record(); + get_shaders()->record_movie(); } void renderer_d3d9::save() { - get_shaders()->window_save(); + get_shaders()->save_snapshot(); } @@ -671,8 +671,6 @@ void renderer_d3d9::begin_frame() if (FAILED(result)) osd_printf_verbose("Direct3D: Error %08lX during device clear call\n", result); - m_shaders->begin_frame(); - win->m_primlist->acquire_lock(); // first update any textures @@ -740,8 +738,6 @@ void renderer_d3d9::end_frame() // flush any pending polygons primitive_flush_pending(); - m_shaders->end_frame(); - // finish the scene HRESULT result = m_device->EndScene(); if (FAILED(result)) diff --git a/src/osd/osdcomm.h b/src/osd/osdcomm.h index ff8ca667713..c6c15d0df2a 100644 --- a/src/osd/osdcomm.h +++ b/src/osd/osdcomm.h @@ -85,6 +85,11 @@ using INT64 = std::int64_t; /* pointer-sized values */ using FPTR = uintptr_t; +/* unicode types */ +using utf16_char = std::uint16_t; +using unicode_char = std::uint32_t; + + /*************************************************************************** diff --git a/src/osd/osdcore.h b/src/osd/osdcore.h index a224fb7059c..7b12a51422c 100644 --- a/src/osd/osdcore.h +++ b/src/osd/osdcore.h @@ -290,9 +290,38 @@ int osd_get_physical_drive_geometry(const char *filename, UINT32 *cylinders, UIN The number of characters required to form a Unicode character. -----------------------------------------------------------------------------*/ -int osd_uchar_from_osdchar(UINT32 /* unicode_char */ *uchar, const char *osdchar, size_t count); +int osd_uchar_from_osdchar(unicode_char *uchar, const char *osdchar, size_t count); +/*----------------------------------------------------------------------------- + osd_is_valid_filename_char: is the given character legal for filenames? + + Parameters: + + uchar - the character to check + + Return value: + + Whether this character is legal in a filename +-----------------------------------------------------------------------------*/ + +bool osd_is_valid_filename_char(unicode_char uchar); + + +/*----------------------------------------------------------------------------- + osd_is_valid_filepath_char: is the given character legal for paths? + + Parameters: + + uchar - the character to check + + Return value: + + Whether this character is legal in a file path +-----------------------------------------------------------------------------*/ + +bool osd_is_valid_filepath_char(unicode_char uchar); + /*************************************************************************** DIRECTORY INTERFACES diff --git a/src/osd/windows/winmain.cpp b/src/osd/windows/winmain.cpp index f4197d31e55..01b1f02d418 100644 --- a/src/osd/windows/winmain.cpp +++ b/src/osd/windows/winmain.cpp @@ -160,7 +160,6 @@ const options_entry windows_options::s_option_entries[] = { WINOPTION_HLSLPATH, "hlsl", OPTION_STRING, "path to hlsl files" }, { WINOPTION_HLSL_ENABLE";hlsl", "0", OPTION_BOOLEAN, "enables HLSL post-processing (PS3.0 required)" }, { WINOPTION_HLSL_OVERSAMPLING, "0", OPTION_BOOLEAN, "enables HLSL oversampling" }, - { WINOPTION_HLSL_WRITE, nullptr, OPTION_STRING, "enables HLSL AVI writing (huge disk bandwidth suggested)" }, { WINOPTION_HLSL_SNAP_WIDTH, "2048", OPTION_STRING, "HLSL upscaled-snapshot width" }, { WINOPTION_HLSL_SNAP_HEIGHT, "1536", OPTION_STRING, "HLSL upscaled-snapshot height" }, { WINOPTION_SHADOW_MASK_TILE_MODE, "0", OPTION_INTEGER, "shadow mask tile mode (0 for screen based, 1 for source based)" }, diff --git a/src/osd/windows/winmain.h b/src/osd/windows/winmain.h index 0abc85b674a..8b8c4ff18e2 100644 --- a/src/osd/windows/winmain.h +++ b/src/osd/windows/winmain.h @@ -29,7 +29,6 @@ #define WINOPTION_HLSLPATH "hlslpath" #define WINOPTION_HLSL_ENABLE "hlsl_enable" #define WINOPTION_HLSL_OVERSAMPLING "hlsl_oversampling" -#define WINOPTION_HLSL_WRITE "hlsl_write" #define WINOPTION_HLSL_SNAP_WIDTH "hlsl_snap_width" #define WINOPTION_HLSL_SNAP_HEIGHT "hlsl_snap_height" #define WINOPTION_SHADOW_MASK_TILE_MODE "shadow_mask_tile_mode" @@ -130,7 +129,6 @@ public: const char *screen_post_fx_dir() const { return value(WINOPTION_HLSLPATH); } bool d3d_hlsl_enable() const { return bool_value(WINOPTION_HLSL_ENABLE); } bool d3d_hlsl_oversampling() const { return bool_value(WINOPTION_HLSL_OVERSAMPLING); } - const char *d3d_hlsl_write() const { return value(WINOPTION_HLSL_WRITE); } int d3d_snap_width() const { return int_value(WINOPTION_HLSL_SNAP_WIDTH); } int d3d_snap_height() const { return int_value(WINOPTION_HLSL_SNAP_HEIGHT); } int screen_shadow_mask_tile_mode() const { return int_value(WINOPTION_SHADOW_MASK_TILE_MODE); } |