summaryrefslogtreecommitdiffstatshomepage
path: root/src
diff options
context:
space:
mode:
Diffstat (limited to 'src')
-rw-r--r--src/mame/drivers/asteroid.cpp2
-rw-r--r--src/mame/includes/asteroid.h5
-rw-r--r--src/mame/machine/asteroid.cpp21
3 files changed, 23 insertions, 5 deletions
diff --git a/src/mame/drivers/asteroid.cpp b/src/mame/drivers/asteroid.cpp
index b456b64fb1e..af1671e45a0 100644
--- a/src/mame/drivers/asteroid.cpp
+++ b/src/mame/drivers/asteroid.cpp
@@ -658,6 +658,8 @@ MACHINE_CONFIG_START(asteroid_state::asteroid_base)
MCFG_WATCHDOG_ADD("watchdog")
+ MCFG_TTL153_ADD("dsw_sel")
+
/* video hardware */
MCFG_VECTOR_ADD("vector")
MCFG_SCREEN_ADD("screen", VECTOR)
diff --git a/src/mame/includes/asteroid.h b/src/mame/includes/asteroid.h
index 302a2742677..a805fe794c8 100644
--- a/src/mame/includes/asteroid.h
+++ b/src/mame/includes/asteroid.h
@@ -8,6 +8,7 @@
#include "sound/discrete.h"
#include "video/avgdvg.h"
+#include "machine/74153.h"
class asteroid_state : public driver_device
{
@@ -17,6 +18,8 @@ public:
m_maincpu(*this, "maincpu"),
m_dvg(*this, "dvg"),
m_discrete(*this, "discrete"),
+ m_dsw1(*this, "DSW1"),
+ m_dsw_sel(*this, "dsw_sel"),
m_ram1(*this, "ram1"),
m_ram2(*this, "ram2") { }
@@ -24,6 +27,8 @@ public:
required_device<cpu_device> m_maincpu;
required_device<dvg_device> m_dvg;
required_device<discrete_device> m_discrete;
+ required_ioport m_dsw1;
+ required_device<ttl153_device> m_dsw_sel;
/* memory banks */
optional_memory_bank m_ram1;
diff --git a/src/mame/machine/asteroid.cpp b/src/mame/machine/asteroid.cpp
index 43154e8dc46..80eebff4c2f 100644
--- a/src/mame/machine/asteroid.cpp
+++ b/src/mame/machine/asteroid.cpp
@@ -84,13 +84,24 @@ READ8_MEMBER(asteroid_state::asteroid_IN1_r)
READ8_MEMBER(asteroid_state::asteroid_DSW1_r)
{
- int res;
- int res1;
+ // 765432-- not used
+ // ------1- ls253 dsw selector 2y
+ // -------0 ls253 dsw selector 1y
- res1 = ioport("DSW1")->read();
+ uint8_t val = m_dsw1->read();
- res = 0xfc | ((res1 >> (2 * (3 - (offset & 0x3)))) & 0x3);
- return res;
+ m_dsw_sel->i3a_w(BIT(val, 0));
+ m_dsw_sel->i3b_w(BIT(val, 1));
+ m_dsw_sel->i2a_w(BIT(val, 2));
+ m_dsw_sel->i2b_w(BIT(val, 3));
+ m_dsw_sel->i1a_w(BIT(val, 4));
+ m_dsw_sel->i1b_w(BIT(val, 5));
+ m_dsw_sel->i0a_w(BIT(val, 6));
+ m_dsw_sel->i0b_w(BIT(val, 7));
+
+ m_dsw_sel->s_w(space, 0, offset & 0x03);
+
+ return 0xfc | (m_dsw_sel->zb_r() << 1) | m_dsw_sel->za_r();
}