diff options
Diffstat (limited to 'src')
-rw-r--r-- | src/devices/cpu/m6805/m68705.cpp | 189 | ||||
-rw-r--r-- | src/devices/cpu/m6805/m68705.h | 72 | ||||
-rw-r--r-- | src/mame/drivers/m6805evs.cpp | 68 |
3 files changed, 151 insertions, 178 deletions
diff --git a/src/devices/cpu/m6805/m68705.cpp b/src/devices/cpu/m6805/m68705.cpp index fd7ff5be29c..42bcbb0301b 100644 --- a/src/devices/cpu/m6805/m68705.cpp +++ b/src/devices/cpu/m6805/m68705.cpp @@ -52,7 +52,6 @@ ROM_END } // anonymous namespace -device_type const M68705 = &device_creator<m68705_device>; device_type const M68705P3 = &device_creator<m68705p3_device>; device_type const M68705P5 = &device_creator<m68705p5_device>; device_type const M68705R3 = &device_creator<m68705r3_device>; @@ -60,79 +59,7 @@ device_type const M68705U3 = &device_creator<m68705u3_device>; /**************************************************************************** - * M68705 device (no peripherals) - ****************************************************************************/ - -m68705_device::m68705_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock) - : m6805_base_device(mconfig, tag, owner, clock, M68705, "M68705", 12, "m68705", __FILE__) -{ -} - -m68705_device::m68705_device( - machine_config const &mconfig, - char const *tag, - device_t *owner, - u32 clock, - device_type type, - char const *name, - u32 addr_width, - address_map_delegate internal_map, - char const *shortname, - char const *source) - : m6805_base_device(mconfig, tag, owner, clock, type, name, addr_width, internal_map, shortname, source) -{ -} - -/* Generate interrupt - m68705 version */ -void m68705_device::interrupt() -{ - if ((m_pending_interrupts & ((1 << M6805_IRQ_LINE) | M68705_INT_MASK)) != 0 ) - { - if ((CC & IFLAG) == 0) - { - PUSHWORD(m_pc); - PUSHBYTE(m_x); - PUSHBYTE(m_a); - PUSHBYTE(m_cc); - SEI; - standard_irq_callback(0); - - if ((m_pending_interrupts & (1 << M68705_IRQ_LINE)) != 0 ) - { - m_pending_interrupts &= ~(1 << M68705_IRQ_LINE); - RM16(0xfffa, &m_pc); - } - else if ((m_pending_interrupts & (1 << M68705_INT_TIMER)) != 0) - { - m_pending_interrupts &= ~(1 << M68705_INT_TIMER); - RM16(0xfff8, &m_pc); - } - } - m_icount -= 11; - } -} - -void m68705_device::device_reset() -{ - m6805_base_device::device_reset(); - - RM16(0xfffe, &m_pc); -} - -void m68705_device::execute_set_input(int inputnum, int state) -{ - if (m_irq_state[inputnum] != state) - { - m_irq_state[inputnum] = (state == ASSERT_LINE) ? ASSERT_LINE : CLEAR_LINE; - - if (state != CLEAR_LINE) - m_pending_interrupts |= 1 << inputnum; - } -} - - -/**************************************************************************** - * M68705 "new" device + * MC68705 base device ****************************************************************************/ /* @@ -223,7 +150,7 @@ Ux Parts: */ -m68705_new_device::m68705_new_device( +m68705_device::m68705_device( machine_config const &mconfig, char const *tag, device_t *owner, @@ -234,7 +161,7 @@ m68705_new_device::m68705_new_device( address_map_delegate internal_map, char const *shortname, char const *source) - : m68705_device(mconfig, tag, owner, clock, type, name, addr_width, internal_map, shortname, source) + : m6805_base_device(mconfig, tag, owner, clock, type, name, addr_width, internal_map, shortname, source) , device_nvram_interface(mconfig, *this) , m_user_rom(*this, DEVICE_SELF, u32(1) << addr_width) , m_port_open_drain{ false, false, false, false } @@ -254,13 +181,13 @@ m68705_new_device::m68705_new_device( { } -template <offs_t B> READ8_MEMBER(m68705_new_device::eprom_r) +template <offs_t B> READ8_MEMBER(m68705_device::eprom_r) { // read locked out when /VPON and /PLE are asserted return (!pcr_vpon() || !pcr_ple()) ? m_user_rom[B + offset] : 0xff; } -template <offs_t B> WRITE8_MEMBER(m68705_new_device::eprom_w) +template <offs_t B> WRITE8_MEMBER(m68705_device::eprom_w) { // programming latch enabled when /VPON and /PLE are asserted if (pcr_vpon() && pcr_ple()) @@ -278,23 +205,23 @@ template <offs_t B> WRITE8_MEMBER(m68705_new_device::eprom_w) } } -template <std::size_t N> void m68705_new_device::set_port_open_drain(bool value) +template <std::size_t N> void m68705_device::set_port_open_drain(bool value) { m_port_open_drain[N] = value; } -template <std::size_t N> void m68705_new_device::set_port_mask(u8 mask) +template <std::size_t N> void m68705_device::set_port_mask(u8 mask) { m_port_mask[N] = mask; } -template <std::size_t N> READ8_MEMBER(m68705_new_device::port_r) +template <std::size_t N> READ8_MEMBER(m68705_device::port_r) { if (!m_port_cb_r[N].isnull()) m_port_input[N] = m_port_cb_r[N](space, 0, ~m_port_ddr[N]); return m_port_mask[N] | (m_port_latch[N] & m_port_ddr[N]) | (m_port_input[N] & ~m_port_ddr[N]); } -template <std::size_t N> WRITE8_MEMBER(m68705_new_device::port_latch_w) +template <std::size_t N> WRITE8_MEMBER(m68705_device::port_latch_w) { data &= ~m_port_mask[N]; u8 const diff = m_port_latch[N] ^ data; @@ -303,7 +230,7 @@ template <std::size_t N> WRITE8_MEMBER(m68705_new_device::port_latch_w) port_cb_w<N>(); } -template <std::size_t N> WRITE8_MEMBER(m68705_new_device::port_ddr_w) +template <std::size_t N> WRITE8_MEMBER(m68705_device::port_ddr_w) { data &= ~m_port_mask[N]; if (data != m_port_ddr[N]) @@ -313,30 +240,30 @@ template <std::size_t N> WRITE8_MEMBER(m68705_new_device::port_ddr_w) } } -template <std::size_t N> void m68705_new_device::port_cb_w() +template <std::size_t N> void m68705_device::port_cb_w() { u8 const data(m_port_open_drain[N] ? m_port_latch[N] | ~m_port_ddr[N] : m_port_latch[N]); u8 const mask(m_port_open_drain[N] ? (~m_port_latch[N] & m_port_ddr[N]) : m_port_ddr[N]); m_port_cb_w[N](space(AS_PROGRAM), 0, data, mask); } -READ8_MEMBER(m68705_new_device::tdr_r) +READ8_MEMBER(m68705_device::tdr_r) { return m_tdr; } -WRITE8_MEMBER(m68705_new_device::tdr_w) +WRITE8_MEMBER(m68705_device::tdr_w) { m_tdr = data; } -READ8_MEMBER(m68705_new_device::tcr_r) +READ8_MEMBER(m68705_device::tcr_r) { // in MOR controlled mode, only TIR, TIM and TOPT are visible return m_tcr | (tcr_topt() ? 0x37 : 0x00); } -WRITE8_MEMBER(m68705_new_device::tcr_w) +WRITE8_MEMBER(m68705_device::tcr_w) { // 7 TIR RW Timer Interrupt Request Status // 6 TIM RW Timer Interrupt Mask @@ -379,23 +306,23 @@ WRITE8_MEMBER(m68705_new_device::tcr_w) set_input_line(M68705_INT_TIMER, CLEAR_LINE); } -READ8_MEMBER(m68705_new_device::misc_r) +READ8_MEMBER(m68705_device::misc_r) { logerror("unsupported read MISC\n"); return 0xff; } -WRITE8_MEMBER(m68705_new_device::misc_w) +WRITE8_MEMBER(m68705_device::misc_w) { logerror("unsupported write MISC = %02X\n", data); } -READ8_MEMBER(m68705_new_device::pcr_r) +READ8_MEMBER(m68705_device::pcr_r) { return m_pcr; } -WRITE8_MEMBER(m68705_new_device::pcr_w) +WRITE8_MEMBER(m68705_device::pcr_w) { // 7 1 // 6 1 @@ -416,13 +343,13 @@ WRITE8_MEMBER(m68705_new_device::pcr_w) m_pcr = (m_pcr & 0xfc) | (data & 0x03); } -READ8_MEMBER(m68705_new_device::acr_r) +READ8_MEMBER(m68705_device::acr_r) { logerror("unsupported read ACR\n"); return 0xff; } -WRITE8_MEMBER(m68705_new_device::acr_w) +WRITE8_MEMBER(m68705_device::acr_w) { // 7 conversion complete // 6 @@ -450,20 +377,20 @@ WRITE8_MEMBER(m68705_new_device::acr_w) logerror("unsupported write ACR = %02X\n", data); } -READ8_MEMBER(m68705_new_device::arr_r) +READ8_MEMBER(m68705_device::arr_r) { logerror("unsupported read ARR\n"); return 0xff; } -WRITE8_MEMBER(m68705_new_device::arr_w) +WRITE8_MEMBER(m68705_device::arr_w) { logerror("unsupported write ARR = %02X\n", data); } -void m68705_new_device::device_start() +void m68705_device::device_start() { - m68705_device::device_start(); + m6805_base_device::device_start(); save_item(NAME(m_port_input)); save_item(NAME(m_port_latch)); @@ -496,9 +423,9 @@ void m68705_new_device::device_start() m_pl_addr = 0xffff; } -void m68705_new_device::device_reset() +void m68705_device::device_reset() { - m68705_device::device_reset(); + m6805_base_device::device_reset(); // reset digital I/O port_ddr_w<0>(space(AS_PROGRAM), 0, 0x00, 0xff); @@ -519,7 +446,7 @@ void m68705_new_device::device_reset() RM16(0xfff6, &m_pc); } -void m68705_new_device::execute_set_input(int inputnum, int state) +void m68705_device::execute_set_input(int inputnum, int state) { switch (inputnum) { @@ -531,25 +458,59 @@ void m68705_new_device::execute_set_input(int inputnum, int state) m_vihtp = (ASSERT_LINE == state) ? ASSERT_LINE : CLEAR_LINE; break; default: - m68705_device::execute_set_input(inputnum, state); + if (m_irq_state[inputnum] != state) + { + m_irq_state[inputnum] = (state == ASSERT_LINE) ? ASSERT_LINE : CLEAR_LINE; + + if (state != CLEAR_LINE) + m_pending_interrupts |= 1 << inputnum; + } } } -void m68705_new_device::nvram_default() +void m68705_device::nvram_default() { } -void m68705_new_device::nvram_read(emu_file &file) +void m68705_device::nvram_read(emu_file &file) { file.read(&m_user_rom[0], m_user_rom.bytes()); } -void m68705_new_device::nvram_write(emu_file &file) +void m68705_device::nvram_write(emu_file &file) { file.write(&m_user_rom[0], m_user_rom.bytes()); } -void m68705_new_device::burn_cycles(unsigned count) +void m68705_device::interrupt() +{ + if ((m_pending_interrupts & ((1 << M6805_IRQ_LINE) | M68705_INT_MASK)) != 0 ) + { + if ((CC & IFLAG) == 0) + { + PUSHWORD(m_pc); + PUSHBYTE(m_x); + PUSHBYTE(m_a); + PUSHBYTE(m_cc); + SEI; + standard_irq_callback(0); + + if ((m_pending_interrupts & (1 << M68705_IRQ_LINE)) != 0 ) + { + m_pending_interrupts &= ~(1 << M68705_IRQ_LINE); + RM16(0xfffa, &m_pc); + } + else if ((m_pending_interrupts & (1 << M68705_INT_TIMER)) != 0) + { + m_pending_interrupts &= ~(1 << M68705_INT_TIMER); + RM16(0xfff8, &m_pc); + } + } + m_icount -= 11; + } +} + +void m68705_device::burn_cycles(unsigned count) { // handle internal timer/counter source if (!tcr_tin()) // TODO: check tcr_tie() and gate on TIMER if appropriate @@ -569,24 +530,24 @@ void m68705_new_device::burn_cycles(unsigned count) } } -template <std::size_t N> void m68705_new_device::add_port_latch_state() +template <std::size_t N> void m68705_device::add_port_latch_state() { state_add(M68705_LATCHA + N, util::string_format("LATCH%c", 'A' + N).c_str(), m_port_latch[N]).mask(~m_port_mask[N] & 0xff); } -template <std::size_t N> void m68705_new_device::add_port_ddr_state() +template <std::size_t N> void m68705_device::add_port_ddr_state() { state_add(M68705_DDRA + N, util::string_format("DDR%c", 'A' + N).c_str(), m_port_ddr[N]).mask(~m_port_mask[N] & 0xff); } -void m68705_new_device::add_timer_state() +void m68705_device::add_timer_state() { state_add(M68705_PS, "PS", m_prescaler).mask(0x7f); state_add(M68705_TDR, "TDR", m_tdr).mask(0xff); state_add(M68705_TCR, "TCR", m_tcr).mask(0xff); } -void m68705_new_device::add_eprom_state() +void m68705_device::add_eprom_state() { state_add(M68705_PCR, "PCR", m_pcr).mask(0xff); state_add(M68705_PLA, "PLA", m_pl_addr).mask(0xffff); @@ -630,7 +591,7 @@ m68705p_device::m68705p_device( char const *name, char const *shortname, char const *source) - : m68705_new_device(mconfig, tag, owner, clock, type, name, 11, address_map_delegate(FUNC(m68705p_device::p_map), this), shortname, source) + : m68705_device(mconfig, tag, owner, clock, type, name, 11, address_map_delegate(FUNC(m68705p_device::p_map), this), shortname, source) { set_port_open_drain<0>(true); // Port A is open drain with internal pull-ups set_port_mask<2>(0xf0); // Port C is four bits wide @@ -639,7 +600,7 @@ m68705p_device::m68705p_device( void m68705p_device::device_start() { - m68705_new_device::device_start(); + m68705_device::device_start(); add_port_latch_state<0>(); add_port_latch_state<1>(); @@ -701,7 +662,7 @@ m68705u_device::m68705u_device( address_map_delegate internal_map, char const *shortname, char const *source) - : m68705_new_device(mconfig, tag, owner, clock, type, name, 12, internal_map, shortname, source) + : m68705_device(mconfig, tag, owner, clock, type, name, 12, internal_map, shortname, source) { set_port_open_drain<0>(true); // Port A is open drain with internal pull-ups } @@ -721,7 +682,7 @@ m68705u_device::m68705u_device( void m68705u_device::device_start() { - m68705_new_device::device_start(); + m68705_device::device_start(); add_port_latch_state<0>(); add_port_latch_state<1>(); diff --git a/src/devices/cpu/m6805/m68705.h b/src/devices/cpu/m6805/m68705.h index cd839a6cc54..0f7896c8d19 100644 --- a/src/devices/cpu/m6805/m68705.h +++ b/src/devices/cpu/m6805/m68705.h @@ -7,11 +7,11 @@ #include "m6805.h" + //************************************************************************** // GLOBAL VARIABLES //************************************************************************** -extern device_type const M68705; extern device_type const M68705P3; extern device_type const M68705P5; extern device_type const M68705R3; @@ -24,76 +24,47 @@ extern device_type const M68705U3; // ======================> m68705_device -class m68705_device : public m6805_base_device -{ -public: - m68705_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock); - -protected: - enum - { - M68705_A = M6805_A, - M68705_PC = M6805_PC, - M68705_S = M6805_S, - M68705_X = M6805_X, - M68705_CC = M6805_CC, - M68705_IRQ_STATE = M6805_IRQ_STATE - }; - - m68705_device( - machine_config const &mconfig, - char const *tag, - device_t *owner, - u32 clock, - device_type type, - char const *name, - u32 addr_width, - address_map_delegate internal_map, - char const *shortname, - char const *source); - - virtual void device_reset() override; - virtual void execute_set_input(int inputnum, int state) override; - virtual void interrupt() override; -}; - - -// ======================> m68705_new_device - #define MCFG_M68705_PORTA_R_CB(obj) \ - devcb = &m68705_new_device::set_port_cb_r<0>(*device, DEVCB_##obj); + devcb = &m68705_device::set_port_cb_r<0>(*device, DEVCB_##obj); #define MCFG_M68705_PORTB_R_CB(obj) \ - devcb = &m68705_new_device::set_port_cb_r<1>(*device, DEVCB_##obj); + devcb = &m68705_device::set_port_cb_r<1>(*device, DEVCB_##obj); #define MCFG_M68705_PORTC_R_CB(obj) \ - devcb = &m68705_new_device::set_port_cb_r<2>(*device, DEVCB_##obj); + devcb = &m68705_device::set_port_cb_r<2>(*device, DEVCB_##obj); #define MCFG_M68705_PORTD_R_CB(obj) \ - devcb = &m68705_new_device::set_port_cb_r<3>(*device, DEVCB_##obj); + devcb = &m68705_device::set_port_cb_r<3>(*device, DEVCB_##obj); #define MCFG_M68705_PORTA_W_CB(obj) \ - devcb = &m68705_new_device::set_port_cb_w<0>(*device, DEVCB_##obj); + devcb = &m68705_device::set_port_cb_w<0>(*device, DEVCB_##obj); #define MCFG_M68705_PORTB_W_CB(obj) \ - devcb = &m68705_new_device::set_port_cb_w<1>(*device, DEVCB_##obj); + devcb = &m68705_device::set_port_cb_w<1>(*device, DEVCB_##obj); #define MCFG_M68705_PORTC_W_CB(obj) \ - devcb = &m68705_new_device::set_port_cb_w<2>(*device, DEVCB_##obj); + devcb = &m68705_device::set_port_cb_w<2>(*device, DEVCB_##obj); -class m68705_new_device : public m68705_device, public device_nvram_interface +class m68705_device : public m6805_base_device, public device_nvram_interface { public: // static configuration helpers template<std::size_t N, typename Object> static devcb_base &set_port_cb_r(device_t &device, Object &&obj) - { return downcast<m68705_new_device &>(device).m_port_cb_r[N].set_callback(std::forward<Object>(obj)); } + { return downcast<m68705_device &>(device).m_port_cb_r[N].set_callback(std::forward<Object>(obj)); } template<std::size_t N, typename Object> static devcb_base &set_port_cb_w(device_t &device, Object &&obj) - { return downcast<m68705_new_device &>(device).m_port_cb_w[N].set_callback(std::forward<Object>(obj)); } + { return downcast<m68705_device &>(device).m_port_cb_w[N].set_callback(std::forward<Object>(obj)); } protected: enum { + M68705_A = M6805_A, + M68705_PC = M6805_PC, + M68705_S = M6805_S, + M68705_X = M6805_X, + M68705_CC = M6805_CC, + M68705_IRQ_STATE = M6805_IRQ_STATE, + M68705_LATCHA = 0x10, M68705_LATCHB, M68705_LATCHC, @@ -119,7 +90,7 @@ protected: PORT_COUNT = 4 }; - m68705_new_device( + m68705_device( machine_config const &mconfig, char const *tag, device_t *owner, @@ -165,6 +136,7 @@ protected: virtual void nvram_read(emu_file &file) override; virtual void nvram_write(emu_file &file) override; + virtual void interrupt() override; virtual void burn_cycles(unsigned count) override; u8 *const get_user_rom() const { return &m_user_rom[0]; } @@ -213,7 +185,7 @@ private: // ======================> m68705p_device -class m68705p_device : public m68705_new_device +class m68705p_device : public m68705_device { public: DECLARE_WRITE8_MEMBER(pa_w) { port_input_w<0>(space, offset, data, mem_mask); } @@ -246,7 +218,7 @@ protected: // ======================> m68705u_device -class m68705u_device : public m68705_new_device +class m68705u_device : public m68705_device { public: DECLARE_WRITE8_MEMBER(pa_w) { port_input_w<0>(space, offset, data, mem_mask); } diff --git a/src/mame/drivers/m6805evs.cpp b/src/mame/drivers/m6805evs.cpp index bec8b22e84b..f42260193ce 100644 --- a/src/mame/drivers/m6805evs.cpp +++ b/src/mame/drivers/m6805evs.cpp @@ -6,28 +6,63 @@ Motorola M68HC05EVS evaluation system Chips: Main board: XC68HC26P, R65C52P2, MS62256l-70PC, MS6264L-70PC, eprom. Xtal = 3.6864MHz -Emulator board: MC68C705P9CP, undumped 28-pin prom. Xtal = 4MHz +Emulator board: MC68HC705P9CP, undumped 28-pin prom. Xtal = 4MHz R65C52 = Dual ACIA with inbuilt baud rate divider, uses 8 addresses, uses the 3.6864MHz crystal XC68HC26P = PPI (3 ports), uses 8 addresses. 2014-01-12 Skeleton driver -The rom is larger than the available address space, but not all of it is programmed. The code -ranges are 800-18FF,1FF0-1FFF. There must be a banking scheme in use. +Memory map: +0000, 0000 PORTA Port A data register +0001, 0001 PORTB Port B data register +0002, 0002 PORTC Port C data register +0003, 0003 PORTD Port D data register +0004, 0004 DDRA Data direction register A +0005, 0005 DDRB Data direction register B +0006, 0006 DDRC Data direction register C +0007, 0007 DDRD Data direction register D +0008, 0009 unimplemented +000A, 000A SCR SIOP control register +000B, 000B SSR SIOP status register +0009, 0009 SDR SIOP data register +000D, 0011 unimplemented +0012, 0012 TCR Timer control register +0013, 0013 TDR Timer data register +0014, 0014 ICRH Input capture register high +0015, 0015 ICRL Input capture register low +0016, 0016 OCRH Output compare register high +0017, 0017 OCRL Output compare register low +0018, 0018 TRH Timer register high +0019, 0019 TRL Timer register low +001A, 001A ATRH Alternate timer register high +001B, 001B ATRL Alternate timer register low +001C, 001C EPROG EPROM programming register +001D, 001D ADDR ADC data register +001E, 001E ADSCR ADC status/control register +001F, 001F reserved +0020, 004F Page zero user EPROM +0050, 007F unimplemented +0080, 00FF RAM +0100, 08FF User EPROM +0900, 0900 MOR Mask option register +0901, 1EFF unimplemented +1F00, 1FEF Bootloader ROM +1FF1, 1FF7 reserved +1FF8, 1FF9 Timer interrupt vector +1FFA, 1FFB External interrupt vector +1FFC, 1FFD Software interrupt vector +1FFE, 1FFF Reset vector -Memory map guess -000-07F Stack (and user ram?) -080-0FF RAM (or devices?) -100-FFF ROM ToDo: +- Add CMOS family support to M6085 CPU core (different timings, different peripherals) - Everything ******************************************************************************************************/ #include "emu.h" -#include "cpu/m6805/m68705.h" +#include "cpu/m6805/m6805.h" class m6805evs_state : public driver_device @@ -45,10 +80,15 @@ private: static ADDRESS_MAP_START( m6805evs_mem, AS_PROGRAM, 8, m6805evs_state ) - AM_RANGE(0x0000, 0x00ff) AM_RAM - AM_RANGE(0x0100, 0x07ff) AM_ROM AM_REGION("roms", 0x1100) - AM_RANGE(0x0800, 0x0fef) AM_ROM AM_REGION("roms", 0x0800) - AM_RANGE(0x0ff0, 0x0fff) AM_ROM AM_REGION("roms", 0x1ff0) + ADDRESS_MAP_GLOBAL_MASK(0x1fff) + ADDRESS_MAP_UNMAP_HIGH + + // AM_RANGE(0x0000, 0x001f) I/O registers live here + AM_RANGE(0x0020, 0x004f) AM_ROM AM_REGION("eprom", 0x0020) + AM_RANGE(0x0080, 0x00ff) AM_RAM + AM_RANGE(0x0100, 0x0900) AM_ROM AM_REGION("eprom", 0x0100) + // AM_RANGE(0x1f00, 0x1fef) bootloader ROM lives here + AM_RANGE(0x1ff8, 0x1fff) AM_ROM AM_REGION("eprom", 0x1ff0) ADDRESS_MAP_END static INPUT_PORTS_START( m6805evs ) @@ -60,12 +100,12 @@ void m6805evs_state::machine_reset() static MACHINE_CONFIG_START( m6805evs, m6805evs_state ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M68705, XTAL_4MHz) + MCFG_CPU_ADD("maincpu", M6805, XTAL_4MHz) MCFG_CPU_PROGRAM_MAP(m6805evs_mem) MACHINE_CONFIG_END ROM_START(m6805evs) - ROM_REGION(0x2000, "roms", 0) + ROM_REGION(0x2000, "eprom", 0) ROM_LOAD( "evsbug12.bin", 0x0000, 0x2000, CRC(8b581aef) SHA1(eacf425cc8a042085ccc4097cc61570b633b1e38) ) ROM_END |