diff options
Diffstat (limited to 'src')
966 files changed, 10706 insertions, 10706 deletions
diff --git a/src/build/png2bdc.c b/src/build/png2bdc.c index c60d7182b37..c6db58b6cd7 100644 --- a/src/build/png2bdc.c +++ b/src/build/png2bdc.c @@ -83,7 +83,7 @@ struct _render_font { int height; /* height of the font, from ascent to descent */ int yoffs; /* y offset from baseline to descent */ - render_font_char chars[65536]; /* array of characters */ + render_font_char chars[65536]; /* array of characters */ }; diff --git a/src/emu/attotime.c b/src/emu/attotime.c index 75b15dba4ff..60460d9a50f 100644 --- a/src/emu/attotime.c +++ b/src/emu/attotime.c @@ -18,8 +18,8 @@ GLOBAL VARIABLES ***************************************************************************/ -const attotime attotime_zero = STATIC_ATTOTIME_IN_SEC(0); -const attotime attotime_never = STATIC_ATTOTIME_IN_SEC(ATTOTIME_MAX_SECONDS); +const attotime attotime_zero = STATIC_ATTOTIME_IN_SEC(0); +const attotime attotime_never = STATIC_ATTOTIME_IN_SEC(ATTOTIME_MAX_SECONDS); diff --git a/src/emu/attotime.h b/src/emu/attotime.h index cdd83e5a23f..693e4cd0f84 100644 --- a/src/emu/attotime.h +++ b/src/emu/attotime.h @@ -124,8 +124,8 @@ struct _attotime ***************************************************************************/ /* constant times for zero and never */ -extern const attotime attotime_zero; -extern const attotime attotime_never; +extern const attotime attotime_zero; +extern const attotime attotime_never; diff --git a/src/emu/audio/generic.c b/src/emu/audio/generic.c index 217f7b0dcad..5af690c797f 100644 --- a/src/emu/audio/generic.c +++ b/src/emu/audio/generic.c @@ -20,9 +20,9 @@ struct _generic_audio_private { - UINT16 latch_clear_value; - UINT16 latched_value[4]; - UINT8 latch_read[4]; + UINT16 latch_clear_value; + UINT16 latched_value[4]; + UINT8 latch_read[4]; }; diff --git a/src/emu/audit.h b/src/emu/audit.h index 4aeda17ca9d..ede7c30efe7 100644 --- a/src/emu/audit.h +++ b/src/emu/audit.h @@ -84,8 +84,8 @@ struct _audit_record const char * name; /* name of item */ UINT32 explength; /* expected length of item */ UINT32 length; /* actual length of item */ - const char * exphash; /* expected hash data */ - char hash[HASH_BUF_SIZE]; /* actual hash information */ + const char * exphash; /* expected hash data */ + char hash[HASH_BUF_SIZE]; /* actual hash information */ }; diff --git a/src/emu/cpu/adsp2100/2100ops.c b/src/emu/cpu/adsp2100/2100ops.c index 0c3c95e2727..287437000ea 100644 --- a/src/emu/cpu/adsp2100/2100ops.c +++ b/src/emu/cpu/adsp2100/2100ops.c @@ -51,7 +51,7 @@ #define CALC_V(s,d,r) (adsp->astat |= ((s ^ d ^ r ^ (r >> 1)) >> 13) & 0x04) #define CALC_C(r) (adsp->astat |= (r >> 13) & 0x08) #define CALC_C_SUB(r) (adsp->astat |= (~r >> 13) & 0x08) -#define CALC_NZ(r) CLR_FLAGS; CALC_N(r); CALC_Z(r) +#define CALC_NZ(r) CLR_FLAGS; CALC_N(r); CALC_Z(r) #define CALC_NZV(s,d,r) CLR_FLAGS; CALC_N(r); CALC_Z(r); CALC_V(s,d,r) #define CALC_NZVC(s,d,r) CLR_FLAGS; CALC_N(r); CALC_Z(r); CALC_V(s,d,r); CALC_C(r) #define CALC_NZVC_SUB(s,d,r) CLR_FLAGS; CALC_N(r); CALC_Z(r); CALC_V(s,d,r); CALC_C_SUB(r) @@ -295,7 +295,7 @@ INLINE void stat_stack_pop(adsp2100_state *adsp) update_mstat(adsp); adsp->imask = adsp->stat_stack[adsp->stat_sp][1]; adsp->astat = adsp->stat_stack[adsp->stat_sp][2]; - check_irqs(adsp); + check_irqs(adsp); } diff --git a/src/emu/cpu/adsp2100/adsp2100.c b/src/emu/cpu/adsp2100/adsp2100.c index 91893071e2c..2fa1bee4ea7 100644 --- a/src/emu/cpu/adsp2100/adsp2100.c +++ b/src/emu/cpu/adsp2100/adsp2100.c @@ -239,8 +239,8 @@ typedef struct UINT16 imask; UINT8 icntl; UINT16 ifc; - UINT8 irq_state[9]; - UINT8 irq_latch[9]; + UINT8 irq_state[9]; + UINT8 irq_latch[9]; cpu_irq_callback irq_callback; const device_config *device; @@ -1904,8 +1904,8 @@ static CPU_GET_INFO( adsp21xx ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 14; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = -2; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 16; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 14; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = -1; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 14; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = -1; break; case CPUINFO_INT_INPUT_STATE + 0: case CPUINFO_INT_INPUT_STATE + 1: @@ -2156,8 +2156,8 @@ CPU_GET_INFO( adsp2181 ) case CPUINFO_INT_INPUT_LINES: info->i = 9; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 16; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 11; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = -1; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 11; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = -1; break; /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(adsp2181); break; diff --git a/src/emu/cpu/alph8201/alph8201.c b/src/emu/cpu/alph8201/alph8201.c index 75a0f29805a..92ce14b6878 100644 --- a/src/emu/cpu/alph8201/alph8201.c +++ b/src/emu/cpu/alph8201/alph8201.c @@ -210,7 +210,7 @@ typedef struct { #define PC pc.w.l -#define PCL pc.b.l +#define PCL pc.b.l #define RD_REG(x) cpustate->RAM[(cpustate->regPtr<<3)+(x)] #define WR_REG(x,d) cpustate->RAM[(cpustate->regPtr<<3)+(x)]=(d) #define IX0 ix0.b.l @@ -321,8 +321,8 @@ static void undefined2(alpha8201_state *cpustate) { M_UNDEFINED2(cpustate); } static void nop(alpha8201_state *cpustate) { } static void rora(alpha8201_state *cpustate) { cpustate->cf = cpustate->A &1; cpustate->A = (cpustate->A>>1) | (cpustate->A<<7); } static void rola(alpha8201_state *cpustate) { cpustate->cf = (cpustate->A>>7)&1; cpustate->A = (cpustate->A<<1) | (cpustate->A>>7); } -static void inc_b(alpha8201_state *cpustate) { M_ADDB(cpustate, 0x02); } -static void dec_b(alpha8201_state *cpustate) { M_ADDB(cpustate, 0xfe); } +static void inc_b(alpha8201_state *cpustate) { M_ADDB(cpustate, 0x02); } +static void dec_b(alpha8201_state *cpustate) { M_ADDB(cpustate, 0xfe); } static void inc_a(alpha8201_state *cpustate) { M_ADD(cpustate, 0x01); } static void dec_a(alpha8201_state *cpustate) { M_ADD(cpustate, 0xff); } static void cpl(alpha8201_state *cpustate) { cpustate->A ^= 0xff; }; @@ -897,11 +897,11 @@ static CPU_GET_INFO( alpha8xxx ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 10; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 6; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 6; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; #if HANDLE_HALT_LINE case CPUINFO_INT_INPUT_STATE + INPUT_LINE_HALT: info->i = cpustate->halt ? ASSERT_LINE : CLEAR_LINE; break; #endif diff --git a/src/emu/cpu/apexc/apexc.c b/src/emu/cpu/apexc/apexc.c index 951cba64ed1..4ea286612f5 100644 --- a/src/emu/cpu/apexc/apexc.c +++ b/src/emu/cpu/apexc/apexc.c @@ -896,11 +896,11 @@ CPU_GET_INFO( apexc ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 15; /*13+2 ignored bits to make double word address*/ break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = /*5*/8; /* no I/O bus, but we use address 0 for punchtape I/O */ break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = /*0*/1; /*0 is quite enough but the MAME core does not understand*/ break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = /*0*/1; /*0 is quite enough but the MAME core does not understand*/ break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_SP: info->i = 0; /* no SP */ break; case CPUINFO_INT_PC: diff --git a/src/emu/cpu/arm/arm.c b/src/emu/cpu/arm/arm.c index 628ab21b067..788ca8b6077 100644 --- a/src/emu/cpu/arm/arm.c +++ b/src/emu/cpu/arm/arm.c @@ -911,7 +911,7 @@ static void HandleMul( ARM_REGS* cpustate, UINT32 insn) /* Do the basic multiply of Rm and Rs */ r = GetRegister( cpustate, insn&INSN_MUL_RM ) * - GetRegister( cpustate, (insn&INSN_MUL_RS)>>INSN_MUL_RS_SHIFT ); + GetRegister( cpustate, (insn&INSN_MUL_RS)>>INSN_MUL_RS_SHIFT ); if (ARM_DEBUG_CORE && ((insn&INSN_MUL_RM)==0xf || ((insn&INSN_MUL_RS)>>INSN_MUL_RS_SHIFT )==0xf @@ -1194,7 +1194,7 @@ static UINT32 decodeShift( ARM_REGS* cpustate, UINT32 insn, UINT32 *pCarry) } return k ? LSL(rm, k) : rm; - case 1: /* LSR */ + case 1: /* LSR */ if (k == 0 || k == 32) { if (pCarry) *pCarry = rm & SIGN_BIT; @@ -1455,11 +1455,11 @@ CPU_GET_INFO( arm ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 26; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + ARM_IRQ_LINE: info->i = cpustate->pendingIrq; break; case CPUINFO_INT_INPUT_STATE + ARM_FIRQ_LINE: info->i = cpustate->pendingFiq; break; diff --git a/src/emu/cpu/arm7/arm7.c b/src/emu/cpu/arm7/arm7.c index 11c11036d96..b5e24575b61 100644 --- a/src/emu/cpu/arm7/arm7.c +++ b/src/emu/cpu/arm7/arm7.c @@ -470,7 +470,7 @@ CPU_GET_INFO( arm7 ) case CPUINFO_FCT_BURN: info->burn = NULL; break; case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(arm7); break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &ARM7_ICOUNT; break; - case CPUINFO_FCT_TRANSLATE: info->translate = CPU_TRANSLATE_NAME(arm7); break; + case CPUINFO_FCT_TRANSLATE: info->translate = CPU_TRANSLATE_NAME(arm7); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case DEVINFO_STR_NAME: strcpy(info->s, "ARM7"); break; diff --git a/src/emu/cpu/arm7/arm7core.h b/src/emu/cpu/arm7/arm7core.h index 13787d2bcbf..81bab53ea77 100644 --- a/src/emu/cpu/arm7/arm7core.h +++ b/src/emu/cpu/arm7/arm7core.h @@ -91,7 +91,7 @@ enum }; /* Coprocessor-related macros */ -#define COPRO_TLB_BASE cpustate->tlbBase +#define COPRO_TLB_BASE cpustate->tlbBase #define COPRO_TLB_BASE_MASK 0xffffc000 #define COPRO_TLB_VADDR_FLTI_MASK 0xfff00000 #define COPRO_TLB_VADDR_FLTI_MASK_SHIFT 18 diff --git a/src/emu/cpu/asap/asap.c b/src/emu/cpu/asap/asap.c index 9b35ffd0a63..23850125663 100644 --- a/src/emu/cpu/asap/asap.c +++ b/src/emu/cpu/asap/asap.c @@ -1669,7 +1669,7 @@ static CPU_SET_INFO( asap ) case CPUINFO_INT_PC: case CPUINFO_INT_REGISTER + ASAP_PC: asap->pc = info->i; break; - case CPUINFO_INT_REGISTER + ASAP_PS: SET_FLAGS(asap, info->i); break; + case CPUINFO_INT_REGISTER + ASAP_PS: SET_FLAGS(asap, info->i); break; case CPUINFO_INT_REGISTER + ASAP_R0: asap->src2val[REGBASE + 0] = info->i; break; case CPUINFO_INT_REGISTER + ASAP_R1: asap->src2val[REGBASE + 1] = info->i; break; @@ -1735,11 +1735,11 @@ CPU_GET_INFO( asap ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + ASAP_IRQ0: info->i = asap->irq_state; break; @@ -1801,8 +1801,8 @@ CPU_GET_INFO( asap ) case CPUINFO_STR_FLAGS: strcpy(info->s, " "); break; - case CPUINFO_STR_REGISTER + ASAP_PC: sprintf(info->s, "PC: %08X", asap->pc); break; - case CPUINFO_STR_REGISTER + ASAP_PS: sprintf(info->s, "PS: %08X", GET_FLAGS(asap)); break; + case CPUINFO_STR_REGISTER + ASAP_PC: sprintf(info->s, "PC: %08X", asap->pc); break; + case CPUINFO_STR_REGISTER + ASAP_PS: sprintf(info->s, "PS: %08X", GET_FLAGS(asap)); break; case CPUINFO_STR_REGISTER + ASAP_R0: sprintf(info->s, "R0: %08X", asap->src2val[REGBASE + 0]); break; case CPUINFO_STR_REGISTER + ASAP_R1: sprintf(info->s, "R1: %08X", asap->src2val[REGBASE + 1]); break; diff --git a/src/emu/cpu/ccpu/ccpu.c b/src/emu/cpu/ccpu/ccpu.c index 707c34c315f..c317053aa60 100644 --- a/src/emu/cpu/ccpu/ccpu.c +++ b/src/emu/cpu/ccpu/ccpu.c @@ -203,7 +203,7 @@ static CPU_EXECUTE( ccpu ) do { UINT16 tempval; - UINT8 opcode; + UINT8 opcode; /* update the delayed MI flag */ cpustate->miflag = cpustate->nextmiflag; @@ -750,16 +750,16 @@ CPU_GET_INFO( ccpu ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 15; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 16; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = -1; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 8; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = -1; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 5; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 5; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_PREVIOUSPC: /* not implemented */ break; case CPUINFO_INT_PC: - case CPUINFO_INT_REGISTER + CCPU_PC: info->i = cpustate->PC; break; + case CPUINFO_INT_REGISTER + CCPU_PC: info->i = cpustate->PC; break; case CPUINFO_INT_REGISTER + CCPU_FLAGS: info->i = 0; if (TEST_A0(cpustate)) info->i |= 0x01; if (TEST_NC(cpustate)) info->i |= 0x02; diff --git a/src/emu/cpu/cdp1802/cdp1802.c b/src/emu/cpu/cdp1802/cdp1802.c index 1d56f9105bd..cbaeb282d6a 100644 --- a/src/emu/cpu/cdp1802/cdp1802.c +++ b/src/emu/cpu/cdp1802/cdp1802.c @@ -2,7 +2,7 @@ #include "debugger.h" #include "cdp1802.h" -#define CDP1802_CYCLES_RESET 8 +#define CDP1802_CYCLES_RESET 8 #define CDP1802_CYCLES_INIT 8 // really 9, but needs to be 8 to synchronize cdp1861 video timings #define CDP1802_CYCLES_FETCH 8 #define CDP1802_CYCLES_EXECUTE 8 @@ -1100,11 +1100,11 @@ CPU_GET_INFO( cdp1802 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 3; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 3; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + CDP1802_INPUT_LINE_INT: info->i = cpustate->irq; break; case CPUINFO_INT_INPUT_STATE + CDP1802_INPUT_LINE_DMAIN: info->i = cpustate->dmain; break; diff --git a/src/emu/cpu/cop400/cop400.c b/src/emu/cpu/cop400/cop400.c index 1a5da073b8a..65b1718897e 100644 --- a/src/emu/cpu/cop400/cop400.c +++ b/src/emu/cpu/cop400/cop400.c @@ -95,7 +95,7 @@ struct _cop400_state const address_space *io; /* registers */ - UINT16 pc; /* 9/10/11-bit ROM address program counter */ + UINT16 pc; /* 9/10/11-bit ROM address program counter */ UINT16 prevpc; /* previous value of program counter */ UINT8 a; /* 4-bit accumulator */ UINT8 b; /* 5/6/7-bit RAM address register */ @@ -338,41 +338,41 @@ INSTRUCTION(illegal) static const cop400_opcode_map COP410_OPCODE_23_MAP[] = { - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, xad }, - - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal } + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, xad }, + + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal } }; static void cop410_op23(cop400_state *cpustate, UINT8 opcode) @@ -384,41 +384,41 @@ static void cop410_op23(cop400_state *cpustate, UINT8 opcode) static const cop400_opcode_map COP410_OPCODE_33_MAP[] = { - {1, illegal },{1, skgbz0 },{1, illegal },{1, skgbz2 },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, skgbz1 },{1, illegal },{1, skgbz3 },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, skgz },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, ing },{1, illegal },{1, illegal },{1, illegal },{1, inl },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, halt },{1, illegal },{1, omg },{1, illegal },{1, camq },{1, illegal },{1, obd },{1, illegal }, - - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei }, - {1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal } + {1, illegal },{1, skgbz0 },{1, illegal },{1, skgbz2 },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, skgbz1 },{1, illegal },{1, skgbz3 },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, skgz },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, ing },{1, illegal },{1, illegal },{1, illegal },{1, inl },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, halt },{1, illegal },{1, omg },{1, illegal },{1, camq },{1, illegal },{1, obd },{1, illegal }, + + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei }, + {1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal } }; static void cop410_op33(cop400_state *cpustate, UINT8 opcode) @@ -434,7 +434,7 @@ static const cop400_opcode_map COP410_OPCODE_MAP[] = {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, {0, illegal },{1, skmbz1 },{0, illegal },{1, skmbz3 },{1, xis },{1, ld },{1, x },{1, xds }, {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, - {1, skc },{1, ske },{1, sc },{1, cop410_op23 },{1, xis },{1, ld },{1, x },{1, xds }, + {1, skc },{1, ske },{1, sc },{1, cop410_op23 },{1, xis },{1, ld },{1, x },{1, xds }, {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, {1, asc },{1, add },{1, rc },{1, cop410_op33 },{1, xis },{1, ld },{1, x },{1, xds }, {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, @@ -469,41 +469,41 @@ static const cop400_opcode_map COP410_OPCODE_MAP[] = static const cop400_opcode_map COP420_OPCODE_23_MAP[] = { - {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, - {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, - {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, - {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, - {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, - {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, - {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, - {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, - - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - - {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, - {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, - {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, - {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, - {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, - {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, - {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, - {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, - - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal } + {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, + {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, + {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, + {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, + {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, + {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, + {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, + {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, + + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + + {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, + {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, + {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, + {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, + {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, + {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, + {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, + {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, + + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal } }; static void cop420_op23(cop400_state *cpustate, UINT8 opcode) @@ -515,41 +515,41 @@ static void cop420_op23(cop400_state *cpustate, UINT8 opcode) static const cop400_opcode_map COP420_OPCODE_33_MAP[] = { - {1, illegal },{1, skgbz0 },{1, illegal },{1, skgbz2 },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, skgbz1 },{1, illegal },{1, skgbz3 },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, skgz },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, inin },{1, inil },{1, ing },{1, illegal },{1, cqma },{1, illegal },{1, inl },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, omg },{1, illegal },{1, camq },{1, illegal },{1, obd },{1, illegal }, - - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi }, - {1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi }, - {1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei }, - {1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - - {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, - {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, - {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, - {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, - {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, - {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, - {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, - {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, - - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal } + {1, illegal },{1, skgbz0 },{1, illegal },{1, skgbz2 },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, skgbz1 },{1, illegal },{1, skgbz3 },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, skgz },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, inin },{1, inil },{1, ing },{1, illegal },{1, cqma },{1, illegal },{1, inl },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, omg },{1, illegal },{1, camq },{1, illegal },{1, obd },{1, illegal }, + + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi }, + {1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi }, + {1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei }, + {1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + + {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, + {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, + {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, + {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, + {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, + {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, + {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, + {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, + + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal } }; static void cop420_op33(cop400_state *cpustate, UINT8 opcode) @@ -565,9 +565,9 @@ static const cop400_opcode_map COP420_OPCODE_MAP[] = {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, {1, casc },{1, skmbz1 },{1, xabr },{1, skmbz3 },{1, xis },{1, ld },{1, x },{1, xds }, {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, - {1, skc },{1, ske },{1, sc },{1, cop420_op23 },{1, xis },{1, ld },{1, x },{1, xds }, + {1, skc },{1, ske },{1, sc },{1, cop420_op23 },{1, xis },{1, ld },{1, x },{1, xds }, {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, - {1, asc },{1, add },{1, rc },{1, cop420_op33 },{1, xis },{1, ld },{1, x },{1, xds }, + {1, asc },{1, add },{1, rc },{1, cop420_op33 },{1, xis },{1, ld },{1, x },{1, xds }, {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, {1, comp },{1, skt },{1, rmb2 },{1, rmb3 },{1, nop },{1, rmb1 },{1, smb2 },{1, smb1 }, @@ -600,41 +600,41 @@ static const cop400_opcode_map COP420_OPCODE_MAP[] = static const cop400_opcode_map COP444_OPCODE_23_MAP[256] = { - {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, - {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, - {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, - {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, - {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, - {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, - {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, - {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, - - {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, - {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, - {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, - {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, - {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, - {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, - {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, - {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, - - {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, - {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, - {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, - {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, - {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, - {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, - {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, - {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, - - {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, - {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, - {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, - {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, - {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, - {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, - {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, - {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, + {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, + {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, + {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, + {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, + {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, + {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, + {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, + {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, + + {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, + {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, + {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, + {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, + {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, + {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, + {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, + {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd }, + + {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, + {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, + {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, + {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, + {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, + {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, + {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, + {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, + + {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, + {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, + {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, + {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, + {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, + {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, + {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, + {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad }, }; static void cop444_op23(cop400_state *cpustate, UINT8 opcode) @@ -646,41 +646,41 @@ static void cop444_op23(cop400_state *cpustate, UINT8 opcode) static const cop400_opcode_map COP444_OPCODE_33_MAP[256] = { - {1, illegal },{1, skgbz0 },{1, illegal },{1, skgbz2 },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, skgbz1 },{1, illegal },{1, skgbz3 },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, skgz },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, inin },{1, inil },{1, ing },{1, illegal },{1, cqma },{1, illegal },{1, inl },{1, ctma }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, it },{1, illegal },{1, omg },{1, illegal },{1, camq },{1, illegal },{1, obd },{1, camt }, - - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi }, - {1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi }, - {1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei }, - {1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, - - {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, - {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, - {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, - {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, - {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, - {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, - {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, - {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, - - {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, - {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, - {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, - {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, - {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, - {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, - {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, - {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, + {1, illegal },{1, skgbz0 },{1, illegal },{1, skgbz2 },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, skgbz1 },{1, illegal },{1, skgbz3 },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, skgz },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, inin },{1, inil },{1, ing },{1, illegal },{1, cqma },{1, illegal },{1, inl },{1, ctma }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, it },{1, illegal },{1, omg },{1, illegal },{1, camq },{1, illegal },{1, obd },{1, camt }, + + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi }, + {1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi }, + {1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei }, + {1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }, + + {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, + {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, + {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, + {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, + {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, + {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, + {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, + {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, + + {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, + {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, + {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, + {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, + {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, + {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, + {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, + {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, }; static void cop444_op33(cop400_state *cpustate, UINT8 opcode) @@ -696,9 +696,9 @@ static const cop400_opcode_map COP444_OPCODE_MAP[256] = {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, {1, casc },{1, skmbz1 },{1, cop444_xabr},{1, skmbz3 },{1, xis },{1, ld },{1, x },{1, xds }, {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, - {1, skc },{1, ske },{1, sc },{1, cop444_op23 },{1, xis },{1, ld },{1, x },{1, xds }, + {1, skc },{1, ske },{1, sc },{1, cop444_op23 },{1, xis },{1, ld },{1, x },{1, xds }, {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, - {1, asc },{1, add },{1, rc },{1, cop444_op33 },{1, xis },{1, ld },{1, x },{1, xds }, + {1, asc },{1, add },{1, rc },{1, cop444_op33 },{1, xis },{1, ld },{1, x },{1, xds }, {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi }, {1, comp },{1, skt },{1, rmb2 },{1, rmb3 },{1, nop },{1, rmb1 },{1, smb2 },{1, smb1 }, @@ -1376,11 +1376,11 @@ static CPU_GET_INFO( cop400 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: /* set per-core */ break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 8; /* really 4 */ break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: /* set per-core */ break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: /* set per-core */ break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 9; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 9; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; /* --- the following bits of info are returned as pointers to functions --- */ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(cop400); break; @@ -1394,7 +1394,7 @@ static CPU_GET_INFO( cop400 ) case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break; case CPUINFO_PTR_STATE_TABLE: info->state_table = &cpustate->state_table; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: /* set per-core */ break; - case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: /* set per-core */ break; + case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: /* set per-core */ break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case DEVINFO_STR_NAME: strcpy(info->s, "COP400"); break; @@ -1417,7 +1417,7 @@ CPU_GET_INFO( cop410 ) { /* --- the following bits of info are returned as 64-bit signed integers --- */ case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 9; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 5; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 5; break; /* --- the following bits of info are returned as pointers to functions --- */ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(cop410); break; @@ -1480,7 +1480,7 @@ CPU_GET_INFO( cop420 ) { /* --- the following bits of info are returned as 64-bit signed integers --- */ case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 10; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 6; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 6; break; /* --- the following bits of info are returned as pointers to functions --- */ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(cop420); break; @@ -1561,7 +1561,7 @@ CPU_GET_INFO( cop444 ) { /* --- the following bits of info are returned as 64-bit signed integers --- */ case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 11; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 7; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 7; break; /* --- the following bits of info are returned as pointers to functions --- */ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(cop444); break; @@ -1609,7 +1609,7 @@ CPU_GET_INFO( cop424 ) { /* --- the following bits of info are returned as 64-bit signed integers --- */ case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 10; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 6; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 6; break; /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_1kb); break; diff --git a/src/emu/cpu/cp1610/cp1610.c b/src/emu/cpu/cp1610/cp1610.c index e84432d61e9..2035dc696a1 100644 --- a/src/emu/cpu/cp1610/cp1610.c +++ b/src/emu/cpu/cp1610/cp1610.c @@ -69,11 +69,11 @@ INLINE cp1610_state *get_safe_token(const device_config *device) cpustate->flags &= ~(S|Z|C|OV) /* clear sign and zero flags */ -#define CLR_SZ \ +#define CLR_SZ \ cpustate->flags &= ~(S|Z) /* clear sign,zero, and carry flags */ -#define CLR_SZC \ +#define CLR_SZC \ cpustate->flags &= ~(S|Z|C) /* set sign and zero flags */ @@ -2127,7 +2127,7 @@ static void cp1610_do_sdbd(cp1610_state *cpustate) case 0x3e8: /* 1 110 101 xxx */ cp1610_sdbd_xorat_i(cpustate, 5,dest); break; case 0x3f0: /* 1 110 110 xxx */ cp1610_sdbd_xorat_d(cpustate, 6,dest); break; /* ??? */ case 0x3f8: /* 1 110 111 xxx */ cp1610_sdbd_xori(cpustate, dest); break; - default: cp1610_illegal(cpustate); break; + default: cp1610_illegal(cpustate); break; } } @@ -3432,7 +3432,7 @@ static CPU_SET_INFO( cp1610 ) case CPUINFO_INT_INPUT_STATE + CP1610_INT_INTR: cp1610_set_irq_line(cpustate, state-CPUINFO_INT_INPUT_STATE, info->i); break; - case CPUINFO_INT_REGISTER + CP1610_R0: cpustate->r[0] = info->i; break; + case CPUINFO_INT_REGISTER + CP1610_R0: cpustate->r[0] = info->i; break; case CPUINFO_INT_REGISTER + CP1610_R1: cpustate->r[1] = info->i; break; case CPUINFO_INT_REGISTER + CP1610_R2: cpustate->r[2] = info->i; break; case CPUINFO_INT_REGISTER + CP1610_R3: cpustate->r[3] = info->i; break; @@ -3467,11 +3467,11 @@ CPU_GET_INFO( cp1610 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = -1; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_PREVIOUSPC: info->i = 0; /* TODO??? */ break; @@ -3501,7 +3501,7 @@ CPU_GET_INFO( cp1610 ) case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break; /* --- the following bits of info are returned as NULL-terminated strings --- */ - case DEVINFO_STR_NAME: strcpy(info->s, "CP1610"); break; + case DEVINFO_STR_NAME: strcpy(info->s, "CP1610"); break; case DEVINFO_STR_FAMILY: strcpy(info->s, ""); break; case DEVINFO_STR_VERSION: strcpy(info->s, "1.0"); break; case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break; diff --git a/src/emu/cpu/cpu.mak b/src/emu/cpu/cpu.mak index b9da625b67c..a53af75d272 100644 --- a/src/emu/cpu/cpu.mak +++ b/src/emu/cpu/cpu.mak @@ -90,7 +90,7 @@ CPUOBJS += $(CPUOBJ)/arm7/arm7.o DASMOBJS += $(CPUOBJ)/arm7/arm7dasm.o endif -$(CPUOBJ)/arm/arm.o: $(CPUSRC)/arm/arm.c \ +$(CPUOBJ)/arm/arm.o: $(CPUSRC)/arm/arm.c \ $(CPUSRC)/arm/arm.h $(CPUOBJ)/arm7/arm7.o: $(CPUSRC)/arm7/arm7.c \ @@ -110,7 +110,7 @@ CPUOBJS += $(CPUOBJ)/se3208/se3208.o DASMOBJS += $(CPUOBJ)/se3208/se3208dis.o endif -$(CPUOBJ)/se3208/se3208.o: $(CPUSRC)/se3208/se3208.c \ +$(CPUOBJ)/se3208/se3208.o: $(CPUSRC)/se3208/se3208.c \ $(CPUSRC)/se3208/se3208.h @@ -193,7 +193,7 @@ CPUOBJS += $(CPUOBJ)/dsp32/dsp32.o DASMOBJS += $(CPUOBJ)/dsp32/dsp32dis.o endif -$(CPUOBJ)/dsp32/dsp32.o: $(CPUSRC)/dsp32/dsp32.c \ +$(CPUOBJ)/dsp32/dsp32.o: $(CPUSRC)/dsp32/dsp32.c \ $(CPUSRC)/dsp32/dsp32.h @@ -377,7 +377,7 @@ G65816DEPS = \ $(CPUOBJ)/g65816/g65816.o: $(CPUSRC)/g65816/g65816.c \ $(G65816DEPS) -$(CPUOBJ)/g65816/g65816o0.o: $(CPUSRC)/g65816/g65816o0.c \ +$(CPUOBJ)/g65816/g65816o0.o: $(CPUSRC)/g65816/g65816o0.c \ $(G65816DEPS) $(CPUOBJ)/g65816/g65816o1.o: $(CPUSRC)/g65816/g65816o1.c \ @@ -425,7 +425,7 @@ $(CPUOBJ)/h83002/h8_16.o: $(CPUSRC)/h83002/h8_16.c \ $(CPUSRC)/h83002/h8ops.h \ $(CPUSRC)/h83002/h8priv.h -$(CPUOBJ)/h83002/h8disasm.o: $(CPUSRC)/h83002/h8disasm.c +$(CPUOBJ)/h83002/h8disasm.o: $(CPUSRC)/h83002/h8disasm.c $(CPUOBJ)/h83002/h8periph.o: $(CPUSRC)/h83002/h8periph.c \ $(CPUSRC)/h83002/h8priv.h @@ -446,7 +446,7 @@ $(CPUOBJ)/h83002/h8_8.o: $(CPUSRC)/h83002/h8_8.c \ $(CPUSRC)/h83002/h8ops.h \ $(CPUSRC)/h83002/h8priv.h -$(CPUOBJ)/h83002/h8disasm.o: $(CPUSRC)/h83002/h8disasm.c +$(CPUOBJ)/h83002/h8disasm.o: $(CPUSRC)/h83002/h8disasm.c $(CPUOBJ)/h83002/h8periph.o: $(CPUSRC)/h83002/h8periph.c \ $(CPUSRC)/h83002/h8priv.h @@ -1326,7 +1326,7 @@ CPUOBJS += $(CPUOBJ)/avr8/avr8.o DASMOBJS += $(CPUOBJ)/avr8/avr8dasm.o endif -$(CPUOBJ)/avr8/avr8.o: $(CPUSRC)/avr8/avr8.c \ +$(CPUOBJ)/avr8/avr8.o: $(CPUSRC)/avr8/avr8.c \ $(CPUSRC)/avr8/avr8.h diff --git a/src/emu/cpu/cubeqcpu/cubeqcpu.c b/src/emu/cpu/cubeqcpu/cubeqcpu.c index 9b74696acf2..b075d2b5ce2 100644 --- a/src/emu/cpu/cubeqcpu/cubeqcpu.c +++ b/src/emu/cpu/cubeqcpu/cubeqcpu.c @@ -1306,9 +1306,9 @@ static CPU_EXECUTE( cquestlin ) case 2: r = 0; s = cpustate->q; break; case 3: r = 0; s = cpustate->ram[b]; break; case 4: r = 0; s = cpustate->ram[a]; break; - case 5: r = data_in; s = cpustate->ram[a]; break; - case 6: r = data_in; s = cpustate->q; break; - case 7: r = data_in; s = 0; break; + case 5: r = data_in; s = cpustate->ram[a]; break; + case 6: r = data_in; s = cpustate->q; break; + case 7: r = data_in; s = 0; break; } /* 12-bits */ @@ -1575,22 +1575,22 @@ static CPU_SET_INFO( cquestsnd ) case CPUINFO_INT_REGISTER + CQUESTSND_ADRCNTR: cpustate->adrcntr = info->i; break; case CPUINFO_STR_REGISTER + CQUESTSND_DINLATCH: cpustate->dinlatch = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTSND_RAM0: cpustate->ram[0x0] = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTSND_RAM1: cpustate->ram[0x1] = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTSND_RAM2: cpustate->ram[0x2] = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTSND_RAM3: cpustate->ram[0x3] = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTSND_RAM4: cpustate->ram[0x4] = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTSND_RAM5: cpustate->ram[0x5] = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTSND_RAM6: cpustate->ram[0x6] = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTSND_RAM7: cpustate->ram[0x7] = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTSND_RAM8: cpustate->ram[0x8] = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTSND_RAM9: cpustate->ram[0x9] = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTSND_RAMA: cpustate->ram[0xa] = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTSND_RAMB: cpustate->ram[0xb] = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTSND_RAMC: cpustate->ram[0xc] = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTSND_RAMD: cpustate->ram[0xd] = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTSND_RAME: cpustate->ram[0xe] = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTSND_RAMF: cpustate->ram[0xf] = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTSND_RAM0: cpustate->ram[0x0] = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTSND_RAM1: cpustate->ram[0x1] = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTSND_RAM2: cpustate->ram[0x2] = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTSND_RAM3: cpustate->ram[0x3] = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTSND_RAM4: cpustate->ram[0x4] = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTSND_RAM5: cpustate->ram[0x5] = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTSND_RAM6: cpustate->ram[0x6] = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTSND_RAM7: cpustate->ram[0x7] = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTSND_RAM8: cpustate->ram[0x8] = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTSND_RAM9: cpustate->ram[0x9] = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTSND_RAMA: cpustate->ram[0xa] = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTSND_RAMB: cpustate->ram[0xb] = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTSND_RAMC: cpustate->ram[0xc] = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTSND_RAMD: cpustate->ram[0xd] = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTSND_RAME: cpustate->ram[0xe] = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTSND_RAMF: cpustate->ram[0xf] = info->i; break; } } @@ -1617,11 +1617,11 @@ CPU_GET_INFO( cquestsnd ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 8; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = -3; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_PC: case CPUINFO_INT_REGISTER + CQUESTSND_PC: info->i = cpustate->pc; break; @@ -1646,8 +1646,8 @@ CPU_GET_INFO( cquestsnd ) case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright Philip J Bennett"); break; case CPUINFO_STR_FLAGS: sprintf(info->s, "......."); break; - case CPUINFO_STR_REGISTER + CQUESTSND_PC: sprintf(info->s, "PC: %02X", cpustate->pc); break; - case CPUINFO_STR_REGISTER + CQUESTSND_Q: sprintf(info->s, "Q: %04X", cpustate->q); break; + case CPUINFO_STR_REGISTER + CQUESTSND_PC: sprintf(info->s, "PC: %02X", cpustate->pc); break; + case CPUINFO_STR_REGISTER + CQUESTSND_Q: sprintf(info->s, "Q: %04X", cpustate->q); break; case CPUINFO_STR_REGISTER + CQUESTSND_RTNLATCH: sprintf(info->s, "RTN: %02X", cpustate->rtnlatch); break; case CPUINFO_STR_REGISTER + CQUESTSND_ADRCNTR: sprintf(info->s, "CNT: %02X", cpustate->adrcntr); break; case CPUINFO_STR_REGISTER + CQUESTSND_DINLATCH: sprintf(info->s, "DIN: %04X", cpustate->dinlatch); break; @@ -1685,30 +1685,30 @@ static CPU_SET_INFO( cquestrot ) case CPUINFO_INT_REGISTER + CQUESTROT_PC: cpustate->pc = info->i; break; case CPUINFO_INT_REGISTER + CQUESTROT_Q: cpustate->q = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTROT_RAM0: cpustate->ram[0x0] = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTROT_RAM1: cpustate->ram[0x1] = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTROT_RAM2: cpustate->ram[0x2] = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTROT_RAM3: cpustate->ram[0x3] = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTROT_RAM4: cpustate->ram[0x4] = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTROT_RAM5: cpustate->ram[0x5] = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTROT_RAM6: cpustate->ram[0x6] = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTROT_RAM7: cpustate->ram[0x7] = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTROT_RAM8: cpustate->ram[0x8] = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTROT_RAM9: cpustate->ram[0x9] = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTROT_RAMA: cpustate->ram[0xa] = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTROT_RAMB: cpustate->ram[0xb] = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTROT_RAMC: cpustate->ram[0xc] = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTROT_RAMD: cpustate->ram[0xd] = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTROT_RAME: cpustate->ram[0xe] = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTROT_RAMF: cpustate->ram[0xf] = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTROT_SEQCNT: cpustate->seqcnt = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTROT_DYNADDR: cpustate->dynaddr = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTROT_DYNDATA: cpustate->dyndata = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTROT_YRLATCH: cpustate->yrlatch = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTROT_YDLATCH: cpustate->ydlatch = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTROT_DINLATCH: cpustate->dinlatch = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTROT_DSRCLATCH:cpustate->dsrclatch = info->i; break; - case CPUINFO_STR_REGISTER + CQUESTROT_RSRCLATCH:cpustate->rsrclatch = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTROT_RAM0: cpustate->ram[0x0] = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTROT_RAM1: cpustate->ram[0x1] = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTROT_RAM2: cpustate->ram[0x2] = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTROT_RAM3: cpustate->ram[0x3] = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTROT_RAM4: cpustate->ram[0x4] = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTROT_RAM5: cpustate->ram[0x5] = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTROT_RAM6: cpustate->ram[0x6] = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTROT_RAM7: cpustate->ram[0x7] = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTROT_RAM8: cpustate->ram[0x8] = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTROT_RAM9: cpustate->ram[0x9] = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTROT_RAMA: cpustate->ram[0xa] = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTROT_RAMB: cpustate->ram[0xb] = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTROT_RAMC: cpustate->ram[0xc] = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTROT_RAMD: cpustate->ram[0xd] = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTROT_RAME: cpustate->ram[0xe] = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTROT_RAMF: cpustate->ram[0xf] = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTROT_SEQCNT: cpustate->seqcnt = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTROT_DYNADDR: cpustate->dynaddr = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTROT_DYNDATA: cpustate->dyndata = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTROT_YRLATCH: cpustate->yrlatch = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTROT_YDLATCH: cpustate->ydlatch = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTROT_DINLATCH: cpustate->dinlatch = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTROT_DSRCLATCH:cpustate->dsrclatch = info->i; break; + case CPUINFO_STR_REGISTER + CQUESTROT_RSRCLATCH:cpustate->rsrclatch = info->i; break; } } @@ -1735,11 +1735,11 @@ CPU_GET_INFO( cquestrot ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 9; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = -3; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_PC: case CPUINFO_INT_REGISTER + CQUESTROT_PC: info->i = cpustate->pc; break; @@ -1764,7 +1764,7 @@ CPU_GET_INFO( cquestrot ) case CPUINFO_STR_FLAGS: sprintf(info->s, "%c%c%c", cpustate->cflag ? 'C' : '.', cpustate->vflag ? 'V' : '.', cpustate->f ? '.' : 'Z'); break; - case CPUINFO_STR_REGISTER + CQUESTROT_PC: sprintf(info->s, "PC: %02X", cpustate->pc); break; + case CPUINFO_STR_REGISTER + CQUESTROT_PC: sprintf(info->s, "PC: %02X", cpustate->pc); break; case CPUINFO_STR_REGISTER + CQUESTROT_Q: sprintf(info->s, "Q: %04X", cpustate->q); break; case CPUINFO_STR_REGISTER + CQUESTROT_RAM0: sprintf(info->s, "RAM[0]: %04X", cpustate->ram[0x0]); break; case CPUINFO_STR_REGISTER + CQUESTROT_RAM1: sprintf(info->s, "RAM[1]: %04X", cpustate->ram[0x1]); break; @@ -1853,11 +1853,11 @@ CPU_GET_INFO( cquestlin ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 8; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = -3; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_PC: case CPUINFO_INT_REGISTER + CQUESTLIN_FGPC: info->i = cpustate->pc[cpustate->clkcnt & 3 ? BACKGROUND : FOREGROUND]; break; @@ -1883,8 +1883,8 @@ CPU_GET_INFO( cquestlin ) cpustate->vflag ? 'V' : '.', cpustate->f ? '.' : 'Z', cpustate->clkcnt & 3 ? 'B' : 'F'); break; - case CPUINFO_STR_REGISTER + CQUESTLIN_FGPC: sprintf(info->s, "FPC: %02X", cpustate->pc[FOREGROUND]); break; - case CPUINFO_STR_REGISTER + CQUESTLIN_BGPC: sprintf(info->s, "BPC: %02X", cpustate->pc[BACKGROUND]); break; + case CPUINFO_STR_REGISTER + CQUESTLIN_FGPC: sprintf(info->s, "FPC: %02X", cpustate->pc[FOREGROUND]); break; + case CPUINFO_STR_REGISTER + CQUESTLIN_BGPC: sprintf(info->s, "BPC: %02X", cpustate->pc[BACKGROUND]); break; case CPUINFO_STR_REGISTER + CQUESTLIN_Q: sprintf(info->s, "Q: %04X", cpustate->q); break; case CPUINFO_STR_REGISTER + CQUESTLIN_RAM0: sprintf(info->s, "RAM[0]: %04X", cpustate->ram[0x0]); break; case CPUINFO_STR_REGISTER + CQUESTLIN_RAM1: sprintf(info->s, "RAM[1]: %04X", cpustate->ram[0x1]); break; diff --git a/src/emu/cpu/drcbec.c b/src/emu/cpu/drcbec.c index 8cc3a8a6264..4c62f297178 100644 --- a/src/emu/cpu/drcbec.c +++ b/src/emu/cpu/drcbec.c @@ -217,7 +217,7 @@ struct _drcbe_state const address_space * space[ADDRESS_SPACES]; /* pointers to CPU's address space */ drcuml_state * drcuml; /* pointer back to our owner */ drccache * cache; /* pointer to the cache */ - drcuml_machine_state state; /* state of the machine */ + drcuml_machine_state state; /* state of the machine */ drchash_state * hash; /* hash table state */ drcmap_state * map; /* code map */ drclabel_list * labels; /* label list */ diff --git a/src/emu/cpu/drcbeut.c b/src/emu/cpu/drcbeut.c index 07c51463ca4..8c98bfb32e7 100644 --- a/src/emu/cpu/drcbeut.c +++ b/src/emu/cpu/drcbeut.c @@ -43,7 +43,7 @@ struct _drcmap_state drcmap_entry * head; /* head of the live list */ drcmap_entry ** tailptr; /* pointer to tail of the live list */ UINT32 numvalues; /* number of values in the list */ - UINT32 mapvalue[DRCUML_MAPVAR_END - DRCUML_MAPVAR_M0]; /* array of current values */ + UINT32 mapvalue[DRCUML_MAPVAR_END - DRCUML_MAPVAR_M0]; /* array of current values */ }; @@ -60,7 +60,7 @@ struct _drclabel /* structure holding a live list of labels */ struct _drclabel_list { - drccache * cache; /* pointer to the cache */ + drccache * cache; /* pointer to the cache */ drclabel * head; /* head of the live list */ }; diff --git a/src/emu/cpu/drcbex64.c b/src/emu/cpu/drcbex64.c index 746b9848d9f..90b390a66aa 100644 --- a/src/emu/cpu/drcbex64.c +++ b/src/emu/cpu/drcbex64.c @@ -267,7 +267,7 @@ struct _drcbe_state const device_config * device; /* CPU device we are associated with */ drcuml_state * drcuml; /* pointer back to our owner */ drccache * cache; /* pointer to the cache */ - drcuml_machine_state state; /* state of the machine */ + drcuml_machine_state state; /* state of the machine */ drchash_state * hash; /* hash table state */ drcmap_state * map; /* code map */ drclabel_list * labels; /* label list */ @@ -695,7 +695,7 @@ static drcbe_state *drcbex64_alloc(drcuml_state *drcuml, drccache *cache, const 0xffc0, /* DRCUML_FMOD_TRUNC */ 0x9fc0, /* DRCUML_FMOD_ROUND */ 0xdfc0, /* DRCUML_FMOD_CEIL */ - 0xbfc0 /* DRCUML_FMOD_FLOOR */ + 0xbfc0 /* DRCUML_FMOD_FLOOR */ }; drcbe_state *drcbe; int opnum, entry; diff --git a/src/emu/cpu/drcbex86.c b/src/emu/cpu/drcbex86.c index d35c5132b82..f76a8bbcb23 100644 --- a/src/emu/cpu/drcbex86.c +++ b/src/emu/cpu/drcbex86.c @@ -159,7 +159,7 @@ struct _drcbe_state const device_config * device; /* CPU device we are associated with */ drcuml_state * drcuml; /* pointer back to our owner */ drccache * cache; /* pointer to the cache */ - drcuml_machine_state state; /* state of the machine */ + drcuml_machine_state state; /* state of the machine */ drchash_state * hash; /* hash table state */ drcmap_state * map; /* code map */ drclabel_list * labels; /* label list */ @@ -281,7 +281,7 @@ static const UINT16 fp_control[4] = 0x0e3f, /* DRCUML_FMOD_TRUNC */ 0x023f, /* DRCUML_FMOD_ROUND */ 0x0a3f, /* DRCUML_FMOD_CEIL */ - 0x063f /* DRCUML_FMOD_FLOOR */ + 0x063f /* DRCUML_FMOD_FLOOR */ }; diff --git a/src/emu/cpu/drcfe.c b/src/emu/cpu/drcfe.c index 50b992b1b87..0d7c124c063 100644 --- a/src/emu/cpu/drcfe.c +++ b/src/emu/cpu/drcfe.c @@ -65,7 +65,7 @@ struct _drcfe_state opcode_desc * desc_live_list; /* head of list of live descriptions */ opcode_desc * desc_free_list; /* head of list of free descriptions */ opcode_desc ** desc_array; /* array of descriptions in PC order */ - UINT32 desc_array_size; /* size of the array */ + UINT32 desc_array_size; /* size of the array */ }; diff --git a/src/emu/cpu/drcuml.h b/src/emu/cpu/drcuml.h index b59ce37dc52..0352ff480df 100644 --- a/src/emu/cpu/drcuml.h +++ b/src/emu/cpu/drcuml.h @@ -327,7 +327,7 @@ typedef struct _drcuml_codehandle drcuml_codehandle; typedef struct _drcuml_parameter drcuml_parameter; struct _drcuml_parameter { - drcuml_ptype type; /* parameter type */ + drcuml_ptype type; /* parameter type */ drcuml_pvalue value; /* parameter value */ }; @@ -341,7 +341,7 @@ struct _drcuml_instruction UINT8 flags; /* flags */ UINT8 size; /* operation size */ UINT8 numparams; /* number of parameters */ - drcuml_parameter param[4]; /* up to 4 parameters */ + drcuml_parameter param[4]; /* up to 4 parameters */ }; diff --git a/src/emu/cpu/dsp32/dsp32.c b/src/emu/cpu/dsp32/dsp32.c index 5e4d5906580..2e67a012576 100644 --- a/src/emu/cpu/dsp32/dsp32.c +++ b/src/emu/cpu/dsp32/dsp32.c @@ -743,11 +743,11 @@ CPU_GET_INFO( dsp32c ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 24; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + DSP32_IRQ0: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + DSP32_IRQ1: info->i = 0; break; diff --git a/src/emu/cpu/dsp32/dsp32ops.c b/src/emu/cpu/dsp32/dsp32ops.c index 233b4aab0ef..2cabf7014ad 100644 --- a/src/emu/cpu/dsp32/dsp32ops.c +++ b/src/emu/cpu/dsp32/dsp32ops.c @@ -61,7 +61,7 @@ #define WWORD_DEFERRED(cs,a,v) do { int bufidx = (cs)->mbuf_index & 3; (cs)->mbufaddr[bufidx] = -(a); (cs)->mbufdata[bufidx] = (v); } while (0) #define WLONG_DEFERRED(cs,a,v) do { int bufidx = (cs)->mbuf_index & 3; (cs)->mbufaddr[bufidx] = (a); (cs)->mbufdata[bufidx] = (v); } while (0) #define PROCESS_DEFERRED_MEMORY(cs) \ - if ((cs)->mbufaddr[++(cs)->mbuf_index & 3] != 1) \ + if ((cs)->mbufaddr[++(cs)->mbuf_index & 3] != 1) \ { \ int bufidx = (cs)->mbuf_index & 3; \ if ((cs)->mbufaddr[bufidx] >= 0) \ @@ -171,9 +171,9 @@ static void cau_write_pi_special(dsp32_state *cpustate, UINT8 i, UINT32 val) case 5: cpustate->obuf = val; break; case 6: cpustate->pdr = val; update_pcr(cpustate, cpustate->pcr | PCR_PDFs); break; case 14: cpustate->piop = val; break; - case 20: cpustate->pdr2 = val; break; + case 20: cpustate->pdr2 = val; break; case 22: cpustate->pir = val; update_pcr(cpustate, cpustate->pcr | PCR_PIFs); break; - case 30: cpustate->pcw = val; break; + case 30: cpustate->pcw = val; break; default: fprintf(stderr, "Unimplemented CAU PI write = %X\n", i); } } diff --git a/src/emu/cpu/dsp56k/dsp56k.c b/src/emu/cpu/dsp56k/dsp56k.c index f690fe8c26e..524df464b1f 100644 --- a/src/emu/cpu/dsp56k/dsp56k.c +++ b/src/emu/cpu/dsp56k/dsp56k.c @@ -455,11 +455,11 @@ CPU_GET_INFO( dsp56k ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break; /* 1-5 */ case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = -1; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 16; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 16; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = -1; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 16; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = -1; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + DSP56K_IRQ_MODA: info->i = DSP56K_IRQ_MODA; break; case CPUINFO_INT_INPUT_STATE + DSP56K_IRQ_MODB: info->i = DSP56K_IRQ_MODB; break; @@ -534,10 +534,10 @@ CPU_GET_INFO( dsp56k ) case CPUINFO_FCT_WRITE: info->write = NULL; break; case CPUINFO_FCT_READOP: info->readop = NULL; break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break; - case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: - info->internal_map16 = ADDRESS_MAP_NAME(dsp56156_x_data_map); break; - case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: - info->internal_map16 = ADDRESS_MAP_NAME(dsp56156_program_map); break; + case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: + info->internal_map16 = ADDRESS_MAP_NAME(dsp56156_x_data_map); break; + case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: + info->internal_map16 = ADDRESS_MAP_NAME(dsp56156_program_map); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case DEVINFO_STR_NAME: strcpy(info->s, "DSP56156"); break; diff --git a/src/emu/cpu/dsp56k/dsp56ops.c b/src/emu/cpu/dsp56k/dsp56ops.c index 20a8ff10e51..a06fb24b089 100644 --- a/src/emu/cpu/dsp56k/dsp56ops.c +++ b/src/emu/cpu/dsp56k/dsp56ops.c @@ -2223,9 +2223,9 @@ static size_t dsp56k_op_asl4(dsp56k_core* cpustate, const UINT16 op, UINT8* cycl not the same. */ /* C - Set if bit 36 of source operand is set. Cleared otherwise. */ if (*((UINT64*)D.addr) & U64(0x0000008000000000)) N_SET(); else N_CLEAR(); - if (*((UINT64*)D.addr) == 0) Z_SET(); else Z_CLEAR(); + if (*((UINT64*)D.addr) == 0) Z_SET(); else Z_CLEAR(); if ( (*((UINT64*)D.addr) & U64(0x000000ff00000000)) != (p_accum & U64(0x000000ff00000000)) ) V_SET(); else V_CLEAR(); - if (p_accum & U64(0x0000001000000000)) C_SET(); else C_CLEAR(); + if (p_accum & U64(0x0000001000000000)) C_SET(); else C_CLEAR(); cycles += 2; return 1; @@ -2254,7 +2254,7 @@ static size_t dsp56k_op_asr4(dsp56k_core* cpustate, const UINT16 op, UINT8* cycl /* TODO: E, U */ /* C - Set if bit 3 of source operand is set. Cleared otherwise. */ if (*((UINT64*)D.addr) & U64(0x0000008000000000)) N_SET(); else N_CLEAR(); - if (*((UINT64*)D.addr) == 0) Z_SET(); else Z_CLEAR(); + if (*((UINT64*)D.addr) == 0) Z_SET(); else Z_CLEAR(); V_CLEAR(); if (p_accum & U64(0x0000000000000008)) C_SET(); else C_CLEAR(); @@ -2350,7 +2350,7 @@ static size_t dsp56k_op_bfop(dsp56k_core* cpustate, const UINT16 op, const UINT1 if ((iVal & previousValue) == 0x0000) C_SET(); else C_CLEAR(); break; } - cycles += 4; /* TODO: + mvb oscillator clock cycles */ + cycles += 4; /* TODO: + mvb oscillator clock cycles */ return 2; } @@ -2416,7 +2416,7 @@ static size_t dsp56k_op_bfop_1(dsp56k_core* cpustate, const UINT16 op, const UIN if ((iVal & previousValue) == 0x0000) C_SET(); else C_CLEAR(); break; } - cycles += 4; /* TODO: + mvb oscillator clock cycles */ + cycles += 4; /* TODO: + mvb oscillator clock cycles */ return 2; } @@ -2486,7 +2486,7 @@ static size_t dsp56k_op_bfop_2(dsp56k_core* cpustate, const UINT16 op, const UIN if ((iVal & previousValue) == 0x0000) C_SET(); else C_CLEAR(); break; } - cycles += 4; /* TODO: + mvb oscillator clock cycles */ + cycles += 4; /* TODO: + mvb oscillator clock cycles */ return 2; } diff --git a/src/emu/cpu/e132xs/e132xs.c b/src/emu/cpu/e132xs/e132xs.c index 2de690a12d2..8cefc686cc5 100644 --- a/src/emu/cpu/e132xs/e132xs.c +++ b/src/emu/cpu/e132xs/e132xs.c @@ -498,7 +498,7 @@ static void hyperstone_set_trap_entry(hyperstone_state *cpustate, int which) } } -#define OP cpustate->op +#define OP cpustate->op #define PPC cpustate->ppc //previous pc #define PC cpustate->global_regs[0] //Program Counter #define SR cpustate->global_regs[1] //Status Register @@ -561,7 +561,7 @@ static void hyperstone_set_trap_entry(hyperstone_state *cpustate, int which) #define SET_LOW_SR(val) (SR = (SR & 0xffff0000) | ((val) & 0x0000ffff)) // when SR is addressed, only low 16 bits can be changed -#define CHECK_C(x) (SR = (SR & ~0x00000001) | (((x) & (((UINT64)1) << 32)) ? 1 : 0 )) +#define CHECK_C(x) (SR = (SR & ~0x00000001) | (((x) & (((UINT64)1) << 32)) ? 1 : 0 )) #define CHECK_VADD(x,y,z) (SR = (SR & ~0x00000008) | ((((x) ^ (z)) & ((y) ^ (z)) & 0x80000000) ? 8: 0)) #define CHECK_VADD3(x,y,w,z) (SR = (SR & ~0x00000008) | ((((x) ^ (z)) & ((y) ^ (z)) & ((w) ^ (z)) & 0x80000000) ? 8: 0)) #define CHECK_VSUB(x,y,z) (SR = (SR & ~0x00000008) | ((((z) ^ (y)) & ((y) ^ (x)) & 0x80000000) ? 8: 0)) @@ -4714,7 +4714,7 @@ static CPU_SET_INFO( hyperstone ) /* --- the following bits of info are set as 64-bit signed integers --- */ case CPUINFO_INT_PC: - case CPUINFO_INT_REGISTER + E132XS_PC: PC = info->i; break; + case CPUINFO_INT_REGISTER + E132XS_PC: PC = info->i; break; case CPUINFO_INT_REGISTER + E132XS_SR: SR = info->i; break; case CPUINFO_INT_REGISTER + E132XS_FER: FER = info->i; break; case CPUINFO_INT_REGISTER + E132XS_G3: set_global_register(cpustate, 3, info->i); break; @@ -4863,10 +4863,10 @@ static CPU_GET_INFO( hyperstone ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 15; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 15; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + 0: /* not implemented */ break; @@ -5059,22 +5059,22 @@ static CPU_GET_INFO( hyperstone ) case CPUINFO_STR_REGISTER + E132XS_G29: sprintf(info->s, "G29 :%08X", cpustate->global_regs[29]); break; case CPUINFO_STR_REGISTER + E132XS_G30: sprintf(info->s, "G30 :%08X", cpustate->global_regs[30]); break; case CPUINFO_STR_REGISTER + E132XS_G31: sprintf(info->s, "G31 :%08X", cpustate->global_regs[31]); break; - case CPUINFO_STR_REGISTER + E132XS_CL0: sprintf(info->s, "CL0 :%08X", cpustate->local_regs[(0 + GET_FP) % 64]); break; - case CPUINFO_STR_REGISTER + E132XS_CL1: sprintf(info->s, "CL1 :%08X", cpustate->local_regs[(1 + GET_FP) % 64]); break; - case CPUINFO_STR_REGISTER + E132XS_CL2: sprintf(info->s, "CL2 :%08X", cpustate->local_regs[(2 + GET_FP) % 64]); break; - case CPUINFO_STR_REGISTER + E132XS_CL3: sprintf(info->s, "CL3 :%08X", cpustate->local_regs[(3 + GET_FP) % 64]); break; - case CPUINFO_STR_REGISTER + E132XS_CL4: sprintf(info->s, "CL4 :%08X", cpustate->local_regs[(4 + GET_FP) % 64]); break; - case CPUINFO_STR_REGISTER + E132XS_CL5: sprintf(info->s, "CL5 :%08X", cpustate->local_regs[(5 + GET_FP) % 64]); break; - case CPUINFO_STR_REGISTER + E132XS_CL6: sprintf(info->s, "CL6 :%08X", cpustate->local_regs[(6 + GET_FP) % 64]); break; - case CPUINFO_STR_REGISTER + E132XS_CL7: sprintf(info->s, "CL7 :%08X", cpustate->local_regs[(7 + GET_FP) % 64]); break; - case CPUINFO_STR_REGISTER + E132XS_CL8: sprintf(info->s, "CL8 :%08X", cpustate->local_regs[(8 + GET_FP) % 64]); break; - case CPUINFO_STR_REGISTER + E132XS_CL9: sprintf(info->s, "CL9 :%08X", cpustate->local_regs[(9 + GET_FP) % 64]); break; - case CPUINFO_STR_REGISTER + E132XS_CL10: sprintf(info->s, "CL10:%08X", cpustate->local_regs[(10 + GET_FP) % 64]); break; - case CPUINFO_STR_REGISTER + E132XS_CL11: sprintf(info->s, "CL11:%08X", cpustate->local_regs[(11 + GET_FP) % 64]); break; - case CPUINFO_STR_REGISTER + E132XS_CL12: sprintf(info->s, "CL12:%08X", cpustate->local_regs[(12 + GET_FP) % 64]); break; - case CPUINFO_STR_REGISTER + E132XS_CL13: sprintf(info->s, "CL13:%08X", cpustate->local_regs[(13 + GET_FP) % 64]); break; - case CPUINFO_STR_REGISTER + E132XS_CL14: sprintf(info->s, "CL14:%08X", cpustate->local_regs[(14 + GET_FP) % 64]); break; - case CPUINFO_STR_REGISTER + E132XS_CL15: sprintf(info->s, "CL15:%08X", cpustate->local_regs[(15 + GET_FP) % 64]); break; + case CPUINFO_STR_REGISTER + E132XS_CL0: sprintf(info->s, "CL0 :%08X", cpustate->local_regs[(0 + GET_FP) % 64]); break; + case CPUINFO_STR_REGISTER + E132XS_CL1: sprintf(info->s, "CL1 :%08X", cpustate->local_regs[(1 + GET_FP) % 64]); break; + case CPUINFO_STR_REGISTER + E132XS_CL2: sprintf(info->s, "CL2 :%08X", cpustate->local_regs[(2 + GET_FP) % 64]); break; + case CPUINFO_STR_REGISTER + E132XS_CL3: sprintf(info->s, "CL3 :%08X", cpustate->local_regs[(3 + GET_FP) % 64]); break; + case CPUINFO_STR_REGISTER + E132XS_CL4: sprintf(info->s, "CL4 :%08X", cpustate->local_regs[(4 + GET_FP) % 64]); break; + case CPUINFO_STR_REGISTER + E132XS_CL5: sprintf(info->s, "CL5 :%08X", cpustate->local_regs[(5 + GET_FP) % 64]); break; + case CPUINFO_STR_REGISTER + E132XS_CL6: sprintf(info->s, "CL6 :%08X", cpustate->local_regs[(6 + GET_FP) % 64]); break; + case CPUINFO_STR_REGISTER + E132XS_CL7: sprintf(info->s, "CL7 :%08X", cpustate->local_regs[(7 + GET_FP) % 64]); break; + case CPUINFO_STR_REGISTER + E132XS_CL8: sprintf(info->s, "CL8 :%08X", cpustate->local_regs[(8 + GET_FP) % 64]); break; + case CPUINFO_STR_REGISTER + E132XS_CL9: sprintf(info->s, "CL9 :%08X", cpustate->local_regs[(9 + GET_FP) % 64]); break; + case CPUINFO_STR_REGISTER + E132XS_CL10: sprintf(info->s, "CL10:%08X", cpustate->local_regs[(10 + GET_FP) % 64]); break; + case CPUINFO_STR_REGISTER + E132XS_CL11: sprintf(info->s, "CL11:%08X", cpustate->local_regs[(11 + GET_FP) % 64]); break; + case CPUINFO_STR_REGISTER + E132XS_CL12: sprintf(info->s, "CL12:%08X", cpustate->local_regs[(12 + GET_FP) % 64]); break; + case CPUINFO_STR_REGISTER + E132XS_CL13: sprintf(info->s, "CL13:%08X", cpustate->local_regs[(13 + GET_FP) % 64]); break; + case CPUINFO_STR_REGISTER + E132XS_CL14: sprintf(info->s, "CL14:%08X", cpustate->local_regs[(14 + GET_FP) % 64]); break; + case CPUINFO_STR_REGISTER + E132XS_CL15: sprintf(info->s, "CL15:%08X", cpustate->local_regs[(15 + GET_FP) % 64]); break; case CPUINFO_STR_REGISTER + E132XS_L0: sprintf(info->s, "L0 :%08X", cpustate->local_regs[0]); break; case CPUINFO_STR_REGISTER + E132XS_L1: sprintf(info->s, "L1 :%08X", cpustate->local_regs[1]); break; case CPUINFO_STR_REGISTER + E132XS_L2: sprintf(info->s, "L2 :%08X", cpustate->local_regs[2]); break; diff --git a/src/emu/cpu/esrip/esrip.c b/src/emu/cpu/esrip/esrip.c index a2a6bae9ac9..89cbe3d2d8a 100644 --- a/src/emu/cpu/esrip/esrip.c +++ b/src/emu/cpu/esrip/esrip.c @@ -1908,11 +1908,11 @@ CPU_GET_INFO( esrip ) case DEVINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 9; break; case DEVINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = -3; break; case DEVINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break; - case DEVINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break; - case DEVINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break; + case DEVINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break; + case DEVINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break; case DEVINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break; - case DEVINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break; - case DEVINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break; + case DEVINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 0; break; + case DEVINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break; case CPUINFO_INT_REGISTER: case CPUINFO_INT_PC: info->i = RIP_PC; break; diff --git a/src/emu/cpu/f8/f8.c b/src/emu/cpu/f8/f8.c index ec36ffcf305..5b179dcdcdf 100644 --- a/src/emu/cpu/f8/f8.c +++ b/src/emu/cpu/f8/f8.c @@ -1749,22 +1749,22 @@ static CPU_EXECUTE( f8 ) case 0x8e: /* 1000 1110 */ f8_adc(cpustate); break; case 0x8f: /* 1000 1111 */ f8_br7(cpustate); break; - case 0x90: /* 1001 0000 */ f8_bf(cpustate, 0x0); break; - case 0x91: /* 1001 0001 */ f8_bf(cpustate, 0x1); break; - case 0x92: /* 1001 0010 */ f8_bf(cpustate, 0x2); break; - case 0x93: /* 1001 0011 */ f8_bf(cpustate, 0x3); break; - case 0x94: /* 1001 0100 */ f8_bf(cpustate, 0x4); break; - case 0x95: /* 1001 0101 */ f8_bf(cpustate, 0x5); break; - case 0x96: /* 1001 0110 */ f8_bf(cpustate, 0x6); break; - case 0x97: /* 1001 0111 */ f8_bf(cpustate, 0x7); break; - case 0x98: /* 1001 1000 */ f8_bf(cpustate, 0x8); break; - case 0x99: /* 1001 1001 */ f8_bf(cpustate, 0x9); break; - case 0x9a: /* 1001 1010 */ f8_bf(cpustate, 0xa); break; - case 0x9b: /* 1001 1011 */ f8_bf(cpustate, 0xb); break; - case 0x9c: /* 1001 1100 */ f8_bf(cpustate, 0xc); break; - case 0x9d: /* 1001 1101 */ f8_bf(cpustate, 0xd); break; - case 0x9e: /* 1001 1110 */ f8_bf(cpustate, 0xe); break; - case 0x9f: /* 1001 1111 */ f8_bf(cpustate, 0xf); break; + case 0x90: /* 1001 0000 */ f8_bf(cpustate, 0x0); break; + case 0x91: /* 1001 0001 */ f8_bf(cpustate, 0x1); break; + case 0x92: /* 1001 0010 */ f8_bf(cpustate, 0x2); break; + case 0x93: /* 1001 0011 */ f8_bf(cpustate, 0x3); break; + case 0x94: /* 1001 0100 */ f8_bf(cpustate, 0x4); break; + case 0x95: /* 1001 0101 */ f8_bf(cpustate, 0x5); break; + case 0x96: /* 1001 0110 */ f8_bf(cpustate, 0x6); break; + case 0x97: /* 1001 0111 */ f8_bf(cpustate, 0x7); break; + case 0x98: /* 1001 1000 */ f8_bf(cpustate, 0x8); break; + case 0x99: /* 1001 1001 */ f8_bf(cpustate, 0x9); break; + case 0x9a: /* 1001 1010 */ f8_bf(cpustate, 0xa); break; + case 0x9b: /* 1001 1011 */ f8_bf(cpustate, 0xb); break; + case 0x9c: /* 1001 1100 */ f8_bf(cpustate, 0xc); break; + case 0x9d: /* 1001 1101 */ f8_bf(cpustate, 0xd); break; + case 0x9e: /* 1001 1110 */ f8_bf(cpustate, 0xe); break; + case 0x9f: /* 1001 1111 */ f8_bf(cpustate, 0xf); break; case 0xa0: /* 1010 0000 */ f8_ins_0(cpustate, 0x0); break; case 0xa1: /* 1010 0001 */ f8_ins_0(cpustate, 0x1); break; @@ -1783,39 +1783,39 @@ static CPU_EXECUTE( f8 ) case 0xae: /* 1010 1110 */ f8_ins_1(cpustate, 0xe); break; case 0xaf: /* 1010 1111 */ f8_ins_1(cpustate, 0xf); break; - case 0xb0: /* 1011 0000 */ f8_outs_0(cpustate, 0x0); break; - case 0xb1: /* 1011 0001 */ f8_outs_0(cpustate, 0x1); break; + case 0xb0: /* 1011 0000 */ f8_outs_0(cpustate, 0x0); break; + case 0xb1: /* 1011 0001 */ f8_outs_0(cpustate, 0x1); break; case 0xb2: /* 1011 0010 */ illegal(cpustate); break; case 0xb3: /* 1011 0011 */ illegal(cpustate); break; - case 0xb4: /* 1011 0100 */ f8_outs_1(cpustate, 0x4); break; - case 0xb5: /* 1011 0101 */ f8_outs_1(cpustate, 0x5); break; - case 0xb6: /* 1011 0110 */ f8_outs_1(cpustate, 0x6); break; - case 0xb7: /* 1011 0111 */ f8_outs_1(cpustate, 0x7); break; - case 0xb8: /* 1011 1000 */ f8_outs_1(cpustate, 0x8); break; - case 0xb9: /* 1011 1001 */ f8_outs_1(cpustate, 0x9); break; - case 0xba: /* 1011 1010 */ f8_outs_1(cpustate, 0xa); break; - case 0xbb: /* 1011 1011 */ f8_outs_1(cpustate, 0xb); break; - case 0xbc: /* 1011 1100 */ f8_outs_1(cpustate, 0xc); break; - case 0xbd: /* 1011 1101 */ f8_outs_1(cpustate, 0xd); break; - case 0xbe: /* 1011 1110 */ f8_outs_1(cpustate, 0xe); break; - case 0xbf: /* 1011 1111 */ f8_outs_1(cpustate, 0xf); break; - - case 0xc0: /* 1100 0000 */ f8_as(cpustate, 0x0); break; - case 0xc1: /* 1100 0001 */ f8_as(cpustate, 0x1); break; - case 0xc2: /* 1100 0010 */ f8_as(cpustate, 0x2); break; - case 0xc3: /* 1100 0011 */ f8_as(cpustate, 0x3); break; - case 0xc4: /* 1100 0100 */ f8_as(cpustate, 0x4); break; - case 0xc5: /* 1100 0101 */ f8_as(cpustate, 0x5); break; - case 0xc6: /* 1100 0110 */ f8_as(cpustate, 0x6); break; - case 0xc7: /* 1100 0111 */ f8_as(cpustate, 0x7); break; - case 0xc8: /* 1100 1000 */ f8_as(cpustate, 0x8); break; - case 0xc9: /* 1100 1001 */ f8_as(cpustate, 0x9); break; - case 0xca: /* 1100 1010 */ f8_as(cpustate, 0xa); break; - case 0xcb: /* 1100 1011 */ f8_as(cpustate, 0xb); break; - case 0xcc: /* 1100 1100 */ f8_as_isar(cpustate); break; + case 0xb4: /* 1011 0100 */ f8_outs_1(cpustate, 0x4); break; + case 0xb5: /* 1011 0101 */ f8_outs_1(cpustate, 0x5); break; + case 0xb6: /* 1011 0110 */ f8_outs_1(cpustate, 0x6); break; + case 0xb7: /* 1011 0111 */ f8_outs_1(cpustate, 0x7); break; + case 0xb8: /* 1011 1000 */ f8_outs_1(cpustate, 0x8); break; + case 0xb9: /* 1011 1001 */ f8_outs_1(cpustate, 0x9); break; + case 0xba: /* 1011 1010 */ f8_outs_1(cpustate, 0xa); break; + case 0xbb: /* 1011 1011 */ f8_outs_1(cpustate, 0xb); break; + case 0xbc: /* 1011 1100 */ f8_outs_1(cpustate, 0xc); break; + case 0xbd: /* 1011 1101 */ f8_outs_1(cpustate, 0xd); break; + case 0xbe: /* 1011 1110 */ f8_outs_1(cpustate, 0xe); break; + case 0xbf: /* 1011 1111 */ f8_outs_1(cpustate, 0xf); break; + + case 0xc0: /* 1100 0000 */ f8_as(cpustate, 0x0); break; + case 0xc1: /* 1100 0001 */ f8_as(cpustate, 0x1); break; + case 0xc2: /* 1100 0010 */ f8_as(cpustate, 0x2); break; + case 0xc3: /* 1100 0011 */ f8_as(cpustate, 0x3); break; + case 0xc4: /* 1100 0100 */ f8_as(cpustate, 0x4); break; + case 0xc5: /* 1100 0101 */ f8_as(cpustate, 0x5); break; + case 0xc6: /* 1100 0110 */ f8_as(cpustate, 0x6); break; + case 0xc7: /* 1100 0111 */ f8_as(cpustate, 0x7); break; + case 0xc8: /* 1100 1000 */ f8_as(cpustate, 0x8); break; + case 0xc9: /* 1100 1001 */ f8_as(cpustate, 0x9); break; + case 0xca: /* 1100 1010 */ f8_as(cpustate, 0xa); break; + case 0xcb: /* 1100 1011 */ f8_as(cpustate, 0xb); break; + case 0xcc: /* 1100 1100 */ f8_as_isar(cpustate); break; case 0xcd: /* 1100 1101 */ f8_as_isar_i(cpustate); break; case 0xce: /* 1100 1110 */ f8_as_isar_d(cpustate); break; - case 0xcf: /* 1100 1111 */ illegal(cpustate); break; + case 0xcf: /* 1100 1111 */ illegal(cpustate); break; case 0xd0: /* 1101 0000 */ f8_asd(cpustate, 0x0); break; case 0xd1: /* 1101 0001 */ f8_asd(cpustate, 0x1); break; @@ -1834,35 +1834,35 @@ static CPU_EXECUTE( f8 ) case 0xde: /* 1101 1110 */ f8_asd_isar_d(cpustate); break; case 0xdf: /* 1101 1111 */ illegal(cpustate); break; - case 0xe0: /* 1110 0000 */ f8_xs(cpustate, 0x0); break; - case 0xe1: /* 1110 0001 */ f8_xs(cpustate, 0x1); break; - case 0xe2: /* 1110 0010 */ f8_xs(cpustate, 0x2); break; - case 0xe3: /* 1110 0011 */ f8_xs(cpustate, 0x3); break; - case 0xe4: /* 1110 0100 */ f8_xs(cpustate, 0x4); break; - case 0xe5: /* 1110 0101 */ f8_xs(cpustate, 0x5); break; - case 0xe6: /* 1110 0110 */ f8_xs(cpustate, 0x6); break; - case 0xe7: /* 1110 0111 */ f8_xs(cpustate, 0x7); break; - case 0xe8: /* 1110 1000 */ f8_xs(cpustate, 0x8); break; - case 0xe9: /* 1110 1001 */ f8_xs(cpustate, 0x9); break; - case 0xea: /* 1110 1010 */ f8_xs(cpustate, 0xa); break; - case 0xeb: /* 1110 1011 */ f8_xs(cpustate, 0xb); break; + case 0xe0: /* 1110 0000 */ f8_xs(cpustate, 0x0); break; + case 0xe1: /* 1110 0001 */ f8_xs(cpustate, 0x1); break; + case 0xe2: /* 1110 0010 */ f8_xs(cpustate, 0x2); break; + case 0xe3: /* 1110 0011 */ f8_xs(cpustate, 0x3); break; + case 0xe4: /* 1110 0100 */ f8_xs(cpustate, 0x4); break; + case 0xe5: /* 1110 0101 */ f8_xs(cpustate, 0x5); break; + case 0xe6: /* 1110 0110 */ f8_xs(cpustate, 0x6); break; + case 0xe7: /* 1110 0111 */ f8_xs(cpustate, 0x7); break; + case 0xe8: /* 1110 1000 */ f8_xs(cpustate, 0x8); break; + case 0xe9: /* 1110 1001 */ f8_xs(cpustate, 0x9); break; + case 0xea: /* 1110 1010 */ f8_xs(cpustate, 0xa); break; + case 0xeb: /* 1110 1011 */ f8_xs(cpustate, 0xb); break; case 0xec: /* 1110 1100 */ f8_xs_isar(cpustate); break; case 0xed: /* 1110 1101 */ f8_xs_isar_i(cpustate); break; case 0xee: /* 1110 1110 */ f8_xs_isar_d(cpustate); break; case 0xef: /* 1110 1111 */ illegal(cpustate); break; - case 0xf0: /* 1111 0000 */ f8_ns(cpustate, 0x0); break; - case 0xf1: /* 1111 0001 */ f8_ns(cpustate, 0x1); break; - case 0xf2: /* 1111 0010 */ f8_ns(cpustate, 0x2); break; - case 0xf3: /* 1111 0011 */ f8_ns(cpustate, 0x3); break; - case 0xf4: /* 1111 0100 */ f8_ns(cpustate, 0x4); break; - case 0xf5: /* 1111 0101 */ f8_ns(cpustate, 0x5); break; - case 0xf6: /* 1111 0110 */ f8_ns(cpustate, 0x6); break; - case 0xf7: /* 1111 0111 */ f8_ns(cpustate, 0x7); break; - case 0xf8: /* 1111 1000 */ f8_ns(cpustate, 0x8); break; - case 0xf9: /* 1111 1001 */ f8_ns(cpustate, 0x9); break; - case 0xfa: /* 1111 1010 */ f8_ns(cpustate, 0xa); break; - case 0xfb: /* 1111 1011 */ f8_ns(cpustate, 0xb); break; + case 0xf0: /* 1111 0000 */ f8_ns(cpustate, 0x0); break; + case 0xf1: /* 1111 0001 */ f8_ns(cpustate, 0x1); break; + case 0xf2: /* 1111 0010 */ f8_ns(cpustate, 0x2); break; + case 0xf3: /* 1111 0011 */ f8_ns(cpustate, 0x3); break; + case 0xf4: /* 1111 0100 */ f8_ns(cpustate, 0x4); break; + case 0xf5: /* 1111 0101 */ f8_ns(cpustate, 0x5); break; + case 0xf6: /* 1111 0110 */ f8_ns(cpustate, 0x6); break; + case 0xf7: /* 1111 0111 */ f8_ns(cpustate, 0x7); break; + case 0xf8: /* 1111 1000 */ f8_ns(cpustate, 0x8); break; + case 0xf9: /* 1111 1001 */ f8_ns(cpustate, 0x9); break; + case 0xfa: /* 1111 1010 */ f8_ns(cpustate, 0xa); break; + case 0xfb: /* 1111 1011 */ f8_ns(cpustate, 0xb); break; case 0xfc: /* 1111 1100 */ f8_ns_isar(cpustate); break; case 0xfd: /* 1111 1101 */ f8_ns_isar_i(cpustate); break; case 0xfe: /* 1111 1110 */ f8_ns_isar_d(cpustate); break; @@ -1916,7 +1916,7 @@ static CPU_SET_INFO( f8 ) cpustate->pc0 = info->i; cpustate->dbus = memory_decrypted_read_byte(cpustate->program, cpustate->pc0); cpustate->pc0 += 1; - break; + break; case CPUINFO_INT_PREVIOUSPC: break; /* TODO? */ case CPUINFO_INT_INPUT_STATE: cpustate->irq_request = info->i; break; case CPUINFO_INT_REGISTER + F8_PC0: @@ -2026,11 +2026,11 @@ CPU_GET_INFO( f8 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 8; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_SP: info->i = cpustate->pc1; break; case CPUINFO_INT_PC: info->i = (cpustate->pc0 - 1) & 0xffff; break; @@ -2042,9 +2042,9 @@ CPU_GET_INFO( f8 ) case CPUINFO_INT_REGISTER + F8_PC1: info->i = cpustate->pc1; break; case CPUINFO_INT_REGISTER + F8_DC0: info->i = cpustate->dc0; break; case CPUINFO_INT_REGISTER + F8_DC1: info->i = cpustate->dc1; break; - case CPUINFO_INT_REGISTER + F8_W: info->i = cpustate->w; break; - case CPUINFO_INT_REGISTER + F8_A: info->i = cpustate->a; break; - case CPUINFO_INT_REGISTER + F8_IS: info->i = cpustate->is; break; + case CPUINFO_INT_REGISTER + F8_W: info->i = cpustate->w; break; + case CPUINFO_INT_REGISTER + F8_A: info->i = cpustate->a; break; + case CPUINFO_INT_REGISTER + F8_IS: info->i = cpustate->is; break; case CPUINFO_INT_REGISTER + F8_J: info->i = cpustate->r[ 9]; break; case CPUINFO_INT_REGISTER + F8_HU: info->i = cpustate->r[10]; break; case CPUINFO_INT_REGISTER + F8_HL: info->i = cpustate->r[11]; break; @@ -2126,7 +2126,7 @@ CPU_GET_INFO( f8 ) case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break; /* --- the following bits of info are returned as NULL-terminated strings --- */ - case DEVINFO_STR_NAME: strcpy(info->s, "F8"); break; + case DEVINFO_STR_NAME: strcpy(info->s, "F8"); break; case DEVINFO_STR_FAMILY: strcpy(info->s, "Fairchild F8"); break; case DEVINFO_STR_VERSION: strcpy(info->s, "1.0"); break; case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break; diff --git a/src/emu/cpu/g65816/g65816.c b/src/emu/cpu/g65816/g65816.c index 8b4d0f46e11..24f8f9fa8cf 100644 --- a/src/emu/cpu/g65816/g65816.c +++ b/src/emu/cpu/g65816/g65816.c @@ -433,11 +433,11 @@ CPU_GET_INFO( g65816 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 24; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + G65816_LINE_IRQ: info->i = LINE_IRQ; break; case CPUINFO_INT_INPUT_STATE + G65816_LINE_NMI: info->i = LINE_NMI; break; diff --git a/src/emu/cpu/g65816/g65816op.h b/src/emu/cpu/g65816/g65816op.h index 78dbbed03f5..c4a3e7f2754 100644 --- a/src/emu/cpu/g65816/g65816op.h +++ b/src/emu/cpu/g65816/g65816op.h @@ -561,28 +561,28 @@ INLINE void g65816i_check_maskable_interrupt(g65816i_cpu_struct *cpustate) #define OPER_8_IMM(cpustate) read_8_IMM(EA_IMM8(cpustate)) -#define OPER_8_D(cpustate) read_8_D(EA_D(cpustate)) -#define OPER_8_A(cpustate) read_8_A(EA_A(cpustate)) -#define OPER_8_AL(cpustate) read_8_AL(EA_AL(cpustate)) -#define OPER_8_DX(cpustate) read_8_DX(EA_DX(cpustate)) -#define OPER_8_DY(cpustate) read_8_DY(EA_DY(cpustate)) -#define OPER_8_AX(cpustate) read_8_AX(EA_AX(cpustate)) +#define OPER_8_D(cpustate) read_8_D(EA_D(cpustate)) +#define OPER_8_A(cpustate) read_8_A(EA_A(cpustate)) +#define OPER_8_AL(cpustate) read_8_AL(EA_AL(cpustate)) +#define OPER_8_DX(cpustate) read_8_DX(EA_DX(cpustate)) +#define OPER_8_DY(cpustate) read_8_DY(EA_DY(cpustate)) +#define OPER_8_AX(cpustate) read_8_AX(EA_AX(cpustate)) #define OPER_8_ALX(cpustate) read_8_ALX(EA_ALX(cpustate)) -#define OPER_8_AY(cpustate) read_8_AY(EA_AY(cpustate)) -#define OPER_8_DI(cpustate) read_8_DI(EA_DI(cpustate)) +#define OPER_8_AY(cpustate) read_8_AY(EA_AY(cpustate)) +#define OPER_8_DI(cpustate) read_8_DI(EA_DI(cpustate)) #define OPER_8_DLI(cpustate) read_8_DLI(EA_DLI(cpustate)) -#define OPER_8_AI(cpustate) read_8_AI(EA_AI(cpustate)) +#define OPER_8_AI(cpustate) read_8_AI(EA_AI(cpustate)) #define OPER_8_ALI(cpustate) read_8_ALI(EA_ALI(cpustate)) #define OPER_8_DXI(cpustate) read_8_DXI(EA_DXI(cpustate)) #define OPER_8_DIY(cpustate) read_8_DIY(EA_DIY(cpustate)) #define OPER_8_DLIY(cpustate) read_8_DLIY(EA_DLIY(cpustate)) #define OPER_8_AXI(cpustate) read_8_AXI(EA_AXI(cpustate)) -#define OPER_8_S(cpustate) read_8_S(EA_S(cpustate)) +#define OPER_8_S(cpustate) read_8_S(EA_S(cpustate)) #define OPER_8_SIY(cpustate) read_8_SIY(EA_SIY(cpustate)) #define OPER_16_IMM(cpustate) read_16_IMM(EA_IMM16(cpustate)) -#define OPER_16_D(cpustate) read_16_D(EA_D(cpustate)) -#define OPER_16_A(cpustate) read_16_A(EA_A(cpustate)) +#define OPER_16_D(cpustate) read_16_D(EA_D(cpustate)) +#define OPER_16_A(cpustate) read_16_A(EA_A(cpustate)) #define OPER_16_AL(cpustate) read_16_AL(EA_AL(cpustate)) #define OPER_16_DX(cpustate) read_16_DX(EA_DX(cpustate)) #define OPER_16_DY(cpustate) read_16_DY(EA_DY(cpustate)) @@ -597,12 +597,12 @@ INLINE void g65816i_check_maskable_interrupt(g65816i_cpu_struct *cpustate) #define OPER_16_DIY(cpustate) read_16_DIY(EA_DIY(cpustate)) #define OPER_16_DLIY(cpustate) read_16_DLIY(EA_DLIY(cpustate)) #define OPER_16_AXI(cpustate) read_16_AXI(EA_AXI(cpustate)) -#define OPER_16_S(cpustate) read_16_S(EA_S(cpustate)) +#define OPER_16_S(cpustate) read_16_S(EA_S(cpustate)) #define OPER_16_SIY(cpustate) read_16_SIY(EA_SIY(cpustate)) #define OPER_24_IMM(cpustate) read_24_IMM(EA_IMM24(cpustate)) -#define OPER_24_D(cpustate) read_24_D(EA_D(cpustate)) -#define OPER_24_A(cpustate) read_24_A(EA_A(cpustate)) +#define OPER_24_D(cpustate) read_24_D(EA_D(cpustate)) +#define OPER_24_A(cpustate) read_24_A(EA_A(cpustate)) #define OPER_24_AL(cpustate) read_24_AL(EA_AL(cpustate)) #define OPER_24_DX(cpustate) read_24_DX(EA_DX(cpustate)) #define OPER_24_DY(cpustate) read_24_DY(EA_DY(cpustate)) @@ -617,7 +617,7 @@ INLINE void g65816i_check_maskable_interrupt(g65816i_cpu_struct *cpustate) #define OPER_24_DIY(cpustate) read_24_DIY(EA_DIY(cpustate)) #define OPER_24_DLIY(cpustate) read_24_DLIY(EA_DLIY(cpustate)) #define OPER_24_AXI(cpustate) read_24_AXI(EA_AXI(cpustate)) -#define OPER_24_S(cpustate) read_24_S(EA_S(cpustate)) +#define OPER_24_S(cpustate) read_24_S(EA_S(cpustate)) #define OPER_24_SIY(cpustate) read_24_SIY(EA_SIY(cpustate)) INLINE uint EA_IMM8(g65816i_cpu_struct *cpustate) {REGISTER_PC += 1; return REGISTER_PB | MAKE_UINT_16(REGISTER_PC-1);} @@ -1899,7 +1899,7 @@ INLINE uint EA_SIY(g65816i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_ #define OP_TSB(MODE) \ CLK(CLK_OP + CLK_RMW16 + CLK_W_##MODE); \ DST = EA_##MODE(cpustate); \ - FLAG_Z = read_16_##MODE(DST); \ + FLAG_Z = read_16_##MODE(DST); \ write_16_##MODE(DST, FLAG_Z | REGISTER_A); \ FLAG_Z &= REGISTER_A #endif diff --git a/src/emu/cpu/h6280/h6280.c b/src/emu/cpu/h6280/h6280.c index 0d9237b9d29..3032fb8046d 100644 --- a/src/emu/cpu/h6280/h6280.c +++ b/src/emu/cpu/h6280/h6280.c @@ -401,7 +401,7 @@ static CPU_SET_INFO( h6280 ) case CPUINFO_INT_REGISTER + H6280_X: X = info->i; break; case CPUINFO_INT_REGISTER + H6280_Y: Y = info->i; break; case CPUINFO_INT_REGISTER + H6280_IRQ_MASK: cpustate->irq_mask = info->i; CHECK_IRQ_LINES; break; - case CPUINFO_INT_REGISTER + H6280_TIMER_STATE: cpustate->timer_status = info->i; break; + case CPUINFO_INT_REGISTER + H6280_TIMER_STATE: cpustate->timer_status = info->i; break; case CPUINFO_INT_REGISTER + H6280_NMI_STATE: set_irq_line( cpustate, INPUT_LINE_NMI, info->i ); break; case CPUINFO_INT_REGISTER + H6280_IRQ1_STATE: set_irq_line( cpustate, 0, info->i ); break; case CPUINFO_INT_REGISTER + H6280_IRQ2_STATE: set_irq_line( cpustate, 1, info->i ); break; @@ -446,16 +446,16 @@ CPU_GET_INFO( h6280 ) case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_LOGADDR_WIDTH_PROGRAM: info->i = 16; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 2; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 2; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + 0: info->i = cpustate->irq_state[0]; break; case CPUINFO_INT_INPUT_STATE + 1: info->i = cpustate->irq_state[1]; break; case CPUINFO_INT_INPUT_STATE + 2: info->i = cpustate->irq_state[2]; break; - case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_state; break; + case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_state; break; case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->ppc.d; break; diff --git a/src/emu/cpu/h6280/h6280ops.h b/src/emu/cpu/h6280/h6280ops.h index b58e1cfad61..d9decec0ec7 100644 --- a/src/emu/cpu/h6280/h6280ops.h +++ b/src/emu/cpu/h6280/h6280ops.h @@ -80,7 +80,7 @@ PCH = RDMEM(cpustate, (vector+1)); \ } -#define CHECK_AND_TAKE_IRQ_LINES \ +#define CHECK_AND_TAKE_IRQ_LINES \ if ( cpustate->nmi_state != CLEAR_LINE ) { \ cpustate->nmi_state = CLEAR_LINE; \ DO_INTERRUPT(H6280_NMI_VEC); \ @@ -90,7 +90,7 @@ if ( cpustate->irq_state[2] != CLEAR_LINE && \ !(cpustate->irq_mask & 0x4) ) \ { \ - DO_INTERRUPT(H6280_TIMER_VEC); \ + DO_INTERRUPT(H6280_TIMER_VEC); \ } else \ if ( cpustate->irq_state[0] != CLEAR_LINE && \ !(cpustate->irq_mask & 0x2) ) \ @@ -139,13 +139,13 @@ INLINE void WRMEM(h6280_Regs* cpustate, offs_t addr, UINT8 data) { /*************************************************************** * RDMEMZ read memory - zero page ***************************************************************/ -#define RDMEMZ(addr) \ +#define RDMEMZ(addr) \ memory_read_byte_8le(cpustate->program, (cpustate->mmr[1] << 13) | ((addr)&0x1fff)); /*************************************************************** * WRMEMZ write memory - zero page ***************************************************************/ -#define WRMEMZ(addr,data) \ +#define WRMEMZ(addr,data) \ memory_write_byte_8le(cpustate->program, (cpustate->mmr[1] << 13) | ((addr)&0x1fff),data); /*************************************************************** @@ -298,7 +298,7 @@ INLINE void WRMEM(h6280_Regs* cpustate, offs_t addr, UINT8 data) { #define EA_IND \ EA_ABS; \ tmp = RDMEM(cpustate, EAD); \ - EAD++; \ + EAD++; \ EAH = RDMEM(cpustate, EAD); \ EAL = tmp @@ -309,7 +309,7 @@ INLINE void WRMEM(h6280_Regs* cpustate, offs_t addr, UINT8 data) { EA_ABS; \ EAD+=X; \ tmp = RDMEM(cpustate, EAD); \ - EAD++; \ + EAD++; \ EAH = RDMEM(cpustate, EAD); \ EAL = tmp @@ -374,7 +374,7 @@ INLINE void WRMEM(h6280_Regs* cpustate, offs_t addr, UINT8 data) { /* 6280 ******************************************************** * ADC Add with carry ***************************************************************/ -#define TADC \ +#define TADC \ { \ int tflagtemp; \ CLEAR_T; \ @@ -453,7 +453,7 @@ INLINE void WRMEM(h6280_Regs* cpustate, offs_t addr, UINT8 data) { /* 6280 ******************************************************** * AND Logical and ***************************************************************/ -#define TAND \ +#define TAND \ { \ int tflagtemp; \ CLEAR_T; \ @@ -562,7 +562,7 @@ INLINE void WRMEM(h6280_Regs* cpustate, offs_t addr, UINT8 data) { PUSH(PCL); \ PUSH(P); \ P = (P & ~_fD) | _fI; \ - PCL = RDMEM(cpustate, H6280_IRQ2_VEC); \ + PCL = RDMEM(cpustate, H6280_IRQ2_VEC); \ PCH = RDMEM(cpustate, H6280_IRQ2_VEC+1); \ /* 6280 ******************************************************** @@ -681,7 +681,7 @@ INLINE void WRMEM(h6280_Regs* cpustate, offs_t addr, UINT8 data) { ***************************************************************/ #define DEC \ CLEAR_T; \ - tmp = (UINT8)(tmp-1); \ + tmp = (UINT8)(tmp-1); \ SET_NZ(tmp) /* 6280 ******************************************************** @@ -703,7 +703,7 @@ INLINE void WRMEM(h6280_Regs* cpustate, offs_t addr, UINT8 data) { /* 6280 ******************************************************** * EOR Logical exclusive or ***************************************************************/ -#define TEOR \ +#define TEOR \ { \ int tflagtemp; \ CLEAR_T; \ @@ -735,7 +735,7 @@ INLINE void WRMEM(h6280_Regs* cpustate, offs_t addr, UINT8 data) { ***************************************************************/ #define INC \ CLEAR_T; \ - tmp = (UINT8)(tmp+1); \ + tmp = (UINT8)(tmp+1); \ SET_NZ(tmp) /* 6280 ******************************************************** @@ -817,7 +817,7 @@ INLINE void WRMEM(h6280_Regs* cpustate, offs_t addr, UINT8 data) { * ORA Logical inclusive or ***************************************************************/ -#define TORA \ +#define TORA \ { \ int tflagtemp; \ CLEAR_T; \ @@ -888,7 +888,7 @@ INLINE void WRMEM(h6280_Regs* cpustate, offs_t addr, UINT8 data) { #else #define PLP \ - PULL(P); \ + PULL(P); \ P |= _fB; \ CHECK_IRQ_LINES #endif @@ -1173,12 +1173,12 @@ INLINE void WRMEM(h6280_Regs* cpustate, offs_t addr, UINT8 data) { to =RDMEMW(PCW+2); \ length=RDMEMW(PCW+4); \ PCW+=6; \ - alternate=0; \ + alternate=0; \ if (!length) length = 0x10000; \ H6280_CYCLES( ((6 * length) + 17) ); \ - while ((length--) != 0) { \ - WRMEM(cpustate, to,RDMEM(cpustate, from+alternate)); \ - to++; \ + while ((length--) != 0) { \ + WRMEM(cpustate, to,RDMEM(cpustate, from+alternate)); \ + to++; \ alternate ^= 1; \ } @@ -1223,9 +1223,9 @@ INLINE void WRMEM(h6280_Regs* cpustate, offs_t addr, UINT8 data) { PCW+=6; \ if (!length) length = 0x10000; \ H6280_CYCLES( ((6 * length) + 17) ); \ - while ((length--) != 0) { \ - WRMEM(cpustate, to,RDMEM(cpustate, from)); \ - to--; \ + while ((length--) != 0) { \ + WRMEM(cpustate, to,RDMEM(cpustate, from)); \ + to--; \ from--; \ } @@ -1238,10 +1238,10 @@ INLINE void WRMEM(h6280_Regs* cpustate, offs_t addr, UINT8 data) { to =RDMEMW(PCW+2); \ length=RDMEMW(PCW+4); \ PCW+=6; \ - alternate=0; \ + alternate=0; \ if (!length) length = 0x10000; \ H6280_CYCLES( ((6 * length) + 17) ); \ - while ((length--) != 0) { \ + while ((length--) != 0) { \ WRMEM(cpustate, to+alternate,RDMEM(cpustate, from)); \ from++; \ alternate ^= 1; \ @@ -1258,9 +1258,9 @@ INLINE void WRMEM(h6280_Regs* cpustate, offs_t addr, UINT8 data) { PCW+=6; \ if (!length) length = 0x10000; \ H6280_CYCLES( ((6 * length) + 17) ); \ - while ((length--) != 0) { \ - WRMEM(cpustate, to,RDMEM(cpustate, from)); \ - to++; \ + while ((length--) != 0) { \ + WRMEM(cpustate, to,RDMEM(cpustate, from)); \ + to++; \ from++; \ } @@ -1275,8 +1275,8 @@ INLINE void WRMEM(h6280_Regs* cpustate, offs_t addr, UINT8 data) { PCW+=6; \ if (!length) length = 0x10000; \ H6280_CYCLES( ((6 * length) + 17) ); \ - while ((length--) != 0) { \ - WRMEM(cpustate, to,RDMEM(cpustate, from)); \ + while ((length--) != 0) { \ + WRMEM(cpustate, to,RDMEM(cpustate, from)); \ from++; \ } @@ -1298,7 +1298,7 @@ INLINE void WRMEM(h6280_Regs* cpustate, offs_t addr, UINT8 data) { /* 6280 ******************************************************** * TRB Test and reset bits ***************************************************************/ -#define TRB \ +#define TRB \ CLEAR_T; \ P = (P & ~(_fN|_fV|_fT|_fZ)) \ | ((tmp&0x80) ? _fN:0) \ diff --git a/src/emu/cpu/h6280/tblh6280.c b/src/emu/cpu/h6280/tblh6280.c index 500f1df6c29..1795741c4ba 100644 --- a/src/emu/cpu/h6280/tblh6280.c +++ b/src/emu/cpu/h6280/tblh6280.c @@ -24,7 +24,7 @@ OP(_000) { H6280_CYCLES(8); BRK; } // 8 BRK OP(_020) { H6280_CYCLES(7); EA_ABS; JSR; } // 7 JSR ABS OP(_040) { H6280_CYCLES(7); RTI; } // 7 RTI OP(_060) { H6280_CYCLES(7); RTS; } // 7 RTS -OP(_080) { int tmp; BRA(1); } // 4 BRA REL +OP(_080) { int tmp; BRA(1); } // 4 BRA REL OP(_0a0) { int tmp; H6280_CYCLES(2); RD_IMM; LDY; } // 2 LDY IMM OP(_0c0) { int tmp; H6280_CYCLES(2); RD_IMM; CPY; } // 2 CPY IMM OP(_0e0) { int tmp; H6280_CYCLES(2); RD_IMM; CPX; } // 2 CPX IMM @@ -84,9 +84,9 @@ OP(_0c3) { int to,from,length; TDD; } // 6*l+17 TDD XFER OP(_0e3) { int to,from,length,alternate; TIA; } // 6*l+17 TIA XFER OP(_013) { int tmp; H6280_CYCLES(5); RD_IMM; ST1; } // 4 + 1 penalty cycle ST1 -OP(_033) { H6280_CYCLES(2); NOP; } // 2 NOP +OP(_033) { H6280_CYCLES(2); NOP; } // 2 NOP OP(_053) { int tmp; H6280_CYCLES(5); RD_IMM; TAM; } // 5 TAM IMM -OP(_073) { int to,from,length; TII; } // 6*l+17 TII XFER +OP(_073) { int to,from,length; TII; } // 6*l+17 TII XFER OP(_093) { int tmp,tmp2; H6280_CYCLES(8); RD_IMM2; RD_ABS; TST; } // 8 TST IMM,ABS OP(_0b3) { int tmp,tmp2; H6280_CYCLES(8); RD_IMM2; RD_ABX; TST; } // 8 TST IMM,ABX OP(_0d3) { int to,from,length; TIN; } // 6*l+17 TIN XFER diff --git a/src/emu/cpu/h83002/h8_16.c b/src/emu/cpu/h83002/h8_16.c index ffee354d892..9020a655795 100644 --- a/src/emu/cpu/h83002/h8_16.c +++ b/src/emu/cpu/h83002/h8_16.c @@ -388,8 +388,8 @@ static CPU_SET_INFO( h8 ) h83xx_state *h8 = get_safe_token(device); switch(state) { - case CPUINFO_INT_PC: h8->pc = info->i; break; - case CPUINFO_INT_REGISTER + H8_PC: h8->pc = info->i; break; + case CPUINFO_INT_PC: h8->pc = info->i; break; + case CPUINFO_INT_REGISTER + H8_PC: h8->pc = info->i; break; case CPUINFO_INT_REGISTER + H8_CCR: h8_set_ccr(h8, info->i); break; case CPUINFO_INT_REGISTER + H8_E0: h8->regs[0] = info->i; break; diff --git a/src/emu/cpu/h83002/h8_8.c b/src/emu/cpu/h83002/h8_8.c index 2aadd272528..2a083196ef2 100644 --- a/src/emu/cpu/h83002/h8_8.c +++ b/src/emu/cpu/h83002/h8_8.c @@ -470,8 +470,8 @@ static CPU_SET_INFO( h8 ) h83xx_state *h8 = get_safe_token(device); switch(state) { - case CPUINFO_INT_PC: h8->pc = info->i; break; - case CPUINFO_INT_REGISTER + H8_PC: h8->pc = info->i; break; + case CPUINFO_INT_PC: h8->pc = info->i; break; + case CPUINFO_INT_REGISTER + H8_PC: h8->pc = info->i; break; case CPUINFO_INT_REGISTER + H8_CCR: h8_set_ccr(h8, info->i); break; case CPUINFO_INT_REGISTER + H8_E0: h8->regs[0] = info->i; break; @@ -517,7 +517,7 @@ static READ8_HANDLER( h8330_itu_r ) case 0x8d: // serial Rx 1 val = memory_read_byte(h8->io, H8_SERIAL_1); break; - case 0x92: // FRC H + case 0x92: // FRC H frc = cpu_get_total_cycles(h8->device) / divider[h8->per_regs[0x96]]; frc %= 65536; return frc>>8; @@ -527,10 +527,10 @@ static READ8_HANDLER( h8330_itu_r ) frc %= 65536; return frc&0xff; break; - case 0xb2: // port 1 data + case 0xb2: // port 1 data val = memory_read_byte(h8->io, H8_PORT_1); break; - case 0xb3: // port 2 data + case 0xb3: // port 2 data val = memory_read_byte(h8->io, H8_PORT_2); break; case 0xb6: // port 3 data @@ -583,10 +583,10 @@ static WRITE8_HANDLER( h8330_itu_w ) case 0x8b: // serial Tx 1 memory_write_byte(h8->io, H8_SERIAL_1, data); break; - case 0xb2: // port 1 data + case 0xb2: // port 1 data memory_write_byte(h8->io, H8_PORT_1, data); break; - case 0xb3: // port 2 data + case 0xb3: // port 2 data memory_write_byte(h8->io, H8_PORT_2, data); break; case 0xb6: // port 3 data diff --git a/src/emu/cpu/h83002/h8ops.h b/src/emu/cpu/h83002/h8ops.h index 1858f6657b7..14dbda70735 100644 --- a/src/emu/cpu/h83002/h8ops.h +++ b/src/emu/cpu/h83002/h8ops.h @@ -112,7 +112,7 @@ static CPU_EXECUTE(h8) h8->cyccnt = cycles; - h8_check_irqs(h8); + h8_check_irqs(h8); while ((h8->cyccnt > 0) && (!h8->h8err)) { diff --git a/src/emu/cpu/h83002/h8periph.c b/src/emu/cpu/h83002/h8periph.c index 1a676ce16d7..29bc6e7382f 100644 --- a/src/emu/cpu/h83002/h8periph.c +++ b/src/emu/cpu/h83002/h8periph.c @@ -364,10 +364,10 @@ UINT8 h8_register_read8(h83xx_state *h8, UINT32 address) case 0xe8: // adc status val = 0x80; break; - case 0xc7: // port 4 data + case 0xc7: // port 4 data val = memory_read_byte(h8->io, H8_PORT_4); break; - case 0xcb: // port 6 data + case 0xcb: // port 6 data val = memory_read_byte(h8->io, H8_PORT_6); break; case 0xce: // port 7 data @@ -426,7 +426,7 @@ void h8_register_write8(h83xx_state *h8, UINT32 address, UINT8 val) case 0xc7: memory_write_byte(h8->io, H8_PORT_4, val); break; - case 0xcb: // port 6 data + case 0xcb: // port 6 data memory_write_byte(h8->io, H8_PORT_6, val); break; case 0xce: // port 7 data @@ -661,10 +661,10 @@ UINT8 h8_3007_register_read8(h83xx_state *h8, UINT32 address) val = 0x80; break; - case 0xd3: // port 4 data + case 0xd3: // port 4 data val = memory_read_byte(h8->io, H8_PORT_4); break; - case 0xd5: // port 6 data + case 0xd5: // port 6 data val = memory_read_byte(h8->io, H8_PORT_6); break; case 0xd6: // port 7 data @@ -745,7 +745,7 @@ UINT8 h8_3007_register1_read8(h83xx_state *h8, UINT32 address) switch (address) { case 0xfee012: return h8->per_regs[0xF2]; // SYSCR - case 0xfee016: return h8_ISR_r(h8); // ISR + case 0xfee016: return h8_ISR_r(h8); // ISR case 0xfee018: return h8->per_regs[0xF8]; // IPRA } @@ -758,7 +758,7 @@ void h8_3007_register1_write8(h83xx_state *h8, UINT32 address, UINT8 val) switch (address) { case 0xfee012: h8->per_regs[0xF2] = val; return; // SYSCR - case 0xfee016: h8_ISR_w(h8, val); return; // ISR + case 0xfee016: h8_ISR_w(h8, val); return; // ISR case 0xfee018: h8->per_regs[0xF8] = val; return; // IPRA } logerror("cpu '%s' (PC=%08X): unmapped I/O(1) byte write to %08X = %02X\n",h8->device->tag,h8->pc,address,val); diff --git a/src/emu/cpu/hd6309/6309ops.c b/src/emu/cpu/hd6309/6309ops.c index 8e40c3ff5d8..b4b33999390 100644 --- a/src/emu/cpu/hd6309/6309ops.c +++ b/src/emu/cpu/hd6309/6309ops.c @@ -5310,10 +5310,10 @@ OP_HANDLER( pref10 ) case 0x35: orr(m68_state); break; case 0x36: eorr(m68_state); break; case 0x37: cmpr(m68_state); break; - case 0x38: pshsw(m68_state); break; - case 0x39: pulsw(m68_state); break; - case 0x3a: pshuw(m68_state); break; - case 0x3b: puluw(m68_state); break; + case 0x38: pshsw(m68_state); break; + case 0x39: pulsw(m68_state); break; + case 0x3a: pshuw(m68_state); break; + case 0x3b: puluw(m68_state); break; case 0x3f: swi2(m68_state); break; case 0x40: negd(m68_state); break; @@ -5437,17 +5437,17 @@ OP_HANDLER( pref11 ) switch( ireg2 ) { case 0x30: band(m68_state); break; - case 0x31: biand(m68_state); break; + case 0x31: biand(m68_state); break; case 0x32: bor(m68_state); break; case 0x33: bior(m68_state); break; case 0x34: beor(m68_state); break; - case 0x35: bieor(m68_state); break; + case 0x35: bieor(m68_state); break; case 0x36: ldbt(m68_state); break; case 0x37: stbt(m68_state); break; - case 0x38: tfmpp(m68_state); break; /* Timing for TFM is actually 6+3n. */ - case 0x39: tfmmm(m68_state); break; /* To avoid saving the state, I decided */ - case 0x3a: tfmpc(m68_state); break; /* to push the initial 6 cycles to the end */ - case 0x3b: tfmcp(m68_state); break; /* We will soon see how this fairs! */ + case 0x38: tfmpp(m68_state); break; /* Timing for TFM is actually 6+3n. */ + case 0x39: tfmmm(m68_state); break; /* To avoid saving the state, I decided */ + case 0x3a: tfmpc(m68_state); break; /* to push the initial 6 cycles to the end */ + case 0x3b: tfmcp(m68_state); break; /* We will soon see how this fairs! */ case 0x3c: bitmd_im(m68_state); break; case 0x3d: ldmd_im(m68_state); break; case 0x3f: swi3(m68_state); break; diff --git a/src/emu/cpu/hd6309/hd6309.c b/src/emu/cpu/hd6309/hd6309.c index de571cd9390..7e710a2f511 100644 --- a/src/emu/cpu/hd6309/hd6309.c +++ b/src/emu/cpu/hd6309/hd6309.c @@ -142,7 +142,7 @@ struct _m68_state_t UINT8 nmi_state; UINT8 dummy_byte; - UINT8 *regTable[4]; + UINT8 *regTable[4]; UINT8 const *cycle_counts_page0; UINT8 const *cycle_counts_page01; @@ -223,8 +223,8 @@ INLINE void fetch_effective_address( m68_state_t *m68_state ); #define EAD m68_state->ea.d #define EAP m68_state->ea -#define M6809_CWAI 8 /* set when CWAI is waiting for an interrupt */ -#define M6809_SYNC 16 /* set when SYNC is waiting for an interrupt */ +#define M6809_CWAI 8 /* set when CWAI is waiting for an interrupt */ +#define M6809_SYNC 16 /* set when SYNC is waiting for an interrupt */ #define M6809_LDS 32 /* set when LDS occured at least once */ /****************************************************************************/ @@ -268,7 +268,7 @@ INLINE void fetch_effective_address( m68_state_t *m68_state ); #define CLR_HNZVC CC&=~(CC_H|CC_N|CC_Z|CC_V|CC_C) #define CLR_NZV CC&=~(CC_N|CC_Z|CC_V) -#define CLR_NZ CC&=~(CC_N|CC_Z) +#define CLR_NZ CC&=~(CC_N|CC_Z) #define CLR_HNZC CC&=~(CC_H|CC_N|CC_Z|CC_C) #define CLR_NZVC CC&=~(CC_N|CC_Z|CC_V|CC_C) #define CLR_Z CC&=~(CC_Z) @@ -679,84 +679,84 @@ static CPU_EXECUTE( hd6309 ) /* NS 970908 */ case 0x0f: clr_di(m68_state); break; case 0x10: pref10(m68_state); break; case 0x11: pref11(m68_state); break; - case 0x12: nop(m68_state); break; - case 0x13: sync(m68_state); break; - case 0x14: sexw(m68_state); break; + case 0x12: nop(m68_state); break; + case 0x13: sync(m68_state); break; + case 0x14: sexw(m68_state); break; case 0x15: IIError(m68_state); break; - case 0x16: lbra(m68_state); break; - case 0x17: lbsr(m68_state); break; + case 0x16: lbra(m68_state); break; + case 0x17: lbsr(m68_state); break; case 0x18: IIError(m68_state); break; - case 0x19: daa(m68_state); break; - case 0x1a: orcc(m68_state); break; + case 0x19: daa(m68_state); break; + case 0x1a: orcc(m68_state); break; case 0x1b: IIError(m68_state); break; case 0x1c: andcc(m68_state); break; - case 0x1d: sex(m68_state); break; - case 0x1e: exg(m68_state); break; - case 0x1f: tfr(m68_state); break; - case 0x20: bra(m68_state); break; - case 0x21: brn(m68_state); break; - case 0x22: bhi(m68_state); break; - case 0x23: bls(m68_state); break; - case 0x24: bcc(m68_state); break; - case 0x25: bcs(m68_state); break; - case 0x26: bne(m68_state); break; - case 0x27: beq(m68_state); break; - case 0x28: bvc(m68_state); break; - case 0x29: bvs(m68_state); break; - case 0x2a: bpl(m68_state); break; - case 0x2b: bmi(m68_state); break; - case 0x2c: bge(m68_state); break; - case 0x2d: blt(m68_state); break; - case 0x2e: bgt(m68_state); break; - case 0x2f: ble(m68_state); break; - case 0x30: leax(m68_state); break; - case 0x31: leay(m68_state); break; - case 0x32: leas(m68_state); break; - case 0x33: leau(m68_state); break; - case 0x34: pshs(m68_state); break; - case 0x35: puls(m68_state); break; - case 0x36: pshu(m68_state); break; - case 0x37: pulu(m68_state); break; + case 0x1d: sex(m68_state); break; + case 0x1e: exg(m68_state); break; + case 0x1f: tfr(m68_state); break; + case 0x20: bra(m68_state); break; + case 0x21: brn(m68_state); break; + case 0x22: bhi(m68_state); break; + case 0x23: bls(m68_state); break; + case 0x24: bcc(m68_state); break; + case 0x25: bcs(m68_state); break; + case 0x26: bne(m68_state); break; + case 0x27: beq(m68_state); break; + case 0x28: bvc(m68_state); break; + case 0x29: bvs(m68_state); break; + case 0x2a: bpl(m68_state); break; + case 0x2b: bmi(m68_state); break; + case 0x2c: bge(m68_state); break; + case 0x2d: blt(m68_state); break; + case 0x2e: bgt(m68_state); break; + case 0x2f: ble(m68_state); break; + case 0x30: leax(m68_state); break; + case 0x31: leay(m68_state); break; + case 0x32: leas(m68_state); break; + case 0x33: leau(m68_state); break; + case 0x34: pshs(m68_state); break; + case 0x35: puls(m68_state); break; + case 0x36: pshu(m68_state); break; + case 0x37: pulu(m68_state); break; case 0x38: IIError(m68_state); break; - case 0x39: rts(m68_state); break; - case 0x3a: abx(m68_state); break; - case 0x3b: rti(m68_state); break; + case 0x39: rts(m68_state); break; + case 0x3a: abx(m68_state); break; + case 0x3b: rti(m68_state); break; case 0x3c: cwai(m68_state); break; case 0x3d: mul(m68_state); break; case 0x3e: IIError(m68_state); break; case 0x3f: swi(m68_state); break; - case 0x40: nega(m68_state); break; + case 0x40: nega(m68_state); break; case 0x41: IIError(m68_state); break; case 0x42: IIError(m68_state); break; - case 0x43: coma(m68_state); break; - case 0x44: lsra(m68_state); break; + case 0x43: coma(m68_state); break; + case 0x44: lsra(m68_state); break; case 0x45: IIError(m68_state); break; - case 0x46: rora(m68_state); break; - case 0x47: asra(m68_state); break; - case 0x48: asla(m68_state); break; - case 0x49: rola(m68_state); break; - case 0x4a: deca(m68_state); break; + case 0x46: rora(m68_state); break; + case 0x47: asra(m68_state); break; + case 0x48: asla(m68_state); break; + case 0x49: rola(m68_state); break; + case 0x4a: deca(m68_state); break; case 0x4b: IIError(m68_state); break; - case 0x4c: inca(m68_state); break; - case 0x4d: tsta(m68_state); break; + case 0x4c: inca(m68_state); break; + case 0x4d: tsta(m68_state); break; case 0x4e: IIError(m68_state); break; - case 0x4f: clra(m68_state); break; - case 0x50: negb(m68_state); break; + case 0x4f: clra(m68_state); break; + case 0x50: negb(m68_state); break; case 0x51: IIError(m68_state); break; case 0x52: IIError(m68_state); break; - case 0x53: comb(m68_state); break; - case 0x54: lsrb(m68_state); break; + case 0x53: comb(m68_state); break; + case 0x54: lsrb(m68_state); break; case 0x55: IIError(m68_state); break; - case 0x56: rorb(m68_state); break; - case 0x57: asrb(m68_state); break; - case 0x58: aslb(m68_state); break; - case 0x59: rolb(m68_state); break; - case 0x5a: decb(m68_state); break; + case 0x56: rorb(m68_state); break; + case 0x57: asrb(m68_state); break; + case 0x58: aslb(m68_state); break; + case 0x59: rolb(m68_state); break; + case 0x5a: decb(m68_state); break; case 0x5b: IIError(m68_state); break; - case 0x5c: incb(m68_state); break; - case 0x5d: tstb(m68_state); break; + case 0x5c: incb(m68_state); break; + case 0x5d: tstb(m68_state); break; case 0x5e: IIError(m68_state); break; - case 0x5f: clrb(m68_state); break; + case 0x5f: clrb(m68_state); break; case 0x60: neg_ix(m68_state); break; case 0x61: oim_ix(m68_state); break; case 0x62: aim_ix(m68_state); break; @@ -796,13 +796,13 @@ static CPU_EXECUTE( hd6309 ) /* NS 970908 */ case 0x84: anda_im(m68_state); break; case 0x85: bita_im(m68_state); break; case 0x86: lda_im(m68_state); break; - case 0x87: IIError(m68_state); break; + case 0x87: IIError(m68_state); break; case 0x88: eora_im(m68_state); break; case 0x89: adca_im(m68_state); break; case 0x8a: ora_im(m68_state); break; case 0x8b: adda_im(m68_state); break; case 0x8c: cmpx_im(m68_state); break; - case 0x8d: bsr(m68_state); break; + case 0x8d: bsr(m68_state); break; case 0x8e: ldx_im(m68_state); break; case 0x8f: IIError(m68_state); break; case 0x90: suba_di(m68_state); break; @@ -860,7 +860,7 @@ static CPU_EXECUTE( hd6309 ) /* NS 970908 */ case 0xc4: andb_im(m68_state); break; case 0xc5: bitb_im(m68_state); break; case 0xc6: ldb_im(m68_state); break; - case 0xc7: IIError(m68_state); break; + case 0xc7: IIError(m68_state); break; case 0xc8: eorb_im(m68_state); break; case 0xc9: adcb_im(m68_state); break; case 0xca: orb_im(m68_state); break; @@ -1085,13 +1085,13 @@ INLINE void fetch_effective_address( m68_state_t *m68_state ) case 0x86: EA=X+SIGNED(A); break; case 0x87: EA=X+SIGNED(E); break; case 0x88: IMMBYTE(EA); EA=X+SIGNED(EA); break; - case 0x89: IMMWORD(EAP); EA+=X; break; + case 0x89: IMMWORD(EAP); EA+=X; break; case 0x8a: EA=X+SIGNED(F); break; case 0x8b: EA=X+D; break; case 0x8c: IMMBYTE(EA); EA=PC+SIGNED(EA); break; - case 0x8d: IMMWORD(EAP); EA+=PC; break; + case 0x8d: IMMWORD(EAP); EA+=PC; break; case 0x8e: EA=X+W; break; - case 0x8f: EA=W; break; + case 0x8f: EA=W; break; case 0x90: EA=W; EAD=RM16(m68_state, EAD); break; case 0x91: EA=X; X+=2; EAD=RM16(m68_state, EAD); break; @@ -1102,13 +1102,13 @@ INLINE void fetch_effective_address( m68_state_t *m68_state ) case 0x96: EA=X+SIGNED(A); EAD=RM16(m68_state, EAD); break; case 0x97: EA=X+SIGNED(E); EAD=RM16(m68_state, EAD); break; case 0x98: IMMBYTE(EA); EA=X+SIGNED(EA); EAD=RM16(m68_state, EAD); break; - case 0x99: IMMWORD(EAP); EA+=X; EAD=RM16(m68_state, EAD); break; + case 0x99: IMMWORD(EAP); EA+=X; EAD=RM16(m68_state, EAD); break; case 0x9a: EA=X+SIGNED(F); EAD=RM16(m68_state, EAD); break; case 0x9b: EA=X+D; EAD=RM16(m68_state, EAD); break; case 0x9c: IMMBYTE(EA); EA=PC+SIGNED(EA); EAD=RM16(m68_state, EAD); break; - case 0x9d: IMMWORD(EAP); EA+=PC; EAD=RM16(m68_state, EAD); break; + case 0x9d: IMMWORD(EAP); EA+=PC; EAD=RM16(m68_state, EAD); break; case 0x9e: EA=X+W; EAD=RM16(m68_state, EAD); break; - case 0x9f: IMMWORD(EAP); EAD=RM16(m68_state, EAD); break; + case 0x9f: IMMWORD(EAP); EAD=RM16(m68_state, EAD); break; case 0xa0: EA=Y; Y++; break; case 0xa1: EA=Y; Y+=2; break; @@ -1119,15 +1119,15 @@ INLINE void fetch_effective_address( m68_state_t *m68_state ) case 0xa6: EA=Y+SIGNED(A); break; case 0xa7: EA=Y+SIGNED(E); break; case 0xa8: IMMBYTE(EA); EA=Y+SIGNED(EA); break; - case 0xa9: IMMWORD(EAP); EA+=Y; break; + case 0xa9: IMMWORD(EAP); EA+=Y; break; case 0xaa: EA=Y+SIGNED(F); break; case 0xab: EA=Y+D; break; case 0xac: IMMBYTE(EA); EA=PC+SIGNED(EA); break; - case 0xad: IMMWORD(EAP); EA+=PC; break; + case 0xad: IMMWORD(EAP); EA+=PC; break; case 0xae: EA=Y+W; break; case 0xaf: IMMWORD(EAP); EA+=W; break; - case 0xb0: IMMWORD(EAP); EA+=W; EAD=RM16(m68_state, EAD); break; + case 0xb0: IMMWORD(EAP); EA+=W; EAD=RM16(m68_state, EAD); break; case 0xb1: EA=Y; Y+=2; EAD=RM16(m68_state, EAD); break; case 0xb2: IIError(m68_state); break; case 0xb3: Y-=2; EA=Y; EAD=RM16(m68_state, EAD); break; @@ -1136,11 +1136,11 @@ INLINE void fetch_effective_address( m68_state_t *m68_state ) case 0xb6: EA=Y+SIGNED(A); EAD=RM16(m68_state, EAD); break; case 0xb7: EA=Y+SIGNED(E); EAD=RM16(m68_state, EAD); break; case 0xb8: IMMBYTE(EA); EA=Y+SIGNED(EA); EAD=RM16(m68_state, EAD); break; - case 0xb9: IMMWORD(EAP); EA+=Y; EAD=RM16(m68_state, EAD); break; + case 0xb9: IMMWORD(EAP); EA+=Y; EAD=RM16(m68_state, EAD); break; case 0xba: EA=Y+SIGNED(F); EAD=RM16(m68_state, EAD); break; case 0xbb: EA=Y+D; EAD=RM16(m68_state, EAD); break; case 0xbc: IMMBYTE(EA); EA=PC+SIGNED(EA); EAD=RM16(m68_state, EAD); break; - case 0xbd: IMMWORD(EAP); EA+=PC; EAD=RM16(m68_state, EAD); break; + case 0xbd: IMMWORD(EAP); EA+=PC; EAD=RM16(m68_state, EAD); break; case 0xbe: EA=Y+W; EAD=RM16(m68_state, EAD); break; case 0xbf: IIError(m68_state); break; @@ -1153,11 +1153,11 @@ INLINE void fetch_effective_address( m68_state_t *m68_state ) case 0xc6: EA=U+SIGNED(A); break; case 0xc7: EA=U+SIGNED(E); break; case 0xc8: IMMBYTE(EA); EA=U+SIGNED(EA); break; - case 0xc9: IMMWORD(EAP); EA+=U; break; + case 0xc9: IMMWORD(EAP); EA+=U; break; case 0xca: EA=U+SIGNED(F); break; case 0xcb: EA=U+D; break; case 0xcc: IMMBYTE(EA); EA=PC+SIGNED(EA); break; - case 0xcd: IMMWORD(EAP); EA+=PC; break; + case 0xcd: IMMWORD(EAP); EA+=PC; break; case 0xce: EA=U+W; break; case 0xcf: EA=W; W+=2; break; @@ -1170,11 +1170,11 @@ INLINE void fetch_effective_address( m68_state_t *m68_state ) case 0xd6: EA=U+SIGNED(A); EAD=RM16(m68_state, EAD); break; case 0xd7: EA=U+SIGNED(E); EAD=RM16(m68_state, EAD); break; case 0xd8: IMMBYTE(EA); EA=U+SIGNED(EA); EAD=RM16(m68_state, EAD); break; - case 0xd9: IMMWORD(EAP); EA+=U; EAD=RM16(m68_state, EAD); break; + case 0xd9: IMMWORD(EAP); EA+=U; EAD=RM16(m68_state, EAD); break; case 0xda: EA=U+SIGNED(F); EAD=RM16(m68_state, EAD); break; case 0xdb: EA=U+D; EAD=RM16(m68_state, EAD); break; case 0xdc: IMMBYTE(EA); EA=PC+SIGNED(EA); EAD=RM16(m68_state, EAD); break; - case 0xdd: IMMWORD(EAP); EA+=PC; EAD=RM16(m68_state, EAD); break; + case 0xdd: IMMWORD(EAP); EA+=PC; EAD=RM16(m68_state, EAD); break; case 0xde: EA=U+W; EAD=RM16(m68_state, EAD); break; case 0xdf: IIError(m68_state); break; @@ -1187,11 +1187,11 @@ INLINE void fetch_effective_address( m68_state_t *m68_state ) case 0xe6: EA=S+SIGNED(A); break; case 0xe7: EA=S+SIGNED(E); break; case 0xe8: IMMBYTE(EA); EA=S+SIGNED(EA); break; - case 0xe9: IMMWORD(EAP); EA+=S; break; + case 0xe9: IMMWORD(EAP); EA+=S; break; case 0xea: EA=S+SIGNED(F); break; case 0xeb: EA=S+D; break; case 0xec: IMMBYTE(EA); EA=PC+SIGNED(EA); break; - case 0xed: IMMWORD(EAP); EA+=PC; break; + case 0xed: IMMWORD(EAP); EA+=PC; break; case 0xee: EA=S+W; break; case 0xef: W-=2; EA=W; break; @@ -1204,11 +1204,11 @@ INLINE void fetch_effective_address( m68_state_t *m68_state ) case 0xf6: EA=S+SIGNED(A); EAD=RM16(m68_state, EAD); break; case 0xf7: EA=S+SIGNED(E); EAD=RM16(m68_state, EAD); break; case 0xf8: IMMBYTE(EA); EA=S+SIGNED(EA); EAD=RM16(m68_state, EAD); break; - case 0xf9: IMMWORD(EAP); EA+=S; EAD=RM16(m68_state, EAD); break; + case 0xf9: IMMWORD(EAP); EA+=S; EAD=RM16(m68_state, EAD); break; case 0xfa: EA=S+SIGNED(F); EAD=RM16(m68_state, EAD); break; case 0xfb: EA=S+D; EAD=RM16(m68_state, EAD); break; case 0xfc: IMMBYTE(EA); EA=PC+SIGNED(EA); EAD=RM16(m68_state, EAD); break; - case 0xfd: IMMWORD(EAP); EA+=PC; EAD=RM16(m68_state, EAD); break; + case 0xfd: IMMWORD(EAP); EA+=PC; EAD=RM16(m68_state, EAD); break; case 0xfe: EA=S+W; EAD=RM16(m68_state, EAD); break; case 0xff: IIError(m68_state); break; } @@ -1238,15 +1238,15 @@ static CPU_SET_INFO( hd6309 ) case CPUINFO_INT_REGISTER + HD6309_S: S = info->i; break; case CPUINFO_INT_REGISTER + HD6309_CC: CC = info->i; check_irq_lines(m68_state); break; case CPUINFO_INT_REGISTER + HD6309_MD: MD = info->i; UpdateState(m68_state); break; - case CPUINFO_INT_REGISTER + HD6309_U: U = info->i; break; - case CPUINFO_INT_REGISTER + HD6309_A: A = info->i; break; - case CPUINFO_INT_REGISTER + HD6309_B: B = info->i; break; - case CPUINFO_INT_REGISTER + HD6309_E: E = info->i; break; - case CPUINFO_INT_REGISTER + HD6309_F: F = info->i; break; - case CPUINFO_INT_REGISTER + HD6309_X: X = info->i; break; - case CPUINFO_INT_REGISTER + HD6309_Y: Y = info->i; break; - case CPUINFO_INT_REGISTER + HD6309_V: V = info->i; break; - case CPUINFO_INT_REGISTER + HD6309_DP: DP = info->i; break; + case CPUINFO_INT_REGISTER + HD6309_U: U = info->i; break; + case CPUINFO_INT_REGISTER + HD6309_A: A = info->i; break; + case CPUINFO_INT_REGISTER + HD6309_B: B = info->i; break; + case CPUINFO_INT_REGISTER + HD6309_E: E = info->i; break; + case CPUINFO_INT_REGISTER + HD6309_F: F = info->i; break; + case CPUINFO_INT_REGISTER + HD6309_X: X = info->i; break; + case CPUINFO_INT_REGISTER + HD6309_Y: Y = info->i; break; + case CPUINFO_INT_REGISTER + HD6309_V: V = info->i; break; + case CPUINFO_INT_REGISTER + HD6309_DP: DP = info->i; break; } } @@ -1278,11 +1278,11 @@ CPU_GET_INFO( hd6309 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + HD6309_IRQ_LINE: info->i = m68_state->irq_state[HD6309_IRQ_LINE]; break; case CPUINFO_INT_INPUT_STATE + HD6309_FIRQ_LINE:info->i = m68_state->irq_state[HD6309_FIRQ_LINE]; break; diff --git a/src/emu/cpu/i386/cycles.h b/src/emu/cpu/i386/cycles.h index f17517acc33..f459cbb9f20 100644 --- a/src/emu/cpu/i386/cycles.h +++ b/src/emu/cpu/i386/cycles.h @@ -359,7 +359,7 @@ static const X86_CYCLE_TABLE x86_cycle_table[] = { CYCLES_MOV_SREG_REG, { { 2, 2 }, { 3, 3 }, { 1, 1 }, { 1, 6 } } }, { CYCLES_MOV_SREG_MEM, { { 2, 2 }, { 3, 3 }, { 1, 1 }, { 1, 6 } } }, { CYCLES_MOVSX_REG_REG, { { 3, 3 }, { 3, 3 }, { 3, 3 }, { 1, 1 } } }, - { CYCLES_MOVSX_MEM_REG, { { 6, 6 }, { 3, 3 }, { 3, 3 }, { 1, 1 } } }, + { CYCLES_MOVSX_MEM_REG, { { 6, 6 }, { 3, 3 }, { 3, 3 }, { 1, 1 } } }, { CYCLES_MOVZX_REG_REG, { { 3, 3 }, { 3, 3 }, { 3, 3 }, { 1, 1 } } }, { CYCLES_MOVZX_MEM_REG, { { 6, 6 }, { 3, 3 }, { 3, 3 }, { 1, 1 } } }, { CYCLES_PUSH_RM, { { 5, 5 }, { 4, 4 }, { 2, 2 }, { 3, 3 } } }, @@ -666,7 +666,7 @@ static const X86_CYCLE_TABLE x86_cycle_table[] = { CYCLES_FYL2X, { { 0, 0 }, {196,196 }, {111,111 }, { 1, 1 } } }, { CYCLES_FYL2XPI, { { 0, 0 }, {171,171 }, {103,103 }, { 1, 1 } } }, { CYCLES_CMPXCHG_REG_REG_T, { { 0, 0 }, { 6, 6 }, { 6, 6 }, { 6, 6 } } }, - { CYCLES_CMPXCHG_REG_REG_F, { { 0, 0 }, { 9, 9 }, { 9, 9 }, { 9, 9 } } }, + { CYCLES_CMPXCHG_REG_REG_F, { { 0, 0 }, { 9, 9 }, { 9, 9 }, { 9, 9 } } }, { CYCLES_CMPXCHG_REG_MEM_T, { { 0, 0 }, { 7, 7 }, { 7, 7 }, { 7, 7 } } }, { CYCLES_CMPXCHG_REG_MEM_F, { { 0, 0 }, { 10, 10 }, { 10, 10 }, { 10, 10 } } }, }; diff --git a/src/emu/cpu/i386/i386.c b/src/emu/cpu/i386/i386.c index 77be70f8dcc..7067677af89 100644 --- a/src/emu/cpu/i386/i386.c +++ b/src/emu/cpu/i386/i386.c @@ -882,13 +882,13 @@ CPU_GET_INFO( i386 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_LOGADDR_WIDTH_PROGRAM: info->i = 32; break; - case CPUINFO_INT_PAGE_SHIFT_PROGRAM: info->i = 12; break; + case CPUINFO_INT_PAGE_SHIFT_PROGRAM: info->i = 12; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 32; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 32; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 32; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE: info->i = CLEAR_LINE; break; @@ -975,15 +975,15 @@ CPU_GET_INFO( i386 ) case CPUINFO_INT_REGISTER + I386_LDTR_FLAGS: info->i = cpustate->ldtr.flags; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i386); break; - case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i386); break; - case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(i386); break; - case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(i386); break; - case CPUINFO_FCT_BURN: info->burn = NULL; break; - case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->cycles; break; + case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i386); break; + case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i386); break; + case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(i386); break; + case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(i386); break; + case CPUINFO_FCT_BURN: info->burn = NULL; break; + case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->cycles; break; case CPUINFO_FCT_TRANSLATE: info->translate = CPU_TRANSLATE_NAME(i386); break; case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i386); break; - case CPUINFO_FCT_DEBUG_INIT: info->debug_init = CPU_DEBUG_INIT_NAME(i386); break; + case CPUINFO_FCT_DEBUG_INIT: info->debug_init = CPU_DEBUG_INIT_NAME(i386); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case DEVINFO_STR_NAME: strcpy(info->s, "I386"); break; @@ -992,7 +992,7 @@ CPU_GET_INFO( i386 ) case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break; case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright Ville Linde"); break; - case CPUINFO_STR_FLAGS: sprintf(info->s, "%08X", get_flags(cpustate)); break; + case CPUINFO_STR_FLAGS: sprintf(info->s, "%08X", get_flags(cpustate)); break; case CPUINFO_STR_REGISTER + I386_PC: sprintf(info->s, "PC: %08X", cpustate->pc); break; case CPUINFO_STR_REGISTER + I386_EIP: sprintf(info->s, "EIP: %08X", cpustate->eip); break; @@ -1144,7 +1144,7 @@ static CPU_SET_INFO( i486 ) case CPUINFO_INT_REGISTER + X87_ST6: ST(6).f = info->i; break; case CPUINFO_INT_REGISTER + X87_ST7: ST(7).f = info->i; break; - default: CPU_SET_INFO_CALL(i386); break; + default: CPU_SET_INFO_CALL(i386); break; } } @@ -1153,10 +1153,10 @@ CPU_GET_INFO( i486 ) i386_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL; switch (state) { - case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i486);break; - case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i486); break; - case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(i486); break; - case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(i486); break; + case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i486);break; + case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i486); break; + case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(i486); break; + case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(i486); break; case CPUINFO_INT_REGISTER + X87_CTRL: info->i = cpustate->fpu_control_word; break; case CPUINFO_INT_REGISTER + X87_STATUS: info->i = cpustate->fpu_status_word; break; @@ -1182,7 +1182,7 @@ CPU_GET_INFO( i486 ) case CPUINFO_STR_REGISTER + X87_ST6: sprintf(info->s, "ST6: %f", ST(6).f); break; case CPUINFO_STR_REGISTER + X87_ST7: sprintf(info->s, "ST7: %f", ST(7).f); break; - default: CPU_GET_INFO_CALL(i386); break; + default: CPU_GET_INFO_CALL(i386); break; } } @@ -1275,7 +1275,7 @@ static CPU_SET_INFO( pentium ) case CPUINFO_INT_REGISTER + X87_ST6: ST(6).f = info->i; break; case CPUINFO_INT_REGISTER + X87_ST7: ST(7).f = info->i; break; - default: CPU_SET_INFO_CALL(i386); break; + default: CPU_SET_INFO_CALL(i386); break; } } @@ -1284,10 +1284,10 @@ CPU_GET_INFO( pentium ) i386_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL; switch (state) { - case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(pentium); break; - case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(pentium); break; - case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pentium); break; - case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(pentium); break; + case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(pentium); break; + case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(pentium); break; + case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pentium); break; + case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(pentium); break; case CPUINFO_INT_REGISTER + X87_CTRL: info->i = cpustate->fpu_control_word; break; case CPUINFO_INT_REGISTER + X87_STATUS: info->i = cpustate->fpu_status_word; break; @@ -1313,7 +1313,7 @@ CPU_GET_INFO( pentium ) case CPUINFO_STR_REGISTER + X87_ST6: sprintf(info->s, "ST6: %f", ST(6).f); break; case CPUINFO_STR_REGISTER + X87_ST7: sprintf(info->s, "ST7: %f", ST(7).f); break; - default: CPU_GET_INFO_CALL(i386); break; + default: CPU_GET_INFO_CALL(i386); break; } } @@ -1406,7 +1406,7 @@ static CPU_SET_INFO( mediagx ) case CPUINFO_INT_REGISTER + X87_ST6: ST(6).f = info->i; break; case CPUINFO_INT_REGISTER + X87_ST7: ST(7).f = info->i; break; - default: CPU_SET_INFO_CALL(i386); break; + default: CPU_SET_INFO_CALL(i386); break; } } @@ -1415,10 +1415,10 @@ CPU_GET_INFO( mediagx ) i386_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL; switch (state) { - case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mediagx); break; - case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(mediagx); break; - case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(mediagx); break; - case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(mediagx); break; + case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mediagx); break; + case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(mediagx); break; + case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(mediagx); break; + case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(mediagx); break; case CPUINFO_INT_REGISTER + X87_CTRL: info->i = cpustate->fpu_control_word; break; case CPUINFO_INT_REGISTER + X87_STATUS: info->i = cpustate->fpu_status_word; break; @@ -1444,6 +1444,6 @@ CPU_GET_INFO( mediagx ) case CPUINFO_STR_REGISTER + X87_ST6: sprintf(info->s, "ST6: %f", ST(6).f); break; case CPUINFO_STR_REGISTER + X87_ST7: sprintf(info->s, "ST7: %f", ST(7).f); break; - default: CPU_GET_INFO_CALL(i386); break; + default: CPU_GET_INFO_CALL(i386); break; } } diff --git a/src/emu/cpu/i386/i386dasm.c b/src/emu/cpu/i386/i386dasm.c index 90845e9c09a..d27c4dc3c95 100644 --- a/src/emu/cpu/i386/i386dasm.c +++ b/src/emu/cpu/i386/i386dasm.c @@ -89,7 +89,7 @@ enum #define VAR_NAME4 0x200 #define ALWAYS64 0x400 #define SPECIAL64 0x800 -#define SPECIAL64_ENT(x) (SPECIAL64 | ((x) << 24)) +#define SPECIAL64_ENT(x) (SPECIAL64 | ((x) << 24)) typedef struct { const char *mnemonic; diff --git a/src/emu/cpu/i386/i386ops.c b/src/emu/cpu/i386/i386ops.c index f31204d198e..2f8ae65defe 100644 --- a/src/emu/cpu/i386/i386ops.c +++ b/src/emu/cpu/i386/i386ops.c @@ -895,17 +895,17 @@ static void I386OP(arpl)(i386_state *cpustate) // Opcode 0x63 UINT8 flag = 0; if( modrm >= 0xc0 ) { - src = LOAD_REG16(modrm); - dst = LOAD_RM16(modrm); + src = LOAD_REG16(modrm); + dst = LOAD_RM16(modrm); if( (dst&0x3) < (src&0x3) ) { dst = (dst&0xfffc) | (src&0x3); flag = 1; STORE_RM16(modrm, dst); } } else { - UINT32 ea = GetEA(cpustate, modrm); - src = LOAD_REG16(modrm); - dst = READ16(cpustate, ea); + UINT32 ea = GetEA(cpustate, modrm); + src = LOAD_REG16(modrm); + dst = READ16(cpustate, ea); if( (dst&0x3) < (src&0x3) ) { dst = (dst&0xfffc) | (src&0x3); flag = 1; diff --git a/src/emu/cpu/i386/i386priv.h b/src/emu/cpu/i386/i386priv.h index 6d2899e4716..9c94078df4d 100644 --- a/src/emu/cpu/i386/i386priv.h +++ b/src/emu/cpu/i386/i386priv.h @@ -885,9 +885,9 @@ INLINE void BUMP_DI(i386_state *cpustate,int adjustment) /***********************************************************************************/ -#define READPORT8(port) (memory_read_byte_32le(cpustate->io, port)) -#define READPORT16(port) (memory_read_word_32le(cpustate->io, port)) -#define READPORT32(port) (memory_read_dword_32le(cpustate->io, port)) +#define READPORT8(port) (memory_read_byte_32le(cpustate->io, port)) +#define READPORT16(port) (memory_read_word_32le(cpustate->io, port)) +#define READPORT32(port) (memory_read_dword_32le(cpustate->io, port)) #define WRITEPORT8(port, value) (memory_write_byte_32le(cpustate->io, port, value)) #define WRITEPORT16(port, value) (memory_write_word_32le(cpustate->io, port, value)) #define WRITEPORT32(port, value) (memory_write_dword_32le(cpustate->io, port, value)) diff --git a/src/emu/cpu/i4004/4004dasm.c b/src/emu/cpu/i4004/4004dasm.c index c66372ffc6e..1e5a478b231 100644 --- a/src/emu/cpu/i4004/4004dasm.c +++ b/src/emu/cpu/i4004/4004dasm.c @@ -21,29 +21,29 @@ CPU_DISASSEMBLE( i4004 ) UINT16 page = PC & 0x0f00; switch (op = OP(pc++)) { - case 0x00: sprintf (buffer,"nop"); break; - case 0x11: sprintf (buffer,"jnt $%03x",page | ARG(pc)); pc++; break; - case 0x12: sprintf (buffer,"jc $%03x",page | ARG(pc)); pc++; break; - case 0x14: sprintf (buffer,"jz $%03x",page | ARG(pc)); pc++; break; - case 0x19: sprintf (buffer,"jt $%03x",page | ARG(pc)); pc++; break; - case 0x1a: sprintf (buffer,"jnc $%03x",page | ARG(pc)); pc++; break; - case 0x1c: sprintf (buffer,"jnz $%03x",page | ARG(pc)); pc++; break; + case 0x00: sprintf (buffer,"nop"); break; + case 0x11: sprintf (buffer,"jnt $%03x",page | ARG(pc)); pc++; break; + case 0x12: sprintf (buffer,"jc $%03x",page | ARG(pc)); pc++; break; + case 0x14: sprintf (buffer,"jz $%03x",page | ARG(pc)); pc++; break; + case 0x19: sprintf (buffer,"jt $%03x",page | ARG(pc)); pc++; break; + case 0x1a: sprintf (buffer,"jnc $%03x",page | ARG(pc)); pc++; break; + case 0x1c: sprintf (buffer,"jnz $%03x",page | ARG(pc)); pc++; break; case 0x10: case 0x13: case 0x15: case 0x16: case 0x17: case 0x18: case 0x1b: case 0x1d: case 0x1e: case 0x1f: - sprintf (buffer,"jcn $%01x,$%03x",op & 0x0f,page | ARG(pc)); pc++; break; + sprintf (buffer,"jcn $%01x,$%03x",op & 0x0f,page | ARG(pc)); pc++; break; case 0x20: case 0x22: case 0x24: case 0x26: case 0x28: case 0x2a: case 0x2c: case 0x2e: - sprintf (buffer,"fim $%01x,$%02x",op & 0x0f,OP(pc)); pc++; break; + sprintf (buffer,"fim $%01x,$%02x",op & 0x0f,OP(pc)); pc++; break; case 0x21: case 0x23: case 0x25: case 0x27: case 0x29: case 0x2b: case 0x2d: case 0x2f: - sprintf (buffer,"src $%01x",(op & 0x0f)-1); break; + sprintf (buffer,"src $%01x",(op & 0x0f)-1); break; case 0x30: case 0x32: case 0x34: case 0x36: case 0x38: case 0x3a: case 0x3c: case 0x3e: - sprintf (buffer,"fin $%01x",op & 0x0f); break; + sprintf (buffer,"fin $%01x",op & 0x0f); break; case 0x31: case 0x33: case 0x35: case 0x37: case 0x39: case 0x3b: case 0x3d: case 0x3f: - sprintf (buffer,"jin $%01x",(op & 0x0f)-1); break; + sprintf (buffer,"jin $%01x",(op & 0x0f)-1); break; case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47: case 0x48: case 0x49: case 0x4a: case 0x4b: @@ -95,37 +95,37 @@ CPU_DISASSEMBLE( i4004 ) case 0xdc: case 0xdd: case 0xde: case 0xdf: sprintf (buffer,"ldm $%01x",op & 0x0f); break; - case 0xe0: sprintf (buffer,"wrm"); break; - case 0xe1: sprintf (buffer,"wmp"); break; - case 0xe2: sprintf (buffer,"wrr"); break; - case 0xe3: sprintf (buffer,"wpm"); break; - case 0xe4: sprintf (buffer,"wr0"); break; - case 0xe5: sprintf (buffer,"wr1"); break; - case 0xe6: sprintf (buffer,"wr2"); break; - case 0xe7: sprintf (buffer,"wr3"); break; - case 0xe8: sprintf (buffer,"sbm"); break; - case 0xe9: sprintf (buffer,"rdm"); break; - case 0xea: sprintf (buffer,"rdr"); break; - case 0xeb: sprintf (buffer,"adm"); break; - case 0xec: sprintf (buffer,"rd0"); break; - case 0xed: sprintf (buffer,"rd1"); break; - case 0xee: sprintf (buffer,"rd2"); break; - case 0xef: sprintf (buffer,"rd3"); break; + case 0xe0: sprintf (buffer,"wrm"); break; + case 0xe1: sprintf (buffer,"wmp"); break; + case 0xe2: sprintf (buffer,"wrr"); break; + case 0xe3: sprintf (buffer,"wpm"); break; + case 0xe4: sprintf (buffer,"wr0"); break; + case 0xe5: sprintf (buffer,"wr1"); break; + case 0xe6: sprintf (buffer,"wr2"); break; + case 0xe7: sprintf (buffer,"wr3"); break; + case 0xe8: sprintf (buffer,"sbm"); break; + case 0xe9: sprintf (buffer,"rdm"); break; + case 0xea: sprintf (buffer,"rdr"); break; + case 0xeb: sprintf (buffer,"adm"); break; + case 0xec: sprintf (buffer,"rd0"); break; + case 0xed: sprintf (buffer,"rd1"); break; + case 0xee: sprintf (buffer,"rd2"); break; + case 0xef: sprintf (buffer,"rd3"); break; - case 0xf0: sprintf (buffer,"clb"); break; - case 0xf1: sprintf (buffer,"clc"); break; - case 0xf2: sprintf (buffer,"iac"); break; - case 0xf3: sprintf (buffer,"cmc"); break; - case 0xf4: sprintf (buffer,"cma"); break; - case 0xf5: sprintf (buffer,"ral"); break; - case 0xf6: sprintf (buffer,"rar"); break; - case 0xf7: sprintf (buffer,"tcc"); break; - case 0xf8: sprintf (buffer,"dac"); break; - case 0xf9: sprintf (buffer,"tcs"); break; - case 0xfa: sprintf (buffer,"stc"); break; - case 0xfb: sprintf (buffer,"daa"); break; - case 0xfc: sprintf (buffer,"kbp"); break; - case 0xfd: sprintf (buffer,"dcl"); break; + case 0xf0: sprintf (buffer,"clb"); break; + case 0xf1: sprintf (buffer,"clc"); break; + case 0xf2: sprintf (buffer,"iac"); break; + case 0xf3: sprintf (buffer,"cmc"); break; + case 0xf4: sprintf (buffer,"cma"); break; + case 0xf5: sprintf (buffer,"ral"); break; + case 0xf6: sprintf (buffer,"rar"); break; + case 0xf7: sprintf (buffer,"tcc"); break; + case 0xf8: sprintf (buffer,"dac"); break; + case 0xf9: sprintf (buffer,"tcs"); break; + case 0xfa: sprintf (buffer,"stc"); break; + case 0xfb: sprintf (buffer,"daa"); break; + case 0xfc: sprintf (buffer,"kbp"); break; + case 0xfd: sprintf (buffer,"dcl"); break; default : sprintf (buffer,"illegal"); break; } diff --git a/src/emu/cpu/i4004/i4004.c b/src/emu/cpu/i4004/i4004.c index 2c267ee31b1..f894fd4cebd 100644 --- a/src/emu/cpu/i4004/i4004.c +++ b/src/emu/cpu/i4004/i4004.c @@ -201,7 +201,7 @@ static void execute_one(i4004_state *cpustate, int opcode) cpustate->icount -= 8; switch (opcode) { - case 0x00: /* NOP */ + case 0x00: /* NOP */ /* no op */ break; case 0x10: case 0x11: case 0x12: case 0x13: @@ -581,12 +581,12 @@ CPU_GET_INFO( i4004 ) case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 12; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 12; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break; // Only lower 4 bits used - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 6; break; // 4 I/O for each ROM chip and 4 OUT for each RAM - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; // There could be 4 chips in 16 banks for RAM + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 6; break; // 4 I/O for each ROM chip and 4 OUT for each RAM + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; // There could be 4 chips in 16 banks for RAM /* --- the following bits of info are returned as pointers to functions --- */ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i4004); break; diff --git a/src/emu/cpu/i8008/8008dasm.c b/src/emu/cpu/i8008/8008dasm.c index 10389a13bb1..eb10e391786 100644 --- a/src/emu/cpu/i8008/8008dasm.c +++ b/src/emu/cpu/i8008/8008dasm.c @@ -23,14 +23,14 @@ CPU_DISASSEMBLE( i8008 ) UINT8 op = OP(pc++); switch (op >> 6) { - case 0x03: // starting with 11 - if (op==0xff) { + case 0x03: // starting with 11 + if (op==0xff) { sprintf (buffer,"hlt"); } else { - sprintf (buffer,"l%c%c",reg[(op >> 3) & 7],reg[op & 7]); - } - break; - case 0x00: // starting with 00 + sprintf (buffer,"l%c%c",reg[(op >> 3) & 7],reg[op & 7]); + } + break; + case 0x00: // starting with 00 switch(op & 7) { case 0 : if(((op >> 3) & 7)==0) { sprintf (buffer,"hlt"); @@ -58,7 +58,7 @@ CPU_DISASSEMBLE( i8008 ) case 1 : sprintf (buffer,"rrc"); break; case 2 : sprintf (buffer,"ral"); break; case 3 : sprintf (buffer,"rar"); break; - default : sprintf (buffer,"illegal"); break; + default : sprintf (buffer,"illegal"); break; } } break; @@ -77,16 +77,16 @@ CPU_DISASSEMBLE( i8008 ) } break; case 5 : sprintf (buffer,"rst %02x",(op>>3) & 7); break; - case 6 : sprintf (buffer,"l%ci %02x",reg[(op >> 3) & 7],ARG(pc)); pc++; break; + case 6 : sprintf (buffer,"l%ci %02x",reg[(op >> 3) & 7],ARG(pc)); pc++; break; case 7 : sprintf (buffer,"ret"); break; } - break; - case 0x01: // starting with 01 + break; + case 0x01: // starting with 01 switch(op & 7) { case 0 : sprintf (buffer,"j%c%c %02x%02x",(BIT(op,5)? 't' : 'f'),flag_names[(op>>3)&3], ARG(pc+1) & 0x3f,ARG(pc)); pc+=2; break; case 2 : sprintf (buffer,"c%c%c %02x%02x",(BIT(op,5)? 't' : 'f'),flag_names[(op>>3)&3], ARG(pc+1) & 0x3f,ARG(pc)); pc+=2; break; case 4 : sprintf (buffer,"jmp %02x%02x",ARG(pc+1) & 0x3f,ARG(pc)); pc+=2; break; - case 6 : sprintf (buffer,"cal %02x%02x",ARG(pc+1) & 0x3f,ARG(pc)); pc+=2; break; + case 6 : sprintf (buffer,"cal %02x%02x",ARG(pc+1) & 0x3f,ARG(pc)); pc+=2; break; case 1 : case 3 : case 5 : @@ -97,8 +97,8 @@ CPU_DISASSEMBLE( i8008 ) } break; } - break; - case 0x02: // starting with 10 + break; + case 0x02: // starting with 10 switch((op >> 3) & 7) { case 0 : sprintf (buffer,"ad%c",reg[op & 7]); break; case 1 : sprintf (buffer,"ac%c",reg[op & 7]); break; @@ -109,7 +109,7 @@ CPU_DISASSEMBLE( i8008 ) case 6 : sprintf (buffer,"or%c",reg[op & 7]); break; case 7 : sprintf (buffer,"cp%c",reg[op & 7]); break; } - break; + break; } return (pc - PC) | flags | DASMFLAG_SUPPORTED; } diff --git a/src/emu/cpu/i8008/i8008.c b/src/emu/cpu/i8008/i8008.c index f479d0cfae9..90978c29e5c 100644 --- a/src/emu/cpu/i8008/i8008.c +++ b/src/emu/cpu/i8008/i8008.c @@ -30,7 +30,7 @@ struct _i8008_state UINT8 ZF; // Zero flag UINT8 SF; // Sign flag UINT8 PF; // Parity flag - UINT8 HALT; + UINT8 HALT; const device_config *device; const address_space *program; const address_space *io; @@ -204,8 +204,8 @@ static void execute_one(i8008_state *cpustate, int opcode) switch (opcode >> 6) { - case 0x03: // starting with 11 - if (opcode==0xff) { + case 0x03: // starting with 11 + if (opcode==0xff) { // HLT cpustate->icount -= 4; GET_PC.w.l = GET_PC.w.l - 1; @@ -217,9 +217,9 @@ static void execute_one(i8008_state *cpustate, int opcode) if (REG_1==7) cpustate->icount -= 2; if (REG_2==7) cpustate->icount -= 3; SET_REG(cpustate,REG_1, GET_REG(cpustate,REG_2)); - } - break; - case 0x00: // starting with 00 + } + break; + case 0x00: // starting with 00 switch(opcode & 7) { case 0 : if(((opcode >> 3) & 7)==0) { // HLT @@ -374,7 +374,7 @@ static void execute_one(i8008_state *cpustate, int opcode) GET_PC.w.l = opcode & 0x38; cpustate->PC = GET_PC; break; - case 6 : // LrI + case 6 : // LrI cpustate->icount -= 8; if (REG_1==7) cpustate->icount -= 1; // LMI SET_REG(cpustate,REG_1, ARG(cpustate)); @@ -385,9 +385,9 @@ static void execute_one(i8008_state *cpustate, int opcode) cpustate->PC = GET_PC; break; } - break; + break; - case 0x01: // starting with 01 + case 0x01: // starting with 01 switch(opcode & 7) { case 0 : // Jcc @@ -436,8 +436,8 @@ static void execute_one(i8008_state *cpustate, int opcode) } break; } - break; - case 0x02: // starting with 10 + break; + case 0x02: // starting with 10 cpustate->icount -= 5; if ((opcode & 7)==7) cpustate->icount -= 3; // operations with memory switch((opcode >> 3) & 7) { @@ -497,7 +497,7 @@ static void execute_one(i8008_state *cpustate, int opcode) cpustate->CF = (tmp >> 8) & 1; break; } - break; + break; } } @@ -679,12 +679,12 @@ CPU_GET_INFO( i8008 ) case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 8; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; /* --- the following bits of info are returned as pointers to functions --- */ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i8008); break; diff --git a/src/emu/cpu/i8085/i8085.c b/src/emu/cpu/i8085/i8085.c index 00843c0fced..a4d14f51e7c 100644 --- a/src/emu/cpu/i8085/i8085.c +++ b/src/emu/cpu/i8085/i8085.c @@ -159,7 +159,7 @@ typedef struct _i8085_state i8085_state; struct _i8085_state { - i8085_config config; + i8085_config config; devcb_resolved_write8 out_status_func; devcb_resolved_write_line out_inte_func; @@ -181,7 +181,7 @@ struct _i8085_state UINT8 ietemp; /* import/export temp space */ - cpu_irq_callback irq_callback; + cpu_irq_callback irq_callback; const device_config *device; const address_space *program; const address_space *io; @@ -1225,8 +1225,8 @@ CPU_GET_INFO( i8085 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 8; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; /* --- the following bits of info are returned as pointers to functions --- */ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i808x); break; diff --git a/src/emu/cpu/i8085/i8085cpu.h b/src/emu/cpu/i8085/i8085cpu.h index 850a1a44923..2492532a33e 100644 --- a/src/emu/cpu/i8085/i8085cpu.h +++ b/src/emu/cpu/i8085/i8085cpu.h @@ -123,18 +123,18 @@ /* i/o */ #define M_IN \ - cpustate->STATUS = 0x42; \ + cpustate->STATUS = 0x42; \ cpustate->WZ.d=ARG(cpustate); \ cpustate->AF.b.h=memory_read_byte_8le(cpustate->io, cpustate->WZ.d); #define M_OUT \ - cpustate->STATUS = 0x10; \ + cpustate->STATUS = 0x10; \ cpustate->WZ.d=ARG(cpustate); \ memory_write_byte_8le(cpustate->io, cpustate->WZ.d,cpustate->AF.b.h) /* stack */ #define M_PUSH(R) { \ - cpustate->STATUS = 0x04; \ + cpustate->STATUS = 0x04; \ memory_write_byte_8le(cpustate->program, --cpustate->SP.w.l, cpustate->R.b.h); \ memory_write_byte_8le(cpustate->program, --cpustate->SP.w.l, cpustate->R.b.l); \ } diff --git a/src/emu/cpu/i86/i286.c b/src/emu/cpu/i86/i286.c index a099f430fa5..18e96ffcc27 100644 --- a/src/emu/cpu/i86/i286.c +++ b/src/emu/cpu/i86/i286.c @@ -37,7 +37,7 @@ typedef struct _i80286_state i80286_state; struct _i80286_state { i80286basicregs regs; - UINT32 amask; /* address mask */ + UINT32 amask; /* address mask */ UINT32 pc; UINT32 prevpc; UINT16 flags; @@ -68,7 +68,7 @@ struct _i80286_state INT8 irq_state; INT8 test_state; /* PJB 03/05 */ UINT8 rep_in_progress; - INT32 extra_cycles; /* extra cycles for interrupts */ + INT32 extra_cycles; /* extra cycles for interrupts */ memory_interface mem; int icount; @@ -353,7 +353,7 @@ static CPU_SET_INFO( i80286 ) break; case CPUINFO_INT_REGISTER + I80286_SP: cpustate->regs.w[SP] = info->i; break; - case CPUINFO_INT_REGISTER + I80286_FLAGS: cpustate->flags = info->i; ExpandFlags(info->i); break; + case CPUINFO_INT_REGISTER + I80286_FLAGS: cpustate->flags = info->i; ExpandFlags(info->i); break; case CPUINFO_INT_REGISTER + I80286_AX: cpustate->regs.w[AX] = info->i; break; case CPUINFO_INT_REGISTER + I80286_CX: cpustate->regs.w[CX] = info->i; break; case CPUINFO_INT_REGISTER + I80286_DX: cpustate->regs.w[DX] = info->i; break; @@ -397,11 +397,11 @@ CPU_GET_INFO( i80286 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 24; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 16; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 16; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 16; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + 0: info->i = cpustate->irq_state; break; case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_state; break; @@ -413,7 +413,7 @@ CPU_GET_INFO( i80286 ) case CPUINFO_INT_REGISTER + I80286_IP: info->i = cpustate->pc - cpustate->base[CS]; break; case CPUINFO_INT_SP: info->i = cpustate->base[SS] + cpustate->regs.w[SP]; break; case CPUINFO_INT_REGISTER + I80286_SP: info->i = cpustate->regs.w[SP]; break; - case CPUINFO_INT_REGISTER + I80286_FLAGS: cpustate->flags = CompressFlags(); info->i = cpustate->flags; break; + case CPUINFO_INT_REGISTER + I80286_FLAGS: cpustate->flags = CompressFlags(); info->i = cpustate->flags; break; case CPUINFO_INT_REGISTER + I80286_AX: info->i = cpustate->regs.w[AX]; break; case CPUINFO_INT_REGISTER + I80286_CX: info->i = cpustate->regs.w[CX]; break; case CPUINFO_INT_REGISTER + I80286_DX: info->i = cpustate->regs.w[DX]; break; @@ -474,25 +474,25 @@ CPU_GET_INFO( i80286 ) cpustate->flags & 0x0001 ? 'C' : '.'); break; - case CPUINFO_STR_REGISTER + I80286_PC: sprintf(info->s, "PC:%04X", cpustate->pc); break; - case CPUINFO_STR_REGISTER + I80286_IP: sprintf(info->s, "IP: %04X", cpustate->pc - cpustate->base[CS]); break; - case CPUINFO_STR_REGISTER + I80286_SP: sprintf(info->s, "SP: %04X", cpustate->regs.w[SP]); break; + case CPUINFO_STR_REGISTER + I80286_PC: sprintf(info->s, "PC:%04X", cpustate->pc); break; + case CPUINFO_STR_REGISTER + I80286_IP: sprintf(info->s, "IP: %04X", cpustate->pc - cpustate->base[CS]); break; + case CPUINFO_STR_REGISTER + I80286_SP: sprintf(info->s, "SP: %04X", cpustate->regs.w[SP]); break; case CPUINFO_STR_REGISTER + I80286_FLAGS: sprintf(info->s, "F:%04X", cpustate->flags); break; - case CPUINFO_STR_REGISTER + I80286_AX: sprintf(info->s, "AX:%04X", cpustate->regs.w[AX]); break; - case CPUINFO_STR_REGISTER + I80286_CX: sprintf(info->s, "CX:%04X", cpustate->regs.w[CX]); break; - case CPUINFO_STR_REGISTER + I80286_DX: sprintf(info->s, "DX:%04X", cpustate->regs.w[DX]); break; - case CPUINFO_STR_REGISTER + I80286_BX: sprintf(info->s, "BX:%04X", cpustate->regs.w[BX]); break; - case CPUINFO_STR_REGISTER + I80286_BP: sprintf(info->s, "BP:%04X", cpustate->regs.w[BP]); break; - case CPUINFO_STR_REGISTER + I80286_SI: sprintf(info->s, "SI: %04X", cpustate->regs.w[SI]); break; - case CPUINFO_STR_REGISTER + I80286_DI: sprintf(info->s, "DI: %04X", cpustate->regs.w[DI]); break; - case CPUINFO_STR_REGISTER + I80286_CS: sprintf(info->s, "CS: %04X %02X", cpustate->sregs[CS], cpustate->rights[CS]); break; - case CPUINFO_STR_REGISTER + I80286_CS_2: sprintf(info->s, "%06X %04X", cpustate->base[CS], cpustate->limit[CS]); break; - case CPUINFO_STR_REGISTER + I80286_SS: sprintf(info->s, "SS: %04X %02X", cpustate->sregs[SS], cpustate->rights[SS]); break; - case CPUINFO_STR_REGISTER + I80286_SS_2: sprintf(info->s, "%06X %04X", cpustate->base[SS], cpustate->limit[SS]); break; - case CPUINFO_STR_REGISTER + I80286_DS: sprintf(info->s, "DS: %04X %02X", cpustate->sregs[DS], cpustate->rights[DS]); break; - case CPUINFO_STR_REGISTER + I80286_DS_2: sprintf(info->s, "%06X %04X", cpustate->base[DS], cpustate->limit[DS]); break; - case CPUINFO_STR_REGISTER + I80286_ES: sprintf(info->s, "ES: %04X %02X", cpustate->sregs[ES], cpustate->rights[ES]); break; - case CPUINFO_STR_REGISTER + I80286_ES_2: sprintf(info->s, "%06X %04X", cpustate->base[ES], cpustate->limit[ES]); break; + case CPUINFO_STR_REGISTER + I80286_AX: sprintf(info->s, "AX:%04X", cpustate->regs.w[AX]); break; + case CPUINFO_STR_REGISTER + I80286_CX: sprintf(info->s, "CX:%04X", cpustate->regs.w[CX]); break; + case CPUINFO_STR_REGISTER + I80286_DX: sprintf(info->s, "DX:%04X", cpustate->regs.w[DX]); break; + case CPUINFO_STR_REGISTER + I80286_BX: sprintf(info->s, "BX:%04X", cpustate->regs.w[BX]); break; + case CPUINFO_STR_REGISTER + I80286_BP: sprintf(info->s, "BP:%04X", cpustate->regs.w[BP]); break; + case CPUINFO_STR_REGISTER + I80286_SI: sprintf(info->s, "SI: %04X", cpustate->regs.w[SI]); break; + case CPUINFO_STR_REGISTER + I80286_DI: sprintf(info->s, "DI: %04X", cpustate->regs.w[DI]); break; + case CPUINFO_STR_REGISTER + I80286_CS: sprintf(info->s, "CS: %04X %02X", cpustate->sregs[CS], cpustate->rights[CS]); break; + case CPUINFO_STR_REGISTER + I80286_CS_2: sprintf(info->s, "%06X %04X", cpustate->base[CS], cpustate->limit[CS]); break; + case CPUINFO_STR_REGISTER + I80286_SS: sprintf(info->s, "SS: %04X %02X", cpustate->sregs[SS], cpustate->rights[SS]); break; + case CPUINFO_STR_REGISTER + I80286_SS_2: sprintf(info->s, "%06X %04X", cpustate->base[SS], cpustate->limit[SS]); break; + case CPUINFO_STR_REGISTER + I80286_DS: sprintf(info->s, "DS: %04X %02X", cpustate->sregs[DS], cpustate->rights[DS]); break; + case CPUINFO_STR_REGISTER + I80286_DS_2: sprintf(info->s, "%06X %04X", cpustate->base[DS], cpustate->limit[DS]); break; + case CPUINFO_STR_REGISTER + I80286_ES: sprintf(info->s, "ES: %04X %02X", cpustate->sregs[ES], cpustate->rights[ES]); break; + case CPUINFO_STR_REGISTER + I80286_ES_2: sprintf(info->s, "%06X %04X", cpustate->base[ES], cpustate->limit[ES]); break; case CPUINFO_STR_REGISTER + I80286_VECTOR: sprintf(info->s, "V:%02X", cpustate->int_vector); break; case CPUINFO_STR_REGISTER + I80286_MSW: sprintf(info->s, "MSW:%04X", cpustate->msw); break; case CPUINFO_STR_REGISTER + I80286_TR_BASE: sprintf(info->s, "GDTR: %06X", cpustate->gdtr.base); break; diff --git a/src/emu/cpu/i86/i86.c b/src/emu/cpu/i86/i86.c index 652564dc45d..7fe23ebf1d8 100644 --- a/src/emu/cpu/i86/i86.c +++ b/src/emu/cpu/i86/i86.c @@ -532,11 +532,11 @@ CPU_GET_INFO( i8086 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 20; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 16; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 16; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 16; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + 0: info->i = cpustate->irq_state; break; case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_state; break; diff --git a/src/emu/cpu/i86/i86priv.h b/src/emu/cpu/i86/i86priv.h index 3b02ca2eb77..11b3892c265 100644 --- a/src/emu/cpu/i86/i86priv.h +++ b/src/emu/cpu/i86/i86priv.h @@ -65,14 +65,14 @@ typedef enum { #define SUBB(dst,src) { unsigned res=dst-src; SetCFB(res); SetOFB_Sub(res,src,dst); SetAF(res,src,dst); SetSZPF_Byte(res); dst=(BYTE)res; } #define SUBW(dst,src) { unsigned res=dst-src; SetCFW(res); SetOFW_Sub(res,src,dst); SetAF(res,src,dst); SetSZPF_Word(res); dst=(WORD)res; } -#define ORB(dst,src) dst |= src; cpustate->CarryVal = cpustate->OverVal = cpustate->AuxVal = 0; SetSZPF_Byte(dst) -#define ORW(dst,src) dst |= src; cpustate->CarryVal = cpustate->OverVal = cpustate->AuxVal = 0; SetSZPF_Word(dst) +#define ORB(dst,src) dst |= src; cpustate->CarryVal = cpustate->OverVal = cpustate->AuxVal = 0; SetSZPF_Byte(dst) +#define ORW(dst,src) dst |= src; cpustate->CarryVal = cpustate->OverVal = cpustate->AuxVal = 0; SetSZPF_Word(dst) -#define ANDB(dst,src) dst &= src; cpustate->CarryVal = cpustate->OverVal = cpustate->AuxVal = 0; SetSZPF_Byte(dst) -#define ANDW(dst,src) dst &= src; cpustate->CarryVal = cpustate->OverVal = cpustate->AuxVal = 0; SetSZPF_Word(dst) +#define ANDB(dst,src) dst &= src; cpustate->CarryVal = cpustate->OverVal = cpustate->AuxVal = 0; SetSZPF_Byte(dst) +#define ANDW(dst,src) dst &= src; cpustate->CarryVal = cpustate->OverVal = cpustate->AuxVal = 0; SetSZPF_Word(dst) -#define XORB(dst,src) dst ^= src; cpustate->CarryVal = cpustate->OverVal = cpustate->AuxVal = 0; SetSZPF_Byte(dst) -#define XORW(dst,src) dst ^= src; cpustate->CarryVal = cpustate->OverVal = cpustate->AuxVal = 0; SetSZPF_Word(dst) +#define XORB(dst,src) dst ^= src; cpustate->CarryVal = cpustate->OverVal = cpustate->AuxVal = 0; SetSZPF_Byte(dst) +#define XORW(dst,src) dst ^= src; cpustate->CarryVal = cpustate->OverVal = cpustate->AuxVal = 0; SetSZPF_Word(dst) #define CF (cpustate->CarryVal != 0) #define SF (cpustate->SignVal < 0) @@ -96,17 +96,17 @@ typedef enum { /************************************************************************/ -#define SegBase(Seg) (cpustate->sregs[Seg] << 4) +#define SegBase(Seg) (cpustate->sregs[Seg] << 4) -#define DefaultBase(Seg) ((cpustate->seg_prefix && (Seg == DS || Seg == SS)) ? cpustate->prefix_base : cpustate->base[Seg]) +#define DefaultBase(Seg) ((cpustate->seg_prefix && (Seg == DS || Seg == SS)) ? cpustate->prefix_base : cpustate->base[Seg]) #define GetMemB(Seg,Off) (read_byte((DefaultBase(Seg) + (Off)) & AMASK)) #define GetMemW(Seg,Off) (read_word((DefaultBase(Seg) + (Off)) & AMASK)) #define PutMemB(Seg,Off,x) write_byte((DefaultBase(Seg) + (Off)) & AMASK, (x)) #define PutMemW(Seg,Off,x) write_word((DefaultBase(Seg) + (Off)) & AMASK, (x)) -#define PEEKBYTE(ea) (read_byte((ea) & AMASK)) -#define ReadByte(ea) (read_byte((ea) & AMASK)) +#define PEEKBYTE(ea) (read_byte((ea) & AMASK)) +#define ReadByte(ea) (read_byte((ea) & AMASK)) #define ReadWord(ea) (read_word((ea) & AMASK)) #define WriteByte(ea,val) write_byte((ea) & AMASK, val); #define WriteWord(ea,val) write_word((ea) & AMASK, val); @@ -115,7 +115,7 @@ typedef enum { #define FETCH (memory_raw_read_byte(cpustate->program, FETCH_XOR(cpustate->pc++))) #define FETCHOP (memory_decrypted_read_byte(cpustate->program, FETCH_XOR(cpustate->pc++))) #define PEEKOP(addr) (memory_decrypted_read_byte(cpustate->program, FETCH_XOR(addr))) -#define FETCHWORD(var) { var = memory_raw_read_byte(cpustate->program, FETCH_XOR(cpustate->pc)); var += (memory_raw_read_byte(cpustate->program, FETCH_XOR(cpustate->pc + 1)) << 8); cpustate->pc += 2; } +#define FETCHWORD(var) { var = memory_raw_read_byte(cpustate->program, FETCH_XOR(cpustate->pc)); var += (memory_raw_read_byte(cpustate->program, FETCH_XOR(cpustate->pc + 1)) << 8); cpustate->pc += 2; } #define CHANGE_PC(addr) #define PUSH(val) { cpustate->regs.w[SP] -= 2; WriteWord(((cpustate->base[SS] + cpustate->regs.w[SP]) & AMASK), val); } #define POP(var) { var = ReadWord(((cpustate->base[SS] + cpustate->regs.w[SP]) & AMASK)); cpustate->regs.w[SP] += 2; } diff --git a/src/emu/cpu/i86/instr86.c b/src/emu/cpu/i86/instr86.c index 08d79dcecd1..194fcbfe98e 100644 --- a/src/emu/cpu/i86/instr86.c +++ b/src/emu/cpu/i86/instr86.c @@ -1261,11 +1261,11 @@ static void PREFIX86(_inc_di)(i8086_state *cpustate) /* Opcode 0x47 */ } #define DecWordReg(Reg) \ -{ \ +{ \ unsigned tmp = (unsigned)cpustate->regs.w[Reg]; \ - unsigned tmp1 = tmp-1; \ + unsigned tmp1 = tmp-1; \ SetOFW_Sub(tmp1,1,tmp); \ - SetAF(tmp1,tmp,1); \ + SetAF(tmp1,tmp,1); \ SetSZPF_Word(tmp1); \ cpustate->regs.w[Reg]=tmp1; \ ICOUNT -= timing.incdec_r16; \ @@ -1934,11 +1934,11 @@ static void PREFIX86(_popw)(i8086_state *cpustate) /* Opcode 0x8f */ } -#define XchgAXReg(Reg) \ -{ \ - WORD tmp; \ - tmp = cpustate->regs.w[Reg]; \ - cpustate->regs.w[Reg] = cpustate->regs.w[AX]; \ +#define XchgAXReg(Reg) \ +{ \ + WORD tmp; \ + tmp = cpustate->regs.w[Reg]; \ + cpustate->regs.w[Reg] = cpustate->regs.w[AX]; \ cpustate->regs.w[AX] = tmp; \ ICOUNT -= timing.xchg_ar16; \ } diff --git a/src/emu/cpu/i86/table186.h b/src/emu/cpu/i86/table186.h index d7fd9e4198e..0a8669413ed 100644 --- a/src/emu/cpu/i86/table186.h +++ b/src/emu/cpu/i86/table186.h @@ -47,7 +47,7 @@ static void (*const PREFIX186(_instruction)[256])(i8086_state *cpustate) = PREFIX86(_sub_ald8), /* 0x2c */ PREFIX86(_sub_axd16), /* 0x2d */ PREFIX86(_cs), /* 0x2e */ - PREFIX86(_das), /* 0x2f */ + PREFIX86(_das), /* 0x2f */ PREFIX86(_xor_br8), /* 0x30 */ PREFIX86(_xor_wr16), /* 0x31 */ PREFIX86(_xor_r8b), /* 0x32 */ @@ -55,7 +55,7 @@ static void (*const PREFIX186(_instruction)[256])(i8086_state *cpustate) = PREFIX86(_xor_ald8), /* 0x34 */ PREFIX86(_xor_axd16), /* 0x35 */ PREFIX86(_ss), /* 0x36 */ - PREFIX86(_aaa), /* 0x37 */ + PREFIX86(_aaa), /* 0x37 */ PREFIX86(_cmp_br8), /* 0x38 */ PREFIX86(_cmp_wr16), /* 0x39 */ PREFIX86(_cmp_r8b), /* 0x3a */ @@ -63,7 +63,7 @@ static void (*const PREFIX186(_instruction)[256])(i8086_state *cpustate) = PREFIX86(_cmp_ald8), /* 0x3c */ PREFIX86(_cmp_axd16), /* 0x3d */ PREFIX86(_ds), /* 0x3e */ - PREFIX86(_aas), /* 0x3f */ + PREFIX86(_aas), /* 0x3f */ PREFIX86(_inc_ax), /* 0x40 */ PREFIX86(_inc_cx), /* 0x41 */ PREFIX86(_inc_dx), /* 0x42 */ @@ -130,7 +130,7 @@ static void (*const PREFIX186(_instruction)[256])(i8086_state *cpustate) = PREFIX86(_jnle), /* 0x7f */ PREFIX86(_80pre), /* 0x80 */ PREFIX86(_81pre), /* 0x81 */ - PREFIX86(_82pre), /* 0x82 */ + PREFIX86(_82pre), /* 0x82 */ PREFIX86(_83pre), /* 0x83 */ PREFIX86(_test_br8), /* 0x84 */ PREFIX86(_test_wr16), /* 0x85 */ @@ -244,7 +244,7 @@ static void (*const PREFIX186(_instruction)[256])(i8086_state *cpustate) = PREFIX86(_invalid), /* 0xf1 */ PREFIX186(_repne), /* 0xf2 */ PREFIX186(_repe), /* 0xf3 */ - PREFIX86(_hlt), /* 0xf4 */ + PREFIX86(_hlt), /* 0xf4 */ PREFIX86(_cmc), /* 0xf5 */ PREFIX86(_f6pre), /* 0xf6 */ PREFIX86(_f7pre), /* 0xf7 */ diff --git a/src/emu/cpu/i860/i860.c b/src/emu/cpu/i860/i860.c index eabf5f62768..173e2e2d0e5 100644 --- a/src/emu/cpu/i860/i860.c +++ b/src/emu/cpu/i860/i860.c @@ -91,9 +91,9 @@ static CPU_SET_INFO( i860 ) case CPUINFO_INT_REGISTER + I860_FIR: cpustate->cregs[CR_FIR] = info->i & 0xffffffff; break; case CPUINFO_INT_REGISTER + I860_PSR: cpustate->cregs[CR_PSR] = info->i & 0xffffffff; break; case CPUINFO_INT_REGISTER + I860_DIRBASE: cpustate->cregs[CR_DIRBASE] = info->i & 0xffffffff; break; - case CPUINFO_INT_REGISTER + I860_DB: cpustate->cregs[CR_DB] = info->i & 0xffffffff; break; + case CPUINFO_INT_REGISTER + I860_DB: cpustate->cregs[CR_DB] = info->i & 0xffffffff; break; case CPUINFO_INT_REGISTER + I860_FSR: cpustate->cregs[CR_FSR] = info->i & 0xffffffff; break; - case CPUINFO_INT_REGISTER + I860_EPSR: cpustate->cregs[CR_EPSR] = info->i & 0xffffffff; break; + case CPUINFO_INT_REGISTER + I860_EPSR: cpustate->cregs[CR_EPSR] = info->i & 0xffffffff; break; case CPUINFO_INT_REGISTER + I860_R0: cpustate->iregs[0] = info->i & 0xffffffff; break; case CPUINFO_INT_REGISTER + I860_R1: cpustate->iregs[1] = info->i & 0xffffffff; break; @@ -195,11 +195,11 @@ CPU_GET_INFO( i860 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_PC: case CPUINFO_INT_REGISTER + I860_PC: info->i = cpustate->pc; break; @@ -280,19 +280,19 @@ CPU_GET_INFO( i860 ) /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i860); break; - case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i860); break; + case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i860); break; + case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i860); break; case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(i860); break; - case CPUINFO_FCT_EXIT: info->exit = NULL; break; - case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(i860); break; - case CPUINFO_FCT_BURN: info->burn = NULL; break; + case CPUINFO_FCT_EXIT: info->exit = NULL; break; + case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(i860); break; + case CPUINFO_FCT_BURN: info->burn = NULL; break; case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i860); break; case CPUINFO_FCT_DEBUG_INIT: info->debug_init = NULL; break; case CPUINFO_FCT_TRANSLATE: info->translate = NULL; break; - case CPUINFO_FCT_READ: info->read = NULL; break; + case CPUINFO_FCT_READ: info->read = NULL; break; case CPUINFO_FCT_WRITE: info->write = NULL; break; - case CPUINFO_FCT_READOP: info->readop = NULL; break; - case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break; + case CPUINFO_FCT_READOP: info->readop = NULL; break; + case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case DEVINFO_STR_NAME: strcpy(info->s, "i860XR"); break; diff --git a/src/emu/cpu/i860/i860dasm.c b/src/emu/cpu/i860/i860dasm.c index c4b457474f2..3440236c822 100644 --- a/src/emu/cpu/i860/i860dasm.c +++ b/src/emu/cpu/i860/i860dasm.c @@ -64,30 +64,30 @@ CPU_DISASSEMBLE( i860 ) case 0x00: case 0x01: case 0x04: - case 0x05: i860_dasm_ldx(op, tempB); break; + case 0x05: i860_dasm_ldx(op, tempB); break; case 0x03: - case 0x07: i860_dasm_stx(op, tempB); break; + case 0x07: i860_dasm_stx(op, tempB); break; - case 0x02: i860_dasm_ixfr(op, tempB); break; + case 0x02: i860_dasm_ixfr(op, tempB); break; - case 0x06: sprintf(tempB, "(reserved)"); break; + case 0x06: sprintf(tempB, "(reserved)"); break; case 0x08: case 0x09: case 0x0a: - case 0x0b: i860_dasm_fid_fst(op, tempB); break; + case 0x0b: i860_dasm_fid_fst(op, tempB); break; - case 0x0d: i860_dasm_flush(op, tempB); break; + case 0x0d: i860_dasm_flush(op, tempB); break; - case 0x0f: i860_dasm_pstd(op, tempB); break; + case 0x0f: i860_dasm_pstd(op, tempB); break; case 0x0c: - case 0x0e: i860_dasm_ldc_sdc(op, tempB); break; + case 0x0e: i860_dasm_ldc_sdc(op, tempB); break; - case 0x10: i860_dasm_bri(op, tempB); break; + case 0x10: i860_dasm_bri(op, tempB); break; - case 0x11: i860_dasm_trap(op, tempB); break; + case 0x11: i860_dasm_trap(op, tempB); break; case 0x12: i860_dasm_floating_point_dasm(op, tempB); break; /* Floating point operation sub-group */ @@ -96,10 +96,10 @@ CPU_DISASSEMBLE( i860 ) case 0x14: case 0x15: case 0x16: - case 0x17: i860_dasm_bte_btne(op, tempB); break; + case 0x17: i860_dasm_bte_btne(op, tempB); break; case 0x18: - case 0x19: i860_dasm_pfidy(op, tempB); break; + case 0x19: i860_dasm_pfidy(op, tempB); break; case 0x1a: case 0x1b: @@ -115,24 +115,24 @@ CPU_DISASSEMBLE( i860 ) case 0x24: case 0x25: case 0x26: - case 0x27: i860_dasm_addu_subu(op, tempB); break; + case 0x27: i860_dasm_addu_subu(op, tempB); break; case 0x28: case 0x29: case 0x2a: - case 0x2b: i860_dasm_shl_shr(op, tempB); break; + case 0x2b: i860_dasm_shl_shr(op, tempB); break; - case 0x2c: i860_dasm_shrd(op, tempB); break; + case 0x2c: i860_dasm_shrd(op, tempB); break; - case 0x2d: i860_dasm_bla(op, tempB); break; + case 0x2d: i860_dasm_bla(op, tempB); break; case 0x2e: - case 0x2f: i860_dasm_shra(op, tempB); break; + case 0x2f: i860_dasm_shra(op, tempB); break; case 0x30: case 0x31: case 0x32: - case 0x33: i860_dasm_and_andh(op, tempB); break; + case 0x33: i860_dasm_and_andh(op, tempB); break; case 0x34: case 0x35: @@ -147,9 +147,9 @@ CPU_DISASSEMBLE( i860 ) case 0x3c: case 0x3d: case 0x3e: - case 0x3f: i860_dasm_xor_xorh(op, tempB); break; + case 0x3f: i860_dasm_xor_xorh(op, tempB); break; - default: sprintf(tempB, "(reserved)"); break; + default: sprintf(tempB, "(reserved)"); break; } /* More Debug */ @@ -203,8 +203,8 @@ static void i860_dasm_CTRL_dasm(const UINT32 op, char* buffer) switch(opc) { - case 0x02: i860_dasm_CTRL_br(op, buffer); break; - case 0x03: i860_dasm_CTRL_call(op, buffer); break; + case 0x02: i860_dasm_CTRL_br(op, buffer); break; + case 0x03: i860_dasm_CTRL_call(op, buffer); break; case 0x04: case 0x05: i860_dasm_CTRL_bc_bct(op, buffer); break; case 0x06: case 0x07: i860_dasm_CTRL_bnc_bnct(op, buffer); break; diff --git a/src/emu/cpu/i960/i960.c b/src/emu/cpu/i960/i960.c index 1f0d1b662a6..b6f0264a781 100644 --- a/src/emu/cpu/i960/i960.c +++ b/src/emu/cpu/i960/i960.c @@ -477,7 +477,7 @@ static void check_irqs(i960_state_t *i960) wordl = (lvl % 4) * 8; wordh = (wordl + 8) - 1; - vword = memory_read_dword_32le(i960->program, int_tab + word); + vword = memory_read_dword_32le(i960->program, int_tab + word); // take the first vector we find for this level for (irq = wordh; irq >= wordl; irq--) { @@ -2080,7 +2080,7 @@ static CPU_INIT( i960 ) state_save_register_device_item(device, 0, i960->AC); state_save_register_device_item(device, 0, i960->ICR); state_save_register_device_item_array(device, 0, i960->r); - state_save_register_device_item_array(device, 0, i960->fp); + state_save_register_device_item_array(device, 0, i960->fp); state_save_register_device_item_2d_array(device, 0, i960->rcache); state_save_register_device_item_array(device, 0, i960->rcache_frame_addr); } diff --git a/src/emu/cpu/i960/i960dis.c b/src/emu/cpu/i960/i960dis.c index 896395641ab..fb271953236 100644 --- a/src/emu/cpu/i960/i960dis.c +++ b/src/emu/cpu/i960/i960dis.c @@ -144,7 +144,7 @@ static char *dis_decode_reg(unsigned long iCode, char* tmpStr,unsigned char cnt) else sprintf(src2,"%s,",regnames[SRC2]); } if(M3) dst[0] = 0; - else sprintf(dst,"%s,",regnames[DST]); + else sprintf(dst,"%s,",regnames[DST]); if (cnt == 1) sprintf(tmpStr,"%s%s",dst,src1); else diff --git a/src/emu/cpu/jaguar/jaguar.c b/src/emu/cpu/jaguar/jaguar.c index a79a1de4ac6..121093a21af 100644 --- a/src/emu/cpu/jaguar/jaguar.c +++ b/src/emu/cpu/jaguar/jaguar.c @@ -51,7 +51,7 @@ CPU_DISASSEMBLE( jaguardsp ); #define SET_N(J,r) ((J)->FLAGS |= (((UINT32)(r) >> 29) & 4)) #define SET_ZN(J,r) SET_N(J,r); SET_Z(J,r) #define SET_ZNC_ADD(J,a,b,r) SET_N(J,r); SET_Z(J,r); SET_C_ADD(J,a,b) -#define SET_ZNC_SUB(J,a,b,r) SET_N(J,r); SET_Z(J,r); SET_C_SUB(J,a,b) +#define SET_ZNC_SUB(J,a,b,r) SET_N(J,r); SET_Z(J,r); SET_C_SUB(J,a,b) @@ -97,7 +97,7 @@ struct _jaguar_state int isdsp; int icount; int bankswitch_icount; - void (*const *table)(jaguar_state *jaguar, UINT16 op); + void (*const *table)(jaguar_state *jaguar, UINT16 op); cpu_irq_callback irq_callback; jaguar_int_func cpu_interrupt; const device_config *device; @@ -1484,7 +1484,7 @@ static CPU_SET_INFO( jaguargpu ) case CPUINFO_INT_REGISTER + JAGUAR_R29: jaguar->r[29] = info->i; break; case CPUINFO_INT_REGISTER + JAGUAR_R30: jaguar->r[30] = info->i; break; case CPUINFO_INT_REGISTER + JAGUAR_R31: jaguar->r[31] = info->i; break; - case CPUINFO_INT_SP: jaguar->b0[31] = info->i; break; + case CPUINFO_INT_SP: jaguar->b0[31] = info->i; break; } } @@ -1576,7 +1576,7 @@ CPU_GET_INFO( jaguargpu ) case DEVINFO_STR_FAMILY: strcpy(info->s, "Atari Jaguar"); break; case DEVINFO_STR_VERSION: strcpy(info->s, "1.0"); break; case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break; - case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright Aaron Giles"); break; + case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright Aaron Giles"); break; case CPUINFO_STR_FLAGS: sprintf(info->s, "%c%c%c%c%c%c%c%c%c%c%c", jaguar->FLAGS & 0x8000 ? 'D':'.', @@ -1589,10 +1589,10 @@ CPU_GET_INFO( jaguargpu ) jaguar->FLAGS & 0x0008 ? 'I':'.', jaguar->FLAGS & 0x0004 ? 'N':'.', jaguar->FLAGS & 0x0002 ? 'C':'.', - jaguar->FLAGS & 0x0001 ? 'Z':'.'); break; + jaguar->FLAGS & 0x0001 ? 'Z':'.'); break; - case CPUINFO_STR_REGISTER + JAGUAR_PC: sprintf(info->s, "PC: %08X", jaguar->PC); break; - case CPUINFO_STR_REGISTER + JAGUAR_FLAGS: sprintf(info->s, "FLAGS: %08X", jaguar->FLAGS); break; + case CPUINFO_STR_REGISTER + JAGUAR_PC: sprintf(info->s, "PC: %08X", jaguar->PC); break; + case CPUINFO_STR_REGISTER + JAGUAR_FLAGS: sprintf(info->s, "FLAGS: %08X", jaguar->FLAGS); break; case CPUINFO_STR_REGISTER + JAGUAR_R0: sprintf(info->s, "R0: %08X", jaguar->r[0]); break; case CPUINFO_STR_REGISTER + JAGUAR_R1: sprintf(info->s, "R1: %08X", jaguar->r[1]); break; case CPUINFO_STR_REGISTER + JAGUAR_R2: sprintf(info->s, "R2: %08X", jaguar->r[2]); break; @@ -1603,28 +1603,28 @@ CPU_GET_INFO( jaguargpu ) case CPUINFO_STR_REGISTER + JAGUAR_R7: sprintf(info->s, "R7: %08X", jaguar->r[7]); break; case CPUINFO_STR_REGISTER + JAGUAR_R8: sprintf(info->s, "R8: %08X", jaguar->r[8]); break; case CPUINFO_STR_REGISTER + JAGUAR_R9: sprintf(info->s, "R9: %08X", jaguar->r[9]); break; - case CPUINFO_STR_REGISTER + JAGUAR_R10: sprintf(info->s, "R10:%08X", jaguar->r[10]); break; - case CPUINFO_STR_REGISTER + JAGUAR_R11: sprintf(info->s, "R11:%08X", jaguar->r[11]); break; - case CPUINFO_STR_REGISTER + JAGUAR_R12: sprintf(info->s, "R12:%08X", jaguar->r[12]); break; - case CPUINFO_STR_REGISTER + JAGUAR_R13: sprintf(info->s, "R13:%08X", jaguar->r[13]); break; - case CPUINFO_STR_REGISTER + JAGUAR_R14: sprintf(info->s, "R14:%08X", jaguar->r[14]); break; - case CPUINFO_STR_REGISTER + JAGUAR_R15: sprintf(info->s, "R15:%08X", jaguar->r[15]); break; - case CPUINFO_STR_REGISTER + JAGUAR_R16: sprintf(info->s, "R16:%08X", jaguar->r[16]); break; - case CPUINFO_STR_REGISTER + JAGUAR_R17: sprintf(info->s, "R17:%08X", jaguar->r[17]); break; - case CPUINFO_STR_REGISTER + JAGUAR_R18: sprintf(info->s, "R18:%08X", jaguar->r[18]); break; - case CPUINFO_STR_REGISTER + JAGUAR_R19: sprintf(info->s, "R19:%08X", jaguar->r[19]); break; - case CPUINFO_STR_REGISTER + JAGUAR_R20: sprintf(info->s, "R20:%08X", jaguar->r[20]); break; - case CPUINFO_STR_REGISTER + JAGUAR_R21: sprintf(info->s, "R21:%08X", jaguar->r[21]); break; - case CPUINFO_STR_REGISTER + JAGUAR_R22: sprintf(info->s, "R22:%08X", jaguar->r[22]); break; - case CPUINFO_STR_REGISTER + JAGUAR_R23: sprintf(info->s, "R23:%08X", jaguar->r[23]); break; - case CPUINFO_STR_REGISTER + JAGUAR_R24: sprintf(info->s, "R24:%08X", jaguar->r[24]); break; - case CPUINFO_STR_REGISTER + JAGUAR_R25: sprintf(info->s, "R25:%08X", jaguar->r[25]); break; - case CPUINFO_STR_REGISTER + JAGUAR_R26: sprintf(info->s, "R26:%08X", jaguar->r[26]); break; - case CPUINFO_STR_REGISTER + JAGUAR_R27: sprintf(info->s, "R27:%08X", jaguar->r[27]); break; - case CPUINFO_STR_REGISTER + JAGUAR_R28: sprintf(info->s, "R28:%08X", jaguar->r[28]); break; - case CPUINFO_STR_REGISTER + JAGUAR_R29: sprintf(info->s, "R29:%08X", jaguar->r[29]); break; - case CPUINFO_STR_REGISTER + JAGUAR_R30: sprintf(info->s, "R30:%08X", jaguar->r[30]); break; - case CPUINFO_STR_REGISTER + JAGUAR_R31: sprintf(info->s, "R31:%08X", jaguar->r[31]); break; + case CPUINFO_STR_REGISTER + JAGUAR_R10: sprintf(info->s, "R10:%08X", jaguar->r[10]); break; + case CPUINFO_STR_REGISTER + JAGUAR_R11: sprintf(info->s, "R11:%08X", jaguar->r[11]); break; + case CPUINFO_STR_REGISTER + JAGUAR_R12: sprintf(info->s, "R12:%08X", jaguar->r[12]); break; + case CPUINFO_STR_REGISTER + JAGUAR_R13: sprintf(info->s, "R13:%08X", jaguar->r[13]); break; + case CPUINFO_STR_REGISTER + JAGUAR_R14: sprintf(info->s, "R14:%08X", jaguar->r[14]); break; + case CPUINFO_STR_REGISTER + JAGUAR_R15: sprintf(info->s, "R15:%08X", jaguar->r[15]); break; + case CPUINFO_STR_REGISTER + JAGUAR_R16: sprintf(info->s, "R16:%08X", jaguar->r[16]); break; + case CPUINFO_STR_REGISTER + JAGUAR_R17: sprintf(info->s, "R17:%08X", jaguar->r[17]); break; + case CPUINFO_STR_REGISTER + JAGUAR_R18: sprintf(info->s, "R18:%08X", jaguar->r[18]); break; + case CPUINFO_STR_REGISTER + JAGUAR_R19: sprintf(info->s, "R19:%08X", jaguar->r[19]); break; + case CPUINFO_STR_REGISTER + JAGUAR_R20: sprintf(info->s, "R20:%08X", jaguar->r[20]); break; + case CPUINFO_STR_REGISTER + JAGUAR_R21: sprintf(info->s, "R21:%08X", jaguar->r[21]); break; + case CPUINFO_STR_REGISTER + JAGUAR_R22: sprintf(info->s, "R22:%08X", jaguar->r[22]); break; + case CPUINFO_STR_REGISTER + JAGUAR_R23: sprintf(info->s, "R23:%08X", jaguar->r[23]); break; + case CPUINFO_STR_REGISTER + JAGUAR_R24: sprintf(info->s, "R24:%08X", jaguar->r[24]); break; + case CPUINFO_STR_REGISTER + JAGUAR_R25: sprintf(info->s, "R25:%08X", jaguar->r[25]); break; + case CPUINFO_STR_REGISTER + JAGUAR_R26: sprintf(info->s, "R26:%08X", jaguar->r[26]); break; + case CPUINFO_STR_REGISTER + JAGUAR_R27: sprintf(info->s, "R27:%08X", jaguar->r[27]); break; + case CPUINFO_STR_REGISTER + JAGUAR_R28: sprintf(info->s, "R28:%08X", jaguar->r[28]); break; + case CPUINFO_STR_REGISTER + JAGUAR_R29: sprintf(info->s, "R29:%08X", jaguar->r[29]); break; + case CPUINFO_STR_REGISTER + JAGUAR_R30: sprintf(info->s, "R30:%08X", jaguar->r[30]); break; + case CPUINFO_STR_REGISTER + JAGUAR_R31: sprintf(info->s, "R31:%08X", jaguar->r[31]); break; } } diff --git a/src/emu/cpu/konami/konami.c b/src/emu/cpu/konami/konami.c index 7996844851f..5b34283ec8e 100644 --- a/src/emu/cpu/konami/konami.c +++ b/src/emu/cpu/konami/konami.c @@ -51,7 +51,7 @@ struct _konami_state PAIR dp; /* Direct Page register (page in MSB) */ PAIR u, s; /* Stack pointers */ PAIR x, y; /* Index registers */ - PAIR ea; + PAIR ea; UINT8 cc; UINT8 ireg; UINT8 irq_state[2]; @@ -236,9 +236,9 @@ CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N #define EXTWORD(cs,w) EXTENDED(cs); w.d=RM16(cs,EAD) /* macros for branch instructions */ -#define BRANCH(cs,f) { \ +#define BRANCH(cs,f) { \ UINT8 t; \ - IMMBYTE(cs,t); \ + IMMBYTE(cs,t); \ if( f ) \ { \ PC += SIGNED(t); \ @@ -247,7 +247,7 @@ CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N #define LBRANCH(cs,f) { \ PAIR t; \ - IMMWORD(cs,t); \ + IMMWORD(cs,t); \ if( f ) \ { \ cpustate->icount -= 1; \ @@ -261,10 +261,10 @@ CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N #define GETREG(val,reg) \ switch(reg) { \ case 0: val = A; break; \ - case 1: val = B; break; \ - case 2: val = X; break; \ - case 3: val = Y; break; \ - case 4: val = S; break; /* ? */ \ + case 1: val = B; break; \ + case 2: val = X; break; \ + case 3: val = Y; break; \ + case 4: val = S; break; /* ? */ \ case 5: val = U; break; \ default: val = 0xff; logerror("Unknown TFR/EXG idx at PC:%04x\n", PC ); break; \ } @@ -273,10 +273,10 @@ CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N switch(reg) { \ case 0: A = val; break; \ case 1: B = val; break; \ - case 2: X = val; break; \ + case 2: X = val; break; \ case 3: Y = val; break; \ case 4: S = val; break; /* ? */ \ - case 5: U = val; break; \ + case 5: U = val; break; \ default: logerror("Unknown TFR/EXG idx at PC:%04x\n", PC ); break; \ } @@ -526,7 +526,7 @@ static CPU_SET_INFO( konami ) case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break; case CPUINFO_INT_PC: - case CPUINFO_INT_REGISTER + KONAMI_PC: PC = info->i; break; + case CPUINFO_INT_REGISTER + KONAMI_PC: PC = info->i; break; case CPUINFO_INT_SP: case CPUINFO_INT_REGISTER + KONAMI_S: S = info->i; break; case CPUINFO_INT_REGISTER + KONAMI_CC: CC = info->i; break; @@ -566,11 +566,11 @@ CPU_GET_INFO( konami ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + KONAMI_IRQ_LINE: info->i = cpustate->irq_state[KONAMI_IRQ_LINE]; break; case CPUINFO_INT_INPUT_STATE + KONAMI_FIRQ_LINE:info->i = cpustate->irq_state[KONAMI_FIRQ_LINE]; break; diff --git a/src/emu/cpu/lh5801/lh5801.c b/src/emu/cpu/lh5801/lh5801.c index 12f49533ac7..8fb559c6714 100644 --- a/src/emu/cpu/lh5801/lh5801.c +++ b/src/emu/cpu/lh5801/lh5801.c @@ -203,11 +203,11 @@ CPU_GET_INFO( lh5801 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE: info->i = cpustate->irq_state; break; diff --git a/src/emu/cpu/lr35902/lr35902.c b/src/emu/cpu/lr35902/lr35902.c index 645157f2019..8f55ddd88d7 100644 --- a/src/emu/cpu/lr35902/lr35902.c +++ b/src/emu/cpu/lr35902/lr35902.c @@ -394,9 +394,9 @@ static CPU_SET_INFO( lr35902 ) case CPUINFO_INT_INPUT_STATE + 4: lr35902_set_irq_line(cpustate, state-CPUINFO_INT_INPUT_STATE, info->i); break; case CPUINFO_INT_SP: cpustate->w.SP = info->i; break; - case CPUINFO_INT_PC: cpustate->w.PC = info->i; break; + case CPUINFO_INT_PC: cpustate->w.PC = info->i; break; - case CPUINFO_INT_REGISTER + LR35902_PC: cpustate->w.PC = info->i; break; + case CPUINFO_INT_REGISTER + LR35902_PC: cpustate->w.PC = info->i; break; case CPUINFO_INT_REGISTER + LR35902_SP: cpustate->w.SP = info->i; break; case CPUINFO_INT_REGISTER + LR35902_AF: cpustate->w.AF = info->i; break; case CPUINFO_INT_REGISTER + LR35902_BC: cpustate->w.BC = info->i; break; @@ -430,11 +430,11 @@ CPU_GET_INFO( lr35902 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 16; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 16; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_SP: info->i = cpustate->w.SP; break; case CPUINFO_INT_PC: info->i = cpustate->w.PC; break; @@ -466,11 +466,11 @@ CPU_GET_INFO( lr35902 ) case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->w.icount; break; /* --- the following bits of info are returned as NULL-terminated strings --- */ - case DEVINFO_STR_NAME: strcpy(info->s, "LR35902"); break; - case DEVINFO_STR_FAMILY: strcpy(info->s, "Sharp LR35902"); break; - case DEVINFO_STR_VERSION: strcpy(info->s, "1.4"); break; - case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break; - case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright The MESS Team."); break; + case DEVINFO_STR_NAME: strcpy(info->s, "LR35902"); break; + case DEVINFO_STR_FAMILY: strcpy(info->s, "Sharp LR35902"); break; + case DEVINFO_STR_VERSION: strcpy(info->s, "1.4"); break; + case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break; + case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright The MESS Team."); break; case CPUINFO_STR_FLAGS: sprintf(info->s, "%c%c%c%c%c%c%c%c", diff --git a/src/emu/cpu/m37710/m37710.c b/src/emu/cpu/m37710/m37710.c index dc9a6a7a7fc..af38dbdde09 100644 --- a/src/emu/cpu/m37710/m37710.c +++ b/src/emu/cpu/m37710/m37710.c @@ -173,7 +173,7 @@ static const char *const m37710_rnames[128] = "A/D 7", "", "UART0 transmit/recv mode", // 48 (0x30) - "UART0 baud rate", // 0x31 + "UART0 baud rate", // 0x31 "UART0 transmit buf L", // 0x32 "UART0 transmit buf H", // 0x33 "UART0 transmit/recv ctrl 0", // 0x34 @@ -326,7 +326,7 @@ static void m37710_recalc_timer(m37710i_cpu_struct *cpustate, int timer) { switch (cpustate->m37710_regs[0x56+timer] & 0x3) { - case 0: // timer mode + case 0: // timer mode time = attotime_mul(ATTOTIME_IN_HZ(cpu_get_clock(cpustate->device)), tscales[cpustate->m37710_regs[tcr[timer]]>>6]); time = attotime_mul(time, tval + 1); @@ -338,7 +338,7 @@ static void m37710_recalc_timer(m37710i_cpu_struct *cpustate, int timer) cpustate->reload[timer] = time; break; - case 1: // event counter mode + case 1: // event counter mode #if M37710_DEBUG mame_printf_debug("Timer %d in event counter mode\n", timer); #endif @@ -350,7 +350,7 @@ static void m37710_recalc_timer(m37710i_cpu_struct *cpustate, int timer) #endif break; - case 3: // PWM mode + case 3: // PWM mode #if M37710_DEBUG mame_printf_debug("Timer %d in PWM mode\n", timer); #endif @@ -361,7 +361,7 @@ static void m37710_recalc_timer(m37710i_cpu_struct *cpustate, int timer) { switch (cpustate->m37710_regs[0x56+timer] & 0x3) { - case 0: // timer mode + case 0: // timer mode time = attotime_mul(ATTOTIME_IN_HZ(cpu_get_clock(cpustate->device)), tscales[cpustate->m37710_regs[tcr[timer]]>>6]); time = attotime_mul(time, tval + 1); @@ -373,7 +373,7 @@ static void m37710_recalc_timer(m37710i_cpu_struct *cpustate, int timer) cpustate->reload[timer] = time; break; - case 1: // event counter mode + case 1: // event counter mode #if M37710_DEBUG mame_printf_debug("Timer %d in event counter mode\n", timer); #endif @@ -513,7 +513,7 @@ static void m37710_internal_w(m37710i_cpu_struct *cpustate, int offset, UINT8 da return; - case 0x60: // watchdog reset + case 0x60: // watchdog reset return; } @@ -971,9 +971,9 @@ static CPU_SET_INFO( m37710 ) { /* --- the following bits of info are set as 64-bit signed integers --- */ case CPUINFO_INT_INPUT_STATE + M37710_LINE_ADC: m37710_set_irq_line(cpustate, M37710_LINE_ADC, info->i); break; - case CPUINFO_INT_INPUT_STATE + M37710_LINE_IRQ0: m37710_set_irq_line(cpustate, M37710_LINE_IRQ0, info->i); break; - case CPUINFO_INT_INPUT_STATE + M37710_LINE_IRQ1: m37710_set_irq_line(cpustate, M37710_LINE_IRQ1, info->i); break; - case CPUINFO_INT_INPUT_STATE + M37710_LINE_IRQ2: m37710_set_irq_line(cpustate, M37710_LINE_IRQ2, info->i); break; + case CPUINFO_INT_INPUT_STATE + M37710_LINE_IRQ0: m37710_set_irq_line(cpustate, M37710_LINE_IRQ0, info->i); break; + case CPUINFO_INT_INPUT_STATE + M37710_LINE_IRQ1: m37710_set_irq_line(cpustate, M37710_LINE_IRQ1, info->i); break; + case CPUINFO_INT_INPUT_STATE + M37710_LINE_IRQ2: m37710_set_irq_line(cpustate, M37710_LINE_IRQ2, info->i); break; case CPUINFO_INT_INPUT_STATE + M37710_LINE_TIMERA0TICK: m37710_external_tick(cpustate, state - CPUINFO_INT_INPUT_STATE - M37710_LINE_TIMERA0TICK, info->i); break; case CPUINFO_INT_INPUT_STATE + M37710_LINE_TIMERA1TICK: m37710_external_tick(cpustate, state - CPUINFO_INT_INPUT_STATE - M37710_LINE_TIMERA0TICK, info->i); break; @@ -985,7 +985,7 @@ static CPU_SET_INFO( m37710 ) case CPUINFO_INT_INPUT_STATE + M37710_LINE_TIMERB2TICK: m37710_external_tick(cpustate, state - CPUINFO_INT_INPUT_STATE - M37710_LINE_TIMERA0TICK, info->i); break; case CPUINFO_INT_PC: REG_PB = info->i & 0xff0000; m37710_set_pc(cpustate, info->i & 0xffff); break; - case CPUINFO_INT_SP: m37710_set_sp(cpustate, info->i); break; + case CPUINFO_INT_SP: m37710_set_sp(cpustate, info->i); break; case CPUINFO_INT_REGISTER + M37710_PC: m37710_set_reg(cpustate, M37710_PC, info->i); break; case CPUINFO_INT_REGISTER + M37710_S: m37710_set_reg(cpustate, M37710_S, info->i); break; @@ -1028,25 +1028,25 @@ CPU_GET_INFO( m37710 ) case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 6; break; case CPUINFO_INT_MIN_CYCLES: info->i = 1; break; case CPUINFO_INT_MAX_CYCLES: info->i = 20; /* rough guess */ break; - case CPUINFO_INT_INPUT_LINES: info->i = M37710_LINE_MAX; break; + case CPUINFO_INT_INPUT_LINES: info->i = M37710_LINE_MAX; break; case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 16; break; case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 24; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 16; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 16; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; - case CPUINFO_INT_INPUT_STATE + M37710_LINE_IRQ0: info->i = 0; break; - case CPUINFO_INT_INPUT_STATE + M37710_LINE_IRQ1: info->i = 0; break; - case CPUINFO_INT_INPUT_STATE + M37710_LINE_IRQ2: info->i = 0; break; + case CPUINFO_INT_INPUT_STATE + M37710_LINE_IRQ0: info->i = 0; break; + case CPUINFO_INT_INPUT_STATE + M37710_LINE_IRQ1: info->i = 0; break; + case CPUINFO_INT_INPUT_STATE + M37710_LINE_IRQ2: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + M37710_LINE_RESET: info->i = 0; break; case CPUINFO_INT_PREVIOUSPC: info->i = REG_PPC; break; - case CPUINFO_INT_PC: info->i = (REG_PB | REG_PC); break; + case CPUINFO_INT_PC: info->i = (REG_PB | REG_PC); break; case CPUINFO_INT_SP: info->i = m37710_get_sp(cpustate); break; case CPUINFO_INT_REGISTER + M37710_PC: info->i = m37710_get_reg(cpustate, M37710_PC); break; diff --git a/src/emu/cpu/m37710/m37710cm.h b/src/emu/cpu/m37710/m37710cm.h index 934dae385e8..c4ff4255be5 100644 --- a/src/emu/cpu/m37710/m37710cm.h +++ b/src/emu/cpu/m37710/m37710cm.h @@ -27,7 +27,7 @@ #define m37710_read_8(addr) memory_read_byte_16le(cpustate->program, addr) #define m37710_write_8(addr,data) memory_write_byte_16le(cpustate->program, addr,data) #define m37710_read_8_immediate(A) memory_read_byte_16le(cpustate->program, A) -#define m37710_read_16(addr) memory_read_word_16le(cpustate->program, addr) +#define m37710_read_16(addr) memory_read_word_16le(cpustate->program, addr) #define m37710_write_16(addr,data) memory_write_word_16le(cpustate->program, addr,data) #define m37710_jumping(A) #define m37710_branching(A) @@ -185,8 +185,8 @@ extern int (*const m37710i_execute[])(m37710i_cpu_struct *cpustate, int cycles); #define FTABLE_SET_REG cpustate->set_reg #define FTABLE_SET_LINE cpustate->set_line -#define SRC cpustate->source /* Source Operand */ -#define DST cpustate->destination /* Destination Operand */ +#define SRC cpustate->source /* Source Operand */ +#define DST cpustate->destination /* Destination Operand */ #define STOP_LEVEL_WAI 1 #define STOP_LEVEL_STOP 2 diff --git a/src/emu/cpu/m37710/m37710op.h b/src/emu/cpu/m37710/m37710op.h index 4762c4f7964..ca3e40e88c9 100644 --- a/src/emu/cpu/m37710/m37710op.h +++ b/src/emu/cpu/m37710/m37710op.h @@ -321,8 +321,8 @@ INLINE void m37710i_interrupt_software(m37710i_cpu_struct *cpustate, uint vector /* Effective-address based memory access macros */ #define read_8_NORM(A) m37710i_read_8_normal(cpustate, A) #define read_8_IMM(A) m37710i_read_8_immediate(cpustate, A) -#define read_8_D(A) m37710i_read_8_direct(cpustate, A) -#define read_8_A(A) m37710i_read_8_normal(cpustate, A) +#define read_8_D(A) m37710i_read_8_direct(cpustate, A) +#define read_8_A(A) m37710i_read_8_normal(cpustate, A) #define read_8_AL(A) m37710i_read_8_normal(cpustate, A) #define read_8_DX(A) m37710i_read_8_direct(cpustate, A) #define read_8_DY(A) m37710i_read_8_direct(cpustate, A) @@ -337,7 +337,7 @@ INLINE void m37710i_interrupt_software(m37710i_cpu_struct *cpustate, uint vector #define read_8_DIY(A) m37710i_read_8_normal(cpustate, A) #define read_8_DLIY(A) m37710i_read_8_normal(cpustate, A) #define read_8_AXI(A) m37710i_read_8_normal(cpustate, A) -#define read_8_S(A) m37710i_read_8_normal(cpustate, A) +#define read_8_S(A) m37710i_read_8_normal(cpustate, A) #define read_8_SIY(A) m37710i_read_8_normal(cpustate, A) #define read_16_NORM(A) m37710i_read_16_normal(cpustate, A) @@ -480,7 +480,7 @@ INLINE void m37710i_interrupt_software(m37710i_cpu_struct *cpustate, uint vector #define OPER_24_DIY(cpustate) read_24_DIY(EA_DIY(cpustate)) #define OPER_24_DLIY(cpustate) read_24_DLIY(EA_DLIY(cpustate)) #define OPER_24_AXI(cpustate) read_24_AXI(EA_AXI(cpustate)) -#define OPER_24_S(cpustate) read_24_S(EA_S(cpustate)) +#define OPER_24_S(cpustate) read_24_S(EA_S(cpustate)) #define OPER_24_SIY(cpustate) read_24_SIY(EA_SIY(cpustate)) INLINE uint EA_IMM8(m37710i_cpu_struct *cpustate) {REG_PC += 1; return REG_PB | MAKE_UINT_16(REG_PC-1);} @@ -1270,24 +1270,24 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_ REG_IM2 = read_8_NORM(EA_##MODE(cpustate)); \ REG_IM = read_8_NORM(REG_PC); \ REG_PC++; \ - DST = OPER_8_IMM(cpustate); \ + DST = OPER_8_IMM(cpustate); \ if ((REG_IM2 & REG_IM) == REG_IM) \ - { \ - CLK(CLK_OP + CLK_RELATIVE_8 + 1); \ + { \ + CLK(CLK_OP + CLK_RELATIVE_8 + 1); \ m37710i_branch_8(cpustate, DST); \ BREAKOUT; \ } #else #define OP_BBS(MODE) \ CLK(CLK_OP + CLK_R16 + CLK_##MODE); \ - REG_IM2 = read_16_NORM(EA_##MODE(cpustate)); \ + REG_IM2 = read_16_NORM(EA_##MODE(cpustate)); \ REG_IM = read_16_NORM(REG_PC); \ REG_PC++; \ REG_PC++; \ - DST = OPER_8_IMM(cpustate); \ + DST = OPER_8_IMM(cpustate); \ if ((REG_IM2 & REG_IM) == REG_IM) \ - { \ - CLK(CLK_OP + CLK_RELATIVE_8 + 1); \ + { \ + CLK(CLK_OP + CLK_RELATIVE_8 + 1); \ m37710i_branch_8(cpustate, DST); \ BREAKOUT; \ } @@ -1301,24 +1301,24 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_ REG_IM2 = read_8_NORM(EA_##MODE(cpustate)); \ REG_IM = read_8_NORM(REG_PC); \ REG_PC++; \ - DST = OPER_8_IMM(cpustate); \ - if ((REG_IM2 & REG_IM) == 0) \ - { \ - CLK(CLK_OP + CLK_RELATIVE_8 + 1); \ + DST = OPER_8_IMM(cpustate); \ + if ((REG_IM2 & REG_IM) == 0) \ + { \ + CLK(CLK_OP + CLK_RELATIVE_8 + 1); \ m37710i_branch_8(cpustate, DST); \ BREAKOUT; \ } #else #define OP_BBC(MODE) \ CLK(CLK_OP + CLK_R16 + CLK_##MODE); \ - REG_IM2 = read_16_NORM(EA_##MODE(cpustate)); \ + REG_IM2 = read_16_NORM(EA_##MODE(cpustate)); \ REG_IM = read_16_NORM(REG_PC); \ REG_PC++; \ REG_PC++; \ - DST = OPER_8_IMM(cpustate); \ + DST = OPER_8_IMM(cpustate); \ if ((REG_IM2 & REG_IM) == 0) \ - { \ - CLK(CLK_OP + CLK_RELATIVE_8 + 1); \ + { \ + CLK(CLK_OP + CLK_RELATIVE_8 + 1); \ m37710i_branch_8(cpustate, DST); \ BREAKOUT; \ } @@ -1425,7 +1425,7 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_ REG_A--; \ if ((REG_A&0xffff) != 0) \ {\ - REG_PC -= 3; \ + REG_PC -= 3; \ }\ else \ { \ @@ -1455,7 +1455,7 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_ REG_A--; \ if ((REG_A&0xffff) != 0) \ {\ - REG_PC -= 3; \ + REG_PC -= 3; \ }\ else \ { \ @@ -1489,7 +1489,7 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_ REG_A--; \ if ((REG_A&0xffff) != 0) \ {\ - REG_PC -= 3; \ + REG_PC -= 3; \ }\ else \ { \ @@ -1519,7 +1519,7 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_ REG_A--; \ if ((REG_A&0xffff) != 0) \ {\ - REG_PC -= 3; \ + REG_PC -= 3; \ }\ else \ { \ @@ -2644,7 +2644,7 @@ OP(11a, OP_DECB ( ) ) /* DEB (C) */ OP(11d, OP_ORB ( AX ) ) /* ORB ax */ OP(11f, OP_ORB ( ALX ) ) /* ORB alx (G) */ OP(129, OP_ANDB ( IMM ) ) /* ANDB imm */ -OP(12a, OP_ROLB ( ) ) /* ROL Bacc */ +OP(12a, OP_ROLB ( ) ) /* ROL Bacc */ OP(13a, OP_INCB ( ) ) /* INB (C) */ OP(148, OP_PHAB ( ) ) /* PHB */ OP(149, OP_EORB ( IMM ) ) /* EORB imm */ diff --git a/src/emu/cpu/m6502/6502dasm.c b/src/emu/cpu/m6502/6502dasm.c index 4e63c11472e..25e620e264d 100644 --- a/src/emu/cpu/m6502/6502dasm.c +++ b/src/emu/cpu/m6502/6502dasm.c @@ -497,7 +497,7 @@ static const struct op6502_info opdeco16[256] = {cli,imp},{eor,aby},{ill,non},{ill,non}, {ill,non},{eor,abx},{lsr,abx},{ill,non}, {rts,imp},{adc,idx},{ill,non},{ill,non},/* 60 */ - {ill,non},{adc,zpg},{ror,zpg},{vbl,zpg}, // MISH + {ill,non},{adc,zpg},{ror,zpg},{vbl,zpg}, // MISH {pla,imp},{adc,imm},{ror,acc},{ill,non}, {jmp,ind},{adc,aba},{ror,aba},{ill,non}, {bvs,rel},{adc,idy},{ill,non},{ill,non},/* 70 */ diff --git a/src/emu/cpu/m6502/ill02.h b/src/emu/cpu/m6502/ill02.h index f77aa44cc36..aa1dccd1f7d 100644 --- a/src/emu/cpu/m6502/ill02.h +++ b/src/emu/cpu/m6502/ill02.h @@ -52,7 +52,7 @@ * ASR logical and, logical shift right ***************************************************************/ #define ASR \ - tmp &= A; \ + tmp &= A; \ LSR /* 6510 ******************************************************** @@ -139,7 +139,7 @@ * DCP decrement data and compare ***************************************************************/ #define DCP \ - tmp = (UINT8)(tmp-1); \ + tmp = (UINT8)(tmp-1); \ P &= ~F_C; \ if (A >= tmp) \ P |= F_C; \ @@ -155,7 +155,7 @@ * ISB increment and subtract with carry ***************************************************************/ #define ISB \ - tmp = (UINT8)(tmp+1); \ + tmp = (UINT8)(tmp+1); \ SBC /* 6510 ******************************************************** diff --git a/src/emu/cpu/m6502/m4510.c b/src/emu/cpu/m6502/m4510.c index 60d9f8f7841..37d5ee674bc 100644 --- a/src/emu/cpu/m6502/m4510.c +++ b/src/emu/cpu/m6502/m4510.c @@ -422,7 +422,7 @@ static CPU_SET_INFO( m4510 ) case CPUINFO_INT_INPUT_STATE + M4510_IRQ_LINE: m4510_set_irq_line(cpustate, M4510_IRQ_LINE, info->i); break; case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: m4510_set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break; - case CPUINFO_INT_PC: PCW = info->i; break; + case CPUINFO_INT_PC: PCW = info->i; break; case CPUINFO_INT_REGISTER + M4510_PC: cpustate->pc.w.l = info->i; break; case CPUINFO_INT_SP: SPL = info->i; break; case CPUINFO_INT_REGISTER + M4510_S: cpustate->sp.b.l = info->i; break; @@ -475,13 +475,13 @@ CPU_GET_INFO( m4510 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 20; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_LOGADDR_WIDTH_PROGRAM: info->i = 16; break; - case CPUINFO_INT_PAGE_SHIFT_PROGRAM: info->i = 13; break; + case CPUINFO_INT_PAGE_SHIFT_PROGRAM: info->i = 13; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + M4510_IRQ_LINE: info->i = cpustate->irq_state; break; case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_state; break; diff --git a/src/emu/cpu/m6502/m6502.c b/src/emu/cpu/m6502/m6502.c index 7ca86454d4b..6085aa4a750 100644 --- a/src/emu/cpu/m6502/m6502.c +++ b/src/emu/cpu/m6502/m6502.c @@ -670,7 +670,7 @@ static CPU_SET_INFO( m6502 ) case CPUINFO_INT_INPUT_STATE + M6502_SET_OVERFLOW: m6502_set_irq_line(cpustate, M6502_SET_OVERFLOW, info->i); break; case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: m6502_set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break; - case CPUINFO_INT_PC: PCW = info->i; break; + case CPUINFO_INT_PC: PCW = info->i; break; case CPUINFO_INT_REGISTER + M6502_PC: cpustate->pc.w.l = info->i; break; case CPUINFO_INT_SP: S = info->i; break; case CPUINFO_INT_REGISTER + M6502_S: cpustate->sp.b.l = info->i; break; @@ -711,11 +711,11 @@ CPU_GET_INFO( m6502 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + M6502_IRQ_LINE: info->i = cpustate->irq_state; break; case CPUINFO_INT_INPUT_STATE + M6502_SET_OVERFLOW: info->i = cpustate->so_state; break; @@ -964,7 +964,7 @@ CPU_GET_INFO( deco16 ) { /* --- the following bits of info are returned as 64-bit signed integers --- */ case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 8; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 8; break; /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(deco16); break; diff --git a/src/emu/cpu/m6502/m6509.c b/src/emu/cpu/m6502/m6509.c index 8330c2ad89d..45b402e7b76 100644 --- a/src/emu/cpu/m6502/m6509.c +++ b/src/emu/cpu/m6502/m6509.c @@ -307,7 +307,7 @@ static CPU_SET_INFO( m6509 ) case CPUINFO_INT_INPUT_STATE + M6509_SET_OVERFLOW:m6509_set_irq_line(cpustate, M6509_SET_OVERFLOW, info->i); break; case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: m6509_set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break; - case CPUINFO_INT_PC: PCW = info->i; break; + case CPUINFO_INT_PC: PCW = info->i; break; case CPUINFO_INT_REGISTER + M6509_PC: cpustate->pc.w.l = info->i; break; case CPUINFO_INT_SP: S = info->i; break; case CPUINFO_INT_REGISTER + M6509_S: cpustate->sp.b.l = info->i; break; @@ -350,11 +350,11 @@ CPU_GET_INFO( m6509 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 20; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + M6509_IRQ_LINE: info->i = cpustate->irq_state; break; case CPUINFO_INT_INPUT_STATE + M6509_SET_OVERFLOW:info->i = cpustate->so_state; break; diff --git a/src/emu/cpu/m6502/m65ce02.c b/src/emu/cpu/m6502/m65ce02.c index 7993e3e353d..80f20189c2b 100644 --- a/src/emu/cpu/m6502/m65ce02.c +++ b/src/emu/cpu/m6502/m65ce02.c @@ -54,8 +54,8 @@ #define LOG(x) do { if (VERBOSE) logerror x; } while (0) -typedef struct _m65ce02_Regs m65ce02_Regs; -struct _m65ce02_Regs { +typedef struct _m65ce02_Regs m65ce02_Regs; +struct _m65ce02_Regs { void (*const *insn)(m65ce02_Regs *); /* pointer to the function pointer table */ PAIR ppc; /* previous program counter */ PAIR pc; /* program counter */ @@ -249,7 +249,7 @@ static CPU_SET_INFO( m65ce02 ) m65ce02_Regs *cpustate = get_safe_token(device); switch( state ) - { + { /* --- the following bits of info are set as 64-bit signed integers --- */ case CPUINFO_INT_INPUT_STATE + M65CE02_IRQ_STATE: m65ce02_set_irq_line( cpustate, M65CE02_IRQ_LINE, info->i ); break; case CPUINFO_INT_INPUT_STATE + M65CE02_NMI_STATE: m65ce02_set_irq_line( cpustate, INPUT_LINE_NMI, info->i ); break; diff --git a/src/emu/cpu/m6502/ops02.h b/src/emu/cpu/m6502/ops02.h index 1e7970ff988..4d42ea1d3d6 100644 --- a/src/emu/cpu/m6502/ops02.h +++ b/src/emu/cpu/m6502/ops02.h @@ -479,21 +479,21 @@ * DEC Decrement memory ***************************************************************/ #define DEC \ - tmp = (UINT8)(tmp-1); \ + tmp = (UINT8)(tmp-1); \ SET_NZ(tmp) /* 6502 ******************************************************** * DEX Decrement index X ***************************************************************/ #define DEX \ - X = (UINT8)(X-1); \ + X = (UINT8)(X-1); \ SET_NZ(X) /* 6502 ******************************************************** * DEY Decrement index Y ***************************************************************/ #define DEY \ - Y = (UINT8)(Y-1); \ + Y = (UINT8)(Y-1); \ SET_NZ(Y) /* 6502 ******************************************************** @@ -513,21 +513,21 @@ * INC Increment memory ***************************************************************/ #define INC \ - tmp = (UINT8)(tmp+1); \ + tmp = (UINT8)(tmp+1); \ SET_NZ(tmp) /* 6502 ******************************************************** * INX Increment index X ***************************************************************/ #define INX \ - X = (UINT8)(X+1); \ + X = (UINT8)(X+1); \ SET_NZ(X) /* 6502 ******************************************************** * INY Increment index Y ***************************************************************/ #define INY \ - Y = (UINT8)(Y+1); \ + Y = (UINT8)(Y+1); \ SET_NZ(Y) /* 6502 ******************************************************** diff --git a/src/emu/cpu/m6502/opsc02.h b/src/emu/cpu/m6502/opsc02.h index 873caca416d..2b4977ed7df 100644 --- a/src/emu/cpu/m6502/opsc02.h +++ b/src/emu/cpu/m6502/opsc02.h @@ -333,7 +333,7 @@ ***************************************************************/ #undef BIT_IMM_C02 #define BIT_IMM_C02 \ - P &= ~(F_Z); \ + P &= ~(F_Z); \ if ((tmp & A) == 0) \ P |= F_Z diff --git a/src/emu/cpu/m6502/tdeco16.c b/src/emu/cpu/m6502/tdeco16.c index b37a77dae3f..3b09faeae93 100644 --- a/src/emu/cpu/m6502/tdeco16.c +++ b/src/emu/cpu/m6502/tdeco16.c @@ -15,7 +15,7 @@ PUSH(PCL); \ PUSH(P | F_B); \ P = (P | F_I); \ - PCL = RDMEM(DECO16_IRQ_VEC+1); \ + PCL = RDMEM(DECO16_IRQ_VEC+1); \ PCH = RDMEM(DECO16_IRQ_VEC); @@ -27,47 +27,47 @@ ***************************************************************************** * op temp cycles rdmem opc wrmem ********************/ OP(00) { DECO16_BRK; } /* 7 BRK */ -#define deco16_20 m6502_20 /* 6 JSR ABS */ -#define deco16_40 m6502_40 /* 6 RTI */ -#define deco16_60 m6502_60 /* 6 RTS */ +#define deco16_20 m6502_20 /* 6 JSR ABS */ +#define deco16_40 m6502_40 /* 6 RTI */ +#define deco16_60 m6502_60 /* 6 RTS */ OP(80) { RD_DUM; ILL; } /* 2 ILL */ -#define deco16_a0 m6502_a0 /* 2 LDY IMM */ -#define deco16_c0 m6502_c0 /* 2 CPY IMM */ -#define deco16_e0 m6502_e0 /* 2 CPX IMM */ - -#define deco16_10 m6502_10 /* 2 BPL */ -#define deco16_30 m6502_30 /* 2 BMI */ -#define deco16_50 m6502_50 /* 2 BVC */ -#define deco16_70 m6502_70 /* 2 BVS */ -#define deco16_90 m6502_90 /* 2 BCC */ -#define deco16_b0 m6502_b0 /* 2 BCS */ -#define deco16_d0 m6502_d0 /* 2 BNE */ -#define deco16_f0 m6502_f0 /* 2 BEQ */ - -#define deco16_01 m6502_01 /* 6 ORA IDX */ -#define deco16_21 m6502_21 /* 6 AND IDX */ -#define deco16_41 m6502_41 /* 6 EOR IDX */ -#define deco16_61 m6502_61 /* 6 ADC IDX */ -#define deco16_81 m6502_81 /* 6 STA IDX */ -#define deco16_a1 m6502_a1 /* 6 LDA IDX */ -#define deco16_c1 m6502_c1 /* 6 CMP IDX */ -#define deco16_e1 m6502_e1 /* 6 SBC IDX */ - -#define deco16_11 m6502_11 /* 5 ORA IDY; */ -#define deco16_31 m6502_31 /* 5 AND IDY; */ -#define deco16_51 m6502_51 /* 5 EOR IDY; */ -#define deco16_71 m6502_71 /* 5 ADC IDY; */ -#define deco16_91 m6502_91 /* 6 STA IDY; */ -#define deco16_b1 m6502_b1 /* 5 LDA IDY; */ -#define deco16_d1 m6502_d1 /* 5 CMP IDY; */ -#define deco16_f1 m6502_f1 /* 5 SBC IDY; */ - -OP(02) { RD_DUM; ILL; } /* 2 ILL */ +#define deco16_a0 m6502_a0 /* 2 LDY IMM */ +#define deco16_c0 m6502_c0 /* 2 CPY IMM */ +#define deco16_e0 m6502_e0 /* 2 CPX IMM */ + +#define deco16_10 m6502_10 /* 2 BPL */ +#define deco16_30 m6502_30 /* 2 BMI */ +#define deco16_50 m6502_50 /* 2 BVC */ +#define deco16_70 m6502_70 /* 2 BVS */ +#define deco16_90 m6502_90 /* 2 BCC */ +#define deco16_b0 m6502_b0 /* 2 BCS */ +#define deco16_d0 m6502_d0 /* 2 BNE */ +#define deco16_f0 m6502_f0 /* 2 BEQ */ + +#define deco16_01 m6502_01 /* 6 ORA IDX */ +#define deco16_21 m6502_21 /* 6 AND IDX */ +#define deco16_41 m6502_41 /* 6 EOR IDX */ +#define deco16_61 m6502_61 /* 6 ADC IDX */ +#define deco16_81 m6502_81 /* 6 STA IDX */ +#define deco16_a1 m6502_a1 /* 6 LDA IDX */ +#define deco16_c1 m6502_c1 /* 6 CMP IDX */ +#define deco16_e1 m6502_e1 /* 6 SBC IDX */ + +#define deco16_11 m6502_11 /* 5 ORA IDY; */ +#define deco16_31 m6502_31 /* 5 AND IDY; */ +#define deco16_51 m6502_51 /* 5 EOR IDY; */ +#define deco16_71 m6502_71 /* 5 ADC IDY; */ +#define deco16_91 m6502_91 /* 6 STA IDY; */ +#define deco16_b1 m6502_b1 /* 5 LDA IDY; */ +#define deco16_d1 m6502_d1 /* 5 CMP IDY; */ +#define deco16_f1 m6502_f1 /* 5 SBC IDY; */ + +OP(02) { RD_DUM; ILL; } /* 2 ILL */ OP(22) { RD_DUM; ILL; } /* 2 ILL */ OP(42) { RD_DUM; ILL; } /* 2 ILL */ OP(62) { RD_DUM; ILL; } /* 2 ILL */ OP(82) { RD_DUM; ILL; } /* 2 ILL */ -#define deco16_a2 m6502_a2 /* 2 LDX IMM */ +#define deco16_a2 m6502_a2 /* 2 LDX IMM */ OP(c2) { RD_DUM; ILL; } /* 2 ILL */ OP(e2) { RD_DUM; ILL; } /* 2 ILL */ @@ -120,7 +120,7 @@ OP(13) { int tmp; cpustate->icount -= 1; RD_IMM; //bank select control? - } /* */ + } /* */ OP(33) { RD_DUM; ILL; } /* 2 ILL */ OP(53) { RD_DUM; ILL; } /* 2 ILL */ OP(73) { RD_DUM; ILL; } /* 2 ILL */ @@ -130,13 +130,13 @@ OP(d3) { RD_DUM; ILL; } /* 2 ILL */ OP(f3) { RD_DUM; ILL; } /* 2 ILL */ OP(04) { RD_DUM; ILL; } /* 2 ILL / 3 tsb zpg ?? */ -#define deco16_24 m6502_24 /* 3 BIT ZPG */ +#define deco16_24 m6502_24 /* 3 BIT ZPG */ OP(44) { RD_DUM; ILL; } /* 2 ILL */ OP(64) { RD_DUM; ILL; } /* 2 ILL / 3 stz zpg ?? */ -#define deco16_84 m6502_84 /* 3 STY ZPG */ -#define deco16_a4 m6502_a4 /* 3 LDY ZPG */ -#define deco16_c4 m6502_c4 /* 3 CPY ZPG */ -#define deco16_e4 m6502_e4 /* 3 CPX ZPG */ +#define deco16_84 m6502_84 /* 3 STY ZPG */ +#define deco16_a4 m6502_a4 /* 3 LDY ZPG */ +#define deco16_c4 m6502_c4 /* 3 CPY ZPG */ +#define deco16_e4 m6502_e4 /* 3 CPX ZPG */ OP(14) { RD_DUM; ILL; } /* 2 ILL / 3 trb zpg ?? */ OP(34) { RD_DUM; ILL; } /* 2 ILL / 4 bit zpx ?? */ @@ -145,43 +145,43 @@ OP(74) { RD_DUM; ILL; } /* 2 ILL / 4 stz zpx ?? */ #define deco16_94 m6502_94 /* 4 sty zpx */ #define deco16_b4 m6502_b4 /* 4 ldy zpx */ OP(d4) { RD_DUM; ILL; } /* 2 ILL */ -OP(f4) { RD_DUM; ILL; } /* 2 ILL */ - -#define deco16_05 m6502_05 /* 3 ORA ZPG */ -#define deco16_25 m6502_25 /* 3 AND ZPG */ -#define deco16_45 m6502_45 /* 3 EOR ZPG */ -#define deco16_65 m6502_65 /* 3 ADC ZPG */ -#define deco16_85 m6502_85 /* 3 STA ZPG */ -#define deco16_a5 m6502_a5 /* 3 LDA ZPG */ -#define deco16_c5 m6502_c5 /* 3 CMP ZPG */ -#define deco16_e5 m6502_e5 /* 3 SBC ZPG */ - -#define deco16_15 m6502_15 /* 4 ORA ZPX */ -#define deco16_35 m6502_35 /* 4 AND ZPX */ -#define deco16_55 m6502_55 /* 4 EOR ZPX */ -#define deco16_75 m6502_75 /* 4 ADC ZPX */ -#define deco16_95 m6502_95 /* 4 STA ZPX */ -#define deco16_b5 m6502_b5 /* 4 LDA ZPX */ -#define deco16_d5 m6502_d5 /* 4 CMP ZPX */ -#define deco16_f5 m6502_f5 /* 4 SBC ZPX */ - -#define deco16_06 m6502_06 /* 5 ASL ZPG */ -#define deco16_26 m6502_26 /* 5 ROL ZPG */ -#define deco16_46 m6502_46 /* 5 LSR ZPG */ -#define deco16_66 m6502_66 /* 5 ROR ZPG */ -#define deco16_86 m6502_86 /* 3 STX ZPG */ -#define deco16_a6 m6502_a6 /* 3 LDX ZPG */ -#define deco16_c6 m6502_c6 /* 5 DEC ZPG */ -#define deco16_e6 m6502_e6 /* 5 INC ZPG */ - -#define deco16_16 m6502_16 /* 6 ASL ZPX */ -#define deco16_36 m6502_36 /* 6 ROL ZPX */ -#define deco16_56 m6502_56 /* 6 LSR ZPX */ -#define deco16_76 m6502_76 /* 6 ROR ZPX */ -#define deco16_96 m6502_96 /* 4 STX ZPY */ -#define deco16_b6 m6502_b6 /* 4 LDX ZPY */ -#define deco16_d6 m6502_d6 /* 6 DEC ZPX */ -#define deco16_f6 m6502_f6 /* 6 INC ZPX */ +OP(f4) { RD_DUM; ILL; } /* 2 ILL */ + +#define deco16_05 m6502_05 /* 3 ORA ZPG */ +#define deco16_25 m6502_25 /* 3 AND ZPG */ +#define deco16_45 m6502_45 /* 3 EOR ZPG */ +#define deco16_65 m6502_65 /* 3 ADC ZPG */ +#define deco16_85 m6502_85 /* 3 STA ZPG */ +#define deco16_a5 m6502_a5 /* 3 LDA ZPG */ +#define deco16_c5 m6502_c5 /* 3 CMP ZPG */ +#define deco16_e5 m6502_e5 /* 3 SBC ZPG */ + +#define deco16_15 m6502_15 /* 4 ORA ZPX */ +#define deco16_35 m6502_35 /* 4 AND ZPX */ +#define deco16_55 m6502_55 /* 4 EOR ZPX */ +#define deco16_75 m6502_75 /* 4 ADC ZPX */ +#define deco16_95 m6502_95 /* 4 STA ZPX */ +#define deco16_b5 m6502_b5 /* 4 LDA ZPX */ +#define deco16_d5 m6502_d5 /* 4 CMP ZPX */ +#define deco16_f5 m6502_f5 /* 4 SBC ZPX */ + +#define deco16_06 m6502_06 /* 5 ASL ZPG */ +#define deco16_26 m6502_26 /* 5 ROL ZPG */ +#define deco16_46 m6502_46 /* 5 LSR ZPG */ +#define deco16_66 m6502_66 /* 5 ROR ZPG */ +#define deco16_86 m6502_86 /* 3 STX ZPG */ +#define deco16_a6 m6502_a6 /* 3 LDX ZPG */ +#define deco16_c6 m6502_c6 /* 5 DEC ZPG */ +#define deco16_e6 m6502_e6 /* 5 INC ZPG */ + +#define deco16_16 m6502_16 /* 6 ASL ZPX */ +#define deco16_36 m6502_36 /* 6 ROL ZPX */ +#define deco16_56 m6502_56 /* 6 LSR ZPX */ +#define deco16_76 m6502_76 /* 6 ROR ZPX */ +#define deco16_96 m6502_96 /* 4 STX ZPY */ +#define deco16_b6 m6502_b6 /* 4 LDX ZPY */ +#define deco16_d6 m6502_d6 /* 6 DEC ZPX */ +#define deco16_f6 m6502_f6 /* 6 INC ZPX */ OP(07) { RD_DUM; ILL; } /* 2 ILL / 5 RMB0 ZPG ?? */ OP(27) { RD_DUM; ILL; } /* 2 ILL / 5 RMB2 ZPG ?? */ @@ -198,7 +198,7 @@ OP(67) { OP(87) { int tmp; cpustate->icount -= 1; RD_IMM; logerror("%04x: OP87 %02x\n",PCW,tmp); - } /* */ + } /* */ OP(a7) { RD_DUM; ILL; } /* 2 ILL / 5 SMB2 ZPG ?? */ OP(c7) { RD_DUM; ILL; } /* 2 ILL / 5 SMB4 ZPG ?? */ OP(e7) { RD_DUM; ILL; } /* 2 ILL / 5 SMB6 ZPG ?? */ @@ -212,64 +212,64 @@ OP(b7) { RD_DUM; ILL; } /* 2 ILL / 5 SMB3 ZPG ?? */ OP(d7) { RD_DUM; ILL; } /* 2 ILL / 5 SMB5 ZPG ?? */ OP(f7) { RD_DUM; ILL; } /* 2 ILL / 5 SMB7 ZPG ?? */ -#define deco16_08 m6502_08 /* 3 PHP */ -#define deco16_28 m6502_28 /* 4 PLP */ -#define deco16_48 m6502_48 /* 3 PHA */ -#define deco16_68 m6502_68 /* 4 PLA */ -#define deco16_88 m6502_88 /* 2 DEY */ -#define deco16_a8 m6502_a8 /* 2 TAY */ -#define deco16_c8 m6502_c8 /* 2 INY */ -#define deco16_e8 m6502_e8 /* 2 INX */ - -#define deco16_18 m6502_18 /* 2 CLC */ -#define deco16_38 m6502_38 /* 2 SEC */ -#define deco16_58 m6502_58 /* 2 CLI */ -#define deco16_78 m6502_78 /* 2 SEI */ -#define deco16_98 m6502_98 /* 2 TYA */ -#define deco16_b8 m6502_b8 /* 2 CLV */ -#define deco16_d8 m6502_d8 /* 2 CLD */ -#define deco16_f8 m6502_f8 /* 2 SED */ - -#define deco16_09 m6502_09 /* 2 ORA IMM */ -#define deco16_29 m6502_29 /* 2 AND IMM */ -#define deco16_49 m6502_49 /* 2 EOR IMM */ -#define deco16_69 m6502_69 /* 2 ADC IMM */ +#define deco16_08 m6502_08 /* 3 PHP */ +#define deco16_28 m6502_28 /* 4 PLP */ +#define deco16_48 m6502_48 /* 3 PHA */ +#define deco16_68 m6502_68 /* 4 PLA */ +#define deco16_88 m6502_88 /* 2 DEY */ +#define deco16_a8 m6502_a8 /* 2 TAY */ +#define deco16_c8 m6502_c8 /* 2 INY */ +#define deco16_e8 m6502_e8 /* 2 INX */ + +#define deco16_18 m6502_18 /* 2 CLC */ +#define deco16_38 m6502_38 /* 2 SEC */ +#define deco16_58 m6502_58 /* 2 CLI */ +#define deco16_78 m6502_78 /* 2 SEI */ +#define deco16_98 m6502_98 /* 2 TYA */ +#define deco16_b8 m6502_b8 /* 2 CLV */ +#define deco16_d8 m6502_d8 /* 2 CLD */ +#define deco16_f8 m6502_f8 /* 2 SED */ + +#define deco16_09 m6502_09 /* 2 ORA IMM */ +#define deco16_29 m6502_29 /* 2 AND IMM */ +#define deco16_49 m6502_49 /* 2 EOR IMM */ +#define deco16_69 m6502_69 /* 2 ADC IMM */ #define deco16_89 m65c02_89 /* 2 BIT IMM */ -#define deco16_a9 m6502_a9 /* 2 LDA IMM */ -#define deco16_c9 m6502_c9 /* 2 CMP IMM */ -#define deco16_e9 m6502_e9 /* 2 SBC IMM */ - -#define deco16_19 m6502_19 /* 4 ORA ABY */ -#define deco16_39 m6502_39 /* 4 AND ABY */ -#define deco16_59 m6502_59 /* 4 EOR ABY */ -#define deco16_79 m6502_79 /* 4 ADC ABY */ -#define deco16_99 m6502_99 /* 5 STA ABY */ -#define deco16_b9 m6502_b9 /* 4 LDA ABY */ -#define deco16_d9 m6502_d9 /* 4 CMP ABY */ -#define deco16_f9 m6502_f9 /* 4 SBC ABY */ - -#define deco16_0a m6502_0a /* 2 ASL */ -#define deco16_2a m6502_2a /* 2 ROL */ -#define deco16_4a m6502_4a /* 2 LSR */ -#define deco16_6a m6502_6a /* 2 ROR */ -#define deco16_8a m6502_8a /* 2 TXA */ -#define deco16_aa m6502_aa /* 2 TAX */ -#define deco16_ca m6502_ca /* 2 DEX */ -#define deco16_ea m6502_ea /* 2 NOP */ +#define deco16_a9 m6502_a9 /* 2 LDA IMM */ +#define deco16_c9 m6502_c9 /* 2 CMP IMM */ +#define deco16_e9 m6502_e9 /* 2 SBC IMM */ + +#define deco16_19 m6502_19 /* 4 ORA ABY */ +#define deco16_39 m6502_39 /* 4 AND ABY */ +#define deco16_59 m6502_59 /* 4 EOR ABY */ +#define deco16_79 m6502_79 /* 4 ADC ABY */ +#define deco16_99 m6502_99 /* 5 STA ABY */ +#define deco16_b9 m6502_b9 /* 4 LDA ABY */ +#define deco16_d9 m6502_d9 /* 4 CMP ABY */ +#define deco16_f9 m6502_f9 /* 4 SBC ABY */ + +#define deco16_0a m6502_0a /* 2 ASL */ +#define deco16_2a m6502_2a /* 2 ROL */ +#define deco16_4a m6502_4a /* 2 LSR */ +#define deco16_6a m6502_6a /* 2 ROR */ +#define deco16_8a m6502_8a /* 2 TXA */ +#define deco16_aa m6502_aa /* 2 TAX */ +#define deco16_ca m6502_ca /* 2 DEX */ +#define deco16_ea m6502_ea /* 2 NOP */ #define deco16_1a m65c02_1a /* 2 INA */ #define deco16_3a m65c02_3a /* 2 DEA */ #define deco16_5a m65c02_5a /* 3 PHY */ #define deco16_7a m65c02_7a /* 4 PLY */ -#define deco16_9a m6502_9a /* 2 TXS */ -#define deco16_ba m6502_ba /* 2 TSX */ +#define deco16_9a m6502_9a /* 2 TXS */ +#define deco16_ba m6502_ba /* 2 TSX */ #define deco16_da m65c02_da /* 3 PHX */ #define deco16_fa m65c02_fa /* 4 PLX */ OP(0b) { int tmp; cpustate->icount -= 1; RD_IMM; logerror("%04x: OP0B %02x\n",PCW,tmp); - } + } OP(2b) { RD_DUM; ILL; } /* 2 ILL */ OP(4b) { int tmp; cpustate->icount -= 1; RD_IMM; //logerror("%04x: OP4B %02x\n",PCW,tmp); @@ -281,7 +281,7 @@ OP(4b) { int tmp; cpustate->icount -= 1; RD_IMM; //VBL on expr-raider //VBL on boomrang (bit 2) - } + } OP(6b) { RD_DUM; ILL; } /* 2 ILL */ OP(8b) { RD_DUM; ILL; } /* 2 ILL */ OP(ab) { RD_DUM; ILL; } /* 2 ILL */ @@ -306,13 +306,13 @@ OP(db) { RD_DUM; ILL; } /* 2 ILL */ OP(fb) { RD_DUM; ILL; } /* 2 ILL */ #define deco16_0c m65c02_0c /* 4 TSB ABS */ -#define deco16_2c m6502_2c /* 4 BIT ABS */ -#define deco16_4c m6502_4c /* 3 JMP ABS */ +#define deco16_2c m6502_2c /* 4 BIT ABS */ +#define deco16_4c m6502_4c /* 3 JMP ABS */ #define deco16_6c m65c02_6c /* 5 JMP IND */ -#define deco16_8c m6502_8c /* 4 STY ABS */ -#define deco16_ac m6502_ac /* 4 LDY ABS */ -#define deco16_cc m6502_cc /* 4 CPY ABS */ -#define deco16_ec m6502_ec /* 4 CPX ABS */ +#define deco16_8c m6502_8c /* 4 STY ABS */ +#define deco16_ac m6502_ac /* 4 LDY ABS */ +#define deco16_cc m6502_cc /* 4 CPY ABS */ +#define deco16_ec m6502_ec /* 4 CPX ABS */ #define deco16_1c m65c02_1c /* 4 TRB ABS */ #define deco16_3c m65c02_3c /* 4 BIT ABX */ @@ -323,41 +323,41 @@ OP(5c) { RD_DUM; ILL; } /* 2 ILL */ OP(dc) { RD_DUM; ILL; } /* 2 ILL */ OP(fc) { RD_DUM; ILL; } /* 2 ILL */ -#define deco16_0d m6502_0d /* 4 ORA ABS */ -#define deco16_2d m6502_2d /* 4 AND ABS */ -#define deco16_4d m6502_4d /* 4 EOR ABS */ -#define deco16_6d m6502_6d /* 4 ADC ABS */ -#define deco16_8d m6502_8d /* 4 STA ABS */ -#define deco16_ad m6502_ad /* 4 LDA ABS */ -#define deco16_cd m6502_cd /* 4 CMP ABS */ -#define deco16_ed m6502_ed /* 4 SBC ABS */ - -#define deco16_1d m6502_1d /* 4 ORA ABX */ -#define deco16_3d m6502_3d /* 4 AND ABX */ -#define deco16_5d m6502_5d /* 4 EOR ABX */ -#define deco16_7d m6502_7d /* 4 ADC ABX */ -#define deco16_9d m6502_9d /* 5 STA ABX */ -#define deco16_bd m6502_bd /* 4 LDA ABX */ -#define deco16_dd m6502_dd /* 4 CMP ABX */ -#define deco16_fd m6502_fd /* 4 SBC ABX */ - -#define deco16_0e m6502_0e /* 6 ASL ABS */ -#define deco16_2e m6502_2e /* 6 ROL ABS */ -#define deco16_4e m6502_4e /* 6 LSR ABS */ -#define deco16_6e m6502_6e /* 6 ROR ABS */ -#define deco16_8e m6502_8e /* 4 STX ABS */ -#define deco16_ae m6502_ae /* 4 LDX ABS */ -#define deco16_ce m6502_ce /* 6 DEC ABS */ -#define deco16_ee m6502_ee /* 6 INC ABS */ - -#define deco16_1e m6502_1e /* 7 ASL ABX */ -#define deco16_3e m6502_3e /* 7 ROL ABX */ -#define deco16_5e m6502_5e /* 7 LSR ABX */ -#define deco16_7e m6502_7e /* 7 ROR ABX */ +#define deco16_0d m6502_0d /* 4 ORA ABS */ +#define deco16_2d m6502_2d /* 4 AND ABS */ +#define deco16_4d m6502_4d /* 4 EOR ABS */ +#define deco16_6d m6502_6d /* 4 ADC ABS */ +#define deco16_8d m6502_8d /* 4 STA ABS */ +#define deco16_ad m6502_ad /* 4 LDA ABS */ +#define deco16_cd m6502_cd /* 4 CMP ABS */ +#define deco16_ed m6502_ed /* 4 SBC ABS */ + +#define deco16_1d m6502_1d /* 4 ORA ABX */ +#define deco16_3d m6502_3d /* 4 AND ABX */ +#define deco16_5d m6502_5d /* 4 EOR ABX */ +#define deco16_7d m6502_7d /* 4 ADC ABX */ +#define deco16_9d m6502_9d /* 5 STA ABX */ +#define deco16_bd m6502_bd /* 4 LDA ABX */ +#define deco16_dd m6502_dd /* 4 CMP ABX */ +#define deco16_fd m6502_fd /* 4 SBC ABX */ + +#define deco16_0e m6502_0e /* 6 ASL ABS */ +#define deco16_2e m6502_2e /* 6 ROL ABS */ +#define deco16_4e m6502_4e /* 6 LSR ABS */ +#define deco16_6e m6502_6e /* 6 ROR ABS */ +#define deco16_8e m6502_8e /* 4 STX ABS */ +#define deco16_ae m6502_ae /* 4 LDX ABS */ +#define deco16_ce m6502_ce /* 6 DEC ABS */ +#define deco16_ee m6502_ee /* 6 INC ABS */ + +#define deco16_1e m6502_1e /* 7 ASL ABX */ +#define deco16_3e m6502_3e /* 7 ROL ABX */ +#define deco16_5e m6502_5e /* 7 LSR ABX */ +#define deco16_7e m6502_7e /* 7 ROR ABX */ #define deco16_9e m65c02_9e /* 5 STZ ABX */ -#define deco16_be m6502_be /* 4 LDX ABY */ -#define deco16_de m6502_de /* 7 DEC ABX */ -#define deco16_fe m6502_fe /* 7 INC ABX */ +#define deco16_be m6502_be /* 4 LDX ABY */ +#define deco16_de m6502_de /* 7 DEC ABX */ +#define deco16_fe m6502_fe /* 7 INC ABX */ OP(0f) { RD_DUM; ILL; } /* 2 ILL / 5 BBR0 ZPG ?? */ OP(2f) { RD_DUM; ILL; } /* 2 ILL / 5 BBR2 ZPG ?? */ @@ -372,7 +372,7 @@ OP(8f) { int tmp; cpustate->icount -= 1; RD_IMM; //swap bank in/out - } /* */ + } /* */ OP(af) { RD_DUM; ILL; } /* 2 ILL / 5 BBS2 ZPG ?? */ OP(cf) { RD_DUM; ILL; } /* 2 ILL / 5 BBS4 ZPG ?? */ OP(ef) { RD_DUM; ILL; } /* 2 ILL / 5 BBS6 ZPG ?? */ diff --git a/src/emu/cpu/m6800/6800ops.c b/src/emu/cpu/m6800/6800ops.c index 757906f9853..1f801205d72 100644 --- a/src/emu/cpu/m6800/6800ops.c +++ b/src/emu/cpu/m6800/6800ops.c @@ -1598,7 +1598,7 @@ OP_HANDLER( jsr_ex ) { EXTENDED; PUSHWORD(pPC); - PC = EA; + PC = EA; } /* $be LDS extended -**0- */ diff --git a/src/emu/cpu/m6800/m6800.c b/src/emu/cpu/m6800/m6800.c index be89d658e6c..fd4197d12bc 100644 --- a/src/emu/cpu/m6800/m6800.c +++ b/src/emu/cpu/m6800/m6800.c @@ -148,7 +148,7 @@ struct _m6800_state PAIR timer_over; emu_timer *m6800_rx_timer; emu_timer *m6800_tx_timer; - PAIR ea; /* effective address */ + PAIR ea; /* effective address */ }; @@ -2652,7 +2652,7 @@ static CPU_SET_INFO( m6800 ) case CPUINFO_INT_INPUT_STATE + M6800_TIN_LINE: set_irq_line(cpustate, M6800_TIN_LINE, info->i); break; case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break; - case CPUINFO_INT_PC: PC = info->i; break; + case CPUINFO_INT_PC: PC = info->i; break; case CPUINFO_INT_REGISTER + M6800_PC: cpustate->pc.w.l = info->i; break; case CPUINFO_INT_SP: S = info->i; break; case CPUINFO_INT_REGISTER + M6800_S: cpustate->s.w.l = info->i; break; @@ -2690,11 +2690,11 @@ CPU_GET_INFO( m6800 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 9; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + M6800_IRQ_LINE: info->i = cpustate->irq_state[M6800_IRQ_LINE]; break; case CPUINFO_INT_INPUT_STATE + M6800_TIN_LINE: info->i = cpustate->irq_state[M6800_TIN_LINE]; break; @@ -2763,7 +2763,7 @@ CPU_GET_INFO( m6801 ) /* --- the following bits of info are returned as 64-bit signed integers --- */ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 9; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 9; break; /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m6801); break; @@ -2812,7 +2812,7 @@ CPU_GET_INFO( m6803 ) /* --- the following bits of info are returned as 64-bit signed integers --- */ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 9; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 9; break; /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m6803); break; @@ -2863,7 +2863,7 @@ CPU_GET_INFO( hd63701 ) /* --- the following bits of info are returned as 64-bit signed integers --- */ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 9; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 9; break; /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(hd63701); break; diff --git a/src/emu/cpu/m68000/m68kcpu.c b/src/emu/cpu/m68000/m68kcpu.c index c6a8a1b3a9d..a40563c21e5 100644 --- a/src/emu/cpu/m68000/m68kcpu.c +++ b/src/emu/cpu/m68000/m68kcpu.c @@ -483,7 +483,7 @@ const UINT8 m68ki_ea_idx_cycle_table[64] = CPU STATE DESCRIPTION ***************************************************************************/ -#define MASK_ALL (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010 | CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_EC030 | CPU_TYPE_030 | CPU_TYPE_EC040 | CPU_TYPE_040) +#define MASK_ALL (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010 | CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_EC030 | CPU_TYPE_030 | CPU_TYPE_EC040 | CPU_TYPE_040) #define MASK_24BIT_SPACE (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010 | CPU_TYPE_EC020) #define MASK_32BIT_SPACE (CPU_TYPE_020 | CPU_TYPE_EC030 | CPU_TYPE_030 | CPU_TYPE_EC040 | CPU_TYPE_040) #define MASK_010_OR_LATER (CPU_TYPE_010 | CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040) @@ -912,7 +912,7 @@ static CPU_GET_INFO( m68k ) case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m68k); break; case CPUINFO_FCT_IMPORT_STATE: info->import_state = CPU_IMPORT_STATE_NAME(m68k); break; case CPUINFO_FCT_EXPORT_STATE: info->export_state = CPU_EXPORT_STATE_NAME(m68k); break; - case CPUINFO_FCT_TRANSLATE: info->translate = CPU_TRANSLATE_NAME(m68k); break; + case CPUINFO_FCT_TRANSLATE: info->translate = CPU_TRANSLATE_NAME(m68k); break; /* --- the following bits of info are returned as pointers --- */ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &m68k->remaining_cycles; break; @@ -1284,7 +1284,7 @@ CPU_GET_INFO( m68000 ) /* --- the following bits of info are returned as NULL-terminated strings --- */ case DEVINFO_STR_NAME: strcpy(info->s, "68000"); break; - default: CPU_GET_INFO_CALL(m68k); break; + default: CPU_GET_INFO_CALL(m68k); break; } } @@ -1332,7 +1332,7 @@ CPU_GET_INFO( m68008 ) /* --- the following bits of info are returned as NULL-terminated strings --- */ case DEVINFO_STR_NAME: strcpy(info->s, "68008"); break; - default: CPU_GET_INFO_CALL(m68k); break; + default: CPU_GET_INFO_CALL(m68k); break; } } @@ -1833,7 +1833,7 @@ CPU_GET_INFO( scc68070 ) /* --- the following bits of info are returned as NULL-terminated strings --- */ case DEVINFO_STR_NAME: strcpy(info->s, "SCC68070"); break; - default: CPU_GET_INFO_CALL(m68k); break; + default: CPU_GET_INFO_CALL(m68k); break; } } diff --git a/src/emu/cpu/m68000/m68kcpu.h b/src/emu/cpu/m68000/m68kcpu.h index d0b113b3b47..1343d1acb4b 100644 --- a/src/emu/cpu/m68000/m68kcpu.h +++ b/src/emu/cpu/m68000/m68kcpu.h @@ -471,7 +471,7 @@ typedef struct _m68ki_cpu_core m68ki_cpu_core; /* Get the condition code register */ -#define m68ki_get_ccr(M) ((COND_XS(M) >> 4) | \ +#define m68ki_get_ccr(M) ((COND_XS(M) >> 4) | \ (COND_MI(M) >> 4) | \ (COND_EQ(M) << 2) | \ (COND_VS(M) >> 6) | \ @@ -504,19 +504,19 @@ typedef struct _m68ki_cpu_core m68ki_cpu_core; #define m68ki_read_imm_8(M) MASK_OUT_ABOVE_8(m68ki_read_imm_16(M)) /* Map PC-relative reads */ -#define m68ki_read_pcrel_8(M, A) m68k_read_pcrelative_8(M, A) -#define m68ki_read_pcrel_16(M, A) m68k_read_pcrelative_16(M, A) -#define m68ki_read_pcrel_32(M, A) m68k_read_pcrelative_32(M, A) +#define m68ki_read_pcrel_8(M, A) m68k_read_pcrelative_8(M, A) +#define m68ki_read_pcrel_16(M, A) m68k_read_pcrelative_16(M, A) +#define m68ki_read_pcrel_32(M, A) m68k_read_pcrelative_32(M, A) /* Read from the program space */ -#define m68ki_read_program_8(M, A) m68ki_read_8_fc(M, A, m68k->s_flag | FUNCTION_CODE_USER_PROGRAM) +#define m68ki_read_program_8(M, A) m68ki_read_8_fc(M, A, m68k->s_flag | FUNCTION_CODE_USER_PROGRAM) #define m68ki_read_program_16(M, A) m68ki_read_16_fc(M, A, m68k->s_flag | FUNCTION_CODE_USER_PROGRAM) #define m68ki_read_program_32(M, A) m68ki_read_32_fc(M, A, m68k->s_flag | FUNCTION_CODE_USER_PROGRAM) /* Read from the data space */ #define m68ki_read_data_8(M, A) m68ki_read_8_fc(M, A, m68k->s_flag | FUNCTION_CODE_USER_DATA) -#define m68ki_read_data_16(M, A) m68ki_read_16_fc(M, A, m68k->s_flag | FUNCTION_CODE_USER_DATA) -#define m68ki_read_data_32(M, A) m68ki_read_32_fc(M, A, m68k->s_flag | FUNCTION_CODE_USER_DATA) +#define m68ki_read_data_16(M, A) m68ki_read_16_fc(M, A, m68k->s_flag | FUNCTION_CODE_USER_DATA) +#define m68ki_read_data_32(M, A) m68ki_read_32_fc(M, A, m68k->s_flag | FUNCTION_CODE_USER_DATA) diff --git a/src/emu/cpu/m68000/m68kdasm.c b/src/emu/cpu/m68000/m68kdasm.c index 9a49fedd978..b807ed55e98 100644 --- a/src/emu/cpu/m68000/m68kdasm.c +++ b/src/emu/cpu/m68000/m68kdasm.c @@ -3052,11 +3052,11 @@ static void d68851_p000(void) { if (modes & 0x0200) { - sprintf(g_dasm_str, "pload #%d, %s", (modes>>10)&7, str); + sprintf(g_dasm_str, "pload #%d, %s", (modes>>10)&7, str); } else { - sprintf(g_dasm_str, "pload %s, #%d", str, (modes>>10)&7); + sprintf(g_dasm_str, "pload %s, #%d", str, (modes>>10)&7); } return; } @@ -3098,22 +3098,22 @@ static void d68851_p000(void) { if (modes & 0x0200) { - sprintf(g_dasm_str, "pmovefd %s, %s", g_mmuregs[(modes>>10)&7], str); + sprintf(g_dasm_str, "pmovefd %s, %s", g_mmuregs[(modes>>10)&7], str); } else { - sprintf(g_dasm_str, "pmovefd %s, %s", str, g_mmuregs[(modes>>10)&7]); + sprintf(g_dasm_str, "pmovefd %s, %s", str, g_mmuregs[(modes>>10)&7]); } } else { if (modes & 0x0200) { - sprintf(g_dasm_str, "pmove %s, %s", g_mmuregs[(modes>>10)&7], str); + sprintf(g_dasm_str, "pmove %s, %s", g_mmuregs[(modes>>10)&7], str); } else { - sprintf(g_dasm_str, "pmove %s, %s", str, g_mmuregs[(modes>>10)&7]); + sprintf(g_dasm_str, "pmove %s, %s", str, g_mmuregs[(modes>>10)&7]); } } break; @@ -3121,11 +3121,11 @@ static void d68851_p000(void) case 3: // MC68030 to/from status reg if (modes & 0x0200) { - sprintf(g_dasm_str, "pmove mmusr, %s", str); + sprintf(g_dasm_str, "pmove mmusr, %s", str); } else { - sprintf(g_dasm_str, "pmove %s, mmusr", str); + sprintf(g_dasm_str, "pmove %s, mmusr", str); } break; diff --git a/src/emu/cpu/m68000/m68kmmu.h b/src/emu/cpu/m68000/m68kmmu.h index 3d23b5ff38b..56acc761654 100644 --- a/src/emu/cpu/m68000/m68kmmu.h +++ b/src/emu/cpu/m68000/m68kmmu.h @@ -238,7 +238,7 @@ void m68881_mmu_ops(m68ki_cpu_core *m68k) case 2: // MC68881 form, FD never set if (modes & 0x200) { - switch ((modes>>10) & 7) + switch ((modes>>10) & 7) { case 0: // translation control register WRITE_EA_32(m68k, ea, m68k->mmu_tc); @@ -259,7 +259,7 @@ void m68881_mmu_ops(m68ki_cpu_core *m68k) } else { - switch ((modes>>10) & 7) + switch ((modes>>10) & 7) { case 0: // translation control register m68k->mmu_tc = READ_EA_32(m68k, ea); diff --git a/src/emu/cpu/m6805/6805dasm.c b/src/emu/cpu/m6805/6805dasm.c index 29f23b26c92..f2c47681c9a 100644 --- a/src/emu/cpu/m6805/6805dasm.c +++ b/src/emu/cpu/m6805/6805dasm.c @@ -122,37 +122,37 @@ static const unsigned char disasm[0x100][2] = { #if 0 static const char *const opcode_strings[0x0100] = { - "brset0", "brclr0", "brset1", "brclr1", "brset2", "brclr2", "brset3", "brclr3", /*00*/ + "brset0", "brclr0", "brset1", "brclr1", "brset2", "brclr2", "brset3", "brclr3", /*00*/ "brset4", "brclr4", "brset5", "brclr5", "brset6", "brclr6", "brset7", "brclr7", - "bset0", "bclr0", "bset1", "bclr1", "bset2", "bclr2", "bset3", "bclr3", /*10*/ - "bset4", "bclr4", "bset5", "bclr5", "bset6", "bclr6", "bset7", "bclr7", + "bset0", "bclr0", "bset1", "bclr1", "bset2", "bclr2", "bset3", "bclr3", /*10*/ + "bset4", "bclr4", "bset5", "bclr5", "bset6", "bclr6", "bset7", "bclr7", "bra", "brn", "bhi", "bls", "bcc", "bcs", "bne", "beq", /*20*/ "bhcc", "bhcs", "bpl", "bmi", "bmc", "bms", "bil", "bih", "neg_di", "illegal", "illegal", "com_di", "lsr_di", "illegal", "ror_di", "asr_di", /*30*/ - "asl_di", "rol_di", "dec_di", "illegal", "inc_di", "tst_di", "illegal", "clr_di", - "nega", "illegal", "illegal", "coma", "lsra", "illegal", "rora", "asra", /*40*/ - "asla", "rola", "deca", "illegal", "inca", "tsta", "illegal", "clra", - "negx", "illegal", "illegal", "comx", "lsrx", "illegal", "rorx", "asrx", /*50*/ - "aslx", "rolx", "decx", "illegal", "incx", "tstx", "illegal", "clrx", - "neg_ix1", "illegal", "illegal", "com_ix1", "lsr_ix1", "illegal", "ror_ix1", "asr_ix1", /*60*/ - "asl_ix1", "rol_ix1", "dec_ix1", "illegal", "inc_ix1", "tst_ix1", "jmp_ix1", "clr_ix1", - "neg_ix", "illegal", "illegal", "com_ix", "lsr_ix", "illegal", "ror_ix", "asr_ix", /*70*/ - "asl_ix", "rol_ix", "dec_ix", "illegal", "inc_ix", "tst_ix", "jmp_ix", "clr_ix", + "asl_di", "rol_di", "dec_di", "illegal", "inc_di", "tst_di", "illegal", "clr_di", + "nega", "illegal", "illegal", "coma", "lsra", "illegal", "rora", "asra", /*40*/ + "asla", "rola", "deca", "illegal", "inca", "tsta", "illegal", "clra", + "negx", "illegal", "illegal", "comx", "lsrx", "illegal", "rorx", "asrx", /*50*/ + "aslx", "rolx", "decx", "illegal", "incx", "tstx", "illegal", "clrx", + "neg_ix1", "illegal", "illegal", "com_ix1", "lsr_ix1", "illegal", "ror_ix1", "asr_ix1", /*60*/ + "asl_ix1", "rol_ix1", "dec_ix1", "illegal", "inc_ix1", "tst_ix1", "jmp_ix1", "clr_ix1", + "neg_ix", "illegal", "illegal", "com_ix", "lsr_ix", "illegal", "ror_ix", "asr_ix", /*70*/ + "asl_ix", "rol_ix", "dec_ix", "illegal", "inc_ix", "tst_ix", "jmp_ix", "clr_ix", "rti", "rts", "illegal", "swi", "illegal", "illegal", "illegal", "illegal", /*80*/ "illegal", "illegal", "illegal", "illegal", "illegal", "illegal", "illegal", "illegal", "illegal", "illegal", "illegal", "illegal", "illegal", "illegal", "illegal", "tax", /*90*/ "clc", "sec", "cli", "sei", "rsp", "nop", "illegal", "txa", - "suba_im", "cmpa_im", "sbca_im", "cpx_im", "anda_im", "bita_im", "lda_im", "illegal", /*A0*/ + "suba_im", "cmpa_im", "sbca_im", "cpx_im", "anda_im", "bita_im", "lda_im", "illegal", /*A0*/ "eora_im", "adca_im", "ora_im", "adda_im", "illegal", "bsr", "ldx_im", "illegal", - "suba_di", "cmpa_di", "sbca_di", "cpx_di", "anda_di", "bita_di", "lda_di", "sta_di", /*B0*/ + "suba_di", "cmpa_di", "sbca_di", "cpx_di", "anda_di", "bita_di", "lda_di", "sta_di", /*B0*/ "eora_di", "adca_di", "ora_di", "adda_di", "jmp_di", "jsr_di", "ldx_di", "stx_di", - "suba_ex", "cmpa_ex", "sbca_ex", "cpx_ex", "anda_ex", "bita_ex", "lda_ex", "sta_ex", /*C0*/ + "suba_ex", "cmpa_ex", "sbca_ex", "cpx_ex", "anda_ex", "bita_ex", "lda_ex", "sta_ex", /*C0*/ "eora_ex", "adca_ex", "ora_ex", "adda_ex", "jmp_ex", "jsr_ex", "ldx_ex", "stx_ex", - "suba_ix2", "cmpa_ix2", "sbca_ix2", "cpx_ix2", "anda_ix2", "bita_ix2", "lda_ix2", "sta_ix2", /*D0*/ + "suba_ix2", "cmpa_ix2", "sbca_ix2", "cpx_ix2", "anda_ix2", "bita_ix2", "lda_ix2", "sta_ix2", /*D0*/ "eora_ix2", "adca_ix2", "ora_ix2", "adda_ix2", "jmp_ix2", "jsr_ix2", "ldx_ix2", "stx_ix2", - "suba_ix1", "cmpa_ix1", "sbca_ix1", "cpx_ix1", "anda_ix1", "bita_ix1", "lda_ix1", "sta_ix1", /*E0*/ + "suba_ix1", "cmpa_ix1", "sbca_ix1", "cpx_ix1", "anda_ix1", "bita_ix1", "lda_ix1", "sta_ix1", /*E0*/ "eora_ix1", "adca_ix1", "ora_ix1", "adda_ix1", "jmp_ix1", "jsr_ix1", "ldx_ix1", "stx_ix1", - "suba_ix", "cmpa_ix", "sbca_ix", "cpx_ix", "anda_ix", "bita_ix", "lda_ix", "sta_ix", /*F0*/ + "suba_ix", "cmpa_ix", "sbca_ix", "cpx_ix", "anda_ix", "bita_ix", "lda_ix", "sta_ix", /*F0*/ "eora_ix", "adca_ix", "ora_ix", "adda_ix", "jmp_ix", "jsr_ix", "ldx_ix", "stx_ix" }; #endif diff --git a/src/emu/cpu/m6805/m6805.c b/src/emu/cpu/m6805/m6805.c index c7134267cb1..30871ff8abe 100644 --- a/src/emu/cpu/m6805/m6805.c +++ b/src/emu/cpu/m6805/m6805.c @@ -47,7 +47,7 @@ typedef struct { /* Pre-pointerafied public globals */ int iCount; - PAIR ea; /* effective address */ + PAIR ea; /* effective address */ int subtype; /* Which sub-type is being emulated */ UINT32 sp_mask; /* Stack pointer address mask */ @@ -891,7 +891,7 @@ static CPU_SET_INFO( m6805 ) case CPUINFO_INT_REGISTER + M6805_A: A = info->i; break; case CPUINFO_INT_PC: - case CPUINFO_INT_REGISTER + M6805_PC: PC = info->i; break; + case CPUINFO_INT_REGISTER + M6805_PC: PC = info->i; break; case CPUINFO_INT_SP: case CPUINFO_INT_REGISTER + M6805_S: S = SP_ADJUST(info->i); break; case CPUINFO_INT_REGISTER + M6805_X: X = info->i; break; @@ -927,11 +927,11 @@ CPU_GET_INFO( m6805 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 12; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + M6805_IRQ_LINE: info->i = cpustate->irq_state[M6805_IRQ_LINE]; break; diff --git a/src/emu/cpu/m6809/6809ops.c b/src/emu/cpu/m6809/6809ops.c index becc71e6100..ed90cf23f31 100644 --- a/src/emu/cpu/m6809/6809ops.c +++ b/src/emu/cpu/m6809/6809ops.c @@ -679,7 +679,7 @@ OP_HANDLER( rti ) t = CC & CC_E; /* HJB 990225: entire state saved? */ if(t) { - m68_state->icount -= 9; + m68_state->icount -= 9; PULLBYTE(A); PULLBYTE(B); PULLBYTE(DP); diff --git a/src/emu/cpu/m6809/m6809.c b/src/emu/cpu/m6809/m6809.c index 5876353f9f5..f06e2a28162 100644 --- a/src/emu/cpu/m6809/m6809.c +++ b/src/emu/cpu/m6809/m6809.c @@ -238,7 +238,7 @@ INLINE void fetch_effective_address( m68_state_t *m68_state ); #define SET_FLAGS8(a,b,r) {SET_N8(r);SET_Z8(r);SET_V8(a,b,r);SET_C8(r);} #define SET_FLAGS16(a,b,r) {SET_N16(r);SET_Z16(r);SET_V16(a,b,r);SET_C16(r);} -#define NXORV ((CC&CC_N)^((CC&CC_V)<<2)) +#define NXORV ((CC&CC_N)^((CC&CC_V)<<2)) /* for treating an unsigned byte as a signed word */ #define SIGNED(b) ((UINT16)(b&0x80?b|0xff00:b)) @@ -770,7 +770,7 @@ static CPU_EXECUTE( m6809 ) /* NS 970908 */ #else (*m6809_main[m68_state->ireg])(m68_state); #endif /* BIG_SWITCH */ - m68_state->icount -= cycles1[m68_state->ireg]; + m68_state->icount -= cycles1[m68_state->ireg]; } while( m68_state->icount > 0 ); @@ -933,13 +933,13 @@ INLINE void fetch_effective_address( m68_state_t *m68_state ) case 0x86: EA=X+SIGNED(A); break; case 0x87: EA=0; break; /* ILLEGAL*/ case 0x88: IMMBYTE(EA); EA=X+SIGNED(EA); break; /* this is a hack to make Vectrex work. It should be m68_state->icount-=1. Dunno where the cycle was lost :( */ - case 0x89: IMMWORD(EAP); EA+=X; break; + case 0x89: IMMWORD(EAP); EA+=X; break; case 0x8a: EA=0; break; /* IIError*/ case 0x8b: EA=X+D; break; case 0x8c: IMMBYTE(EA); EA=PC+SIGNED(EA); break; - case 0x8d: IMMWORD(EAP); EA+=PC; break; + case 0x8d: IMMWORD(EAP); EA+=PC; break; case 0x8e: EA=0; break; /* ILLEGAL*/ - case 0x8f: IMMWORD(EAP); break; + case 0x8f: IMMWORD(EAP); break; case 0x90: EA=X; X++; EAD=RM16(m68_state, EAD); break; /* Indirect ,R+ not in my specs */ case 0x91: EA=X; X+=2; EAD=RM16(m68_state, EAD); break; @@ -950,13 +950,13 @@ INLINE void fetch_effective_address( m68_state_t *m68_state ) case 0x96: EA=X+SIGNED(A); EAD=RM16(m68_state, EAD); break; case 0x97: EA=0; break; /* ILLEGAL*/ case 0x98: IMMBYTE(EA); EA=X+SIGNED(EA); EAD=RM16(m68_state, EAD); break; - case 0x99: IMMWORD(EAP); EA+=X; EAD=RM16(m68_state, EAD); break; + case 0x99: IMMWORD(EAP); EA+=X; EAD=RM16(m68_state, EAD); break; case 0x9a: EA=0; break; /* ILLEGAL*/ case 0x9b: EA=X+D; EAD=RM16(m68_state, EAD); break; case 0x9c: IMMBYTE(EA); EA=PC+SIGNED(EA); EAD=RM16(m68_state, EAD); break; - case 0x9d: IMMWORD(EAP); EA+=PC; EAD=RM16(m68_state, EAD); break; + case 0x9d: IMMWORD(EAP); EA+=PC; EAD=RM16(m68_state, EAD); break; case 0x9e: EA=0; break; /* ILLEGAL*/ - case 0x9f: IMMWORD(EAP); EAD=RM16(m68_state, EAD); break; + case 0x9f: IMMWORD(EAP); EAD=RM16(m68_state, EAD); break; case 0xa0: EA=Y; Y++; break; case 0xa1: EA=Y; Y+=2; break; @@ -967,13 +967,13 @@ INLINE void fetch_effective_address( m68_state_t *m68_state ) case 0xa6: EA=Y+SIGNED(A); break; case 0xa7: EA=0; break; /* ILLEGAL*/ case 0xa8: IMMBYTE(EA); EA=Y+SIGNED(EA); break; - case 0xa9: IMMWORD(EAP); EA+=Y; break; + case 0xa9: IMMWORD(EAP); EA+=Y; break; case 0xaa: EA=0; break; /* ILLEGAL*/ case 0xab: EA=Y+D; break; case 0xac: IMMBYTE(EA); EA=PC+SIGNED(EA); break; - case 0xad: IMMWORD(EAP); EA+=PC; break; + case 0xad: IMMWORD(EAP); EA+=PC; break; case 0xae: EA=0; break; /* ILLEGAL*/ - case 0xaf: IMMWORD(EAP); break; + case 0xaf: IMMWORD(EAP); break; case 0xb0: EA=Y; Y++; EAD=RM16(m68_state, EAD); break; case 0xb1: EA=Y; Y+=2; EAD=RM16(m68_state, EAD); break; @@ -984,13 +984,13 @@ INLINE void fetch_effective_address( m68_state_t *m68_state ) case 0xb6: EA=Y+SIGNED(A); EAD=RM16(m68_state, EAD); break; case 0xb7: EA=0; break; /* ILLEGAL*/ case 0xb8: IMMBYTE(EA); EA=Y+SIGNED(EA); EAD=RM16(m68_state, EAD); break; - case 0xb9: IMMWORD(EAP); EA+=Y; EAD=RM16(m68_state, EAD); break; + case 0xb9: IMMWORD(EAP); EA+=Y; EAD=RM16(m68_state, EAD); break; case 0xba: EA=0; break; /* ILLEGAL*/ case 0xbb: EA=Y+D; EAD=RM16(m68_state, EAD); break; case 0xbc: IMMBYTE(EA); EA=PC+SIGNED(EA); EAD=RM16(m68_state, EAD); break; - case 0xbd: IMMWORD(EAP); EA+=PC; EAD=RM16(m68_state, EAD); break; + case 0xbd: IMMWORD(EAP); EA+=PC; EAD=RM16(m68_state, EAD); break; case 0xbe: EA=0; break; /* ILLEGAL*/ - case 0xbf: IMMWORD(EAP); EAD=RM16(m68_state, EAD); break; + case 0xbf: IMMWORD(EAP); EAD=RM16(m68_state, EAD); break; case 0xc0: EA=U; U++; break; case 0xc1: EA=U; U+=2; break; @@ -1001,13 +1001,13 @@ INLINE void fetch_effective_address( m68_state_t *m68_state ) case 0xc6: EA=U+SIGNED(A); break; case 0xc7: EA=0; break; /*ILLEGAL*/ case 0xc8: IMMBYTE(EA); EA=U+SIGNED(EA); break; - case 0xc9: IMMWORD(EAP); EA+=U; break; + case 0xc9: IMMWORD(EAP); EA+=U; break; case 0xca: EA=0; break; /*ILLEGAL*/ case 0xcb: EA=U+D; break; case 0xcc: IMMBYTE(EA); EA=PC+SIGNED(EA); break; - case 0xcd: IMMWORD(EAP); EA+=PC; break; + case 0xcd: IMMWORD(EAP); EA+=PC; break; case 0xce: EA=0; break; /*ILLEGAL*/ - case 0xcf: IMMWORD(EAP); break; + case 0xcf: IMMWORD(EAP); break; case 0xd0: EA=U; U++; EAD=RM16(m68_state, EAD); break; case 0xd1: EA=U; U+=2; EAD=RM16(m68_state, EAD); break; @@ -1018,13 +1018,13 @@ INLINE void fetch_effective_address( m68_state_t *m68_state ) case 0xd6: EA=U+SIGNED(A); EAD=RM16(m68_state, EAD); break; case 0xd7: EA=0; break; /*ILLEGAL*/ case 0xd8: IMMBYTE(EA); EA=U+SIGNED(EA); EAD=RM16(m68_state, EAD); break; - case 0xd9: IMMWORD(EAP); EA+=U; EAD=RM16(m68_state, EAD); break; + case 0xd9: IMMWORD(EAP); EA+=U; EAD=RM16(m68_state, EAD); break; case 0xda: EA=0; break; /*ILLEGAL*/ case 0xdb: EA=U+D; EAD=RM16(m68_state, EAD); break; case 0xdc: IMMBYTE(EA); EA=PC+SIGNED(EA); EAD=RM16(m68_state, EAD); break; - case 0xdd: IMMWORD(EAP); EA+=PC; EAD=RM16(m68_state, EAD); break; + case 0xdd: IMMWORD(EAP); EA+=PC; EAD=RM16(m68_state, EAD); break; case 0xde: EA=0; break; /*ILLEGAL*/ - case 0xdf: IMMWORD(EAP); EAD=RM16(m68_state, EAD); break; + case 0xdf: IMMWORD(EAP); EAD=RM16(m68_state, EAD); break; case 0xe0: EA=S; S++; break; case 0xe1: EA=S; S+=2; break; @@ -1035,13 +1035,13 @@ INLINE void fetch_effective_address( m68_state_t *m68_state ) case 0xe6: EA=S+SIGNED(A); break; case 0xe7: EA=0; break; /*ILLEGAL*/ case 0xe8: IMMBYTE(EA); EA=S+SIGNED(EA); break; - case 0xe9: IMMWORD(EAP); EA+=S; break; + case 0xe9: IMMWORD(EAP); EA+=S; break; case 0xea: EA=0; break; /*ILLEGAL*/ case 0xeb: EA=S+D; break; case 0xec: IMMBYTE(EA); EA=PC+SIGNED(EA); break; - case 0xed: IMMWORD(EAP); EA+=PC; break; + case 0xed: IMMWORD(EAP); EA+=PC; break; case 0xee: EA=0; break; /*ILLEGAL*/ - case 0xef: IMMWORD(EAP); break; + case 0xef: IMMWORD(EAP); break; case 0xf0: EA=S; S++; EAD=RM16(m68_state, EAD); break; case 0xf1: EA=S; S+=2; EAD=RM16(m68_state, EAD); break; @@ -1052,13 +1052,13 @@ INLINE void fetch_effective_address( m68_state_t *m68_state ) case 0xf6: EA=S+SIGNED(A); EAD=RM16(m68_state, EAD); break; case 0xf7: EA=0; break; /*ILLEGAL*/ case 0xf8: IMMBYTE(EA); EA=S+SIGNED(EA); EAD=RM16(m68_state, EAD); break; - case 0xf9: IMMWORD(EAP); EA+=S; EAD=RM16(m68_state, EAD); break; + case 0xf9: IMMWORD(EAP); EA+=S; EAD=RM16(m68_state, EAD); break; case 0xfa: EA=0; break; /*ILLEGAL*/ case 0xfb: EA=S+D; EAD=RM16(m68_state, EAD); break; case 0xfc: IMMBYTE(EA); EA=PC+SIGNED(EA); EAD=RM16(m68_state, EAD); break; - case 0xfd: IMMWORD(EAP); EA+=PC; EAD=RM16(m68_state, EAD); break; + case 0xfd: IMMWORD(EAP); EA+=PC; EAD=RM16(m68_state, EAD); break; case 0xfe: EA=0; break; /*ILLEGAL*/ - case 0xff: IMMWORD(EAP); EAD=RM16(m68_state, EAD); break; + case 0xff: IMMWORD(EAP); EAD=RM16(m68_state, EAD); break; } m68_state->icount -= index_cycle_em[postbyte]; } @@ -1080,7 +1080,7 @@ static CPU_SET_INFO( m6809 ) case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(m68_state, INPUT_LINE_NMI, info->i); break; case CPUINFO_INT_PC: - case CPUINFO_INT_REGISTER + M6809_PC: PC = info->i; break; + case CPUINFO_INT_REGISTER + M6809_PC: PC = info->i; break; case CPUINFO_INT_SP: case CPUINFO_INT_REGISTER + M6809_S: S = info->i; break; case CPUINFO_INT_REGISTER + M6809_CC: CC = info->i; check_irq_lines(m68_state); break; @@ -1121,11 +1121,11 @@ CPU_GET_INFO( m6809 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + M6809_IRQ_LINE: info->i = m68_state->irq_state[M6809_IRQ_LINE]; break; case CPUINFO_INT_INPUT_STATE + M6809_FIRQ_LINE: info->i = m68_state->irq_state[M6809_FIRQ_LINE]; break; diff --git a/src/emu/cpu/mb86233/mb86233.c b/src/emu/cpu/mb86233/mb86233.c index 87d83a6d194..a4deafcf376 100644 --- a/src/emu/cpu/mb86233/mb86233.c +++ b/src/emu/cpu/mb86233/mb86233.c @@ -1570,7 +1570,7 @@ static CPU_SET_INFO( mb86233 ) switch (state) { case CPUINFO_INT_PC: - case CPUINFO_INT_REGISTER + MB86233_PC: GETPC() = info->i; break; + case CPUINFO_INT_REGISTER + MB86233_PC: GETPC() = info->i; break; case CPUINFO_INT_REGISTER + MB86233_A: GETA().u = info->i; break; case CPUINFO_INT_REGISTER + MB86233_B: GETB().u = info->i; break; case CPUINFO_INT_REGISTER + MB86233_P: GETP().u = info->i; break; @@ -1626,11 +1626,11 @@ CPU_GET_INFO( mb86233 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = -2; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 32; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 32; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 32; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_PREVIOUSPC: /* not implemented */ break; @@ -1645,7 +1645,7 @@ CPU_GET_INFO( mb86233 ) case CPUINFO_INT_REGISTER + MB86233_SP: info->i = GETPCSP(); break; case CPUINFO_INT_REGISTER + MB86233_EB: info->i = GETEB(); break; case CPUINFO_INT_REGISTER + MB86233_SHIFT: info->i = GETSHIFT(); break; - case CPUINFO_INT_REGISTER + MB86233_FLAGS: info->i = GETSR(); break; + case CPUINFO_INT_REGISTER + MB86233_FLAGS: info->i = GETSR(); break; case CPUINFO_INT_REGISTER + MB86233_R0: info->i = GETGPR(0); break; case CPUINFO_INT_REGISTER + MB86233_R1: info->i = GETGPR(1); break; case CPUINFO_INT_REGISTER + MB86233_R2: info->i = GETGPR(2); break; diff --git a/src/emu/cpu/mb88xx/mb88xx.c b/src/emu/cpu/mb88xx/mb88xx.c index 0fc48de7d47..33350a63429 100644 --- a/src/emu/cpu/mb88xx/mb88xx.c +++ b/src/emu/cpu/mb88xx/mb88xx.c @@ -99,7 +99,7 @@ static TIMER_CALLBACK( serial_timer ); MACROS ***************************************************************************/ -#define READOP(a) (memory_decrypted_read_byte(cpustate->program, a)) +#define READOP(a) (memory_decrypted_read_byte(cpustate->program, a)) #define RDMEM(a) (memory_read_byte_8be(cpustate->data, a)) #define WRMEM(a,v) (memory_write_byte_8be(cpustate->data, (a), (v))) @@ -946,19 +946,19 @@ CPU_GET_INFO( mb88 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 11; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 7; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 7; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 3; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 3; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + MB88_IRQ_LINE: info->i = cpustate->pending_interrupt ? ASSERT_LINE : CLEAR_LINE; break; case CPUINFO_INT_PREVIOUSPC: /* not implemented */ break; case CPUINFO_INT_PC: info->i = GETPC(); break; - case CPUINFO_INT_REGISTER + MB88_PC: info->i = cpustate->PC; break; - case CPUINFO_INT_REGISTER + MB88_PA: info->i = cpustate->PA; break; + case CPUINFO_INT_REGISTER + MB88_PC: info->i = cpustate->PC; break; + case CPUINFO_INT_REGISTER + MB88_PA: info->i = cpustate->PA; break; case CPUINFO_INT_REGISTER + MB88_FLAGS: info->i = 0; if (TEST_ST()) info->i |= 0x01; if (TEST_ZF()) info->i |= 0x02; @@ -968,14 +968,14 @@ CPU_GET_INFO( mb88 ) if (TEST_NF()) info->i |= 0x20; break; case CPUINFO_INT_SP: - case CPUINFO_INT_REGISTER + MB88_SI: info->i = cpustate->SI; break; + case CPUINFO_INT_REGISTER + MB88_SI: info->i = cpustate->SI; break; case CPUINFO_INT_REGISTER + MB88_A: info->i = cpustate->A; break; case CPUINFO_INT_REGISTER + MB88_X: info->i = cpustate->X; break; case CPUINFO_INT_REGISTER + MB88_Y: info->i = cpustate->Y; break; - case CPUINFO_INT_REGISTER + MB88_PIO: info->i = cpustate->pio; break; - case CPUINFO_INT_REGISTER + MB88_TH: info->i = cpustate->TH; break; - case CPUINFO_INT_REGISTER + MB88_TL: info->i = cpustate->TL; break; - case CPUINFO_INT_REGISTER + MB88_SB: info->i = cpustate->SB; break; + case CPUINFO_INT_REGISTER + MB88_PIO: info->i = cpustate->pio; break; + case CPUINFO_INT_REGISTER + MB88_TH: info->i = cpustate->TH; break; + case CPUINFO_INT_REGISTER + MB88_TL: info->i = cpustate->TL; break; + case CPUINFO_INT_REGISTER + MB88_SB: info->i = cpustate->SB; break; /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mb88); break; @@ -1035,7 +1035,7 @@ CPU_GET_INFO( mb8841 ) { /* --- the following bits of info are returned as 64-bit signed integers --- */ case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 11; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 7; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 7; break; /* --- the following bits of info are returned as pointers --- */ case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_11bit); break; @@ -1054,7 +1054,7 @@ CPU_GET_INFO( mb8842 ) { /* --- the following bits of info are returned as 64-bit signed integers --- */ case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 11; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 7; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 7; break; /* --- the following bits of info are returned as pointers --- */ case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_11bit); break; @@ -1073,7 +1073,7 @@ CPU_GET_INFO( mb8843 ) { /* --- the following bits of info are returned as 64-bit signed integers --- */ case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 10; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 6; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 6; break; /* --- the following bits of info are returned as pointers --- */ case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_10bit); break; @@ -1092,7 +1092,7 @@ CPU_GET_INFO( mb8844 ) { /* --- the following bits of info are returned as 64-bit signed integers --- */ case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 10; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 6; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 6; break; /* --- the following bits of info are returned as pointers --- */ case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_10bit); break; diff --git a/src/emu/cpu/mc68hc11/mc68hc11.c b/src/emu/cpu/mc68hc11/mc68hc11.c index f1f85420274..e2b2d9d8b91 100644 --- a/src/emu/cpu/mc68hc11/mc68hc11.c +++ b/src/emu/cpu/mc68hc11/mc68hc11.c @@ -557,11 +557,11 @@ CPU_GET_INFO( mc68hc11 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 8; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + MC68HC11_IRQ_LINE: info->i = cpustate->irq_state[MC68HC11_IRQ_LINE]; break; diff --git a/src/emu/cpu/mcs48/mcs48.c b/src/emu/cpu/mcs48/mcs48.c index dcd21e1dd15..59e64d32d32 100644 --- a/src/emu/cpu/mcs48/mcs48.c +++ b/src/emu/cpu/mcs48/mcs48.c @@ -664,8 +664,8 @@ OPHANDLER( jnt_1 ) { execute_jcc(cpustate, test_r(1) == 0); return 2; } OPHANDLER( jnz ) { execute_jcc(cpustate, cpustate->a != 0); return 2; } OPHANDLER( jobf ) { execute_jcc(cpustate, (cpustate->sts & STS_OBF) != 0); return 2; } OPHANDLER( jtf ) { execute_jcc(cpustate, cpustate->timer_flag); cpustate->timer_flag = FALSE; return 2; } -OPHANDLER( jt_0 ) { execute_jcc(cpustate, test_r(0) != 0); return 2; } -OPHANDLER( jt_1 ) { execute_jcc(cpustate, test_r(1) != 0); return 2; } +OPHANDLER( jt_0 ) { execute_jcc(cpustate, test_r(0) != 0); return 2; } +OPHANDLER( jt_1 ) { execute_jcc(cpustate, test_r(1) != 0); return 2; } OPHANDLER( jz ) { execute_jcc(cpustate, cpustate->a == 0); return 2; } OPHANDLER( jmp_0 ) { execute_jmp(cpustate, argument_fetch(cpustate) | 0x000); return 2; } @@ -782,7 +782,7 @@ OPHANDLER( retr ) } OPHANDLER( rl_a ) { cpustate->a = (cpustate->a << 1) | (cpustate->a >> 7); return 1; } -OPHANDLER( rlc_a ) { UINT8 newc = cpustate->a & C_FLAG; cpustate->a = (cpustate->a << 1) | (cpustate->psw >> 7); cpustate->psw = (cpustate->psw & ~C_FLAG) | newc; return 1; } +OPHANDLER( rlc_a ) { UINT8 newc = cpustate->a & C_FLAG; cpustate->a = (cpustate->a << 1) | (cpustate->psw >> 7); cpustate->psw = (cpustate->psw & ~C_FLAG) | newc; return 1; } OPHANDLER( rr_a ) { cpustate->a = (cpustate->a >> 1) | (cpustate->a << 7); return 1; } OPHANDLER( rrc_a ) { UINT8 newc = (cpustate->a << 7) & C_FLAG; cpustate->a = (cpustate->a >> 1) | (cpustate->psw & C_FLAG); cpustate->psw = (cpustate->psw & ~C_FLAG) | newc; return 1; } @@ -1384,13 +1384,13 @@ static CPU_GET_INFO( mcs48 ) case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break; case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 12; break; - case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: /*info->i = 6 or 7 or 8;*/ break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: /*info->i = 6 or 7 or 8;*/ break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 9; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 9; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + MCS48_INPUT_IRQ: info->i = cpustate->irq_state ? ASSERT_LINE : CLEAR_LINE; break; case CPUINFO_INT_INPUT_STATE + MCS48_INPUT_EA: info->i = cpustate->ea; break; @@ -1408,7 +1408,7 @@ static CPU_GET_INFO( mcs48 ) case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break; case CPUINFO_PTR_STATE_TABLE: info->state_table = &cpustate->state; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: /* set per-core */ break; - case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: /* set per-core */ break; + case CPUINFO_PTR_INTERNAL_MEMORY_MAP_DATA: /* set per-core */ break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case DEVINFO_STR_NAME: /* set per-core */ break; diff --git a/src/emu/cpu/mcs51/mcs51.c b/src/emu/cpu/mcs51/mcs51.c index f950675a275..ab906c62f19 100644 --- a/src/emu/cpu/mcs51/mcs51.c +++ b/src/emu/cpu/mcs51/mcs51.c @@ -184,22 +184,22 @@ enum ADDR_IP = 0xb8, /* 8052 Only registers */ - ADDR_T2CON = 0xc8, - ADDR_RCAP2L = 0xca, - ADDR_RCAP2H = 0xcb, - ADDR_TL2 = 0xcc, - ADDR_TH2 = 0xcd, - - /* 80C52 Only registers */ - ADDR_IPH = 0xb7, - ADDR_SADDR = 0xa9, - ADDR_SADEN = 0xb9, - - /* Philips 80C52 */ - ADDR_AUXR = 0x8e, - ADDR_AUXR1 = 0xa2, - - /* DS5002FP */ + ADDR_T2CON = 0xc8, + ADDR_RCAP2L = 0xca, + ADDR_RCAP2H = 0xcb, + ADDR_TL2 = 0xcc, + ADDR_TH2 = 0xcd, + + /* 80C52 Only registers */ + ADDR_IPH = 0xb7, + ADDR_SADDR = 0xa9, + ADDR_SADEN = 0xb9, + + /* Philips 80C52 */ + ADDR_AUXR = 0x8e, + ADDR_AUXR1 = 0xa2, + + /* DS5002FP */ ADDR_CRCR = 0xc1, ADDR_CRCL = 0xc2, ADDR_CRCH = 0xc3, @@ -255,7 +255,7 @@ struct _mcs51_state_t UINT8 rwm; //Signals that the current instruction is a read/write/modify instruction int inst_cycles; /* cycles for the current instruction */ - int ram_mask; /* second ram bank for indirect access available ? */ + int ram_mask; /* second ram bank for indirect access available ? */ int num_interrupts; /* number of interrupts supported */ int recalc_parity; /* recalculate parity before next instruction */ UINT32 last_line_state; /* last state of input lines line */ @@ -276,7 +276,7 @@ struct _mcs51_state_t UINT8 *sfr_ram; /* 128 SFR - these are in 0x80 - 0xFF */ /* SFR Callbacks */ - void (*sfr_write)(mcs51_state_t *mcs51_state, size_t offset, UINT8 data); + void (*sfr_write)(mcs51_state_t *mcs51_state, size_t offset, UINT8 data); UINT8 (*sfr_read)(mcs51_state_t *mcs51_state, size_t offset); /* Interrupt Callback */ @@ -996,10 +996,10 @@ INLINE void update_timer_t0(mcs51_state_t *mcs51_state, int cycles) break; case 2: /* 8 Bit Autoreload */ count = ((UINT32) TL0) + delta; - if ( count & 0xffffff00 ) /* Check for overflow */ + if ( count & 0xffffff00 ) /* Check for overflow */ { SET_TF0(1); - count += TH0; /* Reload timer */ + count += TH0; /* Reload timer */ } /* Update new values of the counter */ TL0 = count & 0xff; @@ -1007,7 +1007,7 @@ INLINE void update_timer_t0(mcs51_state_t *mcs51_state, int cycles) case 3: /* Split Timer 1 */ count = ((UINT32) TL0) + delta; - if ( count & 0xffffff00 ) /* Check for overflow */ + if ( count & 0xffffff00 ) /* Check for overflow */ SET_TF0(1); TL0 = count & 0xff; /* Update new values of the counter */ break; @@ -1020,7 +1020,7 @@ INLINE void update_timer_t0(mcs51_state_t *mcs51_state, int cycles) case 3: /* Split Timer 2 */ count = ((UINT32) TH0) + cycles; /* No gate control or counting !*/ - if ( count & 0xffffff00 ) /* Check for overflow */ + if ( count & 0xffffff00 ) /* Check for overflow */ SET_TF1(1); TH0 = count & 0xff; /* Update new values of the counter */ break; @@ -1087,7 +1087,7 @@ INLINE void update_timer_t1(mcs51_state_t *mcs51_state, int cycles) overflow = count & 0xffffff00; /* Check for overflow */ if ( overflow ) { - count += TH1; /* Reload timer */ + count += TH1; /* Reload timer */ } /* Update new values of the counter */ TL1 = count & 0xff; @@ -1131,7 +1131,7 @@ INLINE void update_timer_t1(mcs51_state_t *mcs51_state, int cycles) overflow = count & 0xffffff00; /* Check for overflow */ if ( overflow ) { - count += TH1; /* Reload timer */ + count += TH1; /* Reload timer */ } /* Update new values of the counter */ TL1 = count & 0xff; @@ -1333,15 +1333,15 @@ static void execute_op(mcs51_state_t *mcs51_state, UINT8 op) case 0x0e: case 0x0f: inc_r(mcs51_state, op&7); break; //INC R0 to R7 - case 0x10: RWM=1; jbc(mcs51_state, op); RWM=0; break; //JBC bit addr, code addr - case 0x11: acall(mcs51_state, op); break; //ACALL code addr + case 0x10: RWM=1; jbc(mcs51_state, op); RWM=0; break; //JBC bit addr, code addr + case 0x11: acall(mcs51_state, op); break; //ACALL code addr case 0x12: lcall(mcs51_state, op); break; //LCALL code addr case 0x13: rrc_a(mcs51_state, op); break; //RRC A case 0x14: dec_a(mcs51_state, op); break; //DEC A case 0x15: RWM=1; dec_mem(mcs51_state, op); RWM=0; break; //DEC data addr case 0x16: - case 0x17: dec_ir(mcs51_state, op&1); break; //DEC @R0/@R1 + case 0x17: dec_ir(mcs51_state, op&1); break; //DEC @R0/@R1 case 0x18: case 0x19: @@ -1350,7 +1350,7 @@ static void execute_op(mcs51_state_t *mcs51_state, UINT8 op) case 0x1c: case 0x1d: case 0x1e: - case 0x1f: dec_r(mcs51_state, op&7); break; //DEC R0 to R7 + case 0x1f: dec_r(mcs51_state, op&7); break; //DEC R0 to R7 case 0x20: jb(mcs51_state, op); break; //JB bit addr, code addr case 0x21: ajmp(mcs51_state, op); break; //AJMP code addr @@ -1398,7 +1398,7 @@ static void execute_op(mcs51_state_t *mcs51_state, UINT8 op) case 0x45: orl_a_mem(mcs51_state, op); break; //ORL A, data addr case 0x46: - case 0x47: orl_a_ir(mcs51_state, op&1); break; //ORL A, @RO/@R1 + case 0x47: orl_a_ir(mcs51_state, op&1); break; //ORL A, @RO/@R1 case 0x48: case 0x49: @@ -1407,9 +1407,9 @@ static void execute_op(mcs51_state_t *mcs51_state, UINT8 op) case 0x4c: case 0x4d: case 0x4e: - case 0x4f: orl_a_r(mcs51_state, op&7); break; //ORL A, RO to R7 + case 0x4f: orl_a_r(mcs51_state, op&7); break; //ORL A, RO to R7 - case 0x50: jnc(mcs51_state, op); break; //JNC code addr + case 0x50: jnc(mcs51_state, op); break; //JNC code addr case 0x51: acall(mcs51_state, op); break; //ACALL code addr case 0x52: RWM=1; anl_mem_a(mcs51_state, op); RWM=0; break; //ANL data addr, A case 0x53: RWM=1; anl_mem_byte(mcs51_state, op); RWM=0; break; //ANL data addr, #data @@ -1429,7 +1429,7 @@ static void execute_op(mcs51_state_t *mcs51_state, UINT8 op) case 0x5f: anl_a_r(mcs51_state, op&7); break; //ANL A, RO to R7 case 0x60: jz(mcs51_state, op); break; //JZ code addr - case 0x61: ajmp(mcs51_state, op); break; //AJMP code addr + case 0x61: ajmp(mcs51_state, op); break; //AJMP code addr case 0x62: RWM=1; xrl_mem_a(mcs51_state, op); RWM=0; break; //XRL data addr, A case 0x63: RWM=1; xrl_mem_byte(mcs51_state, op); RWM=0; break; //XRL data addr, #data case 0x64: xrl_a_byte(mcs51_state, op); break; //XRL A, #data @@ -1531,7 +1531,7 @@ static void execute_op(mcs51_state_t *mcs51_state, UINT8 op) case 0xb5: cjne_a_mem(mcs51_state, op); break; //CJNE A, data addr, code addr case 0xb6: - case 0xb7: cjne_ir_byte(mcs51_state, op&1); break; //CJNE @R0/@R1, #data, code addr + case 0xb7: cjne_ir_byte(mcs51_state, op&1); break; //CJNE @R0/@R1, #data, code addr case 0xb8: case 0xb9: @@ -1565,7 +1565,7 @@ static void execute_op(mcs51_state_t *mcs51_state, UINT8 op) case 0xd1: acall(mcs51_state, op); break; //ACALL code addr case 0xd2: RWM=1; setb_bitaddr(mcs51_state, op); RWM=0; break; //SETB bit addr case 0xd3: setb_c(mcs51_state, op); break; //SETB C - case 0xd4: da_a(mcs51_state, op); break; //DA A + case 0xd4: da_a(mcs51_state, op); break; //DA A case 0xd5: RWM=1; djnz_mem(mcs51_state, op); RWM=0; break; //DJNZ data addr, code addr case 0xd6: @@ -1735,7 +1735,7 @@ static void check_irqs(mcs51_state_t *mcs51_state) if (ROP(PC) == 0x20 && ROP_ARG(PC+1) == 0xb2 && ROP_ARG(PC+2) == 0xfd) PC += 3; - //Save current pc to stack, set pc to new interrupt vector + //Save current pc to stack, set pc to new interrupt vector push_pc(mcs51_state); PC = int_vec; @@ -2040,10 +2040,10 @@ static UINT8 mcs51_sfr_read(mcs51_state_t *mcs51_state, size_t offset) { /* Read/Write/Modify operations read the port latch ! */ /* Move to memory map */ - case ADDR_P0: return RWM ? P0 : P0 & IN(MCS51_PORT_P0); - case ADDR_P1: return RWM ? P1 : P1 & IN(MCS51_PORT_P1); - case ADDR_P2: return RWM ? P2 : P2 & IN(MCS51_PORT_P2); - case ADDR_P3: return RWM ? P3 : P3 & IN(MCS51_PORT_P3); + case ADDR_P0: return RWM ? P0 : P0 & IN(MCS51_PORT_P0); + case ADDR_P1: return RWM ? P1 : P1 & IN(MCS51_PORT_P1); + case ADDR_P2: return RWM ? P2 : P2 & IN(MCS51_PORT_P2); + case ADDR_P3: return RWM ? P3 : P3 & IN(MCS51_PORT_P3); case ADDR_PSW: case ADDR_ACC: @@ -2084,7 +2084,7 @@ static CPU_INIT( mcs51 ) mcs51_state->io = memory_find_address_space(device, ADDRESS_SPACE_IO); mcs51_state->features = FEATURE_NONE; - mcs51_state->ram_mask = 0x7F; /* 128 bytes of ram */ + mcs51_state->ram_mask = 0x7F; /* 128 bytes of ram */ mcs51_state->num_interrupts = 5; /* 5 interrupts */ mcs51_state->sfr_read = mcs51_sfr_read; mcs51_state->sfr_write = mcs51_sfr_write; @@ -2246,7 +2246,7 @@ static CPU_INIT( i8052 ) mcs51_state_t *mcs51_state = get_safe_token(device); CPU_INIT_CALL(mcs51); - mcs51_state->ram_mask = 0xFF; /* 256 bytes of ram */ + mcs51_state->ram_mask = 0xFF; /* 256 bytes of ram */ mcs51_state->num_interrupts = 6; /* 6 interrupts */ mcs51_state->features |= FEATURE_I8052; @@ -2309,7 +2309,7 @@ static CPU_INIT( i80c31 ) mcs51_state_t *mcs51_state = get_safe_token(device); CPU_INIT_CALL(i8052); - mcs51_state->ram_mask = 0x7F; /* 128 bytes of ram */ + mcs51_state->ram_mask = 0x7F; /* 128 bytes of ram */ } /**************************************************************************** @@ -2317,8 +2317,8 @@ static CPU_INIT( i80c31 ) ****************************************************************************/ -#define DS5_LOGW(a, d) LOG(("ds5002fp '%s': write to " # a " register at 0x%04x, data=%x\n", mcs51_state->device->tag, PC, d)) -#define DS5_LOGR(a, d) LOG(("ds5002fp '%s': read from " # a " register at 0x%04x\n", mcs51_state->device->tag, PC)) +#define DS5_LOGW(a, d) LOG(("ds5002fp '%s': write to " # a " register at 0x%04x, data=%x\n", mcs51_state->device->tag, PC, d)) +#define DS5_LOGR(a, d) LOG(("ds5002fp '%s': read from " # a " register at 0x%04x\n", mcs51_state->device->tag, PC)) INLINE UINT8 ds5002fp_protected(mcs51_state_t *mcs51_state, size_t offset, UINT8 data, UINT8 ta_mask, UINT8 mask) { @@ -2351,10 +2351,10 @@ static void ds5002fp_sfr_write(mcs51_state_t *mcs51_state, size_t offset, UINT8 case ADDR_RPCTL: data = ds5002fp_protected(mcs51_state, ADDR_RPCTL, data, 0xef, 0xfe); DS5_LOGW(RPCTL, data); break; case ADDR_CRCR: data = ds5002fp_protected(mcs51_state, ADDR_CRCR, data, 0xff, 0x0f); DS5_LOGW(CRCR, data); break; case ADDR_PCON: data = ds5002fp_protected(mcs51_state, ADDR_PCON, data, 0xb9, 0xff); break; - case ADDR_IP: data = ds5002fp_protected(mcs51_state, ADDR_IP, data, 0x7f, 0xff); break; - case ADDR_CRCL: DS5_LOGW(CRCL, data); break; - case ADDR_CRCH: DS5_LOGW(CRCH, data); break; - case ADDR_RNR: DS5_LOGW(RNR, data); break; + case ADDR_IP: data = ds5002fp_protected(mcs51_state, ADDR_IP, data, 0x7f, 0xff); break; + case ADDR_CRCL: DS5_LOGW(CRCL, data); break; + case ADDR_CRCH: DS5_LOGW(CRCH, data); break; + case ADDR_RNR: DS5_LOGW(RNR, data); break; case ADDR_RPS: DS5_LOGW(RPS, data); break; default: mcs51_sfr_write(mcs51_state, offset, data); @@ -2367,14 +2367,14 @@ static UINT8 ds5002fp_sfr_read(mcs51_state_t *mcs51_state, size_t offset) { switch (offset) { - case ADDR_CRCR: DS5_LOGR(CRCR, data); break; + case ADDR_CRCR: DS5_LOGR(CRCR, data); break; case ADDR_CRCL: DS5_LOGR(CRCL, data); break; - case ADDR_CRCH: DS5_LOGR(CRCH, data); break; + case ADDR_CRCH: DS5_LOGR(CRCH, data); break; case ADDR_MCON: DS5_LOGR(MCON, data); break; - case ADDR_TA: DS5_LOGR(TA, data); break; - case ADDR_RNR: DS5_LOGR(RNR, data); break; - case ADDR_RPCTL: DS5_LOGR(RPCTL, data); break; - case ADDR_RPS: DS5_LOGR(RPS, data); break; + case ADDR_TA: DS5_LOGR(TA, data); break; + case ADDR_RNR: DS5_LOGR(RNR, data); break; + case ADDR_RPCTL: DS5_LOGR(RPCTL, data); break; + case ADDR_RPS: DS5_LOGR(RPS, data); break; case ADDR_PCON: SET_PFW(0); /* reset PFW flag */ return mcs51_sfr_read(mcs51_state, offset); @@ -2439,7 +2439,7 @@ static CPU_SET_INFO( mcs51 ) { /* --- the following bits of info are set as 64-bit signed integers --- */ case CPUINFO_INT_PC: PC = info->i; break; - case CPUINFO_INT_SP: SP = info->i; break; + case CPUINFO_INT_SP: SP = info->i; break; case CPUINFO_INT_INPUT_STATE + MCS51_INT0_LINE: mcs51_set_irq_line(mcs51_state, MCS51_INT0_LINE, info->i); break; case CPUINFO_INT_INPUT_STATE + MCS51_INT1_LINE: mcs51_set_irq_line(mcs51_state, MCS51_INT1_LINE, info->i); break; @@ -2447,23 +2447,23 @@ static CPU_SET_INFO( mcs51 ) case CPUINFO_INT_INPUT_STATE + MCS51_T1_LINE: mcs51_set_irq_line(mcs51_state, MCS51_T1_LINE, info->i); break; case CPUINFO_INT_INPUT_STATE + MCS51_RX_LINE: mcs51_set_irq_line(mcs51_state, MCS51_RX_LINE, info->i); break; - case CPUINFO_INT_REGISTER + MCS51_PC: PC = info->i; break; - case CPUINFO_INT_REGISTER + MCS51_SP: SP = info->i; break; + case CPUINFO_INT_REGISTER + MCS51_PC: PC = info->i; break; + case CPUINFO_INT_REGISTER + MCS51_SP: SP = info->i; break; case CPUINFO_INT_REGISTER + MCS51_PSW: SET_PSW(info->i); break; case CPUINFO_INT_REGISTER + MCS51_ACC: SET_ACC(info->i); break; - case CPUINFO_INT_REGISTER + MCS51_B: B = info->i; break; + case CPUINFO_INT_REGISTER + MCS51_B: B = info->i; break; case CPUINFO_INT_REGISTER + MCS51_DPH: DPH = info->i; break; case CPUINFO_INT_REGISTER + MCS51_DPL: DPL = info->i; break; - case CPUINFO_INT_REGISTER + MCS51_IE: IE = info->i; break; - case CPUINFO_INT_REGISTER + MCS51_R0: SET_REG(0, info->i); break; - case CPUINFO_INT_REGISTER + MCS51_R1: SET_REG(1, info->i); break; - case CPUINFO_INT_REGISTER + MCS51_R2: SET_REG(2, info->i); break; - case CPUINFO_INT_REGISTER + MCS51_R3: SET_REG(3, info->i); break; - case CPUINFO_INT_REGISTER + MCS51_R4: SET_REG(4, info->i); break; - case CPUINFO_INT_REGISTER + MCS51_R5: SET_REG(5, info->i); break; - case CPUINFO_INT_REGISTER + MCS51_R6: SET_REG(6, info->i); break; - case CPUINFO_INT_REGISTER + MCS51_R7: SET_REG(7, info->i); break; - case CPUINFO_INT_REGISTER + MCS51_RB: SET_RS(info->i); break; + case CPUINFO_INT_REGISTER + MCS51_IE: IE = info->i; break; + case CPUINFO_INT_REGISTER + MCS51_R0: SET_REG(0, info->i); break; + case CPUINFO_INT_REGISTER + MCS51_R1: SET_REG(1, info->i); break; + case CPUINFO_INT_REGISTER + MCS51_R2: SET_REG(2, info->i); break; + case CPUINFO_INT_REGISTER + MCS51_R3: SET_REG(3, info->i); break; + case CPUINFO_INT_REGISTER + MCS51_R4: SET_REG(4, info->i); break; + case CPUINFO_INT_REGISTER + MCS51_R5: SET_REG(5, info->i); break; + case CPUINFO_INT_REGISTER + MCS51_R6: SET_REG(6, info->i); break; + case CPUINFO_INT_REGISTER + MCS51_R7: SET_REG(7, info->i); break; + case CPUINFO_INT_REGISTER + MCS51_RB: SET_RS(info->i); break; } } @@ -2489,39 +2489,39 @@ static CPU_GET_INFO( mcs51 ) case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 5; break; case CPUINFO_INT_MIN_CYCLES: info->i = 1; break; case CPUINFO_INT_MAX_CYCLES: info->i = 20; /* rough guess */ break; - case CPUINFO_INT_INPUT_LINES: info->i = 3; break; + case CPUINFO_INT_INPUT_LINES: info->i = 3; break; case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break; case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 9; /* due to sfr mapping */ break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 9; /* due to sfr mapping */ break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 18; /* 128k for ds5002fp */ break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 18; /* 128k for ds5002fp */ break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_PREVIOUSPC: info->i = PPC; break; - case CPUINFO_INT_PC: info->i = PC; break; + case CPUINFO_INT_PC: info->i = PC; break; case CPUINFO_INT_SP: info->i = SP; break; - case CPUINFO_INT_REGISTER + MCS51_PC: info->i = PC; break; - case CPUINFO_INT_REGISTER + MCS51_SP: info->i = SP; break; + case CPUINFO_INT_REGISTER + MCS51_PC: info->i = PC; break; + case CPUINFO_INT_REGISTER + MCS51_SP: info->i = SP; break; case CPUINFO_INT_REGISTER + MCS51_PSW: info->i = PSW; break; case CPUINFO_INT_REGISTER + MCS51_ACC: info->i = ACC; break; - case CPUINFO_INT_REGISTER + MCS51_B: info->i = B; break; + case CPUINFO_INT_REGISTER + MCS51_B: info->i = B; break; case CPUINFO_INT_REGISTER + MCS51_DPH: info->i = DPH; break; case CPUINFO_INT_REGISTER + MCS51_DPL: info->i = DPL; break; - case CPUINFO_INT_REGISTER + MCS51_IE: info->i = IE; break; - case CPUINFO_INT_REGISTER + MCS51_R0: info->i = R_REG(0); break; - case CPUINFO_INT_REGISTER + MCS51_R1: info->i = R_REG(1); break; - case CPUINFO_INT_REGISTER + MCS51_R2: info->i = R_REG(2); break; - case CPUINFO_INT_REGISTER + MCS51_R3: info->i = R_REG(3); break; - case CPUINFO_INT_REGISTER + MCS51_R4: info->i = R_REG(4); break; - case CPUINFO_INT_REGISTER + MCS51_R5: info->i = R_REG(5); break; - case CPUINFO_INT_REGISTER + MCS51_R6: info->i = R_REG(6); break; - case CPUINFO_INT_REGISTER + MCS51_R7: info->i = R_REG(7); break; - case CPUINFO_INT_REGISTER + MCS51_RB: info->i = R_REG(8); break; + case CPUINFO_INT_REGISTER + MCS51_IE: info->i = IE; break; + case CPUINFO_INT_REGISTER + MCS51_R0: info->i = R_REG(0); break; + case CPUINFO_INT_REGISTER + MCS51_R1: info->i = R_REG(1); break; + case CPUINFO_INT_REGISTER + MCS51_R2: info->i = R_REG(2); break; + case CPUINFO_INT_REGISTER + MCS51_R3: info->i = R_REG(3); break; + case CPUINFO_INT_REGISTER + MCS51_R4: info->i = R_REG(4); break; + case CPUINFO_INT_REGISTER + MCS51_R5: info->i = R_REG(5); break; + case CPUINFO_INT_REGISTER + MCS51_R6: info->i = R_REG(6); break; + case CPUINFO_INT_REGISTER + MCS51_R7: info->i = R_REG(7); break; + case CPUINFO_INT_REGISTER + MCS51_RB: info->i = R_REG(8); break; /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mcs51); break; @@ -2555,23 +2555,23 @@ static CPU_GET_INFO( mcs51 ) PSW & 0x01 ? 'P':'.'); break; - case CPUINFO_STR_REGISTER + MCS51_PC: sprintf(info->s, "PC:%04X", mcs51_state->pc); break; - case CPUINFO_STR_REGISTER + MCS51_SP: sprintf(info->s, "SP:%02X", SP); break; - case CPUINFO_STR_REGISTER + MCS51_PSW: sprintf(info->s, "PSW:%02X", PSW); break; - case CPUINFO_STR_REGISTER + MCS51_ACC: sprintf(info->s, "A:%02X", ACC); break; - case CPUINFO_STR_REGISTER + MCS51_B: sprintf(info->s, "B:%02X", B); break; - case CPUINFO_STR_REGISTER + MCS51_DPH: sprintf(info->s, "DPH:%02X", DPH); break; - case CPUINFO_STR_REGISTER + MCS51_DPL: sprintf(info->s, "DPL:%02X", DPL); break; - case CPUINFO_STR_REGISTER + MCS51_IE: sprintf(info->s, "IE:%02X", IE); break; - case CPUINFO_STR_REGISTER + MCS51_R0: sprintf(info->s, "R0:%02X", R_REG(0)); break; - case CPUINFO_STR_REGISTER + MCS51_R1: sprintf(info->s, "R1:%02X", R_REG(1)); break; - case CPUINFO_STR_REGISTER + MCS51_R2: sprintf(info->s, "R2:%02X", R_REG(2)); break; - case CPUINFO_STR_REGISTER + MCS51_R3: sprintf(info->s, "R3:%02X", R_REG(3)); break; - case CPUINFO_STR_REGISTER + MCS51_R4: sprintf(info->s, "R4:%02X", R_REG(4)); break; - case CPUINFO_STR_REGISTER + MCS51_R5: sprintf(info->s, "R5:%02X", R_REG(5)); break; - case CPUINFO_STR_REGISTER + MCS51_R6: sprintf(info->s, "R6:%02X", R_REG(6)); break; - case CPUINFO_STR_REGISTER + MCS51_R7: sprintf(info->s, "R7:%02X", R_REG(7)); break; - case CPUINFO_STR_REGISTER + MCS51_RB: sprintf(info->s, "RB:%02X", ((PSW & 0x18)>>3)); break; + case CPUINFO_STR_REGISTER + MCS51_PC: sprintf(info->s, "PC:%04X", mcs51_state->pc); break; + case CPUINFO_STR_REGISTER + MCS51_SP: sprintf(info->s, "SP:%02X", SP); break; + case CPUINFO_STR_REGISTER + MCS51_PSW: sprintf(info->s, "PSW:%02X", PSW); break; + case CPUINFO_STR_REGISTER + MCS51_ACC: sprintf(info->s, "A:%02X", ACC); break; + case CPUINFO_STR_REGISTER + MCS51_B: sprintf(info->s, "B:%02X", B); break; + case CPUINFO_STR_REGISTER + MCS51_DPH: sprintf(info->s, "DPH:%02X", DPH); break; + case CPUINFO_STR_REGISTER + MCS51_DPL: sprintf(info->s, "DPL:%02X", DPL); break; + case CPUINFO_STR_REGISTER + MCS51_IE: sprintf(info->s, "IE:%02X", IE); break; + case CPUINFO_STR_REGISTER + MCS51_R0: sprintf(info->s, "R0:%02X", R_REG(0)); break; + case CPUINFO_STR_REGISTER + MCS51_R1: sprintf(info->s, "R1:%02X", R_REG(1)); break; + case CPUINFO_STR_REGISTER + MCS51_R2: sprintf(info->s, "R2:%02X", R_REG(2)); break; + case CPUINFO_STR_REGISTER + MCS51_R3: sprintf(info->s, "R3:%02X", R_REG(3)); break; + case CPUINFO_STR_REGISTER + MCS51_R4: sprintf(info->s, "R4:%02X", R_REG(4)); break; + case CPUINFO_STR_REGISTER + MCS51_R5: sprintf(info->s, "R5:%02X", R_REG(5)); break; + case CPUINFO_STR_REGISTER + MCS51_R6: sprintf(info->s, "R6:%02X", R_REG(6)); break; + case CPUINFO_STR_REGISTER + MCS51_R7: sprintf(info->s, "R7:%02X", R_REG(7)); break; + case CPUINFO_STR_REGISTER + MCS51_RB: sprintf(info->s, "RB:%02X", ((PSW & 0x18)>>3)); break; } } diff --git a/src/emu/cpu/mcs51/mcs51.h b/src/emu/cpu/mcs51/mcs51.h index 0f186afea9c..68475c33605 100644 --- a/src/emu/cpu/mcs51/mcs51.h +++ b/src/emu/cpu/mcs51/mcs51.h @@ -51,7 +51,7 @@ enum enum { - MCS51_INT0_LINE = 0, /* P3.2: External Interrupt 0 */ + MCS51_INT0_LINE = 0, /* P3.2: External Interrupt 0 */ MCS51_INT1_LINE, /* P3.3: External Interrupt 1 */ MCS51_RX_LINE, /* P3.0: Serial Port Receive Line */ MCS51_T0_LINE, /* P3,4: Timer 0 External Input */ diff --git a/src/emu/cpu/mcs51/mcs51dasm.c b/src/emu/cpu/mcs51/mcs51dasm.c index a8889d0219a..7682797ac8e 100644 --- a/src/emu/cpu/mcs51/mcs51dasm.c +++ b/src/emu/cpu/mcs51/mcs51dasm.c @@ -137,10 +137,10 @@ static const struct { { FEATURE_DS5002FP, 0xd8, "rpctl" }, { FEATURE_DS5002FP, 0xd9, "rps" }, - { FEATURE_I83C751, 0x98, "i2con" }, - { FEATURE_I83C751, 0x99, "i2dat" }, - { FEATURE_I83C751, 0xd8, "i2cfg" }, - { FEATURE_I83C751, 0xf8, "i2sta" }, /* read only */ + { FEATURE_I83C751, 0x98, "i2con" }, + { FEATURE_I83C751, 0x99, "i2dat" }, + { FEATURE_I83C751, 0xd8, "i2cfg" }, + { FEATURE_I83C751, 0xf8, "i2sta" }, /* read only */ /* bit addresses */ diff --git a/src/emu/cpu/mips/mips3.c b/src/emu/cpu/mips/mips3.c index 62c6629643d..a8a942d988a 100644 --- a/src/emu/cpu/mips/mips3.c +++ b/src/emu/cpu/mips/mips3.c @@ -1807,7 +1807,7 @@ CPU_EXECUTE( mips3 ) case 0x00: /* BLTZ */ if ((INT64)RSVAL64 < 0) ADDPC(SIMMVAL); break; case 0x01: /* BGEZ */ if ((INT64)RSVAL64 >= 0) ADDPC(SIMMVAL); break; case 0x02: /* BLTZL */ if ((INT64)RSVAL64 < 0) ADDPC(SIMMVAL); else mips3.core.pc += 4; break; - case 0x03: /* BGEZL */ if ((INT64)RSVAL64 >= 0) ADDPC(SIMMVAL); else mips3.core.pc += 4; break; + case 0x03: /* BGEZL */ if ((INT64)RSVAL64 >= 0) ADDPC(SIMMVAL); else mips3.core.pc += 4; break; case 0x08: /* TGEI */ if ((INT64)RSVAL64 >= SIMMVAL) generate_exception(EXCEPTION_TRAP, 1); break; case 0x09: /* TGEIU */ if (RSVAL64 >= SIMMVAL) generate_exception(EXCEPTION_TRAP, 1); break; case 0x0a: /* TLTI */ if ((INT64)RSVAL64 < SIMMVAL) generate_exception(EXCEPTION_TRAP, 1); break; @@ -1861,7 +1861,7 @@ CPU_EXECUTE( mips3 ) RDVAL64 = (INT32)((INT32)RSVAL32 * (INT32)RTVAL32); mips3.core.icount -= 3; break; - default: invalid_instruction(op); + default: invalid_instruction(op); } break; case 0x20: /* LB */ if (RBYTE(SIMMVAL+RSVAL32, &temp) && RTREG) RTVAL64 = (INT8)temp; break; @@ -1873,7 +1873,7 @@ CPU_EXECUTE( mips3 ) case 0x26: /* LWR */ (*mips3.lwr)(op); break; case 0x27: /* LWU */ if (RWORD(SIMMVAL+RSVAL32, &temp) && RTREG) RTVAL64 = (UINT32)temp; break; case 0x28: /* SB */ WBYTE(SIMMVAL+RSVAL32, RTVAL32); break; - case 0x29: /* SH */ WHALF(SIMMVAL+RSVAL32, RTVAL32); break; + case 0x29: /* SH */ WHALF(SIMMVAL+RSVAL32, RTVAL32); break; case 0x2a: /* SWL */ (*mips3.swl)(op); break; case 0x2b: /* SW */ WWORD(SIMMVAL+RSVAL32, RTVAL32); break; case 0x2c: /* SDL */ (*mips3.sdl)(op); break; diff --git a/src/emu/cpu/mips/mips3com.c b/src/emu/cpu/mips/mips3com.c index 61ecb3d4dd8..ac76b17bb5a 100644 --- a/src/emu/cpu/mips/mips3com.c +++ b/src/emu/cpu/mips/mips3com.c @@ -361,19 +361,19 @@ void mips3com_set_info(mips3_state *mips, UINT32 state, cpuinfo *info) case CPUINFO_INT_PC: case CPUINFO_INT_REGISTER + MIPS3_PC: mips->pc = info->i; break; - case CPUINFO_INT_REGISTER + MIPS3_SR: mips->cpr[0][COP0_Status] = info->i; break; - case CPUINFO_INT_REGISTER + MIPS3_EPC: mips->cpr[0][COP0_EPC] = info->i; break; + case CPUINFO_INT_REGISTER + MIPS3_SR: mips->cpr[0][COP0_Status] = info->i; break; + case CPUINFO_INT_REGISTER + MIPS3_EPC: mips->cpr[0][COP0_EPC] = info->i; break; case CPUINFO_INT_REGISTER + MIPS3_CAUSE: mips->cpr[0][COP0_Cause] = info->i; break; case CPUINFO_INT_REGISTER + MIPS3_COUNT: mips->cpr[0][COP0_Count] = info->i; break; - case CPUINFO_INT_REGISTER + MIPS3_COMPARE: mips->cpr[0][COP0_Compare] = info->i; break; + case CPUINFO_INT_REGISTER + MIPS3_COMPARE: mips->cpr[0][COP0_Compare] = info->i; break; case CPUINFO_INT_REGISTER + MIPS3_INDEX: mips->cpr[0][COP0_Index] = info->i; break; - case CPUINFO_INT_REGISTER + MIPS3_RANDOM: mips->cpr[0][COP0_Random] = info->i; break; - case CPUINFO_INT_REGISTER + MIPS3_ENTRYHI: mips->cpr[0][COP0_EntryHi] = info->i; break; - case CPUINFO_INT_REGISTER + MIPS3_ENTRYLO0: mips->cpr[0][COP0_EntryLo0] = info->i; break; - case CPUINFO_INT_REGISTER + MIPS3_ENTRYLO1: mips->cpr[0][COP0_EntryLo1] = info->i; break; - case CPUINFO_INT_REGISTER + MIPS3_PAGEMASK: mips->cpr[0][COP0_PageMask] = info->i; break; + case CPUINFO_INT_REGISTER + MIPS3_RANDOM: mips->cpr[0][COP0_Random] = info->i; break; + case CPUINFO_INT_REGISTER + MIPS3_ENTRYHI: mips->cpr[0][COP0_EntryHi] = info->i; break; + case CPUINFO_INT_REGISTER + MIPS3_ENTRYLO0: mips->cpr[0][COP0_EntryLo0] = info->i; break; + case CPUINFO_INT_REGISTER + MIPS3_ENTRYLO1: mips->cpr[0][COP0_EntryLo1] = info->i; break; + case CPUINFO_INT_REGISTER + MIPS3_PAGEMASK: mips->cpr[0][COP0_PageMask] = info->i; break; case CPUINFO_INT_REGISTER + MIPS3_WIRED: mips->cpr[0][COP0_Wired] = info->i; break; - case CPUINFO_INT_REGISTER + MIPS3_BADVADDR: mips->cpr[0][COP0_BadVAddr] = info->i; break; + case CPUINFO_INT_REGISTER + MIPS3_BADVADDR: mips->cpr[0][COP0_BadVAddr] = info->i; break; case CPUINFO_INT_REGISTER + MIPS3_R0: /* can't change R0 */ break; case CPUINFO_INT_REGISTER + MIPS3_R1: mips->r[1] = info->i; break; @@ -472,7 +472,7 @@ void mips3com_get_info(mips3_state *mips, UINT32 state, cpuinfo *info) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_LOGADDR_WIDTH_PROGRAM: info->i = 32; break; - case CPUINFO_INT_PAGE_SHIFT_PROGRAM: info->i = MIPS3_MIN_PAGE_SHIFT; break; + case CPUINFO_INT_PAGE_SHIFT_PROGRAM: info->i = MIPS3_MIN_PAGE_SHIFT; break; case CPUINFO_INT_INPUT_STATE + MIPS3_IRQ0: info->i = (mips->cpr[0][COP0_Cause] & 0x400) ? ASSERT_LINE : CLEAR_LINE; break; case CPUINFO_INT_INPUT_STATE + MIPS3_IRQ1: info->i = (mips->cpr[0][COP0_Cause] & 0x800) ? ASSERT_LINE : CLEAR_LINE; break; @@ -557,8 +557,8 @@ void mips3com_get_info(mips3_state *mips, UINT32 state, cpuinfo *info) case CPUINFO_STR_REGISTER + MIPS3_PC: sprintf(info->s, "PC: %08X", mips->pc); break; case CPUINFO_STR_REGISTER + MIPS3_SR: sprintf(info->s, "SR: %08X", (UINT32)mips->cpr[0][COP0_Status]); break; case CPUINFO_STR_REGISTER + MIPS3_EPC: sprintf(info->s, "EPC:%08X", (UINT32)mips->cpr[0][COP0_EPC]); break; - case CPUINFO_STR_REGISTER + MIPS3_CAUSE: sprintf(info->s, "Cause:%08X", (UINT32)mips->cpr[0][COP0_Cause]); break; - case CPUINFO_STR_REGISTER + MIPS3_COUNT: sprintf(info->s, "Count:%08X", (UINT32)((cpu_get_total_cycles(mips->device) - mips->count_zero_time) / 2)); break; + case CPUINFO_STR_REGISTER + MIPS3_CAUSE: sprintf(info->s, "Cause:%08X", (UINT32)mips->cpr[0][COP0_Cause]); break; + case CPUINFO_STR_REGISTER + MIPS3_COUNT: sprintf(info->s, "Count:%08X", (UINT32)((cpu_get_total_cycles(mips->device) - mips->count_zero_time) / 2)); break; case CPUINFO_STR_REGISTER + MIPS3_COMPARE: sprintf(info->s, "Compare:%08X", (UINT32)mips->cpr[0][COP0_Compare]); break; case CPUINFO_STR_REGISTER + MIPS3_INDEX: sprintf(info->s, "Index:%08X", (UINT32)mips->cpr[0][COP0_Index]); break; case CPUINFO_STR_REGISTER + MIPS3_RANDOM: sprintf(info->s, "Random:%08X", (UINT32)mips->cpr[0][COP0_Random]); break; diff --git a/src/emu/cpu/mips/mips3com.h b/src/emu/cpu/mips/mips3com.h index db7c1c4fefa..f613fac2b9e 100644 --- a/src/emu/cpu/mips/mips3com.h +++ b/src/emu/cpu/mips/mips3com.h @@ -151,10 +151,10 @@ typedef enum _mips3_flavor mips3_flavor; #define FSREG ((op >> 11) & 31) #define FDREG ((op >> 6) & 31) -#define IS_SINGLE(o) (((o) & (1 << 21)) == 0) -#define IS_DOUBLE(o) (((o) & (1 << 21)) != 0) +#define IS_SINGLE(o) (((o) & (1 << 21)) == 0) +#define IS_DOUBLE(o) (((o) & (1 << 21)) != 0) #define IS_FLOAT(o) (((o) & (1 << 23)) == 0) -#define IS_INTEGRAL(o) (((o) & (1 << 23)) != 0) +#define IS_INTEGRAL(o) (((o) & (1 << 23)) != 0) #define SIMMVAL ((INT16)op) #define UIMMVAL ((UINT16)op) diff --git a/src/emu/cpu/mips/mips3drc.c b/src/emu/cpu/mips/mips3drc.c index 3ea024143dc..549fd0b7c2a 100644 --- a/src/emu/cpu/mips/mips3drc.c +++ b/src/emu/cpu/mips/mips3drc.c @@ -624,7 +624,7 @@ static CPU_GET_INFO( mips3 ) case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break; /* --- everything else is handled generically --- */ - default: mips3com_get_info(mips3, state, info); break; + default: mips3com_get_info(mips3, state, info); break; } } @@ -1213,7 +1213,7 @@ static void static_generate_exception(mips3_state *mips3, UINT8 exception, int r UML_LABEL(block, skip); // <skip>: /* adjust cycles */ - UML_SUB(block, MEM(&mips3->icount), MEM(&mips3->icount), IREG(1)); // sub icount,icount,cycles,S + UML_SUB(block, MEM(&mips3->icount), MEM(&mips3->icount), IREG(1)); // sub icount,icount,cycles,S UML_EXHc(block, IF_S, mips3->impstate->out_of_cycles, IREG(0)); // exh out_of_cycles,i0 UML_HASHJMP(block, MEM(&mips3->impstate->mode), IREG(0), mips3->impstate->nocode);// hashjmp <mode>,i0,nocode diff --git a/src/emu/cpu/mips/mips3dsm.c b/src/emu/cpu/mips/mips3dsm.c index 24d2a5193ef..38266c640ea 100644 --- a/src/emu/cpu/mips/mips3dsm.c +++ b/src/emu/cpu/mips/mips3dsm.c @@ -380,7 +380,7 @@ unsigned dasmmips3(char *buffer, unsigned pc, UINT32 op) case 0x0b: sprintf(buffer, "movn %s,%s,%s", reg[rd], reg[rs], reg[rt]); break; case 0x0c: sprintf(buffer, "syscall"); flags = DASMFLAG_STEP_OVER; break; case 0x0d: sprintf(buffer, "break"); flags = DASMFLAG_STEP_OVER; break; - case 0x0f: sprintf(buffer, "sync"); break; + case 0x0f: sprintf(buffer, "sync"); break; case 0x10: sprintf(buffer, "mfhi %s", reg[rd]); break; case 0x11: sprintf(buffer, "mthi %s", reg[rs]); break; case 0x12: sprintf(buffer, "mflo %s", reg[rd]); break; @@ -483,7 +483,7 @@ unsigned dasmmips3(char *buffer, unsigned pc, UINT32 op) case 1: sprintf(buffer, "madu %s,%s", reg[rs], reg[rt]); break; case 2: sprintf(buffer, "mul %s,%s,%s", reg[rs], reg[rt], reg[rd]); break; case 4: sprintf(buffer, "msub %s,%s", reg[rs], reg[rt]); break; - default:sprintf(buffer, "dc.l $%08x [invalid]", op); break; + default:sprintf(buffer, "dc.l $%08x [invalid]", op); break; } break; case 0x20: sprintf(buffer, "lb %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break; diff --git a/src/emu/cpu/mips/psx.c b/src/emu/cpu/mips/psx.c index 32a2587b160..0035e4be83d 100644 --- a/src/emu/cpu/mips/psx.c +++ b/src/emu/cpu/mips/psx.c @@ -6129,11 +6129,11 @@ CPU_GET_INFO( psxcpu ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + PSXCPU_IRQ0: info->i = (psxcpu->cp0r[ CP0_CAUSE ] & 0x400) ? ASSERT_LINE : CLEAR_LINE; break; case CPUINFO_INT_INPUT_STATE + PSXCPU_IRQ1: info->i = (psxcpu->cp0r[ CP0_CAUSE ] & 0x800) ? ASSERT_LINE : CLEAR_LINE; break; diff --git a/src/emu/cpu/mips/r3000.c b/src/emu/cpu/mips/r3000.c index fb98df460a2..7eb048c7531 100644 --- a/src/emu/cpu/mips/r3000.c +++ b/src/emu/cpu/mips/r3000.c @@ -852,7 +852,7 @@ static CPU_EXECUTE( r3000 ) case 0x25: /* LHU */ temp = RWORD(r3000, SIMMVAL+r3000->RSVAL); if (RTREG) r3000->RTVAL = (UINT16)temp; break; case 0x26: /* LWR */ (*r3000->lwr)(r3000, op); break; case 0x28: /* SB */ WBYTE(r3000, SIMMVAL+r3000->RSVAL, r3000->RTVAL); break; - case 0x29: /* SH */ WWORD(r3000, SIMMVAL+r3000->RSVAL, r3000->RTVAL); break; + case 0x29: /* SH */ WWORD(r3000, SIMMVAL+r3000->RSVAL, r3000->RTVAL); break; case 0x2a: /* SWL */ (*r3000->swl)(r3000, op); break; case 0x2b: /* SW */ WLONG(r3000, SIMMVAL+r3000->RSVAL, r3000->RTVAL); break; case 0x2e: /* SWR */ (*r3000->swr)(r3000, op); break; @@ -1182,11 +1182,11 @@ static CPU_GET_INFO( r3000 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 29; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + R3000_IRQ0: info->i = (r3000->cpr[0][COP0_Cause] & 0x400) ? ASSERT_LINE : CLEAR_LINE; break; case CPUINFO_INT_INPUT_STATE + R3000_IRQ1: info->i = (r3000->cpr[0][COP0_Cause] & 0x800) ? ASSERT_LINE : CLEAR_LINE; break; @@ -1250,23 +1250,23 @@ static CPU_GET_INFO( r3000 ) case DEVINFO_STR_FAMILY: strcpy(info->s, "MIPS II"); break; case DEVINFO_STR_VERSION: strcpy(info->s, "1.0"); break; case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break; - case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright Aaron Giles"); break; + case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright Aaron Giles"); break; case CPUINFO_STR_FLAGS: strcpy(info->s, " "); break; - case CPUINFO_STR_REGISTER + R3000_PC: sprintf(info->s, "PC: %08X", r3000->pc); break; - case CPUINFO_STR_REGISTER + R3000_SR: sprintf(info->s, "SR: %08X", r3000->SR); break; - - case CPUINFO_STR_REGISTER + R3000_R0: sprintf(info->s, "R0: %08X", r3000->r[0]); break; - case CPUINFO_STR_REGISTER + R3000_R1: sprintf(info->s, "R1: %08X", r3000->r[1]); break; - case CPUINFO_STR_REGISTER + R3000_R2: sprintf(info->s, "R2: %08X", r3000->r[2]); break; - case CPUINFO_STR_REGISTER + R3000_R3: sprintf(info->s, "R3: %08X", r3000->r[3]); break; - case CPUINFO_STR_REGISTER + R3000_R4: sprintf(info->s, "R4: %08X", r3000->r[4]); break; - case CPUINFO_STR_REGISTER + R3000_R5: sprintf(info->s, "R5: %08X", r3000->r[5]); break; - case CPUINFO_STR_REGISTER + R3000_R6: sprintf(info->s, "R6: %08X", r3000->r[6]); break; - case CPUINFO_STR_REGISTER + R3000_R7: sprintf(info->s, "R7: %08X", r3000->r[7]); break; - case CPUINFO_STR_REGISTER + R3000_R8: sprintf(info->s, "R8: %08X", r3000->r[8]); break; - case CPUINFO_STR_REGISTER + R3000_R9: sprintf(info->s, "R9: %08X", r3000->r[9]); break; + case CPUINFO_STR_REGISTER + R3000_PC: sprintf(info->s, "PC: %08X", r3000->pc); break; + case CPUINFO_STR_REGISTER + R3000_SR: sprintf(info->s, "SR: %08X", r3000->SR); break; + + case CPUINFO_STR_REGISTER + R3000_R0: sprintf(info->s, "R0: %08X", r3000->r[0]); break; + case CPUINFO_STR_REGISTER + R3000_R1: sprintf(info->s, "R1: %08X", r3000->r[1]); break; + case CPUINFO_STR_REGISTER + R3000_R2: sprintf(info->s, "R2: %08X", r3000->r[2]); break; + case CPUINFO_STR_REGISTER + R3000_R3: sprintf(info->s, "R3: %08X", r3000->r[3]); break; + case CPUINFO_STR_REGISTER + R3000_R4: sprintf(info->s, "R4: %08X", r3000->r[4]); break; + case CPUINFO_STR_REGISTER + R3000_R5: sprintf(info->s, "R5: %08X", r3000->r[5]); break; + case CPUINFO_STR_REGISTER + R3000_R6: sprintf(info->s, "R6: %08X", r3000->r[6]); break; + case CPUINFO_STR_REGISTER + R3000_R7: sprintf(info->s, "R7: %08X", r3000->r[7]); break; + case CPUINFO_STR_REGISTER + R3000_R8: sprintf(info->s, "R8: %08X", r3000->r[8]); break; + case CPUINFO_STR_REGISTER + R3000_R9: sprintf(info->s, "R9: %08X", r3000->r[9]); break; case CPUINFO_STR_REGISTER + R3000_R10: sprintf(info->s, "R10:%08X", r3000->r[10]); break; case CPUINFO_STR_REGISTER + R3000_R11: sprintf(info->s, "R11:%08X", r3000->r[11]); break; case CPUINFO_STR_REGISTER + R3000_R12: sprintf(info->s, "R12:%08X", r3000->r[12]); break; diff --git a/src/emu/cpu/mips/r3kdasm.c b/src/emu/cpu/mips/r3kdasm.c index c7ce7ea7135..3664c7e03ce 100644 --- a/src/emu/cpu/mips/r3kdasm.c +++ b/src/emu/cpu/mips/r3kdasm.c @@ -260,7 +260,7 @@ static unsigned dasmr3k(char *buffer, unsigned pc, UINT32 op) else sprintf(buffer, "jalr %s,%s", reg[rs], reg[rd]); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break; case 0x0c: sprintf(buffer, "syscall"); flags = DASMFLAG_STEP_OVER; break; - case 0x0d: sprintf(buffer, "break"); flags = DASMFLAG_STEP_OVER; break; + case 0x0d: sprintf(buffer, "break"); flags = DASMFLAG_STEP_OVER; break; case 0x0f: sprintf(buffer, "sync [invalid]"); break; case 0x10: sprintf(buffer, "mfhi %s", reg[rd]); break; case 0x11: sprintf(buffer, "mthi %s", reg[rs]); break; diff --git a/src/emu/cpu/nec/nec.c b/src/emu/cpu/nec/nec.c index 7fabbb9e51e..a63cdff2139 100644 --- a/src/emu/cpu/nec/nec.c +++ b/src/emu/cpu/nec/nec.c @@ -145,7 +145,7 @@ typedef struct _nec_state_t nec_state_t; struct _nec_state_t { necbasicregs regs; - UINT16 sregs[4]; + UINT16 sregs[4]; UINT16 ip; @@ -395,13 +395,13 @@ static void external_int(nec_state_t *nec_state) #define OP(num,func_name) static void func_name(nec_state_t *nec_state) -OP( 0x00, i_add_br8 ) { DEF_br8; ADDB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); } +OP( 0x00, i_add_br8 ) { DEF_br8; ADDB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); } OP( 0x01, i_add_wr16 ) { DEF_wr16; ADDW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,EA);} OP( 0x02, i_add_r8b ) { DEF_r8b; ADDB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); } OP( 0x03, i_add_r16w ) { DEF_r16w; ADDW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,EA); } OP( 0x04, i_add_ald8 ) { DEF_ald8; ADDB; nec_state->regs.b[AL]=dst; CLKS(4,4,2); } OP( 0x05, i_add_axd16) { DEF_axd16; ADDW; nec_state->regs.w[AW]=dst; CLKS(4,4,2); } -OP( 0x06, i_push_es ) { PUSH(nec_state->sregs[DS1]); CLKS(12,8,3); } +OP( 0x06, i_push_es ) { PUSH(nec_state->sregs[DS1]); CLKS(12,8,3); } OP( 0x07, i_pop_es ) { POP(nec_state->sregs[DS1]); CLKS(12,8,5); } OP( 0x08, i_or_br8 ) { DEF_br8; ORB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); } @@ -446,25 +446,25 @@ OP( 0x0f, i_pre_nec ) { UINT32 ModRM, tmp, tmp2; } } -OP( 0x10, i_adc_br8 ) { DEF_br8; src+=CF; ADDB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); } +OP( 0x10, i_adc_br8 ) { DEF_br8; src+=CF; ADDB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); } OP( 0x11, i_adc_wr16 ) { DEF_wr16; src+=CF; ADDW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,EA);} -OP( 0x12, i_adc_r8b ) { DEF_r8b; src+=CF; ADDB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); } +OP( 0x12, i_adc_r8b ) { DEF_r8b; src+=CF; ADDB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); } OP( 0x13, i_adc_r16w ) { DEF_r16w; src+=CF; ADDW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,EA); } OP( 0x14, i_adc_ald8 ) { DEF_ald8; src+=CF; ADDB; nec_state->regs.b[AL]=dst; CLKS(4,4,2); } OP( 0x15, i_adc_axd16) { DEF_axd16; src+=CF; ADDW; nec_state->regs.w[AW]=dst; CLKS(4,4,2); } OP( 0x16, i_push_ss ) { PUSH(nec_state->sregs[SS]); CLKS(12,8,3); } OP( 0x17, i_pop_ss ) { POP(nec_state->sregs[SS]); CLKS(12,8,5); nec_state->no_interrupt=1; } -OP( 0x18, i_sbb_br8 ) { DEF_br8; src+=CF; SUBB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); } +OP( 0x18, i_sbb_br8 ) { DEF_br8; src+=CF; SUBB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); } OP( 0x19, i_sbb_wr16 ) { DEF_wr16; src+=CF; SUBW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,EA);} -OP( 0x1a, i_sbb_r8b ) { DEF_r8b; src+=CF; SUBB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); } +OP( 0x1a, i_sbb_r8b ) { DEF_r8b; src+=CF; SUBB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); } OP( 0x1b, i_sbb_r16w ) { DEF_r16w; src+=CF; SUBW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,EA); } -OP( 0x1c, i_sbb_ald8 ) { DEF_ald8; src+=CF; SUBB; nec_state->regs.b[AL]=dst; CLKS(4,4,2); } +OP( 0x1c, i_sbb_ald8 ) { DEF_ald8; src+=CF; SUBB; nec_state->regs.b[AL]=dst; CLKS(4,4,2); } OP( 0x1d, i_sbb_axd16) { DEF_axd16; src+=CF; SUBW; nec_state->regs.w[AW]=dst; CLKS(4,4,2); } OP( 0x1e, i_push_ds ) { PUSH(nec_state->sregs[DS0]); CLKS(12,8,3); } OP( 0x1f, i_pop_ds ) { POP(nec_state->sregs[DS0]); CLKS(12,8,5); } -OP( 0x20, i_and_br8 ) { DEF_br8; ANDB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); } +OP( 0x20, i_and_br8 ) { DEF_br8; ANDB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); } OP( 0x21, i_and_wr16 ) { DEF_wr16; ANDW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,EA);} OP( 0x22, i_and_r8b ) { DEF_r8b; ANDB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); } OP( 0x23, i_and_r16w ) { DEF_r16w; ANDW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,EA); } @@ -473,23 +473,23 @@ OP( 0x25, i_and_axd16) { DEF_axd16; ANDW; nec_state->regs.w[AW]=dst; CLKS(4,4, OP( 0x26, i_es ) { nec_state->seg_prefix=TRUE; nec_state->prefix_base=nec_state->sregs[DS1]<<4; CLK(2); nec_instruction[fetchop(nec_state)](nec_state); nec_state->seg_prefix=FALSE; } OP( 0x27, i_daa ) { ADJ4(6,0x60); CLKS(3,3,2); } -OP( 0x28, i_sub_br8 ) { DEF_br8; SUBB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); } +OP( 0x28, i_sub_br8 ) { DEF_br8; SUBB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); } OP( 0x29, i_sub_wr16 ) { DEF_wr16; SUBW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,EA);} -OP( 0x2a, i_sub_r8b ) { DEF_r8b; SUBB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); } +OP( 0x2a, i_sub_r8b ) { DEF_r8b; SUBB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); } OP( 0x2b, i_sub_r16w ) { DEF_r16w; SUBW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,EA); } -OP( 0x2c, i_sub_ald8 ) { DEF_ald8; SUBB; nec_state->regs.b[AL]=dst; CLKS(4,4,2); } +OP( 0x2c, i_sub_ald8 ) { DEF_ald8; SUBB; nec_state->regs.b[AL]=dst; CLKS(4,4,2); } OP( 0x2d, i_sub_axd16) { DEF_axd16; SUBW; nec_state->regs.w[AW]=dst; CLKS(4,4,2); } OP( 0x2e, i_cs ) { nec_state->seg_prefix=TRUE; nec_state->prefix_base=nec_state->sregs[PS]<<4; CLK(2); nec_instruction[fetchop(nec_state)](nec_state); nec_state->seg_prefix=FALSE; } OP( 0x2f, i_das ) { ADJ4(-6,-0x60); CLKS(3,3,2); } OP( 0x30, i_xor_br8 ) { DEF_br8; XORB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); } OP( 0x31, i_xor_wr16 ) { DEF_wr16; XORW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,EA);} -OP( 0x32, i_xor_r8b ) { DEF_r8b; XORB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); } +OP( 0x32, i_xor_r8b ) { DEF_r8b; XORB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); } OP( 0x33, i_xor_r16w ) { DEF_r16w; XORW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,EA); } -OP( 0x34, i_xor_ald8 ) { DEF_ald8; XORB; nec_state->regs.b[AL]=dst; CLKS(4,4,2); } +OP( 0x34, i_xor_ald8 ) { DEF_ald8; XORB; nec_state->regs.b[AL]=dst; CLKS(4,4,2); } OP( 0x35, i_xor_axd16) { DEF_axd16; XORW; nec_state->regs.w[AW]=dst; CLKS(4,4,2); } OP( 0x36, i_ss ) { nec_state->seg_prefix=TRUE; nec_state->prefix_base=nec_state->sregs[SS]<<4; CLK(2); nec_instruction[fetchop(nec_state)](nec_state); nec_state->seg_prefix=FALSE; } -OP( 0x37, i_aaa ) { ADJB(6, (nec_state->regs.b[AL] > 0xf9) ? 2 : 1); CLKS(7,7,4); } +OP( 0x37, i_aaa ) { ADJB(6, (nec_state->regs.b[AL] > 0xf9) ? 2 : 1); CLKS(7,7,4); } OP( 0x38, i_cmp_br8 ) { DEF_br8; SUBB; CLKM(2,2,2,11,11,6); } OP( 0x39, i_cmp_wr16 ) { DEF_wr16; SUBW; CLKR(15,15,8,15,11,6,2,EA);} @@ -569,11 +569,11 @@ OP( 0x62, i_chkind ) { if (tmp<low || tmp>high) { nec_interrupt(nec_state, 5,0); } - nec_state->icount-=20; + nec_state->icount-=20; logerror("%06x: bound %04x high %04x low %04x tmp\n",PC(nec_state),high,low,tmp); } OP( 0x63, i_brkn ) { nec_interrupt(nec_state, FETCH(),1); CLKS(50,50,24); } // timing not verified, used by riskchal / gussun -OP( 0x64, i_repnc ) { UINT32 next = fetchop(nec_state); UINT16 c = nec_state->regs.w[CW]; +OP( 0x64, i_repnc ) { UINT32 next = fetchop(nec_state); UINT16 c = nec_state->regs.w[CW]; switch(next) { /* Segments */ case 0x26: nec_state->seg_prefix=TRUE; nec_state->prefix_base=nec_state->sregs[DS1]<<4; next = fetchop(nec_state); CLK(2); break; case 0x2e: nec_state->seg_prefix=TRUE; nec_state->prefix_base=nec_state->sregs[PS]<<4; next = fetchop(nec_state); CLK(2); break; @@ -601,7 +601,7 @@ OP( 0x64, i_repnc ) { UINT32 next = fetchop(nec_state); UINT16 c = nec_state-> nec_state->seg_prefix=FALSE; } -OP( 0x65, i_repc ) { UINT32 next = fetchop(nec_state); UINT16 c = nec_state->regs.w[CW]; +OP( 0x65, i_repc ) { UINT32 next = fetchop(nec_state); UINT16 c = nec_state->regs.w[CW]; switch(next) { /* Segments */ case 0x26: nec_state->seg_prefix=TRUE; nec_state->prefix_base=nec_state->sregs[DS1]<<4; next = fetchop(nec_state); CLK(2); break; case 0x2e: nec_state->seg_prefix=TRUE; nec_state->prefix_base=nec_state->sregs[PS]<<4; next = fetchop(nec_state); CLK(2); break; @@ -630,8 +630,8 @@ OP( 0x65, i_repc ) { UINT32 next = fetchop(nec_state); UINT16 c = nec_state->r } OP( 0x68, i_push_d16 ) { UINT32 tmp; tmp = FETCHWORD(); PUSH(tmp); CLKW(12,12,5,12,8,5,nec_state->regs.w[SP]); } -OP( 0x69, i_imul_d16 ) { UINT32 tmp; DEF_r16w; tmp = FETCHWORD(); dst = (INT32)((INT16)src)*(INT32)((INT16)tmp); nec_state->CarryVal = nec_state->OverVal = (((INT32)dst) >> 15 != 0) && (((INT32)dst) >> 15 != -1); RegWord(ModRM)=(WORD)dst; nec_state->icount-=(ModRM >=0xc0 )?38:47;} -OP( 0x6a, i_push_d8 ) { UINT32 tmp = (WORD)((INT16)((INT8)FETCH())); PUSH(tmp); CLKW(11,11,5,11,7,3,nec_state->regs.w[SP]); } +OP( 0x69, i_imul_d16 ) { UINT32 tmp; DEF_r16w; tmp = FETCHWORD(); dst = (INT32)((INT16)src)*(INT32)((INT16)tmp); nec_state->CarryVal = nec_state->OverVal = (((INT32)dst) >> 15 != 0) && (((INT32)dst) >> 15 != -1); RegWord(ModRM)=(WORD)dst; nec_state->icount-=(ModRM >=0xc0 )?38:47;} +OP( 0x6a, i_push_d8 ) { UINT32 tmp = (WORD)((INT16)((INT8)FETCH())); PUSH(tmp); CLKW(11,11,5,11,7,3,nec_state->regs.w[SP]); } OP( 0x6b, i_imul_d8 ) { UINT32 src2; DEF_r16w; src2= (WORD)((INT16)((INT8)FETCH())); dst = (INT32)((INT16)src)*(INT32)((INT16)src2); nec_state->CarryVal = nec_state->OverVal = (((INT32)dst) >> 15 != 0) && (((INT32)dst) >> 15 != -1); RegWord(ModRM)=(WORD)dst; nec_state->icount-=(ModRM >=0xc0 )?31:39; } OP( 0x6c, i_insb ) { PutMemB(DS1,nec_state->regs.w[IY],read_port_byte(nec_state->regs.w[DW])); nec_state->regs.w[IY]+= -2 * nec_state->DF + 1; CLK(8); } OP( 0x6d, i_insw ) { PutMemW(DS1,nec_state->regs.w[IY],read_port_word(nec_state->regs.w[DW])); nec_state->regs.w[IY]+= -4 * nec_state->DF + 2; CLKS(18,10,8); } @@ -652,7 +652,7 @@ OP( 0x7a, i_jp ) { JMP( PF); CLKS(4,4,3); } OP( 0x7b, i_jnp ) { JMP(!PF); CLKS(4,4,3); } OP( 0x7c, i_jl ) { JMP((SF!=OF)&&(!ZF)); CLKS(4,4,3); } OP( 0x7d, i_jnl ) { JMP((ZF)||(SF==OF)); CLKS(4,4,3); } -OP( 0x7e, i_jle ) { JMP((ZF)||(SF!=OF)); CLKS(4,4,3); } +OP( 0x7e, i_jle ) { JMP((ZF)||(SF!=OF)); CLKS(4,4,3); } OP( 0x7f, i_jnle ) { JMP((SF==OF)&&(!ZF)); CLKS(4,4,3); } OP( 0x80, i_80pre ) { UINT32 dst, src; GetModRM; dst = GetRMByte(ModRM); src = FETCH(); @@ -716,12 +716,12 @@ OP( 0x85, i_test_wr16 ) { DEF_wr16; ANDW; CLKR(14,14,8,14,10,6,2,EA); } OP( 0x86, i_xchg_br8 ) { DEF_br8; RegByte(ModRM)=dst; PutbackRMByte(ModRM,src); CLKM(3,3,3,16,18,8); } OP( 0x87, i_xchg_wr16 ) { DEF_wr16; RegWord(ModRM)=dst; PutbackRMWord(ModRM,src); CLKR(24,24,12,24,16,8,3,EA); } -OP( 0x88, i_mov_br8 ) { UINT8 src; GetModRM; src = RegByte(ModRM); PutRMByte(ModRM,src); CLKM(2,2,2,9,9,3); } -OP( 0x89, i_mov_wr16 ) { UINT16 src; GetModRM; src = RegWord(ModRM); PutRMWord(ModRM,src); CLKR(13,13,5,13,9,3,2,EA); } -OP( 0x8a, i_mov_r8b ) { UINT8 src; GetModRM; src = GetRMByte(ModRM); RegByte(ModRM)=src; CLKM(2,2,2,11,11,5); } +OP( 0x88, i_mov_br8 ) { UINT8 src; GetModRM; src = RegByte(ModRM); PutRMByte(ModRM,src); CLKM(2,2,2,9,9,3); } +OP( 0x89, i_mov_wr16 ) { UINT16 src; GetModRM; src = RegWord(ModRM); PutRMWord(ModRM,src); CLKR(13,13,5,13,9,3,2,EA); } +OP( 0x8a, i_mov_r8b ) { UINT8 src; GetModRM; src = GetRMByte(ModRM); RegByte(ModRM)=src; CLKM(2,2,2,11,11,5); } OP( 0x8b, i_mov_r16w ) { UINT16 src; GetModRM; src = GetRMWord(ModRM); RegWord(ModRM)=src; CLKR(15,15,7,15,11,5,2,EA); } OP( 0x8c, i_mov_wsreg ) { GetModRM; PutRMWord(ModRM,nec_state->sregs[(ModRM & 0x38) >> 3]); CLKR(14,14,5,14,10,3,2,EA); } -OP( 0x8d, i_lea ) { UINT16 ModRM = FETCH(); (void)(*GetEA[ModRM])(nec_state); RegWord(ModRM)=EO; CLKS(4,4,2); } +OP( 0x8d, i_lea ) { UINT16 ModRM = FETCH(); (void)(*GetEA[ModRM])(nec_state); RegWord(ModRM)=EO; CLKS(4,4,2); } OP( 0x8e, i_mov_sregw ) { UINT16 src; GetModRM; src = GetRMWord(ModRM); CLKR(15,15,7,15,11,5,2,EA); switch (ModRM & 0x38) { case 0x00: nec_state->sregs[DS1] = src; break; /* mov es,ew */ @@ -762,12 +762,12 @@ OP( 0xa7, i_cmpsw ) { UINT32 src = GetMemW(DS1, nec_state->regs.w[IY]); UIN OP( 0xa8, i_test_ald8 ) { DEF_ald8; ANDB; CLKS(4,4,2); } OP( 0xa9, i_test_axd16 ) { DEF_axd16; ANDW; CLKS(4,4,2); } -OP( 0xaa, i_stosb ) { PutMemB(DS1,nec_state->regs.w[IY],nec_state->regs.b[AL]); nec_state->regs.w[IY] += -2 * nec_state->DF + 1; CLKS(4,4,3); } -OP( 0xab, i_stosw ) { PutMemW(DS1,nec_state->regs.w[IY],nec_state->regs.w[AW]); nec_state->regs.w[IY] += -4 * nec_state->DF + 2; CLKW(8,8,5,8,4,3,nec_state->regs.w[IY]); } +OP( 0xaa, i_stosb ) { PutMemB(DS1,nec_state->regs.w[IY],nec_state->regs.b[AL]); nec_state->regs.w[IY] += -2 * nec_state->DF + 1; CLKS(4,4,3); } +OP( 0xab, i_stosw ) { PutMemW(DS1,nec_state->regs.w[IY],nec_state->regs.w[AW]); nec_state->regs.w[IY] += -4 * nec_state->DF + 2; CLKW(8,8,5,8,4,3,nec_state->regs.w[IY]); } OP( 0xac, i_lodsb ) { nec_state->regs.b[AL] = GetMemB(DS0,nec_state->regs.w[IX]); nec_state->regs.w[IX] += -2 * nec_state->DF + 1; CLKS(4,4,3); } OP( 0xad, i_lodsw ) { nec_state->regs.w[AW] = GetMemW(DS0,nec_state->regs.w[IX]); nec_state->regs.w[IX] += -4 * nec_state->DF + 2; CLKW(8,8,5,8,4,3,nec_state->regs.w[IX]); } -OP( 0xae, i_scasb ) { UINT32 src = GetMemB(DS1, nec_state->regs.w[IY]); UINT32 dst = nec_state->regs.b[AL]; SUBB; nec_state->regs.w[IY] += -2 * nec_state->DF + 1; CLKS(4,4,3); } -OP( 0xaf, i_scasw ) { UINT32 src = GetMemW(DS1, nec_state->regs.w[IY]); UINT32 dst = nec_state->regs.w[AW]; SUBW; nec_state->regs.w[IY] += -4 * nec_state->DF + 2; CLKW(8,8,5,8,4,3,nec_state->regs.w[IY]); } +OP( 0xae, i_scasb ) { UINT32 src = GetMemB(DS1, nec_state->regs.w[IY]); UINT32 dst = nec_state->regs.b[AL]; SUBB; nec_state->regs.w[IY] += -2 * nec_state->DF + 1; CLKS(4,4,3); } +OP( 0xaf, i_scasw ) { UINT32 src = GetMemW(DS1, nec_state->regs.w[IY]); UINT32 dst = nec_state->regs.w[AW]; SUBW; nec_state->regs.w[IY] += -4 * nec_state->DF + 2; CLKW(8,8,5,8,4,3,nec_state->regs.w[IY]); } OP( 0xb0, i_mov_ald8 ) { nec_state->regs.b[AL] = FETCH(); CLKS(4,4,2); } OP( 0xb1, i_mov_cld8 ) { nec_state->regs.b[CL] = FETCH(); CLKS(4,4,2); } @@ -1004,7 +1004,7 @@ OP( 0xf6, i_f6pre ) { UINT32 tmp; UINT32 uresult,uresult2; INT32 result,result2; switch (ModRM & 0x38) { case 0x00: tmp &= FETCH(); nec_state->CarryVal = nec_state->OverVal = 0; SetSZPF_Byte(tmp); nec_state->icount-=(ModRM >=0xc0 )?4:11; break; /* TEST */ case 0x08: logerror("%06x: Undefined opcode 0xf6 0x08\n",PC(nec_state)); break; - case 0x10: PutbackRMByte(ModRM,~tmp); nec_state->icount-=(ModRM >=0xc0 )?2:16; break; /* NOT */ + case 0x10: PutbackRMByte(ModRM,~tmp); nec_state->icount-=(ModRM >=0xc0 )?2:16; break; /* NOT */ case 0x18: nec_state->CarryVal=(tmp!=0); tmp=(~tmp)+1; SetSZPF_Byte(tmp); PutbackRMByte(ModRM,tmp&0xff); nec_state->icount-=(ModRM >=0xc0 )?2:16; break; /* NEG */ case 0x20: uresult = nec_state->regs.b[AL]*tmp; nec_state->regs.w[AW]=(WORD)uresult; nec_state->CarryVal=nec_state->OverVal=(nec_state->regs.b[AH]!=0); nec_state->icount-=(ModRM >=0xc0 )?30:36; break; /* MULU */ case 0x28: result = (INT16)((INT8)nec_state->regs.b[AL])*(INT16)((INT8)tmp); nec_state->regs.w[AW]=(WORD)result; nec_state->CarryVal=nec_state->OverVal=(nec_state->regs.b[AH]!=0); nec_state->icount-=(ModRM >=0xc0 )?30:36; break; /* MUL */ @@ -1018,13 +1018,13 @@ OP( 0xf7, i_f7pre ) { UINT32 tmp,tmp2; UINT32 uresult,uresult2; INT32 result,r switch (ModRM & 0x38) { case 0x00: tmp2 = FETCHWORD(); tmp &= tmp2; nec_state->CarryVal = nec_state->OverVal = 0; SetSZPF_Word(tmp); nec_state->icount-=(ModRM >=0xc0 )?4:11; break; /* TEST */ case 0x08: logerror("%06x: Undefined opcode 0xf7 0x08\n",PC(nec_state)); break; - case 0x10: PutbackRMWord(ModRM,~tmp); nec_state->icount-=(ModRM >=0xc0 )?2:16; break; /* NOT */ + case 0x10: PutbackRMWord(ModRM,~tmp); nec_state->icount-=(ModRM >=0xc0 )?2:16; break; /* NOT */ case 0x18: nec_state->CarryVal=(tmp!=0); tmp=(~tmp)+1; SetSZPF_Word(tmp); PutbackRMWord(ModRM,tmp&0xffff); nec_state->icount-=(ModRM >=0xc0 )?2:16; break; /* NEG */ case 0x20: uresult = nec_state->regs.w[AW]*tmp; nec_state->regs.w[AW]=uresult&0xffff; nec_state->regs.w[DW]=((UINT32)uresult)>>16; nec_state->CarryVal=nec_state->OverVal=(nec_state->regs.w[DW]!=0); nec_state->icount-=(ModRM >=0xc0 )?30:36; break; /* MULU */ case 0x28: result = (INT32)((INT16)nec_state->regs.w[AW])*(INT32)((INT16)tmp); nec_state->regs.w[AW]=result&0xffff; nec_state->regs.w[DW]=result>>16; nec_state->CarryVal=nec_state->OverVal=(nec_state->regs.w[DW]!=0); nec_state->icount-=(ModRM >=0xc0 )?30:36; break; /* MUL */ case 0x30: if (tmp) { DIVUW; } else nec_interrupt(nec_state, 0,0); nec_state->icount-=(ModRM >=0xc0 )?43:53; break; case 0x38: if (tmp) { DIVW; } else nec_interrupt(nec_state, 0,0); nec_state->icount-=(ModRM >=0xc0 )?43:53; break; - } + } } OP( 0xf8, i_clc ) { nec_state->CarryVal = 0; CLK(2); } @@ -1341,11 +1341,11 @@ static CPU_GET_INFO( nec ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 20; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 16; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 16; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 16; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + 0: info->i = (nec_state->pending_irq & INT_IRQ) ? ASSERT_LINE : CLEAR_LINE; break; case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = nec_state->nmi_state; break; diff --git a/src/emu/cpu/nec/necmodrm.h b/src/emu/cpu/nec/necmodrm.h index b2fe950587b..8673fd53a70 100644 --- a/src/emu/cpu/nec/necmodrm.h +++ b/src/emu/cpu/nec/necmodrm.h @@ -15,8 +15,8 @@ static struct { #define GetRMWord(ModRM) \ ((ModRM) >= 0xc0 ? nec_state->regs.w[Mod_RM.RM.w[ModRM]] : ( (*GetEA[ModRM])(nec_state), read_word( EA ) )) -#define PutbackRMWord(ModRM,val) \ -{ \ +#define PutbackRMWord(ModRM,val) \ +{ \ if (ModRM >= 0xc0) nec_state->regs.w[Mod_RM.RM.w[ModRM]]=val; \ else write_word(EA,val); \ } @@ -53,13 +53,13 @@ static struct { if (ModRM >= 0xc0) \ nec_state->regs.b[Mod_RM.RM.b[ModRM]]=val; \ else \ - write_byte( (*GetEA[ModRM])(nec_state) ,val); \ + write_byte( (*GetEA[ModRM])(nec_state) ,val); \ } #define PutImmRMByte(ModRM) \ { \ if (ModRM >= 0xc0) \ - nec_state->regs.b[Mod_RM.RM.b[ModRM]]=FETCH(); \ + nec_state->regs.b[Mod_RM.RM.b[ModRM]]=FETCH(); \ else { \ (*GetEA[ModRM])(nec_state); \ write_byte( EA , FETCH() ); \ @@ -99,6 +99,6 @@ static struct { UINT32 dst = nec_state->regs.b[AL] #define DEF_axd16 \ - UINT32 src = FETCH(); \ + UINT32 src = FETCH(); \ UINT32 dst = nec_state->regs.w[AW]; \ src += (FETCH() << 8) diff --git a/src/emu/cpu/nec/necpriv.h b/src/emu/cpu/nec/necpriv.h index 8b92556088e..90852755510 100644 --- a/src/emu/cpu/nec/necpriv.h +++ b/src/emu/cpu/nec/necpriv.h @@ -158,16 +158,16 @@ typedef enum { #define IncWordReg(Reg) \ unsigned tmp = (unsigned)nec_state->regs.w[Reg]; \ unsigned tmp1 = tmp+1; \ - nec_state->OverVal = (tmp == 0x7fff); \ + nec_state->OverVal = (tmp == 0x7fff); \ SetAF(tmp1,tmp,1); \ SetSZPF_Word(tmp1); \ nec_state->regs.w[Reg]=tmp1 #define DecWordReg(Reg) \ unsigned tmp = (unsigned)nec_state->regs.w[Reg]; \ - unsigned tmp1 = tmp-1; \ - nec_state->OverVal = (tmp == 0x8000); \ - SetAF(tmp1,tmp,1); \ + unsigned tmp1 = tmp-1; \ + nec_state->OverVal = (tmp == 0x8000); \ + SetAF(tmp1,tmp,1); \ SetSZPF_Word(tmp1); \ nec_state->regs.w[Reg]=tmp1 @@ -177,7 +177,7 @@ typedef enum { tmp = (int)((INT8)FETCH()); \ if (flag) \ { \ - static const UINT8 table[3]={3,10,10}; \ + static const UINT8 table[3]={3,10,10}; \ nec_state->ip = (WORD)(nec_state->ip+tmp); \ nec_state->icount-=table[nec_state->chip_type/8]; \ CHANGE_PC; \ @@ -241,9 +241,9 @@ typedef enum { else \ tmp |= (1<<tmp2) -#define XchgAWReg(Reg) \ - WORD tmp; \ - tmp = nec_state->regs.w[Reg]; \ +#define XchgAWReg(Reg) \ + WORD tmp; \ + tmp = nec_state->regs.w[Reg]; \ nec_state->regs.w[Reg] = nec_state->regs.w[AW]; \ nec_state->regs.w[AW] = tmp @@ -307,7 +307,7 @@ typedef enum { int count = (nec_state->regs.b[CL]+1)/2; \ unsigned di = nec_state->regs.w[IY]; \ unsigned si = nec_state->regs.w[IX]; \ - static const UINT8 table[3]={18,19,19}; \ + static const UINT8 table[3]={18,19,19}; \ if (nec_state->seg_prefix) logerror("%06x: Warning: seg_prefix defined for add4s\n",PC(nec_state)); \ nec_state->ZeroVal = nec_state->CarryVal = 0; \ for (i=0;i<count;i++) { \ diff --git a/src/emu/cpu/pdp1/pdp1.c b/src/emu/cpu/pdp1/pdp1.c index adcb5cfa4ab..10fbd995ed4 100644 --- a/src/emu/cpu/pdp1/pdp1.c +++ b/src/emu/cpu/pdp1/pdp1.c @@ -956,11 +956,11 @@ CPU_GET_INFO( pdp1 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 18; /*16+2 ignored bits to make double word address*/ break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_SP: info->i = 0; /* no SP */ break; case CPUINFO_INT_PC: info->i = PC; break; @@ -1031,7 +1031,7 @@ CPU_GET_INFO( pdp1 ) case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break; /* --- the following bits of info are returned as NULL-terminated strings --- */ - case DEVINFO_STR_NAME: strcpy(info->s, "PDP1"); break; + case DEVINFO_STR_NAME: strcpy(info->s, "PDP1"); break; case DEVINFO_STR_FAMILY: strcpy(info->s, "DEC PDP-1"); break; case DEVINFO_STR_VERSION: strcpy(info->s, "2.0"); break; case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break; diff --git a/src/emu/cpu/pdp1/tx0.c b/src/emu/cpu/pdp1/tx0.c index 77b4e665081..1c068ad9995 100644 --- a/src/emu/cpu/pdp1/tx0.c +++ b/src/emu/cpu/pdp1/tx0.c @@ -315,7 +315,7 @@ static CPU_EXECUTE( tx0_8kw ) MBR = AC; IR = MBR >> 13; /* basic opcode */ - if ((IR == 16) || (IR == 8)) /* trn or add instruction? */ + if ((IR == 16) || (IR == 8)) /* trn or add instruction? */ { PC = MBR & ADDRESS_MASK_8KW; cpustate->rim = 0; /* exit read-in mode */ @@ -455,11 +455,11 @@ CPU_GET_INFO( tx0_64kw ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = -2; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_SP: info->i = 0; /* no SP */ break; case CPUINFO_INT_PC: info->i = PC; break; @@ -512,7 +512,7 @@ CPU_GET_INFO( tx0_64kw ) case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break; /* --- the following bits of info are returned as NULL-terminated strings --- */ - case DEVINFO_STR_NAME: strcpy(info->s, "TX-0"); break; + case DEVINFO_STR_NAME: strcpy(info->s, "TX-0"); break; case DEVINFO_STR_FAMILY: strcpy(info->s, "TX-0"); break; case DEVINFO_STR_VERSION: strcpy(info->s, "1.0"); break; case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break; @@ -581,11 +581,11 @@ CPU_GET_INFO( tx0_8kw ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 13; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = -2; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_SP: info->i = 0; /* no SP */ break; case CPUINFO_INT_PC: info->i = PC; break; @@ -638,7 +638,7 @@ CPU_GET_INFO( tx0_8kw ) case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break; /* --- the following bits of info are returned as NULL-terminated strings --- */ - case DEVINFO_STR_NAME: strcpy(info->s, "TX-0"); break; + case DEVINFO_STR_NAME: strcpy(info->s, "TX-0"); break; case DEVINFO_STR_FAMILY: strcpy(info->s, "TX-0"); break; case DEVINFO_STR_VERSION: strcpy(info->s, "1.0"); break; case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break; diff --git a/src/emu/cpu/pic16c5x/pic16c5x.c b/src/emu/cpu/pic16c5x/pic16c5x.c index fba6ab34ca3..e4ca5379999 100644 --- a/src/emu/cpu/pic16c5x/pic16c5x.c +++ b/src/emu/cpu/pic16c5x/pic16c5x.c @@ -121,7 +121,7 @@ typedef struct _pic16c5x_opcode pic16c5x_opcode; struct _pic16c5x_opcode { UINT8 cycles; - void (*function)(pic16c5x_state *); + void (*function)(pic16c5x_state *); }; @@ -1316,7 +1316,7 @@ CPU_GET_INFO( pic16c57 ) switch (state) { case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 11; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 7; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 7; break; /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pic16c57); break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(pic16c57_rom); break; @@ -1376,7 +1376,7 @@ CPU_GET_INFO( pic16c58 ) switch (state) { case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 11; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 7; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 7; break; /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pic16c58); break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(pic16c58_rom); break; diff --git a/src/emu/cpu/pic16c62x/pic16c62x.c b/src/emu/cpu/pic16c62x/pic16c62x.c index ec3d986d5b7..ed5d0d0bab7 100644 --- a/src/emu/cpu/pic16c62x/pic16c62x.c +++ b/src/emu/cpu/pic16c62x/pic16c62x.c @@ -113,14 +113,14 @@ typedef struct _pic16c62x_opcode pic16c62x_opcode; struct _pic16c62x_opcode { UINT8 cycles; - void (*function)(pic16c62x_state *); + void (*function)(pic16c62x_state *); }; /* instruction list entry */ typedef struct _pic16c62x_instruction pic16c62x_instruction; struct _pic16c62x_instruction { char *format; - void (*function)(pic16c62x_state *); + void (*function)(pic16c62x_state *); UINT8 cycles; }; diff --git a/src/emu/cpu/powerpc/ppc.c b/src/emu/cpu/powerpc/ppc.c index 70660e16ee8..52f7a3a460a 100644 --- a/src/emu/cpu/powerpc/ppc.c +++ b/src/emu/cpu/powerpc/ppc.c @@ -280,7 +280,7 @@ typedef struct { UINT32 dccr; UINT32 pit; UINT32 pit_counter; - UINT32 pit_int_enable; + UINT32 pit_int_enable; UINT32 tsr; UINT32 dbsr; UINT32 sgr; @@ -1660,11 +1660,11 @@ static CPU_SET_INFO( ppc ) { case CPUINFO_INT_PC: case CPUINFO_INT_REGISTER + PPC_PC: ppc.pc = info->i; break; - case CPUINFO_INT_REGISTER + PPC_MSR: ppc_set_msr(info->i); break; - case CPUINFO_INT_REGISTER + PPC_CR: ppc_set_cr(info->i); break; + case CPUINFO_INT_REGISTER + PPC_MSR: ppc_set_msr(info->i); break; + case CPUINFO_INT_REGISTER + PPC_CR: ppc_set_cr(info->i); break; case CPUINFO_INT_REGISTER + PPC_LR: LR = info->i; break; case CPUINFO_INT_REGISTER + PPC_CTR: CTR = info->i; break; - case CPUINFO_INT_REGISTER + PPC_XER: XER = info->i; break; + case CPUINFO_INT_REGISTER + PPC_XER: XER = info->i; break; case CPUINFO_INT_REGISTER + PPC_SRR0: SRR0 = info->i; break; case CPUINFO_INT_REGISTER + PPC_SRR1: SRR1 = info->i; break; @@ -1753,11 +1753,11 @@ static CPU_GET_INFO( ppc ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE: info->i = CLEAR_LINE; break; @@ -1903,7 +1903,7 @@ CPU_GET_INFO( ppc603 ) case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 64; break; case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break; case CPUINFO_INT_LOGADDR_WIDTH_PROGRAM: info->i = 32; break; - case CPUINFO_INT_PAGE_SHIFT_PROGRAM: info->i = 17; break; + case CPUINFO_INT_PAGE_SHIFT_PROGRAM: info->i = 17; break; case CPUINFO_INT_REGISTER + PPC_DEC: info->i = read_decrementer(); break; /* --- the following bits of info are returned as pointers to data or functions --- */ diff --git a/src/emu/cpu/powerpc/ppccom.c b/src/emu/cpu/powerpc/ppccom.c index 924df6e493f..78367a4f0a2 100644 --- a/src/emu/cpu/powerpc/ppccom.c +++ b/src/emu/cpu/powerpc/ppccom.c @@ -77,7 +77,7 @@ INLINE int page_access_allowed(int transtype, UINT8 key, UINT8 protbits) INLINE UINT32 get_cr(powerpc_state *ppc) { - return ((ppc->cr[0] & 0x0f) << 28) | + return ((ppc->cr[0] & 0x0f) << 28) | ((ppc->cr[1] & 0x0f) << 24) | ((ppc->cr[2] & 0x0f) << 20) | ((ppc->cr[3] & 0x0f) << 16) | @@ -1180,7 +1180,7 @@ void ppccom_set_info(powerpc_state *ppc, UINT32 state, cpuinfo *info) case CPUINFO_INT_REGISTER + PPC_CR: set_cr(ppc, info->i); break; case CPUINFO_INT_REGISTER + PPC_LR: ppc->spr[SPR_LR] = info->i; break; case CPUINFO_INT_REGISTER + PPC_CTR: ppc->spr[SPR_CTR] = info->i; break; - case CPUINFO_INT_REGISTER + PPC_XER: set_xer(ppc, info->i); break; + case CPUINFO_INT_REGISTER + PPC_XER: set_xer(ppc, info->i); break; case CPUINFO_INT_REGISTER + PPC_SRR0: ppc->spr[SPROEA_SRR0] = info->i; break; case CPUINFO_INT_REGISTER + PPC_SRR1: ppc->spr[SPROEA_SRR1] = info->i; break; case CPUINFO_INT_REGISTER + PPC_SPRG0: ppc->spr[SPROEA_SPRG0] = info->i; break; @@ -1292,7 +1292,7 @@ void ppccom_get_info(powerpc_state *ppc, UINT32 state, cpuinfo *info) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_LOGADDR_WIDTH_PROGRAM: info->i = 32; break; - case CPUINFO_INT_PAGE_SHIFT_PROGRAM: info->i = POWERPC_MIN_PAGE_SHIFT;break; + case CPUINFO_INT_PAGE_SHIFT_PROGRAM: info->i = POWERPC_MIN_PAGE_SHIFT;break; case CPUINFO_INT_INPUT_STATE + PPC_IRQ: info->i = ppc->irq_pending ? ASSERT_LINE : CLEAR_LINE; break; @@ -1412,7 +1412,7 @@ void ppccom_get_info(powerpc_state *ppc, UINT32 state, cpuinfo *info) case CPUINFO_STR_REGISTER + PPC_CR: sprintf(info->s, "CR: %08X", get_cr(ppc)); break; case CPUINFO_STR_REGISTER + PPC_LR: sprintf(info->s, "LR: %08X", ppc->spr[SPR_LR]); break; case CPUINFO_STR_REGISTER + PPC_CTR: sprintf(info->s, "CTR:%08X", ppc->spr[SPR_CTR]); break; - case CPUINFO_STR_REGISTER + PPC_XER: sprintf(info->s, "XER:%08X", get_xer(ppc)); break; + case CPUINFO_STR_REGISTER + PPC_XER: sprintf(info->s, "XER:%08X", get_xer(ppc)); break; case CPUINFO_STR_REGISTER + PPC_SRR0: sprintf(info->s, "SRR0: %08X", ppc->spr[SPROEA_SRR0]); break; case CPUINFO_STR_REGISTER + PPC_SRR1: sprintf(info->s, "SRR1: %08X", ppc->spr[SPROEA_SRR1]); break; case CPUINFO_STR_REGISTER + PPC_SPRG0: sprintf(info->s, "SPRG0: %08X", ppc->spr[SPROEA_SPRG0]); break; @@ -2144,7 +2144,7 @@ void ppc4xx_get_info(powerpc_state *ppc, UINT32 state, cpuinfo *info) case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 32; break; case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 31; break; case CPUINFO_INT_LOGADDR_WIDTH_PROGRAM: info->i = 32; break; - case CPUINFO_INT_PAGE_SHIFT_PROGRAM: info->i = POWERPC_MIN_PAGE_SHIFT;break; + case CPUINFO_INT_PAGE_SHIFT_PROGRAM: info->i = POWERPC_MIN_PAGE_SHIFT;break; /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_FCT_INIT: /* provided per-CPU */ break; diff --git a/src/emu/cpu/powerpc/ppcdrc.c b/src/emu/cpu/powerpc/ppcdrc.c index 9432957639f..baccd2fb4ed 100644 --- a/src/emu/cpu/powerpc/ppcdrc.c +++ b/src/emu/cpu/powerpc/ppcdrc.c @@ -100,25 +100,25 @@ extern offs_t ppc_dasm_one(char *buffer, UINT32 pc, UINT32 op); /* DSISR values for various addressing types */ #define DSISR_IMM(op) ((0) | /* bits 15-16: cleared */ \ ((((op) >> (31- 5)) & 0x01) << (31-17)) | /* bit 17: opcode bit 5 */ \ - ((((op) >> (31- 4)) & 0x0f) << (31-21)) | /* bits 18-21: opcode bits 1-4 */ \ + ((((op) >> (31- 4)) & 0x0f) << (31-21)) | /* bits 18-21: opcode bits 1-4 */ \ ((((op) >> (31-10)) & 0x1f) << (31-26)) | /* bits 22-26: opcode bits 6-10 */ \ (0)) /* bits 27-31: undefined */ #define DSISR_IMMU(op) ((0) | /* bits 15-16: cleared */ \ ((((op) >> (31- 5)) & 0x01) << (31-17)) | /* bit 17: opcode bit 5 */ \ - ((((op) >> (31- 4)) & 0x0f) << (31-21)) | /* bits 18-21: opcode bits 1-4 */ \ + ((((op) >> (31- 4)) & 0x0f) << (31-21)) | /* bits 18-21: opcode bits 1-4 */ \ ((((op) >> (31-10)) & 0x1f) << (31-26)) | /* bits 22-26: opcode bits 6-10 */ \ ((((op) >> (31-15)) & 0x1f) << (31-31))) /* bits 27-31: opcode bits 11-15 */ #define DSISR_IDX(op) (((((op) >> (31-30)) & 0x03) << (31-16)) | /* bits 15-16: opcode bits 29-30 */ \ ((((op) >> (31-25)) & 0x01) << (31-17)) | /* bit 17: opcode bit 25 */ \ - ((((op) >> (31-24)) & 0x0f) << (31-21)) | /* bits 18-21: opcode bits 21-24 */ \ + ((((op) >> (31-24)) & 0x0f) << (31-21)) | /* bits 18-21: opcode bits 21-24 */ \ ((((op) >> (31-10)) & 0x1f) << (31-26)) | /* bits 22-26: opcode bits 6-10 */ \ (0)) /* bits 27-31: undefined */ #define DSISR_IDXU(op) (((((op) >> (31-30)) & 0x03) << (31-16)) | /* bits 15-16: opcode bits 29-30 */ \ ((((op) >> (31-25)) & 0x01) << (31-17)) | /* bit 17: opcode bit 25 */ \ - ((((op) >> (31-24)) & 0x0f) << (31-21)) | /* bits 18-21: opcode bits 21-24 */ \ + ((((op) >> (31-24)) & 0x0f) << (31-21)) | /* bits 18-21: opcode bits 21-24 */ \ ((((op) >> (31-10)) & 0x1f) << (31-26)) | /* bits 22-26: opcode bits 6-10 */ \ ((((op) >> (31-15)) & 0x1f) << (31-31))) /* bits 27-31: opcode bits 11-15 */ @@ -815,7 +815,7 @@ static CPU_GET_INFO( ppcdrc ) case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break; /* --- everything else is handled generically --- */ - default: ppccom_get_info(ppc, state, info); break; + default: ppccom_get_info(ppc, state, info); break; } } @@ -1462,7 +1462,7 @@ static void static_generate_exception(powerpc_state *ppc, UINT8 exception, int r } /* adjust cycles */ - UML_SUB(block, MEM(&ppc->icount), MEM(&ppc->icount), IREG(1)); // sub icount,icount,cycles + UML_SUB(block, MEM(&ppc->icount), MEM(&ppc->icount), IREG(1)); // sub icount,icount,cycles UML_EXHc(block, IF_S, ppc->impstate->out_of_cycles, IREG(0)); // exh out_of_cycles,i0 UML_HASHJMP(block, MEM(&ppc->impstate->mode), IREG(0), ppc->impstate->nocode); // hashjmp <mode>,i0,nocode diff --git a/src/emu/cpu/rsp/rsp.c b/src/emu/cpu/rsp/rsp.c index 341c93bf4e1..f2e6f1ff423 100644 --- a/src/emu/cpu/rsp/rsp.c +++ b/src/emu/cpu/rsp/rsp.c @@ -1021,7 +1021,7 @@ INLINE UINT16 SATURATE_ACCUM(rsp_state *rsp, int accum, int slice, UINT16 negati return 0; } -#define WRITEBACK_RESULT() \ +#define WRITEBACK_RESULT() \ do { \ W_VREG_S(VDREG, 0, vres[0]); \ W_VREG_S(VDREG, 1, vres[1]); \ @@ -2886,11 +2886,11 @@ CPU_GET_INFO( rsp ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE: info->i = CLEAR_LINE; break; diff --git a/src/emu/cpu/rsp/rsp.h b/src/emu/cpu/rsp/rsp.h index c7c09cda2e2..8f61ea309de 100644 --- a/src/emu/cpu/rsp/rsp.h +++ b/src/emu/cpu/rsp/rsp.h @@ -113,10 +113,10 @@ void rspdrc_add_dmem(const device_config *device, void *base); #define FSREG ((op >> 11) & 31) #define FDREG ((op >> 6) & 31) -#define IS_SINGLE(o) (((o) & (1 << 21)) == 0) -#define IS_DOUBLE(o) (((o) & (1 << 21)) != 0) +#define IS_SINGLE(o) (((o) & (1 << 21)) == 0) +#define IS_DOUBLE(o) (((o) & (1 << 21)) != 0) #define IS_FLOAT(o) (((o) & (1 << 23)) == 0) -#define IS_INTEGRAL(o) (((o) & (1 << 23)) != 0) +#define IS_INTEGRAL(o) (((o) & (1 << 23)) != 0) #define SIMMVAL ((INT16)op) #define UIMMVAL ((UINT16)op) diff --git a/src/emu/cpu/rsp/rsp_dasm.c b/src/emu/cpu/rsp/rsp_dasm.c index f99fa268ed1..dcebc5d85f9 100644 --- a/src/emu/cpu/rsp/rsp_dasm.c +++ b/src/emu/cpu/rsp/rsp_dasm.c @@ -275,7 +275,7 @@ offs_t rsp_dasm_one(char *buffer, offs_t pc, UINT32 op) print("jalr %s, %s", reg[rs], reg[rd]); } flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); - break; + break; } case 0x0d: print("break"); flags = DASMFLAG_STEP_OVER; break; case 0x20: print("add %s, %s, %s", reg[rd], reg[rs], reg[rt]); break; diff --git a/src/emu/cpu/rsp/rspdrc.c b/src/emu/cpu/rsp/rspdrc.c index c3dd4ac1c7d..b81c5c21713 100644 --- a/src/emu/cpu/rsp/rspdrc.c +++ b/src/emu/cpu/rsp/rspdrc.c @@ -1332,7 +1332,7 @@ INLINE UINT16 SATURATE_ACCUM_UNSIGNED(rsp_state *rsp, int accum, int slice) return 0; } -#define WRITEBACK_RESULT() \ +#define WRITEBACK_RESULT() \ do { \ W_VREG_S(VDREG, 0, vres[0]); \ W_VREG_S(VDREG, 1, vres[1]); \ @@ -2513,58 +2513,58 @@ INLINE void rsp_vmrg(rsp_state *rsp, UINT32 op, INT16 *vres) // // Merges two vectors according to compare flags - switch(EL) - { - case 0: /* 0, 1, 2, 3, 4, 5, 6, 7 - none */ /* 0, 1, 2, 3, 4, 5, 6, 7 - none */ - RSP_VMRG(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7); - break; - case 1: /* 0, 1, 2, 3, 4, 5, 6, 7 - ??? */ /* 0, 1, 2, 3, 4, 5, 6, 7 - ??? */ - RSP_VMRG(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7); - break; - case 2: /* 1, 3, 5, 7, 0, 2, 4, 6 - 0q */ /* 0, 0, 2, 2, 4, 4, 6, 6 - 0q */ - RSP_VMRG(1, 3, 5, 7, 0, 2, 4, 6, 0, 0, 2, 2, 4, 4, 6, 6); - break; - case 3: /* 0, 2, 4, 6, 1, 3, 5, 7 - 1q */ /* 1, 1, 3, 3, 5, 5, 7, 7 - 1q */ - RSP_VMRG(0, 2, 4, 6, 1, 3, 5, 7, 1, 1, 3, 3, 5, 5, 7, 7); - break; - case 4: /* 1, 2, 3, 5, 6, 7, 0, 4 - 0h */ /* 0, 0, 0, 0, 4, 4, 4, 4 - 0h */ - RSP_VMRG(1, 2, 3, 5, 6, 7, 0, 4, 0, 0, 0, 0, 4, 4, 4, 4); - break; - case 5: /* 0, 2, 3, 4, 6, 7, 1, 5 - 1h */ /* 1, 1, 1, 1, 5, 5, 5, 5 - 1h */ - RSP_VMRG(0, 2, 3, 4, 6, 7, 1, 5, 1, 1, 1, 1, 5, 5, 5, 5); - break; - case 6: /* 0, 1, 3, 4, 5, 7, 2, 6 - 2h */ /* 2, 2, 2, 2, 6, 6, 6, 6 - 2h */ - RSP_VMRG(0, 1, 3, 4, 5, 7, 2, 6, 2, 2, 2, 2, 6, 6, 6, 6); - break; - case 7: /* 0, 1, 2, 4, 5, 6, 3, 7 - 3h */ /* 3, 3, 3, 3, 7, 7, 7, 7 - 3h */ - RSP_VMRG(0, 1, 2, 4, 5, 6, 3, 7, 3, 3, 3, 3, 7, 7, 7, 7); - break; - case 8: /* 1, 2, 3, 4, 5, 6, 7, 0 - 0 */ /* 0, 0, 0, 0, 0, 0, 0, 0 - 0 */ - RSP_VMRG(1, 2, 3, 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0); - break; - case 9: /* 0, 2, 3, 4, 5, 6, 7, 1 - 1 */ /* 1, 1, 1, 1, 1, 1, 1, 1 - 0 */ - RSP_VMRG(0, 2, 3, 4, 5, 6, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1); - break; - case 10:/* 0, 1, 3, 4, 5, 6, 7, 2 - 2 */ /* 2, 2, 2, 2, 2, 2, 2, 2 - 0 */ - RSP_VMRG(0, 1, 3, 4, 5, 6, 7, 2, 2, 2, 2, 2, 2, 2, 2, 2); - break; - case 11:/* 0, 1, 2, 4, 5, 6, 7, 3 - 3 */ /* 3, 3, 3, 3, 3, 3, 3, 3 - 0 */ - RSP_VMRG(0, 1, 2, 4, 5, 6, 7, 3, 3, 3, 3, 3, 3, 3, 3, 3); - break; - case 12:/* 0, 1, 2, 3, 5, 6, 7, 4 - 4 */ /* 4, 4, 4, 4, 4, 4, 4, 4 - 0 */ - RSP_VMRG(0, 1, 2, 3, 5, 6, 7, 4, 4, 4, 4, 4, 4, 4, 4, 4); - break; - case 13:/* 0, 1, 2, 3, 4, 6, 7, 5 - 5 */ /* 5, 5, 5, 5, 5, 5, 5, 5 - 0 */ - RSP_VMRG(0, 1, 2, 3, 4, 6, 7, 5, 5, 5, 5, 5, 5, 5, 5, 5); - break; - case 14:/* 0, 1, 2, 3, 4, 5, 7, 6 - 6 */ /* 6, 6, 6, 6, 6, 6, 6, 6 - 0 */ - RSP_VMRG(0, 1, 2, 3, 4, 5, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6); - break; - case 15:/* 0, 1, 2, 3, 4, 5, 6, 7 - 7 */ /* 7, 7, 7, 7, 7, 7, 7, 7 - 0 */ - RSP_VMRG(0, 1, 2, 3, 4, 5, 6, 7, 7, 7, 7, 7, 7, 7, 7, 7); - break; - } - WRITEBACK_RESULT(); + switch(EL) + { + case 0: /* 0, 1, 2, 3, 4, 5, 6, 7 - none */ /* 0, 1, 2, 3, 4, 5, 6, 7 - none */ + RSP_VMRG(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7); + break; + case 1: /* 0, 1, 2, 3, 4, 5, 6, 7 - ??? */ /* 0, 1, 2, 3, 4, 5, 6, 7 - ??? */ + RSP_VMRG(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7); + break; + case 2: /* 1, 3, 5, 7, 0, 2, 4, 6 - 0q */ /* 0, 0, 2, 2, 4, 4, 6, 6 - 0q */ + RSP_VMRG(1, 3, 5, 7, 0, 2, 4, 6, 0, 0, 2, 2, 4, 4, 6, 6); + break; + case 3: /* 0, 2, 4, 6, 1, 3, 5, 7 - 1q */ /* 1, 1, 3, 3, 5, 5, 7, 7 - 1q */ + RSP_VMRG(0, 2, 4, 6, 1, 3, 5, 7, 1, 1, 3, 3, 5, 5, 7, 7); + break; + case 4: /* 1, 2, 3, 5, 6, 7, 0, 4 - 0h */ /* 0, 0, 0, 0, 4, 4, 4, 4 - 0h */ + RSP_VMRG(1, 2, 3, 5, 6, 7, 0, 4, 0, 0, 0, 0, 4, 4, 4, 4); + break; + case 5: /* 0, 2, 3, 4, 6, 7, 1, 5 - 1h */ /* 1, 1, 1, 1, 5, 5, 5, 5 - 1h */ + RSP_VMRG(0, 2, 3, 4, 6, 7, 1, 5, 1, 1, 1, 1, 5, 5, 5, 5); + break; + case 6: /* 0, 1, 3, 4, 5, 7, 2, 6 - 2h */ /* 2, 2, 2, 2, 6, 6, 6, 6 - 2h */ + RSP_VMRG(0, 1, 3, 4, 5, 7, 2, 6, 2, 2, 2, 2, 6, 6, 6, 6); + break; + case 7: /* 0, 1, 2, 4, 5, 6, 3, 7 - 3h */ /* 3, 3, 3, 3, 7, 7, 7, 7 - 3h */ + RSP_VMRG(0, 1, 2, 4, 5, 6, 3, 7, 3, 3, 3, 3, 7, 7, 7, 7); + break; + case 8: /* 1, 2, 3, 4, 5, 6, 7, 0 - 0 */ /* 0, 0, 0, 0, 0, 0, 0, 0 - 0 */ + RSP_VMRG(1, 2, 3, 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0); + break; + case 9: /* 0, 2, 3, 4, 5, 6, 7, 1 - 1 */ /* 1, 1, 1, 1, 1, 1, 1, 1 - 0 */ + RSP_VMRG(0, 2, 3, 4, 5, 6, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1); + break; + case 10:/* 0, 1, 3, 4, 5, 6, 7, 2 - 2 */ /* 2, 2, 2, 2, 2, 2, 2, 2 - 0 */ + RSP_VMRG(0, 1, 3, 4, 5, 6, 7, 2, 2, 2, 2, 2, 2, 2, 2, 2); + break; + case 11:/* 0, 1, 2, 4, 5, 6, 7, 3 - 3 */ /* 3, 3, 3, 3, 3, 3, 3, 3 - 0 */ + RSP_VMRG(0, 1, 2, 4, 5, 6, 7, 3, 3, 3, 3, 3, 3, 3, 3, 3); + break; + case 12:/* 0, 1, 2, 3, 5, 6, 7, 4 - 4 */ /* 4, 4, 4, 4, 4, 4, 4, 4 - 0 */ + RSP_VMRG(0, 1, 2, 3, 5, 6, 7, 4, 4, 4, 4, 4, 4, 4, 4, 4); + break; + case 13:/* 0, 1, 2, 3, 4, 6, 7, 5 - 5 */ /* 5, 5, 5, 5, 5, 5, 5, 5 - 0 */ + RSP_VMRG(0, 1, 2, 3, 4, 6, 7, 5, 5, 5, 5, 5, 5, 5, 5, 5); + break; + case 14:/* 0, 1, 2, 3, 4, 5, 7, 6 - 6 */ /* 6, 6, 6, 6, 6, 6, 6, 6 - 0 */ + RSP_VMRG(0, 1, 2, 3, 4, 5, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6); + break; + case 15:/* 0, 1, 2, 3, 4, 5, 6, 7 - 7 */ /* 7, 7, 7, 7, 7, 7, 7, 7 - 0 */ + RSP_VMRG(0, 1, 2, 3, 4, 5, 6, 7, 7, 7, 7, 7, 7, 7, 7, 7); + break; + } + WRITEBACK_RESULT(); } #define RSP_VAND(E10, E11, E12, E13, E14, E15, E16, E17, E20, E21, E22, E23, E24, E25, E26, E27) \ @@ -2594,58 +2594,58 @@ INLINE void rsp_vand(rsp_state *rsp, UINT32 op, INT16 *vres) // // Bitwise AND of two vector registers - switch(EL) - { - case 0: /* 0, 1, 2, 3, 4, 5, 6, 7 - none */ /* 0, 1, 2, 3, 4, 5, 6, 7 - none */ - RSP_VAND(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7); - break; - case 1: /* 0, 1, 2, 3, 4, 5, 6, 7 - ??? */ /* 0, 1, 2, 3, 4, 5, 6, 7 - ??? */ - RSP_VAND(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7); - break; - case 2: /* 1, 3, 5, 7, 0, 2, 4, 6 - 0q */ /* 0, 0, 2, 2, 4, 4, 6, 6 - 0q */ - RSP_VAND(1, 3, 5, 7, 0, 2, 4, 6, 0, 0, 2, 2, 4, 4, 6, 6); - break; - case 3: /* 0, 2, 4, 6, 1, 3, 5, 7 - 1q */ /* 1, 1, 3, 3, 5, 5, 7, 7 - 1q */ - RSP_VAND(0, 2, 4, 6, 1, 3, 5, 7, 1, 1, 3, 3, 5, 5, 7, 7); - break; - case 4: /* 1, 2, 3, 5, 6, 7, 0, 4 - 0h */ /* 0, 0, 0, 0, 4, 4, 4, 4 - 0h */ - RSP_VAND(1, 2, 3, 5, 6, 7, 0, 4, 0, 0, 0, 0, 4, 4, 4, 4); - break; - case 5: /* 0, 2, 3, 4, 6, 7, 1, 5 - 1h */ /* 1, 1, 1, 1, 5, 5, 5, 5 - 1h */ - RSP_VAND(0, 2, 3, 4, 6, 7, 1, 5, 1, 1, 1, 1, 5, 5, 5, 5); - break; - case 6: /* 0, 1, 3, 4, 5, 7, 2, 6 - 2h */ /* 2, 2, 2, 2, 6, 6, 6, 6 - 2h */ - RSP_VAND(0, 1, 3, 4, 5, 7, 2, 6, 2, 2, 2, 2, 6, 6, 6, 6); - break; - case 7: /* 0, 1, 2, 4, 5, 6, 3, 7 - 3h */ /* 3, 3, 3, 3, 7, 7, 7, 7 - 3h */ - RSP_VAND(0, 1, 2, 4, 5, 6, 3, 7, 3, 3, 3, 3, 7, 7, 7, 7); - break; - case 8: /* 1, 2, 3, 4, 5, 6, 7, 0 - 0 */ /* 0, 0, 0, 0, 0, 0, 0, 0 - 0 */ - RSP_VAND(1, 2, 3, 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0); - break; - case 9: /* 0, 2, 3, 4, 5, 6, 7, 1 - 1 */ /* 1, 1, 1, 1, 1, 1, 1, 1 - 0 */ - RSP_VAND(0, 2, 3, 4, 5, 6, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1); - break; - case 10:/* 0, 1, 3, 4, 5, 6, 7, 2 - 2 */ /* 2, 2, 2, 2, 2, 2, 2, 2 - 0 */ - RSP_VAND(0, 1, 3, 4, 5, 6, 7, 2, 2, 2, 2, 2, 2, 2, 2, 2); - break; - case 11:/* 0, 1, 2, 4, 5, 6, 7, 3 - 3 */ /* 3, 3, 3, 3, 3, 3, 3, 3 - 0 */ - RSP_VAND(0, 1, 2, 4, 5, 6, 7, 3, 3, 3, 3, 3, 3, 3, 3, 3); - break; - case 12:/* 0, 1, 2, 3, 5, 6, 7, 4 - 4 */ /* 4, 4, 4, 4, 4, 4, 4, 4 - 0 */ - RSP_VAND(0, 1, 2, 3, 5, 6, 7, 4, 4, 4, 4, 4, 4, 4, 4, 4); - break; - case 13:/* 0, 1, 2, 3, 4, 6, 7, 5 - 5 */ /* 5, 5, 5, 5, 5, 5, 5, 5 - 0 */ - RSP_VAND(0, 1, 2, 3, 4, 6, 7, 5, 5, 5, 5, 5, 5, 5, 5, 5); - break; - case 14:/* 0, 1, 2, 3, 4, 5, 7, 6 - 6 */ /* 6, 6, 6, 6, 6, 6, 6, 6 - 0 */ - RSP_VAND(0, 1, 2, 3, 4, 5, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6); - break; - case 15:/* 0, 1, 2, 3, 4, 5, 6, 7 - 7 */ /* 7, 7, 7, 7, 7, 7, 7, 7 - 0 */ - RSP_VAND(0, 1, 2, 3, 4, 5, 6, 7, 7, 7, 7, 7, 7, 7, 7, 7); - break; - } - WRITEBACK_RESULT(); + switch(EL) + { + case 0: /* 0, 1, 2, 3, 4, 5, 6, 7 - none */ /* 0, 1, 2, 3, 4, 5, 6, 7 - none */ + RSP_VAND(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7); + break; + case 1: /* 0, 1, 2, 3, 4, 5, 6, 7 - ??? */ /* 0, 1, 2, 3, 4, 5, 6, 7 - ??? */ + RSP_VAND(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7); + break; + case 2: /* 1, 3, 5, 7, 0, 2, 4, 6 - 0q */ /* 0, 0, 2, 2, 4, 4, 6, 6 - 0q */ + RSP_VAND(1, 3, 5, 7, 0, 2, 4, 6, 0, 0, 2, 2, 4, 4, 6, 6); + break; + case 3: /* 0, 2, 4, 6, 1, 3, 5, 7 - 1q */ /* 1, 1, 3, 3, 5, 5, 7, 7 - 1q */ + RSP_VAND(0, 2, 4, 6, 1, 3, 5, 7, 1, 1, 3, 3, 5, 5, 7, 7); + break; + case 4: /* 1, 2, 3, 5, 6, 7, 0, 4 - 0h */ /* 0, 0, 0, 0, 4, 4, 4, 4 - 0h */ + RSP_VAND(1, 2, 3, 5, 6, 7, 0, 4, 0, 0, 0, 0, 4, 4, 4, 4); + break; + case 5: /* 0, 2, 3, 4, 6, 7, 1, 5 - 1h */ /* 1, 1, 1, 1, 5, 5, 5, 5 - 1h */ + RSP_VAND(0, 2, 3, 4, 6, 7, 1, 5, 1, 1, 1, 1, 5, 5, 5, 5); + break; + case 6: /* 0, 1, 3, 4, 5, 7, 2, 6 - 2h */ /* 2, 2, 2, 2, 6, 6, 6, 6 - 2h */ + RSP_VAND(0, 1, 3, 4, 5, 7, 2, 6, 2, 2, 2, 2, 6, 6, 6, 6); + break; + case 7: /* 0, 1, 2, 4, 5, 6, 3, 7 - 3h */ /* 3, 3, 3, 3, 7, 7, 7, 7 - 3h */ + RSP_VAND(0, 1, 2, 4, 5, 6, 3, 7, 3, 3, 3, 3, 7, 7, 7, 7); + break; + case 8: /* 1, 2, 3, 4, 5, 6, 7, 0 - 0 */ /* 0, 0, 0, 0, 0, 0, 0, 0 - 0 */ + RSP_VAND(1, 2, 3, 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0); + break; + case 9: /* 0, 2, 3, 4, 5, 6, 7, 1 - 1 */ /* 1, 1, 1, 1, 1, 1, 1, 1 - 0 */ + RSP_VAND(0, 2, 3, 4, 5, 6, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1); + break; + case 10:/* 0, 1, 3, 4, 5, 6, 7, 2 - 2 */ /* 2, 2, 2, 2, 2, 2, 2, 2 - 0 */ + RSP_VAND(0, 1, 3, 4, 5, 6, 7, 2, 2, 2, 2, 2, 2, 2, 2, 2); + break; + case 11:/* 0, 1, 2, 4, 5, 6, 7, 3 - 3 */ /* 3, 3, 3, 3, 3, 3, 3, 3 - 0 */ + RSP_VAND(0, 1, 2, 4, 5, 6, 7, 3, 3, 3, 3, 3, 3, 3, 3, 3); + break; + case 12:/* 0, 1, 2, 3, 5, 6, 7, 4 - 4 */ /* 4, 4, 4, 4, 4, 4, 4, 4 - 0 */ + RSP_VAND(0, 1, 2, 3, 5, 6, 7, 4, 4, 4, 4, 4, 4, 4, 4, 4); + break; + case 13:/* 0, 1, 2, 3, 4, 6, 7, 5 - 5 */ /* 5, 5, 5, 5, 5, 5, 5, 5 - 0 */ + RSP_VAND(0, 1, 2, 3, 4, 6, 7, 5, 5, 5, 5, 5, 5, 5, 5, 5); + break; + case 14:/* 0, 1, 2, 3, 4, 5, 7, 6 - 6 */ /* 6, 6, 6, 6, 6, 6, 6, 6 - 0 */ + RSP_VAND(0, 1, 2, 3, 4, 5, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6); + break; + case 15:/* 0, 1, 2, 3, 4, 5, 6, 7 - 7 */ /* 7, 7, 7, 7, 7, 7, 7, 7 - 0 */ + RSP_VAND(0, 1, 2, 3, 4, 5, 6, 7, 7, 7, 7, 7, 7, 7, 7, 7); + break; + } + WRITEBACK_RESULT(); } #define RSP_VNAND(E10, E11, E12, E13, E14, E15, E16, E17, E20, E21, E22, E23, E24, E25, E26, E27) \ @@ -2675,58 +2675,58 @@ INLINE void rsp_vnand(rsp_state *rsp, UINT32 op, INT16 *vres) // // Bitwise NOT AND of two vector registers - switch(EL) - { - case 0: /* 0, 1, 2, 3, 4, 5, 6, 7 - none */ /* 0, 1, 2, 3, 4, 5, 6, 7 - none */ - RSP_VNAND(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7); - break; - case 1: /* 0, 1, 2, 3, 4, 5, 6, 7 - ??? */ /* 0, 1, 2, 3, 4, 5, 6, 7 - ??? */ - RSP_VNAND(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7); - break; - case 2: /* 1, 3, 5, 7, 0, 2, 4, 6 - 0q */ /* 0, 0, 2, 2, 4, 4, 6, 6 - 0q */ - RSP_VNAND(1, 3, 5, 7, 0, 2, 4, 6, 0, 0, 2, 2, 4, 4, 6, 6); - break; - case 3: /* 0, 2, 4, 6, 1, 3, 5, 7 - 1q */ /* 1, 1, 3, 3, 5, 5, 7, 7 - 1q */ - RSP_VNAND(0, 2, 4, 6, 1, 3, 5, 7, 1, 1, 3, 3, 5, 5, 7, 7); - break; - case 4: /* 1, 2, 3, 5, 6, 7, 0, 4 - 0h */ /* 0, 0, 0, 0, 4, 4, 4, 4 - 0h */ - RSP_VNAND(1, 2, 3, 5, 6, 7, 0, 4, 0, 0, 0, 0, 4, 4, 4, 4); - break; - case 5: /* 0, 2, 3, 4, 6, 7, 1, 5 - 1h */ /* 1, 1, 1, 1, 5, 5, 5, 5 - 1h */ - RSP_VNAND(0, 2, 3, 4, 6, 7, 1, 5, 1, 1, 1, 1, 5, 5, 5, 5); - break; - case 6: /* 0, 1, 3, 4, 5, 7, 2, 6 - 2h */ /* 2, 2, 2, 2, 6, 6, 6, 6 - 2h */ - RSP_VNAND(0, 1, 3, 4, 5, 7, 2, 6, 2, 2, 2, 2, 6, 6, 6, 6); - break; - case 7: /* 0, 1, 2, 4, 5, 6, 3, 7 - 3h */ /* 3, 3, 3, 3, 7, 7, 7, 7 - 3h */ - RSP_VNAND(0, 1, 2, 4, 5, 6, 3, 7, 3, 3, 3, 3, 7, 7, 7, 7); - break; - case 8: /* 1, 2, 3, 4, 5, 6, 7, 0 - 0 */ /* 0, 0, 0, 0, 0, 0, 0, 0 - 0 */ - RSP_VNAND(1, 2, 3, 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0); - break; - case 9: /* 0, 2, 3, 4, 5, 6, 7, 1 - 1 */ /* 1, 1, 1, 1, 1, 1, 1, 1 - 0 */ - RSP_VNAND(0, 2, 3, 4, 5, 6, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1); - break; - case 10:/* 0, 1, 3, 4, 5, 6, 7, 2 - 2 */ /* 2, 2, 2, 2, 2, 2, 2, 2 - 0 */ - RSP_VNAND(0, 1, 3, 4, 5, 6, 7, 2, 2, 2, 2, 2, 2, 2, 2, 2); - break; - case 11:/* 0, 1, 2, 4, 5, 6, 7, 3 - 3 */ /* 3, 3, 3, 3, 3, 3, 3, 3 - 0 */ - RSP_VNAND(0, 1, 2, 4, 5, 6, 7, 3, 3, 3, 3, 3, 3, 3, 3, 3); - break; - case 12:/* 0, 1, 2, 3, 5, 6, 7, 4 - 4 */ /* 4, 4, 4, 4, 4, 4, 4, 4 - 0 */ - RSP_VNAND(0, 1, 2, 3, 5, 6, 7, 4, 4, 4, 4, 4, 4, 4, 4, 4); - break; - case 13:/* 0, 1, 2, 3, 4, 6, 7, 5 - 5 */ /* 5, 5, 5, 5, 5, 5, 5, 5 - 0 */ - RSP_VNAND(0, 1, 2, 3, 4, 6, 7, 5, 5, 5, 5, 5, 5, 5, 5, 5); - break; - case 14:/* 0, 1, 2, 3, 4, 5, 7, 6 - 6 */ /* 6, 6, 6, 6, 6, 6, 6, 6 - 0 */ - RSP_VNAND(0, 1, 2, 3, 4, 5, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6); - break; - case 15:/* 0, 1, 2, 3, 4, 5, 6, 7 - 7 */ /* 7, 7, 7, 7, 7, 7, 7, 7 - 0 */ - RSP_VNAND(0, 1, 2, 3, 4, 5, 6, 7, 7, 7, 7, 7, 7, 7, 7, 7); - break; - } - WRITEBACK_RESULT(); + switch(EL) + { + case 0: /* 0, 1, 2, 3, 4, 5, 6, 7 - none */ /* 0, 1, 2, 3, 4, 5, 6, 7 - none */ + RSP_VNAND(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7); + break; + case 1: /* 0, 1, 2, 3, 4, 5, 6, 7 - ??? */ /* 0, 1, 2, 3, 4, 5, 6, 7 - ??? */ + RSP_VNAND(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7); + break; + case 2: /* 1, 3, 5, 7, 0, 2, 4, 6 - 0q */ /* 0, 0, 2, 2, 4, 4, 6, 6 - 0q */ + RSP_VNAND(1, 3, 5, 7, 0, 2, 4, 6, 0, 0, 2, 2, 4, 4, 6, 6); + break; + case 3: /* 0, 2, 4, 6, 1, 3, 5, 7 - 1q */ /* 1, 1, 3, 3, 5, 5, 7, 7 - 1q */ + RSP_VNAND(0, 2, 4, 6, 1, 3, 5, 7, 1, 1, 3, 3, 5, 5, 7, 7); + break; + case 4: /* 1, 2, 3, 5, 6, 7, 0, 4 - 0h */ /* 0, 0, 0, 0, 4, 4, 4, 4 - 0h */ + RSP_VNAND(1, 2, 3, 5, 6, 7, 0, 4, 0, 0, 0, 0, 4, 4, 4, 4); + break; + case 5: /* 0, 2, 3, 4, 6, 7, 1, 5 - 1h */ /* 1, 1, 1, 1, 5, 5, 5, 5 - 1h */ + RSP_VNAND(0, 2, 3, 4, 6, 7, 1, 5, 1, 1, 1, 1, 5, 5, 5, 5); + break; + case 6: /* 0, 1, 3, 4, 5, 7, 2, 6 - 2h */ /* 2, 2, 2, 2, 6, 6, 6, 6 - 2h */ + RSP_VNAND(0, 1, 3, 4, 5, 7, 2, 6, 2, 2, 2, 2, 6, 6, 6, 6); + break; + case 7: /* 0, 1, 2, 4, 5, 6, 3, 7 - 3h */ /* 3, 3, 3, 3, 7, 7, 7, 7 - 3h */ + RSP_VNAND(0, 1, 2, 4, 5, 6, 3, 7, 3, 3, 3, 3, 7, 7, 7, 7); + break; + case 8: /* 1, 2, 3, 4, 5, 6, 7, 0 - 0 */ /* 0, 0, 0, 0, 0, 0, 0, 0 - 0 */ + RSP_VNAND(1, 2, 3, 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0); + break; + case 9: /* 0, 2, 3, 4, 5, 6, 7, 1 - 1 */ /* 1, 1, 1, 1, 1, 1, 1, 1 - 0 */ + RSP_VNAND(0, 2, 3, 4, 5, 6, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1); + break; + case 10:/* 0, 1, 3, 4, 5, 6, 7, 2 - 2 */ /* 2, 2, 2, 2, 2, 2, 2, 2 - 0 */ + RSP_VNAND(0, 1, 3, 4, 5, 6, 7, 2, 2, 2, 2, 2, 2, 2, 2, 2); + break; + case 11:/* 0, 1, 2, 4, 5, 6, 7, 3 - 3 */ /* 3, 3, 3, 3, 3, 3, 3, 3 - 0 */ + RSP_VNAND(0, 1, 2, 4, 5, 6, 7, 3, 3, 3, 3, 3, 3, 3, 3, 3); + break; + case 12:/* 0, 1, 2, 3, 5, 6, 7, 4 - 4 */ /* 4, 4, 4, 4, 4, 4, 4, 4 - 0 */ + RSP_VNAND(0, 1, 2, 3, 5, 6, 7, 4, 4, 4, 4, 4, 4, 4, 4, 4); + break; + case 13:/* 0, 1, 2, 3, 4, 6, 7, 5 - 5 */ /* 5, 5, 5, 5, 5, 5, 5, 5 - 0 */ + RSP_VNAND(0, 1, 2, 3, 4, 6, 7, 5, 5, 5, 5, 5, 5, 5, 5, 5); + break; + case 14:/* 0, 1, 2, 3, 4, 5, 7, 6 - 6 */ /* 6, 6, 6, 6, 6, 6, 6, 6 - 0 */ + RSP_VNAND(0, 1, 2, 3, 4, 5, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6); + break; + case 15:/* 0, 1, 2, 3, 4, 5, 6, 7 - 7 */ /* 7, 7, 7, 7, 7, 7, 7, 7 - 0 */ + RSP_VNAND(0, 1, 2, 3, 4, 5, 6, 7, 7, 7, 7, 7, 7, 7, 7, 7); + break; + } + WRITEBACK_RESULT(); } #define RSP_VOR(E10, E11, E12, E13, E14, E15, E16, E17, E20, E21, E22, E23, E24, E25, E26, E27) \ @@ -2756,58 +2756,58 @@ INLINE void rsp_vor(rsp_state *rsp, UINT32 op, INT16 *vres) // // Bitwise OR of two vector registers - switch(EL) - { - case 0: /* 0, 1, 2, 3, 4, 5, 6, 7 - none */ /* 0, 1, 2, 3, 4, 5, 6, 7 - none */ - RSP_VOR(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7); - break; - case 1: /* 0, 1, 2, 3, 4, 5, 6, 7 - ??? */ /* 0, 1, 2, 3, 4, 5, 6, 7 - ??? */ - RSP_VOR(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7); - break; - case 2: /* 1, 3, 5, 7, 0, 2, 4, 6 - 0q */ /* 0, 0, 2, 2, 4, 4, 6, 6 - 0q */ - RSP_VOR(1, 3, 5, 7, 0, 2, 4, 6, 0, 0, 2, 2, 4, 4, 6, 6); - break; - case 3: /* 0, 2, 4, 6, 1, 3, 5, 7 - 1q */ /* 1, 1, 3, 3, 5, 5, 7, 7 - 1q */ - RSP_VOR(0, 2, 4, 6, 1, 3, 5, 7, 1, 1, 3, 3, 5, 5, 7, 7); - break; - case 4: /* 1, 2, 3, 5, 6, 7, 0, 4 - 0h */ /* 0, 0, 0, 0, 4, 4, 4, 4 - 0h */ - RSP_VOR(1, 2, 3, 5, 6, 7, 0, 4, 0, 0, 0, 0, 4, 4, 4, 4); - break; - case 5: /* 0, 2, 3, 4, 6, 7, 1, 5 - 1h */ /* 1, 1, 1, 1, 5, 5, 5, 5 - 1h */ - RSP_VOR(0, 2, 3, 4, 6, 7, 1, 5, 1, 1, 1, 1, 5, 5, 5, 5); - break; - case 6: /* 0, 1, 3, 4, 5, 7, 2, 6 - 2h */ /* 2, 2, 2, 2, 6, 6, 6, 6 - 2h */ - RSP_VOR(0, 1, 3, 4, 5, 7, 2, 6, 2, 2, 2, 2, 6, 6, 6, 6); - break; - case 7: /* 0, 1, 2, 4, 5, 6, 3, 7 - 3h */ /* 3, 3, 3, 3, 7, 7, 7, 7 - 3h */ - RSP_VOR(0, 1, 2, 4, 5, 6, 3, 7, 3, 3, 3, 3, 7, 7, 7, 7); - break; - case 8: /* 1, 2, 3, 4, 5, 6, 7, 0 - 0 */ /* 0, 0, 0, 0, 0, 0, 0, 0 - 0 */ - RSP_VOR(1, 2, 3, 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0); - break; - case 9: /* 0, 2, 3, 4, 5, 6, 7, 1 - 1 */ /* 1, 1, 1, 1, 1, 1, 1, 1 - 0 */ - RSP_VOR(0, 2, 3, 4, 5, 6, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1); - break; - case 10:/* 0, 1, 3, 4, 5, 6, 7, 2 - 2 */ /* 2, 2, 2, 2, 2, 2, 2, 2 - 0 */ - RSP_VOR(0, 1, 3, 4, 5, 6, 7, 2, 2, 2, 2, 2, 2, 2, 2, 2); - break; - case 11:/* 0, 1, 2, 4, 5, 6, 7, 3 - 3 */ /* 3, 3, 3, 3, 3, 3, 3, 3 - 0 */ - RSP_VOR(0, 1, 2, 4, 5, 6, 7, 3, 3, 3, 3, 3, 3, 3, 3, 3); - break; - case 12:/* 0, 1, 2, 3, 5, 6, 7, 4 - 4 */ /* 4, 4, 4, 4, 4, 4, 4, 4 - 0 */ - RSP_VOR(0, 1, 2, 3, 5, 6, 7, 4, 4, 4, 4, 4, 4, 4, 4, 4); - break; - case 13:/* 0, 1, 2, 3, 4, 6, 7, 5 - 5 */ /* 5, 5, 5, 5, 5, 5, 5, 5 - 0 */ - RSP_VOR(0, 1, 2, 3, 4, 6, 7, 5, 5, 5, 5, 5, 5, 5, 5, 5); - break; - case 14:/* 0, 1, 2, 3, 4, 5, 7, 6 - 6 */ /* 6, 6, 6, 6, 6, 6, 6, 6 - 0 */ - RSP_VOR(0, 1, 2, 3, 4, 5, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6); - break; - case 15:/* 0, 1, 2, 3, 4, 5, 6, 7 - 7 */ /* 7, 7, 7, 7, 7, 7, 7, 7 - 0 */ - RSP_VOR(0, 1, 2, 3, 4, 5, 6, 7, 7, 7, 7, 7, 7, 7, 7, 7); - break; - } - WRITEBACK_RESULT(); + switch(EL) + { + case 0: /* 0, 1, 2, 3, 4, 5, 6, 7 - none */ /* 0, 1, 2, 3, 4, 5, 6, 7 - none */ + RSP_VOR(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7); + break; + case 1: /* 0, 1, 2, 3, 4, 5, 6, 7 - ??? */ /* 0, 1, 2, 3, 4, 5, 6, 7 - ??? */ + RSP_VOR(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7); + break; + case 2: /* 1, 3, 5, 7, 0, 2, 4, 6 - 0q */ /* 0, 0, 2, 2, 4, 4, 6, 6 - 0q */ + RSP_VOR(1, 3, 5, 7, 0, 2, 4, 6, 0, 0, 2, 2, 4, 4, 6, 6); + break; + case 3: /* 0, 2, 4, 6, 1, 3, 5, 7 - 1q */ /* 1, 1, 3, 3, 5, 5, 7, 7 - 1q */ + RSP_VOR(0, 2, 4, 6, 1, 3, 5, 7, 1, 1, 3, 3, 5, 5, 7, 7); + break; + case 4: /* 1, 2, 3, 5, 6, 7, 0, 4 - 0h */ /* 0, 0, 0, 0, 4, 4, 4, 4 - 0h */ + RSP_VOR(1, 2, 3, 5, 6, 7, 0, 4, 0, 0, 0, 0, 4, 4, 4, 4); + break; + case 5: /* 0, 2, 3, 4, 6, 7, 1, 5 - 1h */ /* 1, 1, 1, 1, 5, 5, 5, 5 - 1h */ + RSP_VOR(0, 2, 3, 4, 6, 7, 1, 5, 1, 1, 1, 1, 5, 5, 5, 5); + break; + case 6: /* 0, 1, 3, 4, 5, 7, 2, 6 - 2h */ /* 2, 2, 2, 2, 6, 6, 6, 6 - 2h */ + RSP_VOR(0, 1, 3, 4, 5, 7, 2, 6, 2, 2, 2, 2, 6, 6, 6, 6); + break; + case 7: /* 0, 1, 2, 4, 5, 6, 3, 7 - 3h */ /* 3, 3, 3, 3, 7, 7, 7, 7 - 3h */ + RSP_VOR(0, 1, 2, 4, 5, 6, 3, 7, 3, 3, 3, 3, 7, 7, 7, 7); + break; + case 8: /* 1, 2, 3, 4, 5, 6, 7, 0 - 0 */ /* 0, 0, 0, 0, 0, 0, 0, 0 - 0 */ + RSP_VOR(1, 2, 3, 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0); + break; + case 9: /* 0, 2, 3, 4, 5, 6, 7, 1 - 1 */ /* 1, 1, 1, 1, 1, 1, 1, 1 - 0 */ + RSP_VOR(0, 2, 3, 4, 5, 6, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1); + break; + case 10:/* 0, 1, 3, 4, 5, 6, 7, 2 - 2 */ /* 2, 2, 2, 2, 2, 2, 2, 2 - 0 */ + RSP_VOR(0, 1, 3, 4, 5, 6, 7, 2, 2, 2, 2, 2, 2, 2, 2, 2); + break; + case 11:/* 0, 1, 2, 4, 5, 6, 7, 3 - 3 */ /* 3, 3, 3, 3, 3, 3, 3, 3 - 0 */ + RSP_VOR(0, 1, 2, 4, 5, 6, 7, 3, 3, 3, 3, 3, 3, 3, 3, 3); + break; + case 12:/* 0, 1, 2, 3, 5, 6, 7, 4 - 4 */ /* 4, 4, 4, 4, 4, 4, 4, 4 - 0 */ + RSP_VOR(0, 1, 2, 3, 5, 6, 7, 4, 4, 4, 4, 4, 4, 4, 4, 4); + break; + case 13:/* 0, 1, 2, 3, 4, 6, 7, 5 - 5 */ /* 5, 5, 5, 5, 5, 5, 5, 5 - 0 */ + RSP_VOR(0, 1, 2, 3, 4, 6, 7, 5, 5, 5, 5, 5, 5, 5, 5, 5); + break; + case 14:/* 0, 1, 2, 3, 4, 5, 7, 6 - 6 */ /* 6, 6, 6, 6, 6, 6, 6, 6 - 0 */ + RSP_VOR(0, 1, 2, 3, 4, 5, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6); + break; + case 15:/* 0, 1, 2, 3, 4, 5, 6, 7 - 7 */ /* 7, 7, 7, 7, 7, 7, 7, 7 - 0 */ + RSP_VOR(0, 1, 2, 3, 4, 5, 6, 7, 7, 7, 7, 7, 7, 7, 7, 7); + break; + } + WRITEBACK_RESULT(); } #define RSP_VNOR(E10, E11, E12, E13, E14, E15, E16, E17, E20, E21, E22, E23, E24, E25, E26, E27) \ @@ -2837,58 +2837,58 @@ INLINE void rsp_vnor(rsp_state *rsp, UINT32 op, INT16 *vres) // // Bitwise NOT OR of two vector registers - switch(EL) - { - case 0: /* 0, 1, 2, 3, 4, 5, 6, 7 - none */ /* 0, 1, 2, 3, 4, 5, 6, 7 - none */ - RSP_VNOR(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7); - break; - case 1: /* 0, 1, 2, 3, 4, 5, 6, 7 - ??? */ /* 0, 1, 2, 3, 4, 5, 6, 7 - ??? */ - RSP_VNOR(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7); - break; - case 2: /* 1, 3, 5, 7, 0, 2, 4, 6 - 0q */ /* 0, 0, 2, 2, 4, 4, 6, 6 - 0q */ - RSP_VNOR(1, 3, 5, 7, 0, 2, 4, 6, 0, 0, 2, 2, 4, 4, 6, 6); - break; - case 3: /* 0, 2, 4, 6, 1, 3, 5, 7 - 1q */ /* 1, 1, 3, 3, 5, 5, 7, 7 - 1q */ - RSP_VNOR(0, 2, 4, 6, 1, 3, 5, 7, 1, 1, 3, 3, 5, 5, 7, 7); - break; - case 4: /* 1, 2, 3, 5, 6, 7, 0, 4 - 0h */ /* 0, 0, 0, 0, 4, 4, 4, 4 - 0h */ - RSP_VNOR(1, 2, 3, 5, 6, 7, 0, 4, 0, 0, 0, 0, 4, 4, 4, 4); - break; - case 5: /* 0, 2, 3, 4, 6, 7, 1, 5 - 1h */ /* 1, 1, 1, 1, 5, 5, 5, 5 - 1h */ - RSP_VNOR(0, 2, 3, 4, 6, 7, 1, 5, 1, 1, 1, 1, 5, 5, 5, 5); - break; - case 6: /* 0, 1, 3, 4, 5, 7, 2, 6 - 2h */ /* 2, 2, 2, 2, 6, 6, 6, 6 - 2h */ - RSP_VNOR(0, 1, 3, 4, 5, 7, 2, 6, 2, 2, 2, 2, 6, 6, 6, 6); - break; - case 7: /* 0, 1, 2, 4, 5, 6, 3, 7 - 3h */ /* 3, 3, 3, 3, 7, 7, 7, 7 - 3h */ - RSP_VNOR(0, 1, 2, 4, 5, 6, 3, 7, 3, 3, 3, 3, 7, 7, 7, 7); - break; - case 8: /* 1, 2, 3, 4, 5, 6, 7, 0 - 0 */ /* 0, 0, 0, 0, 0, 0, 0, 0 - 0 */ - RSP_VNOR(1, 2, 3, 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0); - break; - case 9: /* 0, 2, 3, 4, 5, 6, 7, 1 - 1 */ /* 1, 1, 1, 1, 1, 1, 1, 1 - 0 */ - RSP_VNOR(0, 2, 3, 4, 5, 6, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1); - break; - case 10:/* 0, 1, 3, 4, 5, 6, 7, 2 - 2 */ /* 2, 2, 2, 2, 2, 2, 2, 2 - 0 */ - RSP_VNOR(0, 1, 3, 4, 5, 6, 7, 2, 2, 2, 2, 2, 2, 2, 2, 2); - break; - case 11:/* 0, 1, 2, 4, 5, 6, 7, 3 - 3 */ /* 3, 3, 3, 3, 3, 3, 3, 3 - 0 */ - RSP_VNOR(0, 1, 2, 4, 5, 6, 7, 3, 3, 3, 3, 3, 3, 3, 3, 3); - break; - case 12:/* 0, 1, 2, 3, 5, 6, 7, 4 - 4 */ /* 4, 4, 4, 4, 4, 4, 4, 4 - 0 */ - RSP_VNOR(0, 1, 2, 3, 5, 6, 7, 4, 4, 4, 4, 4, 4, 4, 4, 4); - break; - case 13:/* 0, 1, 2, 3, 4, 6, 7, 5 - 5 */ /* 5, 5, 5, 5, 5, 5, 5, 5 - 0 */ - RSP_VNOR(0, 1, 2, 3, 4, 6, 7, 5, 5, 5, 5, 5, 5, 5, 5, 5); - break; - case 14:/* 0, 1, 2, 3, 4, 5, 7, 6 - 6 */ /* 6, 6, 6, 6, 6, 6, 6, 6 - 0 */ - RSP_VNOR(0, 1, 2, 3, 4, 5, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6); - break; - case 15:/* 0, 1, 2, 3, 4, 5, 6, 7 - 7 */ /* 7, 7, 7, 7, 7, 7, 7, 7 - 0 */ - RSP_VNOR(0, 1, 2, 3, 4, 5, 6, 7, 7, 7, 7, 7, 7, 7, 7, 7); - break; - } - WRITEBACK_RESULT(); + switch(EL) + { + case 0: /* 0, 1, 2, 3, 4, 5, 6, 7 - none */ /* 0, 1, 2, 3, 4, 5, 6, 7 - none */ + RSP_VNOR(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7); + break; + case 1: /* 0, 1, 2, 3, 4, 5, 6, 7 - ??? */ /* 0, 1, 2, 3, 4, 5, 6, 7 - ??? */ + RSP_VNOR(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7); + break; + case 2: /* 1, 3, 5, 7, 0, 2, 4, 6 - 0q */ /* 0, 0, 2, 2, 4, 4, 6, 6 - 0q */ + RSP_VNOR(1, 3, 5, 7, 0, 2, 4, 6, 0, 0, 2, 2, 4, 4, 6, 6); + break; + case 3: /* 0, 2, 4, 6, 1, 3, 5, 7 - 1q */ /* 1, 1, 3, 3, 5, 5, 7, 7 - 1q */ + RSP_VNOR(0, 2, 4, 6, 1, 3, 5, 7, 1, 1, 3, 3, 5, 5, 7, 7); + break; + case 4: /* 1, 2, 3, 5, 6, 7, 0, 4 - 0h */ /* 0, 0, 0, 0, 4, 4, 4, 4 - 0h */ + RSP_VNOR(1, 2, 3, 5, 6, 7, 0, 4, 0, 0, 0, 0, 4, 4, 4, 4); + break; + case 5: /* 0, 2, 3, 4, 6, 7, 1, 5 - 1h */ /* 1, 1, 1, 1, 5, 5, 5, 5 - 1h */ + RSP_VNOR(0, 2, 3, 4, 6, 7, 1, 5, 1, 1, 1, 1, 5, 5, 5, 5); + break; + case 6: /* 0, 1, 3, 4, 5, 7, 2, 6 - 2h */ /* 2, 2, 2, 2, 6, 6, 6, 6 - 2h */ + RSP_VNOR(0, 1, 3, 4, 5, 7, 2, 6, 2, 2, 2, 2, 6, 6, 6, 6); + break; + case 7: /* 0, 1, 2, 4, 5, 6, 3, 7 - 3h */ /* 3, 3, 3, 3, 7, 7, 7, 7 - 3h */ + RSP_VNOR(0, 1, 2, 4, 5, 6, 3, 7, 3, 3, 3, 3, 7, 7, 7, 7); + break; + case 8: /* 1, 2, 3, 4, 5, 6, 7, 0 - 0 */ /* 0, 0, 0, 0, 0, 0, 0, 0 - 0 */ + RSP_VNOR(1, 2, 3, 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0); + break; + case 9: /* 0, 2, 3, 4, 5, 6, 7, 1 - 1 */ /* 1, 1, 1, 1, 1, 1, 1, 1 - 0 */ + RSP_VNOR(0, 2, 3, 4, 5, 6, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1); + break; + case 10:/* 0, 1, 3, 4, 5, 6, 7, 2 - 2 */ /* 2, 2, 2, 2, 2, 2, 2, 2 - 0 */ + RSP_VNOR(0, 1, 3, 4, 5, 6, 7, 2, 2, 2, 2, 2, 2, 2, 2, 2); + break; + case 11:/* 0, 1, 2, 4, 5, 6, 7, 3 - 3 */ /* 3, 3, 3, 3, 3, 3, 3, 3 - 0 */ + RSP_VNOR(0, 1, 2, 4, 5, 6, 7, 3, 3, 3, 3, 3, 3, 3, 3, 3); + break; + case 12:/* 0, 1, 2, 3, 5, 6, 7, 4 - 4 */ /* 4, 4, 4, 4, 4, 4, 4, 4 - 0 */ + RSP_VNOR(0, 1, 2, 3, 5, 6, 7, 4, 4, 4, 4, 4, 4, 4, 4, 4); + break; + case 13:/* 0, 1, 2, 3, 4, 6, 7, 5 - 5 */ /* 5, 5, 5, 5, 5, 5, 5, 5 - 0 */ + RSP_VNOR(0, 1, 2, 3, 4, 6, 7, 5, 5, 5, 5, 5, 5, 5, 5, 5); + break; + case 14:/* 0, 1, 2, 3, 4, 5, 7, 6 - 6 */ /* 6, 6, 6, 6, 6, 6, 6, 6 - 0 */ + RSP_VNOR(0, 1, 2, 3, 4, 5, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6); + break; + case 15:/* 0, 1, 2, 3, 4, 5, 6, 7 - 7 */ /* 7, 7, 7, 7, 7, 7, 7, 7 - 0 */ + RSP_VNOR(0, 1, 2, 3, 4, 5, 6, 7, 7, 7, 7, 7, 7, 7, 7, 7); + break; + } + WRITEBACK_RESULT(); } #define RSP_VXOR(E10, E11, E12, E13, E14, E15, E16, E17, E20, E21, E22, E23, E24, E25, E26, E27) \ @@ -2918,58 +2918,58 @@ INLINE void rsp_vxor(rsp_state *rsp, UINT32 op, INT16 *vres) // // Bitwise XOR of two vector registers - switch(EL) - { - case 0: /* 0, 1, 2, 3, 4, 5, 6, 7 - none */ /* 0, 1, 2, 3, 4, 5, 6, 7 - none */ - RSP_VXOR(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7); - break; - case 1: /* 0, 1, 2, 3, 4, 5, 6, 7 - ??? */ /* 0, 1, 2, 3, 4, 5, 6, 7 - ??? */ - RSP_VXOR(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7); - break; - case 2: /* 1, 3, 5, 7, 0, 2, 4, 6 - 0q */ /* 0, 0, 2, 2, 4, 4, 6, 6 - 0q */ - RSP_VXOR(1, 3, 5, 7, 0, 2, 4, 6, 0, 0, 2, 2, 4, 4, 6, 6); - break; - case 3: /* 0, 2, 4, 6, 1, 3, 5, 7 - 1q */ /* 1, 1, 3, 3, 5, 5, 7, 7 - 1q */ - RSP_VXOR(0, 2, 4, 6, 1, 3, 5, 7, 1, 1, 3, 3, 5, 5, 7, 7); - break; - case 4: /* 1, 2, 3, 5, 6, 7, 0, 4 - 0h */ /* 0, 0, 0, 0, 4, 4, 4, 4 - 0h */ - RSP_VXOR(1, 2, 3, 5, 6, 7, 0, 4, 0, 0, 0, 0, 4, 4, 4, 4); - break; - case 5: /* 0, 2, 3, 4, 6, 7, 1, 5 - 1h */ /* 1, 1, 1, 1, 5, 5, 5, 5 - 1h */ - RSP_VXOR(0, 2, 3, 4, 6, 7, 1, 5, 1, 1, 1, 1, 5, 5, 5, 5); - break; - case 6: /* 0, 1, 3, 4, 5, 7, 2, 6 - 2h */ /* 2, 2, 2, 2, 6, 6, 6, 6 - 2h */ - RSP_VXOR(0, 1, 3, 4, 5, 7, 2, 6, 2, 2, 2, 2, 6, 6, 6, 6); - break; - case 7: /* 0, 1, 2, 4, 5, 6, 3, 7 - 3h */ /* 3, 3, 3, 3, 7, 7, 7, 7 - 3h */ - RSP_VXOR(0, 1, 2, 4, 5, 6, 3, 7, 3, 3, 3, 3, 7, 7, 7, 7); - break; - case 8: /* 1, 2, 3, 4, 5, 6, 7, 0 - 0 */ /* 0, 0, 0, 0, 0, 0, 0, 0 - 0 */ - RSP_VXOR(1, 2, 3, 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0); - break; - case 9: /* 0, 2, 3, 4, 5, 6, 7, 1 - 1 */ /* 1, 1, 1, 1, 1, 1, 1, 1 - 0 */ - RSP_VXOR(0, 2, 3, 4, 5, 6, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1); - break; - case 10:/* 0, 1, 3, 4, 5, 6, 7, 2 - 2 */ /* 2, 2, 2, 2, 2, 2, 2, 2 - 0 */ - RSP_VXOR(0, 1, 3, 4, 5, 6, 7, 2, 2, 2, 2, 2, 2, 2, 2, 2); - break; - case 11:/* 0, 1, 2, 4, 5, 6, 7, 3 - 3 */ /* 3, 3, 3, 3, 3, 3, 3, 3 - 0 */ - RSP_VXOR(0, 1, 2, 4, 5, 6, 7, 3, 3, 3, 3, 3, 3, 3, 3, 3); - break; - case 12:/* 0, 1, 2, 3, 5, 6, 7, 4 - 4 */ /* 4, 4, 4, 4, 4, 4, 4, 4 - 0 */ - RSP_VXOR(0, 1, 2, 3, 5, 6, 7, 4, 4, 4, 4, 4, 4, 4, 4, 4); - break; - case 13:/* 0, 1, 2, 3, 4, 6, 7, 5 - 5 */ /* 5, 5, 5, 5, 5, 5, 5, 5 - 0 */ - RSP_VXOR(0, 1, 2, 3, 4, 6, 7, 5, 5, 5, 5, 5, 5, 5, 5, 5); - break; - case 14:/* 0, 1, 2, 3, 4, 5, 7, 6 - 6 */ /* 6, 6, 6, 6, 6, 6, 6, 6 - 0 */ - RSP_VXOR(0, 1, 2, 3, 4, 5, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6); - break; - case 15:/* 0, 1, 2, 3, 4, 5, 6, 7 - 7 */ /* 7, 7, 7, 7, 7, 7, 7, 7 - 0 */ - RSP_VXOR(0, 1, 2, 3, 4, 5, 6, 7, 7, 7, 7, 7, 7, 7, 7, 7); - break; - } - WRITEBACK_RESULT(); + switch(EL) + { + case 0: /* 0, 1, 2, 3, 4, 5, 6, 7 - none */ /* 0, 1, 2, 3, 4, 5, 6, 7 - none */ + RSP_VXOR(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7); + break; + case 1: /* 0, 1, 2, 3, 4, 5, 6, 7 - ??? */ /* 0, 1, 2, 3, 4, 5, 6, 7 - ??? */ + RSP_VXOR(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7); + break; + case 2: /* 1, 3, 5, 7, 0, 2, 4, 6 - 0q */ /* 0, 0, 2, 2, 4, 4, 6, 6 - 0q */ + RSP_VXOR(1, 3, 5, 7, 0, 2, 4, 6, 0, 0, 2, 2, 4, 4, 6, 6); + break; + case 3: /* 0, 2, 4, 6, 1, 3, 5, 7 - 1q */ /* 1, 1, 3, 3, 5, 5, 7, 7 - 1q */ + RSP_VXOR(0, 2, 4, 6, 1, 3, 5, 7, 1, 1, 3, 3, 5, 5, 7, 7); + break; + case 4: /* 1, 2, 3, 5, 6, 7, 0, 4 - 0h */ /* 0, 0, 0, 0, 4, 4, 4, 4 - 0h */ + RSP_VXOR(1, 2, 3, 5, 6, 7, 0, 4, 0, 0, 0, 0, 4, 4, 4, 4); + break; + case 5: /* 0, 2, 3, 4, 6, 7, 1, 5 - 1h */ /* 1, 1, 1, 1, 5, 5, 5, 5 - 1h */ + RSP_VXOR(0, 2, 3, 4, 6, 7, 1, 5, 1, 1, 1, 1, 5, 5, 5, 5); + break; + case 6: /* 0, 1, 3, 4, 5, 7, 2, 6 - 2h */ /* 2, 2, 2, 2, 6, 6, 6, 6 - 2h */ + RSP_VXOR(0, 1, 3, 4, 5, 7, 2, 6, 2, 2, 2, 2, 6, 6, 6, 6); + break; + case 7: /* 0, 1, 2, 4, 5, 6, 3, 7 - 3h */ /* 3, 3, 3, 3, 7, 7, 7, 7 - 3h */ + RSP_VXOR(0, 1, 2, 4, 5, 6, 3, 7, 3, 3, 3, 3, 7, 7, 7, 7); + break; + case 8: /* 1, 2, 3, 4, 5, 6, 7, 0 - 0 */ /* 0, 0, 0, 0, 0, 0, 0, 0 - 0 */ + RSP_VXOR(1, 2, 3, 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0); + break; + case 9: /* 0, 2, 3, 4, 5, 6, 7, 1 - 1 */ /* 1, 1, 1, 1, 1, 1, 1, 1 - 0 */ + RSP_VXOR(0, 2, 3, 4, 5, 6, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1); + break; + case 10:/* 0, 1, 3, 4, 5, 6, 7, 2 - 2 */ /* 2, 2, 2, 2, 2, 2, 2, 2 - 0 */ + RSP_VXOR(0, 1, 3, 4, 5, 6, 7, 2, 2, 2, 2, 2, 2, 2, 2, 2); + break; + case 11:/* 0, 1, 2, 4, 5, 6, 7, 3 - 3 */ /* 3, 3, 3, 3, 3, 3, 3, 3 - 0 */ + RSP_VXOR(0, 1, 2, 4, 5, 6, 7, 3, 3, 3, 3, 3, 3, 3, 3, 3); + break; + case 12:/* 0, 1, 2, 3, 5, 6, 7, 4 - 4 */ /* 4, 4, 4, 4, 4, 4, 4, 4 - 0 */ + RSP_VXOR(0, 1, 2, 3, 5, 6, 7, 4, 4, 4, 4, 4, 4, 4, 4, 4); + break; + case 13:/* 0, 1, 2, 3, 4, 6, 7, 5 - 5 */ /* 5, 5, 5, 5, 5, 5, 5, 5 - 0 */ + RSP_VXOR(0, 1, 2, 3, 4, 6, 7, 5, 5, 5, 5, 5, 5, 5, 5, 5); + break; + case 14:/* 0, 1, 2, 3, 4, 5, 7, 6 - 6 */ /* 6, 6, 6, 6, 6, 6, 6, 6 - 0 */ + RSP_VXOR(0, 1, 2, 3, 4, 5, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6); + break; + case 15:/* 0, 1, 2, 3, 4, 5, 6, 7 - 7 */ /* 7, 7, 7, 7, 7, 7, 7, 7 - 0 */ + RSP_VXOR(0, 1, 2, 3, 4, 5, 6, 7, 7, 7, 7, 7, 7, 7, 7, 7); + break; + } + WRITEBACK_RESULT(); } #define RSP_VNXOR(E10, E11, E12, E13, E14, E15, E16, E17, E20, E21, E22, E23, E24, E25, E26, E27) \ @@ -2999,58 +2999,58 @@ INLINE void rsp_vnxor(rsp_state *rsp, UINT32 op, INT16 *vres) // // Bitwise NOT XOR of two vector registers - switch(EL) - { - case 0: /* 0, 1, 2, 3, 4, 5, 6, 7 - none */ /* 0, 1, 2, 3, 4, 5, 6, 7 - none */ - RSP_VNXOR(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7); - break; - case 1: /* 0, 1, 2, 3, 4, 5, 6, 7 - ??? */ /* 0, 1, 2, 3, 4, 5, 6, 7 - ??? */ - RSP_VNXOR(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7); - break; - case 2: /* 1, 3, 5, 7, 0, 2, 4, 6 - 0q */ /* 0, 0, 2, 2, 4, 4, 6, 6 - 0q */ - RSP_VNXOR(1, 3, 5, 7, 0, 2, 4, 6, 0, 0, 2, 2, 4, 4, 6, 6); - break; - case 3: /* 0, 2, 4, 6, 1, 3, 5, 7 - 1q */ /* 1, 1, 3, 3, 5, 5, 7, 7 - 1q */ - RSP_VNXOR(0, 2, 4, 6, 1, 3, 5, 7, 1, 1, 3, 3, 5, 5, 7, 7); - break; - case 4: /* 1, 2, 3, 5, 6, 7, 0, 4 - 0h */ /* 0, 0, 0, 0, 4, 4, 4, 4 - 0h */ - RSP_VNXOR(1, 2, 3, 5, 6, 7, 0, 4, 0, 0, 0, 0, 4, 4, 4, 4); - break; - case 5: /* 0, 2, 3, 4, 6, 7, 1, 5 - 1h */ /* 1, 1, 1, 1, 5, 5, 5, 5 - 1h */ - RSP_VNXOR(0, 2, 3, 4, 6, 7, 1, 5, 1, 1, 1, 1, 5, 5, 5, 5); - break; - case 6: /* 0, 1, 3, 4, 5, 7, 2, 6 - 2h */ /* 2, 2, 2, 2, 6, 6, 6, 6 - 2h */ - RSP_VNXOR(0, 1, 3, 4, 5, 7, 2, 6, 2, 2, 2, 2, 6, 6, 6, 6); - break; - case 7: /* 0, 1, 2, 4, 5, 6, 3, 7 - 3h */ /* 3, 3, 3, 3, 7, 7, 7, 7 - 3h */ - RSP_VNXOR(0, 1, 2, 4, 5, 6, 3, 7, 3, 3, 3, 3, 7, 7, 7, 7); - break; - case 8: /* 1, 2, 3, 4, 5, 6, 7, 0 - 0 */ /* 0, 0, 0, 0, 0, 0, 0, 0 - 0 */ - RSP_VNXOR(1, 2, 3, 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0); - break; - case 9: /* 0, 2, 3, 4, 5, 6, 7, 1 - 1 */ /* 1, 1, 1, 1, 1, 1, 1, 1 - 0 */ - RSP_VNXOR(0, 2, 3, 4, 5, 6, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1); - break; - case 10:/* 0, 1, 3, 4, 5, 6, 7, 2 - 2 */ /* 2, 2, 2, 2, 2, 2, 2, 2 - 0 */ - RSP_VNXOR(0, 1, 3, 4, 5, 6, 7, 2, 2, 2, 2, 2, 2, 2, 2, 2); - break; - case 11:/* 0, 1, 2, 4, 5, 6, 7, 3 - 3 */ /* 3, 3, 3, 3, 3, 3, 3, 3 - 0 */ - RSP_VNXOR(0, 1, 2, 4, 5, 6, 7, 3, 3, 3, 3, 3, 3, 3, 3, 3); - break; - case 12:/* 0, 1, 2, 3, 5, 6, 7, 4 - 4 */ /* 4, 4, 4, 4, 4, 4, 4, 4 - 0 */ - RSP_VNXOR(0, 1, 2, 3, 5, 6, 7, 4, 4, 4, 4, 4, 4, 4, 4, 4); - break; - case 13:/* 0, 1, 2, 3, 4, 6, 7, 5 - 5 */ /* 5, 5, 5, 5, 5, 5, 5, 5 - 0 */ - RSP_VNXOR(0, 1, 2, 3, 4, 6, 7, 5, 5, 5, 5, 5, 5, 5, 5, 5); - break; - case 14:/* 0, 1, 2, 3, 4, 5, 7, 6 - 6 */ /* 6, 6, 6, 6, 6, 6, 6, 6 - 0 */ - RSP_VNXOR(0, 1, 2, 3, 4, 5, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6); - break; - case 15:/* 0, 1, 2, 3, 4, 5, 6, 7 - 7 */ /* 7, 7, 7, 7, 7, 7, 7, 7 - 0 */ - RSP_VNXOR(0, 1, 2, 3, 4, 5, 6, 7, 7, 7, 7, 7, 7, 7, 7, 7); - break; - } - WRITEBACK_RESULT(); + switch(EL) + { + case 0: /* 0, 1, 2, 3, 4, 5, 6, 7 - none */ /* 0, 1, 2, 3, 4, 5, 6, 7 - none */ + RSP_VNXOR(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7); + break; + case 1: /* 0, 1, 2, 3, 4, 5, 6, 7 - ??? */ /* 0, 1, 2, 3, 4, 5, 6, 7 - ??? */ + RSP_VNXOR(0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7); + break; + case 2: /* 1, 3, 5, 7, 0, 2, 4, 6 - 0q */ /* 0, 0, 2, 2, 4, 4, 6, 6 - 0q */ + RSP_VNXOR(1, 3, 5, 7, 0, 2, 4, 6, 0, 0, 2, 2, 4, 4, 6, 6); + break; + case 3: /* 0, 2, 4, 6, 1, 3, 5, 7 - 1q */ /* 1, 1, 3, 3, 5, 5, 7, 7 - 1q */ + RSP_VNXOR(0, 2, 4, 6, 1, 3, 5, 7, 1, 1, 3, 3, 5, 5, 7, 7); + break; + case 4: /* 1, 2, 3, 5, 6, 7, 0, 4 - 0h */ /* 0, 0, 0, 0, 4, 4, 4, 4 - 0h */ + RSP_VNXOR(1, 2, 3, 5, 6, 7, 0, 4, 0, 0, 0, 0, 4, 4, 4, 4); + break; + case 5: /* 0, 2, 3, 4, 6, 7, 1, 5 - 1h */ /* 1, 1, 1, 1, 5, 5, 5, 5 - 1h */ + RSP_VNXOR(0, 2, 3, 4, 6, 7, 1, 5, 1, 1, 1, 1, 5, 5, 5, 5); + break; + case 6: /* 0, 1, 3, 4, 5, 7, 2, 6 - 2h */ /* 2, 2, 2, 2, 6, 6, 6, 6 - 2h */ + RSP_VNXOR(0, 1, 3, 4, 5, 7, 2, 6, 2, 2, 2, 2, 6, 6, 6, 6); + break; + case 7: /* 0, 1, 2, 4, 5, 6, 3, 7 - 3h */ /* 3, 3, 3, 3, 7, 7, 7, 7 - 3h */ + RSP_VNXOR(0, 1, 2, 4, 5, 6, 3, 7, 3, 3, 3, 3, 7, 7, 7, 7); + break; + case 8: /* 1, 2, 3, 4, 5, 6, 7, 0 - 0 */ /* 0, 0, 0, 0, 0, 0, 0, 0 - 0 */ + RSP_VNXOR(1, 2, 3, 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0); + break; + case 9: /* 0, 2, 3, 4, 5, 6, 7, 1 - 1 */ /* 1, 1, 1, 1, 1, 1, 1, 1 - 0 */ + RSP_VNXOR(0, 2, 3, 4, 5, 6, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1); + break; + case 10:/* 0, 1, 3, 4, 5, 6, 7, 2 - 2 */ /* 2, 2, 2, 2, 2, 2, 2, 2 - 0 */ + RSP_VNXOR(0, 1, 3, 4, 5, 6, 7, 2, 2, 2, 2, 2, 2, 2, 2, 2); + break; + case 11:/* 0, 1, 2, 4, 5, 6, 7, 3 - 3 */ /* 3, 3, 3, 3, 3, 3, 3, 3 - 0 */ + RSP_VNXOR(0, 1, 2, 4, 5, 6, 7, 3, 3, 3, 3, 3, 3, 3, 3, 3); + break; + case 12:/* 0, 1, 2, 3, 5, 6, 7, 4 - 4 */ /* 4, 4, 4, 4, 4, 4, 4, 4 - 0 */ + RSP_VNXOR(0, 1, 2, 3, 5, 6, 7, 4, 4, 4, 4, 4, 4, 4, 4, 4); + break; + case 13:/* 0, 1, 2, 3, 4, 6, 7, 5 - 5 */ /* 5, 5, 5, 5, 5, 5, 5, 5 - 0 */ + RSP_VNXOR(0, 1, 2, 3, 4, 6, 7, 5, 5, 5, 5, 5, 5, 5, 5, 5); + break; + case 14:/* 0, 1, 2, 3, 4, 5, 7, 6 - 6 */ /* 6, 6, 6, 6, 6, 6, 6, 6 - 0 */ + RSP_VNXOR(0, 1, 2, 3, 4, 5, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6); + break; + case 15:/* 0, 1, 2, 3, 4, 5, 6, 7 - 7 */ /* 7, 7, 7, 7, 7, 7, 7, 7 - 0 */ + RSP_VNXOR(0, 1, 2, 3, 4, 5, 6, 7, 7, 7, 7, 7, 7, 7, 7, 7); + break; + } + WRITEBACK_RESULT(); } INLINE void rsp_vrcp(rsp_state *rsp, UINT32 op, INT16 *vres) @@ -3890,7 +3890,7 @@ static void static_generate_memory_accessor(rsp_state *rsp, int size, int iswrit UML_LABEL(block, unaligned_case); // unaligned_case: UML_ROLAND(block, IREG(2), IREG(0), IMM(3), IMM(0x18)); // roland i2,i0,3,0x18 UML_AND(block, IREG(0), IREG(0), IMM(0xffc)); // and i0,i0,0xffc - UML_DLOAD(block, IREG(3), rsp->impstate->dmem, IREG(0), QWORD_x1); // dload i3,dmem,i0,qword_x1 + UML_DLOAD(block, IREG(3), rsp->impstate->dmem, IREG(0), QWORD_x1); // dload i3,dmem,i0,qword_x1 UML_DROL(block, IREG(3), IREG(3), IREG(2)); // drol i3,i3,i2 UML_DAND(block, IREG(1), IREG(1), IMM(0xffff)); // dand i1,i1,0xffff UML_DAND(block, IREG(3), IREG(3), IMM(U64(0xffffffffffff0000))); // dand i3,i3,~0xffff @@ -3912,7 +3912,7 @@ static void static_generate_memory_accessor(rsp_state *rsp, int size, int iswrit UML_LABEL(block, unaligned_case); // unaligned_case: UML_ROLAND(block, IREG(2), IREG(0), IMM(3), IMM(0x18)); // roland i2,i0,3,0x18 UML_AND(block, IREG(0), IREG(0), IMM(0xffc)); // and i0,i0,0xffc - UML_DLOAD(block, IREG(3), rsp->impstate->dmem, IREG(0), QWORD_x1); // dload i3,dmem,i0,qword_x1 + UML_DLOAD(block, IREG(3), rsp->impstate->dmem, IREG(0), QWORD_x1); // dload i3,dmem,i0,qword_x1 UML_DROL(block, IREG(3), IREG(3), IREG(2)); // drol i3,i3,i2 UML_DAND(block, IREG(1), IREG(1), IMM(0xffffffff)); // dand i1,i1,0xffffffff UML_DAND(block, IREG(3), IREG(3), IMM(U64(0xffffffff00000000))); // dand i3,i3,~0xffffffff @@ -3946,7 +3946,7 @@ static void static_generate_memory_accessor(rsp_state *rsp, int size, int iswrit UML_LABEL(block, unaligned_case); // unaligned_case: UML_ROLAND(block, IREG(1), IREG(0), IMM(3), IMM(0x18)); // roland i1,i0,3,0x18 UML_AND(block, IREG(0), IREG(0), IMM(0xffc)); // and i0,i0,0xffc - UML_DLOAD(block, IREG(0), rsp->impstate->dmem, IREG(0), QWORD_x1); // dload i0,dmem,i0,qword_x1 + UML_DLOAD(block, IREG(0), rsp->impstate->dmem, IREG(0), QWORD_x1); // dload i0,dmem,i0,qword_x1 UML_DROL(block, IREG(0), IREG(0), IREG(1)); // drol i0,i0,i1 UML_AND(block, IREG(0), IREG(0), IMM(0xffff)); // and i0,i0,0xffff #endif @@ -3964,7 +3964,7 @@ static void static_generate_memory_accessor(rsp_state *rsp, int size, int iswrit UML_LABEL(block, unaligned_case); // unaligned_case: UML_ROLAND(block, IREG(1), IREG(0), IMM(3), IMM(0x18)); // roland i1,i0,3,0x18 UML_AND(block, IREG(0), IREG(0), IMM(0xffc)); // and i0,i0,0xffc - UML_DLOAD(block, IREG(0), rsp->impstate->dmem, IREG(0), QWORD_x1); // dload i0,dmem,i0,qword_x1 + UML_DLOAD(block, IREG(0), rsp->impstate->dmem, IREG(0), QWORD_x1); // dload i0,dmem,i0,qword_x1 UML_DROL(block, IREG(0), IREG(0), IREG(1)); // drol i0,i0,i1 #endif } @@ -4783,11 +4783,11 @@ CPU_GET_INFO( rsp ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE: info->i = CLEAR_LINE; break; diff --git a/src/emu/cpu/s2650/s2650.c b/src/emu/cpu/s2650/s2650.c index 6bee23af608..7b5b09a0fc1 100644 --- a/src/emu/cpu/s2650/s2650.c +++ b/src/emu/cpu/s2650/s2650.c @@ -297,8 +297,8 @@ INLINE UINT8 ARG(s2650_regs *s2650c) #define _ABS_EA() \ { \ UINT8 hr, dr; \ - hr = ARG(s2650c); /* get 'holding register' */ \ - dr = ARG(s2650c); /* get 'data bus register' */ \ + hr = ARG(s2650c); /* get 'holding register' */ \ + dr = ARG(s2650c); /* get 'data bus register' */ \ /* build effective address within current 8K page */ \ s2650c->ea = s2650c->page + (((hr << 8) + dr) & PMSK); \ /* indirect addressing ? */ \ @@ -339,10 +339,10 @@ INLINE UINT8 ARG(s2650_regs *s2650c) #define _BRA_EA() \ { \ UINT8 hr, dr; \ - hr = ARG(s2650c); /* get 'holding register' */ \ - dr = ARG(s2650c); /* get 'data bus register' */ \ + hr = ARG(s2650c); /* get 'holding register' */ \ + dr = ARG(s2650c); /* get 'data bus register' */ \ /* build address in 32K address space */ \ - s2650c->ea = ((hr << 8) + dr) & AMSK; \ + s2650c->ea = ((hr << 8) + dr) & AMSK; \ /* indirect addressing ? */ \ if (hr & 0x80) { \ int addr = s2650c->ea; \ @@ -362,15 +362,15 @@ INLINE UINT8 ARG(s2650_regs *s2650c) #define SWAP_REGS \ { \ UINT8 tmp; \ - tmp = s2650c->reg[1]; \ + tmp = s2650c->reg[1]; \ s2650c->reg[1] = s2650c->reg[4]; \ - s2650c->reg[4] = tmp; \ - tmp = s2650c->reg[2]; \ + s2650c->reg[4] = tmp; \ + tmp = s2650c->reg[2]; \ s2650c->reg[2] = s2650c->reg[5]; \ - s2650c->reg[5] = tmp; \ - tmp = s2650c->reg[3]; \ + s2650c->reg[5] = tmp; \ + tmp = s2650c->reg[3]; \ s2650c->reg[3] = s2650c->reg[6]; \ - s2650c->reg[6] = tmp; \ + s2650c->reg[6] = tmp; \ } /*************************************************************** @@ -432,7 +432,7 @@ INLINE UINT8 ARG(s2650_regs *s2650c) { \ if( cond ) \ { \ - REL_EA(s2650c->page); \ + REL_EA(s2650c->page); \ set_sp(s2650c, get_sp(s2650c) + 1); \ s2650c->ras[get_sp(s2650c)] = s2650c->page + s2650c->iar; \ s2650c->page = s2650c->ea & PAGE; \ @@ -446,7 +446,7 @@ INLINE UINT8 ARG(s2650_regs *s2650c) ***************************************************************/ #define M_ZBSR() \ { \ - REL_ZERO(0); \ + REL_ZERO(0); \ set_sp(s2650c, get_sp(s2650c) + 1); \ s2650c->ras[get_sp(s2650c)] = s2650c->page + s2650c->iar; \ s2650c->page = s2650c->ea & PAGE; \ @@ -577,9 +577,9 @@ INLINE UINT8 ARG(s2650_regs *s2650c) /* add source; carry only if WC is set */ \ UINT16 res = dest + source + ((s2650c->psl >> 3) & s2650c->psl & C); \ s2650c->psl &= ~(C | OVF | IDC); \ - if(res & 0x100) s2650c->psl |= C; \ + if(res & 0x100) s2650c->psl |= C; \ dest = res & 0xff; \ - if( (dest & 15) < (before & 15) ) s2650c->psl |= IDC; \ + if( (dest & 15) < (before & 15) ) s2650c->psl |= IDC; \ SET_CC_OVF_ADD(dest,before,source); \ } @@ -595,9 +595,9 @@ INLINE UINT8 ARG(s2650_regs *s2650c) /* subtract source; borrow only if WC is set */ \ UINT16 res = dest - source - ((s2650c->psl >> 3) & (s2650c->psl ^ C) & C); \ s2650c->psl &= ~(C | OVF | IDC); \ - if((res & 0x100)==0) s2650c->psl |= C; \ + if((res & 0x100)==0) s2650c->psl |= C; \ dest = res & 0xff; \ - if( (dest & 15) <= (before & 15) ) s2650c->psl |= IDC; \ + if( (dest & 15) <= (before & 15) ) s2650c->psl |= IDC; \ SET_CC_OVF_SUB(dest,before,source); \ } @@ -658,7 +658,7 @@ INLINE UINT8 ARG(s2650_regs *s2650c) #define M_RRR(dest) \ { \ UINT8 before = dest; \ - if (s2650c->psl & WC) \ + if (s2650c->psl & WC) \ { \ UINT8 c = s2650c->psl & C; \ s2650c->psl &= ~(C + IDC); \ @@ -688,7 +688,7 @@ INLINE UINT8 ARG(s2650_regs *s2650c) ***************************************************************/ #define M_SPSL() \ { \ - R0 = s2650c->psl; \ + R0 = s2650c->psl; \ SET_CC(R0); \ } @@ -698,7 +698,7 @@ INLINE UINT8 ARG(s2650_regs *s2650c) ***************************************************************/ #define M_CPSU() \ { \ - UINT8 cpsu = ARG(s2650c); \ + UINT8 cpsu = ARG(s2650c); \ set_psu(s2650c, s2650c->psu & ~cpsu); \ s2650c->icount -= check_irq_line(s2650c); \ } @@ -709,7 +709,7 @@ INLINE UINT8 ARG(s2650_regs *s2650c) ***************************************************************/ #define M_CPSL() \ { \ - UINT8 cpsl = ARG(s2650c); \ + UINT8 cpsl = ARG(s2650c); \ /* select other register set now ? */ \ if( (cpsl & RS) && (s2650c->psl & RS) ) \ SWAP_REGS; \ @@ -733,7 +733,7 @@ INLINE UINT8 ARG(s2650_regs *s2650c) ***************************************************************/ #define M_PPSL() \ { \ - UINT8 ppsl = ARG(s2650c); \ + UINT8 ppsl = ARG(s2650c); \ /* select 2nd register set now ? */ \ if ((ppsl & RS) && !(s2650c->psl & RS)) \ SWAP_REGS; \ @@ -746,7 +746,7 @@ INLINE UINT8 ARG(s2650_regs *s2650c) ***************************************************************/ #define M_TPSU() \ { \ - UINT8 tpsu = ARG(s2650c); \ + UINT8 tpsu = ARG(s2650c); \ UINT8 rpsu = (s2650c->psu | (memory_read_byte_8le(s2650c->io, S2650_SENSE_PORT) & SI)); \ s2650c->psl &= ~CC; \ if( (rpsu & tpsu) != tpsu ) \ @@ -759,7 +759,7 @@ INLINE UINT8 ARG(s2650_regs *s2650c) ***************************************************************/ #define M_TPSL() \ { \ - UINT8 tpsl = ARG(s2650c); \ + UINT8 tpsl = ARG(s2650c); \ if( (s2650c->psl & tpsl) != tpsl ) \ s2650c->psl = (s2650c->psl & ~CC) | 0x80; \ else \ @@ -1522,7 +1522,7 @@ static CPU_SET_INFO( s2650 ) break; case CPUINFO_INT_REGISTER + S2650_PC: s2650c->page = info->i & PAGE; s2650c->iar = info->i & PMSK; break; - case CPUINFO_INT_SP: set_sp(s2650c, info->i); break; + case CPUINFO_INT_SP: set_sp(s2650c, info->i); break; case CPUINFO_INT_REGISTER + S2650_PS: s2650c->psl = info->i & 0xff; set_psu(s2650c, info->i >> 8); break; case CPUINFO_INT_REGISTER + S2650_R0: s2650c->reg[0] = info->i; break; case CPUINFO_INT_REGISTER + S2650_R1: s2650c->reg[1] = info->i; break; diff --git a/src/emu/cpu/s2650/s2650.h b/src/emu/cpu/s2650/s2650.h index 045cd32b281..e1a6dda2493 100644 --- a/src/emu/cpu/s2650/s2650.h +++ b/src/emu/cpu/s2650/s2650.h @@ -16,7 +16,7 @@ enum enum { S2650_EXT_PORT = 0x00ff, /* M/~IO=0 D/~C=x E/~NE=1 */ - S2650_CTRL_PORT = 0x0100, /* M/~IO=0 D/~C=0 E/~NE=0 */ + S2650_CTRL_PORT = 0x0100, /* M/~IO=0 D/~C=0 E/~NE=0 */ S2650_DATA_PORT = 0x0101, /* M/~IO=0 D/~C=1 E/~NE=0 */ S2650_SENSE_PORT = 0x0102, /* Fake Sense Line */ S2650_FO_PORT = 0x0103 /* Fake FO Line */ diff --git a/src/emu/cpu/saturn/saturn.c b/src/emu/cpu/saturn/saturn.c index 24fd60a6208..69f84e82722 100644 --- a/src/emu/cpu/saturn/saturn.c +++ b/src/emu/cpu/saturn/saturn.c @@ -253,22 +253,22 @@ static CPU_SET_INFO( saturn ) { /* --- the following bits of info are set as 64-bit signed integers --- */ case CPUINFO_INT_INPUT_STATE + SATURN_NMI_LINE: saturn_set_nmi_line(cpustate, info->i); break; - case CPUINFO_INT_INPUT_STATE + SATURN_IRQ_LINE: saturn_set_irq_line(cpustate, info->i); break; - case CPUINFO_INT_INPUT_STATE + SATURN_WAKEUP_LINE: saturn_set_wakeup_line(cpustate, info->i); break; + case CPUINFO_INT_INPUT_STATE + SATURN_IRQ_LINE: saturn_set_irq_line(cpustate, info->i); break; + case CPUINFO_INT_INPUT_STATE + SATURN_WAKEUP_LINE: saturn_set_wakeup_line(cpustate, info->i); break; case CPUINFO_INT_PC: case CPUINFO_INT_REGISTER + SATURN_PC: cpustate->pc = info->i; break; case CPUINFO_INT_REGISTER + SATURN_D0: cpustate->d[0] = info->i; break; case CPUINFO_INT_REGISTER + SATURN_D1: cpustate->d[1] = info->i; break; - case CPUINFO_INT_REGISTER + SATURN_A: IntReg64(cpustate->reg[A], info->i); break; - case CPUINFO_INT_REGISTER + SATURN_B: IntReg64(cpustate->reg[B], info->i); break; - case CPUINFO_INT_REGISTER + SATURN_C: IntReg64(cpustate->reg[C], info->i); break; - case CPUINFO_INT_REGISTER + SATURN_D: IntReg64(cpustate->reg[D], info->i); break; - case CPUINFO_INT_REGISTER + SATURN_R0: IntReg64(cpustate->reg[R0], info->i); break; - case CPUINFO_INT_REGISTER + SATURN_R1: IntReg64(cpustate->reg[R1], info->i); break; - case CPUINFO_INT_REGISTER + SATURN_R2: IntReg64(cpustate->reg[R2], info->i); break; - case CPUINFO_INT_REGISTER + SATURN_R3: IntReg64(cpustate->reg[R3], info->i); break; - case CPUINFO_INT_REGISTER + SATURN_R4: IntReg64(cpustate->reg[R4], info->i); break; + case CPUINFO_INT_REGISTER + SATURN_A: IntReg64(cpustate->reg[A], info->i); break; + case CPUINFO_INT_REGISTER + SATURN_B: IntReg64(cpustate->reg[B], info->i); break; + case CPUINFO_INT_REGISTER + SATURN_C: IntReg64(cpustate->reg[C], info->i); break; + case CPUINFO_INT_REGISTER + SATURN_D: IntReg64(cpustate->reg[D], info->i); break; + case CPUINFO_INT_REGISTER + SATURN_R0: IntReg64(cpustate->reg[R0], info->i); break; + case CPUINFO_INT_REGISTER + SATURN_R1: IntReg64(cpustate->reg[R1], info->i); break; + case CPUINFO_INT_REGISTER + SATURN_R2: IntReg64(cpustate->reg[R2], info->i); break; + case CPUINFO_INT_REGISTER + SATURN_R3: IntReg64(cpustate->reg[R3], info->i); break; + case CPUINFO_INT_REGISTER + SATURN_R4: IntReg64(cpustate->reg[R4], info->i); break; case CPUINFO_INT_REGISTER + SATURN_P: cpustate->p = info->i; break; case CPUINFO_INT_REGISTER + SATURN_OUT: cpustate->out = info->i; break; case CPUINFO_INT_REGISTER + SATURN_CARRY: cpustate->carry = info->i; break; @@ -324,11 +324,11 @@ CPU_GET_INFO( saturn ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 20; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + SATURN_NMI_LINE: info->i = cpustate->nmi_state; break; case CPUINFO_INT_INPUT_STATE + SATURN_IRQ_LINE: info->i = cpustate->irq_state; break; @@ -340,13 +340,13 @@ CPU_GET_INFO( saturn ) case CPUINFO_INT_REGISTER + SATURN_D0: info->i = cpustate->d[0]; break; case CPUINFO_INT_REGISTER + SATURN_D1: info->i = cpustate->d[1]; break; - case CPUINFO_INT_REGISTER + SATURN_A: info->i = Reg64Int(cpustate->reg[A]); break; + case CPUINFO_INT_REGISTER + SATURN_A: info->i = Reg64Int(cpustate->reg[A]); break; case CPUINFO_INT_REGISTER + SATURN_B: info->i = Reg64Int(cpustate->reg[B]); break; case CPUINFO_INT_REGISTER + SATURN_C: info->i = Reg64Int(cpustate->reg[C]); break; case CPUINFO_INT_REGISTER + SATURN_D: info->i = Reg64Int(cpustate->reg[D]); break; case CPUINFO_INT_REGISTER + SATURN_R0: info->i = Reg64Int(cpustate->reg[R0]); break; case CPUINFO_INT_REGISTER + SATURN_R1: info->i = Reg64Int(cpustate->reg[R1]); break; - case CPUINFO_INT_REGISTER + SATURN_R2: info->i = Reg64Int(cpustate->reg[R2]); break; + case CPUINFO_INT_REGISTER + SATURN_R2: info->i = Reg64Int(cpustate->reg[R2]); break; case CPUINFO_INT_REGISTER + SATURN_R3: info->i = Reg64Int(cpustate->reg[R3]); break; case CPUINFO_INT_REGISTER + SATURN_R4: info->i = Reg64Int(cpustate->reg[R4]); break; @@ -376,7 +376,7 @@ CPU_GET_INFO( saturn ) /* --- the following bits of info are returned as NULL-terminated strings --- */ case DEVINFO_STR_NAME: strcpy(info->s, "Saturn"); break; - case DEVINFO_STR_FAMILY: strcpy(info->s, "Saturn"); break; + case DEVINFO_STR_FAMILY: strcpy(info->s, "Saturn"); break; case DEVINFO_STR_VERSION: strcpy(info->s, "1.0alpha"); break; case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break; case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright Peter Trauner, all rights reserved."); break; @@ -384,15 +384,15 @@ CPU_GET_INFO( saturn ) case CPUINFO_STR_REGISTER + SATURN_PC: sprintf(info->s, "PC: %.5x", cpustate->pc);break; case CPUINFO_STR_REGISTER + SATURN_D0: sprintf(info->s, "D0: %.5x", cpustate->d[0]);break; case CPUINFO_STR_REGISTER + SATURN_D1: sprintf(info->s, "D1: %.5x", cpustate->d[1]);break; - case CPUINFO_STR_REGISTER + SATURN_A: sprintf(info->s, "A: " Reg64Format, Reg64Data(cpustate->reg[A]));break; - case CPUINFO_STR_REGISTER + SATURN_B: sprintf(info->s, "B: " Reg64Format, Reg64Data(cpustate->reg[B]));break; - case CPUINFO_STR_REGISTER + SATURN_C: sprintf(info->s, "C: " Reg64Format, Reg64Data(cpustate->reg[C]));break; - case CPUINFO_STR_REGISTER + SATURN_D: sprintf(info->s, "D: " Reg64Format, Reg64Data(cpustate->reg[D]));break; - case CPUINFO_STR_REGISTER + SATURN_R0: sprintf(info->s, "R0: " Reg64Format, Reg64Data(cpustate->reg[R0]));break; - case CPUINFO_STR_REGISTER + SATURN_R1: sprintf(info->s, "R1: " Reg64Format, Reg64Data(cpustate->reg[R1]));break; - case CPUINFO_STR_REGISTER + SATURN_R2: sprintf(info->s, "R2: " Reg64Format, Reg64Data(cpustate->reg[R2]));break; - case CPUINFO_STR_REGISTER + SATURN_R3: sprintf(info->s, "R3: " Reg64Format, Reg64Data(cpustate->reg[R3]));break; - case CPUINFO_STR_REGISTER + SATURN_R4: sprintf(info->s, "R4: " Reg64Format, Reg64Data(cpustate->reg[R4]));break; + case CPUINFO_STR_REGISTER + SATURN_A: sprintf(info->s, "A: " Reg64Format, Reg64Data(cpustate->reg[A]));break; + case CPUINFO_STR_REGISTER + SATURN_B: sprintf(info->s, "B: " Reg64Format, Reg64Data(cpustate->reg[B]));break; + case CPUINFO_STR_REGISTER + SATURN_C: sprintf(info->s, "C: " Reg64Format, Reg64Data(cpustate->reg[C]));break; + case CPUINFO_STR_REGISTER + SATURN_D: sprintf(info->s, "D: " Reg64Format, Reg64Data(cpustate->reg[D]));break; + case CPUINFO_STR_REGISTER + SATURN_R0: sprintf(info->s, "R0: " Reg64Format, Reg64Data(cpustate->reg[R0]));break; + case CPUINFO_STR_REGISTER + SATURN_R1: sprintf(info->s, "R1: " Reg64Format, Reg64Data(cpustate->reg[R1]));break; + case CPUINFO_STR_REGISTER + SATURN_R2: sprintf(info->s, "R2: " Reg64Format, Reg64Data(cpustate->reg[R2]));break; + case CPUINFO_STR_REGISTER + SATURN_R3: sprintf(info->s, "R3: " Reg64Format, Reg64Data(cpustate->reg[R3]));break; + case CPUINFO_STR_REGISTER + SATURN_R4: sprintf(info->s, "R4: " Reg64Format, Reg64Data(cpustate->reg[R4]));break; case CPUINFO_STR_REGISTER + SATURN_P: sprintf(info->s, "P:%x", cpustate->p);break; case CPUINFO_STR_REGISTER + SATURN_OUT: sprintf(info->s, "OUT:%.3x", cpustate->out);break; case CPUINFO_STR_REGISTER + SATURN_CARRY: sprintf(info->s, "Carry: %d", cpustate->carry);break; @@ -406,8 +406,8 @@ CPU_GET_INFO( saturn ) case CPUINFO_STR_REGISTER + SATURN_RSTK5: sprintf(info->s, "RSTK5:%.5x", cpustate->rstk[5]);break; case CPUINFO_STR_REGISTER + SATURN_RSTK6: sprintf(info->s, "RSTK6:%.5x", cpustate->rstk[6]);break; case CPUINFO_STR_REGISTER + SATURN_RSTK7: sprintf(info->s, "RSTK7:%.5x", cpustate->rstk[7]);break; - case CPUINFO_STR_REGISTER + SATURN_IRQ_STATE: sprintf(info->s, "IRQ:%c%c%c%i", cpustate->in_irq?'S':'.', cpustate->irq_enable?'e':'.', cpustate->pending_irq?'p':'.', cpustate->irq_state); break; - case CPUINFO_STR_FLAGS: sprintf(info->s, "%c%c", cpustate->decimal?'D':'.', cpustate->carry ? 'C':'.'); break; - case CPUINFO_STR_REGISTER + SATURN_SLEEPING: sprintf(info->s, "sleep:%c", cpustate->sleeping?'S':'.'); break; + case CPUINFO_STR_REGISTER + SATURN_IRQ_STATE: sprintf(info->s, "IRQ:%c%c%c%i", cpustate->in_irq?'S':'.', cpustate->irq_enable?'e':'.', cpustate->pending_irq?'p':'.', cpustate->irq_state); break; + case CPUINFO_STR_FLAGS: sprintf(info->s, "%c%c", cpustate->decimal?'D':'.', cpustate->carry ? 'C':'.'); break; + case CPUINFO_STR_REGISTER + SATURN_SLEEPING: sprintf(info->s, "sleep:%c", cpustate->sleeping?'S':'.'); break; } } diff --git a/src/emu/cpu/sc61860/sc61860.c b/src/emu/cpu/sc61860/sc61860.c index 9297482b5e3..fe9392e5e66 100644 --- a/src/emu/cpu/sc61860/sc61860.c +++ b/src/emu/cpu/sc61860/sc61860.c @@ -192,11 +192,11 @@ CPU_GET_INFO( sc61860 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->oldpc; break; diff --git a/src/emu/cpu/scmp/scmp.c b/src/emu/cpu/scmp/scmp.c index ce0ace1adf6..8781ebc6065 100644 --- a/src/emu/cpu/scmp/scmp.c +++ b/src/emu/cpu/scmp/scmp.c @@ -338,13 +338,13 @@ static void execute_one(scmp_state *cpustate, int opcode) } break; // Double-Byte Miscellaneous Instructions - case 0x8f: // DLY + case 0x8f: // DLY tmp = ARG(cpustate); cpustate->icount -= 13 + (cpustate->AC * 2) + (((UINT32)tmp) << 1) + (((UINT32)tmp) << 9); cpustate->AC = 0xff; break; // Others are illegal - default : cpustate->icount -= 1; + default : cpustate->icount -= 1; illegal (cpustate,opcode); break; } @@ -353,37 +353,37 @@ static void execute_one(scmp_state *cpustate, int opcode) switch (opcode) { // Extension Register Instructions - case 0x40: // LDE + case 0x40: // LDE cpustate->icount -= 6; cpustate->AC = cpustate->ER; break; - case 0x01: // XAE + case 0x01: // XAE cpustate->icount -= 7; tmp = cpustate->AC; cpustate->AC = cpustate->ER; cpustate->ER = tmp; break; - case 0x50: // ANE + case 0x50: // ANE cpustate->icount -= 6; cpustate->AC &= cpustate->ER; break; - case 0x58: // ORE + case 0x58: // ORE cpustate->icount -= 6; cpustate->AC |= cpustate->ER; break; - case 0x60: // XRE + case 0x60: // XRE cpustate->icount -= 6; cpustate->AC ^= cpustate->ER; break; - case 0x68: // DAE + case 0x68: // DAE cpustate->icount -= 11; DEC_ADD(cpustate,cpustate->ER); break; - case 0x70: // ADE + case 0x70: // ADE cpustate->icount -= 7; BIN_ADD(cpustate,cpustate->ER); break; - case 0x78: // CAE + case 0x78: // CAE cpustate->icount -= 8; BIN_ADD(cpustate,~cpustate->ER); break; @@ -394,14 +394,14 @@ static void execute_one(scmp_state *cpustate, int opcode) cpustate->AC = GET_PTR_REG(cpustate,ptr)->b.l; GET_PTR_REG(cpustate,ptr)->b.l = tmp; break; - case 0x34: case 0x35 :case 0x36: case 0x37: + case 0x34: case 0x35 :case 0x36: case 0x37: // XPAH cpustate->icount -= 8; tmp = cpustate->AC; cpustate->AC = GET_PTR_REG(cpustate,ptr)->b.h; GET_PTR_REG(cpustate,ptr)->b.h = tmp; break; - case 0x3c: case 0x3d :case 0x3e: case 0x3f: + case 0x3c: case 0x3d :case 0x3e: case 0x3f: // XPPC { UINT16 tmp = ADD12(cpustate->PC.w.l,-1); // Since PC is incremented we need to fix it @@ -413,70 +413,70 @@ static void execute_one(scmp_state *cpustate, int opcode) } break; // Shift, Rotate, Serial I/O Instructions - case 0x19: // SIO + case 0x19: // SIO cpustate->icount -= 5; devcb_call_write_line(&cpustate->sout_func, cpustate->ER & 0x01); cpustate->ER >>= 1; cpustate->ER |= devcb_call_read_line(&cpustate->sin_func) ? 0x80 : 0x00; break; - case 0x1c: // SR + case 0x1c: // SR cpustate->icount -= 5; cpustate->AC >>= 1; break; - case 0x1d: // SRL + case 0x1d: // SRL cpustate->icount -= 5; cpustate->AC >>= 1; cpustate->AC |= cpustate->SR & 0x80; // add C/L flag break; - case 0x1e: // RR + case 0x1e: // RR cpustate->icount -= 5; cpustate->AC = (cpustate->AC >> 1) | ((cpustate->AC & 0x01) << 7); break; - case 0x1f: // RRL + case 0x1f: // RRL cpustate->icount -= 5; tmp = (cpustate->AC & 0x01) << 7; cpustate->AC = (cpustate->AC >> 1) | (cpustate->SR & 0x80); cpustate->SR = (cpustate->SR & 0x7f) | tmp; break; // Single Byte Miscellaneous Instructions - case 0x00: // HALT + case 0x00: // HALT cpustate->icount -= 8; devcb_call_write_line(&cpustate->halt_func, 1); devcb_call_write_line(&cpustate->halt_func, 0); break; - case 0x02: // CCL + case 0x02: // CCL cpustate->icount -= 5; cpustate->SR &= 0x7f; break; - case 0x03: // SCL + case 0x03: // SCL cpustate->icount -= 5; cpustate->SR |= 0x80; break; - case 0x04: // DINT + case 0x04: // DINT cpustate->icount -= 6; cpustate->SR &= 0xf7; break; - case 0x05: // IEN + case 0x05: // IEN cpustate->icount -= 6; cpustate->SR |= 0x08; break; - case 0x06: // CSA + case 0x06: // CSA cpustate->icount -= 5; cpustate->SR &= 0xcf; // clear SA and SB flags cpustate->SR |= devcb_call_read_line(&cpustate->sensea_func) ? 0x10 : 0x00; cpustate->SR |= devcb_call_read_line(&cpustate->senseb_func) ? 0x20 : 0x00; cpustate->AC = cpustate->SR; break; - case 0x07: // CAS + case 0x07: // CAS cpustate->icount -= 6; cpustate->SR = cpustate->AC; devcb_call_write8(&cpustate->flag_out_func, 0, cpustate->SR & 0x07); break; - case 0x08: // NOP + case 0x08: // NOP cpustate->icount -= 5; break; // Others are illegal - default : cpustate->icount -= 1; + default : cpustate->icount -= 1; illegal (cpustate,opcode); break; } @@ -621,12 +621,12 @@ CPU_GET_INFO( scmp ) case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; /* --- the following bits of info are returned as pointers to functions --- */ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(scmp); break; @@ -649,7 +649,7 @@ CPU_GET_INFO( scmp ) case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright Miodrag Milanovic"); break; case CPUINFO_STR_FLAGS: - sprintf(info->s, "%c%c%c%c%c%c%c%c", + sprintf(info->s, "%c%c%c%c%c%c%c%c", (cpustate->SR & 0x80) ? 'C' : '.', (cpustate->SR & 0x40) ? 'V' : '.', (cpustate->SR & 0x20) ? 'B' : '.', diff --git a/src/emu/cpu/scmp/scmpdasm.c b/src/emu/cpu/scmp/scmpdasm.c index e0113efe543..2c685223fc9 100644 --- a/src/emu/cpu/scmp/scmpdasm.c +++ b/src/emu/cpu/scmp/scmpdasm.c @@ -105,7 +105,7 @@ CPU_DISASSEMBLE( scmp ) case 0x9d : case 0x9e : case 0x9f : sprintf (buffer,"jnz %s",aspr); break; // Double-Byte Miscellaneous Instructions - case 0x8f: sprintf (buffer,"dly $%02x",arg); break; + case 0x8f: sprintf (buffer,"dly $%02x",arg); break; // Others are illegal default : sprintf (buffer,"illegal"); pc--; break; // Illegal we consider without param } @@ -114,36 +114,36 @@ CPU_DISASSEMBLE( scmp ) switch (op) { // Extension Register Instructions - case 0x40: sprintf (buffer,"lde"); break; - case 0x01: sprintf (buffer,"xae"); break; - case 0x50: sprintf (buffer,"ane"); break; - case 0x58: sprintf (buffer,"ore"); break; - case 0x60: sprintf (buffer,"xre"); break; - case 0x68: sprintf (buffer,"dae"); break; - case 0x70: sprintf (buffer,"ade"); break; - case 0x78: sprintf (buffer,"cae"); break; + case 0x40: sprintf (buffer,"lde"); break; + case 0x01: sprintf (buffer,"xae"); break; + case 0x50: sprintf (buffer,"ane"); break; + case 0x58: sprintf (buffer,"ore"); break; + case 0x60: sprintf (buffer,"xre"); break; + case 0x68: sprintf (buffer,"dae"); break; + case 0x70: sprintf (buffer,"ade"); break; + case 0x78: sprintf (buffer,"cae"); break; // Pointer Register Move Instructions - case 0x30: case 0x31 :case 0x32: case 0x33: + case 0x30: case 0x31 :case 0x32: case 0x33: sprintf (buffer,"xpal %d",ptr); break; - case 0x34: case 0x35 :case 0x36: case 0x37: + case 0x34: case 0x35 :case 0x36: case 0x37: sprintf (buffer,"xpah %d",ptr); break; - case 0x3c: case 0x3d :case 0x3e: case 0x3f: + case 0x3c: case 0x3d :case 0x3e: case 0x3f: sprintf (buffer,"xppc %d",ptr); break; // Shift, Rotate, Serial I/O Instructions - case 0x19: sprintf (buffer,"sio"); break; - case 0x1c: sprintf (buffer,"sr"); break; - case 0x1d: sprintf (buffer,"srl"); break; - case 0x1e: sprintf (buffer,"rr"); break; - case 0x1f: sprintf (buffer,"rrl"); break; + case 0x19: sprintf (buffer,"sio"); break; + case 0x1c: sprintf (buffer,"sr"); break; + case 0x1d: sprintf (buffer,"srl"); break; + case 0x1e: sprintf (buffer,"rr"); break; + case 0x1f: sprintf (buffer,"rrl"); break; // Single Byte Miscellaneous Instructions - case 0x00: sprintf (buffer,"halt"); break; - case 0x02: sprintf (buffer,"ccl"); break; - case 0x03: sprintf (buffer,"scl"); break; - case 0x04: sprintf (buffer,"dint"); break; - case 0x05: sprintf (buffer,"ien"); break; - case 0x06: sprintf (buffer,"csa"); break; - case 0x07: sprintf (buffer,"cas"); break; - case 0x08: sprintf (buffer,"nop"); break; + case 0x00: sprintf (buffer,"halt"); break; + case 0x02: sprintf (buffer,"ccl"); break; + case 0x03: sprintf (buffer,"scl"); break; + case 0x04: sprintf (buffer,"dint"); break; + case 0x05: sprintf (buffer,"ien"); break; + case 0x06: sprintf (buffer,"csa"); break; + case 0x07: sprintf (buffer,"cas"); break; + case 0x08: sprintf (buffer,"nop"); break; // Others are illegal default : sprintf (buffer,"illegal"); break; } diff --git a/src/emu/cpu/se3208/se3208.c b/src/emu/cpu/se3208/se3208.c index 9eb6ce71ae6..5839b8d2573 100644 --- a/src/emu/cpu/se3208/se3208.c +++ b/src/emu/cpu/se3208/se3208.c @@ -1823,8 +1823,8 @@ static CPU_SET_INFO( se3208 ) case CPUINFO_INT_REGISTER + SE3208_PC: case CPUINFO_INT_PC: se3208_state->PC = info->i; break; case CPUINFO_INT_REGISTER + SE3208_SP: - case CPUINFO_INT_SP: se3208_state->SP = info->i; break; - case CPUINFO_INT_REGISTER + SE3208_ER: se3208_state->ER = info->i; break; + case CPUINFO_INT_SP: se3208_state->SP = info->i; break; + case CPUINFO_INT_REGISTER + SE3208_ER: se3208_state->ER = info->i; break; case CPUINFO_INT_REGISTER + SE3208_SR: se3208_state->SR = info->i; break; case CPUINFO_INT_REGISTER + SE3208_R0: se3208_state->R[ 0] = info->i; break; case CPUINFO_INT_REGISTER + SE3208_R1: se3208_state->R[ 1] = info->i; break; @@ -1860,11 +1860,11 @@ CPU_GET_INFO( se3208 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + SE3208_INT: info->i = se3208_state->IRQ; break; case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = se3208_state->NMI; break; @@ -1874,7 +1874,7 @@ CPU_GET_INFO( se3208 ) case CPUINFO_INT_PC: case CPUINFO_INT_REGISTER + SE3208_PC: info->i = se3208_state->PC; break; case CPUINFO_INT_REGISTER + SE3208_SP: - case CPUINFO_INT_SP: info->i = se3208_state->SP; break; + case CPUINFO_INT_SP: info->i = se3208_state->SP; break; case CPUINFO_INT_REGISTER + SE3208_SR: info->i = se3208_state->SR; break; case CPUINFO_INT_REGISTER + SE3208_ER: info->i = se3208_state->ER; break; case CPUINFO_INT_REGISTER + SE3208_R0: info->i = se3208_state->R[ 0]; break; @@ -1923,7 +1923,7 @@ CPU_GET_INFO( se3208 ) case CPUINFO_STR_REGISTER + SE3208_PC: sprintf(info->s, "PC :%08X", se3208_state->PC); break; case CPUINFO_STR_REGISTER + SE3208_SR: sprintf(info->s, "SR :%08X", se3208_state->SR); break; case CPUINFO_STR_REGISTER + SE3208_ER: sprintf(info->s, "ER :%08X", se3208_state->ER); break; - case CPUINFO_STR_REGISTER + SE3208_SP: sprintf(info->s, "SP :%08X", se3208_state->SP); break; + case CPUINFO_STR_REGISTER + SE3208_SP: sprintf(info->s, "SP :%08X", se3208_state->SP); break; case CPUINFO_STR_REGISTER + SE3208_R0: sprintf(info->s, "R0 :%08X", se3208_state->R[ 0]); break; case CPUINFO_STR_REGISTER + SE3208_R1: sprintf(info->s, "R1 :%08X", se3208_state->R[ 1]); break; case CPUINFO_STR_REGISTER + SE3208_R2: sprintf(info->s, "R2 :%08X", se3208_state->R[ 2]); break; diff --git a/src/emu/cpu/sh2/sh2.c b/src/emu/cpu/sh2/sh2.c index 8496318e03f..978a8de6d34 100644 --- a/src/emu/cpu/sh2/sh2.c +++ b/src/emu/cpu/sh2/sh2.c @@ -2057,8 +2057,8 @@ INLINE void op1000(UINT16 opcode) { switch ( opcode & (15<<8) ) { - case 0 << 8: MOVBS4(opcode & 0x0f, Rm); break; - case 1 << 8: MOVWS4(opcode & 0x0f, Rm); break; + case 0 << 8: MOVBS4(opcode & 0x0f, Rm); break; + case 1 << 8: MOVWS4(opcode & 0x0f, Rm); break; case 2<< 8: NOP(); break; case 3<< 8: NOP(); break; case 4<< 8: MOVBL4(Rm, opcode & 0x0f); break; @@ -2096,13 +2096,13 @@ INLINE void op1100(UINT16 opcode) { switch (opcode & (15<<8)) { - case 0<<8: MOVBSG(opcode & 0xff); break; - case 1<<8: MOVWSG(opcode & 0xff); break; - case 2<<8: MOVLSG(opcode & 0xff); break; + case 0<<8: MOVBSG(opcode & 0xff); break; + case 1<<8: MOVWSG(opcode & 0xff); break; + case 2<<8: MOVLSG(opcode & 0xff); break; case 3<<8: TRAPA(opcode & 0xff); break; - case 4<<8: MOVBLG(opcode & 0xff); break; - case 5<<8: MOVWLG(opcode & 0xff); break; - case 6<<8: MOVLLG(opcode & 0xff); break; + case 4<<8: MOVBLG(opcode & 0xff); break; + case 5<<8: MOVWLG(opcode & 0xff); break; + case 6<<8: MOVLLG(opcode & 0xff); break; case 7<<8: MOVA(opcode & 0xff); break; case 8<<8: TSTI(opcode & 0xff); break; case 9<<8: ANDI(opcode & 0xff); break; @@ -2280,12 +2280,12 @@ static CPU_SET_INFO( sh2 ) case CPUINFO_INT_REGISTER + SH2_PC: case CPUINFO_INT_PC: sh2->pc = info->i; sh2->delay = 0; break; - case CPUINFO_INT_SP: sh2->r[15] = info->i; break; - case CPUINFO_INT_REGISTER + SH2_PR: sh2->pr = info->i; break; + case CPUINFO_INT_SP: sh2->r[15] = info->i; break; + case CPUINFO_INT_REGISTER + SH2_PR: sh2->pr = info->i; break; case CPUINFO_INT_REGISTER + SH2_SR: sh2->sr = info->i; CHECK_PENDING_IRQ("sh2_set_reg"); break; case CPUINFO_INT_REGISTER + SH2_GBR: sh2->gbr = info->i; break; case CPUINFO_INT_REGISTER + SH2_VBR: sh2->vbr = info->i; break; - case CPUINFO_INT_REGISTER + SH2_MACH: sh2->mach = info->i; break; + case CPUINFO_INT_REGISTER + SH2_MACH: sh2->mach = info->i; break; case CPUINFO_INT_REGISTER + SH2_MACL: sh2->macl = info->i; break; case CPUINFO_INT_REGISTER + SH2_R0: sh2->r[ 0] = info->i; break; case CPUINFO_INT_REGISTER + SH2_R1: sh2->r[ 1] = info->i; break; @@ -2333,11 +2333,11 @@ CPU_GET_INFO( sh2 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + SH2_INT_VBLIN: info->i = sh2->irq_line_state[SH2_INT_VBLIN]; break; case CPUINFO_INT_INPUT_STATE + SH2_INT_VBLOUT: info->i = sh2->irq_line_state[SH2_INT_VBLOUT]; break; @@ -2362,7 +2362,7 @@ CPU_GET_INFO( sh2 ) case CPUINFO_INT_PC: case CPUINFO_INT_REGISTER + SH2_PC: info->i = (sh2->delay) ? (sh2->delay & AM) : (sh2->pc & AM); break; - case CPUINFO_INT_SP: info->i = sh2->r[15]; break; + case CPUINFO_INT_SP: info->i = sh2->r[15]; break; case CPUINFO_INT_REGISTER + SH2_PR: info->i = sh2->pr; break; case CPUINFO_INT_REGISTER + SH2_SR: info->i = sh2->sr; break; case CPUINFO_INT_REGISTER + SH2_GBR: info->i = sh2->gbr; break; diff --git a/src/emu/cpu/sh2/sh2comn.h b/src/emu/cpu/sh2/sh2comn.h index 0ca1b166983..ba0f197e8f1 100644 --- a/src/emu/cpu/sh2/sh2comn.h +++ b/src/emu/cpu/sh2/sh2comn.h @@ -110,7 +110,7 @@ typedef struct UINT32 target; // target for jmp/jsr/etc so the delay slot can't kill it irq_entry irq_queue[16]; - int pcfsel; // last pcflush entry set + int pcfsel; // last pcflush entry set int maxpcfsel; // highest valid pcflush entry UINT32 pcflushes[16]; // pcflush entries @@ -122,9 +122,9 @@ typedef struct UINT32 *m; INT8 nmi_line_state; - UINT16 frc; - UINT16 ocra, ocrb, icr; - UINT64 frc_base; + UINT16 frc; + UINT16 ocra, ocrb, icr; + UINT64 frc_base; int frt_input; int internal_irq_level; @@ -140,7 +140,7 @@ typedef struct void (*ftcsr_read_callback)(UINT32 data); #ifdef USE_SH2DRC - drccache * cache; /* pointer to the DRC code cache */ + drccache * cache; /* pointer to the DRC code cache */ drcuml_state * drcuml; /* DRC UML generator state */ drcfe_state * drcfe; /* pointer to the DRC front-end state */ UINT32 drcoptions; /* configurable DRC options */ @@ -157,7 +157,7 @@ typedef struct UINT32 irq; /* irq we're taking */ /* register mappings */ - drcuml_parameter regmap[16]; /* parameter to register mappings for all 16 integer registers */ + drcuml_parameter regmap[16]; /* parameter to register mappings for all 16 integer registers */ drcuml_codehandle * entry; /* entry point */ drcuml_codehandle * read8; /* read byte */ diff --git a/src/emu/cpu/sh2/sh2drc.c b/src/emu/cpu/sh2/sh2drc.c index 7ca7e3574a1..0caa462e4d3 100644 --- a/src/emu/cpu/sh2/sh2drc.c +++ b/src/emu/cpu/sh2/sh2drc.c @@ -54,7 +54,7 @@ CPU_DISASSEMBLE( sh2 ); ***************************************************************************/ /* map variables */ -#define MAPVAR_PC MVAR(0) +#define MAPVAR_PC MVAR(0) #define MAPVAR_CYCLES MVAR(1) /* size of the execution code cache */ @@ -80,7 +80,7 @@ extern int sh2_describe(void *param, opcode_desc *desc, const opcode_desc *prev) MACROS ***************************************************************************/ -#define R32(reg) sh2->regmap[reg].type, sh2->regmap[reg].value +#define R32(reg) sh2->regmap[reg].type, sh2->regmap[reg].value /*************************************************************************** STRUCTURES & TYPEDEFS @@ -898,7 +898,7 @@ static CPU_EXECUTE( sh2 ) execute_result = drcuml_execute(drcuml, sh2->entry); /* if we need to recompile, do it */ - if (execute_result == EXECUTE_MISSING_CODE) + if (execute_result == EXECUTE_MISSING_CODE) { code_compile_block(sh2, 0, sh2->pc); } @@ -1064,13 +1064,13 @@ static void static_generate_entry_point(SH2 *sh2) UML_LABEL(block, skip+2); // skip+2: UML_MOV(block, MEM(&sh2->evec), IMM(0xffffffff)); // mov evec, -1 UML_MOV(block, IREG(0), IMM(0xffffffff)); // mov r0, -1 (r0 = irq) - UML_AND(block, IREG(1), IREG(0), IMM(0xffff)); // and r1, 0xffff + UML_AND(block, IREG(1), IREG(0), IMM(0xffff)); // and r1, 0xffff UML_LZCNT(block, IREG(1), MEM(&sh2->pending_irq)); // lzcnt r1, r1 UML_CMP(block, IREG(1), IMM(32)); // cmp r1, #32 UML_JMPc(block, IF_Z, skip+4); // jz skip+4 - UML_SUB(block, MEM(&sh2->irqline), IMM(31), IREG(1)); // sub irqline, #31, r1 + UML_SUB(block, MEM(&sh2->irqline), IMM(31), IREG(1)); // sub irqline, #31, r1 UML_LABEL(block, skip+4); // skip+4: UML_CMP(block, MEM(&sh2->internal_irq_level), IMM(0xffffffff)); // cmp internal_irq_level, #-1 @@ -1088,11 +1088,11 @@ static void static_generate_entry_point(SH2 *sh2) UML_LABEL(block, skip+1); // skip+1: UML_CMP(block, MEM(&sh2->evec), IMM(0xffffffff)); // cmp evec, 0xffffffff - UML_JMPc(block, IF_Z, skip); // jz skip + UML_JMPc(block, IF_Z, skip); // jz skip UML_SUB(block, R32(15), R32(15), IMM(4)); // sub R15, R15, #4 UML_MOV(block, IREG(0), R32(15)); // mov r0, R15 - UML_MOV(block, IREG(1), MEM(&sh2->irqsr)); // mov r1, irqsr + UML_MOV(block, IREG(1), MEM(&sh2->irqsr)); // mov r1, irqsr UML_CALLH(block, sh2->write32); // call write32 UML_SUB(block, R32(15), R32(15), IMM(4)); // sub R15, R15, #4 @@ -1200,7 +1200,7 @@ static void static_generate_memory_accessor(SH2 *sh2, int size, int iswrite, con UML_JMPc(block, IF_NZ, label); // if high bit is set, don't mask UML_CMP(block, IREG(0), IMM(0x40000000)); // cmp #0x40000000, r0 - UML_JMPc(block, IF_AE, label); // bae label + UML_JMPc(block, IF_AE, label); // bae label UML_AND(block, IREG(0), IREG(0), IMM(AM)); // and r0, r0, #AM (0xc7ffffff) @@ -1241,7 +1241,7 @@ static void static_generate_memory_accessor(SH2 *sh2, int size, int iswrite, con } } - UML_RET(block); // ret + UML_RET(block); // ret drcuml_block_end(block); } @@ -1453,13 +1453,13 @@ static void generate_update_cycles(SH2 *sh2, drcuml_block *block, compiler_state UML_LABEL(block, skip+2); // skip+2: UML_MOV(block, MEM(&sh2->evec), IMM(0xffffffff)); // mov evec, -1 UML_MOV(block, IREG(0), IMM(0xffffffff)); // mov r0, -1 (r0 = irq) - UML_AND(block, IREG(1), IREG(0), IMM(0xffff)); // and r1, r0, 0xffff + UML_AND(block, IREG(1), IREG(0), IMM(0xffff)); // and r1, r0, 0xffff UML_LZCNT(block, IREG(1), MEM(&sh2->pending_irq)); // lzcnt r1, pending_irq UML_CMP(block, IREG(1), IMM(32)); // cmp r1, #32 UML_JMPc(block, IF_Z, skip+4); // jz skip+4 - UML_SUB(block, MEM(&sh2->irqline), IMM(31), IREG(1)); // sub irqline, #31, r1 + UML_SUB(block, MEM(&sh2->irqline), IMM(31), IREG(1)); // sub irqline, #31, r1 UML_LABEL(block, skip+4); // skip+4: UML_CMP(block, MEM(&sh2->internal_irq_level), IMM(0xffffffff)); // cmp internal_irq_level, #-1 @@ -1476,19 +1476,19 @@ static void generate_update_cycles(SH2 *sh2, drcuml_block *block, compiler_state UML_LABEL(block, skip+1); // skip+1: UML_CMP(block, MEM(&sh2->evec), IMM(0xffffffff)); // cmp evec, 0xffffffff - UML_JMPc(block, IF_Z, skip); // jz skip + UML_JMPc(block, IF_Z, skip); // jz skip UML_SUB(block, R32(15), R32(15), IMM(4)); // sub R15, R15, #4 UML_MOV(block, IREG(0), R32(15)); // mov r0, R15 - UML_MOV(block, IREG(1), MEM(&sh2->irqsr)); // mov r1, irqsr + UML_MOV(block, IREG(1), MEM(&sh2->irqsr)); // mov r1, irqsr UML_CALLH(block, sh2->write32); // call write32 UML_SUB(block, R32(15), R32(15), IMM(4)); // sub R15, R15, #4 UML_MOV(block, IREG(0), R32(15)); // mov r0, R15 - UML_MOV(block, IREG(1), PARAM(ptype, pvalue)); // mov r1, nextpc + UML_MOV(block, IREG(1), PARAM(ptype, pvalue)); // mov r1, nextpc UML_CALLH(block, sh2->write32); // call write32 - UML_HASHJMP(block, IMM(0), MEM(&sh2->evec), sh2->nocode); // hashjmp sh2->evec + UML_HASHJMP(block, IMM(0), MEM(&sh2->evec), sh2->nocode); // hashjmp sh2->evec UML_LABEL(block, skip); // skip: } @@ -1679,7 +1679,7 @@ static int generate_opcode(SH2 *sh2, drcuml_block *block, compiler_state *compil case 0: return generate_group_0(sh2, block, compiler, desc, opcode, in_delay_slot); - case 1: // MOVLS4 + case 1: // MOVLS4 scratch = (opcode & 0x0f) * 4; UML_ADD(block, IREG(0), R32(Rn), IMM(scratch)); // add r0, Rn, scratch UML_MOV(block, IREG(1), R32(Rm)); // mov r1, Rm @@ -1697,7 +1697,7 @@ static int generate_opcode(SH2 *sh2, drcuml_block *block, compiler_state *compil case 4: return generate_group_4(sh2, block, compiler, desc, opcode, in_delay_slot); - case 5: // MOVLL4 + case 5: // MOVLL4 scratch = (opcode & 0x0f) * 4; UML_ADD(block, IREG(0), R32(Rm), IMM(scratch)); // add r0, Rm, scratch SETEA(0); // set ea for debug @@ -1711,7 +1711,7 @@ static int generate_opcode(SH2 *sh2, drcuml_block *block, compiler_state *compil case 6: return generate_group_6(sh2, block, compiler, desc, opcode, in_delay_slot); - case 7: // ADDI + case 7: // ADDI scratch = opcode & 0xff; scratch2 = (UINT32)(INT32)(INT16)(INT8)scratch; UML_ADD(block, R32(Rn), R32(Rn), IMM(scratch2)); // add Rn, Rn, scratch2 @@ -1720,7 +1720,7 @@ static int generate_opcode(SH2 *sh2, drcuml_block *block, compiler_state *compil case 8: return generate_group_8(sh2, block, compiler, desc, opcode, in_delay_slot); - case 9: // MOVWI + case 9: // MOVWI scratch = (desc->pc + 2) + ((opcode & 0xff) * 2) + 2; if (sh2->drcoptions & SH2DRC_STRICT_PCREL) @@ -1728,7 +1728,7 @@ static int generate_opcode(SH2 *sh2, drcuml_block *block, compiler_state *compil UML_MOV(block, IREG(0), IMM(scratch)); // mov r0, scratch SETEA(0); // set ea for debug UML_CALLH(block, sh2->read16); // read16(r0, r1) - UML_SEXT(block, R32(Rn), IREG(0), WORD); // sext Rn, r0, WORD + UML_SEXT(block, R32(Rn), IREG(0), WORD); // sext Rn, r0, WORD } else { @@ -1740,10 +1740,10 @@ static int generate_opcode(SH2 *sh2, drcuml_block *block, compiler_state *compil generate_update_cycles(sh2, block, compiler, IMM(desc->pc + 2), TRUE); return TRUE; - case 10: // BRA + case 10: // BRA generate_delay_slot(sh2, block, compiler, desc); - disp = ((INT32)opcode << 20) >> 20; + disp = ((INT32)opcode << 20) >> 20; sh2->ea = (desc->pc + 2) + disp * 2 + 2; // sh2->ea = pc+4 + disp*2 + 2 @@ -1751,14 +1751,14 @@ static int generate_opcode(SH2 *sh2, drcuml_block *block, compiler_state *compil UML_HASHJMP(block, IMM(0), IMM(sh2->ea), sh2->nocode); // hashjmp sh2->ea return TRUE; - case 11: // BSR + case 11: // BSR // panicstr @ 403da22 relies on the delay slot clobbering the PR set by a BSR, so // do this before running the delay slot UML_ADD(block, MEM(&sh2->pr), IMM(desc->pc), IMM(4)); // add sh2->pr, desc->pc, #4 (skip the current insn & delay slot) generate_delay_slot(sh2, block, compiler, desc); - disp = ((INT32)opcode << 20) >> 20; + disp = ((INT32)opcode << 20) >> 20; sh2->ea = (desc->pc + 2) + disp * 2 + 2; // sh2->ea = pc+4 + disp*2 + 2 generate_update_cycles(sh2, block, compiler, IMM(sh2->ea), TRUE); // <subtract cycles> @@ -1768,7 +1768,7 @@ static int generate_opcode(SH2 *sh2, drcuml_block *block, compiler_state *compil case 12: return generate_group_12(sh2, block, compiler, desc, opcode, in_delay_slot); - case 13: // MOVLI + case 13: // MOVLI scratch = ((desc->pc + 4) & ~3) + ((opcode & 0xff) * 4); if (sh2->drcoptions & SH2DRC_STRICT_PCREL) @@ -1787,13 +1787,13 @@ static int generate_opcode(SH2 *sh2, drcuml_block *block, compiler_state *compil generate_update_cycles(sh2, block, compiler, IMM(desc->pc + 2), TRUE); return TRUE; - case 14: // MOVI + case 14: // MOVI scratch = opcode & 0xff; scratch2 = (UINT32)(INT32)(INT16)(INT8)scratch; UML_MOV(block, R32(Rn), IMM(scratch2)); return TRUE; - case 15: // NOP + case 15: // NOP return TRUE; } @@ -1847,7 +1847,7 @@ static int generate_group_0(SH2 *sh2, drcuml_block *block, compiler_state *compi case 0x24: // MOVBS0(Rm, Rn); case 0x34: // MOVBS0(Rm, Rn); UML_ADD(block, IREG(0), R32(0), R32(Rn)); // add r0, R0, Rn - UML_AND(block, IREG(1), R32(Rm), IMM(0x000000ff)); // and r1, Rm, 0xff + UML_AND(block, IREG(1), R32(Rm), IMM(0x000000ff)); // and r1, Rm, 0xff UML_CALLH(block, sh2->write8); // call write8 if (!in_delay_slot) @@ -1979,21 +1979,21 @@ static int generate_group_0(SH2 *sh2, drcuml_block *block, compiler_state *compi UML_MOV(block, IREG(0), MEM(&sh2->evec)); // mov r0, evec UML_CMP(block, IREG(0), IMM(0xffffffff)); // cmp r0, 0xffffffff - UML_JMPc(block, IF_Z, compiler->labelnum); // jz skip + UML_JMPc(block, IF_Z, compiler->labelnum); // jz skip UML_SUB(block, R32(15), R32(15), IMM(4)); // sub R15, R15, #4 UML_MOV(block, IREG(0), R32(15)); // mov r0, R15 - UML_MOV(block, IREG(1), MEM(&sh2->irqsr)); // mov r1, irqsr + UML_MOV(block, IREG(1), MEM(&sh2->irqsr)); // mov r1, irqsr UML_CALLH(block, sh2->write32); // call write32 UML_SUB(block, R32(15), R32(15), IMM(4)); // sub R15, R15, #4 UML_MOV(block, IREG(0), R32(15)); // mov r0, R15 - UML_MOV(block, IREG(1), IMM(desc->pc+2)); // mov r1, nextpc + UML_MOV(block, IREG(1), IMM(desc->pc+2)); // mov r1, nextpc UML_CALLH(block, sh2->write32); // call write32 - UML_HASHJMP(block, IMM(0), MEM(&sh2->evec), sh2->nocode); // hashjmp sh2->evec + UML_HASHJMP(block, IMM(0), MEM(&sh2->evec), sh2->nocode); // hashjmp sh2->evec - UML_LABEL(block, compiler->labelnum++); // skip: + UML_LABEL(block, compiler->labelnum++); // skip: // now go "out of cycles" if (compiler->cycles > 0) @@ -2144,20 +2144,20 @@ static int generate_group_2(SH2 *sh2, drcuml_block *block, compiler_state *compi UML_TEST(block, R32(Rn), IMM(0x80000000)); // test Rn, #0x80000000 UML_JMPc(block, IF_Z, compiler->labelnum); // jz labelnum - UML_OR(block, IREG(0), IREG(0), IMM(Q)); // or r0, r0, Q + UML_OR(block, IREG(0), IREG(0), IMM(Q)); // or r0, r0, Q UML_LABEL(block, compiler->labelnum++); // labelnum: UML_TEST(block, R32(Rm), IMM(0x80000000)); // test Rm, #0x80000000 UML_JMPc(block, IF_Z, compiler->labelnum); // jz labelnum - UML_OR(block, IREG(0), IREG(0), IMM(M)); // or r0, r0, M + UML_OR(block, IREG(0), IREG(0), IMM(M)); // or r0, r0, M UML_LABEL(block, compiler->labelnum++); // labelnum: UML_XOR(block, IREG(1), R32(Rn), R32(Rm)); // xor r1, Rn, Rm UML_TEST(block, IREG(1), IMM(0x80000000)); // test r1, #0x80000000 UML_JMPc(block, IF_Z, compiler->labelnum); // jz labelnum - UML_OR(block, IREG(0), IREG(0), IMM(T)); // or r0, r0, T + UML_OR(block, IREG(0), IREG(0), IMM(T)); // or r0, r0, T UML_LABEL(block, compiler->labelnum++); // labelnum: UML_MOV(block, MEM(&sh2->sr), IREG(0)); // mov sr, r0 return TRUE; @@ -2165,10 +2165,10 @@ static int generate_group_2(SH2 *sh2, drcuml_block *block, compiler_state *compi case 8: // TST(Rm, Rn); UML_AND(block, IREG(0), MEM(&sh2->sr), IMM(~T)); // and r0, sr, ~T (clear the T bit) UML_TEST(block, R32(Rm), R32(Rn)); // test Rm, Rn - UML_JMPc(block, IF_NZ, compiler->labelnum); // jnz compiler->labelnum + UML_JMPc(block, IF_NZ, compiler->labelnum); // jnz compiler->labelnum UML_OR(block, IREG(0), IREG(0), IMM(T)); // or r0, r0, T - UML_LABEL(block, compiler->labelnum++); // desc->pc: + UML_LABEL(block, compiler->labelnum++); // desc->pc: UML_MOV(block, MEM(&sh2->sr), IREG(0)); // mov sh2->sr, r0 return TRUE; @@ -2398,7 +2398,7 @@ static int generate_group_4(SH2 *sh2, drcuml_block *block, compiler_state *compi UML_MOV(block, IREG(0), R32(Rn)); // mov r0, Rn SETEA(0); UML_CALLH(block, sh2->read32); // call read32 - UML_ADD(block, R32(Rn), R32(Rn), IMM(4)); // add Rn, #4 + UML_ADD(block, R32(Rn), R32(Rn), IMM(4)); // add Rn, #4 UML_MOV(block, MEM(&sh2->mach), IREG(0)); // mov mach, r0 if (!in_delay_slot) @@ -2409,7 +2409,7 @@ static int generate_group_4(SH2 *sh2, drcuml_block *block, compiler_state *compi UML_MOV(block, IREG(0), R32(Rn)); // mov r0, Rn SETEA(0); UML_CALLH(block, sh2->read32); // call read32 - UML_ADD(block, R32(Rn), R32(Rn), IMM(4)); // add Rn, #4 + UML_ADD(block, R32(Rn), R32(Rn), IMM(4)); // add Rn, #4 UML_MOV(block, MEM(&sh2->sr), IREG(0)); // mov sr, r0 compiler->checkints = TRUE; @@ -2480,10 +2480,10 @@ static int generate_group_4(SH2 *sh2, drcuml_block *block, compiler_state *compi { UML_AND(block, IREG(0), MEM(&sh2->sr), IMM(~T)); // and r0, sr, ~T (clear the T bit) UML_SUB(block, R32(Rn), R32(Rn), IMM(1)); // sub Rn, Rn, 1 - UML_JMPc(block, IF_NZ, compiler->labelnum); // jz compiler->labelnum + UML_JMPc(block, IF_NZ, compiler->labelnum); // jz compiler->labelnum UML_OR(block, IREG(0), IREG(0), IMM(T)); // or r0, r0, T - UML_LABEL(block, compiler->labelnum++); // desc->pc: + UML_LABEL(block, compiler->labelnum++); // desc->pc: UML_MOV(block, MEM(&sh2->sr), IREG(0)); // mov sh2->sr, r0 return TRUE; @@ -2497,7 +2497,7 @@ static int generate_group_4(SH2 *sh2, drcuml_block *block, compiler_state *compi UML_JMPc(block, IF_S, compiler->labelnum); // js compiler->labelnum (if negative) UML_OR(block, IREG(0), IREG(0), IMM(T)); // or r0, r0, T - UML_LABEL(block, compiler->labelnum++); // desc->pc: + UML_LABEL(block, compiler->labelnum++); // desc->pc: UML_MOV(block, MEM(&sh2->sr), IREG(0)); // mov sh2->sr, r0 return TRUE; @@ -2508,11 +2508,11 @@ static int generate_group_4(SH2 *sh2, drcuml_block *block, compiler_state *compi UML_CMP(block, R32(Rn), IMM(0)); // cmp Rn, 0 UML_JMPc(block, IF_S, compiler->labelnum); // js compiler->labelnum (if negative) - UML_JMPc(block, IF_Z, compiler->labelnum); // jz compiler->labelnum (if zero) + UML_JMPc(block, IF_Z, compiler->labelnum); // jz compiler->labelnum (if zero) UML_OR(block, IREG(0), IREG(0), IMM(T)); // or r0, r0, T - UML_LABEL(block, compiler->labelnum++); // desc->pc: + UML_LABEL(block, compiler->labelnum++); // desc->pc: UML_MOV(block, MEM(&sh2->sr), IREG(0)); // mov sh2->sr, r0 return TRUE; @@ -2542,7 +2542,7 @@ static int generate_group_4(SH2 *sh2, drcuml_block *block, compiler_state *compi UML_MOV(block, IREG(0), R32(Rn)); // mov r0, Rn SETEA(0); UML_CALLH(block, sh2->read32); // call read32 - UML_ADD(block, R32(Rn), R32(Rn), IMM(4)); // add Rn, #4 + UML_ADD(block, R32(Rn), R32(Rn), IMM(4)); // add Rn, #4 UML_MOV(block, MEM(&sh2->macl), IREG(0)); // mov macl, r0 if (!in_delay_slot) @@ -2553,7 +2553,7 @@ static int generate_group_4(SH2 *sh2, drcuml_block *block, compiler_state *compi UML_MOV(block, IREG(0), R32(Rn)); // mov r0, Rn SETEA(0); UML_CALLH(block, sh2->read32); // call read32 - UML_ADD(block, R32(Rn), R32(Rn), IMM(4)); // add Rn, #4 + UML_ADD(block, R32(Rn), R32(Rn), IMM(4)); // add Rn, #4 UML_MOV(block, MEM(&sh2->gbr), IREG(0)); // mov gbr, r0 if (!in_delay_slot) @@ -2621,7 +2621,7 @@ static int generate_group_4(SH2 *sh2, drcuml_block *block, compiler_state *compi UML_SUB(block, R32(Rn), R32(Rn), IMM(4)); // sub Rn, Rn, 4 UML_MOV(block, IREG(0), R32(Rn)); // mov r0, Rn SETEA(0); - UML_MOV(block, IREG(1), MEM(&sh2->vbr)); // mov r1, vbr + UML_MOV(block, IREG(1), MEM(&sh2->vbr)); // mov r1, vbr UML_CALLH(block, sh2->write32); // call write32 if (!in_delay_slot) @@ -2657,7 +2657,7 @@ static int generate_group_4(SH2 *sh2, drcuml_block *block, compiler_state *compi UML_MOV(block, IREG(0), R32(Rn)); // mov r0, Rn SETEA(0); UML_CALLH(block, sh2->read32); // call read32 - UML_MOV(block, MEM(&sh2->vbr), IREG(0)); // mov sh2->vbr, r0 + UML_MOV(block, MEM(&sh2->vbr), IREG(0)); // mov sh2->vbr, r0 UML_ADD(block, R32(Rn), R32(Rn), IMM(4)); // add Rn, Rn, #4 if (!in_delay_slot) @@ -2778,7 +2778,7 @@ static int generate_group_6(SH2 *sh2, drcuml_block *block, compiler_state *compi case 4: // MOVBP(Rm, Rn); UML_MOV(block, IREG(0), R32(Rm)); // mov r0, Rm UML_CALLH(block, sh2->read8); // call read8 - UML_SEXT(block, R32(Rn), IREG(0), BYTE); // sext Rn, r0, BYTE + UML_SEXT(block, R32(Rn), IREG(0), BYTE); // sext Rn, r0, BYTE if (Rm != Rn) UML_ADD(block, R32(Rm), R32(Rm), IMM(1)); // add Rm, Rm, #1 @@ -2790,7 +2790,7 @@ static int generate_group_6(SH2 *sh2, drcuml_block *block, compiler_state *compi case 5: // MOVWP(Rm, Rn); UML_MOV(block, IREG(0), R32(Rm)); // mov r0, Rm UML_CALLH(block, sh2->read16); // call read16 - UML_SEXT(block, R32(Rn), IREG(0), WORD); // sext Rn, r0, WORD + UML_SEXT(block, R32(Rn), IREG(0), WORD); // sext Rn, r0, WORD if (Rm != Rn) UML_ADD(block, R32(Rm), R32(Rm), IMM(2)); // add Rm, Rm, #2 @@ -2903,38 +2903,38 @@ static int generate_group_8(SH2 *sh2, drcuml_block *block, compiler_state *compi UML_SEXT(block, IREG(1), IMM(opcode&0xff), BYTE); // sext r1, opcode&0xff, BYTE UML_CMP(block, IREG(1), R32(0)); // cmp r1, R0 - UML_JMPc(block, IF_NZ, compiler->labelnum); // jnz compiler->labelnum (if negative) + UML_JMPc(block, IF_NZ, compiler->labelnum); // jnz compiler->labelnum (if negative) UML_OR(block, IREG(0), IREG(0), IMM(T)); // or r0, r0, T - UML_LABEL(block, compiler->labelnum++); // labelnum: + UML_LABEL(block, compiler->labelnum++); // labelnum: UML_MOV(block, MEM(&sh2->sr), IREG(0)); // mov sh2->sr, r0 return TRUE; case 9<< 8: // BT(opcode & 0xff); UML_TEST(block, MEM(&sh2->sr), IMM(T)); // test sh2->sr, T - UML_JMPc(block, IF_Z, compiler->labelnum); // jz compiler->labelnum + UML_JMPc(block, IF_Z, compiler->labelnum); // jz compiler->labelnum disp = ((INT32)opcode << 24) >> 24; - sh2->ea = (desc->pc + 2) + disp * 2 + 2; // sh2->ea = destination + sh2->ea = (desc->pc + 2) + disp * 2 + 2; // sh2->ea = destination generate_update_cycles(sh2, block, compiler, IMM(sh2->ea), TRUE); // <subtract cycles> UML_HASHJMP(block, IMM(0), IMM(sh2->ea), sh2->nocode); // jmp sh2->ea - UML_LABEL(block, compiler->labelnum++); // labelnum: + UML_LABEL(block, compiler->labelnum++); // labelnum: return TRUE; case 11<< 8: // BF(opcode & 0xff); UML_TEST(block, MEM(&sh2->sr), IMM(T)); // test sh2->sr, T - UML_JMPc(block, IF_NZ, compiler->labelnum); // jnz compiler->labelnum + UML_JMPc(block, IF_NZ, compiler->labelnum); // jnz compiler->labelnum disp = ((INT32)opcode << 24) >> 24; - sh2->ea = (desc->pc + 2) + disp * 2 + 2; // sh2->ea = destination + sh2->ea = (desc->pc + 2) + disp * 2 + 2; // sh2->ea = destination generate_update_cycles(sh2, block, compiler, IMM(sh2->ea), TRUE); // <subtract cycles> UML_HASHJMP(block, IMM(0), IMM(sh2->ea), sh2->nocode); // jmp sh2->ea - UML_LABEL(block, compiler->labelnum++); // labelnum: + UML_LABEL(block, compiler->labelnum++); // labelnum: return TRUE; case 13<< 8: // BTS(opcode & 0xff); @@ -2948,12 +2948,12 @@ static int generate_group_8(SH2 *sh2, drcuml_block *block, compiler_state *compi generate_delay_slot(sh2, block, compiler, desc); disp = ((INT32)opcode << 24) >> 24; - sh2->ea = (desc->pc + 2) + disp * 2 + 2; // sh2->ea = destination + sh2->ea = (desc->pc + 2) + disp * 2 + 2; // sh2->ea = destination generate_update_cycles(sh2, block, compiler, IMM(sh2->ea), TRUE); // <subtract cycles> UML_HASHJMP(block, IMM(0), IMM(sh2->ea), sh2->nocode); // jmp sh2->ea - UML_LABEL(block, templabel); // labelnum: + UML_LABEL(block, templabel); // labelnum: return TRUE; } break; @@ -2962,19 +2962,19 @@ static int generate_group_8(SH2 *sh2, drcuml_block *block, compiler_state *compi if (sh2->cpu_type > CPU_TYPE_SH1) { UML_TEST(block, MEM(&sh2->sr), IMM(T)); // test sh2->sr, T - UML_JMPc(block, IF_NZ, compiler->labelnum); // jnz compiler->labelnum + UML_JMPc(block, IF_NZ, compiler->labelnum); // jnz compiler->labelnum templabel = compiler->labelnum; // save our label compiler->labelnum++; // make sure the delay slot doesn't use it generate_delay_slot(sh2, block, compiler, desc); // delay slot only if the branch is taken disp = ((INT32)opcode << 24) >> 24; - sh2->ea = (desc->pc + 2) + disp * 2 + 2; // sh2->ea = destination + sh2->ea = (desc->pc + 2) + disp * 2 + 2; // sh2->ea = destination generate_update_cycles(sh2, block, compiler, IMM(sh2->ea), TRUE); // <subtract cycles> UML_HASHJMP(block, IMM(0), IMM(sh2->ea), sh2->nocode); // jmp sh2->ea - UML_LABEL(block, templabel); // labelnum: + UML_LABEL(block, templabel); // labelnum: return TRUE; } break; @@ -3030,7 +3030,7 @@ static int generate_group_12(SH2 *sh2, drcuml_block *block, compiler_state *comp UML_SUB(block, R32(15), R32(15), IMM(4)); // sub R15, R15, #4 UML_MOV(block, IREG(0), R32(15)); // mov r0, R15 - UML_MOV(block, IREG(1), IMM(desc->pc+2)); // mov r1, pc+2 + UML_MOV(block, IREG(1), IMM(desc->pc+2)); // mov r1, pc+2 UML_CALLH(block, sh2->write32); // write32 UML_MOV(block, IREG(0), MEM(&sh2->ea)); // mov r0, ea @@ -3229,12 +3229,12 @@ static CPU_SET_INFO( sh2 ) case CPUINFO_INT_REGISTER + SH2_PC: case CPUINFO_INT_PC: sh2->pc = info->i; sh2->delay = 0; break; - case CPUINFO_INT_SP: sh2->r[15] = info->i; break; - case CPUINFO_INT_REGISTER + SH2_PR: sh2->pr = info->i; break; - case CPUINFO_INT_REGISTER + SH2_SR: sh2->sr = info->i; break; + case CPUINFO_INT_SP: sh2->r[15] = info->i; break; + case CPUINFO_INT_REGISTER + SH2_PR: sh2->pr = info->i; break; + case CPUINFO_INT_REGISTER + SH2_SR: sh2->sr = info->i; break; case CPUINFO_INT_REGISTER + SH2_GBR: sh2->gbr = info->i; break; case CPUINFO_INT_REGISTER + SH2_VBR: sh2->vbr = info->i; break; - case CPUINFO_INT_REGISTER + SH2_MACH: sh2->mach = info->i; break; + case CPUINFO_INT_REGISTER + SH2_MACH: sh2->mach = info->i; break; case CPUINFO_INT_REGISTER + SH2_MACL: sh2->macl = info->i; break; case CPUINFO_INT_REGISTER + SH2_R0: sh2->r[ 0] = info->i; break; case CPUINFO_INT_REGISTER + SH2_R1: sh2->r[ 1] = info->i; break; @@ -3282,11 +3282,11 @@ CPU_GET_INFO( sh2 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; // Internal maps case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(sh2_internal_map); break; @@ -3316,7 +3316,7 @@ CPU_GET_INFO( sh2 ) case CPUINFO_INT_PC: case CPUINFO_INT_REGISTER + SH2_PC: info->i = (sh2->delay) ? (sh2->delay & AM) : (sh2->pc & AM); break; - case CPUINFO_INT_SP: info->i = sh2->r[15]; break; + case CPUINFO_INT_SP: info->i = sh2->r[15]; break; case CPUINFO_INT_REGISTER + SH2_PR: info->i = sh2->pr; break; case CPUINFO_INT_REGISTER + SH2_SR: info->i = sh2->sr; break; case CPUINFO_INT_REGISTER + SH2_GBR: info->i = sh2->gbr; break; diff --git a/src/emu/cpu/sh2/sh2fe.c b/src/emu/cpu/sh2/sh2fe.c index 5d83a877b28..043340bb63c 100644 --- a/src/emu/cpu/sh2/sh2fe.c +++ b/src/emu/cpu/sh2/sh2fe.c @@ -54,7 +54,7 @@ int sh2_describe(void *param, opcode_desc *desc, const opcode_desc *prev) case 0: return describe_group_0(context, desc, prev, opcode); - case 1: // MOVLS4 + case 1: // MOVLS4 desc->regin[0] |= REGFLAG_R(Rn) | REGFLAG_R(Rm); desc->flags |= OPFLAG_WRITES_MEMORY; return TRUE; @@ -68,7 +68,7 @@ int sh2_describe(void *param, opcode_desc *desc, const opcode_desc *prev) case 4: return describe_group_4(context, desc, prev, opcode); - case 5: // MOVLL4 + case 5: // MOVLL4 desc->regin[0] |= REGFLAG_R(Rm); desc->regout[0] |= REGFLAG_R(Rn); desc->flags |= OPFLAG_READS_MEMORY; @@ -77,7 +77,7 @@ int sh2_describe(void *param, opcode_desc *desc, const opcode_desc *prev) case 6: return describe_group_6(context, desc, prev, opcode); - case 7: // ADDI + case 7: // ADDI desc->regin[0] |= REGFLAG_R(Rn); desc->regout[0] |= REGFLAG_R(Rn); return TRUE; @@ -85,15 +85,15 @@ int sh2_describe(void *param, opcode_desc *desc, const opcode_desc *prev) case 8: return describe_group_8(context, desc, prev, opcode); - case 9: // MOVWI + case 9: // MOVWI desc->regout[0] |= REGFLAG_R(Rn); desc->flags |= OPFLAG_READS_MEMORY; return TRUE; - case 11: // BSR + case 11: // BSR desc->regout[1] |= REGFLAG_PR; // (intentional fallthrough - BSR is BRA with the addition of PR = the return address) - case 10: // BRA + case 10: // BRA { INT32 disp = ((INT32)opcode << 20) >> 20; @@ -107,16 +107,16 @@ int sh2_describe(void *param, opcode_desc *desc, const opcode_desc *prev) case 12: return describe_group_12(context, desc, prev, opcode); - case 13: // MOVLI + case 13: // MOVLI desc->regout[0] |= REGFLAG_R(Rn); desc->flags |= OPFLAG_READS_MEMORY; return TRUE; - case 14: // MOVI + case 14: // MOVI desc->regout[0] |= REGFLAG_R(Rn); return TRUE; - case 15: // NOP + case 15: // NOP return TRUE; } diff --git a/src/emu/cpu/sh4/sh4.c b/src/emu/cpu/sh4/sh4.c index 09082ccf423..6f35f6dc792 100644 --- a/src/emu/cpu/sh4/sh4.c +++ b/src/emu/cpu/sh4/sh4.c @@ -2270,20 +2270,20 @@ INLINE void op0010(SH4 *sh4, UINT16 opcode) { switch (opcode & 15) { - case 0: MOVBS(sh4, Rm, Rn); break; - case 1: MOVWS(sh4, Rm, Rn); break; - case 2: MOVLS(sh4, Rm, Rn); break; - case 3: NOP(sh4); break; - case 4: MOVBM(sh4, Rm, Rn); break; - case 5: MOVWM(sh4, Rm, Rn); break; - case 6: MOVLM(sh4, Rm, Rn); break; - case 7: DIV0S(sh4, Rm, Rn); break; + case 0: MOVBS(sh4, Rm, Rn); break; + case 1: MOVWS(sh4, Rm, Rn); break; + case 2: MOVLS(sh4, Rm, Rn); break; + case 3: NOP(sh4); break; + case 4: MOVBM(sh4, Rm, Rn); break; + case 5: MOVWM(sh4, Rm, Rn); break; + case 6: MOVLM(sh4, Rm, Rn); break; + case 7: DIV0S(sh4, Rm, Rn); break; case 8: TST(sh4, Rm, Rn); break; case 9: AND(sh4, Rm, Rn); break; case 10: XOR(sh4, Rm, Rn); break; case 11: OR(sh4, Rm, Rn); break; case 12: CMPSTR(sh4, Rm, Rn); break; - case 13: XTRCT(sh4, Rm, Rn); break; + case 13: XTRCT(sh4, Rm, Rn); break; case 14: MULU(sh4, Rm, Rn); break; case 15: MULS(sh4, Rm, Rn); break; } @@ -2293,20 +2293,20 @@ INLINE void op0011(SH4 *sh4, UINT16 opcode) { switch (opcode & 15) { - case 0: CMPEQ(sh4, Rm, Rn); break; - case 1: NOP(sh4); break; - case 2: CMPHS(sh4, Rm, Rn); break; - case 3: CMPGE(sh4, Rm, Rn); break; + case 0: CMPEQ(sh4, Rm, Rn); break; + case 1: NOP(sh4); break; + case 2: CMPHS(sh4, Rm, Rn); break; + case 3: CMPGE(sh4, Rm, Rn); break; case 4: DIV1(sh4, Rm, Rn); break; - case 5: DMULU(sh4, Rm, Rn); break; - case 6: CMPHI(sh4, Rm, Rn); break; - case 7: CMPGT(sh4, Rm, Rn); break; + case 5: DMULU(sh4, Rm, Rn); break; + case 6: CMPHI(sh4, Rm, Rn); break; + case 7: CMPGT(sh4, Rm, Rn); break; case 8: SUB(sh4, Rm, Rn); break; - case 9: NOP(sh4); break; + case 9: NOP(sh4); break; case 10: SUBC(sh4, Rm, Rn); break; case 11: SUBV(sh4, Rm, Rn); break; case 12: ADD(sh4, Rm, Rn); break; - case 13: DMULS(sh4, Rm, Rn); break; + case 13: DMULS(sh4, Rm, Rn); break; case 14: ADDC(sh4, Rm, Rn); break; case 15: ADDV(sh4, Rm, Rn); break; } @@ -2516,22 +2516,22 @@ INLINE void op0110(SH4 *sh4, UINT16 opcode) { switch (opcode & 15) { - case 0: MOVBL(sh4, Rm, Rn); break; - case 1: MOVWL(sh4, Rm, Rn); break; - case 2: MOVLL(sh4, Rm, Rn); break; + case 0: MOVBL(sh4, Rm, Rn); break; + case 1: MOVWL(sh4, Rm, Rn); break; + case 2: MOVLL(sh4, Rm, Rn); break; case 3: MOV(sh4, Rm, Rn); break; - case 4: MOVBP(sh4, Rm, Rn); break; - case 5: MOVWP(sh4, Rm, Rn); break; - case 6: MOVLP(sh4, Rm, Rn); break; + case 4: MOVBP(sh4, Rm, Rn); break; + case 5: MOVWP(sh4, Rm, Rn); break; + case 6: MOVLP(sh4, Rm, Rn); break; case 7: NOT(sh4, Rm, Rn); break; - case 8: SWAPB(sh4, Rm, Rn); break; - case 9: SWAPW(sh4, Rm, Rn); break; + case 8: SWAPB(sh4, Rm, Rn); break; + case 9: SWAPW(sh4, Rm, Rn); break; case 10: NEGC(sh4, Rm, Rn); break; case 11: NEG(sh4, Rm, Rn); break; - case 12: EXTUB(sh4, Rm, Rn); break; - case 13: EXTUW(sh4, Rm, Rn); break; - case 14: EXTSB(sh4, Rm, Rn); break; - case 15: EXTSW(sh4, Rm, Rn); break; + case 12: EXTUB(sh4, Rm, Rn); break; + case 13: EXTUW(sh4, Rm, Rn); break; + case 14: EXTSB(sh4, Rm, Rn); break; + case 15: EXTSW(sh4, Rm, Rn); break; } } @@ -2544,21 +2544,21 @@ INLINE void op1000(SH4 *sh4, UINT16 opcode) { switch ( opcode & (15<<8) ) { - case 0 << 8: MOVBS4(sh4, opcode & 0x0f, Rm); break; - case 1 << 8: MOVWS4(sh4, opcode & 0x0f, Rm); break; - case 2<< 8: NOP(sh4); break; - case 3<< 8: NOP(sh4); break; - case 4<< 8: MOVBL4(sh4, Rm, opcode & 0x0f); break; - case 5<< 8: MOVWL4(sh4, Rm, opcode & 0x0f); break; - case 6<< 8: NOP(sh4); break; - case 7<< 8: NOP(sh4); break; + case 0 << 8: MOVBS4(sh4, opcode & 0x0f, Rm); break; + case 1 << 8: MOVWS4(sh4, opcode & 0x0f, Rm); break; + case 2<< 8: NOP(sh4); break; + case 3<< 8: NOP(sh4); break; + case 4<< 8: MOVBL4(sh4, Rm, opcode & 0x0f); break; + case 5<< 8: MOVWL4(sh4, Rm, opcode & 0x0f); break; + case 6<< 8: NOP(sh4); break; + case 7<< 8: NOP(sh4); break; case 8<< 8: CMPIM(sh4, opcode & 0xff); break; - case 9<< 8: BT(sh4, opcode & 0xff); break; - case 10<< 8: NOP(sh4); break; - case 11<< 8: BF(sh4, opcode & 0xff); break; - case 12<< 8: NOP(sh4); break; + case 9<< 8: BT(sh4, opcode & 0xff); break; + case 10<< 8: NOP(sh4); break; + case 11<< 8: BF(sh4, opcode & 0xff); break; + case 12<< 8: NOP(sh4); break; case 13<< 8: BTS(sh4, opcode & 0xff); break; - case 14<< 8: NOP(sh4); break; + case 14<< 8: NOP(sh4); break; case 15<< 8: BFS(sh4, opcode & 0xff); break; } } @@ -3486,8 +3486,8 @@ static CPU_SET_INFO( sh4 ) case CPUINFO_INT_REGISTER + SH4_PC: case CPUINFO_INT_PC: sh4->pc = info->i; sh4->delay = 0; break; - case CPUINFO_INT_SP: sh4->r[15] = info->i; break; - case CPUINFO_INT_REGISTER + SH4_PR: sh4->pr = info->i; break; + case CPUINFO_INT_SP: sh4->r[15] = info->i; break; + case CPUINFO_INT_REGISTER + SH4_PR: sh4->pr = info->i; break; case CPUINFO_INT_REGISTER + SH4_SR: sh4->sr = info->i; sh4_exception_recompute(sh4); @@ -3496,7 +3496,7 @@ static CPU_SET_INFO( sh4 ) case CPUINFO_INT_REGISTER + SH4_GBR: sh4->gbr = info->i; break; case CPUINFO_INT_REGISTER + SH4_VBR: sh4->vbr = info->i; break; case CPUINFO_INT_REGISTER + SH4_DBR: sh4->dbr = info->i; break; - case CPUINFO_INT_REGISTER + SH4_MACH: sh4->mach = info->i; break; + case CPUINFO_INT_REGISTER + SH4_MACH: sh4->mach = info->i; break; case CPUINFO_INT_REGISTER + SH4_MACL: sh4->macl = info->i; break; case CPUINFO_INT_REGISTER + SH4_R0: sh4->r[ 0] = info->i; break; case CPUINFO_INT_REGISTER + SH4_R1: sh4->r[ 1] = info->i; break; @@ -3694,11 +3694,11 @@ CPU_GET_INFO( sh4 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 64; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 8; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_PTR_INTERNAL_MEMORY_MAP_PROGRAM: info->internal_map64 = ADDRESS_MAP_NAME(sh4_internal_map); break; @@ -3712,7 +3712,7 @@ CPU_GET_INFO( sh4 ) case CPUINFO_INT_PC: case CPUINFO_INT_REGISTER + SH4_PC: info->i = (sh4->delay) ? (sh4->delay & AM) : (sh4->pc & AM); break; - case CPUINFO_INT_SP: info->i = sh4->r[15]; break; + case CPUINFO_INT_SP: info->i = sh4->r[15]; break; case CPUINFO_INT_REGISTER + SH4_PR: info->i = sh4->pr; break; case CPUINFO_INT_REGISTER + SH4_SR: info->i = sh4->sr; break; case CPUINFO_INT_REGISTER + SH4_GBR: info->i = sh4->gbr; break; diff --git a/src/emu/cpu/sh4/sh4regs.h b/src/emu/cpu/sh4/sh4regs.h index 874648e4bd0..44738289a45 100644 --- a/src/emu/cpu/sh4/sh4regs.h +++ b/src/emu/cpu/sh4/sh4regs.h @@ -4,156 +4,156 @@ #define __SH4REGS_H__ /* 00000001111111100000000011111100 */ -#define PTEH 0x2000 /* FF000000 */ -#define PTEL 0x2001 /* FF000004 */ -#define TTB 0x2002 /* FF000008 */ -#define TEA 0x2003 /* FF00000C */ -#define MMUCR 0x2004 /* FF000010 */ -#define BASRA 0x2005 /* FF000014 */ -#define BASRB 0x2006 /* FF000018 */ -#define CCR 0x2007 /* FF00001C */ -#define TRA 0x2008 /* FF000020 */ -#define EXPEVT 0x2009 /* FF000024 */ -#define INTEVT 0x200A /* FF000028 */ -#define PTEA 0x200D /* FF000034 */ -#define QACR0 0x200E /* FF000038 */ -#define QACR1 0x200F /* FF00003C */ -#define BARA 0x2400 /* FF200000 */ -#define BAMRA 0x2401 /* FF200004 */ -#define BBRA 0x2402 /* FF200008 */ -#define BARB 0x2403 /* FF20000C */ -#define BAMRB 0x2404 /* FF200010 */ -#define BBRB 0x2405 /* FF200014 */ -#define BDRB 0x2406 /* FF200018 */ -#define BDMRB 0x2407 /* FF20001C */ -#define BRCR 0x2408 /* FF200020 */ -#define BCR1 0x3000 /* FF800000 */ -#define BCR2 0x3001 /* FF800004 */ -#define BCR3 0x3014 /* FF800050 */ -#define BCR4 0x17C /* FE0A00F0 */ -#define WCR1 0x3002 /* FF800008 */ -#define WCR2 0x3003 /* FF80000C */ -#define WCR3 0x3004 /* FF800010 */ -#define MCR 0x3005 /* FF800014 */ -#define PCR 0x3006 /* FF800018 */ -#define RTCSR 0x3007 /* FF80001C */ -#define RTCNT 0x3008 /* FF800020 */ -#define RTCOR 0x3009 /* FF800024 */ -#define RFCR 0x300A /* FF800028 */ -#define PCTRA 0x300B /* FF80002C */ -#define PDTRA 0x300C /* FF800030 */ -#define PCTRB 0x3010 /* FF800040 */ -#define PDTRB 0x3011 /* FF800044 */ -#define GPIOIC 0x3012 /* FF800048 */ -#define SDMR2 0x3200 /* FF900000 */ -#define SDMR3 0x3280 /* FF940000 */ -#define SAR0 0x3400 /* FFA00000 */ -#define DAR0 0x3401 /* FFA00004 */ -#define DMATCR0 0x3402 /* FFA00008 */ -#define CHCR0 0x3403 /* FFA0000C */ -#define SAR1 0x3404 /* FFA00010 */ -#define DAR1 0x3405 /* FFA00014 */ -#define DMATCR1 0x3406 /* FFA00018 */ -#define CHCR1 0x3407 /* FFA0001C */ -#define SAR2 0x3408 /* FFA00020 */ -#define DAR2 0x3409 /* FFA00024 */ -#define DMATCR2 0x340A /* FFA00028 */ -#define CHCR2 0x340B /* FFA0002C */ -#define SAR3 0x340C /* FFA00030 */ -#define DAR3 0x340D /* FFA00034 */ -#define DMATCR3 0x340E /* FFA00038 */ -#define CHCR3 0x340F /* FFA0003C */ -#define DMAOR 0x3410 /* FFA00040 */ -#define SAR4 0x3414 /* FFA00050 */ -#define DAR4 0x3415 /* FFA00054 */ -#define DMATCR4 0x3416 /* FFA00058 */ -#define CHCR4 0x3417 /* FFA0005C */ -#define SAR5 0x3418 /* FFA00060 */ -#define DAR5 0x3419 /* FFA00064 */ -#define DMATCR5 0x341A /* FFA00068 */ -#define CHCR5 0x341B /* FFA0006C */ -#define SAR6 0x341C /* FFA00070 */ -#define DAR6 0x341D /* FFA00074 */ -#define DMATCR6 0x341E /* FFA00078 */ -#define CHCR6 0x341F /* FFA0007C */ -#define SAR7 0x3420 /* FFA00080 */ -#define DAR7 0x3421 /* FFA00084 */ -#define DMATCR7 0x3422 /* FFA00088 */ -#define CHCR7 0x3423 /* FFA0008C */ -#define FRQCR 0x3800 /* FFC00000 */ -#define STBCR 0x3801 /* FFC00004 */ -#define WTCNT 0x3802 /* FFC00008 */ -#define WTCSR 0x3803 /* FFC0000C */ -#define STBCR2 0x3804 /* FFC00010 */ -#define R64CNT 0x3900 /* FFC80000 */ -#define RSECCNT 0x3901 /* FFC80004 */ -#define RMINCNT 0x3902 /* FFC80008 */ -#define RHRCNT 0x3903 /* FFC8000C */ -#define RWKCNT 0x3904 /* FFC80010 */ -#define RDAYCNT 0x3905 /* FFC80014 */ -#define RMONCNT 0x3906 /* FFC80018 */ -#define RYRCNT 0x3907 /* FFC8001C */ -#define RSECAR 0x3908 /* FFC80020 */ -#define RMINAR 0x3909 /* FFC80024 */ -#define RHRAR 0x390A /* FFC80028 */ -#define RWKAR 0x390B /* FFC8002C */ -#define RDAYAR 0x390C /* FFC80030 */ -#define RMONAR 0x390D /* FFC80034 */ -#define RCR1 0x390E /* FFC80038 */ -#define RCR2 0x390F /* FFC8003C */ -#define RCR3 0x3914 /* FFC80050 */ -#define RYRAR 0x3915 /* FFC80054 */ -#define ICR 0x3A00 /* FFD00000 */ -#define IPRA 0x3A01 /* FFD00004 */ -#define IPRB 0x3A02 /* FFD00008 */ -#define IPRC 0x3A03 /* FFD0000C */ -#define IPRD 0x3A04 /* FFD00010 */ -#define INTPRI00 0x100 /* FE080000 */ -#define INTREQ00 0x108 /* FE080020 */ -#define INTMSK00 0x110 /* FE080040 */ -#define INTMSKCLR00 0x118 /* FE080060 */ -#define CLKSTP00 0x140 /* FE0A0000 */ -#define CLKSTPCLR00 0x142 /* FE0A0008 */ -#define TSTR2 0x201 /* FE100004 */ -#define TCOR3 0x202 /* FE100008 */ -#define TCNT3 0x203 /* FE10000C */ -#define TCR3 0x204 /* FE100010 */ -#define TCOR4 0x205 /* FE100014 */ -#define TCNT4 0x206 /* FE100018 */ -#define TCR4 0x207 /* FE10001C */ -#define TOCR 0x3B00 /* FFD80000 */ -#define TSTR 0x3B01 /* FFD80004 */ -#define TCOR0 0x3B02 /* FFD80008 */ -#define TCNT0 0x3B03 /* FFD8000C */ -#define TCR0 0x3B04 /* FFD80010 */ -#define TCOR1 0x3B05 /* FFD80014 */ -#define TCNT1 0x3B06 /* FFD80018 */ -#define TCR1 0x3B07 /* FFD8001C */ -#define TCOR2 0x3B08 /* FFD80020 */ -#define TCNT2 0x3B09 /* FFD80024 */ -#define TCR2 0x3B0A /* FFD80028 */ -#define TCPR2 0x3B0B /* FFD8002C */ -#define SCSMR1 0x3C00 /* FFE00000 */ -#define SCBRR1 0x3C01 /* FFE00004 */ -#define SCSCR1 0x3C02 /* FFE00008 */ -#define SCTDR1 0x3C03 /* FFE0000C */ -#define SCSSR1 0x3C04 /* FFE00010 */ -#define SCRDR1 0x3C05 /* FFE00014 */ -#define SCSCMR1 0x3C06 /* FFE00018 */ -#define SCSPTR1 0x3C07 /* FFE0001C */ -#define SCSMR2 0x3D00 /* FFE80000 */ -#define SCBRR2 0x3D01 /* FFE80004 */ -#define SCSCR2 0x3D02 /* FFE80008 */ -#define SCFTDR2 0x3D03 /* FFE8000C */ -#define SCFSR2 0x3D04 /* FFE80010 */ -#define SCFRDR2 0x3D05 /* FFE80014 */ -#define SCFCR2 0x3D06 /* FFE80018 */ -#define SCFDR2 0x3D07 /* FFE8001C */ -#define SCSPTR2 0x3D08 /* FFE80020 */ -#define SCLSR2 0x3D09 /* FFE80024 */ -#define SDIR 0x3E00 /* FFF00000 */ -#define SDDR 0x3E02 /* FFF00008 */ -#define SDINT 0x3E05 /* FFF00014 */ +#define PTEH 0x2000 /* FF000000 */ +#define PTEL 0x2001 /* FF000004 */ +#define TTB 0x2002 /* FF000008 */ +#define TEA 0x2003 /* FF00000C */ +#define MMUCR 0x2004 /* FF000010 */ +#define BASRA 0x2005 /* FF000014 */ +#define BASRB 0x2006 /* FF000018 */ +#define CCR 0x2007 /* FF00001C */ +#define TRA 0x2008 /* FF000020 */ +#define EXPEVT 0x2009 /* FF000024 */ +#define INTEVT 0x200A /* FF000028 */ +#define PTEA 0x200D /* FF000034 */ +#define QACR0 0x200E /* FF000038 */ +#define QACR1 0x200F /* FF00003C */ +#define BARA 0x2400 /* FF200000 */ +#define BAMRA 0x2401 /* FF200004 */ +#define BBRA 0x2402 /* FF200008 */ +#define BARB 0x2403 /* FF20000C */ +#define BAMRB 0x2404 /* FF200010 */ +#define BBRB 0x2405 /* FF200014 */ +#define BDRB 0x2406 /* FF200018 */ +#define BDMRB 0x2407 /* FF20001C */ +#define BRCR 0x2408 /* FF200020 */ +#define BCR1 0x3000 /* FF800000 */ +#define BCR2 0x3001 /* FF800004 */ +#define BCR3 0x3014 /* FF800050 */ +#define BCR4 0x17C /* FE0A00F0 */ +#define WCR1 0x3002 /* FF800008 */ +#define WCR2 0x3003 /* FF80000C */ +#define WCR3 0x3004 /* FF800010 */ +#define MCR 0x3005 /* FF800014 */ +#define PCR 0x3006 /* FF800018 */ +#define RTCSR 0x3007 /* FF80001C */ +#define RTCNT 0x3008 /* FF800020 */ +#define RTCOR 0x3009 /* FF800024 */ +#define RFCR 0x300A /* FF800028 */ +#define PCTRA 0x300B /* FF80002C */ +#define PDTRA 0x300C /* FF800030 */ +#define PCTRB 0x3010 /* FF800040 */ +#define PDTRB 0x3011 /* FF800044 */ +#define GPIOIC 0x3012 /* FF800048 */ +#define SDMR2 0x3200 /* FF900000 */ +#define SDMR3 0x3280 /* FF940000 */ +#define SAR0 0x3400 /* FFA00000 */ +#define DAR0 0x3401 /* FFA00004 */ +#define DMATCR0 0x3402 /* FFA00008 */ +#define CHCR0 0x3403 /* FFA0000C */ +#define SAR1 0x3404 /* FFA00010 */ +#define DAR1 0x3405 /* FFA00014 */ +#define DMATCR1 0x3406 /* FFA00018 */ +#define CHCR1 0x3407 /* FFA0001C */ +#define SAR2 0x3408 /* FFA00020 */ +#define DAR2 0x3409 /* FFA00024 */ +#define DMATCR2 0x340A /* FFA00028 */ +#define CHCR2 0x340B /* FFA0002C */ +#define SAR3 0x340C /* FFA00030 */ +#define DAR3 0x340D /* FFA00034 */ +#define DMATCR3 0x340E /* FFA00038 */ +#define CHCR3 0x340F /* FFA0003C */ +#define DMAOR 0x3410 /* FFA00040 */ +#define SAR4 0x3414 /* FFA00050 */ +#define DAR4 0x3415 /* FFA00054 */ +#define DMATCR4 0x3416 /* FFA00058 */ +#define CHCR4 0x3417 /* FFA0005C */ +#define SAR5 0x3418 /* FFA00060 */ +#define DAR5 0x3419 /* FFA00064 */ +#define DMATCR5 0x341A /* FFA00068 */ +#define CHCR5 0x341B /* FFA0006C */ +#define SAR6 0x341C /* FFA00070 */ +#define DAR6 0x341D /* FFA00074 */ +#define DMATCR6 0x341E /* FFA00078 */ +#define CHCR6 0x341F /* FFA0007C */ +#define SAR7 0x3420 /* FFA00080 */ +#define DAR7 0x3421 /* FFA00084 */ +#define DMATCR7 0x3422 /* FFA00088 */ +#define CHCR7 0x3423 /* FFA0008C */ +#define FRQCR 0x3800 /* FFC00000 */ +#define STBCR 0x3801 /* FFC00004 */ +#define WTCNT 0x3802 /* FFC00008 */ +#define WTCSR 0x3803 /* FFC0000C */ +#define STBCR2 0x3804 /* FFC00010 */ +#define R64CNT 0x3900 /* FFC80000 */ +#define RSECCNT 0x3901 /* FFC80004 */ +#define RMINCNT 0x3902 /* FFC80008 */ +#define RHRCNT 0x3903 /* FFC8000C */ +#define RWKCNT 0x3904 /* FFC80010 */ +#define RDAYCNT 0x3905 /* FFC80014 */ +#define RMONCNT 0x3906 /* FFC80018 */ +#define RYRCNT 0x3907 /* FFC8001C */ +#define RSECAR 0x3908 /* FFC80020 */ +#define RMINAR 0x3909 /* FFC80024 */ +#define RHRAR 0x390A /* FFC80028 */ +#define RWKAR 0x390B /* FFC8002C */ +#define RDAYAR 0x390C /* FFC80030 */ +#define RMONAR 0x390D /* FFC80034 */ +#define RCR1 0x390E /* FFC80038 */ +#define RCR2 0x390F /* FFC8003C */ +#define RCR3 0x3914 /* FFC80050 */ +#define RYRAR 0x3915 /* FFC80054 */ +#define ICR 0x3A00 /* FFD00000 */ +#define IPRA 0x3A01 /* FFD00004 */ +#define IPRB 0x3A02 /* FFD00008 */ +#define IPRC 0x3A03 /* FFD0000C */ +#define IPRD 0x3A04 /* FFD00010 */ +#define INTPRI00 0x100 /* FE080000 */ +#define INTREQ00 0x108 /* FE080020 */ +#define INTMSK00 0x110 /* FE080040 */ +#define INTMSKCLR00 0x118 /* FE080060 */ +#define CLKSTP00 0x140 /* FE0A0000 */ +#define CLKSTPCLR00 0x142 /* FE0A0008 */ +#define TSTR2 0x201 /* FE100004 */ +#define TCOR3 0x202 /* FE100008 */ +#define TCNT3 0x203 /* FE10000C */ +#define TCR3 0x204 /* FE100010 */ +#define TCOR4 0x205 /* FE100014 */ +#define TCNT4 0x206 /* FE100018 */ +#define TCR4 0x207 /* FE10001C */ +#define TOCR 0x3B00 /* FFD80000 */ +#define TSTR 0x3B01 /* FFD80004 */ +#define TCOR0 0x3B02 /* FFD80008 */ +#define TCNT0 0x3B03 /* FFD8000C */ +#define TCR0 0x3B04 /* FFD80010 */ +#define TCOR1 0x3B05 /* FFD80014 */ +#define TCNT1 0x3B06 /* FFD80018 */ +#define TCR1 0x3B07 /* FFD8001C */ +#define TCOR2 0x3B08 /* FFD80020 */ +#define TCNT2 0x3B09 /* FFD80024 */ +#define TCR2 0x3B0A /* FFD80028 */ +#define TCPR2 0x3B0B /* FFD8002C */ +#define SCSMR1 0x3C00 /* FFE00000 */ +#define SCBRR1 0x3C01 /* FFE00004 */ +#define SCSCR1 0x3C02 /* FFE00008 */ +#define SCTDR1 0x3C03 /* FFE0000C */ +#define SCSSR1 0x3C04 /* FFE00010 */ +#define SCRDR1 0x3C05 /* FFE00014 */ +#define SCSCMR1 0x3C06 /* FFE00018 */ +#define SCSPTR1 0x3C07 /* FFE0001C */ +#define SCSMR2 0x3D00 /* FFE80000 */ +#define SCBRR2 0x3D01 /* FFE80004 */ +#define SCSCR2 0x3D02 /* FFE80008 */ +#define SCFTDR2 0x3D03 /* FFE8000C */ +#define SCFSR2 0x3D04 /* FFE80010 */ +#define SCFRDR2 0x3D05 /* FFE80014 */ +#define SCFCR2 0x3D06 /* FFE80018 */ +#define SCFDR2 0x3D07 /* FFE8001C */ +#define SCSPTR2 0x3D08 /* FFE80020 */ +#define SCLSR2 0x3D09 /* FFE80024 */ +#define SDIR 0x3E00 /* FFF00000 */ +#define SDDR 0x3E02 /* FFF00008 */ +#define SDINT 0x3E05 /* FFF00014 */ #define SIZEREGS 15878 #endif /* __SH4REGS_H__ */ diff --git a/src/emu/cpu/sharc/sharc.c b/src/emu/cpu/sharc/sharc.c index ddd22f687a8..14f1881862f 100644 --- a/src/emu/cpu/sharc/sharc.c +++ b/src/emu/cpu/sharc/sharc.c @@ -1078,11 +1078,11 @@ static CPU_GET_INFO( sharc ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 24; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = -3; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 32; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 32; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = -2; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 32; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = -2; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE: info->i = CLEAR_LINE; break; diff --git a/src/emu/cpu/sharc/sharcdma.c b/src/emu/cpu/sharc/sharcdma.c index 8506a567c3d..d2571b4143f 100644 --- a/src/emu/cpu/sharc/sharcdma.c +++ b/src/emu/cpu/sharc/sharcdma.c @@ -10,14 +10,14 @@ static void schedule_chained_dma_op(SHARC_REGS *cpustate, int channel, UINT32 dm { UINT32 op_ptr = 0x20000 + dma_chain_ptr; - UINT32 int_index = dm_read32(cpustate, op_ptr - 0); + UINT32 int_index = dm_read32(cpustate, op_ptr - 0); UINT32 int_modifier = dm_read32(cpustate, op_ptr - 1); UINT32 int_count = dm_read32(cpustate, op_ptr - 2); - UINT32 chain_ptr = dm_read32(cpustate, op_ptr - 3); + UINT32 chain_ptr = dm_read32(cpustate, op_ptr - 3); //UINT32 gen_purpose = dm_read32(cpustate, op_ptr - 4); - UINT32 ext_index = dm_read32(cpustate, op_ptr - 5); + UINT32 ext_index = dm_read32(cpustate, op_ptr - 5); UINT32 ext_modifier = dm_read32(cpustate, op_ptr - 6); - UINT32 ext_count = dm_read32(cpustate, op_ptr - 7); + UINT32 ext_count = dm_read32(cpustate, op_ptr - 7); if (cpustate->dmaop_cycles > 0) { diff --git a/src/emu/cpu/sharc/sharcdsm.c b/src/emu/cpu/sharc/sharcdsm.c index 3cf13223d22..f5ab5c98318 100644 --- a/src/emu/cpu/sharc/sharcdsm.c +++ b/src/emu/cpu/sharc/sharcdsm.c @@ -793,7 +793,7 @@ static UINT32 dasm_do_until_counter(UINT32 pc, UINT64 opcode) int ureg = (opcode >> 32) & 0xff; UINT32 addr = opcode & 0xffffff; - if (opcode & U64(0x10000000000)) /* Loop counter from universal register */ + if (opcode & U64(0x10000000000)) /* Loop counter from universal register */ { print("LCNTR = %s, ", GET_UREG(ureg)); print("DO (0x%08X)", pc + SIGN_EXTEND24(addr)); @@ -937,7 +937,7 @@ static UINT32 dasm_ireg_modify(UINT32 pc, UINT64 opcode) print("BITREV (%s, 0x%08X)", GET_DAG1_I(i), data); } } - else /* without bit-reverse */ + else /* without bit-reverse */ { if (g) { diff --git a/src/emu/cpu/sharc/sharcdsm.h b/src/emu/cpu/sharc/sharcdsm.h index 04364f5f096..d84563943ad 100644 --- a/src/emu/cpu/sharc/sharcdsm.h +++ b/src/emu/cpu/sharc/sharcdsm.h @@ -36,7 +36,7 @@ static const char ureg_names[256][16] = static const char bopnames[8][8] = { - "SET", "CLEAR", "TOGGLE", "???", "TEST", "XOR", "???", "???" + "SET", "CLEAR", "TOGGLE", "???", "TEST", "XOR", "???", "???" }; static const char condition_codes_if[32][32] = diff --git a/src/emu/cpu/sharc/sharcops.c b/src/emu/cpu/sharc/sharcops.c index 3bc94801eab..bbe2bc2414a 100644 --- a/src/emu/cpu/sharc/sharcops.c +++ b/src/emu/cpu/sharc/sharcops.c @@ -282,7 +282,7 @@ static UINT32 GET_UREG(SHARC_REGS *cpustate, int ureg) { return cpustate->dag2.i[reg & 0x7]; } - else /* I0 - I7 */ + else /* I0 - I7 */ { return cpustate->dag1.i[reg & 0x7]; } diff --git a/src/emu/cpu/spc700/spc700.c b/src/emu/cpu/spc700/spc700.c index 5a6260422b3..fe6dace7e27 100644 --- a/src/emu/cpu/spc700/spc700.c +++ b/src/emu/cpu/spc700/spc700.c @@ -152,7 +152,7 @@ INLINE int MAKE_INT_8(int A) {return (A & 0x80) ? A | ~0xff : A & 0xff;} #define FLAGPOS_P BIT_5 /* Direct Page Selector */ #define FLAGPOS_B BIT_4 /* Break */ #define FLAGPOS_H BIT_3 /* Half-carry */ -#define FLAGPOS_I BIT_2 /* Interrupt */ +#define FLAGPOS_I BIT_2 /* Interrupt */ #define FLAGPOS_Z BIT_1 /* Zero */ #define FLAGPOS_C BIT_0 /* Carry */ @@ -224,8 +224,8 @@ INLINE int MAKE_INT_8(int A) {return (A & 0x80) ? A | ~0xff : A & 0xff;} /* Codition code tests */ #define COND_CC() (!(FLAG_C&0x100)) /* Carry Clear */ #define COND_CS() (FLAG_C&0x100) /* Carry Set */ -#define COND_EQ() (!FLAG_Z) /* Equal */ -#define COND_NE() (FLAG_Z) /* Not Equal */ +#define COND_EQ() (!FLAG_Z) /* Equal */ +#define COND_NE() (FLAG_Z) /* Not Equal */ #define COND_MI() (FLAG_N&0x80) /* Minus */ #define COND_PL() (!(FLAG_N&0x80)) /* Plus */ #define COND_VC() (!(FLAG_V&0x80)) /* Overflow Clear */ @@ -567,7 +567,7 @@ INLINE void SET_FLAG_I(spc700i_cpu *cpustate, uint value) TMP1 = ((A) & 0x0f) + (CFLAG_AS_1()); \ FLAG_C = (cpustate->spc_int16 > 0xff) ? CFLAG_SET : 0; \ FLAG_V = (~((A) ^ (B))) & (((A) ^ cpustate->spc_int16) & 0x80); \ - FLAG_H = (((cpustate->spc_int16 & 0x0f) - TMP1) & 0x10) >> 1; \ + FLAG_H = (((cpustate->spc_int16 & 0x0f) - TMP1) & 0x10) >> 1; \ FLAG_NZ = (UINT8)cpustate->spc_int16 @@ -778,7 +778,7 @@ INLINE void SET_FLAG_I(spc700i_cpu *cpustate, uint value) if (((SRC & 0x0f) > 9) || (FLAG_H & HFLAG_SET)) \ { \ REG_A += 6; \ - if (REG_A < 6) \ + if (REG_A < 6) \ { \ FLAG_C = CFLAG_SET; \ } \ @@ -798,7 +798,7 @@ INLINE void SET_FLAG_I(spc700i_cpu *cpustate, uint value) { \ REG_A -= 6; \ } \ - if (!(FLAG_C & CFLAG_SET) || (SRC > 0x99)) \ + if (!(FLAG_C & CFLAG_SET) || (SRC > 0x99)) \ { \ REG_A -= 0x60; \ FLAG_C = 0; \ @@ -1655,11 +1655,11 @@ CPU_GET_INFO( spc700 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + 0: info->i = (LINE_IRQ == IRQ_SET) ? ASSERT_LINE : CLEAR_LINE; break; @@ -1668,9 +1668,9 @@ CPU_GET_INFO( spc700 ) case CPUINFO_INT_PC: case CPUINFO_INT_REGISTER + SPC700_PC: info->i = REG_PC; break; case CPUINFO_INT_SP: - case CPUINFO_INT_REGISTER + SPC700_S: info->i = REG_S + STACK_PAGE; break; - case CPUINFO_INT_REGISTER + SPC700_P: info->i = GET_REG_P(); break; - case CPUINFO_INT_REGISTER + SPC700_A: info->i = REG_A; break; + case CPUINFO_INT_REGISTER + SPC700_S: info->i = REG_S + STACK_PAGE; break; + case CPUINFO_INT_REGISTER + SPC700_P: info->i = GET_REG_P(); break; + case CPUINFO_INT_REGISTER + SPC700_A: info->i = REG_A; break; case CPUINFO_INT_REGISTER + SPC700_X: info->i = REG_X; break; case CPUINFO_INT_REGISTER + SPC700_Y: info->i = REG_Y; break; diff --git a/src/emu/cpu/ssp1601/ssp1601.c b/src/emu/cpu/ssp1601/ssp1601.c index 523f0cc766c..09b12a7914a 100644 --- a/src/emu/cpu/ssp1601/ssp1601.c +++ b/src/emu/cpu/ssp1601/ssp1601.c @@ -196,7 +196,7 @@ INLINE ssp1601_state_t *get_safe_token(const device_config *device) OP(rP.d); \ break; \ } \ - if ((op & 0x0f) == SSP_A) { /* A <- A */ \ + if ((op & 0x0f) == SSP_A) { /* A <- A */ \ OP(rA32); \ break; \ } \ @@ -828,11 +828,11 @@ CPU_GET_INFO( ssp1601 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = -1; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 16; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 4; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 4; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + 0: /* not implemented */ break; @@ -893,7 +893,7 @@ CPU_GET_INFO( ssp1601 ) case CPUINFO_STR_REGISTER + SSP_A: sprintf(info->s, "A :%08X", rA32); break; case CPUINFO_STR_REGISTER + SSP_ST: sprintf(info->s, "ST :%04X", rST); break; case CPUINFO_STR_REGISTER + SSP_STACK: sprintf(info->s, "STACK :%04X", rSTACK); break; - case CPUINFO_STR_REGISTER + SSP_PC: sprintf(info->s, "PC :%04X", rPC); break; + case CPUINFO_STR_REGISTER + SSP_PC: sprintf(info->s, "PC :%04X", rPC); break; case CPUINFO_STR_REGISTER + SSP_P: sprintf(info->s, "P :%08X", rP.d); break; case CPUINFO_STR_REGISTER + SSP_STACK0: sprintf(info->s, "STACK0 :%04X", ssp1601_state->stack[0]); break; case CPUINFO_STR_REGISTER + SSP_STACK1: sprintf(info->s, "STACK1 :%04X", ssp1601_state->stack[1]); break; diff --git a/src/emu/cpu/superfx/superfx.c b/src/emu/cpu/superfx/superfx.c index f0573b4e950..5959902ab78 100644 --- a/src/emu/cpu/superfx/superfx.c +++ b/src/emu/cpu/superfx/superfx.c @@ -327,7 +327,7 @@ static UINT8 superfx_rpix(superfx_state *cpustate, UINT8 x, UINT8 y) break; case SUPERFX_SCMR_HT2: cn = ((x & 0xf8) << 1) + ((x & 0xf8) << 0) + ((y & 0xf8) >> 3); - break; + break; case SUPERFX_SCMR_HT3: cn = ((y & 0x80) << 2) + ((x & 0x80) << 1) + ((y & 0x78) << 1) + ((x & 0x78) >> 3); break; @@ -1438,7 +1438,7 @@ static CPU_SET_INFO( superfx ) { /* --- the following bits of info are set as 64-bit signed integers --- */ case CPUINFO_INT_PC: - case CPUINFO_INT_REGISTER + SUPERFX_PC: cpustate->r[15] = info->i; break; + case CPUINFO_INT_REGISTER + SUPERFX_PC: cpustate->r[15] = info->i; break; case CPUINFO_INT_REGISTER + SUPERFX_DREG: info->i = cpustate->dreg_idx; break; case CPUINFO_INT_REGISTER + SUPERFX_SREG: info->i = cpustate->sreg_idx; break; case CPUINFO_INT_REGISTER + SUPERFX_R0: cpustate->r[0] = info->i; break; @@ -1457,8 +1457,8 @@ static CPU_SET_INFO( superfx ) case CPUINFO_INT_REGISTER + SUPERFX_R13: cpustate->r[13] = info->i; break; case CPUINFO_INT_REGISTER + SUPERFX_R14: cpustate->r[14] = info->i; break; case CPUINFO_INT_REGISTER + SUPERFX_R15: cpustate->r[15] = info->i; break; - case CPUINFO_INT_REGISTER + SUPERFX_SFR: cpustate->sfr = info->i; break; - case CPUINFO_INT_REGISTER + SUPERFX_PBR: cpustate->pbr = info->i; break; + case CPUINFO_INT_REGISTER + SUPERFX_SFR: cpustate->sfr = info->i; break; + case CPUINFO_INT_REGISTER + SUPERFX_PBR: cpustate->pbr = info->i; break; case CPUINFO_INT_REGISTER + SUPERFX_ROMBR: cpustate->rombr = info->i; break; case CPUINFO_INT_REGISTER + SUPERFX_RAMBR: cpustate->rambr = info->i; break; case CPUINFO_INT_REGISTER + SUPERFX_CBR: cpustate->cbr = info->i; break; @@ -1527,8 +1527,8 @@ CPU_GET_INFO( superfx ) case CPUINFO_INT_REGISTER + SUPERFX_R13: info->i = cpustate->r[13]; break; case CPUINFO_INT_REGISTER + SUPERFX_R14: info->i = cpustate->r[14]; break; case CPUINFO_INT_REGISTER + SUPERFX_R15: info->i = cpustate->r[15]; break; - case CPUINFO_INT_REGISTER + SUPERFX_SFR: info->i = cpustate->sfr; break; - case CPUINFO_INT_REGISTER + SUPERFX_PBR: info->i = cpustate->sfr; break; + case CPUINFO_INT_REGISTER + SUPERFX_SFR: info->i = cpustate->sfr; break; + case CPUINFO_INT_REGISTER + SUPERFX_PBR: info->i = cpustate->sfr; break; case CPUINFO_INT_REGISTER + SUPERFX_ROMBR: info->i = cpustate->rombr; break; case CPUINFO_INT_REGISTER + SUPERFX_RAMBR: info->i = cpustate->rambr; break; case CPUINFO_INT_REGISTER + SUPERFX_CBR: info->i = cpustate->cbr; break; @@ -1548,21 +1548,21 @@ CPU_GET_INFO( superfx ) case CPUINFO_INT_REGISTER + SUPERFX_RAMADDR: info->i = cpustate->ramaddr; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(superfx); break; - case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(superfx); break; - case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(superfx); break; - case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(superfx); break; - case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(superfx); break; + case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(superfx); break; + case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(superfx); break; + case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(superfx); break; + case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(superfx); break; + case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(superfx); break; case CPUINFO_FCT_BURN: info->burn = NULL; break; case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(superfx); break; case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case DEVINFO_STR_NAME: strcpy(info->s, "SuperFX"); break; - case DEVINFO_STR_FAMILY: strcpy(info->s, "SuperFX"); break; - case DEVINFO_STR_VERSION: strcpy(info->s, "1.0"); break; + case DEVINFO_STR_FAMILY: strcpy(info->s, "SuperFX"); break; + case DEVINFO_STR_VERSION: strcpy(info->s, "1.0"); break; case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break; - case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break; + case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break; case CPUINFO_STR_FLAGS: strcpy(info->s, " "); break; @@ -1585,8 +1585,8 @@ CPU_GET_INFO( superfx ) case CPUINFO_STR_REGISTER + SUPERFX_R13: sprintf(info->s, "R13: %04X", cpustate->r[13]); break; case CPUINFO_STR_REGISTER + SUPERFX_R14: sprintf(info->s, "R14: %04X", cpustate->r[14]); break; case CPUINFO_STR_REGISTER + SUPERFX_R15: sprintf(info->s, "R15: %04X", cpustate->r[15]); break; - case CPUINFO_STR_REGISTER + SUPERFX_SFR: sprintf(info->s, "SFR: %04X", cpustate->sfr); break; - case CPUINFO_STR_REGISTER + SUPERFX_PBR: sprintf(info->s, "PBR: %02X", cpustate->sfr); break; + case CPUINFO_STR_REGISTER + SUPERFX_SFR: sprintf(info->s, "SFR: %04X", cpustate->sfr); break; + case CPUINFO_STR_REGISTER + SUPERFX_PBR: sprintf(info->s, "PBR: %02X", cpustate->sfr); break; case CPUINFO_STR_REGISTER + SUPERFX_ROMBR: sprintf(info->s, "ROMBR: %02X", cpustate->rombr); break; case CPUINFO_STR_REGISTER + SUPERFX_RAMBR: sprintf(info->s, "RAMBR: %02X", cpustate->rambr); break; case CPUINFO_STR_REGISTER + SUPERFX_CBR: sprintf(info->s, "CBR: %04X", cpustate->cbr); break; diff --git a/src/emu/cpu/t11/t11.c b/src/emu/cpu/t11/t11.c index 01d52d2f3f5..d8f06f7983d 100644 --- a/src/emu/cpu/t11/t11.c +++ b/src/emu/cpu/t11/t11.c @@ -31,7 +31,7 @@ struct _t11_state UINT8 wait_state; UINT8 irq_state; int icount; - cpu_irq_callback irq_callback; + cpu_irq_callback irq_callback; const device_config *device; const address_space *program; }; @@ -60,8 +60,8 @@ INLINE t11_state *get_safe_token(const device_config *device) #define REGB(x) reg[x].b.l /* PC, SP, and PSW definitions */ -#define SP REGW(6) -#define PC REGW(7) +#define SP REGW(6) +#define PC REGW(7) #define SPD REGD(6) #define PCD REGD(7) #define PSW psw.b.l @@ -391,7 +391,7 @@ static CPU_SET_INFO( t11 ) case CPUINFO_INT_INPUT_STATE + T11_IRQ3: set_irq_line(cpustate, T11_IRQ3, info->i); break; case CPUINFO_INT_PC: - case CPUINFO_INT_REGISTER + T11_PC: cpustate->PC = info->i; break; + case CPUINFO_INT_REGISTER + T11_PC: cpustate->PC = info->i; break; case CPUINFO_INT_SP: case CPUINFO_INT_REGISTER + T11_SP: cpustate->SP = info->i; break; case CPUINFO_INT_REGISTER + T11_PSW: cpustate->PSW = info->i; break; @@ -432,11 +432,11 @@ CPU_GET_INFO( t11 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + T11_IRQ0: info->i = (cpustate->irq_state & 1) ? ASSERT_LINE : CLEAR_LINE; break; case CPUINFO_INT_INPUT_STATE + T11_IRQ1: info->i = (cpustate->irq_state & 2) ? ASSERT_LINE : CLEAR_LINE; break; diff --git a/src/emu/cpu/t11/t11ops.c b/src/emu/cpu/t11/t11ops.c index c700d943183..0b7c82617d8 100644 --- a/src/emu/cpu/t11/t11ops.c +++ b/src/emu/cpu/t11/t11ops.c @@ -262,7 +262,7 @@ static void op_0000(t11_state *cpustate, UINT16 op) case 0x04: /* IOT */ cpustate->icount -= 48; PUSH(cpustate, cpustate->PSW); PUSH(cpustate, cpustate->PC); cpustate->PC = RWORD(cpustate, 0x10); cpustate->PSW = RWORD(cpustate, 0x12); t11_check_irqs(cpustate); break; case 0x05: /* RESET */ cpustate->icount -= 110; break; case 0x06: /* RTT */ cpustate->icount -= 33; cpustate->PC = POP(cpustate); cpustate->PSW = POP(cpustate); t11_check_irqs(cpustate); break; - default: illegal(cpustate, op); break; + default: illegal(cpustate, op); break; } } @@ -292,7 +292,7 @@ static void mark(t11_state *cpustate, UINT16 op) cpustate->SP = cpustate->SP + 2 * (op & 0x3f); cpustate->PC = cpustate->REGW(5); - cpustate->REGW(5) = POP(cpustate); + cpustate->REGW(5) = POP(cpustate); } static void jmp_rgd(t11_state *cpustate, UINT16 op) { cpustate->icount -= 15; { JMP(RGD); } } diff --git a/src/emu/cpu/tlcs90/tlcs90.c b/src/emu/cpu/tlcs90/tlcs90.c index 6c918e6aea5..1d708e85e72 100644 --- a/src/emu/cpu/tlcs90/tlcs90.c +++ b/src/emu/cpu/tlcs90/tlcs90.c @@ -622,9 +622,9 @@ static void decode(t90_Regs *cpustate) case 0x6c: // AND (vw),n case 0x6d: // XOR (vw),n case 0x6e: // OR (vw),n - OP( ADD+b3-0x68,14 ) MI16( 1, imm16 ) I8( 2, READ8(cpustate) ) return; + OP( ADD+b3-0x68,14 ) MI16( 1, imm16 ) I8( 2, READ8(cpustate) ) return; case 0x6f: // CP (vw),n - OP( ADD+b3-0x68,12 ) MI16( 1, imm16 ) I8( 2, READ8(cpustate) ) return; + OP( ADD+b3-0x68,12 ) MI16( 1, imm16 ) I8( 2, READ8(cpustate) ) return; case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7: case 0xc8: case 0xc9: case 0xca: case 0xcb: case 0xcc: case 0xcd: case 0xce: case 0xcf: @@ -650,9 +650,9 @@ static void decode(t90_Regs *cpustate) case 0x6c: // AND ($FF00+w),n case 0x6d: // XOR ($FF00+w),n case 0x6e: // OR ($FF00+w),n - OP( ADD+b2-0x68,12 ) MI16( 1, 0xFF00|b1 ) I8( 2, READ8(cpustate) ) return; + OP( ADD+b2-0x68,12 ) MI16( 1, 0xFF00|b1 ) I8( 2, READ8(cpustate) ) return; case 0x6f: // CP ($FF00+w),n - OP( ADD+b2-0x68,10 ) MI16( 1, 0xFF00|b1 ) I8( 2, READ8(cpustate) ) return; + OP( ADD+b2-0x68,10 ) MI16( 1, 0xFF00|b1 ) I8( 2, READ8(cpustate) ) return; } break; case 0xf0: case 0xf1: case 0xf2: @@ -822,9 +822,9 @@ static void decode(t90_Regs *cpustate) case 0x6c: // AND (ix+d),n case 0x6d: // XOR (ix+d),n case 0x6e: // OR (ix+d),n - OP( ADD+b2-0x68,14) MR16D8( 1, IX + b0 - 0xf4, b1 ) I8( 2, READ8(cpustate) ) return; + OP( ADD+b2-0x68,14) MR16D8( 1, IX + b0 - 0xf4, b1 ) I8( 2, READ8(cpustate) ) return; case 0x6f: // CP (ix+d),n - OP( ADD+b2-0x68,12) MR16D8( 1, IX + b0 - 0xf4, b1 ) I8( 2, READ8(cpustate) ) return; + OP( ADD+b2-0x68,12) MR16D8( 1, IX + b0 - 0xf4, b1 ) I8( 2, READ8(cpustate) ) return; case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7: case 0xc8: case 0xc9: case 0xca: case 0xcb: case 0xcc: case 0xcd: case 0xce: case 0xcf: @@ -855,9 +855,9 @@ static void decode(t90_Regs *cpustate) case 0x6c: // AND (HL+A),n case 0x6d: // XOR (HL+A),n case 0x6e: // OR (HL+A),n - OP( ADD+b1-0x68,18) MR16R8( 1, HL, A ) I8( 2, READ8(cpustate) ) return; + OP( ADD+b1-0x68,18) MR16R8( 1, HL, A ) I8( 2, READ8(cpustate) ) return; case 0x6f: // CP (HL+A),n - OP( ADD+b1-0x68,16) MR16R8( 1, HL, A ) I8( 2, READ8(cpustate) ) return; + OP( ADD+b1-0x68,16) MR16R8( 1, HL, A ) I8( 2, READ8(cpustate) ) return; case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7: case 0xc8: case 0xc9: case 0xca: case 0xcb: case 0xcc: case 0xcd: case 0xce: case 0xcf: @@ -912,7 +912,7 @@ static void decode(t90_Regs *cpustate) case 0x6d: // XOR g,n case 0x6e: // OR g,n case 0x6f: // CP g,n - OP( ADD+b1-0x68,6 ) R8( 1, b0 - 0xf8 ) I8( 2, READ8(cpustate) ) return; + OP( ADD+b1-0x68,6 ) R8( 1, b0 - 0xf8 ) I8( 2, READ8(cpustate) ) return; case 0x70: // ADD HL,gg case 0x71: // ADC HL,gg @@ -1168,7 +1168,7 @@ INLINE void Write##N##_8( t90_Regs *cpustate, UINT8 value ) { \ case IX: WX8(cpustate, cpustate->ix.w.l,value,cpustate->ixbase); return; \ case IY: WX8(cpustate, cpustate->iy.w.l,value,cpustate->iybase); return; \ } \ - WM8(cpustate, r16(cpustate, cpustate->r##N), value); return; \ + WM8(cpustate, r16(cpustate, cpustate->r##N), value); return; \ case MODE_MR16D8: \ switch( cpustate->r##N ) { \ case IX: WX8(cpustate, (UINT16)(cpustate->ix.w.l + (INT8)cpustate->r##N##b),value,cpustate->ixbase); return; \ @@ -1190,7 +1190,7 @@ INLINE void Write##N##_16( t90_Regs *cpustate, UINT16 value ) \ case IX: WX16(cpustate, cpustate->ix.w.l,value,cpustate->ixbase); return; \ case IY: WX16(cpustate, cpustate->iy.w.l,value,cpustate->iybase); return; \ } \ - WM16(cpustate, r16(cpustate, cpustate->r##N), value); return; \ + WM16(cpustate, r16(cpustate, cpustate->r##N), value); return; \ case MODE_MR16D8: \ switch( cpustate->r##N ) { \ case IX: WX16(cpustate, (UINT16)(cpustate->ix.w.l + (INT8)cpustate->r##N##b),value,cpustate->ixbase); return; \ diff --git a/src/emu/cpu/tms32010/tms32010.c b/src/emu/cpu/tms32010/tms32010.c index 6c81fb7bc26..ef948c6b1aa 100644 --- a/src/emu/cpu/tms32010/tms32010.c +++ b/src/emu/cpu/tms32010/tms32010.c @@ -110,14 +110,14 @@ typedef struct _tms32010_opcode tms32010_opcode; struct _tms32010_opcode { UINT8 cycles; - void (*function)(tms32010_state *); + void (*function)(tms32010_state *); }; /* opcode table entry (Opcode 7F has sub-opcodes) */ typedef struct _tms32010_opcode_7F tms32010_opcode_7F; struct _tms32010_opcode_7F { UINT8 cycles; - void (*function)(tms32010_state *); + void (*function)(tms32010_state *); }; @@ -963,11 +963,11 @@ CPU_GET_INFO( tms32010 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 12; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = -1; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 16; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = -1; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 8; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = -1; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 16; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 5; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = -1; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 5; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = -1; break; case CPUINFO_INT_INPUT_STATE + 0: info->i = (cpustate->INTF & TMS32010_INT_PENDING) ? ASSERT_LINE : CLEAR_LINE; break; @@ -978,12 +978,12 @@ CPU_GET_INFO( tms32010 ) /* This is actually not a stack pointer, but the stack contents */ case CPUINFO_INT_SP: case CPUINFO_INT_REGISTER + TMS32010_STK3: info->i = cpustate->STACK[3]; break; - case CPUINFO_INT_REGISTER + TMS32010_ACC: info->i = cpustate->ACC.d; break; - case CPUINFO_INT_REGISTER + TMS32010_STR: info->i = cpustate->STR; break; + case CPUINFO_INT_REGISTER + TMS32010_ACC: info->i = cpustate->ACC.d; break; + case CPUINFO_INT_REGISTER + TMS32010_STR: info->i = cpustate->STR; break; case CPUINFO_INT_REGISTER + TMS32010_PREG: info->i = cpustate->Preg.d; break; case CPUINFO_INT_REGISTER + TMS32010_TREG: info->i = cpustate->Treg; break; - case CPUINFO_INT_REGISTER + TMS32010_AR0: info->i = cpustate->AR[0]; break; - case CPUINFO_INT_REGISTER + TMS32010_AR1: info->i = cpustate->AR[1]; break; + case CPUINFO_INT_REGISTER + TMS32010_AR0: info->i = cpustate->AR[0]; break; + case CPUINFO_INT_REGISTER + TMS32010_AR1: info->i = cpustate->AR[1]; break; /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(tms32010); break; @@ -1023,17 +1023,17 @@ CPU_GET_INFO( tms32010 ) cpustate->STR & 0x0001 ? '1':'0'); break; - case CPUINFO_STR_REGISTER + TMS32010_PC: sprintf(info->s, "PC:%04X", cpustate->PC); break; - case CPUINFO_STR_REGISTER + TMS32010_SP: sprintf(info->s, "SP:%X", 0); /* fake stack pointer */ break; - case CPUINFO_STR_REGISTER + TMS32010_STR: sprintf(info->s, "STR:%04X", cpustate->STR); break; - case CPUINFO_STR_REGISTER + TMS32010_ACC: sprintf(info->s, "ACC:%08X", cpustate->ACC.d); break; - case CPUINFO_STR_REGISTER + TMS32010_PREG: sprintf(info->s, "P:%08X", cpustate->Preg.d); break; - case CPUINFO_STR_REGISTER + TMS32010_TREG: sprintf(info->s, "T:%04X", cpustate->Treg); break; - case CPUINFO_STR_REGISTER + TMS32010_AR0: sprintf(info->s, "AR0:%04X", cpustate->AR[0]); break; - case CPUINFO_STR_REGISTER + TMS32010_AR1: sprintf(info->s, "AR1:%04X", cpustate->AR[1]); break; - case CPUINFO_STR_REGISTER + TMS32010_STK0: sprintf(info->s, "STK0:%04X", cpustate->STACK[0]); break; - case CPUINFO_STR_REGISTER + TMS32010_STK1: sprintf(info->s, "STK1:%04X", cpustate->STACK[1]); break; - case CPUINFO_STR_REGISTER + TMS32010_STK2: sprintf(info->s, "STK2:%04X", cpustate->STACK[2]); break; - case CPUINFO_STR_REGISTER + TMS32010_STK3: sprintf(info->s, "STK3:%04X", cpustate->STACK[3]); break; + case CPUINFO_STR_REGISTER + TMS32010_PC: sprintf(info->s, "PC:%04X", cpustate->PC); break; + case CPUINFO_STR_REGISTER + TMS32010_SP: sprintf(info->s, "SP:%X", 0); /* fake stack pointer */ break; + case CPUINFO_STR_REGISTER + TMS32010_STR: sprintf(info->s, "STR:%04X", cpustate->STR); break; + case CPUINFO_STR_REGISTER + TMS32010_ACC: sprintf(info->s, "ACC:%08X", cpustate->ACC.d); break; + case CPUINFO_STR_REGISTER + TMS32010_PREG: sprintf(info->s, "P:%08X", cpustate->Preg.d); break; + case CPUINFO_STR_REGISTER + TMS32010_TREG: sprintf(info->s, "T:%04X", cpustate->Treg); break; + case CPUINFO_STR_REGISTER + TMS32010_AR0: sprintf(info->s, "AR0:%04X", cpustate->AR[0]); break; + case CPUINFO_STR_REGISTER + TMS32010_AR1: sprintf(info->s, "AR1:%04X", cpustate->AR[1]); break; + case CPUINFO_STR_REGISTER + TMS32010_STK0: sprintf(info->s, "STK0:%04X", cpustate->STACK[0]); break; + case CPUINFO_STR_REGISTER + TMS32010_STK1: sprintf(info->s, "STK1:%04X", cpustate->STACK[1]); break; + case CPUINFO_STR_REGISTER + TMS32010_STK2: sprintf(info->s, "STK2:%04X", cpustate->STACK[2]); break; + case CPUINFO_STR_REGISTER + TMS32010_STK3: sprintf(info->s, "STK3:%04X", cpustate->STACK[3]); break; } } diff --git a/src/emu/cpu/tms32025/tms32025.c b/src/emu/cpu/tms32025/tms32025.c index fde754dd944..5c2f723e615 100644 --- a/src/emu/cpu/tms32025/tms32025.c +++ b/src/emu/cpu/tms32025/tms32025.c @@ -196,21 +196,21 @@ typedef struct _tms32025_opcode tms32025_opcode; struct _tms32025_opcode { UINT8 cycles; - void (*function)(tms32025_state *); + void (*function)(tms32025_state *); }; /* opcode table entry (Opcode CE has sub-opcodes) */ typedef struct _tms32025_opcode_CE tms32025_opcode_CE; struct _tms32025_opcode_CE { UINT8 cycles; - void (*function)(tms32025_state *); + void (*function)(tms32025_state *); }; /* opcode table entry (Opcode Dx has sub-opcodes) */ typedef struct _tms32025_opcode_Dx tms32025_opcode_Dx; struct _tms32025_opcode_Dx { UINT8 cycles; - void (*function)(tms32025_state *); + void (*function)(tms32025_state *); }; @@ -2270,29 +2270,29 @@ static CPU_SET_INFO( tms32025 ) case CPUINFO_INT_REGISTER + TMS32025_PC: cpustate->PC = info->i; break; /* This is actually not a stack pointer, but the stack contents */ case CPUINFO_INT_SP: - case CPUINFO_INT_REGISTER + TMS32025_STK7: cpustate->STACK[7] = info->i; break; - case CPUINFO_INT_REGISTER + TMS32025_STK6: cpustate->STACK[6] = info->i; break; - case CPUINFO_INT_REGISTER + TMS32025_STK5: cpustate->STACK[5] = info->i; break; - case CPUINFO_INT_REGISTER + TMS32025_STK4: cpustate->STACK[4] = info->i; break; - case CPUINFO_INT_REGISTER + TMS32025_STK3: cpustate->STACK[3] = info->i; break; - case CPUINFO_INT_REGISTER + TMS32025_STK2: cpustate->STACK[2] = info->i; break; - case CPUINFO_INT_REGISTER + TMS32025_STK1: cpustate->STACK[1] = info->i; break; - case CPUINFO_INT_REGISTER + TMS32025_STK0: cpustate->STACK[0] = info->i; break; - case CPUINFO_INT_REGISTER + TMS32025_STR0: cpustate->STR0 = info->i; break; - case CPUINFO_INT_REGISTER + TMS32025_STR1: cpustate->STR1 = info->i; break; - case CPUINFO_INT_REGISTER + TMS32025_IFR: cpustate->IFR = info->i; break; - case CPUINFO_INT_REGISTER + TMS32025_RPTC: cpustate->RPTC = info->i; break; - case CPUINFO_INT_REGISTER + TMS32025_ACC: cpustate->ACC.d = info->i; break; - case CPUINFO_INT_REGISTER + TMS32025_PREG: cpustate->Preg.d = info->i; break; - case CPUINFO_INT_REGISTER + TMS32025_TREG: cpustate->Treg = info->i; break; - case CPUINFO_INT_REGISTER + TMS32025_AR0: cpustate->AR[0] = info->i; break; - case CPUINFO_INT_REGISTER + TMS32025_AR1: cpustate->AR[1] = info->i; break; - case CPUINFO_INT_REGISTER + TMS32025_AR2: cpustate->AR[2] = info->i; break; - case CPUINFO_INT_REGISTER + TMS32025_AR3: cpustate->AR[3] = info->i; break; - case CPUINFO_INT_REGISTER + TMS32025_AR4: cpustate->AR[4] = info->i; break; - case CPUINFO_INT_REGISTER + TMS32025_AR5: cpustate->AR[5] = info->i; break; - case CPUINFO_INT_REGISTER + TMS32025_AR6: cpustate->AR[6] = info->i; break; - case CPUINFO_INT_REGISTER + TMS32025_AR7: cpustate->AR[7] = info->i; break; + case CPUINFO_INT_REGISTER + TMS32025_STK7: cpustate->STACK[7] = info->i; break; + case CPUINFO_INT_REGISTER + TMS32025_STK6: cpustate->STACK[6] = info->i; break; + case CPUINFO_INT_REGISTER + TMS32025_STK5: cpustate->STACK[5] = info->i; break; + case CPUINFO_INT_REGISTER + TMS32025_STK4: cpustate->STACK[4] = info->i; break; + case CPUINFO_INT_REGISTER + TMS32025_STK3: cpustate->STACK[3] = info->i; break; + case CPUINFO_INT_REGISTER + TMS32025_STK2: cpustate->STACK[2] = info->i; break; + case CPUINFO_INT_REGISTER + TMS32025_STK1: cpustate->STACK[1] = info->i; break; + case CPUINFO_INT_REGISTER + TMS32025_STK0: cpustate->STACK[0] = info->i; break; + case CPUINFO_INT_REGISTER + TMS32025_STR0: cpustate->STR0 = info->i; break; + case CPUINFO_INT_REGISTER + TMS32025_STR1: cpustate->STR1 = info->i; break; + case CPUINFO_INT_REGISTER + TMS32025_IFR: cpustate->IFR = info->i; break; + case CPUINFO_INT_REGISTER + TMS32025_RPTC: cpustate->RPTC = info->i; break; + case CPUINFO_INT_REGISTER + TMS32025_ACC: cpustate->ACC.d = info->i; break; + case CPUINFO_INT_REGISTER + TMS32025_PREG: cpustate->Preg.d = info->i; break; + case CPUINFO_INT_REGISTER + TMS32025_TREG: cpustate->Treg = info->i; break; + case CPUINFO_INT_REGISTER + TMS32025_AR0: cpustate->AR[0] = info->i; break; + case CPUINFO_INT_REGISTER + TMS32025_AR1: cpustate->AR[1] = info->i; break; + case CPUINFO_INT_REGISTER + TMS32025_AR2: cpustate->AR[2] = info->i; break; + case CPUINFO_INT_REGISTER + TMS32025_AR3: cpustate->AR[3] = info->i; break; + case CPUINFO_INT_REGISTER + TMS32025_AR4: cpustate->AR[4] = info->i; break; + case CPUINFO_INT_REGISTER + TMS32025_AR5: cpustate->AR[5] = info->i; break; + case CPUINFO_INT_REGISTER + TMS32025_AR6: cpustate->AR[6] = info->i; break; + case CPUINFO_INT_REGISTER + TMS32025_AR7: cpustate->AR[7] = info->i; break; case CPUINFO_INT_REGISTER + TMS32025_DRR: M_WRTRAM(cpustate, 0,info->i); break; case CPUINFO_INT_REGISTER + TMS32025_DXR: M_WRTRAM(cpustate, 1,info->i); break; case CPUINFO_INT_REGISTER + TMS32025_TIM: M_WRTRAM(cpustate, 2,info->i); break; @@ -2330,11 +2330,11 @@ CPU_GET_INFO( tms32025 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = -1; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 16; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 16; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = -1; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 16; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = -1; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 16; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 17; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = -1; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 17; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = -1; break; case CPUINFO_INT_INPUT_STATE + TMS32025_INT0: info->i = (cpustate->IFR & 0x01) ? ASSERT_LINE : CLEAR_LINE; break; case CPUINFO_INT_INPUT_STATE + TMS32025_INT1: info->i = (cpustate->IFR & 0x02) ? ASSERT_LINE : CLEAR_LINE; break; @@ -2359,24 +2359,24 @@ CPU_GET_INFO( tms32025 ) case CPUINFO_INT_REGISTER + TMS32025_STK0: info->i = cpustate->STACK[0]; break; case CPUINFO_INT_REGISTER + TMS32025_STR0: info->i = cpustate->STR0; break; case CPUINFO_INT_REGISTER + TMS32025_STR1: info->i = cpustate->STR1; break; - case CPUINFO_INT_REGISTER + TMS32025_IFR: info->i = cpustate->IFR; break; + case CPUINFO_INT_REGISTER + TMS32025_IFR: info->i = cpustate->IFR; break; case CPUINFO_INT_REGISTER + TMS32025_RPTC: info->i = cpustate->RPTC; break; - case CPUINFO_INT_REGISTER + TMS32025_ACC: info->i = cpustate->ACC.d; break; + case CPUINFO_INT_REGISTER + TMS32025_ACC: info->i = cpustate->ACC.d; break; case CPUINFO_INT_REGISTER + TMS32025_PREG: info->i = cpustate->Preg.d; break; case CPUINFO_INT_REGISTER + TMS32025_TREG: info->i = cpustate->Treg; break; - case CPUINFO_INT_REGISTER + TMS32025_AR0: info->i = cpustate->AR[0]; break; - case CPUINFO_INT_REGISTER + TMS32025_AR1: info->i = cpustate->AR[1]; break; - case CPUINFO_INT_REGISTER + TMS32025_AR2: info->i = cpustate->AR[2]; break; - case CPUINFO_INT_REGISTER + TMS32025_AR3: info->i = cpustate->AR[3]; break; - case CPUINFO_INT_REGISTER + TMS32025_AR4: info->i = cpustate->AR[4]; break; - case CPUINFO_INT_REGISTER + TMS32025_AR5: info->i = cpustate->AR[5]; break; - case CPUINFO_INT_REGISTER + TMS32025_AR6: info->i = cpustate->AR[6]; break; - case CPUINFO_INT_REGISTER + TMS32025_AR7: info->i = cpustate->AR[7]; break; - case CPUINFO_INT_REGISTER + TMS32025_DRR: info->i = M_RDRAM(cpustate, 0); break; - case CPUINFO_INT_REGISTER + TMS32025_DXR: info->i = M_RDRAM(cpustate, 1); break; - case CPUINFO_INT_REGISTER + TMS32025_TIM: info->i = M_RDRAM(cpustate, 2); break; - case CPUINFO_INT_REGISTER + TMS32025_PRD: info->i = M_RDRAM(cpustate, 3); break; - case CPUINFO_INT_REGISTER + TMS32025_IMR: info->i = M_RDRAM(cpustate, 4); break; + case CPUINFO_INT_REGISTER + TMS32025_AR0: info->i = cpustate->AR[0]; break; + case CPUINFO_INT_REGISTER + TMS32025_AR1: info->i = cpustate->AR[1]; break; + case CPUINFO_INT_REGISTER + TMS32025_AR2: info->i = cpustate->AR[2]; break; + case CPUINFO_INT_REGISTER + TMS32025_AR3: info->i = cpustate->AR[3]; break; + case CPUINFO_INT_REGISTER + TMS32025_AR4: info->i = cpustate->AR[4]; break; + case CPUINFO_INT_REGISTER + TMS32025_AR5: info->i = cpustate->AR[5]; break; + case CPUINFO_INT_REGISTER + TMS32025_AR6: info->i = cpustate->AR[6]; break; + case CPUINFO_INT_REGISTER + TMS32025_AR7: info->i = cpustate->AR[7]; break; + case CPUINFO_INT_REGISTER + TMS32025_DRR: info->i = M_RDRAM(cpustate, 0); break; + case CPUINFO_INT_REGISTER + TMS32025_DXR: info->i = M_RDRAM(cpustate, 1); break; + case CPUINFO_INT_REGISTER + TMS32025_TIM: info->i = M_RDRAM(cpustate, 2); break; + case CPUINFO_INT_REGISTER + TMS32025_PRD: info->i = M_RDRAM(cpustate, 3); break; + case CPUINFO_INT_REGISTER + TMS32025_IMR: info->i = M_RDRAM(cpustate, 4); break; case CPUINFO_INT_REGISTER + TMS32025_GREG: info->i = M_RDRAM(cpustate, 5); break; /* --- the following bits of info are returned as pointers to data or functions --- */ diff --git a/src/emu/cpu/tms32031/dis32031.c b/src/emu/cpu/tms32031/dis32031.c index 289536f0b8f..fa8c704307c 100644 --- a/src/emu/cpu/tms32031/dis32031.c +++ b/src/emu/cpu/tms32031/dis32031.c @@ -407,13 +407,13 @@ static unsigned dasm_tms32031(char *buffer, unsigned pc, UINT32 op) case 0x017: disasm_general("NEGF", op, FLOAT, buffer); break; case 0x018: disasm_general("NEGI", op, INTEGER, buffer); break; - case 0x019: disasm_general("NOP", op, NODEST, buffer); break; + case 0x019: disasm_general("NOP", op, NODEST, buffer); break; case 0x01a: disasm_general("NORM", op, FLOAT, buffer); break; case 0x01b: disasm_general("NOT", op, INTEGER, buffer); break; - case 0x01c: disasm_general("POP", op, NOSOURCE, buffer); break; - case 0x01d: disasm_general("POPF", op, NOSOURCE, buffer); break; - case 0x01e: disasm_general("PUSH", op, NOSOURCE, buffer); break; - case 0x01f: disasm_general("PUSHF", op, NOSOURCE, buffer); break; + case 0x01c: disasm_general("POP", op, NOSOURCE, buffer); break; + case 0x01d: disasm_general("POPF", op, NOSOURCE, buffer); break; + case 0x01e: disasm_general("PUSH", op, NOSOURCE, buffer); break; + case 0x01f: disasm_general("PUSHF", op, NOSOURCE, buffer); break; case 0x020: disasm_general("OR", op, INTEGER | UNSIGNED, buffer); break; case 0x021: disasm_general((op & 1) ? "LOPOWER" : "MAXSPEED", op, NOSOURCE | NODEST, buffer); break; diff --git a/src/emu/cpu/tms32031/tms32031.c b/src/emu/cpu/tms32031/tms32031.c index de2607042e3..de930004515 100644 --- a/src/emu/cpu/tms32031/tms32031.c +++ b/src/emu/cpu/tms32031/tms32031.c @@ -118,7 +118,7 @@ struct _tms32031_state tms32031_xf_func xf0_w; tms32031_xf_func xf1_w; tms32031_iack_func iack_w; - cpu_irq_callback irq_callback; + cpu_irq_callback irq_callback; const device_config *device; const address_space *program; }; @@ -628,15 +628,15 @@ static CPU_SET_INFO( tms32031 ) case CPUINFO_INT_INPUT_STATE + TMS32031_DINT1: set_irq_line(tms, TMS32031_DINT1, info->i); break; case CPUINFO_INT_PC: - case CPUINFO_INT_REGISTER + TMS32031_PC: tms->pc = info->i; break; - case CPUINFO_INT_REGISTER + TMS32031_R0: IREG(tms, TMR_R0) = info->i; break; - case CPUINFO_INT_REGISTER + TMS32031_R1: IREG(tms, TMR_R1) = info->i; break; - case CPUINFO_INT_REGISTER + TMS32031_R2: IREG(tms, TMR_R2) = info->i; break; - case CPUINFO_INT_REGISTER + TMS32031_R3: IREG(tms, TMR_R3) = info->i; break; - case CPUINFO_INT_REGISTER + TMS32031_R4: IREG(tms, TMR_R4) = info->i; break; - case CPUINFO_INT_REGISTER + TMS32031_R5: IREG(tms, TMR_R5) = info->i; break; - case CPUINFO_INT_REGISTER + TMS32031_R6: IREG(tms, TMR_R6) = info->i; break; - case CPUINFO_INT_REGISTER + TMS32031_R7: IREG(tms, TMR_R7) = info->i; break; + case CPUINFO_INT_REGISTER + TMS32031_PC: tms->pc = info->i; break; + case CPUINFO_INT_REGISTER + TMS32031_R0: IREG(tms, TMR_R0) = info->i; break; + case CPUINFO_INT_REGISTER + TMS32031_R1: IREG(tms, TMR_R1) = info->i; break; + case CPUINFO_INT_REGISTER + TMS32031_R2: IREG(tms, TMR_R2) = info->i; break; + case CPUINFO_INT_REGISTER + TMS32031_R3: IREG(tms, TMR_R3) = info->i; break; + case CPUINFO_INT_REGISTER + TMS32031_R4: IREG(tms, TMR_R4) = info->i; break; + case CPUINFO_INT_REGISTER + TMS32031_R5: IREG(tms, TMR_R5) = info->i; break; + case CPUINFO_INT_REGISTER + TMS32031_R6: IREG(tms, TMR_R6) = info->i; break; + case CPUINFO_INT_REGISTER + TMS32031_R7: IREG(tms, TMR_R7) = info->i; break; case CPUINFO_INT_REGISTER + TMS32031_R0F: double_to_dsp(*(float *)&info->i, &tms->r[TMR_R0]); break; case CPUINFO_INT_REGISTER + TMS32031_R1F: double_to_dsp(*(float *)&info->i, &tms->r[TMR_R1]); break; case CPUINFO_INT_REGISTER + TMS32031_R2F: double_to_dsp(*(float *)&info->i, &tms->r[TMR_R2]); break; @@ -645,27 +645,27 @@ static CPU_SET_INFO( tms32031 ) case CPUINFO_INT_REGISTER + TMS32031_R5F: double_to_dsp(*(float *)&info->i, &tms->r[TMR_R5]); break; case CPUINFO_INT_REGISTER + TMS32031_R6F: double_to_dsp(*(float *)&info->i, &tms->r[TMR_R6]); break; case CPUINFO_INT_REGISTER + TMS32031_R7F: double_to_dsp(*(float *)&info->i, &tms->r[TMR_R7]); break; - case CPUINFO_INT_REGISTER + TMS32031_AR0: IREG(tms, TMR_AR0) = info->i; break; - case CPUINFO_INT_REGISTER + TMS32031_AR1: IREG(tms, TMR_AR1) = info->i; break; - case CPUINFO_INT_REGISTER + TMS32031_AR2: IREG(tms, TMR_AR2) = info->i; break; - case CPUINFO_INT_REGISTER + TMS32031_AR3: IREG(tms, TMR_AR3) = info->i; break; - case CPUINFO_INT_REGISTER + TMS32031_AR4: IREG(tms, TMR_AR4) = info->i; break; - case CPUINFO_INT_REGISTER + TMS32031_AR5: IREG(tms, TMR_AR5) = info->i; break; - case CPUINFO_INT_REGISTER + TMS32031_AR6: IREG(tms, TMR_AR6) = info->i; break; - case CPUINFO_INT_REGISTER + TMS32031_AR7: IREG(tms, TMR_AR7) = info->i; break; - case CPUINFO_INT_REGISTER + TMS32031_DP: IREG(tms, TMR_DP) = info->i; break; - case CPUINFO_INT_REGISTER + TMS32031_IR0: IREG(tms, TMR_IR0) = info->i; break; - case CPUINFO_INT_REGISTER + TMS32031_IR1: IREG(tms, TMR_IR1) = info->i; break; - case CPUINFO_INT_REGISTER + TMS32031_BK: IREG(tms, TMR_BK) = info->i; break; + case CPUINFO_INT_REGISTER + TMS32031_AR0: IREG(tms, TMR_AR0) = info->i; break; + case CPUINFO_INT_REGISTER + TMS32031_AR1: IREG(tms, TMR_AR1) = info->i; break; + case CPUINFO_INT_REGISTER + TMS32031_AR2: IREG(tms, TMR_AR2) = info->i; break; + case CPUINFO_INT_REGISTER + TMS32031_AR3: IREG(tms, TMR_AR3) = info->i; break; + case CPUINFO_INT_REGISTER + TMS32031_AR4: IREG(tms, TMR_AR4) = info->i; break; + case CPUINFO_INT_REGISTER + TMS32031_AR5: IREG(tms, TMR_AR5) = info->i; break; + case CPUINFO_INT_REGISTER + TMS32031_AR6: IREG(tms, TMR_AR6) = info->i; break; + case CPUINFO_INT_REGISTER + TMS32031_AR7: IREG(tms, TMR_AR7) = info->i; break; + case CPUINFO_INT_REGISTER + TMS32031_DP: IREG(tms, TMR_DP) = info->i; break; + case CPUINFO_INT_REGISTER + TMS32031_IR0: IREG(tms, TMR_IR0) = info->i; break; + case CPUINFO_INT_REGISTER + TMS32031_IR1: IREG(tms, TMR_IR1) = info->i; break; + case CPUINFO_INT_REGISTER + TMS32031_BK: IREG(tms, TMR_BK) = info->i; break; case CPUINFO_INT_SP: - case CPUINFO_INT_REGISTER + TMS32031_SP: IREG(tms, TMR_SP) = info->i; break; - case CPUINFO_INT_REGISTER + TMS32031_ST: IREG(tms, TMR_ST) = info->i; break; - case CPUINFO_INT_REGISTER + TMS32031_IE: IREG(tms, TMR_IE) = info->i; break; - case CPUINFO_INT_REGISTER + TMS32031_IF: IREG(tms, TMR_IF) = info->i; break; - case CPUINFO_INT_REGISTER + TMS32031_IOF: IREG(tms, TMR_IOF) = info->i; break; - case CPUINFO_INT_REGISTER + TMS32031_RS: IREG(tms, TMR_RS) = info->i; break; - case CPUINFO_INT_REGISTER + TMS32031_RE: IREG(tms, TMR_RE) = info->i; break; - case CPUINFO_INT_REGISTER + TMS32031_RC: IREG(tms, TMR_RC) = info->i; break; + case CPUINFO_INT_REGISTER + TMS32031_SP: IREG(tms, TMR_SP) = info->i; break; + case CPUINFO_INT_REGISTER + TMS32031_ST: IREG(tms, TMR_ST) = info->i; break; + case CPUINFO_INT_REGISTER + TMS32031_IE: IREG(tms, TMR_IE) = info->i; break; + case CPUINFO_INT_REGISTER + TMS32031_IF: IREG(tms, TMR_IF) = info->i; break; + case CPUINFO_INT_REGISTER + TMS32031_IOF: IREG(tms, TMR_IOF) = info->i; break; + case CPUINFO_INT_REGISTER + TMS32031_RS: IREG(tms, TMR_RS) = info->i; break; + case CPUINFO_INT_REGISTER + TMS32031_RE: IREG(tms, TMR_RE) = info->i; break; + case CPUINFO_INT_REGISTER + TMS32031_RC: IREG(tms, TMR_RC) = info->i; break; } } @@ -710,11 +710,11 @@ CPU_GET_INFO( tms32031 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 24; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = -2; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + TMS32031_IRQ0: info->i = (IREG(tms, TMR_IF) & (1 << TMS32031_IRQ0)) ? ASSERT_LINE : CLEAR_LINE; break; case CPUINFO_INT_INPUT_STATE + TMS32031_IRQ1: info->i = (IREG(tms, TMR_IF) & (1 << TMS32031_IRQ1)) ? ASSERT_LINE : CLEAR_LINE; break; @@ -805,7 +805,7 @@ CPU_GET_INFO( tms32031 ) break; } - case CPUINFO_STR_REGISTER + TMS32031_PC: sprintf(info->s, "PC: %08X", tms->pc); break; + case CPUINFO_STR_REGISTER + TMS32031_PC: sprintf(info->s, "PC: %08X", tms->pc); break; case CPUINFO_STR_REGISTER + TMS32031_R0: sprintf(info->s, " R0:%08X", tms->r[TMR_R0].i32[0]); break; case CPUINFO_STR_REGISTER + TMS32031_R1: sprintf(info->s, " R1:%08X", tms->r[TMR_R1].i32[0]); break; diff --git a/src/emu/cpu/tms32051/tms32051.c b/src/emu/cpu/tms32051/tms32051.c index 73cf087a939..0d7eef12383 100644 --- a/src/emu/cpu/tms32051/tms32051.c +++ b/src/emu/cpu/tms32051/tms32051.c @@ -596,11 +596,11 @@ static CPU_GET_INFO( tms ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = -1; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 16; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 16; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = -1; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 16; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = -1; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE: info->i = CLEAR_LINE; break; @@ -691,7 +691,7 @@ static CPU_SET_INFO( tms32051 ) { case CPUINFO_INT_PC: case CPUINFO_INT_REGISTER + TMS32051_PC: cpustate->pc = info->i; break; - case CPUINFO_INT_REGISTER + TMS32051_ACC: cpustate->acc = info->i; break; + case CPUINFO_INT_REGISTER + TMS32051_ACC: cpustate->acc = info->i; break; case CPUINFO_INT_REGISTER + TMS32051_ACCB: cpustate->accb = info->i; break; case CPUINFO_INT_REGISTER + TMS32051_PREG: cpustate->preg = info->i; break; case CPUINFO_INT_REGISTER + TMS32051_TREG0: cpustate->treg0 = info->i; break; @@ -705,14 +705,14 @@ static CPU_SET_INFO( tms32051 ) case CPUINFO_INT_REGISTER + TMS32051_DP: cpustate->st0.dp = info->i; break; case CPUINFO_INT_REGISTER + TMS32051_ARP: cpustate->st0.arp = info->i; break; case CPUINFO_INT_REGISTER + TMS32051_ARB: cpustate->st1.arb = info->i; break; - case CPUINFO_INT_REGISTER + TMS32051_AR0: cpustate->ar[0] = info->i; break; - case CPUINFO_INT_REGISTER + TMS32051_AR1: cpustate->ar[1] = info->i; break; - case CPUINFO_INT_REGISTER + TMS32051_AR2: cpustate->ar[2] = info->i; break; - case CPUINFO_INT_REGISTER + TMS32051_AR3: cpustate->ar[3] = info->i; break; - case CPUINFO_INT_REGISTER + TMS32051_AR4: cpustate->ar[4] = info->i; break; - case CPUINFO_INT_REGISTER + TMS32051_AR5: cpustate->ar[5] = info->i; break; - case CPUINFO_INT_REGISTER + TMS32051_AR6: cpustate->ar[6] = info->i; break; - case CPUINFO_INT_REGISTER + TMS32051_AR7: cpustate->ar[7] = info->i; break; + case CPUINFO_INT_REGISTER + TMS32051_AR0: cpustate->ar[0] = info->i; break; + case CPUINFO_INT_REGISTER + TMS32051_AR1: cpustate->ar[1] = info->i; break; + case CPUINFO_INT_REGISTER + TMS32051_AR2: cpustate->ar[2] = info->i; break; + case CPUINFO_INT_REGISTER + TMS32051_AR3: cpustate->ar[3] = info->i; break; + case CPUINFO_INT_REGISTER + TMS32051_AR4: cpustate->ar[4] = info->i; break; + case CPUINFO_INT_REGISTER + TMS32051_AR5: cpustate->ar[5] = info->i; break; + case CPUINFO_INT_REGISTER + TMS32051_AR6: cpustate->ar[6] = info->i; break; + case CPUINFO_INT_REGISTER + TMS32051_AR7: cpustate->ar[7] = info->i; break; default: CPU_SET_INFO_CALL(tms); break; } diff --git a/src/emu/cpu/tms34010/34010gfx.c b/src/emu/cpu/tms34010/34010gfx.c index 66c5d0606d8..2e3995a5ee8 100644 --- a/src/emu/cpu/tms34010/34010gfx.c +++ b/src/emu/cpu/tms34010/34010gfx.c @@ -710,9 +710,9 @@ static void (*const fill_op_table[])(tms34010_state *tms, int) = #define RECURSIVE_INCLUDE /* non-transparent replace ops */ -#define PIXEL_OP(src, mask, pixel) pixel = pixel -#define PIXEL_OP_TIMING 2 -#define PIXEL_OP_REQUIRES_SOURCE 0 +#define PIXEL_OP(src, mask, pixel) pixel = pixel +#define PIXEL_OP_TIMING 2 +#define PIXEL_OP_REQUIRES_SOURCE 0 #define TRANSPARENCY 0 /* 1bpp cases */ @@ -756,9 +756,9 @@ static void (*const fill_op_table[])(tms34010_state *tms, int) = #undef PIXEL_OP -#define PIXEL_OP(src, mask, pixel) pixel = (*pixel_op)(src, mask, pixel) -#define PIXEL_OP_TIMING pixel_op_timing -#define PIXEL_OP_REQUIRES_SOURCE 1 +#define PIXEL_OP(src, mask, pixel) pixel = (*pixel_op)(src, mask, pixel) +#define PIXEL_OP_TIMING pixel_op_timing +#define PIXEL_OP_REQUIRES_SOURCE 1 #define TRANSPARENCY 0 /* 1bpp cases */ @@ -803,9 +803,9 @@ static void (*const fill_op_table[])(tms34010_state *tms, int) = /* transparent replace ops */ -#define PIXEL_OP(src, mask, pixel) pixel = pixel -#define PIXEL_OP_REQUIRES_SOURCE 0 -#define PIXEL_OP_TIMING 4 +#define PIXEL_OP(src, mask, pixel) pixel = pixel +#define PIXEL_OP_REQUIRES_SOURCE 0 +#define PIXEL_OP_TIMING 4 #define TRANSPARENCY 1 /* 1bpp cases */ @@ -849,8 +849,8 @@ static void (*const fill_op_table[])(tms34010_state *tms, int) = #undef PIXEL_OP -#define PIXEL_OP(src, mask, pixel) pixel = (*pixel_op)(src, mask, pixel) -#define PIXEL_OP_REQUIRES_SOURCE 1 +#define PIXEL_OP(src, mask, pixel) pixel = (*pixel_op)(src, mask, pixel) +#define PIXEL_OP_REQUIRES_SOURCE 1 #define PIXEL_OP_TIMING (2+pixel_op_timing) #define TRANSPARENCY 1 diff --git a/src/emu/cpu/tms34010/34010ops.c b/src/emu/cpu/tms34010/34010ops.c index d053a744565..3894adbc6d8 100644 --- a/src/emu/cpu/tms34010/34010ops.c +++ b/src/emu/cpu/tms34010/34010ops.c @@ -91,7 +91,7 @@ static void unimpl(tms34010_state *tms, UINT16 op) PUSH(tms, tms->st); RESET_ST(tms); tms->pc = RLONG(tms, 0xfffffc20); - COUNT_UNKNOWN_CYCLES(tms,16); + COUNT_UNKNOWN_CYCLES(tms,16); /* extra check to prevent bad things */ if (tms->pc == 0 || opcode_table[memory_decrypted_read_word(tms->program, TOBYTE(tms->pc)) >> 4] == unimpl) @@ -118,7 +118,7 @@ static void unimpl(tms34010_state *tms, UINT16 op) SET_C_BIT_LO(tms, b->y, 15); \ SET_Z_LOG(tms, b->y == 0); \ SET_V_BIT_LO(tms, b->x, 15); \ - COUNT_CYCLES(tms,1); \ + COUNT_CYCLES(tms,1); \ } static void add_xy_a(tms34010_state *tms, UINT16 op) { ADD_XY(A); } static void add_xy_b(tms34010_state *tms, UINT16 op) { ADD_XY(B); } @@ -134,7 +134,7 @@ static void add_xy_b(tms34010_state *tms, UINT16 op) { ADD_XY(B); } SET_V_LOG(tms, a.x > b->x); \ b->x -= a.x; \ b->y -= a.y; \ - COUNT_CYCLES(tms,1); \ + COUNT_CYCLES(tms,1); \ } static void sub_xy_a(tms34010_state *tms, UINT16 op) { SUB_XY(A); } static void sub_xy_b(tms34010_state *tms, UINT16 op) { SUB_XY(B); } @@ -151,7 +151,7 @@ static void sub_xy_b(tms34010_state *tms, UINT16 op) { SUB_XY(B); } res = a.y-b.y; \ SET_Z_LOG(tms, res == 0); \ SET_C_BIT_LO(tms, res, 15); \ - COUNT_CYCLES(tms,1); \ + COUNT_CYCLES(tms,1); \ } static void cmp_xy_a(tms34010_state *tms, UINT16 op) { CMP_XY(A); } static void cmp_xy_b(tms34010_state *tms, UINT16 op) { CMP_XY(B); } @@ -169,7 +169,7 @@ static void cmp_xy_b(tms34010_state *tms, UINT16 op) { CMP_XY(B); } res |= ((y > WEND_Y(tms)) ? 0x100 : 0); \ R##REG(tms,DSTREG(op)) = res; \ SET_V_LOG(tms, res != 0); \ - COUNT_CYCLES(tms,1); \ + COUNT_CYCLES(tms,1); \ } static void cpw_a(tms34010_state *tms, UINT16 op) { CPW(A); } static void cpw_b(tms34010_state *tms, UINT16 op) { CPW(B); } @@ -177,7 +177,7 @@ static void cpw_b(tms34010_state *tms, UINT16 op) { CPW(B); } #define CVXYL(R) \ { \ R##REG(tms,DSTREG(op)) = DXYTOL(tms,R##REG_XY(tms,SRCREG(op))); \ - COUNT_CYCLES(tms,3); \ + COUNT_CYCLES(tms,3); \ } static void cvxyl_a(tms34010_state *tms, UINT16 op) { CVXYL(A); } static void cvxyl_b(tms34010_state *tms, UINT16 op) { CVXYL(B); } @@ -185,7 +185,7 @@ static void cvxyl_b(tms34010_state *tms, UINT16 op) { CVXYL(B); } #define MOVX(R) \ { \ R##REG(tms,DSTREG(op)) = (R##REG(tms,DSTREG(op)) & 0xffff0000) | (UINT16)R##REG(tms,SRCREG(op)); \ - COUNT_CYCLES(tms,1); \ + COUNT_CYCLES(tms,1); \ } static void movx_a(tms34010_state *tms, UINT16 op) { MOVX(A); } static void movx_b(tms34010_state *tms, UINT16 op) { MOVX(B); } @@ -193,7 +193,7 @@ static void movx_b(tms34010_state *tms, UINT16 op) { MOVX(B); } #define MOVY(R) \ { \ R##REG(tms,DSTREG(op)) = (R##REG(tms,SRCREG(op)) & 0xffff0000) | (UINT16)R##REG(tms,DSTREG(op)); \ - COUNT_CYCLES(tms,1); \ + COUNT_CYCLES(tms,1); \ } static void movy_a(tms34010_state *tms, UINT16 op) { MOVY(A); } static void movy_b(tms34010_state *tms, UINT16 op) { MOVY(B); } @@ -205,14 +205,14 @@ static void movy_b(tms34010_state *tms, UINT16 op) { MOVY(B); } ***************************************************************************/ #define PIXT_RI(R) \ -{ \ +{ \ WPIXEL(tms,R##REG(tms,DSTREG(op)),R##REG(tms,SRCREG(op))); \ - COUNT_UNKNOWN_CYCLES(tms,2); \ + COUNT_UNKNOWN_CYCLES(tms,2); \ } static void pixt_ri_a(tms34010_state *tms, UINT16 op) { PIXT_RI(A); } static void pixt_ri_b(tms34010_state *tms, UINT16 op) { PIXT_RI(B); } -#define PIXT_RIXY(R) \ +#define PIXT_RIXY(R) \ { \ if (WINDOW_CHECKING(tms) != 0) \ { \ @@ -226,8 +226,8 @@ static void pixt_ri_b(tms34010_state *tms, UINT16 op) { PIXT_RI(B); } if (WINDOW_CHECKING(tms) == 1) goto skip; \ } \ WPIXEL(tms,DXYTOL(tms,R##REG_XY(tms,DSTREG(op))),R##REG(tms,SRCREG(op))); \ -skip: \ - COUNT_UNKNOWN_CYCLES(tms,4); \ +skip: \ + COUNT_UNKNOWN_CYCLES(tms,4); \ } static void pixt_rixy_a(tms34010_state *tms, UINT16 op) { PIXT_RIXY(A); } static void pixt_rixy_b(tms34010_state *tms, UINT16 op) { PIXT_RIXY(B); } @@ -236,33 +236,33 @@ static void pixt_rixy_b(tms34010_state *tms, UINT16 op) { PIXT_RIXY(B); } { \ INT32 temp = RPIXEL(tms,R##REG(tms,SRCREG(op))); \ CLR_V(tms); \ - R##REG(tms,DSTREG(op)) = temp; \ + R##REG(tms,DSTREG(op)) = temp; \ SET_V_LOG(tms, temp != 0); \ COUNT_CYCLES(tms,4); \ } static void pixt_ir_a(tms34010_state *tms, UINT16 op) { PIXT_IR(A); } static void pixt_ir_b(tms34010_state *tms, UINT16 op) { PIXT_IR(B); } -#define PIXT_II(R) \ +#define PIXT_II(R) \ { \ WPIXEL(tms,R##REG(tms,DSTREG(op)),RPIXEL(tms,R##REG(tms,SRCREG(op)))); \ - COUNT_UNKNOWN_CYCLES(tms,4); \ + COUNT_UNKNOWN_CYCLES(tms,4); \ } static void pixt_ii_a(tms34010_state *tms, UINT16 op) { PIXT_II(A); } static void pixt_ii_b(tms34010_state *tms, UINT16 op) { PIXT_II(B); } -#define PIXT_IXYR(R) \ +#define PIXT_IXYR(R) \ { \ INT32 temp = RPIXEL(tms,SXYTOL(tms,R##REG_XY(tms,SRCREG(op)))); \ CLR_V(tms); \ - R##REG(tms,DSTREG(op)) = temp; \ + R##REG(tms,DSTREG(op)) = temp; \ SET_V_LOG(tms, temp != 0); \ COUNT_CYCLES(tms,6); \ } static void pixt_ixyr_a(tms34010_state *tms, UINT16 op) { PIXT_IXYR(A); } static void pixt_ixyr_b(tms34010_state *tms, UINT16 op) { PIXT_IXYR(B); } -#define PIXT_IXYIXY(R) \ +#define PIXT_IXYIXY(R) \ { \ if (WINDOW_CHECKING(tms) != 0) \ { \ @@ -276,13 +276,13 @@ static void pixt_ixyr_b(tms34010_state *tms, UINT16 op) { PIXT_IXYR(B); } if (WINDOW_CHECKING(tms) == 1) goto skip; \ } \ WPIXEL(tms,DXYTOL(tms,R##REG_XY(tms,DSTREG(op))),RPIXEL(tms,SXYTOL(tms,R##REG_XY(tms,SRCREG(op))))); \ -skip: \ - COUNT_UNKNOWN_CYCLES(tms,7); \ +skip: \ + COUNT_UNKNOWN_CYCLES(tms,7); \ } static void pixt_ixyixy_a(tms34010_state *tms, UINT16 op) { PIXT_IXYIXY(A); } static void pixt_ixyixy_b(tms34010_state *tms, UINT16 op) { PIXT_IXYIXY(B); } -#define DRAV(R) \ +#define DRAV(R) \ { \ if (WINDOW_CHECKING(tms) != 0) \ { \ @@ -296,10 +296,10 @@ static void pixt_ixyixy_b(tms34010_state *tms, UINT16 op) { PIXT_IXYIXY(B); } if (WINDOW_CHECKING(tms) == 1) goto skip; \ } \ WPIXEL(tms,DXYTOL(tms,R##REG_XY(tms,DSTREG(op))),COLOR1(tms)); \ -skip: \ +skip: \ R##REG_X(tms,DSTREG(op)) += R##REG_X(tms,SRCREG(op)); \ R##REG_Y(tms,DSTREG(op)) += R##REG_Y(tms,SRCREG(op)); \ - COUNT_UNKNOWN_CYCLES(tms,4); \ + COUNT_UNKNOWN_CYCLES(tms,4); \ } static void drav_a(tms34010_state *tms, UINT16 op) { DRAV(A); } static void drav_b(tms34010_state *tms, UINT16 op) { DRAV(B); } @@ -310,7 +310,7 @@ static void drav_b(tms34010_state *tms, UINT16 op) { DRAV(B); } ARITHMETIC OPERATIONS ***************************************************************************/ -#define ABS(R) \ +#define ABS(R) \ { \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ INT32 r = 0 - *rd; \ @@ -323,8 +323,8 @@ static void drav_b(tms34010_state *tms, UINT16 op) { DRAV(B); } static void abs_a(tms34010_state *tms, UINT16 op) { ABS(A); } static void abs_b(tms34010_state *tms, UINT16 op) { ABS(B); } -#define ADD(R) \ -{ \ +#define ADD(R) \ +{ \ INT32 a = R##REG(tms,SRCREG(op)); \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ INT32 b = *rd; \ @@ -337,8 +337,8 @@ static void abs_b(tms34010_state *tms, UINT16 op) { ABS(B); } static void add_a(tms34010_state *tms, UINT16 op) { ADD(A); } static void add_b(tms34010_state *tms, UINT16 op) { ADD(B); } -#define ADDC(R) \ -{ \ +#define ADDC(R) \ +{ \ /* I'm not sure to which side the carry is added to, should */ \ /* verify it against the examples */ \ INT32 a = R##REG(tms,SRCREG(op)); \ @@ -353,8 +353,8 @@ static void add_b(tms34010_state *tms, UINT16 op) { ADD(B); } static void addc_a(tms34010_state *tms, UINT16 op) { ADDC(A); } static void addc_b(tms34010_state *tms, UINT16 op) { ADDC(B); } -#define ADDI_W(R) \ -{ \ +#define ADDI_W(R) \ +{ \ INT32 a = PARAM_WORD(tms); \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ INT32 b = *rd; \ @@ -367,8 +367,8 @@ static void addc_b(tms34010_state *tms, UINT16 op) { ADDC(B); } static void addi_w_a(tms34010_state *tms, UINT16 op) { ADDI_W(A); } static void addi_w_b(tms34010_state *tms, UINT16 op) { ADDI_W(B); } -#define ADDI_L(R) \ -{ \ +#define ADDI_L(R) \ +{ \ INT32 a = PARAM_LONG(tms); \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ INT32 b = *rd; \ @@ -381,8 +381,8 @@ static void addi_w_b(tms34010_state *tms, UINT16 op) { ADDI_W(B); } static void addi_l_a(tms34010_state *tms, UINT16 op) { ADDI_L(A); } static void addi_l_b(tms34010_state *tms, UINT16 op) { ADDI_L(B); } -#define ADDK(R) \ -{ \ +#define ADDK(R) \ +{ \ INT32 a = fw_inc[PARAM_K(op)]; \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ INT32 b = *rd; \ @@ -395,8 +395,8 @@ static void addi_l_b(tms34010_state *tms, UINT16 op) { ADDI_L(B); } static void addk_a(tms34010_state *tms, UINT16 op) { ADDK(A); } static void addk_b(tms34010_state *tms, UINT16 op) { ADDK(B); } -#define AND(R) \ -{ \ +#define AND(R) \ +{ \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ CLR_Z(tms); \ *rd &= R##REG(tms,SRCREG(op)); \ @@ -406,8 +406,8 @@ static void addk_b(tms34010_state *tms, UINT16 op) { ADDK(B); } static void and_a(tms34010_state *tms, UINT16 op) { AND(A); } static void and_b(tms34010_state *tms, UINT16 op) { AND(B); } -#define ANDI(R) \ -{ \ +#define ANDI(R) \ +{ \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ CLR_Z(tms); \ *rd &= ~PARAM_LONG(tms); \ @@ -417,8 +417,8 @@ static void and_b(tms34010_state *tms, UINT16 op) { AND(B); } static void andi_a(tms34010_state *tms, UINT16 op) { ANDI(A); } static void andi_b(tms34010_state *tms, UINT16 op) { ANDI(B); } -#define ANDN(R) \ -{ \ +#define ANDN(R) \ +{ \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ CLR_Z(tms); \ *rd &= ~R##REG(tms,SRCREG(op)); \ @@ -428,8 +428,8 @@ static void andi_b(tms34010_state *tms, UINT16 op) { ANDI(B); } static void andn_a(tms34010_state *tms, UINT16 op) { ANDN(A); } static void andn_b(tms34010_state *tms, UINT16 op) { ANDN(B); } -#define BTST_K(R) \ -{ \ +#define BTST_K(R) \ +{ \ int bit = 31 - PARAM_K(op); \ CLR_Z(tms); \ if (bit <= 29) \ @@ -441,7 +441,7 @@ static void andn_b(tms34010_state *tms, UINT16 op) { ANDN(B); } static void btst_k_a(tms34010_state *tms, UINT16 op) { BTST_K(A); } static void btst_k_b(tms34010_state *tms, UINT16 op) { BTST_K(B); } -#define BTST_R(R) \ +#define BTST_R(R) \ { \ int bit = R##REG(tms,SRCREG(op)) & 0x1f; \ CLR_Z(tms); \ @@ -460,7 +460,7 @@ static void clrc(tms34010_state *tms, UINT16 op) COUNT_CYCLES(tms,1); } -#define CMP(R) \ +#define CMP(R) \ { \ INT32 *rs = &R##REG(tms,SRCREG(op)); \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ @@ -472,7 +472,7 @@ static void clrc(tms34010_state *tms, UINT16 op) static void cmp_a(tms34010_state *tms, UINT16 op) { CMP(A); } static void cmp_b(tms34010_state *tms, UINT16 op) { CMP(B); } -#define CMPI_W(R) \ +#define CMPI_W(R) \ { \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ INT32 t = (INT16)~PARAM_WORD(tms); \ @@ -484,7 +484,7 @@ static void cmp_b(tms34010_state *tms, UINT16 op) { CMP(B); } static void cmpi_w_a(tms34010_state *tms, UINT16 op) { CMPI_W(A); } static void cmpi_w_b(tms34010_state *tms, UINT16 op) { CMPI_W(B); } -#define CMPI_L(R) \ +#define CMPI_L(R) \ { \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ INT32 t = ~PARAM_LONG(tms); \ @@ -502,7 +502,7 @@ static void dint(tms34010_state *tms, UINT16 op) COUNT_CYCLES(tms,3); } -#define DIVS(R) \ +#define DIVS(R) \ { \ INT32 *rs = &R##REG(tms,SRCREG(op)); \ INT32 *rd1 = &R##REG(tms,DSTREG(op)); \ @@ -519,7 +519,7 @@ static void dint(tms34010_state *tms, UINT16 op) INT64 dividend = ((UINT64)*rd1 << 32) | (UINT32)*rd2; \ INT64 quotient = dividend / *rs; \ INT32 remainder = dividend % *rs; \ - UINT32 signbits = (INT32)quotient >> 31; \ + UINT32 signbits = (INT32)quotient >> 31; \ if (EXTRACT_64HI(quotient) != signbits) \ { \ SET_V_LOG(tms, 1); \ @@ -550,8 +550,8 @@ static void dint(tms34010_state *tms, UINT16 op) static void divs_a(tms34010_state *tms, UINT16 op) { DIVS(A); } static void divs_b(tms34010_state *tms, UINT16 op) { DIVS(B); } -#define DIVU(R) \ -{ \ +#define DIVU(R) \ +{ \ INT32 *rs = &R##REG(tms,SRCREG(op)); \ INT32 *rd1 = &R##REG(tms,DSTREG(op)); \ CLR_ZV(tms); \ @@ -566,7 +566,7 @@ static void divs_b(tms34010_state *tms, UINT16 op) { DIVS(B); } INT32 *rd2 = &R##REG(tms,DSTREG(op)+1); \ UINT64 dividend = ((UINT64)*rd1 << 32) | (UINT32)*rd2; \ UINT64 quotient = dividend / (UINT32)*rs; \ - UINT32 remainder = dividend % (UINT32)*rs; \ + UINT32 remainder = dividend % (UINT32)*rs; \ if (EXTRACT_64HI(quotient) != 0) \ { \ SET_V_LOG(tms, 1); \ @@ -587,7 +587,7 @@ static void divs_b(tms34010_state *tms, UINT16 op) { DIVS(B); } } \ else \ { \ - *rd1 = (UINT32)*rd1 / (UINT32)*rs; \ + *rd1 = (UINT32)*rd1 / (UINT32)*rs; \ SET_Z_VAL(tms, *rd1); \ } \ } \ @@ -603,7 +603,7 @@ static void eint(tms34010_state *tms, UINT16 op) COUNT_CYCLES(tms,3); } -#define EXGF(F,R) \ +#define EXGF(F,R) \ { \ UINT8 shift = F ? 6 : 0; \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ @@ -618,7 +618,7 @@ static void exgf0_b(tms34010_state *tms, UINT16 op) { EXGF(0,B); } static void exgf1_a(tms34010_state *tms, UINT16 op) { EXGF(1,A); } static void exgf1_b(tms34010_state *tms, UINT16 op) { EXGF(1,B); } -#define LMO(R) \ +#define LMO(R) \ { \ UINT32 res = 0; \ UINT32 rs = R##REG(tms,SRCREG(op)); \ @@ -639,7 +639,7 @@ static void exgf1_b(tms34010_state *tms, UINT16 op) { EXGF(1,B); } static void lmo_a(tms34010_state *tms, UINT16 op) { LMO(A); } static void lmo_b(tms34010_state *tms, UINT16 op) { LMO(B); } -#define MMFM(R) \ +#define MMFM(R) \ { \ INT32 i; \ UINT16 l = (UINT16) PARAM_WORD(tms); \ @@ -661,8 +661,8 @@ static void lmo_b(tms34010_state *tms, UINT16 op) { LMO(B); } static void mmfm_a(tms34010_state *tms, UINT16 op) { MMFM(A); } static void mmfm_b(tms34010_state *tms, UINT16 op) { MMFM(B); } -#define MMTM(R) \ -{ \ +#define MMTM(R) \ +{ \ UINT32 i; \ UINT16 l = (UINT16) PARAM_WORD(tms); \ COUNT_CYCLES(tms,2); \ @@ -688,8 +688,8 @@ static void mmfm_b(tms34010_state *tms, UINT16 op) { MMFM(B); } static void mmtm_a(tms34010_state *tms, UINT16 op) { MMTM(A); } static void mmtm_b(tms34010_state *tms, UINT16 op) { MMTM(B); } -#define MODS(R) \ -{ \ +#define MODS(R) \ +{ \ INT32 *rs = &R##REG(tms,SRCREG(op)); \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ CLR_NZV(tms); \ @@ -705,8 +705,8 @@ static void mmtm_b(tms34010_state *tms, UINT16 op) { MMTM(B); } static void mods_a(tms34010_state *tms, UINT16 op) { MODS(A); } static void mods_b(tms34010_state *tms, UINT16 op) { MODS(B); } -#define MODU(R) \ -{ \ +#define MODU(R) \ +{ \ INT32 *rs = &R##REG(tms,SRCREG(op)); \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ CLR_ZV(tms); \ @@ -722,7 +722,7 @@ static void mods_b(tms34010_state *tms, UINT16 op) { MODS(B); } static void modu_a(tms34010_state *tms, UINT16 op) { MODU(A); } static void modu_b(tms34010_state *tms, UINT16 op) { MODU(B); } -#define MPYS(R) \ +#define MPYS(R) \ { \ INT32 *rd1 = &R##REG(tms,DSTREG(op)); \ INT32 m1 = R##REG(tms,SRCREG(op)); \ @@ -742,7 +742,7 @@ static void modu_b(tms34010_state *tms, UINT16 op) { MODU(B); } static void mpys_a(tms34010_state *tms, UINT16 op) { MPYS(A); } static void mpys_b(tms34010_state *tms, UINT16 op) { MPYS(B); } -#define MPYU(R) \ +#define MPYU(R) \ { \ INT32 *rd1 = &R##REG(tms,DSTREG(op)); \ UINT32 m1 = R##REG(tms,SRCREG(op)); \ @@ -761,8 +761,8 @@ static void mpys_b(tms34010_state *tms, UINT16 op) { MPYS(B); } static void mpyu_a(tms34010_state *tms, UINT16 op) { MPYU(A); } static void mpyu_b(tms34010_state *tms, UINT16 op) { MPYU(B); } -#define NEG(R) \ -{ \ +#define NEG(R) \ +{ \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ INT32 r = 0 - *rd; \ CLR_NCZV(tms); \ @@ -773,8 +773,8 @@ static void mpyu_b(tms34010_state *tms, UINT16 op) { MPYU(B); } static void neg_a(tms34010_state *tms, UINT16 op) { NEG(A); } static void neg_b(tms34010_state *tms, UINT16 op) { NEG(B); } -#define NEGB(R) \ -{ \ +#define NEGB(R) \ +{ \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ INT32 t = *rd + (C_FLAG(tms) ? 1 : 0); \ INT32 r = 0 - t; \ @@ -791,8 +791,8 @@ static void nop(tms34010_state *tms, UINT16 op) COUNT_CYCLES(tms,1); } -#define NOT(R) \ -{ \ +#define NOT(R) \ +{ \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ CLR_Z(tms); \ *rd = ~(*rd); \ @@ -802,8 +802,8 @@ static void nop(tms34010_state *tms, UINT16 op) static void not_a(tms34010_state *tms, UINT16 op) { NOT(A); } static void not_b(tms34010_state *tms, UINT16 op) { NOT(B); } -#define OR(R) \ -{ \ +#define OR(R) \ +{ \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ CLR_Z(tms); \ *rd |= R##REG(tms,SRCREG(op)); \ @@ -813,8 +813,8 @@ static void not_b(tms34010_state *tms, UINT16 op) { NOT(B); } static void or_a(tms34010_state *tms, UINT16 op) { OR(A); } static void or_b(tms34010_state *tms, UINT16 op) { OR(B); } -#define ORI(R) \ -{ \ +#define ORI(R) \ +{ \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ CLR_Z(tms); \ *rd |= PARAM_LONG(tms); \ @@ -841,7 +841,7 @@ static void setf0(tms34010_state *tms, UINT16 op) { SETF(0); } static void setf1(tms34010_state *tms, UINT16 op) { SETF(1); } #define SEXT(F,R) \ -{ \ +{ \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ CLR_NZ(tms); \ SEXTEND(*rd,FW(tms,F)); \ @@ -853,8 +853,8 @@ static void sext0_b(tms34010_state *tms, UINT16 op) { SEXT(0,B); } static void sext1_a(tms34010_state *tms, UINT16 op) { SEXT(1,A); } static void sext1_b(tms34010_state *tms, UINT16 op) { SEXT(1,B); } -#define RL(R,K) \ -{ \ +#define RL(R,K) \ +{ \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ INT32 res = *rd; \ INT32 k = (K); \ @@ -876,7 +876,7 @@ static void rl_r_a(tms34010_state *tms, UINT16 op) { RL(A,AREG(tms,SRCREG(op))&0 static void rl_r_b(tms34010_state *tms, UINT16 op) { RL(B,BREG(tms,SRCREG(op))&0x1f); } #define SLA(R,K) \ -{ \ +{ \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ UINT32 res = *rd; \ INT32 k = K; \ @@ -901,7 +901,7 @@ static void sla_r_a(tms34010_state *tms, UINT16 op) { SLA(A,AREG(tms,SRCREG(op)) static void sla_r_b(tms34010_state *tms, UINT16 op) { SLA(B,BREG(tms,SRCREG(op))&0x1f); } #define SLL(R,K) \ -{ \ +{ \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ UINT32 res = *rd; \ INT32 k = K; \ @@ -922,7 +922,7 @@ static void sll_r_a(tms34010_state *tms, UINT16 op) { SLL(A,AREG(tms,SRCREG(op)) static void sll_r_b(tms34010_state *tms, UINT16 op) { SLL(B,BREG(tms,SRCREG(op))&0x1f); } #define SRA(R,K) \ -{ \ +{ \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ INT32 res = *rd; \ INT32 k = (-(K)) & 0x1f; \ @@ -943,7 +943,7 @@ static void sra_r_a(tms34010_state *tms, UINT16 op) { SRA(A,AREG(tms,SRCREG(op)) static void sra_r_b(tms34010_state *tms, UINT16 op) { SRA(B,BREG(tms,SRCREG(op))); } #define SRL(R,K) \ -{ \ +{ \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ UINT32 res = *rd; \ INT32 k = (-(K)) & 0x1f; \ @@ -963,8 +963,8 @@ static void srl_k_b(tms34010_state *tms, UINT16 op) { SRL(B,PARAM_K(op)); } static void srl_r_a(tms34010_state *tms, UINT16 op) { SRL(A,AREG(tms,SRCREG(op))); } static void srl_r_b(tms34010_state *tms, UINT16 op) { SRL(B,BREG(tms,SRCREG(op))); } -#define SUB(R) \ -{ \ +#define SUB(R) \ +{ \ INT32 *rs = &R##REG(tms,SRCREG(op)); \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ INT32 r = *rd - *rs; \ @@ -976,8 +976,8 @@ static void srl_r_b(tms34010_state *tms, UINT16 op) { SRL(B,BREG(tms,SRCREG(op)) static void sub_a(tms34010_state *tms, UINT16 op) { SUB(A); } static void sub_b(tms34010_state *tms, UINT16 op) { SUB(B); } -#define SUBB(R) \ -{ \ +#define SUBB(R) \ +{ \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ INT32 t = R##REG(tms,SRCREG(op)); \ INT32 r = *rd - t - (C_FLAG(tms) ? 1 : 0); \ @@ -989,8 +989,8 @@ static void sub_b(tms34010_state *tms, UINT16 op) { SUB(B); } static void subb_a(tms34010_state *tms, UINT16 op) { SUBB(A); } static void subb_b(tms34010_state *tms, UINT16 op) { SUBB(B); } -#define SUBI_W(R) \ -{ \ +#define SUBI_W(R) \ +{ \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ INT32 r; \ INT32 t = ~PARAM_WORD(tms); \ @@ -1003,8 +1003,8 @@ static void subb_b(tms34010_state *tms, UINT16 op) { SUBB(B); } static void subi_w_a(tms34010_state *tms, UINT16 op) { SUBI_W(A); } static void subi_w_b(tms34010_state *tms, UINT16 op) { SUBI_W(B); } -#define SUBI_L(R) \ -{ \ +#define SUBI_L(R) \ +{ \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ INT32 t = ~PARAM_LONG(tms); \ INT32 r = *rd - t; \ @@ -1016,8 +1016,8 @@ static void subi_w_b(tms34010_state *tms, UINT16 op) { SUBI_W(B); } static void subi_l_a(tms34010_state *tms, UINT16 op) { SUBI_L(A); } static void subi_l_b(tms34010_state *tms, UINT16 op) { SUBI_L(B); } -#define SUBK(R) \ -{ \ +#define SUBK(R) \ +{ \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ INT32 t = fw_inc[PARAM_K(op)]; \ INT32 r = *rd - t; \ @@ -1029,8 +1029,8 @@ static void subi_l_b(tms34010_state *tms, UINT16 op) { SUBI_L(B); } static void subk_a(tms34010_state *tms, UINT16 op) { SUBK(A); } static void subk_b(tms34010_state *tms, UINT16 op) { SUBK(B); } -#define XOR(R) \ -{ \ +#define XOR(R) \ +{ \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ CLR_Z(tms); \ *rd ^= R##REG(tms,SRCREG(op)); \ @@ -1040,8 +1040,8 @@ static void subk_b(tms34010_state *tms, UINT16 op) { SUBK(B); } static void xor_a(tms34010_state *tms, UINT16 op) { XOR(A); } static void xor_b(tms34010_state *tms, UINT16 op) { XOR(B); } -#define XORI(R) \ -{ \ +#define XORI(R) \ +{ \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ CLR_Z(tms); \ *rd ^= PARAM_LONG(tms); \ @@ -1070,8 +1070,8 @@ static void zext1_b(tms34010_state *tms, UINT16 op) { ZEXT(1,B); } MOVE INSTRUCTIONS ***************************************************************************/ -#define MOVI_W(R) \ -{ \ +#define MOVI_W(R) \ +{ \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ CLR_NZV(tms); \ *rd=PARAM_WORD(tms); \ @@ -1081,8 +1081,8 @@ static void zext1_b(tms34010_state *tms, UINT16 op) { ZEXT(1,B); } static void movi_w_a(tms34010_state *tms, UINT16 op) { MOVI_W(A); } static void movi_w_b(tms34010_state *tms, UINT16 op) { MOVI_W(B); } -#define MOVI_L(R) \ -{ \ +#define MOVI_L(R) \ +{ \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ CLR_NZV(tms); \ *rd=PARAM_LONG(tms); \ @@ -1092,7 +1092,7 @@ static void movi_w_b(tms34010_state *tms, UINT16 op) { MOVI_W(B); } static void movi_l_a(tms34010_state *tms, UINT16 op) { MOVI_L(A); } static void movi_l_b(tms34010_state *tms, UINT16 op) { MOVI_L(B); } -#define MOVK(R) \ +#define MOVK(R) \ { \ INT32 k = PARAM_K(op); if (!k) k = 32; \ R##REG(tms,DSTREG(op)) = k; \ @@ -1101,7 +1101,7 @@ static void movi_l_b(tms34010_state *tms, UINT16 op) { MOVI_L(B); } static void movk_a(tms34010_state *tms, UINT16 op) { MOVK(A); } static void movk_b(tms34010_state *tms, UINT16 op) { MOVK(B); } -#define MOVB_RN(R) \ +#define MOVB_RN(R) \ { \ WBYTE(tms, R##REG(tms,DSTREG(op)),R##REG(tms,SRCREG(op))); \ COUNT_CYCLES(tms,1); \ @@ -1109,8 +1109,8 @@ static void movk_b(tms34010_state *tms, UINT16 op) { MOVK(B); } static void movb_rn_a(tms34010_state *tms, UINT16 op) { MOVB_RN(A); } static void movb_rn_b(tms34010_state *tms, UINT16 op) { MOVB_RN(B); } -#define MOVB_NR(R) \ -{ \ +#define MOVB_NR(R) \ +{ \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ CLR_NZV(tms); \ *rd = (INT8)RBYTE(tms, R##REG(tms,SRCREG(op))); \ @@ -1128,8 +1128,8 @@ static void movb_nr_b(tms34010_state *tms, UINT16 op) { MOVB_NR(B); } static void movb_nn_a(tms34010_state *tms, UINT16 op) { MOVB_NN(A); } static void movb_nn_b(tms34010_state *tms, UINT16 op) { MOVB_NN(B); } -#define MOVB_R_NO(R) \ -{ \ +#define MOVB_R_NO(R) \ +{ \ INT32 o = PARAM_WORD(tms); \ WBYTE(tms, R##REG(tms,DSTREG(op))+o,R##REG(tms,SRCREG(op))); \ COUNT_CYCLES(tms,3); \ @@ -1137,8 +1137,8 @@ static void movb_nn_b(tms34010_state *tms, UINT16 op) { MOVB_NN(B); } static void movb_r_no_a(tms34010_state *tms, UINT16 op) { MOVB_R_NO(A); } static void movb_r_no_b(tms34010_state *tms, UINT16 op) { MOVB_R_NO(B); } -#define MOVB_NO_R(R) \ -{ \ +#define MOVB_NO_R(R) \ +{ \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ INT32 o = PARAM_WORD(tms); \ CLR_NZV(tms); \ @@ -1149,7 +1149,7 @@ static void movb_r_no_b(tms34010_state *tms, UINT16 op) { MOVB_R_NO(B); } static void movb_no_r_a(tms34010_state *tms, UINT16 op) { MOVB_NO_R(A); } static void movb_no_r_b(tms34010_state *tms, UINT16 op) { MOVB_NO_R(B); } -#define MOVB_NO_NO(R) \ +#define MOVB_NO_NO(R) \ { \ INT32 o1 = PARAM_WORD(tms); \ INT32 o2 = PARAM_WORD(tms); \ @@ -1159,7 +1159,7 @@ static void movb_no_r_b(tms34010_state *tms, UINT16 op) { MOVB_NO_R(B); } static void movb_no_no_a(tms34010_state *tms, UINT16 op) { MOVB_NO_NO(A); } static void movb_no_no_b(tms34010_state *tms, UINT16 op) { MOVB_NO_NO(B); } -#define MOVB_RA(R) \ +#define MOVB_RA(R) \ { \ WBYTE(tms, PARAM_LONG(tms),R##REG(tms,DSTREG(op))); \ COUNT_CYCLES(tms,1); \ @@ -1167,8 +1167,8 @@ static void movb_no_no_b(tms34010_state *tms, UINT16 op) { MOVB_NO_NO(B); } static void movb_ra_a(tms34010_state *tms, UINT16 op) { MOVB_RA(A); } static void movb_ra_b(tms34010_state *tms, UINT16 op) { MOVB_RA(B); } -#define MOVB_AR(R) \ -{ \ +#define MOVB_AR(R) \ +{ \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ CLR_NZV(tms); \ *rd = (INT8)RBYTE(tms, PARAM_LONG(tms)); \ @@ -1185,7 +1185,7 @@ static void movb_aa(tms34010_state *tms, UINT16 op) COUNT_CYCLES(tms,6); } -#define MOVE_RR(RS,RD) \ +#define MOVE_RR(RS,RD) \ { \ INT32 *rd = &RD##REG(tms,DSTREG(op)); \ CLR_NZV(tms); \ @@ -1198,7 +1198,7 @@ static void move_rr_b (tms34010_state *tms, UINT16 op) { MOVE_RR(B,B); } static void move_rr_ax(tms34010_state *tms, UINT16 op) { MOVE_RR(A,B); } static void move_rr_bx(tms34010_state *tms, UINT16 op) { MOVE_RR(B,A); } -#define MOVE_RN(F,R) \ +#define MOVE_RN(F,R) \ { \ WFIELD##F(tms,R##REG(tms,DSTREG(op)),R##REG(tms,SRCREG(op))); \ COUNT_CYCLES(tms,1); \ @@ -1208,7 +1208,7 @@ static void move0_rn_b (tms34010_state *tms, UINT16 op) { MOVE_RN(0,B); } static void move1_rn_a (tms34010_state *tms, UINT16 op) { MOVE_RN(1,A); } static void move1_rn_b (tms34010_state *tms, UINT16 op) { MOVE_RN(1,B); } -#define MOVE_R_DN(F,R) \ +#define MOVE_R_DN(F,R) \ { \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ *rd-=fw_inc[FW(tms,F)]; \ @@ -1220,8 +1220,8 @@ static void move0_r_dn_b (tms34010_state *tms, UINT16 op) { MOVE_R_DN(0,B); } static void move1_r_dn_a (tms34010_state *tms, UINT16 op) { MOVE_R_DN(1,A); } static void move1_r_dn_b (tms34010_state *tms, UINT16 op) { MOVE_R_DN(1,B); } -#define MOVE_R_NI(F,R) \ -{ \ +#define MOVE_R_NI(F,R) \ +{ \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ WFIELD##F(tms,*rd,R##REG(tms,SRCREG(op))); \ *rd+=fw_inc[FW(tms,F)]; \ @@ -1232,7 +1232,7 @@ static void move0_r_ni_b (tms34010_state *tms, UINT16 op) { MOVE_R_NI(0,B); } static void move1_r_ni_a (tms34010_state *tms, UINT16 op) { MOVE_R_NI(1,A); } static void move1_r_ni_b (tms34010_state *tms, UINT16 op) { MOVE_R_NI(1,B); } -#define MOVE_NR(F,R) \ +#define MOVE_NR(F,R) \ { \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ CLR_NZV(tms); \ @@ -1245,8 +1245,8 @@ static void move0_nr_b (tms34010_state *tms, UINT16 op) { MOVE_NR(0,B); } static void move1_nr_a (tms34010_state *tms, UINT16 op) { MOVE_NR(1,A); } static void move1_nr_b (tms34010_state *tms, UINT16 op) { MOVE_NR(1,B); } -#define MOVE_DN_R(F,R) \ -{ \ +#define MOVE_DN_R(F,R) \ +{ \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ INT32 *rs = &R##REG(tms,SRCREG(op)); \ CLR_NZV(tms); \ @@ -1260,8 +1260,8 @@ static void move0_dn_r_b (tms34010_state *tms, UINT16 op) { MOVE_DN_R(0,B); } static void move1_dn_r_a (tms34010_state *tms, UINT16 op) { MOVE_DN_R(1,A); } static void move1_dn_r_b (tms34010_state *tms, UINT16 op) { MOVE_DN_R(1,B); } -#define MOVE_NI_R(F,R) \ -{ \ +#define MOVE_NI_R(F,R) \ +{ \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ INT32 *rs = &R##REG(tms,SRCREG(op)); \ INT32 data = RFIELD##F(tms,*rs); \ @@ -1276,8 +1276,8 @@ static void move0_ni_r_b (tms34010_state *tms, UINT16 op) { MOVE_NI_R(0,B); } static void move1_ni_r_a (tms34010_state *tms, UINT16 op) { MOVE_NI_R(1,A); } static void move1_ni_r_b (tms34010_state *tms, UINT16 op) { MOVE_NI_R(1,B); } -#define MOVE_NN(F,R) \ -{ \ +#define MOVE_NN(F,R) \ +{ \ WFIELD##F(tms,R##REG(tms,DSTREG(op)),RFIELD##F(tms,R##REG(tms,SRCREG(op)))); \ COUNT_CYCLES(tms,3); \ } @@ -1286,8 +1286,8 @@ static void move0_nn_b (tms34010_state *tms, UINT16 op) { MOVE_NN(0,B); } static void move1_nn_a (tms34010_state *tms, UINT16 op) { MOVE_NN(1,A); } static void move1_nn_b (tms34010_state *tms, UINT16 op) { MOVE_NN(1,B); } -#define MOVE_DN_DN(F,R) \ -{ \ +#define MOVE_DN_DN(F,R) \ +{ \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ INT32 *rs = &R##REG(tms,SRCREG(op)); \ INT32 data; \ @@ -1302,8 +1302,8 @@ static void move0_dn_dn_b (tms34010_state *tms, UINT16 op) { MOVE_DN_DN(0,B); } static void move1_dn_dn_a (tms34010_state *tms, UINT16 op) { MOVE_DN_DN(1,A); } static void move1_dn_dn_b (tms34010_state *tms, UINT16 op) { MOVE_DN_DN(1,B); } -#define MOVE_NI_NI(F,R) \ -{ \ +#define MOVE_NI_NI(F,R) \ +{ \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ INT32 *rs = &R##REG(tms,SRCREG(op)); \ INT32 data = RFIELD##F(tms,*rs); \ @@ -1317,8 +1317,8 @@ static void move0_ni_ni_b (tms34010_state *tms, UINT16 op) { MOVE_NI_NI(0,B); } static void move1_ni_ni_a (tms34010_state *tms, UINT16 op) { MOVE_NI_NI(1,A); } static void move1_ni_ni_b (tms34010_state *tms, UINT16 op) { MOVE_NI_NI(1,B); } -#define MOVE_R_NO(F,R) \ -{ \ +#define MOVE_R_NO(F,R) \ +{ \ INT32 o = PARAM_WORD(tms); \ WFIELD##F(tms,R##REG(tms,DSTREG(op))+o,R##REG(tms,SRCREG(op))); \ COUNT_CYCLES(tms,3); \ @@ -1328,8 +1328,8 @@ static void move0_r_no_b (tms34010_state *tms, UINT16 op) { MOVE_R_NO(0,B); } static void move1_r_no_a (tms34010_state *tms, UINT16 op) { MOVE_R_NO(1,A); } static void move1_r_no_b (tms34010_state *tms, UINT16 op) { MOVE_R_NO(1,B); } -#define MOVE_NO_R(F,R) \ -{ \ +#define MOVE_NO_R(F,R) \ +{ \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ INT32 o = PARAM_WORD(tms); \ CLR_NZV(tms); \ @@ -1342,8 +1342,8 @@ static void move0_no_r_b (tms34010_state *tms, UINT16 op) { MOVE_NO_R(0,B); } static void move1_no_r_a (tms34010_state *tms, UINT16 op) { MOVE_NO_R(1,A); } static void move1_no_r_b (tms34010_state *tms, UINT16 op) { MOVE_NO_R(1,B); } -#define MOVE_NO_NI(F,R) \ -{ \ +#define MOVE_NO_NI(F,R) \ +{ \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ INT32 o = PARAM_WORD(tms); \ INT32 data = RFIELD##F(tms,R##REG(tms,SRCREG(op))+o); \ @@ -1356,8 +1356,8 @@ static void move0_no_ni_b (tms34010_state *tms, UINT16 op) { MOVE_NO_NI(0,B); } static void move1_no_ni_a (tms34010_state *tms, UINT16 op) { MOVE_NO_NI(1,A); } static void move1_no_ni_b (tms34010_state *tms, UINT16 op) { MOVE_NO_NI(1,B); } -#define MOVE_NO_NO(F,R) \ -{ \ +#define MOVE_NO_NO(F,R) \ +{ \ INT32 o1 = PARAM_WORD(tms); \ INT32 o2 = PARAM_WORD(tms); \ INT32 data = RFIELD##F(tms,R##REG(tms,SRCREG(op))+o1); \ @@ -1369,8 +1369,8 @@ static void move0_no_no_b (tms34010_state *tms, UINT16 op) { MOVE_NO_NO(0,B); } static void move1_no_no_a (tms34010_state *tms, UINT16 op) { MOVE_NO_NO(1,A); } static void move1_no_no_b (tms34010_state *tms, UINT16 op) { MOVE_NO_NO(1,B); } -#define MOVE_RA(F,R) \ -{ \ +#define MOVE_RA(F,R) \ +{ \ WFIELD##F(tms,PARAM_LONG(tms),R##REG(tms,DSTREG(op))); \ COUNT_CYCLES(tms,3); \ } @@ -1379,8 +1379,8 @@ static void move0_ra_b (tms34010_state *tms, UINT16 op) { MOVE_RA(0,B); } static void move1_ra_a (tms34010_state *tms, UINT16 op) { MOVE_RA(1,A); } static void move1_ra_b (tms34010_state *tms, UINT16 op) { MOVE_RA(1,B); } -#define MOVE_AR(F,R) \ -{ \ +#define MOVE_AR(F,R) \ +{ \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ CLR_NZV(tms); \ *rd = RFIELD##F(tms,PARAM_LONG(tms)); \ @@ -1392,8 +1392,8 @@ static void move0_ar_b (tms34010_state *tms, UINT16 op) { MOVE_AR(0,B); } static void move1_ar_a (tms34010_state *tms, UINT16 op) { MOVE_AR(1,A); } static void move1_ar_b (tms34010_state *tms, UINT16 op) { MOVE_AR(1,B); } -#define MOVE_A_NI(F,R) \ -{ \ +#define MOVE_A_NI(F,R) \ +{ \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ WFIELD##F(tms,*rd,RFIELD##F(tms,PARAM_LONG(tms))); \ *rd+=fw_inc[FW(tms,F)]; \ @@ -1404,7 +1404,7 @@ static void move0_a_ni_b (tms34010_state *tms, UINT16 op) { MOVE_A_NI(0,B); } static void move1_a_ni_a (tms34010_state *tms, UINT16 op) { MOVE_A_NI(1,A); } static void move1_a_ni_b (tms34010_state *tms, UINT16 op) { MOVE_A_NI(1,B); } -#define MOVE_AA(F) \ +#define MOVE_AA(F) \ { \ UINT32 bitaddrs=PARAM_LONG(tms); \ WFIELD##F(tms,PARAM_LONG(tms),RFIELD##F(tms,bitaddrs)); \ @@ -1509,7 +1509,7 @@ static void dsjne_a (tms34010_state *tms, UINT16 op) { DSJNE(A); } static void dsjne_b (tms34010_state *tms, UINT16 op) { DSJNE(B); } #define DSJS(R) \ -{ \ +{ \ if (op & 0x0400) \ { \ if (--R##REG(tms,DSTREG(op))) \ @@ -1541,7 +1541,7 @@ static void emu(tms34010_state *tms, UINT16 op) } #define EXGPC(R) \ -{ \ +{ \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ INT32 temppc = *rd; \ *rd = tms->pc; \ @@ -1561,15 +1561,15 @@ static void getpc_a (tms34010_state *tms, UINT16 op) { GETPC(A); } static void getpc_b (tms34010_state *tms, UINT16 op) { GETPC(B); } #define GETST(R) \ -{ \ +{ \ R##REG(tms,DSTREG(op)) = tms->st; \ COUNT_CYCLES(tms,1); \ } static void getst_a (tms34010_state *tms, UINT16 op) { GETST(A); } static void getst_b (tms34010_state *tms, UINT16 op) { GETST(B); } -#define j_xx_8(TAKE) \ -{ \ +#define j_xx_8(TAKE) \ +{ \ if (DSTREG(op)) \ { \ if (TAKE) \ @@ -2027,7 +2027,7 @@ New 34020 ops: SET_C_BIT_LO(tms, b->y, 15); \ SET_Z_LOG(tms, b->y == 0); \ SET_V_BIT_LO(tms, b->x, 15); \ - COUNT_CYCLES(tms,1); \ + COUNT_CYCLES(tms,1); \ } static void addxyi_a(tms34010_state *tms, UINT16 op) { @@ -2187,7 +2187,7 @@ static void cmovmc_b(tms34010_state *tms, UINT16 op) logerror("020:cmovmc_b\n"); } -#define CMPK(R) \ +#define CMPK(R) \ { \ INT32 r; \ INT32 *rd = &R##REG(tms,DSTREG(op)); \ @@ -2321,7 +2321,7 @@ static void retm(tms34010_state *tms, UINT16 op) logerror("020:retm\n"); } -#define RMO(R) \ +#define RMO(R) \ { \ UINT32 res = 0; \ UINT32 rs = R##REG(tms,SRCREG(op)); \ @@ -2350,8 +2350,8 @@ static void rmo_b(tms34010_state *tms, UINT16 op) { RMO(B); } { \ case 0: \ v = (v & 1) ? 0xffffffff : 0x00000000;\ - COUNT_CYCLES(tms,8); \ - break; \ + COUNT_CYCLES(tms,8); \ + break; \ case 1: \ v &= 3; \ v |= v << 2; \ diff --git a/src/emu/cpu/tms34010/34010ops.h b/src/emu/cpu/tms34010/34010ops.h index 55c0be7680f..c54d3d6f610 100644 --- a/src/emu/cpu/tms34010/34010ops.h +++ b/src/emu/cpu/tms34010/34010ops.h @@ -44,8 +44,8 @@ INLINE void TMS34010_WRMEM_DWORD(tms34010_state *tms, offs_t A,UINT32 V) /* IO registers accessor */ #define IOREG(T,reg) ((T)->IOregs[reg]) #define SMART_IOREG(T,reg) ((T)->IOregs[(T)->is_34020 ? (int)REG020_##reg : (int)REG_##reg]) -#define PBH(T) (IOREG(T, REG_CONTROL) & 0x0100) -#define PBV(T) (IOREG(T, REG_CONTROL) & 0x0200) +#define PBH(T) (IOREG(T, REG_CONTROL) & 0x0100) +#define PBV(T) (IOREG(T, REG_CONTROL) & 0x0200) @@ -53,10 +53,10 @@ INLINE void TMS34010_WRMEM_DWORD(tms34010_state *tms, offs_t A,UINT32 V) FIELD WRITE MACROS ***************************************************************************/ -#define WFIELDMAC(T,MASK,MAX) \ - UINT32 shift = offset & 0x0f; \ +#define WFIELDMAC(T,MASK,MAX) \ + UINT32 shift = offset & 0x0f; \ UINT32 masked_data = data & (MASK); \ - UINT32 old; \ + UINT32 old; \ \ offset = TOBYTE(offset & 0xfffffff0); \ \ @@ -67,14 +67,14 @@ INLINE void TMS34010_WRMEM_DWORD(tms34010_state *tms, offs_t A,UINT32 V) } \ else \ { \ - old = (UINT32)TMS34010_RDMEM_WORD(T, offset) & ~((MASK) << shift); \ + old = (UINT32)TMS34010_RDMEM_WORD(T, offset) & ~((MASK) << shift); \ TMS34010_WRMEM_WORD(T, offset, ((masked_data & (MASK)) << shift) | old); \ } \ #define WFIELDMAC_BIG(T,MASK,MAX) \ - UINT32 shift = offset & 0x0f; \ + UINT32 shift = offset & 0x0f; \ UINT32 masked_data = data & (MASK); \ - UINT32 old; \ + UINT32 old; \ \ offset = TOBYTE(offset & 0xfffffff0); \ \ diff --git a/src/emu/cpu/tms34010/34010tbl.c b/src/emu/cpu/tms34010/34010tbl.c index 5f589ffebd8..05b7369d94f 100644 --- a/src/emu/cpu/tms34010/34010tbl.c +++ b/src/emu/cpu/tms34010/34010tbl.c @@ -490,8 +490,8 @@ static void (*const opcode_table[65536 >> 4])(tms34010_state *tms, UINT16 op) = btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, /* 0x1f00 */ - btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, - btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, + btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, + btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, /* 0x2000 */ sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, diff --git a/src/emu/cpu/tms34010/tms34010.c b/src/emu/cpu/tms34010/tms34010.c index e25d3f7a68e..1b9319825e3 100644 --- a/src/emu/cpu/tms34010/tms34010.c +++ b/src/emu/cpu/tms34010/tms34010.c @@ -49,18 +49,18 @@ struct _tms34010_state void (*pixel_write)(tms34010_state *tms, offs_t offset, UINT32 data); UINT32 (*pixel_read)(tms34010_state *tms, offs_t offset); UINT32 (*raster_op)(tms34010_state *tms, UINT32 newpix, UINT32 oldpix); - UINT32 convsp; - UINT32 convdp; - UINT32 convmp; + UINT32 convsp; + UINT32 convdp; + UINT32 convmp; UINT16 * shiftreg; - INT32 gfxcycles; - UINT8 pixelshift; - UINT8 is_34020; - UINT8 reset_deferred; - UINT8 hblank_stable; + INT32 gfxcycles; + UINT8 pixelshift; + UINT8 is_34020; + UINT8 reset_deferred; + UINT8 hblank_stable; UINT8 external_host_access; UINT8 executing; - cpu_irq_callback irq_callback; + cpu_irq_callback irq_callback; const device_config *device; const address_space *program; const tms34010_config *config; @@ -357,7 +357,7 @@ INLINE INT32 POP(tms34010_state *tms) PIXEL READS ***************************************************************************/ -#define RP(T,m1,m2) \ +#define RP(T,m1,m2) \ /* TODO: Plane masking */ \ return (TMS34010_RDMEM_WORD(T, TOBYTE(offset & 0xfffffff0)) >> (offset & m1)) & m2; @@ -393,7 +393,7 @@ static UINT32 read_pixel_shiftreg(tms34010_state *tms, offs_t offset) ***************************************************************************/ /* No Raster Op + No Transparency */ -#define WP(T,m1,m2) \ +#define WP(T,m1,m2) \ UINT32 a = TOBYTE(offset & 0xfffffff0); \ UINT32 pix = TMS34010_RDMEM_WORD(T,a); \ UINT32 shiftcount = offset & m1; \ @@ -404,7 +404,7 @@ static UINT32 read_pixel_shiftreg(tms34010_state *tms, offs_t offset) TMS34010_WRMEM_WORD(T, a, pix); \ /* No Raster Op + Transparency */ -#define WP_T(T,m1,m2) \ +#define WP_T(T,m1,m2) \ /* TODO: plane masking */ \ data &= m2; \ if (data) \ @@ -416,10 +416,10 @@ static UINT32 read_pixel_shiftreg(tms34010_state *tms, offs_t offset) /* TODO: plane masking */ \ pix = (pix & ~(m2 << shiftcount)) | (data << shiftcount); \ TMS34010_WRMEM_WORD(T, a, pix); \ - } \ + } \ /* Raster Op + No Transparency */ -#define WP_R(T,m1,m2) \ +#define WP_R(T,m1,m2) \ UINT32 a = TOBYTE(offset & 0xfffffff0); \ UINT32 pix = TMS34010_RDMEM_WORD(T,a); \ UINT32 shiftcount = offset & m1; \ @@ -430,7 +430,7 @@ static UINT32 read_pixel_shiftreg(tms34010_state *tms, offs_t offset) TMS34010_WRMEM_WORD(T, a, pix); \ /* Raster Op + Transparency */ -#define WP_R_T(T,m1,m2) \ +#define WP_R_T(T,m1,m2) \ UINT32 a = TOBYTE(offset & 0xfffffff0); \ UINT32 pix = TMS34010_RDMEM_WORD(T,a); \ UINT32 shiftcount = offset & m1; \ @@ -441,7 +441,7 @@ static UINT32 read_pixel_shiftreg(tms34010_state *tms, offs_t offset) { \ pix = (pix & ~(m2 << shiftcount)) | (data << shiftcount); \ TMS34010_WRMEM_WORD(T, a, pix); \ - } \ + } \ /* No Raster Op + No Transparency */ diff --git a/src/emu/cpu/tms7000/tms7000.c b/src/emu/cpu/tms7000/tms7000.c index 5ccbb01d07c..2034cd6722e 100644 --- a/src/emu/cpu/tms7000/tms7000.c +++ b/src/emu/cpu/tms7000/tms7000.c @@ -113,7 +113,7 @@ INLINE tms7000_state *get_safe_token(const device_config *device) #define SR_I 0x10 /* Interrupt */ #define CLR_NZC pSR&=~(SR_N|SR_Z|SR_C) -#define CLR_NZCI pSR&=~(SR_N|SR_Z|SR_C|SR_I) +#define CLR_NZCI pSR&=~(SR_N|SR_Z|SR_C|SR_I) #define SET_C8(a) pSR|=((a&0x0100)>>1) #define SET_N8(a) pSR|=((a&0x0080)>>1) #define SET_Z(a) if(!a)pSR|=SR_Z diff --git a/src/emu/cpu/tms9900/9900dasm.c b/src/emu/cpu/tms9900/9900dasm.c index c4dc1d1d2d1..eb974831f83 100644 --- a/src/emu/cpu/tms9900/9900dasm.c +++ b/src/emu/cpu/tms9900/9900dasm.c @@ -102,7 +102,7 @@ enum opcodes { /* ti990/12 instruction set */ _sram, _slam, _rto, _lto, _cnto, _slsl, _slsp, _bdc, _dbc, _swpm, _xorm, _orm, _andm, _sm, _am, _mova, _emd, _eint, _dint, _stpc, - _cs, _seqb, _movs, _lim, _lcs, _blsk, _mvsr, _mvsk, _pops, _pshs, + _cs, _seqb, _movs, _lim, _lcs, _blsk, _mvsr, _mvsk, _pops, _pshs, _cri, _cdi, _negr, _negd, _cre, _cde, _cer, _ced, _nrm, _tmb, _tcmb, _tsmb, _srj, _arj, _xit, _insf, _xv, _xf, _ar, _cir, @@ -178,7 +178,7 @@ static const description_t descriptions[144+3+1] = { "emd", format_7, ps_ti990_12 }, { "eint", format_7, ps_ti990_12 }, { "dint", format_7, ps_ti990_12 }, { "stpc", format_18, ps_ti990_12 }, { "cs", format_12, ps_ti990_12 }, { "seqb", format_12, ps_ti990_12 }, - { "movs", format_12, ps_ti990_12 }, { "lim", format_18, ps_ti990_12 }, + { "movs", format_12, ps_ti990_12 }, { "lim", format_18, ps_ti990_12 }, { "lcs", format_18, ps_ti990_12 }, { "blsk", format_8a, ps_ti990_12 }, { "mvsr", format_12, ps_ti990_12 }, { "mvsk", format_12, ps_ti990_12 }, { "pops", format_12, ps_ti990_12 }, { "pshs", format_12, ps_ti990_12 }, @@ -329,7 +329,7 @@ static int print_arg (char *dest, int mode, int arg, const UINT8 *opram, unsigne return sprintf (dest, "*R%d", arg); case 0x2: /* symbolic|indexed */ base = readop_arg(opram, pc); - if (arg) /* indexed */ + if (arg) /* indexed */ return sprintf (dest, "@>%04x(R%d)", base, arg); else /* symbolic (direct) */ return sprintf (dest, "@>%04x", base); @@ -383,8 +383,8 @@ unsigned Dasm9900 (char *buffer, unsigned pc, int model_id, const UINT8 *oprom, processor_mask |= ps_ti990_12;*/ /* ti990/12, tms99000, and later */ PC = pc; - OP = oprom[PC++ - pc] << 8; - OP |= oprom[PC++ - pc]; + OP = oprom[PC++ - pc] << 8; + OP |= oprom[PC++ - pc]; /* let's identify the opcode */ if (OP >= 0x4000) diff --git a/src/emu/cpu/tms9900/99xxcore.h b/src/emu/cpu/tms9900/99xxcore.h index df6905ea60d..7f23f4e8932 100644 --- a/src/emu/cpu/tms9900/99xxcore.h +++ b/src/emu/cpu/tms9900/99xxcore.h @@ -483,7 +483,7 @@ struct _tms99xx_state #if (TMS99XX_MODEL == TMS9995_ID) /* additionnal registers */ - UINT16 flag; /* flag register */ + UINT16 flag; /* flag register */ UINT8 MID_flag; /* MID flag register */ /* chip config, which can be set on reset */ @@ -4676,8 +4676,8 @@ void TMS99XX_GET_INFO(const device_config *device, UINT32 state, cpuinfo *info) break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break; case CPUINFO_INT_ADDRBUS_WIDTH_IO: #if (TMS99XX_MODEL == TI990_10_ID) @@ -4700,7 +4700,7 @@ void TMS99XX_GET_INFO(const device_config *device, UINT32 state, cpuinfo *info) info->i = 15; #endif break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; /* not implemented */ /* case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = get_irq_line(INPUT_LINE_NMI); break; diff --git a/src/emu/cpu/upd7810/7810dasm.c b/src/emu/cpu/upd7810/7810dasm.c index d199a00bc77..84791f32dbe 100644 --- a/src/emu/cpu/upd7810/7810dasm.c +++ b/src/emu/cpu/upd7810/7810dasm.c @@ -378,70 +378,70 @@ static const char *const token[] = /* prefix 48 */ static const struct dasm_s dasm48_7810[256] = { - {illegal,0 }, /* 00: 0100 1000 0000 0000 */ + {illegal,0 }, /* 00: 0100 1000 0000 0000 */ {SLRC,"A" }, /* 01: 0100 1000 0000 0001 */ {SLRC,"B" }, /* 02: 0100 1000 0000 0010 */ {SLRC,"C" }, /* 03: 0100 1000 0000 0011 */ - {illegal,0 }, /* 04: 0100 1000 0000 0100 */ + {illegal,0 }, /* 04: 0100 1000 0000 0100 */ {SLLC,"A" }, /* 05: 0100 1000 0000 0101 */ {SLLC,"B" }, /* 06: 0100 1000 0000 0110 */ {SLLC,"C" }, /* 07: 0100 1000 0000 0111 */ {SK,"NV" }, /* 08: 0100 1000 0000 1000 */ - {illegal,0 }, /* 09: 0100 1000 0000 1001 */ + {illegal,0 }, /* 09: 0100 1000 0000 1001 */ {SK,"CY" }, /* 0a: 0100 1000 0000 1010 */ {SK,"HC" }, /* 0b: 0100 1000 0000 1011 */ {SK,"Z" }, /* 0c: 0100 1000 0000 1100 */ - {illegal,0 }, /* 0d: 0100 1000 0000 1101 */ - {illegal,0 }, /* 0e: 0100 1000 0000 1110 */ - {illegal,0 }, /* 0f: 0100 1000 0000 1111 */ - - {illegal,0 }, /* 10: 0100 1000 0001 0000 */ - {illegal,0 }, /* 11: 0100 1000 0001 0001 */ - {illegal,0 }, /* 12: 0100 1000 0001 0010 */ - {illegal,0 }, /* 13: 0100 1000 0001 0011 */ - {illegal,0 }, /* 14: 0100 1000 0001 0100 */ - {illegal,0 }, /* 15: 0100 1000 0001 0101 */ - {illegal,0 }, /* 16: 0100 1000 0001 0110 */ - {illegal,0 }, /* 17: 0100 1000 0001 0111 */ + {illegal,0 }, /* 0d: 0100 1000 0000 1101 */ + {illegal,0 }, /* 0e: 0100 1000 0000 1110 */ + {illegal,0 }, /* 0f: 0100 1000 0000 1111 */ + + {illegal,0 }, /* 10: 0100 1000 0001 0000 */ + {illegal,0 }, /* 11: 0100 1000 0001 0001 */ + {illegal,0 }, /* 12: 0100 1000 0001 0010 */ + {illegal,0 }, /* 13: 0100 1000 0001 0011 */ + {illegal,0 }, /* 14: 0100 1000 0001 0100 */ + {illegal,0 }, /* 15: 0100 1000 0001 0101 */ + {illegal,0 }, /* 16: 0100 1000 0001 0110 */ + {illegal,0 }, /* 17: 0100 1000 0001 0111 */ {SKN,"NV" }, /* 18: 0100 1000 0001 1000 */ - {illegal,0 }, /* 19: 0100 1000 0001 1001 */ + {illegal,0 }, /* 19: 0100 1000 0001 1001 */ {SKN,"CY" }, /* 1a: 0100 1000 0001 1010 */ {SKN,"HC" }, /* 1b: 0100 1000 0001 1011 */ {SKN,"Z" }, /* 1c: 0100 1000 0001 1100 */ - {illegal,0 }, /* 1d: 0100 1000 0001 1101 */ - {illegal,0 }, /* 1e: 0100 1000 0001 1110 */ - {illegal,0 }, /* 1f: 0100 1000 0001 1111 */ + {illegal,0 }, /* 1d: 0100 1000 0001 1101 */ + {illegal,0 }, /* 1e: 0100 1000 0001 1110 */ + {illegal,0 }, /* 1f: 0100 1000 0001 1111 */ - {illegal,0 }, /* 20: 0100 1000 0010 0000 */ + {illegal,0 }, /* 20: 0100 1000 0010 0000 */ {SLR,"A" }, /* 21: 0100 1000 0010 0001 */ {SLR,"B" }, /* 22: 0100 1000 0010 0010 */ {SLR,"C" }, /* 23: 0100 1000 0010 0011 */ - {illegal,0 }, /* 24: 0100 1000 0010 0100 */ + {illegal,0 }, /* 24: 0100 1000 0010 0100 */ {SLL,"A" }, /* 25: 0100 1000 0010 0101 */ {SLL,"B" }, /* 26: 0100 1000 0010 0110 */ {SLL,"C" }, /* 27: 0100 1000 0010 0111 */ - {JEA,0 }, /* 28: 0100 1000 0010 1000 */ + {JEA,0 }, /* 28: 0100 1000 0010 1000 */ {CALB,0 }, /* 29: 0100 1000 0010 1001 */ - {CLC,0 }, /* 2a: 0100 1000 0010 1010 */ - {STC,0 }, /* 2b: 0100 1000 0010 1011 */ - {illegal,0 }, /* 2c: 0100 1000 0010 1100 */ + {CLC,0 }, /* 2a: 0100 1000 0010 1010 */ + {STC,0 }, /* 2b: 0100 1000 0010 1011 */ + {illegal,0 }, /* 2c: 0100 1000 0010 1100 */ {MUL,"A" }, /* 2d: 0100 1000 0010 1101 */ {MUL,"B" }, /* 2e: 0100 1000 0010 1110 */ {MUL,"C" }, /* 2f: 0100 1000 0010 1111 */ - {illegal,0 }, /* 30: 0100 1000 0011 0000 */ + {illegal,0 }, /* 30: 0100 1000 0011 0000 */ {RLR,"A" }, /* 31: 0100 1000 0011 0001 */ {RLR,"B" }, /* 32: 0100 1000 0011 0010 */ {RLR,"C" }, /* 33: 0100 1000 0011 0011 */ - {illegal,0 }, /* 34: 0100 1000 0011 0100 */ + {illegal,0 }, /* 34: 0100 1000 0011 0100 */ {RLL,"A" }, /* 35: 0100 1000 0011 0101 */ {RLL,"B" }, /* 36: 0100 1000 0011 0110 */ {RLL,"C" }, /* 37: 0100 1000 0011 0111 */ - {RLD,0 }, /* 38: 0100 1000 0011 1000 */ - {RRD,0 }, /* 39: 0100 1000 0011 1001 */ + {RLD,0 }, /* 38: 0100 1000 0011 1000 */ + {RRD,0 }, /* 39: 0100 1000 0011 1001 */ {NEGA,0 }, /* 3a: 0100 1000 0011 1010 */ {HALT,0 }, /* 3b: 0100 1000 0011 1011 */ - {illegal,0 }, /* 3c: 0100 1000 0011 1100 */ + {illegal,0 }, /* 3c: 0100 1000 0011 1100 */ {DIV,"A" }, /* 3d: 0100 1000 0011 1101 */ {DIV,"B" }, /* 3e: 0100 1000 0011 1110 */ {DIV,"C" }, /* 3f: 0100 1000 0011 1111 */ @@ -459,26 +459,26 @@ static const struct dasm_s dasm48_7810[256] = {SKIT,"FST" }, /* 4a: 0100 1000 0100 1010 */ {SKIT,"ER" }, /* 4b: 0100 1000 0100 1011 */ {SKIT,"OV" }, /* 4c: 0100 1000 0100 1100 */ - {illegal,0 }, /* 4d: 0100 1000 0100 1101 */ - {illegal,0 }, /* 4e: 0100 1000 0100 1110 */ - {illegal,0 }, /* 4f: 0100 1000 0100 1111 */ + {illegal,0 }, /* 4d: 0100 1000 0100 1101 */ + {illegal,0 }, /* 4e: 0100 1000 0100 1110 */ + {illegal,0 }, /* 4f: 0100 1000 0100 1111 */ {SKIT,"AN4" }, /* 50: 0100 1000 0101 0000 */ {SKIT,"AN5" }, /* 51: 0100 1000 0101 0001 */ {SKIT,"AN6" }, /* 52: 0100 1000 0101 0010 */ {SKIT,"AN7" }, /* 53: 0100 1000 0101 0011 */ {SKIT,"SB" }, /* 54: 0100 1000 0101 0100 */ - {illegal,0 }, /* 55: 0100 1000 0101 0101 */ - {illegal,0 }, /* 56: 0100 1000 0101 0110 */ - {illegal,0 }, /* 57: 0100 1000 0101 0111 */ - {illegal,0 }, /* 58: 0100 1000 0101 1000 */ - {illegal,0 }, /* 59: 0100 1000 0101 1001 */ - {illegal,0 }, /* 5a: 0100 1000 0101 1010 */ - {illegal,0 }, /* 5b: 0100 1000 0101 1011 */ - {illegal,0 }, /* 5c: 0100 1000 0101 1100 */ - {illegal,0 }, /* 5d: 0100 1000 0101 1101 */ - {illegal,0 }, /* 5e: 0100 1000 0101 1110 */ - {illegal,0 }, /* 5f: 0100 1000 0101 1111 */ + {illegal,0 }, /* 55: 0100 1000 0101 0101 */ + {illegal,0 }, /* 56: 0100 1000 0101 0110 */ + {illegal,0 }, /* 57: 0100 1000 0101 0111 */ + {illegal,0 }, /* 58: 0100 1000 0101 1000 */ + {illegal,0 }, /* 59: 0100 1000 0101 1001 */ + {illegal,0 }, /* 5a: 0100 1000 0101 1010 */ + {illegal,0 }, /* 5b: 0100 1000 0101 1011 */ + {illegal,0 }, /* 5c: 0100 1000 0101 1100 */ + {illegal,0 }, /* 5d: 0100 1000 0101 1101 */ + {illegal,0 }, /* 5e: 0100 1000 0101 1110 */ + {illegal,0 }, /* 5f: 0100 1000 0101 1111 */ {SKNIT,"NMI" }, /* 60: 0100 1000 0110 0000 */ {SKNIT,"FT0" }, /* 61: 0100 1000 0110 0001 */ @@ -493,55 +493,55 @@ static const struct dasm_s dasm48_7810[256] = {SKNIT,"FST" }, /* 6a: 0100 1000 0110 1010 */ {SKNIT,"ER" }, /* 6b: 0100 1000 0110 1011 */ {SKNIT,"OV" }, /* 6c: 0100 1000 0110 1100 */ - {illegal,0 }, /* 6d: 0100 1000 0110 1101 */ - {illegal,0 }, /* 6e: 0100 1000 0110 1110 */ - {illegal,0 }, /* 6f: 0100 1000 0110 1111 */ + {illegal,0 }, /* 6d: 0100 1000 0110 1101 */ + {illegal,0 }, /* 6e: 0100 1000 0110 1110 */ + {illegal,0 }, /* 6f: 0100 1000 0110 1111 */ {SKNIT,"AN4" }, /* 70: 0100 1000 0111 0000 */ {SKNIT,"AN5" }, /* 71: 0100 1000 0111 0001 */ {SKNIT,"AN6" }, /* 72: 0100 1000 0111 0010 */ {SKNIT,"AN7" }, /* 73: 0100 1000 0111 0011 */ {SKNIT,"SB" }, /* 74: 0100 1000 0111 0100 */ - {illegal,0 }, /* 75: 0100 1000 0111 0101 */ - {illegal,0 }, /* 76: 0100 1000 0111 0110 */ - {illegal,0 }, /* 77: 0100 1000 0111 0111 */ - {illegal,0 }, /* 78: 0100 1000 0111 1000 */ - {illegal,0 }, /* 79: 0100 1000 0111 1001 */ - {illegal,0 }, /* 7a: 0100 1000 0111 1010 */ - {illegal,0 }, /* 7b: 0100 1000 0111 1011 */ - {illegal,0 }, /* 7c: 0100 1000 0111 1100 */ - {illegal,0 }, /* 7d: 0100 1000 0111 1101 */ - {illegal,0 }, /* 7e: 0100 1000 0111 1110 */ - {illegal,0 }, /* 7f: 0100 1000 0111 1111 */ - - {illegal,0 }, /* 80: 0100 1000 1000 0000 */ - {illegal,0 }, /* 81: 0100 1000 1000 0001 */ + {illegal,0 }, /* 75: 0100 1000 0111 0101 */ + {illegal,0 }, /* 76: 0100 1000 0111 0110 */ + {illegal,0 }, /* 77: 0100 1000 0111 0111 */ + {illegal,0 }, /* 78: 0100 1000 0111 1000 */ + {illegal,0 }, /* 79: 0100 1000 0111 1001 */ + {illegal,0 }, /* 7a: 0100 1000 0111 1010 */ + {illegal,0 }, /* 7b: 0100 1000 0111 1011 */ + {illegal,0 }, /* 7c: 0100 1000 0111 1100 */ + {illegal,0 }, /* 7d: 0100 1000 0111 1101 */ + {illegal,0 }, /* 7e: 0100 1000 0111 1110 */ + {illegal,0 }, /* 7f: 0100 1000 0111 1111 */ + + {illegal,0 }, /* 80: 0100 1000 1000 0000 */ + {illegal,0 }, /* 81: 0100 1000 1000 0001 */ {LDEAX,"(DE)" }, /* 82: 0100 1000 1000 0010 */ {LDEAX,"(HL)" }, /* 83: 0100 1000 1000 0011 */ {LDEAX,"(DE++)" }, /* 84: 0100 1000 1000 0100 */ {LDEAX,"(HL++)" }, /* 85: 0100 1000 1000 0101 */ - {illegal,0 }, /* 86: 0100 1000 1000 0110 */ - {illegal,0 }, /* 87: 0100 1000 1000 0111 */ - {illegal,0 }, /* 88: 0100 1000 1000 1000 */ - {illegal,0 }, /* 89: 0100 1000 1000 1001 */ - {illegal,0 }, /* 8a: 0100 1000 1000 1010 */ + {illegal,0 }, /* 86: 0100 1000 1000 0110 */ + {illegal,0 }, /* 87: 0100 1000 1000 0111 */ + {illegal,0 }, /* 88: 0100 1000 1000 1000 */ + {illegal,0 }, /* 89: 0100 1000 1000 1001 */ + {illegal,0 }, /* 8a: 0100 1000 1000 1010 */ {LDEAX,"(DE+%b)"}, /* 8b: 0100 1000 1000 1011 xxxx xxxx */ {LDEAX,"(HL+A)" }, /* 8c: 0100 1000 1000 1100 */ {LDEAX,"(HL+B)" }, /* 8d: 0100 1000 1000 1101 */ {LDEAX,"(HL+EA)"}, /* 8e: 0100 1000 1000 1110 */ {LDEAX,"(HL+%b)"}, /* 8f: 0100 1000 1000 1111 xxxx xxxx */ - {illegal,0 }, /* 90: 0100 1000 1000 0000 */ - {illegal,0 }, /* 91: 0100 1000 1000 0001 */ + {illegal,0 }, /* 90: 0100 1000 1000 0000 */ + {illegal,0 }, /* 91: 0100 1000 1000 0001 */ {STEAX,"(DE)" }, /* 92: 0100 1000 1000 0010 */ {STEAX,"(HL)" }, /* 93: 0100 1000 1000 0011 */ {STEAX,"(DE++)" }, /* 94: 0100 1000 1000 0100 */ {STEAX,"(HL++)" }, /* 95: 0100 1000 1000 0101 */ - {illegal,0 }, /* 96: 0100 1000 1000 0110 */ - {illegal,0 }, /* 97: 0100 1000 1000 0111 */ - {illegal,0 }, /* 98: 0100 1000 1000 1000 */ - {illegal,0 }, /* 99: 0100 1000 1000 1001 */ - {illegal,0 }, /* 9a: 0100 1000 1000 1010 */ + {illegal,0 }, /* 96: 0100 1000 1000 0110 */ + {illegal,0 }, /* 97: 0100 1000 1000 0111 */ + {illegal,0 }, /* 98: 0100 1000 1000 1000 */ + {illegal,0 }, /* 99: 0100 1000 1000 1001 */ + {illegal,0 }, /* 9a: 0100 1000 1000 1010 */ {STEAX,"(DE+%b)"}, /* 9b: 0100 1000 1000 1011 xxxx xxxx */ {STEAX,"(HL+A)" }, /* 9c: 0100 1000 1000 1100 */ {STEAX,"(HL+B)" }, /* 9d: 0100 1000 1000 1101 */ @@ -549,174 +549,174 @@ static const struct dasm_s dasm48_7810[256] = {STEAX,"(HL+%b)"}, /* 9f: 0100 1000 1000 1111 xxxx xxxx */ {DSLR,"EA" }, /* a0: 0100 1000 1010 0000 */ - {illegal,0 }, /* a1: 0100 1000 1010 0001 */ - {illegal,0 }, /* a2: 0100 1000 1010 0010 */ - {illegal,0 }, /* a3: 0100 1000 1010 0011 */ + {illegal,0 }, /* a1: 0100 1000 1010 0001 */ + {illegal,0 }, /* a2: 0100 1000 1010 0010 */ + {illegal,0 }, /* a3: 0100 1000 1010 0011 */ {DSLL,"EA" }, /* a4: 0100 1000 1010 0100 */ - {illegal,0 }, /* a5: 0100 1000 1010 0101 */ - {illegal,0 }, /* a6: 0100 1000 1010 0110 */ - {illegal,0 }, /* a7: 0100 1000 1010 0111 */ + {illegal,0 }, /* a5: 0100 1000 1010 0101 */ + {illegal,0 }, /* a6: 0100 1000 1010 0110 */ + {illegal,0 }, /* a7: 0100 1000 1010 0111 */ {TABLE,0 }, /* a8: 0100 1000 1010 1000 */ - {illegal,0 }, /* a9: 0100 1000 1010 1001 */ - {illegal,0 }, /* aa: 0100 1000 1010 1010 */ - {illegal,0 }, /* ab: 0100 1000 1010 1011 */ - {illegal,0 }, /* ac: 0100 1000 1010 1100 */ - {illegal,0 }, /* ad: 0100 1000 1010 1101 */ - {illegal,0 }, /* ae: 0100 1000 1010 1110 */ - {illegal,0 }, /* af: 0100 1000 1010 1111 */ + {illegal,0 }, /* a9: 0100 1000 1010 1001 */ + {illegal,0 }, /* aa: 0100 1000 1010 1010 */ + {illegal,0 }, /* ab: 0100 1000 1010 1011 */ + {illegal,0 }, /* ac: 0100 1000 1010 1100 */ + {illegal,0 }, /* ad: 0100 1000 1010 1101 */ + {illegal,0 }, /* ae: 0100 1000 1010 1110 */ + {illegal,0 }, /* af: 0100 1000 1010 1111 */ {DRLR,"EA" }, /* b0: 0100 1000 1011 0000 */ - {illegal,0 }, /* b1: 0100 1000 1011 0001 */ - {illegal,0 }, /* b2: 0100 1000 1011 0010 */ - {illegal,0 }, /* b3: 0100 1000 1011 0011 */ + {illegal,0 }, /* b1: 0100 1000 1011 0001 */ + {illegal,0 }, /* b2: 0100 1000 1011 0010 */ + {illegal,0 }, /* b3: 0100 1000 1011 0011 */ {DRLL,"EA" }, /* b4: 0100 1000 1011 0100 */ - {illegal,0 }, /* b5: 0100 1000 1011 0101 */ - {illegal,0 }, /* b6: 0100 1000 1011 0110 */ - {illegal,0 }, /* b7: 0100 1000 1011 0111 */ - {illegal,0 }, /* b8: 0100 1000 1011 1000 */ - {illegal,0 }, /* b9: 0100 1000 1011 1001 */ - {illegal,0 }, /* ba: 0100 1000 1011 1010 */ + {illegal,0 }, /* b5: 0100 1000 1011 0101 */ + {illegal,0 }, /* b6: 0100 1000 1011 0110 */ + {illegal,0 }, /* b7: 0100 1000 1011 0111 */ + {illegal,0 }, /* b8: 0100 1000 1011 1000 */ + {illegal,0 }, /* b9: 0100 1000 1011 1001 */ + {illegal,0 }, /* ba: 0100 1000 1011 1010 */ {STOP,0 }, /* bb: 0100 1000 1011 1011 */ /* 7810 */ - {illegal,0 }, /* bc: 0100 1000 1011 1100 */ - {illegal,0 }, /* bd: 0100 1000 1011 1101 */ - {illegal,0 }, /* be: 0100 1000 1011 1110 */ - {illegal,0 }, /* bf: 0100 1000 1011 1111 */ + {illegal,0 }, /* bc: 0100 1000 1011 1100 */ + {illegal,0 }, /* bd: 0100 1000 1011 1101 */ + {illegal,0 }, /* be: 0100 1000 1011 1110 */ + {illegal,0 }, /* bf: 0100 1000 1011 1111 */ {DMOV,"EA,ECNT" }, /* c0: 0100 1000 1100 0000 */ {DMOV,"EA,ECPT" }, /* c1: 0100 1000 1100 0001 */ /* 7810 */ - {illegal,0 }, /* c2: 0100 1000 1100 0010 */ - {illegal,0 }, /* c3: 0100 1000 1100 0011 */ - {illegal,0 }, /* c4: 0100 1000 1100 0100 */ - {illegal,0 }, /* c5: 0100 1000 1100 0101 */ - {illegal,0 }, /* c6: 0100 1000 1100 0110 */ - {illegal,0 }, /* c7: 0100 1000 1100 0111 */ - {illegal,0 }, /* c8: 0100 1000 1100 1000 */ - {illegal,0 }, /* c9: 0100 1000 1100 1001 */ - {illegal,0 }, /* ca: 0100 1000 1100 1010 */ - {illegal,0 }, /* cb: 0100 1000 1100 1011 */ - {illegal,0 }, /* cc: 0100 1000 1100 1100 */ - {illegal,0 }, /* cd: 0100 1000 1100 1101 */ - {illegal,0 }, /* ce: 0100 1000 1100 1110 */ - {illegal,0 }, /* cf: 0100 1000 1100 1111 */ - - {illegal,0 }, /* d0: 0100 1000 1101 0000 */ - {illegal,0 }, /* d1: 0100 1000 1101 0001 */ + {illegal,0 }, /* c2: 0100 1000 1100 0010 */ + {illegal,0 }, /* c3: 0100 1000 1100 0011 */ + {illegal,0 }, /* c4: 0100 1000 1100 0100 */ + {illegal,0 }, /* c5: 0100 1000 1100 0101 */ + {illegal,0 }, /* c6: 0100 1000 1100 0110 */ + {illegal,0 }, /* c7: 0100 1000 1100 0111 */ + {illegal,0 }, /* c8: 0100 1000 1100 1000 */ + {illegal,0 }, /* c9: 0100 1000 1100 1001 */ + {illegal,0 }, /* ca: 0100 1000 1100 1010 */ + {illegal,0 }, /* cb: 0100 1000 1100 1011 */ + {illegal,0 }, /* cc: 0100 1000 1100 1100 */ + {illegal,0 }, /* cd: 0100 1000 1100 1101 */ + {illegal,0 }, /* ce: 0100 1000 1100 1110 */ + {illegal,0 }, /* cf: 0100 1000 1100 1111 */ + + {illegal,0 }, /* d0: 0100 1000 1101 0000 */ + {illegal,0 }, /* d1: 0100 1000 1101 0001 */ {DMOV,"ETM0,EA" }, /* d2: 0100 1000 1101 0010 */ {DMOV,"ETM1,EA" }, /* d3: 0100 1000 1101 0011 */ - {illegal,0 }, /* d4: 0100 1000 1101 0100 */ - {illegal,0 }, /* d5: 0100 1000 1101 0101 */ - {illegal,0 }, /* d6: 0100 1000 1101 0110 */ - {illegal,0 }, /* d7: 0100 1000 1101 0111 */ - {illegal,0 }, /* d8: 0100 1000 1101 1000 */ - {illegal,0 }, /* d9: 0100 1000 1101 1001 */ - {illegal,0 }, /* da: 0100 1000 1101 1010 */ - {illegal,0 }, /* db: 0100 1000 1101 1011 */ - {illegal,0 }, /* dc: 0100 1000 1101 1100 */ - {illegal,0 }, /* dd: 0100 1000 1101 1101 */ - {illegal,0 }, /* de: 0100 1000 1101 1110 */ - {illegal,0 }, /* df: 0100 1000 1101 1111 */ - - {illegal,0 }, /* e0: 0100 1000 1110 0000 */ - {illegal,0 }, /* e1: 0100 1000 1110 0001 */ - {illegal,0 }, /* e2: 0100 1000 1110 0010 */ - {illegal,0 }, /* e3: 0100 1000 1110 0011 */ - {illegal,0 }, /* e4: 0100 1000 1110 0100 */ - {illegal,0 }, /* e5: 0100 1000 1110 0101 */ - {illegal,0 }, /* e6: 0100 1000 1110 0110 */ - {illegal,0 }, /* e7: 0100 1000 1110 0111 */ - {illegal,0 }, /* e8: 0100 1000 1110 1000 */ - {illegal,0 }, /* e9: 0100 1000 1110 1001 */ - {illegal,0 }, /* ea: 0100 1000 1110 1010 */ - {illegal,0 }, /* eb: 0100 1000 1110 1011 */ - {illegal,0 }, /* ec: 0100 1000 1110 1100 */ - {illegal,0 }, /* ed: 0100 1000 1110 1101 */ - {illegal,0 }, /* ee: 0100 1000 1110 1110 */ - {illegal,0 }, /* ef: 0100 1000 1110 1111 */ - - {illegal,0 }, /* f0: 0100 1000 1111 0000 */ - {illegal,0 }, /* f1: 0100 1000 1111 0001 */ - {illegal,0 }, /* f2: 0100 1000 1111 0010 */ - {illegal,0 }, /* f3: 0100 1000 1111 0011 */ - {illegal,0 }, /* f4: 0100 1000 1111 0100 */ - {illegal,0 }, /* f5: 0100 1000 1111 0101 */ - {illegal,0 }, /* f6: 0100 1000 1111 0110 */ - {illegal,0 }, /* f7: 0100 1000 1111 0111 */ - {illegal,0 }, /* f8: 0100 1000 1111 1000 */ - {illegal,0 }, /* f9: 0100 1000 1111 1001 */ - {illegal,0 }, /* fa: 0100 1000 1111 1010 */ - {illegal,0 }, /* fb: 0100 1000 1111 1011 */ - {illegal,0 }, /* fc: 0100 1000 1111 1100 */ - {illegal,0 }, /* fd: 0100 1000 1111 1101 */ - {illegal,0 }, /* fe: 0100 1000 1111 1110 */ - {illegal,0 } /* ff: 0100 1000 1111 1111 */ + {illegal,0 }, /* d4: 0100 1000 1101 0100 */ + {illegal,0 }, /* d5: 0100 1000 1101 0101 */ + {illegal,0 }, /* d6: 0100 1000 1101 0110 */ + {illegal,0 }, /* d7: 0100 1000 1101 0111 */ + {illegal,0 }, /* d8: 0100 1000 1101 1000 */ + {illegal,0 }, /* d9: 0100 1000 1101 1001 */ + {illegal,0 }, /* da: 0100 1000 1101 1010 */ + {illegal,0 }, /* db: 0100 1000 1101 1011 */ + {illegal,0 }, /* dc: 0100 1000 1101 1100 */ + {illegal,0 }, /* dd: 0100 1000 1101 1101 */ + {illegal,0 }, /* de: 0100 1000 1101 1110 */ + {illegal,0 }, /* df: 0100 1000 1101 1111 */ + + {illegal,0 }, /* e0: 0100 1000 1110 0000 */ + {illegal,0 }, /* e1: 0100 1000 1110 0001 */ + {illegal,0 }, /* e2: 0100 1000 1110 0010 */ + {illegal,0 }, /* e3: 0100 1000 1110 0011 */ + {illegal,0 }, /* e4: 0100 1000 1110 0100 */ + {illegal,0 }, /* e5: 0100 1000 1110 0101 */ + {illegal,0 }, /* e6: 0100 1000 1110 0110 */ + {illegal,0 }, /* e7: 0100 1000 1110 0111 */ + {illegal,0 }, /* e8: 0100 1000 1110 1000 */ + {illegal,0 }, /* e9: 0100 1000 1110 1001 */ + {illegal,0 }, /* ea: 0100 1000 1110 1010 */ + {illegal,0 }, /* eb: 0100 1000 1110 1011 */ + {illegal,0 }, /* ec: 0100 1000 1110 1100 */ + {illegal,0 }, /* ed: 0100 1000 1110 1101 */ + {illegal,0 }, /* ee: 0100 1000 1110 1110 */ + {illegal,0 }, /* ef: 0100 1000 1110 1111 */ + + {illegal,0 }, /* f0: 0100 1000 1111 0000 */ + {illegal,0 }, /* f1: 0100 1000 1111 0001 */ + {illegal,0 }, /* f2: 0100 1000 1111 0010 */ + {illegal,0 }, /* f3: 0100 1000 1111 0011 */ + {illegal,0 }, /* f4: 0100 1000 1111 0100 */ + {illegal,0 }, /* f5: 0100 1000 1111 0101 */ + {illegal,0 }, /* f6: 0100 1000 1111 0110 */ + {illegal,0 }, /* f7: 0100 1000 1111 0111 */ + {illegal,0 }, /* f8: 0100 1000 1111 1000 */ + {illegal,0 }, /* f9: 0100 1000 1111 1001 */ + {illegal,0 }, /* fa: 0100 1000 1111 1010 */ + {illegal,0 }, /* fb: 0100 1000 1111 1011 */ + {illegal,0 }, /* fc: 0100 1000 1111 1100 */ + {illegal,0 }, /* fd: 0100 1000 1111 1101 */ + {illegal,0 }, /* fe: 0100 1000 1111 1110 */ + {illegal,0 } /* ff: 0100 1000 1111 1111 */ }; static const struct dasm_s dasm48_7807[256] = { - {illegal,0 }, /* 00: 0100 1000 0000 0000 */ + {illegal,0 }, /* 00: 0100 1000 0000 0000 */ {SLRC,"A" }, /* 01: 0100 1000 0000 0001 */ {SLRC,"B" }, /* 02: 0100 1000 0000 0010 */ {SLRC,"C" }, /* 03: 0100 1000 0000 0011 */ - {illegal,0 }, /* 04: 0100 1000 0000 0100 */ + {illegal,0 }, /* 04: 0100 1000 0000 0100 */ {SLLC,"A" }, /* 05: 0100 1000 0000 0101 */ {SLLC,"B" }, /* 06: 0100 1000 0000 0110 */ {SLLC,"C" }, /* 07: 0100 1000 0000 0111 */ {SK,"NV" }, /* 08: 0100 1000 0000 1000 */ - {illegal,0 }, /* 09: 0100 1000 0000 1001 */ + {illegal,0 }, /* 09: 0100 1000 0000 1001 */ {SK,"CY" }, /* 0a: 0100 1000 0000 1010 */ {SK,"HC" }, /* 0b: 0100 1000 0000 1011 */ {SK,"Z" }, /* 0c: 0100 1000 0000 1100 */ - {illegal,0 }, /* 0d: 0100 1000 0000 1101 */ - {illegal,0 }, /* 0e: 0100 1000 0000 1110 */ - {illegal,0 }, /* 0f: 0100 1000 0000 1111 */ - - {illegal,0 }, /* 10: 0100 1000 0001 0000 */ - {illegal,0 }, /* 11: 0100 1000 0001 0001 */ - {illegal,0 }, /* 12: 0100 1000 0001 0010 */ - {illegal,0 }, /* 13: 0100 1000 0001 0011 */ - {illegal,0 }, /* 14: 0100 1000 0001 0100 */ - {illegal,0 }, /* 15: 0100 1000 0001 0101 */ - {illegal,0 }, /* 16: 0100 1000 0001 0110 */ - {illegal,0 }, /* 17: 0100 1000 0001 0111 */ + {illegal,0 }, /* 0d: 0100 1000 0000 1101 */ + {illegal,0 }, /* 0e: 0100 1000 0000 1110 */ + {illegal,0 }, /* 0f: 0100 1000 0000 1111 */ + + {illegal,0 }, /* 10: 0100 1000 0001 0000 */ + {illegal,0 }, /* 11: 0100 1000 0001 0001 */ + {illegal,0 }, /* 12: 0100 1000 0001 0010 */ + {illegal,0 }, /* 13: 0100 1000 0001 0011 */ + {illegal,0 }, /* 14: 0100 1000 0001 0100 */ + {illegal,0 }, /* 15: 0100 1000 0001 0101 */ + {illegal,0 }, /* 16: 0100 1000 0001 0110 */ + {illegal,0 }, /* 17: 0100 1000 0001 0111 */ {SKN,"NV" }, /* 18: 0100 1000 0001 1000 */ - {illegal,0 }, /* 19: 0100 1000 0001 1001 */ + {illegal,0 }, /* 19: 0100 1000 0001 1001 */ {SKN,"CY" }, /* 1a: 0100 1000 0001 1010 */ {SKN,"HC" }, /* 1b: 0100 1000 0001 1011 */ {SKN,"Z" }, /* 1c: 0100 1000 0001 1100 */ - {illegal,0 }, /* 1d: 0100 1000 0001 1101 */ - {illegal,0 }, /* 1e: 0100 1000 0001 1110 */ - {illegal,0 }, /* 1f: 0100 1000 0001 1111 */ + {illegal,0 }, /* 1d: 0100 1000 0001 1101 */ + {illegal,0 }, /* 1e: 0100 1000 0001 1110 */ + {illegal,0 }, /* 1f: 0100 1000 0001 1111 */ - {illegal,0 }, /* 20: 0100 1000 0010 0000 */ + {illegal,0 }, /* 20: 0100 1000 0010 0000 */ {SLR,"A" }, /* 21: 0100 1000 0010 0001 */ {SLR,"B" }, /* 22: 0100 1000 0010 0010 */ {SLR,"C" }, /* 23: 0100 1000 0010 0011 */ - {illegal,0 }, /* 24: 0100 1000 0010 0100 */ + {illegal,0 }, /* 24: 0100 1000 0010 0100 */ {SLL,"A" }, /* 25: 0100 1000 0010 0101 */ {SLL,"B" }, /* 26: 0100 1000 0010 0110 */ {SLL,"C" }, /* 27: 0100 1000 0010 0111 */ - {JEA,0 }, /* 28: 0100 1000 0010 1000 */ + {JEA,0 }, /* 28: 0100 1000 0010 1000 */ {CALB,0 }, /* 29: 0100 1000 0010 1001 */ - {CLC,0 }, /* 2a: 0100 1000 0010 1010 */ - {STC,0 }, /* 2b: 0100 1000 0010 1011 */ - {illegal,0 }, /* 2c: 0100 1000 0010 1100 */ + {CLC,0 }, /* 2a: 0100 1000 0010 1010 */ + {STC,0 }, /* 2b: 0100 1000 0010 1011 */ + {illegal,0 }, /* 2c: 0100 1000 0010 1100 */ {MUL,"A" }, /* 2d: 0100 1000 0010 1101 */ {MUL,"B" }, /* 2e: 0100 1000 0010 1110 */ {MUL,"C" }, /* 2f: 0100 1000 0010 1111 */ - {illegal,0 }, /* 30: 0100 1000 0011 0000 */ + {illegal,0 }, /* 30: 0100 1000 0011 0000 */ {RLR,"A" }, /* 31: 0100 1000 0011 0001 */ {RLR,"B" }, /* 32: 0100 1000 0011 0010 */ {RLR,"C" }, /* 33: 0100 1000 0011 0011 */ - {illegal,0 }, /* 34: 0100 1000 0011 0100 */ + {illegal,0 }, /* 34: 0100 1000 0011 0100 */ {RLL,"A" }, /* 35: 0100 1000 0011 0101 */ {RLL,"B" }, /* 36: 0100 1000 0011 0110 */ {RLL,"C" }, /* 37: 0100 1000 0011 0111 */ - {RLD,0 }, /* 38: 0100 1000 0011 1000 */ - {RRD,0 }, /* 39: 0100 1000 0011 1001 */ + {RLD,0 }, /* 38: 0100 1000 0011 1000 */ + {RRD,0 }, /* 39: 0100 1000 0011 1001 */ {NEGA,0 }, /* 3a: 0100 1000 0011 1010 */ {HALT,0 }, /* 3b: 0100 1000 0011 1011 */ - {illegal,0 }, /* 3c: 0100 1000 0011 1100 */ + {illegal,0 }, /* 3c: 0100 1000 0011 1100 */ {DIV,"A" }, /* 3d: 0100 1000 0011 1101 */ {DIV,"B" }, /* 3e: 0100 1000 0011 1110 */ {DIV,"C" }, /* 3f: 0100 1000 0011 1111 */ @@ -734,26 +734,26 @@ static const struct dasm_s dasm48_7807[256] = {SKIT,"FST" }, /* 4a: 0100 1000 0100 1010 */ {SKIT,"ER" }, /* 4b: 0100 1000 0100 1011 */ {SKIT,"OV" }, /* 4c: 0100 1000 0100 1100 */ - {illegal,0 }, /* 4d: 0100 1000 0100 1101 */ - {illegal,0 }, /* 4e: 0100 1000 0100 1110 */ - {illegal,0 }, /* 4f: 0100 1000 0100 1111 */ + {illegal,0 }, /* 4d: 0100 1000 0100 1101 */ + {illegal,0 }, /* 4e: 0100 1000 0100 1110 */ + {illegal,0 }, /* 4f: 0100 1000 0100 1111 */ {SKIT,"AN4" }, /* 50: 0100 1000 0101 0000 */ {SKIT,"AN5" }, /* 51: 0100 1000 0101 0001 */ {SKIT,"AN6" }, /* 52: 0100 1000 0101 0010 */ {SKIT,"AN7" }, /* 53: 0100 1000 0101 0011 */ {SKIT,"SB" }, /* 54: 0100 1000 0101 0100 */ - {illegal,0 }, /* 55: 0100 1000 0101 0101 */ - {illegal,0 }, /* 56: 0100 1000 0101 0110 */ - {illegal,0 }, /* 57: 0100 1000 0101 0111 */ - {illegal,0 }, /* 58: 0100 1000 0101 1000 */ - {illegal,0 }, /* 59: 0100 1000 0101 1001 */ - {illegal,0 }, /* 5a: 0100 1000 0101 1010 */ - {illegal,0 }, /* 5b: 0100 1000 0101 1011 */ - {illegal,0 }, /* 5c: 0100 1000 0101 1100 */ - {illegal,0 }, /* 5d: 0100 1000 0101 1101 */ - {illegal,0 }, /* 5e: 0100 1000 0101 1110 */ - {illegal,0 }, /* 5f: 0100 1000 0101 1111 */ + {illegal,0 }, /* 55: 0100 1000 0101 0101 */ + {illegal,0 }, /* 56: 0100 1000 0101 0110 */ + {illegal,0 }, /* 57: 0100 1000 0101 0111 */ + {illegal,0 }, /* 58: 0100 1000 0101 1000 */ + {illegal,0 }, /* 59: 0100 1000 0101 1001 */ + {illegal,0 }, /* 5a: 0100 1000 0101 1010 */ + {illegal,0 }, /* 5b: 0100 1000 0101 1011 */ + {illegal,0 }, /* 5c: 0100 1000 0101 1100 */ + {illegal,0 }, /* 5d: 0100 1000 0101 1101 */ + {illegal,0 }, /* 5e: 0100 1000 0101 1110 */ + {illegal,0 }, /* 5f: 0100 1000 0101 1111 */ {SKNIT,"NMI" }, /* 60: 0100 1000 0110 0000 */ {SKNIT,"FT0" }, /* 61: 0100 1000 0110 0001 */ @@ -768,55 +768,55 @@ static const struct dasm_s dasm48_7807[256] = {SKNIT,"FST" }, /* 6a: 0100 1000 0110 1010 */ {SKNIT,"ER" }, /* 6b: 0100 1000 0110 1011 */ {SKNIT,"OV" }, /* 6c: 0100 1000 0110 1100 */ - {illegal,0 }, /* 6d: 0100 1000 0110 1101 */ - {illegal,0 }, /* 6e: 0100 1000 0110 1110 */ - {illegal,0 }, /* 6f: 0100 1000 0110 1111 */ + {illegal,0 }, /* 6d: 0100 1000 0110 1101 */ + {illegal,0 }, /* 6e: 0100 1000 0110 1110 */ + {illegal,0 }, /* 6f: 0100 1000 0110 1111 */ {SKNIT,"AN4" }, /* 70: 0100 1000 0111 0000 */ {SKNIT,"AN5" }, /* 71: 0100 1000 0111 0001 */ {SKNIT,"AN6" }, /* 72: 0100 1000 0111 0010 */ {SKNIT,"AN7" }, /* 73: 0100 1000 0111 0011 */ {SKNIT,"SB" }, /* 74: 0100 1000 0111 0100 */ - {illegal,0 }, /* 75: 0100 1000 0111 0101 */ - {illegal,0 }, /* 76: 0100 1000 0111 0110 */ - {illegal,0 }, /* 77: 0100 1000 0111 0111 */ - {illegal,0 }, /* 78: 0100 1000 0111 1000 */ - {illegal,0 }, /* 79: 0100 1000 0111 1001 */ - {illegal,0 }, /* 7a: 0100 1000 0111 1010 */ - {illegal,0 }, /* 7b: 0100 1000 0111 1011 */ - {illegal,0 }, /* 7c: 0100 1000 0111 1100 */ - {illegal,0 }, /* 7d: 0100 1000 0111 1101 */ - {illegal,0 }, /* 7e: 0100 1000 0111 1110 */ - {illegal,0 }, /* 7f: 0100 1000 0111 1111 */ - - {illegal,0 }, /* 80: 0100 1000 1000 0000 */ - {illegal,0 }, /* 81: 0100 1000 1000 0001 */ + {illegal,0 }, /* 75: 0100 1000 0111 0101 */ + {illegal,0 }, /* 76: 0100 1000 0111 0110 */ + {illegal,0 }, /* 77: 0100 1000 0111 0111 */ + {illegal,0 }, /* 78: 0100 1000 0111 1000 */ + {illegal,0 }, /* 79: 0100 1000 0111 1001 */ + {illegal,0 }, /* 7a: 0100 1000 0111 1010 */ + {illegal,0 }, /* 7b: 0100 1000 0111 1011 */ + {illegal,0 }, /* 7c: 0100 1000 0111 1100 */ + {illegal,0 }, /* 7d: 0100 1000 0111 1101 */ + {illegal,0 }, /* 7e: 0100 1000 0111 1110 */ + {illegal,0 }, /* 7f: 0100 1000 0111 1111 */ + + {illegal,0 }, /* 80: 0100 1000 1000 0000 */ + {illegal,0 }, /* 81: 0100 1000 1000 0001 */ {LDEAX,"(DE)" }, /* 82: 0100 1000 1000 0010 */ {LDEAX,"(HL)" }, /* 83: 0100 1000 1000 0011 */ {LDEAX,"(DE++)" }, /* 84: 0100 1000 1000 0100 */ {LDEAX,"(HL++)" }, /* 85: 0100 1000 1000 0101 */ - {illegal,0 }, /* 86: 0100 1000 1000 0110 */ - {illegal,0 }, /* 87: 0100 1000 1000 0111 */ - {illegal,0 }, /* 88: 0100 1000 1000 1000 */ - {illegal,0 }, /* 89: 0100 1000 1000 1001 */ - {illegal,0 }, /* 8a: 0100 1000 1000 1010 */ + {illegal,0 }, /* 86: 0100 1000 1000 0110 */ + {illegal,0 }, /* 87: 0100 1000 1000 0111 */ + {illegal,0 }, /* 88: 0100 1000 1000 1000 */ + {illegal,0 }, /* 89: 0100 1000 1000 1001 */ + {illegal,0 }, /* 8a: 0100 1000 1000 1010 */ {LDEAX,"(DE+%b)"}, /* 8b: 0100 1000 1000 1011 xxxx xxxx */ {LDEAX,"(HL+A)" }, /* 8c: 0100 1000 1000 1100 */ {LDEAX,"(HL+B)" }, /* 8d: 0100 1000 1000 1101 */ {LDEAX,"(HL+EA)"}, /* 8e: 0100 1000 1000 1110 */ {LDEAX,"(HL+%b)"}, /* 8f: 0100 1000 1000 1111 xxxx xxxx */ - {illegal,0 }, /* 90: 0100 1000 1000 0000 */ - {illegal,0 }, /* 91: 0100 1000 1000 0001 */ + {illegal,0 }, /* 90: 0100 1000 1000 0000 */ + {illegal,0 }, /* 91: 0100 1000 1000 0001 */ {STEAX,"(DE)" }, /* 92: 0100 1000 1000 0010 */ {STEAX,"(HL)" }, /* 93: 0100 1000 1000 0011 */ {STEAX,"(DE++)" }, /* 94: 0100 1000 1000 0100 */ {STEAX,"(HL++)" }, /* 95: 0100 1000 1000 0101 */ - {illegal,0 }, /* 96: 0100 1000 1000 0110 */ - {illegal,0 }, /* 97: 0100 1000 1000 0111 */ - {illegal,0 }, /* 98: 0100 1000 1000 1000 */ - {illegal,0 }, /* 99: 0100 1000 1000 1001 */ - {illegal,0 }, /* 9a: 0100 1000 1000 1010 */ + {illegal,0 }, /* 96: 0100 1000 1000 0110 */ + {illegal,0 }, /* 97: 0100 1000 1000 0111 */ + {illegal,0 }, /* 98: 0100 1000 1000 1000 */ + {illegal,0 }, /* 99: 0100 1000 1000 1001 */ + {illegal,0 }, /* 9a: 0100 1000 1000 1010 */ {STEAX,"(DE+%b)"}, /* 9b: 0100 1000 1000 1011 xxxx xxxx */ {STEAX,"(HL+A)" }, /* 9c: 0100 1000 1000 1100 */ {STEAX,"(HL+B)" }, /* 9d: 0100 1000 1000 1101 */ @@ -824,871 +824,871 @@ static const struct dasm_s dasm48_7807[256] = {STEAX,"(HL+%b)"}, /* 9f: 0100 1000 1000 1111 xxxx xxxx */ {DSLR,"EA" }, /* a0: 0100 1000 1010 0000 */ - {illegal,0 }, /* a1: 0100 1000 1010 0001 */ - {illegal,0 }, /* a2: 0100 1000 1010 0010 */ - {illegal,0 }, /* a3: 0100 1000 1010 0011 */ + {illegal,0 }, /* a1: 0100 1000 1010 0001 */ + {illegal,0 }, /* a2: 0100 1000 1010 0010 */ + {illegal,0 }, /* a3: 0100 1000 1010 0011 */ {DSLL,"EA" }, /* a4: 0100 1000 1010 0100 */ - {illegal,0 }, /* a5: 0100 1000 1010 0101 */ - {illegal,0 }, /* a6: 0100 1000 1010 0110 */ - {illegal,0 }, /* a7: 0100 1000 1010 0111 */ + {illegal,0 }, /* a5: 0100 1000 1010 0101 */ + {illegal,0 }, /* a6: 0100 1000 1010 0110 */ + {illegal,0 }, /* a7: 0100 1000 1010 0111 */ {TABLE,0 }, /* a8: 0100 1000 1010 1000 */ - {illegal,0 }, /* a9: 0100 1000 1010 1001 */ - {CMC,0 }, /* aa: 0100 1000 1010 1010 */ /* 7807 */ - {illegal,0 }, /* ab: 0100 1000 1010 1011 */ - {EXA,0 }, /* ac: 0100 1000 1010 1100 */ /* 7807 */ - {EXR,0 }, /* ad: 0100 1000 1010 1101 */ /* 7807 */ - {EXH,0 }, /* ae: 0100 1000 1010 1110 */ /* 7807 */ - {EXX,0 }, /* af: 0100 1000 1010 1111 */ /* 7807 */ + {illegal,0 }, /* a9: 0100 1000 1010 1001 */ + {CMC,0 }, /* aa: 0100 1000 1010 1010 */ /* 7807 */ + {illegal,0 }, /* ab: 0100 1000 1010 1011 */ + {EXA,0 }, /* ac: 0100 1000 1010 1100 */ /* 7807 */ + {EXR,0 }, /* ad: 0100 1000 1010 1101 */ /* 7807 */ + {EXH,0 }, /* ae: 0100 1000 1010 1110 */ /* 7807 */ + {EXX,0 }, /* af: 0100 1000 1010 1111 */ /* 7807 */ {DRLR,"EA" }, /* b0: 0100 1000 1011 0000 */ - {illegal,0 }, /* b1: 0100 1000 1011 0001 */ - {illegal,0 }, /* b2: 0100 1000 1011 0010 */ - {illegal,0 }, /* b3: 0100 1000 1011 0011 */ + {illegal,0 }, /* b1: 0100 1000 1011 0001 */ + {illegal,0 }, /* b2: 0100 1000 1011 0010 */ + {illegal,0 }, /* b3: 0100 1000 1011 0011 */ {DRLL,"EA" }, /* b4: 0100 1000 1011 0100 */ - {illegal,0 }, /* b5: 0100 1000 1011 0101 */ - {illegal,0 }, /* b6: 0100 1000 1011 0110 */ - {illegal,0 }, /* b7: 0100 1000 1011 0111 */ - {illegal,0 }, /* b8: 0100 1000 1011 1000 */ - {illegal,0 }, /* b9: 0100 1000 1011 1001 */ - {illegal,0 }, /* ba: 0100 1000 1011 1010 */ + {illegal,0 }, /* b5: 0100 1000 1011 0101 */ + {illegal,0 }, /* b6: 0100 1000 1011 0110 */ + {illegal,0 }, /* b7: 0100 1000 1011 0111 */ + {illegal,0 }, /* b8: 0100 1000 1011 1000 */ + {illegal,0 }, /* b9: 0100 1000 1011 1001 */ + {illegal,0 }, /* ba: 0100 1000 1011 1010 */ {illegal,0 }, /* bb: 0100 1000 1011 1011 */ - {illegal,0 }, /* bc: 0100 1000 1011 1100 */ - {illegal,0 }, /* bd: 0100 1000 1011 1101 */ - {illegal,0 }, /* be: 0100 1000 1011 1110 */ - {illegal,0 }, /* bf: 0100 1000 1011 1111 */ + {illegal,0 }, /* bc: 0100 1000 1011 1100 */ + {illegal,0 }, /* bd: 0100 1000 1011 1101 */ + {illegal,0 }, /* be: 0100 1000 1011 1110 */ + {illegal,0 }, /* bf: 0100 1000 1011 1111 */ {DMOV,"EA,ECNT" }, /* c0: 0100 1000 1100 0000 */ {DMOV,"EA,ECPT0"}, /* c1: 0100 1000 1100 0001 */ /* 7807 */ {DMOV,"EA,ECPT1"}, /* c2: 0100 1000 1100 0010 */ /* 7807 */ - {illegal,0 }, /* c3: 0100 1000 1100 0011 */ - {illegal,0 }, /* c4: 0100 1000 1100 0100 */ - {illegal,0 }, /* c5: 0100 1000 1100 0101 */ - {illegal,0 }, /* c6: 0100 1000 1100 0110 */ - {illegal,0 }, /* c7: 0100 1000 1100 0111 */ - {illegal,0 }, /* c8: 0100 1000 1100 1000 */ - {illegal,0 }, /* c9: 0100 1000 1100 1001 */ - {illegal,0 }, /* ca: 0100 1000 1100 1010 */ - {illegal,0 }, /* cb: 0100 1000 1100 1011 */ - {illegal,0 }, /* cc: 0100 1000 1100 1100 */ - {illegal,0 }, /* cd: 0100 1000 1100 1101 */ - {illegal,0 }, /* ce: 0100 1000 1100 1110 */ - {illegal,0 }, /* cf: 0100 1000 1100 1111 */ - - {illegal,0 }, /* d0: 0100 1000 1101 0000 */ - {illegal,0 }, /* d1: 0100 1000 1101 0001 */ + {illegal,0 }, /* c3: 0100 1000 1100 0011 */ + {illegal,0 }, /* c4: 0100 1000 1100 0100 */ + {illegal,0 }, /* c5: 0100 1000 1100 0101 */ + {illegal,0 }, /* c6: 0100 1000 1100 0110 */ + {illegal,0 }, /* c7: 0100 1000 1100 0111 */ + {illegal,0 }, /* c8: 0100 1000 1100 1000 */ + {illegal,0 }, /* c9: 0100 1000 1100 1001 */ + {illegal,0 }, /* ca: 0100 1000 1100 1010 */ + {illegal,0 }, /* cb: 0100 1000 1100 1011 */ + {illegal,0 }, /* cc: 0100 1000 1100 1100 */ + {illegal,0 }, /* cd: 0100 1000 1100 1101 */ + {illegal,0 }, /* ce: 0100 1000 1100 1110 */ + {illegal,0 }, /* cf: 0100 1000 1100 1111 */ + + {illegal,0 }, /* d0: 0100 1000 1101 0000 */ + {illegal,0 }, /* d1: 0100 1000 1101 0001 */ {DMOV,"ETM0,EA" }, /* d2: 0100 1000 1101 0010 */ {DMOV,"ETM1,EA" }, /* d3: 0100 1000 1101 0011 */ - {illegal,0 }, /* d4: 0100 1000 1101 0100 */ - {illegal,0 }, /* d5: 0100 1000 1101 0101 */ - {illegal,0 }, /* d6: 0100 1000 1101 0110 */ - {illegal,0 }, /* d7: 0100 1000 1101 0111 */ - {illegal,0 }, /* d8: 0100 1000 1101 1000 */ - {illegal,0 }, /* d9: 0100 1000 1101 1001 */ - {illegal,0 }, /* da: 0100 1000 1101 1010 */ - {illegal,0 }, /* db: 0100 1000 1101 1011 */ - {illegal,0 }, /* dc: 0100 1000 1101 1100 */ - {illegal,0 }, /* dd: 0100 1000 1101 1101 */ - {illegal,0 }, /* de: 0100 1000 1101 1110 */ - {illegal,0 }, /* df: 0100 1000 1101 1111 */ - - {illegal,0 }, /* e0: 0100 1000 1110 0000 */ - {illegal,0 }, /* e1: 0100 1000 1110 0001 */ - {illegal,0 }, /* e2: 0100 1000 1110 0010 */ - {illegal,0 }, /* e3: 0100 1000 1110 0011 */ - {illegal,0 }, /* e4: 0100 1000 1110 0100 */ - {illegal,0 }, /* e5: 0100 1000 1110 0101 */ - {illegal,0 }, /* e6: 0100 1000 1110 0110 */ - {illegal,0 }, /* e7: 0100 1000 1110 0111 */ - {illegal,0 }, /* e8: 0100 1000 1110 1000 */ - {illegal,0 }, /* e9: 0100 1000 1110 1001 */ - {illegal,0 }, /* ea: 0100 1000 1110 1010 */ - {illegal,0 }, /* eb: 0100 1000 1110 1011 */ - {illegal,0 }, /* ec: 0100 1000 1110 1100 */ - {illegal,0 }, /* ed: 0100 1000 1110 1101 */ - {illegal,0 }, /* ee: 0100 1000 1110 1110 */ - {illegal,0 }, /* ef: 0100 1000 1110 1111 */ - - {illegal,0 }, /* f0: 0100 1000 1111 0000 */ - {illegal,0 }, /* f1: 0100 1000 1111 0001 */ - {illegal,0 }, /* f2: 0100 1000 1111 0010 */ - {illegal,0 }, /* f3: 0100 1000 1111 0011 */ - {illegal,0 }, /* f4: 0100 1000 1111 0100 */ - {illegal,0 }, /* f5: 0100 1000 1111 0101 */ - {illegal,0 }, /* f6: 0100 1000 1111 0110 */ - {illegal,0 }, /* f7: 0100 1000 1111 0111 */ - {illegal,0 }, /* f8: 0100 1000 1111 1000 */ - {illegal,0 }, /* f9: 0100 1000 1111 1001 */ - {illegal,0 }, /* fa: 0100 1000 1111 1010 */ - {illegal,0 }, /* fb: 0100 1000 1111 1011 */ - {illegal,0 }, /* fc: 0100 1000 1111 1100 */ - {illegal,0 }, /* fd: 0100 1000 1111 1101 */ - {illegal,0 }, /* fe: 0100 1000 1111 1110 */ - {illegal,0 } /* ff: 0100 1000 1111 1111 */ + {illegal,0 }, /* d4: 0100 1000 1101 0100 */ + {illegal,0 }, /* d5: 0100 1000 1101 0101 */ + {illegal,0 }, /* d6: 0100 1000 1101 0110 */ + {illegal,0 }, /* d7: 0100 1000 1101 0111 */ + {illegal,0 }, /* d8: 0100 1000 1101 1000 */ + {illegal,0 }, /* d9: 0100 1000 1101 1001 */ + {illegal,0 }, /* da: 0100 1000 1101 1010 */ + {illegal,0 }, /* db: 0100 1000 1101 1011 */ + {illegal,0 }, /* dc: 0100 1000 1101 1100 */ + {illegal,0 }, /* dd: 0100 1000 1101 1101 */ + {illegal,0 }, /* de: 0100 1000 1101 1110 */ + {illegal,0 }, /* df: 0100 1000 1101 1111 */ + + {illegal,0 }, /* e0: 0100 1000 1110 0000 */ + {illegal,0 }, /* e1: 0100 1000 1110 0001 */ + {illegal,0 }, /* e2: 0100 1000 1110 0010 */ + {illegal,0 }, /* e3: 0100 1000 1110 0011 */ + {illegal,0 }, /* e4: 0100 1000 1110 0100 */ + {illegal,0 }, /* e5: 0100 1000 1110 0101 */ + {illegal,0 }, /* e6: 0100 1000 1110 0110 */ + {illegal,0 }, /* e7: 0100 1000 1110 0111 */ + {illegal,0 }, /* e8: 0100 1000 1110 1000 */ + {illegal,0 }, /* e9: 0100 1000 1110 1001 */ + {illegal,0 }, /* ea: 0100 1000 1110 1010 */ + {illegal,0 }, /* eb: 0100 1000 1110 1011 */ + {illegal,0 }, /* ec: 0100 1000 1110 1100 */ + {illegal,0 }, /* ed: 0100 1000 1110 1101 */ + {illegal,0 }, /* ee: 0100 1000 1110 1110 */ + {illegal,0 }, /* ef: 0100 1000 1110 1111 */ + + {illegal,0 }, /* f0: 0100 1000 1111 0000 */ + {illegal,0 }, /* f1: 0100 1000 1111 0001 */ + {illegal,0 }, /* f2: 0100 1000 1111 0010 */ + {illegal,0 }, /* f3: 0100 1000 1111 0011 */ + {illegal,0 }, /* f4: 0100 1000 1111 0100 */ + {illegal,0 }, /* f5: 0100 1000 1111 0101 */ + {illegal,0 }, /* f6: 0100 1000 1111 0110 */ + {illegal,0 }, /* f7: 0100 1000 1111 0111 */ + {illegal,0 }, /* f8: 0100 1000 1111 1000 */ + {illegal,0 }, /* f9: 0100 1000 1111 1001 */ + {illegal,0 }, /* fa: 0100 1000 1111 1010 */ + {illegal,0 }, /* fb: 0100 1000 1111 1011 */ + {illegal,0 }, /* fc: 0100 1000 1111 1100 */ + {illegal,0 }, /* fd: 0100 1000 1111 1101 */ + {illegal,0 }, /* fe: 0100 1000 1111 1110 */ + {illegal,0 } /* ff: 0100 1000 1111 1111 */ }; /* prefix 4C */ static const struct dasm_s dasm4C_7810[256] = { - {illegal,0 }, /* 00: 0100 1100 0000 0000 */ - {illegal,0 }, /* 01: 0100 1100 0000 0001 */ - {illegal,0 }, /* 02: 0100 1100 0000 0010 */ - {illegal,0 }, /* 03: 0100 1100 0000 0011 */ - {illegal,0 }, /* 04: 0100 1100 0000 0100 */ - {illegal,0 }, /* 05: 0100 1100 0000 0101 */ - {illegal,0 }, /* 06: 0100 1100 0000 0110 */ - {illegal,0 }, /* 07: 0100 1100 0000 0111 */ - {illegal,0 }, /* 08: 0100 1100 0000 1000 */ - {illegal,0 }, /* 09: 0100 1100 0000 1001 */ - {illegal,0 }, /* 0a: 0100 1100 0000 1010 */ - {illegal,0 }, /* 0b: 0100 1100 0000 1011 */ - {illegal,0 }, /* 0c: 0100 1100 0000 1100 */ - {illegal,0 }, /* 0d: 0100 1100 0000 1101 */ - {illegal,0 }, /* 0e: 0100 1100 0000 1110 */ - {illegal,0 }, /* 0f: 0100 1100 0000 1111 */ - - {illegal,0 }, /* 10: 0100 1100 0001 0000 */ - {illegal,0 }, /* 11: 0100 1100 0001 0001 */ - {illegal,0 }, /* 12: 0100 1100 0001 0010 */ - {illegal,0 }, /* 13: 0100 1100 0001 0011 */ - {illegal,0 }, /* 14: 0100 1100 0001 0100 */ - {illegal,0 }, /* 15: 0100 1100 0001 0101 */ - {illegal,0 }, /* 16: 0100 1100 0001 0110 */ - {illegal,0 }, /* 17: 0100 1100 0001 0111 */ - {illegal,0 }, /* 18: 0100 1100 0001 1000 */ - {illegal,0 }, /* 19: 0100 1100 0001 1001 */ - {illegal,0 }, /* 1a: 0100 1100 0001 1010 */ - {illegal,0 }, /* 1b: 0100 1100 0001 1011 */ - {illegal,0 }, /* 1c: 0100 1100 0001 1100 */ - {illegal,0 }, /* 1d: 0100 1100 0001 1101 */ - {illegal,0 }, /* 1e: 0100 1100 0001 1110 */ - {illegal,0 }, /* 1f: 0100 1100 0001 1111 */ - - {illegal,0 }, /* 20: 0100 1100 0010 0000 */ - {illegal,0 }, /* 21: 0100 1100 0010 0001 */ - {illegal,0 }, /* 22: 0100 1100 0010 0010 */ - {illegal,0 }, /* 23: 0100 1100 0010 0011 */ - {illegal,0 }, /* 24: 0100 1100 0010 0100 */ - {illegal,0 }, /* 25: 0100 1100 0010 0101 */ - {illegal,0 }, /* 26: 0100 1100 0010 0110 */ - {illegal,0 }, /* 27: 0100 1100 0010 0111 */ - {illegal,0 }, /* 28: 0100 1100 0010 1000 */ - {illegal,0 }, /* 29: 0100 1100 0010 1001 */ - {illegal,0 }, /* 2a: 0100 1100 0010 1010 */ - {illegal,0 }, /* 2b: 0100 1100 0010 1011 */ - {illegal,0 }, /* 2c: 0100 1100 0010 1100 */ - {illegal,0 }, /* 2d: 0100 1100 0010 1101 */ - {illegal,0 }, /* 2e: 0100 1100 0010 1110 */ - {illegal,0 }, /* 2f: 0100 1100 0010 1111 */ - - {illegal,0 }, /* 30: 0100 1100 0011 0000 */ - {illegal,0 }, /* 31: 0100 1100 0011 0001 */ - {illegal,0 }, /* 32: 0100 1100 0011 0010 */ - {illegal,0 }, /* 33: 0100 1100 0011 0011 */ - {illegal,0 }, /* 34: 0100 1100 0011 0100 */ - {illegal,0 }, /* 35: 0100 1100 0011 0101 */ - {illegal,0 }, /* 36: 0100 1100 0011 0110 */ - {illegal,0 }, /* 37: 0100 1100 0011 0111 */ - {illegal,0 }, /* 38: 0100 1100 0011 1000 */ - {illegal,0 }, /* 39: 0100 1100 0011 1001 */ - {illegal,0 }, /* 3a: 0100 1100 0011 1010 */ - {illegal,0 }, /* 3b: 0100 1100 0011 1011 */ - {illegal,0 }, /* 3c: 0100 1100 0011 1100 */ - {illegal,0 }, /* 3d: 0100 1100 0011 1101 */ - {illegal,0 }, /* 3e: 0100 1100 0011 1110 */ - {illegal,0 }, /* 3f: 0100 1100 0011 1111 */ - - {illegal,0 }, /* 40: 0100 1100 0100 0000 */ - {illegal,0 }, /* 41: 0100 1100 0100 0001 */ - {illegal,0 }, /* 42: 0100 1100 0100 0010 */ - {illegal,0 }, /* 43: 0100 1100 0100 0011 */ - {illegal,0 }, /* 44: 0100 1100 0100 0100 */ - {illegal,0 }, /* 45: 0100 1100 0100 0101 */ - {illegal,0 }, /* 46: 0100 1100 0100 0110 */ - {illegal,0 }, /* 47: 0100 1100 0100 0111 */ - {illegal,0 }, /* 48: 0100 1100 0100 1000 */ - {illegal,0 }, /* 49: 0100 1100 0100 1001 */ - {illegal,0 }, /* 4a: 0100 1100 0100 1010 */ - {illegal,0 }, /* 4b: 0100 1100 0100 1011 */ - {illegal,0 }, /* 4c: 0100 1100 0100 1100 */ - {illegal,0 }, /* 4d: 0100 1100 0100 1101 */ - {illegal,0 }, /* 4e: 0100 1100 0100 1110 */ - {illegal,0 }, /* 4f: 0100 1100 0100 1111 */ - - {illegal,0 }, /* 50: 0100 1100 0101 0000 */ - {illegal,0 }, /* 51: 0100 1100 0101 0001 */ - {illegal,0 }, /* 52: 0100 1100 0101 0010 */ - {illegal,0 }, /* 53: 0100 1100 0101 0011 */ - {illegal,0 }, /* 54: 0100 1100 0101 0100 */ - {illegal,0 }, /* 55: 0100 1100 0101 0101 */ - {illegal,0 }, /* 56: 0100 1100 0101 0110 */ - {illegal,0 }, /* 57: 0100 1100 0101 0111 */ - {illegal,0 }, /* 58: 0100 1100 0101 1000 */ - {illegal,0 }, /* 59: 0100 1100 0101 1001 */ - {illegal,0 }, /* 5a: 0100 1100 0101 1010 */ - {illegal,0 }, /* 5b: 0100 1100 0101 1011 */ - {illegal,0 }, /* 5c: 0100 1100 0101 1100 */ - {illegal,0 }, /* 5d: 0100 1100 0101 1101 */ - {illegal,0 }, /* 5e: 0100 1100 0101 1110 */ - {illegal,0 }, /* 5f: 0100 1100 0101 1111 */ - - {illegal,0 }, /* 60: 0100 1100 0110 0000 */ - {illegal,0 }, /* 61: 0100 1100 0110 0001 */ - {illegal,0 }, /* 62: 0100 1100 0110 0010 */ - {illegal,0 }, /* 63: 0100 1100 0110 0011 */ - {illegal,0 }, /* 64: 0100 1100 0110 0100 */ - {illegal,0 }, /* 65: 0100 1100 0110 0101 */ - {illegal,0 }, /* 66: 0100 1100 0110 0110 */ - {illegal,0 }, /* 67: 0100 1100 0110 0111 */ - {illegal,0 }, /* 68: 0100 1100 0110 1000 */ - {illegal,0 }, /* 69: 0100 1100 0110 1001 */ - {illegal,0 }, /* 6a: 0100 1100 0110 1010 */ - {illegal,0 }, /* 6b: 0100 1100 0110 1011 */ - {illegal,0 }, /* 6c: 0100 1100 0110 1100 */ - {illegal,0 }, /* 6d: 0100 1100 0110 1101 */ - {illegal,0 }, /* 6e: 0100 1100 0110 1110 */ - {illegal,0 }, /* 6f: 0100 1100 0110 1111 */ - - {illegal,0 }, /* 70: 0100 1100 0111 0000 */ - {illegal,0 }, /* 71: 0100 1100 0111 0001 */ - {illegal,0 }, /* 72: 0100 1100 0111 0010 */ - {illegal,0 }, /* 73: 0100 1100 0111 0011 */ - {illegal,0 }, /* 74: 0100 1100 0111 0100 */ - {illegal,0 }, /* 75: 0100 1100 0111 0101 */ - {illegal,0 }, /* 76: 0100 1100 0111 0110 */ - {illegal,0 }, /* 77: 0100 1100 0111 0111 */ - {illegal,0 }, /* 78: 0100 1100 0111 1000 */ - {illegal,0 }, /* 79: 0100 1100 0111 1001 */ - {illegal,0 }, /* 7a: 0100 1100 0111 1010 */ - {illegal,0 }, /* 7b: 0100 1100 0111 1011 */ - {illegal,0 }, /* 7c: 0100 1100 0111 1100 */ - {illegal,0 }, /* 7d: 0100 1100 0111 1101 */ - {illegal,0 }, /* 7e: 0100 1100 0111 1110 */ - {illegal,0 }, /* 7f: 0100 1100 0111 1111 */ - - {illegal,0 }, /* 80: 0100 1100 1000 0000 */ - {illegal,0 }, /* 81: 0100 1100 1000 0001 */ - {illegal,0 }, /* 82: 0100 1100 1000 0010 */ - {illegal,0 }, /* 83: 0100 1100 1000 0011 */ - {illegal,0 }, /* 84: 0100 1100 1000 0100 */ - {illegal,0 }, /* 85: 0100 1100 1000 0101 */ - {illegal,0 }, /* 86: 0100 1100 1000 0110 */ - {illegal,0 }, /* 87: 0100 1100 1000 0111 */ - {illegal,0 }, /* 88: 0100 1100 1000 1000 */ - {illegal,0 }, /* 89: 0100 1100 1000 1001 */ - {illegal,0 }, /* 8a: 0100 1100 1000 1010 */ - {illegal,0 }, /* 8b: 0100 1100 1000 1011 */ - {illegal,0 }, /* 8c: 0100 1100 1000 1100 */ - {illegal,0 }, /* 8d: 0100 1100 1000 1101 */ - {illegal,0 }, /* 8e: 0100 1100 1000 1110 */ - {illegal,0 }, /* 8f: 0100 1100 1000 1111 */ - - {illegal,0 }, /* 90: 0100 1100 1001 0000 */ - {illegal,0 }, /* 91: 0100 1100 1001 0001 */ - {illegal,0 }, /* 92: 0100 1100 1001 0010 */ - {illegal,0 }, /* 93: 0100 1100 1001 0011 */ - {illegal,0 }, /* 94: 0100 1100 1001 0100 */ - {illegal,0 }, /* 95: 0100 1100 1001 0101 */ - {illegal,0 }, /* 96: 0100 1100 1001 0110 */ - {illegal,0 }, /* 97: 0100 1100 1001 0111 */ - {illegal,0 }, /* 98: 0100 1100 1001 1000 */ - {illegal,0 }, /* 99: 0100 1100 1001 1001 */ - {illegal,0 }, /* 9a: 0100 1100 1001 1010 */ - {illegal,0 }, /* 9b: 0100 1100 1001 1011 */ - {illegal,0 }, /* 9c: 0100 1100 1001 1100 */ - {illegal,0 }, /* 9d: 0100 1100 1001 1101 */ - {illegal,0 }, /* 9e: 0100 1100 1001 1110 */ - {illegal,0 }, /* 9f: 0100 1100 1001 1111 */ - - {illegal,0 }, /* a0: 0100 1100 1010 0000 */ - {illegal,0 }, /* a1: 0100 1100 1010 0001 */ - {illegal,0 }, /* a2: 0100 1100 1010 0010 */ - {illegal,0 }, /* a3: 0100 1100 1010 0011 */ - {illegal,0 }, /* a4: 0100 1100 1010 0100 */ - {illegal,0 }, /* a5: 0100 1100 1010 0101 */ - {illegal,0 }, /* a6: 0100 1100 1010 0110 */ - {illegal,0 }, /* a7: 0100 1100 1010 0111 */ - {illegal,0 }, /* a8: 0100 1100 1010 1000 */ - {illegal,0 }, /* a9: 0100 1100 1010 1001 */ - {illegal,0 }, /* aa: 0100 1100 1010 1010 */ - {illegal,0 }, /* ab: 0100 1100 1010 1011 */ - {illegal,0 }, /* ac: 0100 1100 1010 1100 */ - {illegal,0 }, /* ad: 0100 1100 1010 1101 */ - {illegal,0 }, /* ae: 0100 1100 1010 1110 */ - {illegal,0 }, /* af: 0100 1100 1010 1111 */ - - {illegal,0 }, /* b0: 0100 1100 1011 0000 */ - {illegal,0 }, /* b1: 0100 1100 1011 0001 */ - {illegal,0 }, /* b2: 0100 1100 1011 0010 */ - {illegal,0 }, /* b3: 0100 1100 1011 0011 */ - {illegal,0 }, /* b4: 0100 1100 1011 0100 */ - {illegal,0 }, /* b5: 0100 1100 1011 0101 */ - {illegal,0 }, /* b6: 0100 1100 1011 0110 */ - {illegal,0 }, /* b7: 0100 1100 1011 0111 */ - {illegal,0 }, /* b8: 0100 1100 1011 1000 */ - {illegal,0 }, /* b9: 0100 1100 1011 1001 */ - {illegal,0 }, /* ba: 0100 1100 1011 1010 */ - {illegal,0 }, /* bb: 0100 1100 1011 1011 */ - {illegal,0 }, /* bc: 0100 1100 1011 1100 */ - {illegal,0 }, /* bd: 0100 1100 1011 1101 */ - {illegal,0 }, /* be: 0100 1100 1011 1110 */ - {illegal,0 }, /* bf: 0100 1100 1011 1111 */ + {illegal,0 }, /* 00: 0100 1100 0000 0000 */ + {illegal,0 }, /* 01: 0100 1100 0000 0001 */ + {illegal,0 }, /* 02: 0100 1100 0000 0010 */ + {illegal,0 }, /* 03: 0100 1100 0000 0011 */ + {illegal,0 }, /* 04: 0100 1100 0000 0100 */ + {illegal,0 }, /* 05: 0100 1100 0000 0101 */ + {illegal,0 }, /* 06: 0100 1100 0000 0110 */ + {illegal,0 }, /* 07: 0100 1100 0000 0111 */ + {illegal,0 }, /* 08: 0100 1100 0000 1000 */ + {illegal,0 }, /* 09: 0100 1100 0000 1001 */ + {illegal,0 }, /* 0a: 0100 1100 0000 1010 */ + {illegal,0 }, /* 0b: 0100 1100 0000 1011 */ + {illegal,0 }, /* 0c: 0100 1100 0000 1100 */ + {illegal,0 }, /* 0d: 0100 1100 0000 1101 */ + {illegal,0 }, /* 0e: 0100 1100 0000 1110 */ + {illegal,0 }, /* 0f: 0100 1100 0000 1111 */ + + {illegal,0 }, /* 10: 0100 1100 0001 0000 */ + {illegal,0 }, /* 11: 0100 1100 0001 0001 */ + {illegal,0 }, /* 12: 0100 1100 0001 0010 */ + {illegal,0 }, /* 13: 0100 1100 0001 0011 */ + {illegal,0 }, /* 14: 0100 1100 0001 0100 */ + {illegal,0 }, /* 15: 0100 1100 0001 0101 */ + {illegal,0 }, /* 16: 0100 1100 0001 0110 */ + {illegal,0 }, /* 17: 0100 1100 0001 0111 */ + {illegal,0 }, /* 18: 0100 1100 0001 1000 */ + {illegal,0 }, /* 19: 0100 1100 0001 1001 */ + {illegal,0 }, /* 1a: 0100 1100 0001 1010 */ + {illegal,0 }, /* 1b: 0100 1100 0001 1011 */ + {illegal,0 }, /* 1c: 0100 1100 0001 1100 */ + {illegal,0 }, /* 1d: 0100 1100 0001 1101 */ + {illegal,0 }, /* 1e: 0100 1100 0001 1110 */ + {illegal,0 }, /* 1f: 0100 1100 0001 1111 */ + + {illegal,0 }, /* 20: 0100 1100 0010 0000 */ + {illegal,0 }, /* 21: 0100 1100 0010 0001 */ + {illegal,0 }, /* 22: 0100 1100 0010 0010 */ + {illegal,0 }, /* 23: 0100 1100 0010 0011 */ + {illegal,0 }, /* 24: 0100 1100 0010 0100 */ + {illegal,0 }, /* 25: 0100 1100 0010 0101 */ + {illegal,0 }, /* 26: 0100 1100 0010 0110 */ + {illegal,0 }, /* 27: 0100 1100 0010 0111 */ + {illegal,0 }, /* 28: 0100 1100 0010 1000 */ + {illegal,0 }, /* 29: 0100 1100 0010 1001 */ + {illegal,0 }, /* 2a: 0100 1100 0010 1010 */ + {illegal,0 }, /* 2b: 0100 1100 0010 1011 */ + {illegal,0 }, /* 2c: 0100 1100 0010 1100 */ + {illegal,0 }, /* 2d: 0100 1100 0010 1101 */ + {illegal,0 }, /* 2e: 0100 1100 0010 1110 */ + {illegal,0 }, /* 2f: 0100 1100 0010 1111 */ + + {illegal,0 }, /* 30: 0100 1100 0011 0000 */ + {illegal,0 }, /* 31: 0100 1100 0011 0001 */ + {illegal,0 }, /* 32: 0100 1100 0011 0010 */ + {illegal,0 }, /* 33: 0100 1100 0011 0011 */ + {illegal,0 }, /* 34: 0100 1100 0011 0100 */ + {illegal,0 }, /* 35: 0100 1100 0011 0101 */ + {illegal,0 }, /* 36: 0100 1100 0011 0110 */ + {illegal,0 }, /* 37: 0100 1100 0011 0111 */ + {illegal,0 }, /* 38: 0100 1100 0011 1000 */ + {illegal,0 }, /* 39: 0100 1100 0011 1001 */ + {illegal,0 }, /* 3a: 0100 1100 0011 1010 */ + {illegal,0 }, /* 3b: 0100 1100 0011 1011 */ + {illegal,0 }, /* 3c: 0100 1100 0011 1100 */ + {illegal,0 }, /* 3d: 0100 1100 0011 1101 */ + {illegal,0 }, /* 3e: 0100 1100 0011 1110 */ + {illegal,0 }, /* 3f: 0100 1100 0011 1111 */ + + {illegal,0 }, /* 40: 0100 1100 0100 0000 */ + {illegal,0 }, /* 41: 0100 1100 0100 0001 */ + {illegal,0 }, /* 42: 0100 1100 0100 0010 */ + {illegal,0 }, /* 43: 0100 1100 0100 0011 */ + {illegal,0 }, /* 44: 0100 1100 0100 0100 */ + {illegal,0 }, /* 45: 0100 1100 0100 0101 */ + {illegal,0 }, /* 46: 0100 1100 0100 0110 */ + {illegal,0 }, /* 47: 0100 1100 0100 0111 */ + {illegal,0 }, /* 48: 0100 1100 0100 1000 */ + {illegal,0 }, /* 49: 0100 1100 0100 1001 */ + {illegal,0 }, /* 4a: 0100 1100 0100 1010 */ + {illegal,0 }, /* 4b: 0100 1100 0100 1011 */ + {illegal,0 }, /* 4c: 0100 1100 0100 1100 */ + {illegal,0 }, /* 4d: 0100 1100 0100 1101 */ + {illegal,0 }, /* 4e: 0100 1100 0100 1110 */ + {illegal,0 }, /* 4f: 0100 1100 0100 1111 */ + + {illegal,0 }, /* 50: 0100 1100 0101 0000 */ + {illegal,0 }, /* 51: 0100 1100 0101 0001 */ + {illegal,0 }, /* 52: 0100 1100 0101 0010 */ + {illegal,0 }, /* 53: 0100 1100 0101 0011 */ + {illegal,0 }, /* 54: 0100 1100 0101 0100 */ + {illegal,0 }, /* 55: 0100 1100 0101 0101 */ + {illegal,0 }, /* 56: 0100 1100 0101 0110 */ + {illegal,0 }, /* 57: 0100 1100 0101 0111 */ + {illegal,0 }, /* 58: 0100 1100 0101 1000 */ + {illegal,0 }, /* 59: 0100 1100 0101 1001 */ + {illegal,0 }, /* 5a: 0100 1100 0101 1010 */ + {illegal,0 }, /* 5b: 0100 1100 0101 1011 */ + {illegal,0 }, /* 5c: 0100 1100 0101 1100 */ + {illegal,0 }, /* 5d: 0100 1100 0101 1101 */ + {illegal,0 }, /* 5e: 0100 1100 0101 1110 */ + {illegal,0 }, /* 5f: 0100 1100 0101 1111 */ + + {illegal,0 }, /* 60: 0100 1100 0110 0000 */ + {illegal,0 }, /* 61: 0100 1100 0110 0001 */ + {illegal,0 }, /* 62: 0100 1100 0110 0010 */ + {illegal,0 }, /* 63: 0100 1100 0110 0011 */ + {illegal,0 }, /* 64: 0100 1100 0110 0100 */ + {illegal,0 }, /* 65: 0100 1100 0110 0101 */ + {illegal,0 }, /* 66: 0100 1100 0110 0110 */ + {illegal,0 }, /* 67: 0100 1100 0110 0111 */ + {illegal,0 }, /* 68: 0100 1100 0110 1000 */ + {illegal,0 }, /* 69: 0100 1100 0110 1001 */ + {illegal,0 }, /* 6a: 0100 1100 0110 1010 */ + {illegal,0 }, /* 6b: 0100 1100 0110 1011 */ + {illegal,0 }, /* 6c: 0100 1100 0110 1100 */ + {illegal,0 }, /* 6d: 0100 1100 0110 1101 */ + {illegal,0 }, /* 6e: 0100 1100 0110 1110 */ + {illegal,0 }, /* 6f: 0100 1100 0110 1111 */ + + {illegal,0 }, /* 70: 0100 1100 0111 0000 */ + {illegal,0 }, /* 71: 0100 1100 0111 0001 */ + {illegal,0 }, /* 72: 0100 1100 0111 0010 */ + {illegal,0 }, /* 73: 0100 1100 0111 0011 */ + {illegal,0 }, /* 74: 0100 1100 0111 0100 */ + {illegal,0 }, /* 75: 0100 1100 0111 0101 */ + {illegal,0 }, /* 76: 0100 1100 0111 0110 */ + {illegal,0 }, /* 77: 0100 1100 0111 0111 */ + {illegal,0 }, /* 78: 0100 1100 0111 1000 */ + {illegal,0 }, /* 79: 0100 1100 0111 1001 */ + {illegal,0 }, /* 7a: 0100 1100 0111 1010 */ + {illegal,0 }, /* 7b: 0100 1100 0111 1011 */ + {illegal,0 }, /* 7c: 0100 1100 0111 1100 */ + {illegal,0 }, /* 7d: 0100 1100 0111 1101 */ + {illegal,0 }, /* 7e: 0100 1100 0111 1110 */ + {illegal,0 }, /* 7f: 0100 1100 0111 1111 */ + + {illegal,0 }, /* 80: 0100 1100 1000 0000 */ + {illegal,0 }, /* 81: 0100 1100 1000 0001 */ + {illegal,0 }, /* 82: 0100 1100 1000 0010 */ + {illegal,0 }, /* 83: 0100 1100 1000 0011 */ + {illegal,0 }, /* 84: 0100 1100 1000 0100 */ + {illegal,0 }, /* 85: 0100 1100 1000 0101 */ + {illegal,0 }, /* 86: 0100 1100 1000 0110 */ + {illegal,0 }, /* 87: 0100 1100 1000 0111 */ + {illegal,0 }, /* 88: 0100 1100 1000 1000 */ + {illegal,0 }, /* 89: 0100 1100 1000 1001 */ + {illegal,0 }, /* 8a: 0100 1100 1000 1010 */ + {illegal,0 }, /* 8b: 0100 1100 1000 1011 */ + {illegal,0 }, /* 8c: 0100 1100 1000 1100 */ + {illegal,0 }, /* 8d: 0100 1100 1000 1101 */ + {illegal,0 }, /* 8e: 0100 1100 1000 1110 */ + {illegal,0 }, /* 8f: 0100 1100 1000 1111 */ + + {illegal,0 }, /* 90: 0100 1100 1001 0000 */ + {illegal,0 }, /* 91: 0100 1100 1001 0001 */ + {illegal,0 }, /* 92: 0100 1100 1001 0010 */ + {illegal,0 }, /* 93: 0100 1100 1001 0011 */ + {illegal,0 }, /* 94: 0100 1100 1001 0100 */ + {illegal,0 }, /* 95: 0100 1100 1001 0101 */ + {illegal,0 }, /* 96: 0100 1100 1001 0110 */ + {illegal,0 }, /* 97: 0100 1100 1001 0111 */ + {illegal,0 }, /* 98: 0100 1100 1001 1000 */ + {illegal,0 }, /* 99: 0100 1100 1001 1001 */ + {illegal,0 }, /* 9a: 0100 1100 1001 1010 */ + {illegal,0 }, /* 9b: 0100 1100 1001 1011 */ + {illegal,0 }, /* 9c: 0100 1100 1001 1100 */ + {illegal,0 }, /* 9d: 0100 1100 1001 1101 */ + {illegal,0 }, /* 9e: 0100 1100 1001 1110 */ + {illegal,0 }, /* 9f: 0100 1100 1001 1111 */ + + {illegal,0 }, /* a0: 0100 1100 1010 0000 */ + {illegal,0 }, /* a1: 0100 1100 1010 0001 */ + {illegal,0 }, /* a2: 0100 1100 1010 0010 */ + {illegal,0 }, /* a3: 0100 1100 1010 0011 */ + {illegal,0 }, /* a4: 0100 1100 1010 0100 */ + {illegal,0 }, /* a5: 0100 1100 1010 0101 */ + {illegal,0 }, /* a6: 0100 1100 1010 0110 */ + {illegal,0 }, /* a7: 0100 1100 1010 0111 */ + {illegal,0 }, /* a8: 0100 1100 1010 1000 */ + {illegal,0 }, /* a9: 0100 1100 1010 1001 */ + {illegal,0 }, /* aa: 0100 1100 1010 1010 */ + {illegal,0 }, /* ab: 0100 1100 1010 1011 */ + {illegal,0 }, /* ac: 0100 1100 1010 1100 */ + {illegal,0 }, /* ad: 0100 1100 1010 1101 */ + {illegal,0 }, /* ae: 0100 1100 1010 1110 */ + {illegal,0 }, /* af: 0100 1100 1010 1111 */ + + {illegal,0 }, /* b0: 0100 1100 1011 0000 */ + {illegal,0 }, /* b1: 0100 1100 1011 0001 */ + {illegal,0 }, /* b2: 0100 1100 1011 0010 */ + {illegal,0 }, /* b3: 0100 1100 1011 0011 */ + {illegal,0 }, /* b4: 0100 1100 1011 0100 */ + {illegal,0 }, /* b5: 0100 1100 1011 0101 */ + {illegal,0 }, /* b6: 0100 1100 1011 0110 */ + {illegal,0 }, /* b7: 0100 1100 1011 0111 */ + {illegal,0 }, /* b8: 0100 1100 1011 1000 */ + {illegal,0 }, /* b9: 0100 1100 1011 1001 */ + {illegal,0 }, /* ba: 0100 1100 1011 1010 */ + {illegal,0 }, /* bb: 0100 1100 1011 1011 */ + {illegal,0 }, /* bc: 0100 1100 1011 1100 */ + {illegal,0 }, /* bd: 0100 1100 1011 1101 */ + {illegal,0 }, /* be: 0100 1100 1011 1110 */ + {illegal,0 }, /* bf: 0100 1100 1011 1111 */ {MOV,"A,PA" }, /* c0: 0100 1100 1100 0000 */ {MOV,"A,PB" }, /* c1: 0100 1100 1100 0001 */ {MOV,"A,PC" }, /* c2: 0100 1100 1100 0010 */ {MOV,"A,PD" }, /* c3: 0100 1100 1100 0011 */ - {illegal,0 }, /* c4: 0100 1100 1100 0100 */ + {illegal,0 }, /* c4: 0100 1100 1100 0100 */ {MOV,"A,PF" }, /* c5: 0100 1100 1100 0101 */ {MOV,"A,MKH" }, /* c6: 0100 1100 1100 0110 */ {MOV,"A,MKL" }, /* c7: 0100 1100 1100 0111 */ {MOV,"A,ANM" }, /* c8: 0100 1100 1100 1000 */ /* 7810 */ {MOV,"A,SMH" }, /* c9: 0100 1100 1100 1001 */ - {illegal,0 }, /* ca: 0100 1100 1100 1010 */ + {illegal,0 }, /* ca: 0100 1100 1100 1010 */ {MOV,"A,EOM" }, /* cb: 0100 1100 1100 1011 */ - {illegal,0 }, /* cc: 0100 1100 1100 1100 */ + {illegal,0 }, /* cc: 0100 1100 1100 1100 */ {MOV,"A,TMM" }, /* cd: 0100 1100 1100 1101 */ - {illegal,0 }, /* ce: 0100 1100 1100 1110 */ - {illegal,0 }, /* cf: 0100 1100 1100 1111 */ - - {illegal,0 }, /* d0: 0100 1100 1101 0000 */ - {illegal,0 }, /* d1: 0100 1100 1101 0001 */ - {illegal,0 }, /* d2: 0100 1100 1101 0010 */ - {illegal,0 }, /* d3: 0100 1100 1101 0011 */ - {illegal,0 }, /* d4: 0100 1100 1101 0100 */ - {illegal,0 }, /* d5: 0100 1100 1101 0101 */ - {illegal,0 }, /* d6: 0100 1100 1101 0110 */ - {illegal,0 }, /* d7: 0100 1100 1101 0111 */ - {illegal,0 }, /* d8: 0100 1100 1101 1000 */ + {illegal,0 }, /* ce: 0100 1100 1100 1110 */ + {illegal,0 }, /* cf: 0100 1100 1100 1111 */ + + {illegal,0 }, /* d0: 0100 1100 1101 0000 */ + {illegal,0 }, /* d1: 0100 1100 1101 0001 */ + {illegal,0 }, /* d2: 0100 1100 1101 0010 */ + {illegal,0 }, /* d3: 0100 1100 1101 0011 */ + {illegal,0 }, /* d4: 0100 1100 1101 0100 */ + {illegal,0 }, /* d5: 0100 1100 1101 0101 */ + {illegal,0 }, /* d6: 0100 1100 1101 0110 */ + {illegal,0 }, /* d7: 0100 1100 1101 0111 */ + {illegal,0 }, /* d8: 0100 1100 1101 1000 */ {MOV,"A,RXB" }, /* d9: 0100 1100 1101 1001 */ - {illegal,0 }, /* da: 0100 1100 1101 1010 */ - {illegal,0 }, /* db: 0100 1100 1101 1011 */ - {illegal,0 }, /* dc: 0100 1100 1101 1100 */ - {illegal,0 }, /* dd: 0100 1100 1101 1101 */ - {illegal,0 }, /* de: 0100 1100 1101 1110 */ - {illegal,0 }, /* df: 0100 1100 1101 1111 */ + {illegal,0 }, /* da: 0100 1100 1101 1010 */ + {illegal,0 }, /* db: 0100 1100 1101 1011 */ + {illegal,0 }, /* dc: 0100 1100 1101 1100 */ + {illegal,0 }, /* dd: 0100 1100 1101 1101 */ + {illegal,0 }, /* de: 0100 1100 1101 1110 */ + {illegal,0 }, /* df: 0100 1100 1101 1111 */ {MOV,"A,CR0" }, /* e0: 0100 1100 1110 0000 */ /* 7810 */ {MOV,"A,CR1" }, /* e1: 0100 1100 1110 0001 */ /* 7810 */ {MOV,"A,CR2" }, /* e2: 0100 1100 1110 0010 */ /* 7810 */ {MOV,"A,CR3" }, /* e3: 0100 1100 1110 0011 */ /* 7810 */ - {illegal,0 }, /* e4: 0100 1100 1110 0100 */ - {illegal,0 }, /* e5: 0100 1100 1110 0101 */ - {illegal,0 }, /* e6: 0100 1100 1110 0110 */ - {illegal,0 }, /* e7: 0100 1100 1110 0111 */ - {illegal,0 }, /* e8: 0100 1100 1110 1000 */ - {illegal,0 }, /* e9: 0100 1100 1110 1001 */ - {illegal,0 }, /* ea: 0100 1100 1110 1010 */ - {illegal,0 }, /* eb: 0100 1100 1110 1011 */ - {illegal,0 }, /* ec: 0100 1100 1110 1100 */ - {illegal,0 }, /* ed: 0100 1100 1110 1101 */ - {illegal,0 }, /* ee: 0100 1100 1110 1110 */ - {illegal,0 }, /* ef: 0100 1100 1110 1111 */ - - {illegal,0 }, /* f0: 0100 1100 1111 0000 */ - {illegal,0 }, /* f1: 0100 1100 1111 0001 */ - {illegal,0 }, /* f2: 0100 1100 1111 0010 */ - {illegal,0 }, /* f3: 0100 1100 1111 0011 */ - {illegal,0 }, /* f4: 0100 1100 1111 0100 */ - {illegal,0 }, /* f5: 0100 1100 1111 0101 */ - {illegal,0 }, /* f6: 0100 1100 1111 0110 */ - {illegal,0 }, /* f7: 0100 1100 1111 0111 */ - {illegal,0 }, /* f8: 0100 1100 1111 1000 */ - {illegal,0 }, /* f9: 0100 1100 1111 1001 */ - {illegal,0 }, /* fa: 0100 1100 1111 1010 */ - {illegal,0 }, /* fb: 0100 1100 1111 1011 */ - {illegal,0 }, /* fc: 0100 1100 1111 1100 */ - {illegal,0 }, /* fd: 0100 1100 1111 1101 */ - {illegal,0 }, /* fe: 0100 1100 1111 1110 */ - {illegal,0 } /* ff: 0100 1100 1111 1111 */ + {illegal,0 }, /* e4: 0100 1100 1110 0100 */ + {illegal,0 }, /* e5: 0100 1100 1110 0101 */ + {illegal,0 }, /* e6: 0100 1100 1110 0110 */ + {illegal,0 }, /* e7: 0100 1100 1110 0111 */ + {illegal,0 }, /* e8: 0100 1100 1110 1000 */ + {illegal,0 }, /* e9: 0100 1100 1110 1001 */ + {illegal,0 }, /* ea: 0100 1100 1110 1010 */ + {illegal,0 }, /* eb: 0100 1100 1110 1011 */ + {illegal,0 }, /* ec: 0100 1100 1110 1100 */ + {illegal,0 }, /* ed: 0100 1100 1110 1101 */ + {illegal,0 }, /* ee: 0100 1100 1110 1110 */ + {illegal,0 }, /* ef: 0100 1100 1110 1111 */ + + {illegal,0 }, /* f0: 0100 1100 1111 0000 */ + {illegal,0 }, /* f1: 0100 1100 1111 0001 */ + {illegal,0 }, /* f2: 0100 1100 1111 0010 */ + {illegal,0 }, /* f3: 0100 1100 1111 0011 */ + {illegal,0 }, /* f4: 0100 1100 1111 0100 */ + {illegal,0 }, /* f5: 0100 1100 1111 0101 */ + {illegal,0 }, /* f6: 0100 1100 1111 0110 */ + {illegal,0 }, /* f7: 0100 1100 1111 0111 */ + {illegal,0 }, /* f8: 0100 1100 1111 1000 */ + {illegal,0 }, /* f9: 0100 1100 1111 1001 */ + {illegal,0 }, /* fa: 0100 1100 1111 1010 */ + {illegal,0 }, /* fb: 0100 1100 1111 1011 */ + {illegal,0 }, /* fc: 0100 1100 1111 1100 */ + {illegal,0 }, /* fd: 0100 1100 1111 1101 */ + {illegal,0 }, /* fe: 0100 1100 1111 1110 */ + {illegal,0 } /* ff: 0100 1100 1111 1111 */ }; static const struct dasm_s dasm4C_7807[256] = { - {illegal,0 }, /* 00: 0100 1100 0000 0000 */ - {illegal,0 }, /* 01: 0100 1100 0000 0001 */ - {illegal,0 }, /* 02: 0100 1100 0000 0010 */ - {illegal,0 }, /* 03: 0100 1100 0000 0011 */ - {illegal,0 }, /* 04: 0100 1100 0000 0100 */ - {illegal,0 }, /* 05: 0100 1100 0000 0101 */ - {illegal,0 }, /* 06: 0100 1100 0000 0110 */ - {illegal,0 }, /* 07: 0100 1100 0000 0111 */ - {illegal,0 }, /* 08: 0100 1100 0000 1000 */ - {illegal,0 }, /* 09: 0100 1100 0000 1001 */ - {illegal,0 }, /* 0a: 0100 1100 0000 1010 */ - {illegal,0 }, /* 0b: 0100 1100 0000 1011 */ - {illegal,0 }, /* 0c: 0100 1100 0000 1100 */ - {illegal,0 }, /* 0d: 0100 1100 0000 1101 */ - {illegal,0 }, /* 0e: 0100 1100 0000 1110 */ - {illegal,0 }, /* 0f: 0100 1100 0000 1111 */ - - {illegal,0 }, /* 10: 0100 1100 0001 0000 */ - {illegal,0 }, /* 11: 0100 1100 0001 0001 */ - {illegal,0 }, /* 12: 0100 1100 0001 0010 */ - {illegal,0 }, /* 13: 0100 1100 0001 0011 */ - {illegal,0 }, /* 14: 0100 1100 0001 0100 */ - {illegal,0 }, /* 15: 0100 1100 0001 0101 */ - {illegal,0 }, /* 16: 0100 1100 0001 0110 */ - {illegal,0 }, /* 17: 0100 1100 0001 0111 */ - {illegal,0 }, /* 18: 0100 1100 0001 1000 */ - {illegal,0 }, /* 19: 0100 1100 0001 1001 */ - {illegal,0 }, /* 1a: 0100 1100 0001 1010 */ - {illegal,0 }, /* 1b: 0100 1100 0001 1011 */ - {illegal,0 }, /* 1c: 0100 1100 0001 1100 */ - {illegal,0 }, /* 1d: 0100 1100 0001 1101 */ - {illegal,0 }, /* 1e: 0100 1100 0001 1110 */ - {illegal,0 }, /* 1f: 0100 1100 0001 1111 */ - - {illegal,0 }, /* 20: 0100 1100 0010 0000 */ - {illegal,0 }, /* 21: 0100 1100 0010 0001 */ - {illegal,0 }, /* 22: 0100 1100 0010 0010 */ - {illegal,0 }, /* 23: 0100 1100 0010 0011 */ - {illegal,0 }, /* 24: 0100 1100 0010 0100 */ - {illegal,0 }, /* 25: 0100 1100 0010 0101 */ - {illegal,0 }, /* 26: 0100 1100 0010 0110 */ - {illegal,0 }, /* 27: 0100 1100 0010 0111 */ - {illegal,0 }, /* 28: 0100 1100 0010 1000 */ - {illegal,0 }, /* 29: 0100 1100 0010 1001 */ - {illegal,0 }, /* 2a: 0100 1100 0010 1010 */ - {illegal,0 }, /* 2b: 0100 1100 0010 1011 */ - {illegal,0 }, /* 2c: 0100 1100 0010 1100 */ - {illegal,0 }, /* 2d: 0100 1100 0010 1101 */ - {illegal,0 }, /* 2e: 0100 1100 0010 1110 */ - {illegal,0 }, /* 2f: 0100 1100 0010 1111 */ - - {illegal,0 }, /* 30: 0100 1100 0011 0000 */ - {illegal,0 }, /* 31: 0100 1100 0011 0001 */ - {illegal,0 }, /* 32: 0100 1100 0011 0010 */ - {illegal,0 }, /* 33: 0100 1100 0011 0011 */ - {illegal,0 }, /* 34: 0100 1100 0011 0100 */ - {illegal,0 }, /* 35: 0100 1100 0011 0101 */ - {illegal,0 }, /* 36: 0100 1100 0011 0110 */ - {illegal,0 }, /* 37: 0100 1100 0011 0111 */ - {illegal,0 }, /* 38: 0100 1100 0011 1000 */ - {illegal,0 }, /* 39: 0100 1100 0011 1001 */ - {illegal,0 }, /* 3a: 0100 1100 0011 1010 */ - {illegal,0 }, /* 3b: 0100 1100 0011 1011 */ - {illegal,0 }, /* 3c: 0100 1100 0011 1100 */ - {illegal,0 }, /* 3d: 0100 1100 0011 1101 */ - {illegal,0 }, /* 3e: 0100 1100 0011 1110 */ - {illegal,0 }, /* 3f: 0100 1100 0011 1111 */ - - {illegal,0 }, /* 40: 0100 1100 0100 0000 */ - {illegal,0 }, /* 41: 0100 1100 0100 0001 */ - {illegal,0 }, /* 42: 0100 1100 0100 0010 */ - {illegal,0 }, /* 43: 0100 1100 0100 0011 */ - {illegal,0 }, /* 44: 0100 1100 0100 0100 */ - {illegal,0 }, /* 45: 0100 1100 0100 0101 */ - {illegal,0 }, /* 46: 0100 1100 0100 0110 */ - {illegal,0 }, /* 47: 0100 1100 0100 0111 */ - {illegal,0 }, /* 48: 0100 1100 0100 1000 */ - {illegal,0 }, /* 49: 0100 1100 0100 1001 */ - {illegal,0 }, /* 4a: 0100 1100 0100 1010 */ - {illegal,0 }, /* 4b: 0100 1100 0100 1011 */ - {illegal,0 }, /* 4c: 0100 1100 0100 1100 */ - {illegal,0 }, /* 4d: 0100 1100 0100 1101 */ - {illegal,0 }, /* 4e: 0100 1100 0100 1110 */ - {illegal,0 }, /* 4f: 0100 1100 0100 1111 */ - - {illegal,0 }, /* 50: 0100 1100 0101 0000 */ - {illegal,0 }, /* 51: 0100 1100 0101 0001 */ - {illegal,0 }, /* 52: 0100 1100 0101 0010 */ - {illegal,0 }, /* 53: 0100 1100 0101 0011 */ - {illegal,0 }, /* 54: 0100 1100 0101 0100 */ - {illegal,0 }, /* 55: 0100 1100 0101 0101 */ - {illegal,0 }, /* 56: 0100 1100 0101 0110 */ - {illegal,0 }, /* 57: 0100 1100 0101 0111 */ - {illegal,0 }, /* 58: 0100 1100 0101 1000 */ - {illegal,0 }, /* 59: 0100 1100 0101 1001 */ - {illegal,0 }, /* 5a: 0100 1100 0101 1010 */ - {illegal,0 }, /* 5b: 0100 1100 0101 1011 */ - {illegal,0 }, /* 5c: 0100 1100 0101 1100 */ - {illegal,0 }, /* 5d: 0100 1100 0101 1101 */ - {illegal,0 }, /* 5e: 0100 1100 0101 1110 */ - {illegal,0 }, /* 5f: 0100 1100 0101 1111 */ - - {illegal,0 }, /* 60: 0100 1100 0110 0000 */ - {illegal,0 }, /* 61: 0100 1100 0110 0001 */ - {illegal,0 }, /* 62: 0100 1100 0110 0010 */ - {illegal,0 }, /* 63: 0100 1100 0110 0011 */ - {illegal,0 }, /* 64: 0100 1100 0110 0100 */ - {illegal,0 }, /* 65: 0100 1100 0110 0101 */ - {illegal,0 }, /* 66: 0100 1100 0110 0110 */ - {illegal,0 }, /* 67: 0100 1100 0110 0111 */ - {illegal,0 }, /* 68: 0100 1100 0110 1000 */ - {illegal,0 }, /* 69: 0100 1100 0110 1001 */ - {illegal,0 }, /* 6a: 0100 1100 0110 1010 */ - {illegal,0 }, /* 6b: 0100 1100 0110 1011 */ - {illegal,0 }, /* 6c: 0100 1100 0110 1100 */ - {illegal,0 }, /* 6d: 0100 1100 0110 1101 */ - {illegal,0 }, /* 6e: 0100 1100 0110 1110 */ - {illegal,0 }, /* 6f: 0100 1100 0110 1111 */ - - {illegal,0 }, /* 70: 0100 1100 0111 0000 */ - {illegal,0 }, /* 71: 0100 1100 0111 0001 */ - {illegal,0 }, /* 72: 0100 1100 0111 0010 */ - {illegal,0 }, /* 73: 0100 1100 0111 0011 */ - {illegal,0 }, /* 74: 0100 1100 0111 0100 */ - {illegal,0 }, /* 75: 0100 1100 0111 0101 */ - {illegal,0 }, /* 76: 0100 1100 0111 0110 */ - {illegal,0 }, /* 77: 0100 1100 0111 0111 */ - {illegal,0 }, /* 78: 0100 1100 0111 1000 */ - {illegal,0 }, /* 79: 0100 1100 0111 1001 */ - {illegal,0 }, /* 7a: 0100 1100 0111 1010 */ - {illegal,0 }, /* 7b: 0100 1100 0111 1011 */ - {illegal,0 }, /* 7c: 0100 1100 0111 1100 */ - {illegal,0 }, /* 7d: 0100 1100 0111 1101 */ - {illegal,0 }, /* 7e: 0100 1100 0111 1110 */ - {illegal,0 }, /* 7f: 0100 1100 0111 1111 */ - - {illegal,0 }, /* 80: 0100 1100 1000 0000 */ - {illegal,0 }, /* 81: 0100 1100 1000 0001 */ - {illegal,0 }, /* 82: 0100 1100 1000 0010 */ - {illegal,0 }, /* 83: 0100 1100 1000 0011 */ - {illegal,0 }, /* 84: 0100 1100 1000 0100 */ - {illegal,0 }, /* 85: 0100 1100 1000 0101 */ - {illegal,0 }, /* 86: 0100 1100 1000 0110 */ - {illegal,0 }, /* 87: 0100 1100 1000 0111 */ - {illegal,0 }, /* 88: 0100 1100 1000 1000 */ - {illegal,0 }, /* 89: 0100 1100 1000 1001 */ - {illegal,0 }, /* 8a: 0100 1100 1000 1010 */ - {illegal,0 }, /* 8b: 0100 1100 1000 1011 */ - {illegal,0 }, /* 8c: 0100 1100 1000 1100 */ - {illegal,0 }, /* 8d: 0100 1100 1000 1101 */ - {illegal,0 }, /* 8e: 0100 1100 1000 1110 */ - {illegal,0 }, /* 8f: 0100 1100 1000 1111 */ - - {illegal,0 }, /* 90: 0100 1100 1001 0000 */ - {illegal,0 }, /* 91: 0100 1100 1001 0001 */ - {illegal,0 }, /* 92: 0100 1100 1001 0010 */ - {illegal,0 }, /* 93: 0100 1100 1001 0011 */ - {illegal,0 }, /* 94: 0100 1100 1001 0100 */ - {illegal,0 }, /* 95: 0100 1100 1001 0101 */ - {illegal,0 }, /* 96: 0100 1100 1001 0110 */ - {illegal,0 }, /* 97: 0100 1100 1001 0111 */ - {illegal,0 }, /* 98: 0100 1100 1001 1000 */ - {illegal,0 }, /* 99: 0100 1100 1001 1001 */ - {illegal,0 }, /* 9a: 0100 1100 1001 1010 */ - {illegal,0 }, /* 9b: 0100 1100 1001 1011 */ - {illegal,0 }, /* 9c: 0100 1100 1001 1100 */ - {illegal,0 }, /* 9d: 0100 1100 1001 1101 */ - {illegal,0 }, /* 9e: 0100 1100 1001 1110 */ - {illegal,0 }, /* 9f: 0100 1100 1001 1111 */ - - {illegal,0 }, /* a0: 0100 1100 1010 0000 */ - {illegal,0 }, /* a1: 0100 1100 1010 0001 */ - {illegal,0 }, /* a2: 0100 1100 1010 0010 */ - {illegal,0 }, /* a3: 0100 1100 1010 0011 */ - {illegal,0 }, /* a4: 0100 1100 1010 0100 */ - {illegal,0 }, /* a5: 0100 1100 1010 0101 */ - {illegal,0 }, /* a6: 0100 1100 1010 0110 */ - {illegal,0 }, /* a7: 0100 1100 1010 0111 */ - {illegal,0 }, /* a8: 0100 1100 1010 1000 */ - {illegal,0 }, /* a9: 0100 1100 1010 1001 */ - {illegal,0 }, /* aa: 0100 1100 1010 1010 */ - {illegal,0 }, /* ab: 0100 1100 1010 1011 */ - {illegal,0 }, /* ac: 0100 1100 1010 1100 */ - {illegal,0 }, /* ad: 0100 1100 1010 1101 */ - {illegal,0 }, /* ae: 0100 1100 1010 1110 */ - {illegal,0 }, /* af: 0100 1100 1010 1111 */ - - {illegal,0 }, /* b0: 0100 1100 1011 0000 */ - {illegal,0 }, /* b1: 0100 1100 1011 0001 */ - {illegal,0 }, /* b2: 0100 1100 1011 0010 */ - {illegal,0 }, /* b3: 0100 1100 1011 0011 */ - {illegal,0 }, /* b4: 0100 1100 1011 0100 */ - {illegal,0 }, /* b5: 0100 1100 1011 0101 */ - {illegal,0 }, /* b6: 0100 1100 1011 0110 */ - {illegal,0 }, /* b7: 0100 1100 1011 0111 */ - {illegal,0 }, /* b8: 0100 1100 1011 1000 */ - {illegal,0 }, /* b9: 0100 1100 1011 1001 */ - {illegal,0 }, /* ba: 0100 1100 1011 1010 */ - {illegal,0 }, /* bb: 0100 1100 1011 1011 */ - {illegal,0 }, /* bc: 0100 1100 1011 1100 */ - {illegal,0 }, /* bd: 0100 1100 1011 1101 */ - {illegal,0 }, /* be: 0100 1100 1011 1110 */ - {illegal,0 }, /* bf: 0100 1100 1011 1111 */ + {illegal,0 }, /* 00: 0100 1100 0000 0000 */ + {illegal,0 }, /* 01: 0100 1100 0000 0001 */ + {illegal,0 }, /* 02: 0100 1100 0000 0010 */ + {illegal,0 }, /* 03: 0100 1100 0000 0011 */ + {illegal,0 }, /* 04: 0100 1100 0000 0100 */ + {illegal,0 }, /* 05: 0100 1100 0000 0101 */ + {illegal,0 }, /* 06: 0100 1100 0000 0110 */ + {illegal,0 }, /* 07: 0100 1100 0000 0111 */ + {illegal,0 }, /* 08: 0100 1100 0000 1000 */ + {illegal,0 }, /* 09: 0100 1100 0000 1001 */ + {illegal,0 }, /* 0a: 0100 1100 0000 1010 */ + {illegal,0 }, /* 0b: 0100 1100 0000 1011 */ + {illegal,0 }, /* 0c: 0100 1100 0000 1100 */ + {illegal,0 }, /* 0d: 0100 1100 0000 1101 */ + {illegal,0 }, /* 0e: 0100 1100 0000 1110 */ + {illegal,0 }, /* 0f: 0100 1100 0000 1111 */ + + {illegal,0 }, /* 10: 0100 1100 0001 0000 */ + {illegal,0 }, /* 11: 0100 1100 0001 0001 */ + {illegal,0 }, /* 12: 0100 1100 0001 0010 */ + {illegal,0 }, /* 13: 0100 1100 0001 0011 */ + {illegal,0 }, /* 14: 0100 1100 0001 0100 */ + {illegal,0 }, /* 15: 0100 1100 0001 0101 */ + {illegal,0 }, /* 16: 0100 1100 0001 0110 */ + {illegal,0 }, /* 17: 0100 1100 0001 0111 */ + {illegal,0 }, /* 18: 0100 1100 0001 1000 */ + {illegal,0 }, /* 19: 0100 1100 0001 1001 */ + {illegal,0 }, /* 1a: 0100 1100 0001 1010 */ + {illegal,0 }, /* 1b: 0100 1100 0001 1011 */ + {illegal,0 }, /* 1c: 0100 1100 0001 1100 */ + {illegal,0 }, /* 1d: 0100 1100 0001 1101 */ + {illegal,0 }, /* 1e: 0100 1100 0001 1110 */ + {illegal,0 }, /* 1f: 0100 1100 0001 1111 */ + + {illegal,0 }, /* 20: 0100 1100 0010 0000 */ + {illegal,0 }, /* 21: 0100 1100 0010 0001 */ + {illegal,0 }, /* 22: 0100 1100 0010 0010 */ + {illegal,0 }, /* 23: 0100 1100 0010 0011 */ + {illegal,0 }, /* 24: 0100 1100 0010 0100 */ + {illegal,0 }, /* 25: 0100 1100 0010 0101 */ + {illegal,0 }, /* 26: 0100 1100 0010 0110 */ + {illegal,0 }, /* 27: 0100 1100 0010 0111 */ + {illegal,0 }, /* 28: 0100 1100 0010 1000 */ + {illegal,0 }, /* 29: 0100 1100 0010 1001 */ + {illegal,0 }, /* 2a: 0100 1100 0010 1010 */ + {illegal,0 }, /* 2b: 0100 1100 0010 1011 */ + {illegal,0 }, /* 2c: 0100 1100 0010 1100 */ + {illegal,0 }, /* 2d: 0100 1100 0010 1101 */ + {illegal,0 }, /* 2e: 0100 1100 0010 1110 */ + {illegal,0 }, /* 2f: 0100 1100 0010 1111 */ + + {illegal,0 }, /* 30: 0100 1100 0011 0000 */ + {illegal,0 }, /* 31: 0100 1100 0011 0001 */ + {illegal,0 }, /* 32: 0100 1100 0011 0010 */ + {illegal,0 }, /* 33: 0100 1100 0011 0011 */ + {illegal,0 }, /* 34: 0100 1100 0011 0100 */ + {illegal,0 }, /* 35: 0100 1100 0011 0101 */ + {illegal,0 }, /* 36: 0100 1100 0011 0110 */ + {illegal,0 }, /* 37: 0100 1100 0011 0111 */ + {illegal,0 }, /* 38: 0100 1100 0011 1000 */ + {illegal,0 }, /* 39: 0100 1100 0011 1001 */ + {illegal,0 }, /* 3a: 0100 1100 0011 1010 */ + {illegal,0 }, /* 3b: 0100 1100 0011 1011 */ + {illegal,0 }, /* 3c: 0100 1100 0011 1100 */ + {illegal,0 }, /* 3d: 0100 1100 0011 1101 */ + {illegal,0 }, /* 3e: 0100 1100 0011 1110 */ + {illegal,0 }, /* 3f: 0100 1100 0011 1111 */ + + {illegal,0 }, /* 40: 0100 1100 0100 0000 */ + {illegal,0 }, /* 41: 0100 1100 0100 0001 */ + {illegal,0 }, /* 42: 0100 1100 0100 0010 */ + {illegal,0 }, /* 43: 0100 1100 0100 0011 */ + {illegal,0 }, /* 44: 0100 1100 0100 0100 */ + {illegal,0 }, /* 45: 0100 1100 0100 0101 */ + {illegal,0 }, /* 46: 0100 1100 0100 0110 */ + {illegal,0 }, /* 47: 0100 1100 0100 0111 */ + {illegal,0 }, /* 48: 0100 1100 0100 1000 */ + {illegal,0 }, /* 49: 0100 1100 0100 1001 */ + {illegal,0 }, /* 4a: 0100 1100 0100 1010 */ + {illegal,0 }, /* 4b: 0100 1100 0100 1011 */ + {illegal,0 }, /* 4c: 0100 1100 0100 1100 */ + {illegal,0 }, /* 4d: 0100 1100 0100 1101 */ + {illegal,0 }, /* 4e: 0100 1100 0100 1110 */ + {illegal,0 }, /* 4f: 0100 1100 0100 1111 */ + + {illegal,0 }, /* 50: 0100 1100 0101 0000 */ + {illegal,0 }, /* 51: 0100 1100 0101 0001 */ + {illegal,0 }, /* 52: 0100 1100 0101 0010 */ + {illegal,0 }, /* 53: 0100 1100 0101 0011 */ + {illegal,0 }, /* 54: 0100 1100 0101 0100 */ + {illegal,0 }, /* 55: 0100 1100 0101 0101 */ + {illegal,0 }, /* 56: 0100 1100 0101 0110 */ + {illegal,0 }, /* 57: 0100 1100 0101 0111 */ + {illegal,0 }, /* 58: 0100 1100 0101 1000 */ + {illegal,0 }, /* 59: 0100 1100 0101 1001 */ + {illegal,0 }, /* 5a: 0100 1100 0101 1010 */ + {illegal,0 }, /* 5b: 0100 1100 0101 1011 */ + {illegal,0 }, /* 5c: 0100 1100 0101 1100 */ + {illegal,0 }, /* 5d: 0100 1100 0101 1101 */ + {illegal,0 }, /* 5e: 0100 1100 0101 1110 */ + {illegal,0 }, /* 5f: 0100 1100 0101 1111 */ + + {illegal,0 }, /* 60: 0100 1100 0110 0000 */ + {illegal,0 }, /* 61: 0100 1100 0110 0001 */ + {illegal,0 }, /* 62: 0100 1100 0110 0010 */ + {illegal,0 }, /* 63: 0100 1100 0110 0011 */ + {illegal,0 }, /* 64: 0100 1100 0110 0100 */ + {illegal,0 }, /* 65: 0100 1100 0110 0101 */ + {illegal,0 }, /* 66: 0100 1100 0110 0110 */ + {illegal,0 }, /* 67: 0100 1100 0110 0111 */ + {illegal,0 }, /* 68: 0100 1100 0110 1000 */ + {illegal,0 }, /* 69: 0100 1100 0110 1001 */ + {illegal,0 }, /* 6a: 0100 1100 0110 1010 */ + {illegal,0 }, /* 6b: 0100 1100 0110 1011 */ + {illegal,0 }, /* 6c: 0100 1100 0110 1100 */ + {illegal,0 }, /* 6d: 0100 1100 0110 1101 */ + {illegal,0 }, /* 6e: 0100 1100 0110 1110 */ + {illegal,0 }, /* 6f: 0100 1100 0110 1111 */ + + {illegal,0 }, /* 70: 0100 1100 0111 0000 */ + {illegal,0 }, /* 71: 0100 1100 0111 0001 */ + {illegal,0 }, /* 72: 0100 1100 0111 0010 */ + {illegal,0 }, /* 73: 0100 1100 0111 0011 */ + {illegal,0 }, /* 74: 0100 1100 0111 0100 */ + {illegal,0 }, /* 75: 0100 1100 0111 0101 */ + {illegal,0 }, /* 76: 0100 1100 0111 0110 */ + {illegal,0 }, /* 77: 0100 1100 0111 0111 */ + {illegal,0 }, /* 78: 0100 1100 0111 1000 */ + {illegal,0 }, /* 79: 0100 1100 0111 1001 */ + {illegal,0 }, /* 7a: 0100 1100 0111 1010 */ + {illegal,0 }, /* 7b: 0100 1100 0111 1011 */ + {illegal,0 }, /* 7c: 0100 1100 0111 1100 */ + {illegal,0 }, /* 7d: 0100 1100 0111 1101 */ + {illegal,0 }, /* 7e: 0100 1100 0111 1110 */ + {illegal,0 }, /* 7f: 0100 1100 0111 1111 */ + + {illegal,0 }, /* 80: 0100 1100 1000 0000 */ + {illegal,0 }, /* 81: 0100 1100 1000 0001 */ + {illegal,0 }, /* 82: 0100 1100 1000 0010 */ + {illegal,0 }, /* 83: 0100 1100 1000 0011 */ + {illegal,0 }, /* 84: 0100 1100 1000 0100 */ + {illegal,0 }, /* 85: 0100 1100 1000 0101 */ + {illegal,0 }, /* 86: 0100 1100 1000 0110 */ + {illegal,0 }, /* 87: 0100 1100 1000 0111 */ + {illegal,0 }, /* 88: 0100 1100 1000 1000 */ + {illegal,0 }, /* 89: 0100 1100 1000 1001 */ + {illegal,0 }, /* 8a: 0100 1100 1000 1010 */ + {illegal,0 }, /* 8b: 0100 1100 1000 1011 */ + {illegal,0 }, /* 8c: 0100 1100 1000 1100 */ + {illegal,0 }, /* 8d: 0100 1100 1000 1101 */ + {illegal,0 }, /* 8e: 0100 1100 1000 1110 */ + {illegal,0 }, /* 8f: 0100 1100 1000 1111 */ + + {illegal,0 }, /* 90: 0100 1100 1001 0000 */ + {illegal,0 }, /* 91: 0100 1100 1001 0001 */ + {illegal,0 }, /* 92: 0100 1100 1001 0010 */ + {illegal,0 }, /* 93: 0100 1100 1001 0011 */ + {illegal,0 }, /* 94: 0100 1100 1001 0100 */ + {illegal,0 }, /* 95: 0100 1100 1001 0101 */ + {illegal,0 }, /* 96: 0100 1100 1001 0110 */ + {illegal,0 }, /* 97: 0100 1100 1001 0111 */ + {illegal,0 }, /* 98: 0100 1100 1001 1000 */ + {illegal,0 }, /* 99: 0100 1100 1001 1001 */ + {illegal,0 }, /* 9a: 0100 1100 1001 1010 */ + {illegal,0 }, /* 9b: 0100 1100 1001 1011 */ + {illegal,0 }, /* 9c: 0100 1100 1001 1100 */ + {illegal,0 }, /* 9d: 0100 1100 1001 1101 */ + {illegal,0 }, /* 9e: 0100 1100 1001 1110 */ + {illegal,0 }, /* 9f: 0100 1100 1001 1111 */ + + {illegal,0 }, /* a0: 0100 1100 1010 0000 */ + {illegal,0 }, /* a1: 0100 1100 1010 0001 */ + {illegal,0 }, /* a2: 0100 1100 1010 0010 */ + {illegal,0 }, /* a3: 0100 1100 1010 0011 */ + {illegal,0 }, /* a4: 0100 1100 1010 0100 */ + {illegal,0 }, /* a5: 0100 1100 1010 0101 */ + {illegal,0 }, /* a6: 0100 1100 1010 0110 */ + {illegal,0 }, /* a7: 0100 1100 1010 0111 */ + {illegal,0 }, /* a8: 0100 1100 1010 1000 */ + {illegal,0 }, /* a9: 0100 1100 1010 1001 */ + {illegal,0 }, /* aa: 0100 1100 1010 1010 */ + {illegal,0 }, /* ab: 0100 1100 1010 1011 */ + {illegal,0 }, /* ac: 0100 1100 1010 1100 */ + {illegal,0 }, /* ad: 0100 1100 1010 1101 */ + {illegal,0 }, /* ae: 0100 1100 1010 1110 */ + {illegal,0 }, /* af: 0100 1100 1010 1111 */ + + {illegal,0 }, /* b0: 0100 1100 1011 0000 */ + {illegal,0 }, /* b1: 0100 1100 1011 0001 */ + {illegal,0 }, /* b2: 0100 1100 1011 0010 */ + {illegal,0 }, /* b3: 0100 1100 1011 0011 */ + {illegal,0 }, /* b4: 0100 1100 1011 0100 */ + {illegal,0 }, /* b5: 0100 1100 1011 0101 */ + {illegal,0 }, /* b6: 0100 1100 1011 0110 */ + {illegal,0 }, /* b7: 0100 1100 1011 0111 */ + {illegal,0 }, /* b8: 0100 1100 1011 1000 */ + {illegal,0 }, /* b9: 0100 1100 1011 1001 */ + {illegal,0 }, /* ba: 0100 1100 1011 1010 */ + {illegal,0 }, /* bb: 0100 1100 1011 1011 */ + {illegal,0 }, /* bc: 0100 1100 1011 1100 */ + {illegal,0 }, /* bd: 0100 1100 1011 1101 */ + {illegal,0 }, /* be: 0100 1100 1011 1110 */ + {illegal,0 }, /* bf: 0100 1100 1011 1111 */ {MOV,"A,PA" }, /* c0: 0100 1100 1100 0000 */ {MOV,"A,PB" }, /* c1: 0100 1100 1100 0001 */ {MOV,"A,PC" }, /* c2: 0100 1100 1100 0010 */ {MOV,"A,PD" }, /* c3: 0100 1100 1100 0011 */ - {illegal,0 }, /* c4: 0100 1100 1100 0100 */ + {illegal,0 }, /* c4: 0100 1100 1100 0100 */ {MOV,"A,PF" }, /* c5: 0100 1100 1100 0101 */ {MOV,"A,MKH" }, /* c6: 0100 1100 1100 0110 */ {MOV,"A,MKL" }, /* c7: 0100 1100 1100 0111 */ {illegal,0 }, /* c8: 0100 1100 1100 1000 */ {MOV,"A,SMH" }, /* c9: 0100 1100 1100 1001 */ - {illegal,0 }, /* ca: 0100 1100 1100 1010 */ + {illegal,0 }, /* ca: 0100 1100 1100 1010 */ {MOV,"A,EOM" }, /* cb: 0100 1100 1100 1011 */ - {illegal,0 }, /* cc: 0100 1100 1100 1100 */ + {illegal,0 }, /* cc: 0100 1100 1100 1100 */ {MOV,"A,TMM" }, /* cd: 0100 1100 1100 1101 */ {MOV,"A,PT" }, /* ce: 0100 1100 1100 1110 */ /* 7807 */ - {illegal,0 }, /* cf: 0100 1100 1100 1111 */ - - {illegal,0 }, /* d0: 0100 1100 1101 0000 */ - {illegal,0 }, /* d1: 0100 1100 1101 0001 */ - {illegal,0 }, /* d2: 0100 1100 1101 0010 */ - {illegal,0 }, /* d3: 0100 1100 1101 0011 */ - {illegal,0 }, /* d4: 0100 1100 1101 0100 */ - {illegal,0 }, /* d5: 0100 1100 1101 0101 */ - {illegal,0 }, /* d6: 0100 1100 1101 0110 */ - {illegal,0 }, /* d7: 0100 1100 1101 0111 */ - {illegal,0 }, /* d8: 0100 1100 1101 1000 */ + {illegal,0 }, /* cf: 0100 1100 1100 1111 */ + + {illegal,0 }, /* d0: 0100 1100 1101 0000 */ + {illegal,0 }, /* d1: 0100 1100 1101 0001 */ + {illegal,0 }, /* d2: 0100 1100 1101 0010 */ + {illegal,0 }, /* d3: 0100 1100 1101 0011 */ + {illegal,0 }, /* d4: 0100 1100 1101 0100 */ + {illegal,0 }, /* d5: 0100 1100 1101 0101 */ + {illegal,0 }, /* d6: 0100 1100 1101 0110 */ + {illegal,0 }, /* d7: 0100 1100 1101 0111 */ + {illegal,0 }, /* d8: 0100 1100 1101 1000 */ {MOV,"A,RXB" }, /* d9: 0100 1100 1101 1001 */ - {illegal,0 }, /* da: 0100 1100 1101 1010 */ - {illegal,0 }, /* db: 0100 1100 1101 1011 */ - {illegal,0 }, /* dc: 0100 1100 1101 1100 */ - {illegal,0 }, /* dd: 0100 1100 1101 1101 */ - {illegal,0 }, /* de: 0100 1100 1101 1110 */ - {illegal,0 }, /* df: 0100 1100 1101 1111 */ - - {illegal,0 }, /* e0: 0100 1100 1110 0000 */ - {illegal,0 }, /* e1: 0100 1100 1110 0001 */ - {illegal,0 }, /* e2: 0100 1100 1110 0010 */ - {illegal,0 }, /* e3: 0100 1100 1110 0011 */ - {illegal,0 }, /* e4: 0100 1100 1110 0100 */ - {illegal,0 }, /* e5: 0100 1100 1110 0101 */ - {illegal,0 }, /* e6: 0100 1100 1110 0110 */ - {illegal,0 }, /* e7: 0100 1100 1110 0111 */ - {illegal,0 }, /* e8: 0100 1100 1110 1000 */ - {illegal,0 }, /* e9: 0100 1100 1110 1001 */ - {illegal,0 }, /* ea: 0100 1100 1110 1010 */ - {illegal,0 }, /* eb: 0100 1100 1110 1011 */ - {illegal,0 }, /* ec: 0100 1100 1110 1100 */ - {illegal,0 }, /* ed: 0100 1100 1110 1101 */ - {illegal,0 }, /* ee: 0100 1100 1110 1110 */ - {illegal,0 }, /* ef: 0100 1100 1110 1111 */ - - {illegal,0 }, /* f0: 0100 1100 1111 0000 */ - {illegal,0 }, /* f1: 0100 1100 1111 0001 */ - {illegal,0 }, /* f2: 0100 1100 1111 0010 */ - {illegal,0 }, /* f3: 0100 1100 1111 0011 */ - {illegal,0 }, /* f4: 0100 1100 1111 0100 */ - {illegal,0 }, /* f5: 0100 1100 1111 0101 */ - {illegal,0 }, /* f6: 0100 1100 1111 0110 */ - {illegal,0 }, /* f7: 0100 1100 1111 0111 */ - {illegal,0 }, /* f8: 0100 1100 1111 1000 */ - {illegal,0 }, /* f9: 0100 1100 1111 1001 */ - {illegal,0 }, /* fa: 0100 1100 1111 1010 */ - {illegal,0 }, /* fb: 0100 1100 1111 1011 */ - {illegal,0 }, /* fc: 0100 1100 1111 1100 */ - {illegal,0 }, /* fd: 0100 1100 1111 1101 */ - {illegal,0 }, /* fe: 0100 1100 1111 1110 */ - {illegal,0 } /* ff: 0100 1100 1111 1111 */ + {illegal,0 }, /* da: 0100 1100 1101 1010 */ + {illegal,0 }, /* db: 0100 1100 1101 1011 */ + {illegal,0 }, /* dc: 0100 1100 1101 1100 */ + {illegal,0 }, /* dd: 0100 1100 1101 1101 */ + {illegal,0 }, /* de: 0100 1100 1101 1110 */ + {illegal,0 }, /* df: 0100 1100 1101 1111 */ + + {illegal,0 }, /* e0: 0100 1100 1110 0000 */ + {illegal,0 }, /* e1: 0100 1100 1110 0001 */ + {illegal,0 }, /* e2: 0100 1100 1110 0010 */ + {illegal,0 }, /* e3: 0100 1100 1110 0011 */ + {illegal,0 }, /* e4: 0100 1100 1110 0100 */ + {illegal,0 }, /* e5: 0100 1100 1110 0101 */ + {illegal,0 }, /* e6: 0100 1100 1110 0110 */ + {illegal,0 }, /* e7: 0100 1100 1110 0111 */ + {illegal,0 }, /* e8: 0100 1100 1110 1000 */ + {illegal,0 }, /* e9: 0100 1100 1110 1001 */ + {illegal,0 }, /* ea: 0100 1100 1110 1010 */ + {illegal,0 }, /* eb: 0100 1100 1110 1011 */ + {illegal,0 }, /* ec: 0100 1100 1110 1100 */ + {illegal,0 }, /* ed: 0100 1100 1110 1101 */ + {illegal,0 }, /* ee: 0100 1100 1110 1110 */ + {illegal,0 }, /* ef: 0100 1100 1110 1111 */ + + {illegal,0 }, /* f0: 0100 1100 1111 0000 */ + {illegal,0 }, /* f1: 0100 1100 1111 0001 */ + {illegal,0 }, /* f2: 0100 1100 1111 0010 */ + {illegal,0 }, /* f3: 0100 1100 1111 0011 */ + {illegal,0 }, /* f4: 0100 1100 1111 0100 */ + {illegal,0 }, /* f5: 0100 1100 1111 0101 */ + {illegal,0 }, /* f6: 0100 1100 1111 0110 */ + {illegal,0 }, /* f7: 0100 1100 1111 0111 */ + {illegal,0 }, /* f8: 0100 1100 1111 1000 */ + {illegal,0 }, /* f9: 0100 1100 1111 1001 */ + {illegal,0 }, /* fa: 0100 1100 1111 1010 */ + {illegal,0 }, /* fb: 0100 1100 1111 1011 */ + {illegal,0 }, /* fc: 0100 1100 1111 1100 */ + {illegal,0 }, /* fd: 0100 1100 1111 1101 */ + {illegal,0 }, /* fe: 0100 1100 1111 1110 */ + {illegal,0 } /* ff: 0100 1100 1111 1111 */ }; /* prefix 4D */ static const struct dasm_s dasm4D_7810[256] = { - {illegal,0 }, /* 00: 0100 1101 0000 0000 */ - {illegal,0 }, /* 01: 0100 1101 0000 0001 */ - {illegal,0 }, /* 02: 0100 1101 0000 0010 */ - {illegal,0 }, /* 03: 0100 1101 0000 0011 */ - {illegal,0 }, /* 04: 0100 1101 0000 0100 */ - {illegal,0 }, /* 05: 0100 1101 0000 0101 */ - {illegal,0 }, /* 06: 0100 1101 0000 0110 */ - {illegal,0 }, /* 07: 0100 1101 0000 0111 */ - {illegal,0 }, /* 08: 0100 1101 0000 1000 */ - {illegal,0 }, /* 09: 0100 1101 0000 1001 */ - {illegal,0 }, /* 0a: 0100 1101 0000 1010 */ - {illegal,0 }, /* 0b: 0100 1101 0000 1011 */ - {illegal,0 }, /* 0c: 0100 1101 0000 1100 */ - {illegal,0 }, /* 0d: 0100 1101 0000 1101 */ - {illegal,0 }, /* 0e: 0100 1101 0000 1110 */ - {illegal,0 }, /* 0f: 0100 1101 0000 1111 */ - - {illegal,0 }, /* 10: 0100 1101 0001 0000 */ - {illegal,0 }, /* 11: 0100 1101 0001 0001 */ - {illegal,0 }, /* 12: 0100 1101 0001 0010 */ - {illegal,0 }, /* 13: 0100 1101 0001 0011 */ - {illegal,0 }, /* 14: 0100 1101 0001 0100 */ - {illegal,0 }, /* 15: 0100 1101 0001 0101 */ - {illegal,0 }, /* 16: 0100 1101 0001 0110 */ - {illegal,0 }, /* 17: 0100 1101 0001 0111 */ - {illegal,0 }, /* 18: 0100 1101 0001 1000 */ - {illegal,0 }, /* 19: 0100 1101 0001 1001 */ - {illegal,0 }, /* 1a: 0100 1101 0001 1010 */ - {illegal,0 }, /* 1b: 0100 1101 0001 1011 */ - {illegal,0 }, /* 1c: 0100 1101 0001 1100 */ - {illegal,0 }, /* 1d: 0100 1101 0001 1101 */ - {illegal,0 }, /* 1e: 0100 1101 0001 1110 */ - {illegal,0 }, /* 1f: 0100 1101 0001 1111 */ - - {illegal,0 }, /* 20: 0100 1101 0010 0000 */ - {illegal,0 }, /* 21: 0100 1101 0010 0001 */ - {illegal,0 }, /* 22: 0100 1101 0010 0010 */ - {illegal,0 }, /* 23: 0100 1101 0010 0011 */ - {illegal,0 }, /* 24: 0100 1101 0010 0100 */ - {illegal,0 }, /* 25: 0100 1101 0010 0101 */ - {illegal,0 }, /* 26: 0100 1101 0010 0110 */ - {illegal,0 }, /* 27: 0100 1101 0010 0111 */ - {illegal,0 }, /* 28: 0100 1101 0010 1000 */ - {illegal,0 }, /* 29: 0100 1101 0010 1001 */ - {illegal,0 }, /* 2a: 0100 1101 0010 1010 */ - {illegal,0 }, /* 2b: 0100 1101 0010 1011 */ - {illegal,0 }, /* 2c: 0100 1101 0010 1100 */ - {illegal,0 }, /* 2d: 0100 1101 0010 1101 */ - {illegal,0 }, /* 2e: 0100 1101 0010 1110 */ - {illegal,0 }, /* 2f: 0100 1101 0010 1111 */ - - {illegal,0 }, /* 30: 0100 1101 0011 0000 */ - {illegal,0 }, /* 31: 0100 1101 0011 0001 */ - {illegal,0 }, /* 32: 0100 1101 0011 0010 */ - {illegal,0 }, /* 33: 0100 1101 0011 0011 */ - {illegal,0 }, /* 34: 0100 1101 0011 0100 */ - {illegal,0 }, /* 35: 0100 1101 0011 0101 */ - {illegal,0 }, /* 36: 0100 1101 0011 0110 */ - {illegal,0 }, /* 37: 0100 1101 0011 0111 */ - {illegal,0 }, /* 38: 0100 1101 0011 1000 */ - {illegal,0 }, /* 39: 0100 1101 0011 1001 */ - {illegal,0 }, /* 3a: 0100 1101 0011 1010 */ - {illegal,0 }, /* 3b: 0100 1101 0011 1011 */ - {illegal,0 }, /* 3c: 0100 1101 0011 1100 */ - {illegal,0 }, /* 3d: 0100 1101 0011 1101 */ - {illegal,0 }, /* 3e: 0100 1101 0011 1110 */ - {illegal,0 }, /* 3f: 0100 1101 0011 1111 */ - - {illegal,0 }, /* 40: 0100 1101 0100 0000 */ - {illegal,0 }, /* 41: 0100 1101 0100 0001 */ - {illegal,0 }, /* 42: 0100 1101 0100 0010 */ - {illegal,0 }, /* 43: 0100 1101 0100 0011 */ - {illegal,0 }, /* 44: 0100 1101 0100 0100 */ - {illegal,0 }, /* 45: 0100 1101 0100 0101 */ - {illegal,0 }, /* 46: 0100 1101 0100 0110 */ - {illegal,0 }, /* 47: 0100 1101 0100 0111 */ - {illegal,0 }, /* 48: 0100 1101 0100 1000 */ - {illegal,0 }, /* 49: 0100 1101 0100 1001 */ - {illegal,0 }, /* 4a: 0100 1101 0100 1010 */ - {illegal,0 }, /* 4b: 0100 1101 0100 1011 */ - {illegal,0 }, /* 4c: 0100 1101 0100 1100 */ - {illegal,0 }, /* 4d: 0100 1101 0100 1101 */ - {illegal,0 }, /* 4e: 0100 1101 0100 1110 */ - {illegal,0 }, /* 4f: 0100 1101 0100 1111 */ - - {illegal,0 }, /* 50: 0100 1101 0101 0000 */ - {illegal,0 }, /* 51: 0100 1101 0101 0001 */ - {illegal,0 }, /* 52: 0100 1101 0101 0010 */ - {illegal,0 }, /* 53: 0100 1101 0101 0011 */ - {illegal,0 }, /* 54: 0100 1101 0101 0100 */ - {illegal,0 }, /* 55: 0100 1101 0101 0101 */ - {illegal,0 }, /* 56: 0100 1101 0101 0110 */ - {illegal,0 }, /* 57: 0100 1101 0101 0111 */ - {illegal,0 }, /* 58: 0100 1101 0101 1000 */ - {illegal,0 }, /* 59: 0100 1101 0101 1001 */ - {illegal,0 }, /* 5a: 0100 1101 0101 1010 */ - {illegal,0 }, /* 5b: 0100 1101 0101 1011 */ - {illegal,0 }, /* 5c: 0100 1101 0101 1100 */ - {illegal,0 }, /* 5d: 0100 1101 0101 1101 */ - {illegal,0 }, /* 5e: 0100 1101 0101 1110 */ - {illegal,0 }, /* 5f: 0100 1101 0101 1111 */ - - {illegal,0 }, /* 60: 0100 1101 0110 0000 */ - {illegal,0 }, /* 61: 0100 1101 0110 0001 */ - {illegal,0 }, /* 62: 0100 1101 0110 0010 */ - {illegal,0 }, /* 63: 0100 1101 0110 0011 */ - {illegal,0 }, /* 64: 0100 1101 0110 0100 */ - {illegal,0 }, /* 65: 0100 1101 0110 0101 */ - {illegal,0 }, /* 66: 0100 1101 0110 0110 */ - {illegal,0 }, /* 67: 0100 1101 0110 0111 */ - {illegal,0 }, /* 68: 0100 1101 0110 1000 */ - {illegal,0 }, /* 69: 0100 1101 0110 1001 */ - {illegal,0 }, /* 6a: 0100 1101 0110 1010 */ - {illegal,0 }, /* 6b: 0100 1101 0110 1011 */ - {illegal,0 }, /* 6c: 0100 1101 0110 1100 */ - {illegal,0 }, /* 6d: 0100 1101 0110 1101 */ - {illegal,0 }, /* 6e: 0100 1101 0110 1110 */ - {illegal,0 }, /* 6f: 0100 1101 0110 1111 */ - - {illegal,0 }, /* 70: 0100 1101 0111 0000 */ - {illegal,0 }, /* 71: 0100 1101 0111 0001 */ - {illegal,0 }, /* 72: 0100 1101 0111 0010 */ - {illegal,0 }, /* 73: 0100 1101 0111 0011 */ - {illegal,0 }, /* 74: 0100 1101 0111 0100 */ - {illegal,0 }, /* 75: 0100 1101 0111 0101 */ - {illegal,0 }, /* 76: 0100 1101 0111 0110 */ - {illegal,0 }, /* 77: 0100 1101 0111 0111 */ - {illegal,0 }, /* 78: 0100 1101 0111 1000 */ - {illegal,0 }, /* 79: 0100 1101 0111 1001 */ - {illegal,0 }, /* 7a: 0100 1101 0111 1010 */ - {illegal,0 }, /* 7b: 0100 1101 0111 1011 */ - {illegal,0 }, /* 7c: 0100 1101 0111 1100 */ - {illegal,0 }, /* 7d: 0100 1101 0111 1101 */ - {illegal,0 }, /* 7e: 0100 1101 0111 1110 */ - {illegal,0 }, /* 7f: 0100 1101 0111 1111 */ - - {illegal,0 }, /* 80: 0100 1101 1000 0000 */ - {illegal,0 }, /* 81: 0100 1101 1000 0001 */ - {illegal,0 }, /* 82: 0100 1101 1000 0010 */ - {illegal,0 }, /* 83: 0100 1101 1000 0011 */ - {illegal,0 }, /* 84: 0100 1101 1000 0100 */ - {illegal,0 }, /* 85: 0100 1101 1000 0101 */ - {illegal,0 }, /* 86: 0100 1101 1000 0110 */ - {illegal,0 }, /* 87: 0100 1101 1000 0111 */ - {illegal,0 }, /* 88: 0100 1101 1000 1000 */ - {illegal,0 }, /* 89: 0100 1101 1000 1001 */ - {illegal,0 }, /* 8a: 0100 1101 1000 1010 */ - {illegal,0 }, /* 8b: 0100 1101 1000 1011 */ - {illegal,0 }, /* 8c: 0100 1101 1000 1100 */ - {illegal,0 }, /* 8d: 0100 1101 1000 1101 */ - {illegal,0 }, /* 8e: 0100 1101 1000 1110 */ - {illegal,0 }, /* 8f: 0100 1101 1000 1111 */ - - {illegal,0 }, /* 90: 0100 1101 1001 0000 */ - {illegal,0 }, /* 91: 0100 1101 1001 0001 */ - {illegal,0 }, /* 92: 0100 1101 1001 0010 */ - {illegal,0 }, /* 93: 0100 1101 1001 0011 */ - {illegal,0 }, /* 94: 0100 1101 1001 0100 */ - {illegal,0 }, /* 95: 0100 1101 1001 0101 */ - {illegal,0 }, /* 96: 0100 1101 1001 0110 */ - {illegal,0 }, /* 97: 0100 1101 1001 0111 */ - {illegal,0 }, /* 98: 0100 1101 1001 1000 */ - {illegal,0 }, /* 99: 0100 1101 1001 1001 */ - {illegal,0 }, /* 9a: 0100 1101 1001 1010 */ - {illegal,0 }, /* 9b: 0100 1101 1001 1011 */ - {illegal,0 }, /* 9c: 0100 1101 1001 1100 */ - {illegal,0 }, /* 9d: 0100 1101 1001 1101 */ - {illegal,0 }, /* 9e: 0100 1101 1001 1110 */ - {illegal,0 }, /* 9f: 0100 1101 1001 1111 */ - - {illegal,0 }, /* a0: 0100 1101 1010 0000 */ - {illegal,0 }, /* a1: 0100 1101 1010 0001 */ - {illegal,0 }, /* a2: 0100 1101 1010 0010 */ - {illegal,0 }, /* a3: 0100 1101 1010 0011 */ - {illegal,0 }, /* a4: 0100 1101 1010 0100 */ - {illegal,0 }, /* a5: 0100 1101 1010 0101 */ - {illegal,0 }, /* a6: 0100 1101 1010 0110 */ - {illegal,0 }, /* a7: 0100 1101 1010 0111 */ - {illegal,0 }, /* a8: 0100 1101 1010 1000 */ - {illegal,0 }, /* a9: 0100 1101 1010 1001 */ - {illegal,0 }, /* aa: 0100 1101 1010 1010 */ - {illegal,0 }, /* ab: 0100 1101 1010 1011 */ - {illegal,0 }, /* ac: 0100 1101 1010 1100 */ - {illegal,0 }, /* ad: 0100 1101 1010 1101 */ - {illegal,0 }, /* ae: 0100 1101 1010 1110 */ - {illegal,0 }, /* af: 0100 1101 1010 1111 */ - - {illegal,0 }, /* b0: 0100 1101 1011 0000 */ - {illegal,0 }, /* b1: 0100 1101 1011 0001 */ - {illegal,0 }, /* b2: 0100 1101 1011 0010 */ - {illegal,0 }, /* b3: 0100 1101 1011 0011 */ - {illegal,0 }, /* b4: 0100 1101 1011 0100 */ - {illegal,0 }, /* b5: 0100 1101 1011 0101 */ - {illegal,0 }, /* b6: 0100 1101 1011 0110 */ - {illegal,0 }, /* b7: 0100 1101 1011 0111 */ - {illegal,0 }, /* b8: 0100 1101 1011 1000 */ - {illegal,0 }, /* b9: 0100 1101 1011 1001 */ - {illegal,0 }, /* ba: 0100 1101 1011 1010 */ - {illegal,0 }, /* bb: 0100 1101 1011 1011 */ - {illegal,0 }, /* bc: 0100 1101 1011 1100 */ - {illegal,0 }, /* bd: 0100 1101 1011 1101 */ - {illegal,0 }, /* be: 0100 1101 1011 1110 */ - {illegal,0 }, /* bf: 0100 1101 1011 1111 */ + {illegal,0 }, /* 00: 0100 1101 0000 0000 */ + {illegal,0 }, /* 01: 0100 1101 0000 0001 */ + {illegal,0 }, /* 02: 0100 1101 0000 0010 */ + {illegal,0 }, /* 03: 0100 1101 0000 0011 */ + {illegal,0 }, /* 04: 0100 1101 0000 0100 */ + {illegal,0 }, /* 05: 0100 1101 0000 0101 */ + {illegal,0 }, /* 06: 0100 1101 0000 0110 */ + {illegal,0 }, /* 07: 0100 1101 0000 0111 */ + {illegal,0 }, /* 08: 0100 1101 0000 1000 */ + {illegal,0 }, /* 09: 0100 1101 0000 1001 */ + {illegal,0 }, /* 0a: 0100 1101 0000 1010 */ + {illegal,0 }, /* 0b: 0100 1101 0000 1011 */ + {illegal,0 }, /* 0c: 0100 1101 0000 1100 */ + {illegal,0 }, /* 0d: 0100 1101 0000 1101 */ + {illegal,0 }, /* 0e: 0100 1101 0000 1110 */ + {illegal,0 }, /* 0f: 0100 1101 0000 1111 */ + + {illegal,0 }, /* 10: 0100 1101 0001 0000 */ + {illegal,0 }, /* 11: 0100 1101 0001 0001 */ + {illegal,0 }, /* 12: 0100 1101 0001 0010 */ + {illegal,0 }, /* 13: 0100 1101 0001 0011 */ + {illegal,0 }, /* 14: 0100 1101 0001 0100 */ + {illegal,0 }, /* 15: 0100 1101 0001 0101 */ + {illegal,0 }, /* 16: 0100 1101 0001 0110 */ + {illegal,0 }, /* 17: 0100 1101 0001 0111 */ + {illegal,0 }, /* 18: 0100 1101 0001 1000 */ + {illegal,0 }, /* 19: 0100 1101 0001 1001 */ + {illegal,0 }, /* 1a: 0100 1101 0001 1010 */ + {illegal,0 }, /* 1b: 0100 1101 0001 1011 */ + {illegal,0 }, /* 1c: 0100 1101 0001 1100 */ + {illegal,0 }, /* 1d: 0100 1101 0001 1101 */ + {illegal,0 }, /* 1e: 0100 1101 0001 1110 */ + {illegal,0 }, /* 1f: 0100 1101 0001 1111 */ + + {illegal,0 }, /* 20: 0100 1101 0010 0000 */ + {illegal,0 }, /* 21: 0100 1101 0010 0001 */ + {illegal,0 }, /* 22: 0100 1101 0010 0010 */ + {illegal,0 }, /* 23: 0100 1101 0010 0011 */ + {illegal,0 }, /* 24: 0100 1101 0010 0100 */ + {illegal,0 }, /* 25: 0100 1101 0010 0101 */ + {illegal,0 }, /* 26: 0100 1101 0010 0110 */ + {illegal,0 }, /* 27: 0100 1101 0010 0111 */ + {illegal,0 }, /* 28: 0100 1101 0010 1000 */ + {illegal,0 }, /* 29: 0100 1101 0010 1001 */ + {illegal,0 }, /* 2a: 0100 1101 0010 1010 */ + {illegal,0 }, /* 2b: 0100 1101 0010 1011 */ + {illegal,0 }, /* 2c: 0100 1101 0010 1100 */ + {illegal,0 }, /* 2d: 0100 1101 0010 1101 */ + {illegal,0 }, /* 2e: 0100 1101 0010 1110 */ + {illegal,0 }, /* 2f: 0100 1101 0010 1111 */ + + {illegal,0 }, /* 30: 0100 1101 0011 0000 */ + {illegal,0 }, /* 31: 0100 1101 0011 0001 */ + {illegal,0 }, /* 32: 0100 1101 0011 0010 */ + {illegal,0 }, /* 33: 0100 1101 0011 0011 */ + {illegal,0 }, /* 34: 0100 1101 0011 0100 */ + {illegal,0 }, /* 35: 0100 1101 0011 0101 */ + {illegal,0 }, /* 36: 0100 1101 0011 0110 */ + {illegal,0 }, /* 37: 0100 1101 0011 0111 */ + {illegal,0 }, /* 38: 0100 1101 0011 1000 */ + {illegal,0 }, /* 39: 0100 1101 0011 1001 */ + {illegal,0 }, /* 3a: 0100 1101 0011 1010 */ + {illegal,0 }, /* 3b: 0100 1101 0011 1011 */ + {illegal,0 }, /* 3c: 0100 1101 0011 1100 */ + {illegal,0 }, /* 3d: 0100 1101 0011 1101 */ + {illegal,0 }, /* 3e: 0100 1101 0011 1110 */ + {illegal,0 }, /* 3f: 0100 1101 0011 1111 */ + + {illegal,0 }, /* 40: 0100 1101 0100 0000 */ + {illegal,0 }, /* 41: 0100 1101 0100 0001 */ + {illegal,0 }, /* 42: 0100 1101 0100 0010 */ + {illegal,0 }, /* 43: 0100 1101 0100 0011 */ + {illegal,0 }, /* 44: 0100 1101 0100 0100 */ + {illegal,0 }, /* 45: 0100 1101 0100 0101 */ + {illegal,0 }, /* 46: 0100 1101 0100 0110 */ + {illegal,0 }, /* 47: 0100 1101 0100 0111 */ + {illegal,0 }, /* 48: 0100 1101 0100 1000 */ + {illegal,0 }, /* 49: 0100 1101 0100 1001 */ + {illegal,0 }, /* 4a: 0100 1101 0100 1010 */ + {illegal,0 }, /* 4b: 0100 1101 0100 1011 */ + {illegal,0 }, /* 4c: 0100 1101 0100 1100 */ + {illegal,0 }, /* 4d: 0100 1101 0100 1101 */ + {illegal,0 }, /* 4e: 0100 1101 0100 1110 */ + {illegal,0 }, /* 4f: 0100 1101 0100 1111 */ + + {illegal,0 }, /* 50: 0100 1101 0101 0000 */ + {illegal,0 }, /* 51: 0100 1101 0101 0001 */ + {illegal,0 }, /* 52: 0100 1101 0101 0010 */ + {illegal,0 }, /* 53: 0100 1101 0101 0011 */ + {illegal,0 }, /* 54: 0100 1101 0101 0100 */ + {illegal,0 }, /* 55: 0100 1101 0101 0101 */ + {illegal,0 }, /* 56: 0100 1101 0101 0110 */ + {illegal,0 }, /* 57: 0100 1101 0101 0111 */ + {illegal,0 }, /* 58: 0100 1101 0101 1000 */ + {illegal,0 }, /* 59: 0100 1101 0101 1001 */ + {illegal,0 }, /* 5a: 0100 1101 0101 1010 */ + {illegal,0 }, /* 5b: 0100 1101 0101 1011 */ + {illegal,0 }, /* 5c: 0100 1101 0101 1100 */ + {illegal,0 }, /* 5d: 0100 1101 0101 1101 */ + {illegal,0 }, /* 5e: 0100 1101 0101 1110 */ + {illegal,0 }, /* 5f: 0100 1101 0101 1111 */ + + {illegal,0 }, /* 60: 0100 1101 0110 0000 */ + {illegal,0 }, /* 61: 0100 1101 0110 0001 */ + {illegal,0 }, /* 62: 0100 1101 0110 0010 */ + {illegal,0 }, /* 63: 0100 1101 0110 0011 */ + {illegal,0 }, /* 64: 0100 1101 0110 0100 */ + {illegal,0 }, /* 65: 0100 1101 0110 0101 */ + {illegal,0 }, /* 66: 0100 1101 0110 0110 */ + {illegal,0 }, /* 67: 0100 1101 0110 0111 */ + {illegal,0 }, /* 68: 0100 1101 0110 1000 */ + {illegal,0 }, /* 69: 0100 1101 0110 1001 */ + {illegal,0 }, /* 6a: 0100 1101 0110 1010 */ + {illegal,0 }, /* 6b: 0100 1101 0110 1011 */ + {illegal,0 }, /* 6c: 0100 1101 0110 1100 */ + {illegal,0 }, /* 6d: 0100 1101 0110 1101 */ + {illegal,0 }, /* 6e: 0100 1101 0110 1110 */ + {illegal,0 }, /* 6f: 0100 1101 0110 1111 */ + + {illegal,0 }, /* 70: 0100 1101 0111 0000 */ + {illegal,0 }, /* 71: 0100 1101 0111 0001 */ + {illegal,0 }, /* 72: 0100 1101 0111 0010 */ + {illegal,0 }, /* 73: 0100 1101 0111 0011 */ + {illegal,0 }, /* 74: 0100 1101 0111 0100 */ + {illegal,0 }, /* 75: 0100 1101 0111 0101 */ + {illegal,0 }, /* 76: 0100 1101 0111 0110 */ + {illegal,0 }, /* 77: 0100 1101 0111 0111 */ + {illegal,0 }, /* 78: 0100 1101 0111 1000 */ + {illegal,0 }, /* 79: 0100 1101 0111 1001 */ + {illegal,0 }, /* 7a: 0100 1101 0111 1010 */ + {illegal,0 }, /* 7b: 0100 1101 0111 1011 */ + {illegal,0 }, /* 7c: 0100 1101 0111 1100 */ + {illegal,0 }, /* 7d: 0100 1101 0111 1101 */ + {illegal,0 }, /* 7e: 0100 1101 0111 1110 */ + {illegal,0 }, /* 7f: 0100 1101 0111 1111 */ + + {illegal,0 }, /* 80: 0100 1101 1000 0000 */ + {illegal,0 }, /* 81: 0100 1101 1000 0001 */ + {illegal,0 }, /* 82: 0100 1101 1000 0010 */ + {illegal,0 }, /* 83: 0100 1101 1000 0011 */ + {illegal,0 }, /* 84: 0100 1101 1000 0100 */ + {illegal,0 }, /* 85: 0100 1101 1000 0101 */ + {illegal,0 }, /* 86: 0100 1101 1000 0110 */ + {illegal,0 }, /* 87: 0100 1101 1000 0111 */ + {illegal,0 }, /* 88: 0100 1101 1000 1000 */ + {illegal,0 }, /* 89: 0100 1101 1000 1001 */ + {illegal,0 }, /* 8a: 0100 1101 1000 1010 */ + {illegal,0 }, /* 8b: 0100 1101 1000 1011 */ + {illegal,0 }, /* 8c: 0100 1101 1000 1100 */ + {illegal,0 }, /* 8d: 0100 1101 1000 1101 */ + {illegal,0 }, /* 8e: 0100 1101 1000 1110 */ + {illegal,0 }, /* 8f: 0100 1101 1000 1111 */ + + {illegal,0 }, /* 90: 0100 1101 1001 0000 */ + {illegal,0 }, /* 91: 0100 1101 1001 0001 */ + {illegal,0 }, /* 92: 0100 1101 1001 0010 */ + {illegal,0 }, /* 93: 0100 1101 1001 0011 */ + {illegal,0 }, /* 94: 0100 1101 1001 0100 */ + {illegal,0 }, /* 95: 0100 1101 1001 0101 */ + {illegal,0 }, /* 96: 0100 1101 1001 0110 */ + {illegal,0 }, /* 97: 0100 1101 1001 0111 */ + {illegal,0 }, /* 98: 0100 1101 1001 1000 */ + {illegal,0 }, /* 99: 0100 1101 1001 1001 */ + {illegal,0 }, /* 9a: 0100 1101 1001 1010 */ + {illegal,0 }, /* 9b: 0100 1101 1001 1011 */ + {illegal,0 }, /* 9c: 0100 1101 1001 1100 */ + {illegal,0 }, /* 9d: 0100 1101 1001 1101 */ + {illegal,0 }, /* 9e: 0100 1101 1001 1110 */ + {illegal,0 }, /* 9f: 0100 1101 1001 1111 */ + + {illegal,0 }, /* a0: 0100 1101 1010 0000 */ + {illegal,0 }, /* a1: 0100 1101 1010 0001 */ + {illegal,0 }, /* a2: 0100 1101 1010 0010 */ + {illegal,0 }, /* a3: 0100 1101 1010 0011 */ + {illegal,0 }, /* a4: 0100 1101 1010 0100 */ + {illegal,0 }, /* a5: 0100 1101 1010 0101 */ + {illegal,0 }, /* a6: 0100 1101 1010 0110 */ + {illegal,0 }, /* a7: 0100 1101 1010 0111 */ + {illegal,0 }, /* a8: 0100 1101 1010 1000 */ + {illegal,0 }, /* a9: 0100 1101 1010 1001 */ + {illegal,0 }, /* aa: 0100 1101 1010 1010 */ + {illegal,0 }, /* ab: 0100 1101 1010 1011 */ + {illegal,0 }, /* ac: 0100 1101 1010 1100 */ + {illegal,0 }, /* ad: 0100 1101 1010 1101 */ + {illegal,0 }, /* ae: 0100 1101 1010 1110 */ + {illegal,0 }, /* af: 0100 1101 1010 1111 */ + + {illegal,0 }, /* b0: 0100 1101 1011 0000 */ + {illegal,0 }, /* b1: 0100 1101 1011 0001 */ + {illegal,0 }, /* b2: 0100 1101 1011 0010 */ + {illegal,0 }, /* b3: 0100 1101 1011 0011 */ + {illegal,0 }, /* b4: 0100 1101 1011 0100 */ + {illegal,0 }, /* b5: 0100 1101 1011 0101 */ + {illegal,0 }, /* b6: 0100 1101 1011 0110 */ + {illegal,0 }, /* b7: 0100 1101 1011 0111 */ + {illegal,0 }, /* b8: 0100 1101 1011 1000 */ + {illegal,0 }, /* b9: 0100 1101 1011 1001 */ + {illegal,0 }, /* ba: 0100 1101 1011 1010 */ + {illegal,0 }, /* bb: 0100 1101 1011 1011 */ + {illegal,0 }, /* bc: 0100 1101 1011 1100 */ + {illegal,0 }, /* bd: 0100 1101 1011 1101 */ + {illegal,0 }, /* be: 0100 1101 1011 1110 */ + {illegal,0 }, /* bf: 0100 1101 1011 1111 */ {MOV,"PA,A" }, /* c0: 0100 1101 1100 0000 */ {MOV,"PB,A" }, /* c1: 0100 1101 1100 0001 */ {MOV,"PC,A" }, /* c2: 0100 1101 1100 0010 */ {MOV,"PD,A" }, /* c3: 0100 1101 1100 0011 */ - {illegal,0 }, /* c4: 0100 1101 1100 0100 */ + {illegal,0 }, /* c4: 0100 1101 1100 0100 */ {MOV,"PF,A" }, /* c5: 0100 1101 1100 0101 */ {MOV,"MKH,A" }, /* c6: 0100 1101 1100 0110 */ {MOV,"MKL,A" }, /* c7: 0100 1101 1100 0111 */ @@ -1698,272 +1698,272 @@ static const struct dasm_s dasm4D_7810[256] = {MOV,"EOM,A" }, /* cb: 0100 1101 1100 1011 */ {MOV,"ETMM,A" }, /* cc: 0100 1101 1100 1100 */ {MOV,"TMM,A" }, /* cd: 0100 1101 1100 1101 */ - {illegal,0 }, /* ce: 0100 1101 1100 1110 */ - {illegal,0 }, /* cf: 0100 1101 1100 1111 */ + {illegal,0 }, /* ce: 0100 1101 1100 1110 */ + {illegal,0 }, /* cf: 0100 1101 1100 1111 */ {MOV,"MM,A" }, /* d0: 0100 1101 1101 0000 */ {MOV,"MCC,A" }, /* d1: 0100 1101 1101 0001 */ {MOV,"MA,A" }, /* d2: 0100 1101 1101 0010 */ {MOV,"MB,A" }, /* d3: 0100 1101 1101 0011 */ {MOV,"MC,A" }, /* d4: 0100 1101 1101 0100 */ - {illegal,0 }, /* d5: 0100 1101 1101 0101 */ - {illegal,0 }, /* d6: 0100 1101 1101 0110 */ + {illegal,0 }, /* d5: 0100 1101 1101 0101 */ + {illegal,0 }, /* d6: 0100 1101 1101 0110 */ {MOV,"MF,A" }, /* d7: 0100 1101 1101 0111 */ {MOV,"TXB,A" }, /* d8: 0100 1101 1101 1000 */ - {illegal,0 }, /* d9: 0100 1101 1101 1001 */ + {illegal,0 }, /* d9: 0100 1101 1101 1001 */ {MOV,"TM0,A" }, /* da: 0100 1101 1101 1010 */ {MOV,"TM1,A" }, /* db: 0100 1101 1101 1011 */ - {illegal,0 }, /* dc: 0100 1101 1101 1100 */ - {illegal,0 }, /* dd: 0100 1101 1101 1101 */ - {illegal,0 }, /* de: 0100 1101 1101 1110 */ - {illegal,0 }, /* df: 0100 1101 1101 1111 */ - - {illegal,0 }, /* e0: 0100 1101 1110 0000 */ - {illegal,0 }, /* e1: 0100 1101 1110 0001 */ - {illegal,0 }, /* e2: 0100 1101 1110 0010 */ - {illegal,0 }, /* e3: 0100 1101 1110 0011 */ - {illegal,0 }, /* e4: 0100 1101 1110 0100 */ - {illegal,0 }, /* e5: 0100 1101 1110 0101 */ - {illegal,0 }, /* e6: 0100 1101 1110 0110 */ - {illegal,0 }, /* e7: 0100 1101 1110 0111 */ + {illegal,0 }, /* dc: 0100 1101 1101 1100 */ + {illegal,0 }, /* dd: 0100 1101 1101 1101 */ + {illegal,0 }, /* de: 0100 1101 1101 1110 */ + {illegal,0 }, /* df: 0100 1101 1101 1111 */ + + {illegal,0 }, /* e0: 0100 1101 1110 0000 */ + {illegal,0 }, /* e1: 0100 1101 1110 0001 */ + {illegal,0 }, /* e2: 0100 1101 1110 0010 */ + {illegal,0 }, /* e3: 0100 1101 1110 0011 */ + {illegal,0 }, /* e4: 0100 1101 1110 0100 */ + {illegal,0 }, /* e5: 0100 1101 1110 0101 */ + {illegal,0 }, /* e6: 0100 1101 1110 0110 */ + {illegal,0 }, /* e7: 0100 1101 1110 0111 */ {MOV,"ZCM,A" }, /* e8: 0100 1101 1110 1000 */ /* 7810 */ - {illegal,0 }, /* e9: 0100 1101 1110 1001 */ - {illegal,0 }, /* ea: 0100 1101 1110 1010 */ - {illegal,0 }, /* eb: 0100 1101 1110 1011 */ - {illegal,0 }, /* ec: 0100 1101 1110 1100 */ - {illegal,0 }, /* ed: 0100 1101 1110 1101 */ - {illegal,0 }, /* ee: 0100 1101 1110 1110 */ - {illegal,0 }, /* ef: 0100 1101 1110 1111 */ - - {illegal,0 }, /* f0: 0100 1101 1111 0000 */ - {illegal,0 }, /* f1: 0100 1101 1111 0001 */ - {illegal,0 }, /* f2: 0100 1101 1111 0010 */ - {illegal,0 }, /* f3: 0100 1101 1111 0011 */ - {illegal,0 }, /* f4: 0100 1101 1111 0100 */ - {illegal,0 }, /* f5: 0100 1101 1111 0101 */ - {illegal,0 }, /* f6: 0100 1101 1111 0110 */ - {illegal,0 }, /* f7: 0100 1101 1111 0111 */ - {illegal,0 }, /* f8: 0100 1101 1111 1000 */ - {illegal,0 }, /* f9: 0100 1101 1111 1001 */ - {illegal,0 }, /* fa: 0100 1101 1111 1010 */ - {illegal,0 }, /* fb: 0100 1101 1111 1011 */ - {illegal,0 }, /* fc: 0100 1101 1111 1100 */ - {illegal,0 }, /* fd: 0100 1101 1111 1101 */ - {illegal,0 }, /* fe: 0100 1101 1111 1110 */ - {illegal,0 } /* ff: 0100 1101 1111 1111 */ + {illegal,0 }, /* e9: 0100 1101 1110 1001 */ + {illegal,0 }, /* ea: 0100 1101 1110 1010 */ + {illegal,0 }, /* eb: 0100 1101 1110 1011 */ + {illegal,0 }, /* ec: 0100 1101 1110 1100 */ + {illegal,0 }, /* ed: 0100 1101 1110 1101 */ + {illegal,0 }, /* ee: 0100 1101 1110 1110 */ + {illegal,0 }, /* ef: 0100 1101 1110 1111 */ + + {illegal,0 }, /* f0: 0100 1101 1111 0000 */ + {illegal,0 }, /* f1: 0100 1101 1111 0001 */ + {illegal,0 }, /* f2: 0100 1101 1111 0010 */ + {illegal,0 }, /* f3: 0100 1101 1111 0011 */ + {illegal,0 }, /* f4: 0100 1101 1111 0100 */ + {illegal,0 }, /* f5: 0100 1101 1111 0101 */ + {illegal,0 }, /* f6: 0100 1101 1111 0110 */ + {illegal,0 }, /* f7: 0100 1101 1111 0111 */ + {illegal,0 }, /* f8: 0100 1101 1111 1000 */ + {illegal,0 }, /* f9: 0100 1101 1111 1001 */ + {illegal,0 }, /* fa: 0100 1101 1111 1010 */ + {illegal,0 }, /* fb: 0100 1101 1111 1011 */ + {illegal,0 }, /* fc: 0100 1101 1111 1100 */ + {illegal,0 }, /* fd: 0100 1101 1111 1101 */ + {illegal,0 }, /* fe: 0100 1101 1111 1110 */ + {illegal,0 } /* ff: 0100 1101 1111 1111 */ }; static const struct dasm_s dasm4D_7807[256] = { - {illegal,0 }, /* 00: 0100 1101 0000 0000 */ - {illegal,0 }, /* 01: 0100 1101 0000 0001 */ - {illegal,0 }, /* 02: 0100 1101 0000 0010 */ - {illegal,0 }, /* 03: 0100 1101 0000 0011 */ - {illegal,0 }, /* 04: 0100 1101 0000 0100 */ - {illegal,0 }, /* 05: 0100 1101 0000 0101 */ - {illegal,0 }, /* 06: 0100 1101 0000 0110 */ - {illegal,0 }, /* 07: 0100 1101 0000 0111 */ - {illegal,0 }, /* 08: 0100 1101 0000 1000 */ - {illegal,0 }, /* 09: 0100 1101 0000 1001 */ - {illegal,0 }, /* 0a: 0100 1101 0000 1010 */ - {illegal,0 }, /* 0b: 0100 1101 0000 1011 */ - {illegal,0 }, /* 0c: 0100 1101 0000 1100 */ - {illegal,0 }, /* 0d: 0100 1101 0000 1101 */ - {illegal,0 }, /* 0e: 0100 1101 0000 1110 */ - {illegal,0 }, /* 0f: 0100 1101 0000 1111 */ - - {illegal,0 }, /* 10: 0100 1101 0001 0000 */ - {illegal,0 }, /* 11: 0100 1101 0001 0001 */ - {illegal,0 }, /* 12: 0100 1101 0001 0010 */ - {illegal,0 }, /* 13: 0100 1101 0001 0011 */ - {illegal,0 }, /* 14: 0100 1101 0001 0100 */ - {illegal,0 }, /* 15: 0100 1101 0001 0101 */ - {illegal,0 }, /* 16: 0100 1101 0001 0110 */ - {illegal,0 }, /* 17: 0100 1101 0001 0111 */ - {illegal,0 }, /* 18: 0100 1101 0001 1000 */ - {illegal,0 }, /* 19: 0100 1101 0001 1001 */ - {illegal,0 }, /* 1a: 0100 1101 0001 1010 */ - {illegal,0 }, /* 1b: 0100 1101 0001 1011 */ - {illegal,0 }, /* 1c: 0100 1101 0001 1100 */ - {illegal,0 }, /* 1d: 0100 1101 0001 1101 */ - {illegal,0 }, /* 1e: 0100 1101 0001 1110 */ - {illegal,0 }, /* 1f: 0100 1101 0001 1111 */ - - {illegal,0 }, /* 20: 0100 1101 0010 0000 */ - {illegal,0 }, /* 21: 0100 1101 0010 0001 */ - {illegal,0 }, /* 22: 0100 1101 0010 0010 */ - {illegal,0 }, /* 23: 0100 1101 0010 0011 */ - {illegal,0 }, /* 24: 0100 1101 0010 0100 */ - {illegal,0 }, /* 25: 0100 1101 0010 0101 */ - {illegal,0 }, /* 26: 0100 1101 0010 0110 */ - {illegal,0 }, /* 27: 0100 1101 0010 0111 */ - {illegal,0 }, /* 28: 0100 1101 0010 1000 */ - {illegal,0 }, /* 29: 0100 1101 0010 1001 */ - {illegal,0 }, /* 2a: 0100 1101 0010 1010 */ - {illegal,0 }, /* 2b: 0100 1101 0010 1011 */ - {illegal,0 }, /* 2c: 0100 1101 0010 1100 */ - {illegal,0 }, /* 2d: 0100 1101 0010 1101 */ - {illegal,0 }, /* 2e: 0100 1101 0010 1110 */ - {illegal,0 }, /* 2f: 0100 1101 0010 1111 */ - - {illegal,0 }, /* 30: 0100 1101 0011 0000 */ - {illegal,0 }, /* 31: 0100 1101 0011 0001 */ - {illegal,0 }, /* 32: 0100 1101 0011 0010 */ - {illegal,0 }, /* 33: 0100 1101 0011 0011 */ - {illegal,0 }, /* 34: 0100 1101 0011 0100 */ - {illegal,0 }, /* 35: 0100 1101 0011 0101 */ - {illegal,0 }, /* 36: 0100 1101 0011 0110 */ - {illegal,0 }, /* 37: 0100 1101 0011 0111 */ - {illegal,0 }, /* 38: 0100 1101 0011 1000 */ - {illegal,0 }, /* 39: 0100 1101 0011 1001 */ - {illegal,0 }, /* 3a: 0100 1101 0011 1010 */ - {illegal,0 }, /* 3b: 0100 1101 0011 1011 */ - {illegal,0 }, /* 3c: 0100 1101 0011 1100 */ - {illegal,0 }, /* 3d: 0100 1101 0011 1101 */ - {illegal,0 }, /* 3e: 0100 1101 0011 1110 */ - {illegal,0 }, /* 3f: 0100 1101 0011 1111 */ - - {illegal,0 }, /* 40: 0100 1101 0100 0000 */ - {illegal,0 }, /* 41: 0100 1101 0100 0001 */ - {illegal,0 }, /* 42: 0100 1101 0100 0010 */ - {illegal,0 }, /* 43: 0100 1101 0100 0011 */ - {illegal,0 }, /* 44: 0100 1101 0100 0100 */ - {illegal,0 }, /* 45: 0100 1101 0100 0101 */ - {illegal,0 }, /* 46: 0100 1101 0100 0110 */ - {illegal,0 }, /* 47: 0100 1101 0100 0111 */ - {illegal,0 }, /* 48: 0100 1101 0100 1000 */ - {illegal,0 }, /* 49: 0100 1101 0100 1001 */ - {illegal,0 }, /* 4a: 0100 1101 0100 1010 */ - {illegal,0 }, /* 4b: 0100 1101 0100 1011 */ - {illegal,0 }, /* 4c: 0100 1101 0100 1100 */ - {illegal,0 }, /* 4d: 0100 1101 0100 1101 */ - {illegal,0 }, /* 4e: 0100 1101 0100 1110 */ - {illegal,0 }, /* 4f: 0100 1101 0100 1111 */ - - {illegal,0 }, /* 50: 0100 1101 0101 0000 */ - {illegal,0 }, /* 51: 0100 1101 0101 0001 */ - {illegal,0 }, /* 52: 0100 1101 0101 0010 */ - {illegal,0 }, /* 53: 0100 1101 0101 0011 */ - {illegal,0 }, /* 54: 0100 1101 0101 0100 */ - {illegal,0 }, /* 55: 0100 1101 0101 0101 */ - {illegal,0 }, /* 56: 0100 1101 0101 0110 */ - {illegal,0 }, /* 57: 0100 1101 0101 0111 */ - {illegal,0 }, /* 58: 0100 1101 0101 1000 */ - {illegal,0 }, /* 59: 0100 1101 0101 1001 */ - {illegal,0 }, /* 5a: 0100 1101 0101 1010 */ - {illegal,0 }, /* 5b: 0100 1101 0101 1011 */ - {illegal,0 }, /* 5c: 0100 1101 0101 1100 */ - {illegal,0 }, /* 5d: 0100 1101 0101 1101 */ - {illegal,0 }, /* 5e: 0100 1101 0101 1110 */ - {illegal,0 }, /* 5f: 0100 1101 0101 1111 */ - - {illegal,0 }, /* 60: 0100 1101 0110 0000 */ - {illegal,0 }, /* 61: 0100 1101 0110 0001 */ - {illegal,0 }, /* 62: 0100 1101 0110 0010 */ - {illegal,0 }, /* 63: 0100 1101 0110 0011 */ - {illegal,0 }, /* 64: 0100 1101 0110 0100 */ - {illegal,0 }, /* 65: 0100 1101 0110 0101 */ - {illegal,0 }, /* 66: 0100 1101 0110 0110 */ - {illegal,0 }, /* 67: 0100 1101 0110 0111 */ - {illegal,0 }, /* 68: 0100 1101 0110 1000 */ - {illegal,0 }, /* 69: 0100 1101 0110 1001 */ - {illegal,0 }, /* 6a: 0100 1101 0110 1010 */ - {illegal,0 }, /* 6b: 0100 1101 0110 1011 */ - {illegal,0 }, /* 6c: 0100 1101 0110 1100 */ - {illegal,0 }, /* 6d: 0100 1101 0110 1101 */ - {illegal,0 }, /* 6e: 0100 1101 0110 1110 */ - {illegal,0 }, /* 6f: 0100 1101 0110 1111 */ - - {illegal,0 }, /* 70: 0100 1101 0111 0000 */ - {illegal,0 }, /* 71: 0100 1101 0111 0001 */ - {illegal,0 }, /* 72: 0100 1101 0111 0010 */ - {illegal,0 }, /* 73: 0100 1101 0111 0011 */ - {illegal,0 }, /* 74: 0100 1101 0111 0100 */ - {illegal,0 }, /* 75: 0100 1101 0111 0101 */ - {illegal,0 }, /* 76: 0100 1101 0111 0110 */ - {illegal,0 }, /* 77: 0100 1101 0111 0111 */ - {illegal,0 }, /* 78: 0100 1101 0111 1000 */ - {illegal,0 }, /* 79: 0100 1101 0111 1001 */ - {illegal,0 }, /* 7a: 0100 1101 0111 1010 */ - {illegal,0 }, /* 7b: 0100 1101 0111 1011 */ - {illegal,0 }, /* 7c: 0100 1101 0111 1100 */ - {illegal,0 }, /* 7d: 0100 1101 0111 1101 */ - {illegal,0 }, /* 7e: 0100 1101 0111 1110 */ - {illegal,0 }, /* 7f: 0100 1101 0111 1111 */ - - {illegal,0 }, /* 80: 0100 1101 1000 0000 */ - {illegal,0 }, /* 81: 0100 1101 1000 0001 */ - {illegal,0 }, /* 82: 0100 1101 1000 0010 */ - {illegal,0 }, /* 83: 0100 1101 1000 0011 */ - {illegal,0 }, /* 84: 0100 1101 1000 0100 */ - {illegal,0 }, /* 85: 0100 1101 1000 0101 */ - {illegal,0 }, /* 86: 0100 1101 1000 0110 */ - {illegal,0 }, /* 87: 0100 1101 1000 0111 */ - {illegal,0 }, /* 88: 0100 1101 1000 1000 */ - {illegal,0 }, /* 89: 0100 1101 1000 1001 */ - {illegal,0 }, /* 8a: 0100 1101 1000 1010 */ - {illegal,0 }, /* 8b: 0100 1101 1000 1011 */ - {illegal,0 }, /* 8c: 0100 1101 1000 1100 */ - {illegal,0 }, /* 8d: 0100 1101 1000 1101 */ - {illegal,0 }, /* 8e: 0100 1101 1000 1110 */ - {illegal,0 }, /* 8f: 0100 1101 1000 1111 */ - - {illegal,0 }, /* 90: 0100 1101 1001 0000 */ - {illegal,0 }, /* 91: 0100 1101 1001 0001 */ - {illegal,0 }, /* 92: 0100 1101 1001 0010 */ - {illegal,0 }, /* 93: 0100 1101 1001 0011 */ - {illegal,0 }, /* 94: 0100 1101 1001 0100 */ - {illegal,0 }, /* 95: 0100 1101 1001 0101 */ - {illegal,0 }, /* 96: 0100 1101 1001 0110 */ - {illegal,0 }, /* 97: 0100 1101 1001 0111 */ - {illegal,0 }, /* 98: 0100 1101 1001 1000 */ - {illegal,0 }, /* 99: 0100 1101 1001 1001 */ - {illegal,0 }, /* 9a: 0100 1101 1001 1010 */ - {illegal,0 }, /* 9b: 0100 1101 1001 1011 */ - {illegal,0 }, /* 9c: 0100 1101 1001 1100 */ - {illegal,0 }, /* 9d: 0100 1101 1001 1101 */ - {illegal,0 }, /* 9e: 0100 1101 1001 1110 */ - {illegal,0 }, /* 9f: 0100 1101 1001 1111 */ - - {illegal,0 }, /* a0: 0100 1101 1010 0000 */ - {illegal,0 }, /* a1: 0100 1101 1010 0001 */ - {illegal,0 }, /* a2: 0100 1101 1010 0010 */ - {illegal,0 }, /* a3: 0100 1101 1010 0011 */ - {illegal,0 }, /* a4: 0100 1101 1010 0100 */ - {illegal,0 }, /* a5: 0100 1101 1010 0101 */ - {illegal,0 }, /* a6: 0100 1101 1010 0110 */ - {illegal,0 }, /* a7: 0100 1101 1010 0111 */ - {illegal,0 }, /* a8: 0100 1101 1010 1000 */ - {illegal,0 }, /* a9: 0100 1101 1010 1001 */ - {illegal,0 }, /* aa: 0100 1101 1010 1010 */ - {illegal,0 }, /* ab: 0100 1101 1010 1011 */ - {illegal,0 }, /* ac: 0100 1101 1010 1100 */ - {illegal,0 }, /* ad: 0100 1101 1010 1101 */ - {illegal,0 }, /* ae: 0100 1101 1010 1110 */ - {illegal,0 }, /* af: 0100 1101 1010 1111 */ - - {illegal,0 }, /* b0: 0100 1101 1011 0000 */ - {illegal,0 }, /* b1: 0100 1101 1011 0001 */ - {illegal,0 }, /* b2: 0100 1101 1011 0010 */ - {illegal,0 }, /* b3: 0100 1101 1011 0011 */ - {illegal,0 }, /* b4: 0100 1101 1011 0100 */ - {illegal,0 }, /* b5: 0100 1101 1011 0101 */ - {illegal,0 }, /* b6: 0100 1101 1011 0110 */ - {illegal,0 }, /* b7: 0100 1101 1011 0111 */ - {illegal,0 }, /* b8: 0100 1101 1011 1000 */ - {illegal,0 }, /* b9: 0100 1101 1011 1001 */ - {illegal,0 }, /* ba: 0100 1101 1011 1010 */ - {illegal,0 }, /* bb: 0100 1101 1011 1011 */ - {illegal,0 }, /* bc: 0100 1101 1011 1100 */ - {illegal,0 }, /* bd: 0100 1101 1011 1101 */ - {illegal,0 }, /* be: 0100 1101 1011 1110 */ - {illegal,0 }, /* bf: 0100 1101 1011 1111 */ + {illegal,0 }, /* 00: 0100 1101 0000 0000 */ + {illegal,0 }, /* 01: 0100 1101 0000 0001 */ + {illegal,0 }, /* 02: 0100 1101 0000 0010 */ + {illegal,0 }, /* 03: 0100 1101 0000 0011 */ + {illegal,0 }, /* 04: 0100 1101 0000 0100 */ + {illegal,0 }, /* 05: 0100 1101 0000 0101 */ + {illegal,0 }, /* 06: 0100 1101 0000 0110 */ + {illegal,0 }, /* 07: 0100 1101 0000 0111 */ + {illegal,0 }, /* 08: 0100 1101 0000 1000 */ + {illegal,0 }, /* 09: 0100 1101 0000 1001 */ + {illegal,0 }, /* 0a: 0100 1101 0000 1010 */ + {illegal,0 }, /* 0b: 0100 1101 0000 1011 */ + {illegal,0 }, /* 0c: 0100 1101 0000 1100 */ + {illegal,0 }, /* 0d: 0100 1101 0000 1101 */ + {illegal,0 }, /* 0e: 0100 1101 0000 1110 */ + {illegal,0 }, /* 0f: 0100 1101 0000 1111 */ + + {illegal,0 }, /* 10: 0100 1101 0001 0000 */ + {illegal,0 }, /* 11: 0100 1101 0001 0001 */ + {illegal,0 }, /* 12: 0100 1101 0001 0010 */ + {illegal,0 }, /* 13: 0100 1101 0001 0011 */ + {illegal,0 }, /* 14: 0100 1101 0001 0100 */ + {illegal,0 }, /* 15: 0100 1101 0001 0101 */ + {illegal,0 }, /* 16: 0100 1101 0001 0110 */ + {illegal,0 }, /* 17: 0100 1101 0001 0111 */ + {illegal,0 }, /* 18: 0100 1101 0001 1000 */ + {illegal,0 }, /* 19: 0100 1101 0001 1001 */ + {illegal,0 }, /* 1a: 0100 1101 0001 1010 */ + {illegal,0 }, /* 1b: 0100 1101 0001 1011 */ + {illegal,0 }, /* 1c: 0100 1101 0001 1100 */ + {illegal,0 }, /* 1d: 0100 1101 0001 1101 */ + {illegal,0 }, /* 1e: 0100 1101 0001 1110 */ + {illegal,0 }, /* 1f: 0100 1101 0001 1111 */ + + {illegal,0 }, /* 20: 0100 1101 0010 0000 */ + {illegal,0 }, /* 21: 0100 1101 0010 0001 */ + {illegal,0 }, /* 22: 0100 1101 0010 0010 */ + {illegal,0 }, /* 23: 0100 1101 0010 0011 */ + {illegal,0 }, /* 24: 0100 1101 0010 0100 */ + {illegal,0 }, /* 25: 0100 1101 0010 0101 */ + {illegal,0 }, /* 26: 0100 1101 0010 0110 */ + {illegal,0 }, /* 27: 0100 1101 0010 0111 */ + {illegal,0 }, /* 28: 0100 1101 0010 1000 */ + {illegal,0 }, /* 29: 0100 1101 0010 1001 */ + {illegal,0 }, /* 2a: 0100 1101 0010 1010 */ + {illegal,0 }, /* 2b: 0100 1101 0010 1011 */ + {illegal,0 }, /* 2c: 0100 1101 0010 1100 */ + {illegal,0 }, /* 2d: 0100 1101 0010 1101 */ + {illegal,0 }, /* 2e: 0100 1101 0010 1110 */ + {illegal,0 }, /* 2f: 0100 1101 0010 1111 */ + + {illegal,0 }, /* 30: 0100 1101 0011 0000 */ + {illegal,0 }, /* 31: 0100 1101 0011 0001 */ + {illegal,0 }, /* 32: 0100 1101 0011 0010 */ + {illegal,0 }, /* 33: 0100 1101 0011 0011 */ + {illegal,0 }, /* 34: 0100 1101 0011 0100 */ + {illegal,0 }, /* 35: 0100 1101 0011 0101 */ + {illegal,0 }, /* 36: 0100 1101 0011 0110 */ + {illegal,0 }, /* 37: 0100 1101 0011 0111 */ + {illegal,0 }, /* 38: 0100 1101 0011 1000 */ + {illegal,0 }, /* 39: 0100 1101 0011 1001 */ + {illegal,0 }, /* 3a: 0100 1101 0011 1010 */ + {illegal,0 }, /* 3b: 0100 1101 0011 1011 */ + {illegal,0 }, /* 3c: 0100 1101 0011 1100 */ + {illegal,0 }, /* 3d: 0100 1101 0011 1101 */ + {illegal,0 }, /* 3e: 0100 1101 0011 1110 */ + {illegal,0 }, /* 3f: 0100 1101 0011 1111 */ + + {illegal,0 }, /* 40: 0100 1101 0100 0000 */ + {illegal,0 }, /* 41: 0100 1101 0100 0001 */ + {illegal,0 }, /* 42: 0100 1101 0100 0010 */ + {illegal,0 }, /* 43: 0100 1101 0100 0011 */ + {illegal,0 }, /* 44: 0100 1101 0100 0100 */ + {illegal,0 }, /* 45: 0100 1101 0100 0101 */ + {illegal,0 }, /* 46: 0100 1101 0100 0110 */ + {illegal,0 }, /* 47: 0100 1101 0100 0111 */ + {illegal,0 }, /* 48: 0100 1101 0100 1000 */ + {illegal,0 }, /* 49: 0100 1101 0100 1001 */ + {illegal,0 }, /* 4a: 0100 1101 0100 1010 */ + {illegal,0 }, /* 4b: 0100 1101 0100 1011 */ + {illegal,0 }, /* 4c: 0100 1101 0100 1100 */ + {illegal,0 }, /* 4d: 0100 1101 0100 1101 */ + {illegal,0 }, /* 4e: 0100 1101 0100 1110 */ + {illegal,0 }, /* 4f: 0100 1101 0100 1111 */ + + {illegal,0 }, /* 50: 0100 1101 0101 0000 */ + {illegal,0 }, /* 51: 0100 1101 0101 0001 */ + {illegal,0 }, /* 52: 0100 1101 0101 0010 */ + {illegal,0 }, /* 53: 0100 1101 0101 0011 */ + {illegal,0 }, /* 54: 0100 1101 0101 0100 */ + {illegal,0 }, /* 55: 0100 1101 0101 0101 */ + {illegal,0 }, /* 56: 0100 1101 0101 0110 */ + {illegal,0 }, /* 57: 0100 1101 0101 0111 */ + {illegal,0 }, /* 58: 0100 1101 0101 1000 */ + {illegal,0 }, /* 59: 0100 1101 0101 1001 */ + {illegal,0 }, /* 5a: 0100 1101 0101 1010 */ + {illegal,0 }, /* 5b: 0100 1101 0101 1011 */ + {illegal,0 }, /* 5c: 0100 1101 0101 1100 */ + {illegal,0 }, /* 5d: 0100 1101 0101 1101 */ + {illegal,0 }, /* 5e: 0100 1101 0101 1110 */ + {illegal,0 }, /* 5f: 0100 1101 0101 1111 */ + + {illegal,0 }, /* 60: 0100 1101 0110 0000 */ + {illegal,0 }, /* 61: 0100 1101 0110 0001 */ + {illegal,0 }, /* 62: 0100 1101 0110 0010 */ + {illegal,0 }, /* 63: 0100 1101 0110 0011 */ + {illegal,0 }, /* 64: 0100 1101 0110 0100 */ + {illegal,0 }, /* 65: 0100 1101 0110 0101 */ + {illegal,0 }, /* 66: 0100 1101 0110 0110 */ + {illegal,0 }, /* 67: 0100 1101 0110 0111 */ + {illegal,0 }, /* 68: 0100 1101 0110 1000 */ + {illegal,0 }, /* 69: 0100 1101 0110 1001 */ + {illegal,0 }, /* 6a: 0100 1101 0110 1010 */ + {illegal,0 }, /* 6b: 0100 1101 0110 1011 */ + {illegal,0 }, /* 6c: 0100 1101 0110 1100 */ + {illegal,0 }, /* 6d: 0100 1101 0110 1101 */ + {illegal,0 }, /* 6e: 0100 1101 0110 1110 */ + {illegal,0 }, /* 6f: 0100 1101 0110 1111 */ + + {illegal,0 }, /* 70: 0100 1101 0111 0000 */ + {illegal,0 }, /* 71: 0100 1101 0111 0001 */ + {illegal,0 }, /* 72: 0100 1101 0111 0010 */ + {illegal,0 }, /* 73: 0100 1101 0111 0011 */ + {illegal,0 }, /* 74: 0100 1101 0111 0100 */ + {illegal,0 }, /* 75: 0100 1101 0111 0101 */ + {illegal,0 }, /* 76: 0100 1101 0111 0110 */ + {illegal,0 }, /* 77: 0100 1101 0111 0111 */ + {illegal,0 }, /* 78: 0100 1101 0111 1000 */ + {illegal,0 }, /* 79: 0100 1101 0111 1001 */ + {illegal,0 }, /* 7a: 0100 1101 0111 1010 */ + {illegal,0 }, /* 7b: 0100 1101 0111 1011 */ + {illegal,0 }, /* 7c: 0100 1101 0111 1100 */ + {illegal,0 }, /* 7d: 0100 1101 0111 1101 */ + {illegal,0 }, /* 7e: 0100 1101 0111 1110 */ + {illegal,0 }, /* 7f: 0100 1101 0111 1111 */ + + {illegal,0 }, /* 80: 0100 1101 1000 0000 */ + {illegal,0 }, /* 81: 0100 1101 1000 0001 */ + {illegal,0 }, /* 82: 0100 1101 1000 0010 */ + {illegal,0 }, /* 83: 0100 1101 1000 0011 */ + {illegal,0 }, /* 84: 0100 1101 1000 0100 */ + {illegal,0 }, /* 85: 0100 1101 1000 0101 */ + {illegal,0 }, /* 86: 0100 1101 1000 0110 */ + {illegal,0 }, /* 87: 0100 1101 1000 0111 */ + {illegal,0 }, /* 88: 0100 1101 1000 1000 */ + {illegal,0 }, /* 89: 0100 1101 1000 1001 */ + {illegal,0 }, /* 8a: 0100 1101 1000 1010 */ + {illegal,0 }, /* 8b: 0100 1101 1000 1011 */ + {illegal,0 }, /* 8c: 0100 1101 1000 1100 */ + {illegal,0 }, /* 8d: 0100 1101 1000 1101 */ + {illegal,0 }, /* 8e: 0100 1101 1000 1110 */ + {illegal,0 }, /* 8f: 0100 1101 1000 1111 */ + + {illegal,0 }, /* 90: 0100 1101 1001 0000 */ + {illegal,0 }, /* 91: 0100 1101 1001 0001 */ + {illegal,0 }, /* 92: 0100 1101 1001 0010 */ + {illegal,0 }, /* 93: 0100 1101 1001 0011 */ + {illegal,0 }, /* 94: 0100 1101 1001 0100 */ + {illegal,0 }, /* 95: 0100 1101 1001 0101 */ + {illegal,0 }, /* 96: 0100 1101 1001 0110 */ + {illegal,0 }, /* 97: 0100 1101 1001 0111 */ + {illegal,0 }, /* 98: 0100 1101 1001 1000 */ + {illegal,0 }, /* 99: 0100 1101 1001 1001 */ + {illegal,0 }, /* 9a: 0100 1101 1001 1010 */ + {illegal,0 }, /* 9b: 0100 1101 1001 1011 */ + {illegal,0 }, /* 9c: 0100 1101 1001 1100 */ + {illegal,0 }, /* 9d: 0100 1101 1001 1101 */ + {illegal,0 }, /* 9e: 0100 1101 1001 1110 */ + {illegal,0 }, /* 9f: 0100 1101 1001 1111 */ + + {illegal,0 }, /* a0: 0100 1101 1010 0000 */ + {illegal,0 }, /* a1: 0100 1101 1010 0001 */ + {illegal,0 }, /* a2: 0100 1101 1010 0010 */ + {illegal,0 }, /* a3: 0100 1101 1010 0011 */ + {illegal,0 }, /* a4: 0100 1101 1010 0100 */ + {illegal,0 }, /* a5: 0100 1101 1010 0101 */ + {illegal,0 }, /* a6: 0100 1101 1010 0110 */ + {illegal,0 }, /* a7: 0100 1101 1010 0111 */ + {illegal,0 }, /* a8: 0100 1101 1010 1000 */ + {illegal,0 }, /* a9: 0100 1101 1010 1001 */ + {illegal,0 }, /* aa: 0100 1101 1010 1010 */ + {illegal,0 }, /* ab: 0100 1101 1010 1011 */ + {illegal,0 }, /* ac: 0100 1101 1010 1100 */ + {illegal,0 }, /* ad: 0100 1101 1010 1101 */ + {illegal,0 }, /* ae: 0100 1101 1010 1110 */ + {illegal,0 }, /* af: 0100 1101 1010 1111 */ + + {illegal,0 }, /* b0: 0100 1101 1011 0000 */ + {illegal,0 }, /* b1: 0100 1101 1011 0001 */ + {illegal,0 }, /* b2: 0100 1101 1011 0010 */ + {illegal,0 }, /* b3: 0100 1101 1011 0011 */ + {illegal,0 }, /* b4: 0100 1101 1011 0100 */ + {illegal,0 }, /* b5: 0100 1101 1011 0101 */ + {illegal,0 }, /* b6: 0100 1101 1011 0110 */ + {illegal,0 }, /* b7: 0100 1101 1011 0111 */ + {illegal,0 }, /* b8: 0100 1101 1011 1000 */ + {illegal,0 }, /* b9: 0100 1101 1011 1001 */ + {illegal,0 }, /* ba: 0100 1101 1011 1010 */ + {illegal,0 }, /* bb: 0100 1101 1011 1011 */ + {illegal,0 }, /* bc: 0100 1101 1011 1100 */ + {illegal,0 }, /* bd: 0100 1101 1011 1101 */ + {illegal,0 }, /* be: 0100 1101 1011 1110 */ + {illegal,0 }, /* bf: 0100 1101 1011 1111 */ {MOV,"PA,A" }, /* c0: 0100 1101 1100 0000 */ {MOV,"PB,A" }, /* c1: 0100 1101 1100 0001 */ {MOV,"PC,A" }, /* c2: 0100 1101 1100 0010 */ {MOV,"PD,A" }, /* c3: 0100 1101 1100 0011 */ - {illegal,0 }, /* c4: 0100 1101 1100 0100 */ + {illegal,0 }, /* c4: 0100 1101 1100 0100 */ {MOV,"PF,A" }, /* c5: 0100 1101 1100 0101 */ {MOV,"MKH,A" }, /* c6: 0100 1101 1100 0110 */ {MOV,"MKL,A" }, /* c7: 0100 1101 1100 0111 */ @@ -1973,72 +1973,72 @@ static const struct dasm_s dasm4D_7807[256] = {MOV,"EOM,A" }, /* cb: 0100 1101 1100 1011 */ {MOV,"ETMM,A" }, /* cc: 0100 1101 1100 1100 */ {MOV,"TMM,A" }, /* cd: 0100 1101 1100 1101 */ - {illegal,0 }, /* ce: 0100 1101 1100 1110 */ - {illegal,0 }, /* cf: 0100 1101 1100 1111 */ + {illegal,0 }, /* ce: 0100 1101 1100 1110 */ + {illegal,0 }, /* cf: 0100 1101 1100 1111 */ {MOV,"MM,A" }, /* d0: 0100 1101 1101 0000 */ {MOV,"MCC,A" }, /* d1: 0100 1101 1101 0001 */ {MOV,"MA,A" }, /* d2: 0100 1101 1101 0010 */ {MOV,"MB,A" }, /* d3: 0100 1101 1101 0011 */ {MOV,"MC,A" }, /* d4: 0100 1101 1101 0100 */ - {illegal,0 }, /* d5: 0100 1101 1101 0101 */ - {illegal,0 }, /* d6: 0100 1101 1101 0110 */ + {illegal,0 }, /* d5: 0100 1101 1101 0101 */ + {illegal,0 }, /* d6: 0100 1101 1101 0110 */ {MOV,"MF,A" }, /* d7: 0100 1101 1101 0111 */ {MOV,"TXB,A" }, /* d8: 0100 1101 1101 1000 */ - {illegal,0 }, /* d9: 0100 1101 1101 1001 */ + {illegal,0 }, /* d9: 0100 1101 1101 1001 */ {MOV,"TM0,A" }, /* da: 0100 1101 1101 1010 */ {MOV,"TM1,A" }, /* db: 0100 1101 1101 1011 */ - {illegal,0 }, /* dc: 0100 1101 1101 1100 */ - {illegal,0 }, /* dd: 0100 1101 1101 1101 */ - {illegal,0 }, /* de: 0100 1101 1101 1110 */ - {illegal,0 }, /* df: 0100 1101 1101 1111 */ - - {illegal,0 }, /* e0: 0100 1101 1110 0000 */ - {illegal,0 }, /* e1: 0100 1101 1110 0001 */ - {illegal,0 }, /* e2: 0100 1101 1110 0010 */ - {illegal,0 }, /* e3: 0100 1101 1110 0011 */ - {illegal,0 }, /* e4: 0100 1101 1110 0100 */ + {illegal,0 }, /* dc: 0100 1101 1101 1100 */ + {illegal,0 }, /* dd: 0100 1101 1101 1101 */ + {illegal,0 }, /* de: 0100 1101 1101 1110 */ + {illegal,0 }, /* df: 0100 1101 1101 1111 */ + + {illegal,0 }, /* e0: 0100 1101 1110 0000 */ + {illegal,0 }, /* e1: 0100 1101 1110 0001 */ + {illegal,0 }, /* e2: 0100 1101 1110 0010 */ + {illegal,0 }, /* e3: 0100 1101 1110 0011 */ + {illegal,0 }, /* e4: 0100 1101 1110 0100 */ {MOV,"MT,A" }, /* e5: 0100 1101 1110 0101 */ /* 7807 */ - {illegal,0 }, /* e6: 0100 1101 1110 0110 */ - {illegal,0 }, /* e7: 0100 1101 1110 0111 */ - {illegal,0 }, /* e8: 0100 1101 1110 1000 */ - {illegal,0 }, /* e9: 0100 1101 1110 1001 */ - {illegal,0 }, /* ea: 0100 1101 1110 1010 */ - {illegal,0 }, /* eb: 0100 1101 1110 1011 */ - {illegal,0 }, /* ec: 0100 1101 1110 1100 */ - {illegal,0 }, /* ed: 0100 1101 1110 1101 */ - {illegal,0 }, /* ee: 0100 1101 1110 1110 */ - {illegal,0 }, /* ef: 0100 1101 1110 1111 */ - - {illegal,0 }, /* f0: 0100 1101 1111 0000 */ - {illegal,0 }, /* f1: 0100 1101 1111 0001 */ - {illegal,0 }, /* f2: 0100 1101 1111 0010 */ - {illegal,0 }, /* f3: 0100 1101 1111 0011 */ - {illegal,0 }, /* f4: 0100 1101 1111 0100 */ - {illegal,0 }, /* f5: 0100 1101 1111 0101 */ - {illegal,0 }, /* f6: 0100 1101 1111 0110 */ - {illegal,0 }, /* f7: 0100 1101 1111 0111 */ - {illegal,0 }, /* f8: 0100 1101 1111 1000 */ - {illegal,0 }, /* f9: 0100 1101 1111 1001 */ - {illegal,0 }, /* fa: 0100 1101 1111 1010 */ - {illegal,0 }, /* fb: 0100 1101 1111 1011 */ - {illegal,0 }, /* fc: 0100 1101 1111 1100 */ - {illegal,0 }, /* fd: 0100 1101 1111 1101 */ - {illegal,0 }, /* fe: 0100 1101 1111 1110 */ - {illegal,0 } /* ff: 0100 1101 1111 1111 */ + {illegal,0 }, /* e6: 0100 1101 1110 0110 */ + {illegal,0 }, /* e7: 0100 1101 1110 0111 */ + {illegal,0 }, /* e8: 0100 1101 1110 1000 */ + {illegal,0 }, /* e9: 0100 1101 1110 1001 */ + {illegal,0 }, /* ea: 0100 1101 1110 1010 */ + {illegal,0 }, /* eb: 0100 1101 1110 1011 */ + {illegal,0 }, /* ec: 0100 1101 1110 1100 */ + {illegal,0 }, /* ed: 0100 1101 1110 1101 */ + {illegal,0 }, /* ee: 0100 1101 1110 1110 */ + {illegal,0 }, /* ef: 0100 1101 1110 1111 */ + + {illegal,0 }, /* f0: 0100 1101 1111 0000 */ + {illegal,0 }, /* f1: 0100 1101 1111 0001 */ + {illegal,0 }, /* f2: 0100 1101 1111 0010 */ + {illegal,0 }, /* f3: 0100 1101 1111 0011 */ + {illegal,0 }, /* f4: 0100 1101 1111 0100 */ + {illegal,0 }, /* f5: 0100 1101 1111 0101 */ + {illegal,0 }, /* f6: 0100 1101 1111 0110 */ + {illegal,0 }, /* f7: 0100 1101 1111 0111 */ + {illegal,0 }, /* f8: 0100 1101 1111 1000 */ + {illegal,0 }, /* f9: 0100 1101 1111 1001 */ + {illegal,0 }, /* fa: 0100 1101 1111 1010 */ + {illegal,0 }, /* fb: 0100 1101 1111 1011 */ + {illegal,0 }, /* fc: 0100 1101 1111 1100 */ + {illegal,0 }, /* fd: 0100 1101 1111 1101 */ + {illegal,0 }, /* fe: 0100 1101 1111 1110 */ + {illegal,0 } /* ff: 0100 1101 1111 1111 */ }; /* prefix 60 */ static const struct dasm_s dasm60[256] = { - {illegal,0 }, /* 00: 0110 0000 0000 0000 */ - {illegal,0 }, /* 01: 0110 0000 0000 0001 */ - {illegal,0 }, /* 02: 0110 0000 0000 0010 */ - {illegal,0 }, /* 03: 0110 0000 0000 0011 */ - {illegal,0 }, /* 04: 0110 0000 0000 0100 */ - {illegal,0 }, /* 05: 0110 0000 0000 0101 */ - {illegal,0 }, /* 06: 0110 0000 0000 0110 */ - {illegal,0 }, /* 07: 0110 0000 0000 0111 */ + {illegal,0 }, /* 00: 0110 0000 0000 0000 */ + {illegal,0 }, /* 01: 0110 0000 0000 0001 */ + {illegal,0 }, /* 02: 0110 0000 0000 0010 */ + {illegal,0 }, /* 03: 0110 0000 0000 0011 */ + {illegal,0 }, /* 04: 0110 0000 0000 0100 */ + {illegal,0 }, /* 05: 0110 0000 0000 0101 */ + {illegal,0 }, /* 06: 0110 0000 0000 0110 */ + {illegal,0 }, /* 07: 0110 0000 0000 0111 */ {ANA,"V,A" }, /* 08: 0110 0000 0000 1000 */ {ANA,"A,A" }, /* 09: 0110 0000 0000 1001 */ {ANA,"B,A" }, /* 0a: 0110 0000 0000 1010 */ @@ -2107,14 +2107,14 @@ static const struct dasm_s dasm60[256] = {ADD,"E,A" }, /* 45: 0110 0000 0100 0101 */ {ADD,"H,A" }, /* 46: 0110 0000 0100 0110 */ {ADD,"L,A" }, /* 47: 0110 0000 0100 0111 */ - {illegal,0 }, /* 48: 0110 0000 0100 1000 */ - {illegal,0 }, /* 49: 0110 0000 0100 1001 */ - {illegal,0 }, /* 4a: 0110 0000 0100 1010 */ - {illegal,0 }, /* 4b: 0110 0000 0100 1011 */ - {illegal,0 }, /* 4c: 0110 0000 0100 1100 */ - {illegal,0 }, /* 4d: 0110 0000 0100 1101 */ - {illegal,0 }, /* 4e: 0110 0000 0100 1110 */ - {illegal,0 }, /* 4f: 0110 0000 0100 1111 */ + {illegal,0 }, /* 48: 0110 0000 0100 1000 */ + {illegal,0 }, /* 49: 0110 0000 0100 1001 */ + {illegal,0 }, /* 4a: 0110 0000 0100 1010 */ + {illegal,0 }, /* 4b: 0110 0000 0100 1011 */ + {illegal,0 }, /* 4c: 0110 0000 0100 1100 */ + {illegal,0 }, /* 4d: 0110 0000 0100 1101 */ + {illegal,0 }, /* 4e: 0110 0000 0100 1110 */ + {illegal,0 }, /* 4f: 0110 0000 0100 1111 */ {ADC,"V,A" }, /* 50: 0110 0000 0101 0000 */ {ADC,"A,A" }, /* 51: 0110 0000 0101 0001 */ @@ -2124,14 +2124,14 @@ static const struct dasm_s dasm60[256] = {ADC,"E,A" }, /* 55: 0110 0000 0101 0101 */ {ADC,"H,A" }, /* 56: 0110 0000 0101 0110 */ {ADC,"L,A" }, /* 57: 0110 0000 0101 0111 */ - {illegal,0 }, /* 58: 0110 0000 0101 1000 */ - {illegal,0 }, /* 59: 0110 0000 0101 1001 */ - {illegal,0 }, /* 5a: 0110 0000 0101 1010 */ - {illegal,0 }, /* 5b: 0110 0000 0101 1011 */ - {illegal,0 }, /* 5c: 0110 0000 0101 1100 */ - {illegal,0 }, /* 5d: 0110 0000 0101 1101 */ - {illegal,0 }, /* 5e: 0110 0000 0101 1110 */ - {illegal,0 }, /* 5f: 0110 0000 0101 1111 */ + {illegal,0 }, /* 58: 0110 0000 0101 1000 */ + {illegal,0 }, /* 59: 0110 0000 0101 1001 */ + {illegal,0 }, /* 5a: 0110 0000 0101 1010 */ + {illegal,0 }, /* 5b: 0110 0000 0101 1011 */ + {illegal,0 }, /* 5c: 0110 0000 0101 1100 */ + {illegal,0 }, /* 5d: 0110 0000 0101 1101 */ + {illegal,0 }, /* 5e: 0110 0000 0101 1110 */ + {illegal,0 }, /* 5f: 0110 0000 0101 1111 */ {SUB,"V,A" }, /* 60: 0110 0000 0110 0000 */ {SUB,"A,A" }, /* 61: 0110 0000 0110 0001 */ @@ -2167,14 +2167,14 @@ static const struct dasm_s dasm60[256] = {EQA,"H,A" }, /* 7e: 0110 0000 0111 1110 */ {EQA,"L,A" }, /* 7f: 0110 0000 0111 1111 */ - {illegal,0 }, /* 80: 0110 0000 1000 0000 */ - {illegal,0 }, /* 81: 0110 0000 1000 0001 */ - {illegal,0 }, /* 82: 0110 0000 1000 0010 */ - {illegal,0 }, /* 83: 0110 0000 1000 0011 */ - {illegal,0 }, /* 84: 0110 0000 1000 0100 */ - {illegal,0 }, /* 85: 0110 0000 1000 0101 */ - {illegal,0 }, /* 86: 0110 0000 1000 0110 */ - {illegal,0 }, /* 87: 0110 0000 1000 0111 */ + {illegal,0 }, /* 80: 0110 0000 1000 0000 */ + {illegal,0 }, /* 81: 0110 0000 1000 0001 */ + {illegal,0 }, /* 82: 0110 0000 1000 0010 */ + {illegal,0 }, /* 83: 0110 0000 1000 0011 */ + {illegal,0 }, /* 84: 0110 0000 1000 0100 */ + {illegal,0 }, /* 85: 0110 0000 1000 0101 */ + {illegal,0 }, /* 86: 0110 0000 1000 0110 */ + {illegal,0 }, /* 87: 0110 0000 1000 0111 */ {ANA,"A,V" }, /* 88: 0110 0000 1000 1000 */ {ANA,"A,A" }, /* 89: 0110 0000 1000 1001 */ {ANA,"A,B" }, /* 8a: 0110 0000 1000 1010 */ @@ -2311,7 +2311,7 @@ static const struct dasm_s dasm64_7810[256] = {MVI,"PB,%b" }, /* 01: 0110 0100 0000 0001 xxxx xxxx */ {MVI,"PC,%b" }, /* 02: 0110 0100 0000 0010 xxxx xxxx */ {MVI,"PD,%b" }, /* 03: 0110 0100 0000 0011 xxxx xxxx */ - {illegal,0 }, /* 04: 0110 0100 0000 0100 xxxx xxxx */ + {illegal,0 }, /* 04: 0110 0100 0000 0100 xxxx xxxx */ {MVI,"PF,%b" }, /* 05: 0110 0100 0000 0101 xxxx xxxx */ {MVI,"MKH,%b" }, /* 06: 0110 0100 0000 0110 xxxx xxxx */ {MVI,"MKL,%b" }, /* 07: 0110 0100 0000 0111 xxxx xxxx */ @@ -2319,7 +2319,7 @@ static const struct dasm_s dasm64_7810[256] = {ANI,"PB,%b" }, /* 09: 0110 0100 0000 1001 xxxx xxxx */ {ANI,"PC,%b" }, /* 0a: 0110 0100 0000 1010 xxxx xxxx */ {ANI,"PD,%b" }, /* 0b: 0110 0100 0000 1011 xxxx xxxx */ - {illegal,0 }, /* 0c: 0110 0100 0000 1100 xxxx xxxx */ + {illegal,0 }, /* 0c: 0110 0100 0000 1100 xxxx xxxx */ {ANI,"PF,%b" }, /* 0d: 0110 0100 0000 1101 xxxx xxxx */ {ANI,"MKH,%b" }, /* 0e: 0110 0100 0000 1110 xxxx xxxx */ {ANI,"MKL,%b" }, /* 0f: 0110 0100 0000 1111 xxxx xxxx */ @@ -2328,7 +2328,7 @@ static const struct dasm_s dasm64_7810[256] = {XRI,"PB,%b" }, /* 11: 0110 0100 0001 0001 xxxx xxxx */ {XRI,"PC,%b" }, /* 12: 0110 0100 0001 0010 xxxx xxxx */ {XRI,"PD,%b" }, /* 13: 0110 0100 0001 0011 xxxx xxxx */ - {illegal,0 }, /* 14: 0110 0100 0001 0100 xxxx xxxx */ + {illegal,0 }, /* 14: 0110 0100 0001 0100 xxxx xxxx */ {XRI,"PF,%b" }, /* 15: 0110 0100 0001 0101 xxxx xxxx */ {XRI,"MKH,%b" }, /* 16: 0110 0100 0001 0110 xxxx xxxx */ {XRI,"MKL,%b" }, /* 17: 0110 0100 0001 0111 xxxx xxxx */ @@ -2336,7 +2336,7 @@ static const struct dasm_s dasm64_7810[256] = {ORI,"PB,%b" }, /* 19: 0110 0100 0001 1001 xxxx xxxx */ {ORI,"PC,%b" }, /* 1a: 0110 0100 0001 1010 xxxx xxxx */ {ORI,"PD,%b" }, /* 1b: 0110 0100 0001 1011 xxxx xxxx */ - {illegal,0 }, /* 1c: 0110 0100 0001 1100 xxxx xxxx */ + {illegal,0 }, /* 1c: 0110 0100 0001 1100 xxxx xxxx */ {ORI,"PF,%b" }, /* 1d: 0110 0100 0001 1101 xxxx xxxx */ {ORI,"MKH,%b" }, /* 1e: 0110 0100 0001 1110 xxxx xxxx */ {ORI,"MKL,%b" }, /* 1f: 0110 0100 0001 1111 xxxx xxxx */ @@ -2345,7 +2345,7 @@ static const struct dasm_s dasm64_7810[256] = {ADINC,"PB,%b" }, /* 21: 0110 0100 0010 0001 xxxx xxxx */ {ADINC,"PC,%b" }, /* 22: 0110 0100 0010 0010 xxxx xxxx */ {ADINC,"PD,%b" }, /* 23: 0110 0100 0010 0011 xxxx xxxx */ - {illegal,0 }, /* 24: 0110 0100 0010 0100 xxxx xxxx */ + {illegal,0 }, /* 24: 0110 0100 0010 0100 xxxx xxxx */ {ADINC,"PF,%b" }, /* 25: 0110 0100 0010 0101 xxxx xxxx */ {ADINC,"MKH,%b" }, /* 26: 0110 0100 0010 0110 xxxx xxxx */ {ADINC,"MKL,%b" }, /* 27: 0110 0100 0010 0111 xxxx xxxx */ @@ -2353,7 +2353,7 @@ static const struct dasm_s dasm64_7810[256] = {GTI,"PB,%b" }, /* 29: 0110 0100 0010 1001 xxxx xxxx */ {GTI,"PC,%b" }, /* 2a: 0110 0100 0010 1010 xxxx xxxx */ {GTI,"PD,%b" }, /* 2b: 0110 0100 0010 1011 xxxx xxxx */ - {illegal,0 }, /* 2c: 0110 0100 0010 1100 xxxx xxxx */ + {illegal,0 }, /* 2c: 0110 0100 0010 1100 xxxx xxxx */ {GTI,"PF,%b" }, /* 2d: 0110 0100 0010 1101 xxxx xxxx */ {GTI,"MKH,%b" }, /* 2e: 0110 0100 0010 1110 xxxx xxxx */ {GTI,"MKL,%b" }, /* 2f: 0110 0100 0010 1111 xxxx xxxx */ @@ -2362,7 +2362,7 @@ static const struct dasm_s dasm64_7810[256] = {SUINB,"PB,%b" }, /* 31: 0110 0100 0011 0001 xxxx xxxx */ {SUINB,"PC,%b" }, /* 32: 0110 0100 0011 0010 xxxx xxxx */ {SUINB,"PD,%b" }, /* 33: 0110 0100 0011 0011 xxxx xxxx */ - {illegal,0 }, /* 34: 0110 0100 0011 0100 xxxx xxxx */ + {illegal,0 }, /* 34: 0110 0100 0011 0100 xxxx xxxx */ {SUINB,"PF,%b" }, /* 35: 0110 0100 0011 0101 xxxx xxxx */ {SUINB,"MKH,%b" }, /* 36: 0110 0100 0011 0110 xxxx xxxx */ {SUINB,"MKL,%b" }, /* 37: 0110 0100 0011 0111 xxxx xxxx */ @@ -2370,7 +2370,7 @@ static const struct dasm_s dasm64_7810[256] = {LTI,"PB,%b" }, /* 39: 0110 0100 0011 1001 xxxx xxxx */ {LTI,"PC,%b" }, /* 3a: 0110 0100 0011 1010 xxxx xxxx */ {LTI,"PD,%b" }, /* 3b: 0110 0100 0011 1011 xxxx xxxx */ - {illegal,0 }, /* 3c: 0110 0100 0011 1100 xxxx xxxx */ + {illegal,0 }, /* 3c: 0110 0100 0011 1100 xxxx xxxx */ {LTI,"PF,%b" }, /* 3d: 0110 0100 0011 1101 xxxx xxxx */ {LTI,"MKH,%b" }, /* 3e: 0110 0100 0011 1110 xxxx xxxx */ {LTI,"MKL,%b" }, /* 3f: 0110 0100 0011 1111 xxxx xxxx */ @@ -2379,7 +2379,7 @@ static const struct dasm_s dasm64_7810[256] = {ADI,"PB,%b" }, /* 41: 0110 0100 0100 0001 xxxx xxxx */ {ADI,"PC,%b" }, /* 42: 0110 0100 0100 0010 xxxx xxxx */ {ADI,"PD,%b" }, /* 43: 0110 0100 0100 0011 xxxx xxxx */ - {illegal,0 }, /* 44: 0110 0100 0100 0100 xxxx xxxx */ + {illegal,0 }, /* 44: 0110 0100 0100 0100 xxxx xxxx */ {ADI,"PF,%b" }, /* 45: 0110 0100 0100 0101 xxxx xxxx */ {ADI,"MKH,%b" }, /* 46: 0110 0100 0100 0110 xxxx xxxx */ {ADI,"MKL,%b" }, /* 47: 0110 0100 0100 0111 xxxx xxxx */ @@ -2387,7 +2387,7 @@ static const struct dasm_s dasm64_7810[256] = {ONI,"PB,%b" }, /* 49: 0110 0100 0100 1001 xxxx xxxx */ {ONI,"PC,%b" }, /* 4a: 0110 0100 0100 1010 xxxx xxxx */ {ONI,"PD,%b" }, /* 4b: 0110 0100 0100 1011 xxxx xxxx */ - {illegal,0 }, /* 4c: 0110 0100 0100 1100 xxxx xxxx */ + {illegal,0 }, /* 4c: 0110 0100 0100 1100 xxxx xxxx */ {ONI,"PF,%b" }, /* 4d: 0110 0100 0100 1101 xxxx xxxx */ {ONI,"MKH,%b" }, /* 4e: 0110 0100 0100 1110 xxxx xxxx */ {ONI,"MKL,%b" }, /* 4f: 0110 0100 0100 1111 xxxx xxxx */ @@ -2396,7 +2396,7 @@ static const struct dasm_s dasm64_7810[256] = {ACI,"PB,%b" }, /* 51: 0110 0100 0101 0001 xxxx xxxx */ {ACI,"PC,%b" }, /* 52: 0110 0100 0101 0010 xxxx xxxx */ {ACI,"PD,%b" }, /* 53: 0110 0100 0101 0011 xxxx xxxx */ - {illegal,0 }, /* 54: 0110 0100 0101 0100 xxxx xxxx */ + {illegal,0 }, /* 54: 0110 0100 0101 0100 xxxx xxxx */ {ACI,"PF,%b" }, /* 55: 0110 0100 0101 0101 xxxx xxxx */ {ACI,"MKH,%b" }, /* 56: 0110 0100 0101 0110 xxxx xxxx */ {ACI,"MKL,%b" }, /* 57: 0110 0100 0101 0111 xxxx xxxx */ @@ -2404,7 +2404,7 @@ static const struct dasm_s dasm64_7810[256] = {OFFI,"PB,%b" }, /* 59: 0110 0100 0101 1001 xxxx xxxx */ {OFFI,"PC,%b" }, /* 5a: 0110 0100 0101 1010 xxxx xxxx */ {OFFI,"PD,%b" }, /* 5b: 0110 0100 0101 1011 xxxx xxxx */ - {illegal,0 }, /* 5c: 0110 0100 0101 1100 xxxx xxxx */ + {illegal,0 }, /* 5c: 0110 0100 0101 1100 xxxx xxxx */ {OFFI,"PF,%b" }, /* 5d: 0110 0100 0101 1101 xxxx xxxx */ {OFFI,"MKH,%b" }, /* 5e: 0110 0100 0101 1110 xxxx xxxx */ {OFFI,"MKL,%b" }, /* 5f: 0110 0100 0101 1111 xxxx xxxx */ @@ -2413,7 +2413,7 @@ static const struct dasm_s dasm64_7810[256] = {SUI,"PB,%b" }, /* 61: 0110 0100 0110 0001 xxxx xxxx */ {SUI,"PC,%b" }, /* 62: 0110 0100 0110 0010 xxxx xxxx */ {SUI,"PD,%b" }, /* 63: 0110 0100 0110 0011 xxxx xxxx */ - {illegal,0 }, /* 64: 0110 0100 0110 0100 xxxx xxxx */ + {illegal,0 }, /* 64: 0110 0100 0110 0100 xxxx xxxx */ {SUI,"PF,%b" }, /* 65: 0110 0100 0110 0101 xxxx xxxx */ {SUI,"MKH,%b" }, /* 66: 0110 0100 0110 0110 xxxx xxxx */ {SUI,"MKL,%b" }, /* 67: 0110 0100 0110 0111 xxxx xxxx */ @@ -2421,7 +2421,7 @@ static const struct dasm_s dasm64_7810[256] = {NEI,"PB,%b" }, /* 69: 0110 0100 0110 1001 xxxx xxxx */ {NEI,"PC,%b" }, /* 6a: 0110 0100 0110 1010 xxxx xxxx */ {NEI,"PD,%b" }, /* 6b: 0110 0100 0110 1011 xxxx xxxx */ - {illegal,0 }, /* 6c: 0110 0100 0110 1100 xxxx xxxx */ + {illegal,0 }, /* 6c: 0110 0100 0110 1100 xxxx xxxx */ {NEI,"PF,%b" }, /* 6d: 0110 0100 0110 1101 xxxx xxxx */ {NEI,"MKH,%b" }, /* 6e: 0110 0100 0110 1110 xxxx xxxx */ {NEI,"MKL,%b" }, /* 6f: 0110 0100 0110 1111 xxxx xxxx */ @@ -2430,7 +2430,7 @@ static const struct dasm_s dasm64_7810[256] = {SBI,"PB,%b" }, /* 71: 0110 0100 0111 0001 xxxx xxxx */ {SBI,"PC,%b" }, /* 72: 0110 0100 0111 0010 xxxx xxxx */ {SBI,"PD,%b" }, /* 73: 0110 0100 0111 0011 xxxx xxxx */ - {illegal,0 }, /* 74: 0110 0100 0111 0100 xxxx xxxx */ + {illegal,0 }, /* 74: 0110 0100 0111 0100 xxxx xxxx */ {SBI,"PF,%b" }, /* 75: 0110 0100 0111 0101 xxxx xxxx */ {SBI,"MKH,%b" }, /* 76: 0110 0100 0111 0110 xxxx xxxx */ {SBI,"MKL,%b" }, /* 77: 0110 0100 0111 0111 xxxx xxxx */ @@ -2438,146 +2438,146 @@ static const struct dasm_s dasm64_7810[256] = {EQI,"PB,%b" }, /* 79: 0110 0100 0111 1001 xxxx xxxx */ {EQI,"PC,%b" }, /* 7a: 0110 0100 0111 1010 xxxx xxxx */ {EQI,"PD,%b" }, /* 7b: 0110 0100 0111 1011 xxxx xxxx */ - {illegal,0 }, /* 7c: 0110 0100 0111 1100 xxxx xxxx */ + {illegal,0 }, /* 7c: 0110 0100 0111 1100 xxxx xxxx */ {EQI,"PF,%b" }, /* 7d: 0110 0100 0111 1101 xxxx xxxx */ {EQI,"MKH,%b" }, /* 7e: 0110 0100 0111 1110 xxxx xxxx */ {EQI,"MKL,%b" }, /* 7f: 0110 0100 0111 1111 xxxx xxxx */ {MVI,"ANM,%b" }, /* 80: 0110 0100 1000 0000 xxxx xxxx */ /* 7810 */ {MVI,"SMH,%b" }, /* 81: 0110 0100 1000 0001 xxxx xxxx */ - {illegal,0 }, /* 82: 0110 0100 1000 0010 xxxx xxxx */ + {illegal,0 }, /* 82: 0110 0100 1000 0010 xxxx xxxx */ {MVI,"EOM,%b" }, /* 83: 0110 0100 1000 0011 xxxx xxxx */ - {illegal,0 }, /* 84: 0110 0100 1000 0100 xxxx xxxx */ + {illegal,0 }, /* 84: 0110 0100 1000 0100 xxxx xxxx */ {MVI,"TMM,%b" }, /* 85: 0110 0100 1000 0101 xxxx xxxx */ - {illegal,0 }, /* 86: 0110 0100 1000 0110 xxxx xxxx */ - {illegal,0 }, /* 87: 0110 0100 1000 0111 xxxx xxxx */ + {illegal,0 }, /* 86: 0110 0100 1000 0110 xxxx xxxx */ + {illegal,0 }, /* 87: 0110 0100 1000 0111 xxxx xxxx */ {ANI,"ANM,%b" }, /* 88: 0110 0100 1000 1000 xxxx xxxx */ /* 7810 */ {ANI,"SMH,%b" }, /* 89: 0110 0100 1000 1001 xxxx xxxx */ - {illegal,0 }, /* 8a: 0110 0100 1000 1010 xxxx xxxx */ + {illegal,0 }, /* 8a: 0110 0100 1000 1010 xxxx xxxx */ {ANI,"EOM,%b" }, /* 8b: 0110 0100 1000 1011 xxxx xxxx */ - {illegal,0 }, /* 8c: 0110 0100 1000 1100 xxxx xxxx */ + {illegal,0 }, /* 8c: 0110 0100 1000 1100 xxxx xxxx */ {ANI,"TMM,%b" }, /* 8d: 0110 0100 1000 1101 xxxx xxxx */ - {illegal,0 }, /* 8e: 0110 0100 1000 1110 xxxx xxxx */ - {illegal,0 }, /* 8f: 0110 0100 1000 1111 xxxx xxxx */ + {illegal,0 }, /* 8e: 0110 0100 1000 1110 xxxx xxxx */ + {illegal,0 }, /* 8f: 0110 0100 1000 1111 xxxx xxxx */ {XRI,"ANM,%b" }, /* 90: 0110 0100 1001 0000 xxxx xxxx */ /* 7810 */ {XRI,"SMH,%b" }, /* 91: 0110 0100 1001 0001 xxxx xxxx */ - {illegal,0 }, /* 92: 0110 0100 1001 0010 xxxx xxxx */ + {illegal,0 }, /* 92: 0110 0100 1001 0010 xxxx xxxx */ {XRI,"EOM,%b" }, /* 93: 0110 0100 1001 0011 xxxx xxxx */ - {illegal,0 }, /* 94: 0110 0100 1001 0100 xxxx xxxx */ + {illegal,0 }, /* 94: 0110 0100 1001 0100 xxxx xxxx */ {XRI,"TMM,%b" }, /* 95: 0110 0100 1001 0101 xxxx xxxx */ - {illegal,0 }, /* 96: 0110 0100 1001 0110 xxxx xxxx */ - {illegal,0 }, /* 97: 0110 0100 1001 0111 xxxx xxxx */ + {illegal,0 }, /* 96: 0110 0100 1001 0110 xxxx xxxx */ + {illegal,0 }, /* 97: 0110 0100 1001 0111 xxxx xxxx */ {ORI,"ANM,%b" }, /* 98: 0110 0100 1001 1000 xxxx xxxx */ /* 7810 */ {ORI,"SMH,%b" }, /* 99: 0110 0100 1001 1001 xxxx xxxx */ - {illegal,0 }, /* 9a: 0110 0100 1001 1010 xxxx xxxx */ + {illegal,0 }, /* 9a: 0110 0100 1001 1010 xxxx xxxx */ {ORI,"EOM,%b" }, /* 9b: 0110 0100 1001 1011 xxxx xxxx */ - {illegal,0 }, /* 9c: 0110 0100 1001 1100 xxxx xxxx */ + {illegal,0 }, /* 9c: 0110 0100 1001 1100 xxxx xxxx */ {ORI,"TMM,%b" }, /* 9d: 0110 0100 1001 1101 xxxx xxxx */ - {illegal,0 }, /* 9e: 0110 0100 1001 1110 xxxx xxxx */ - {illegal,0 }, /* 9f: 0110 0100 1001 1111 xxxx xxxx */ + {illegal,0 }, /* 9e: 0110 0100 1001 1110 xxxx xxxx */ + {illegal,0 }, /* 9f: 0110 0100 1001 1111 xxxx xxxx */ {ADINC,"ANM,%b" }, /* a0: 0110 0100 1010 0000 xxxx xxxx */ /* 7810 */ {ADINC,"SMH,%b" }, /* a1: 0110 0100 1010 0001 xxxx xxxx */ - {illegal,0 }, /* a2: 0110 0100 1010 0010 xxxx xxxx */ + {illegal,0 }, /* a2: 0110 0100 1010 0010 xxxx xxxx */ {ADINC,"EOM,%b" }, /* a3: 0110 0100 1010 0011 xxxx xxxx */ - {illegal,0 }, /* a4: 0110 0100 1010 0100 xxxx xxxx */ + {illegal,0 }, /* a4: 0110 0100 1010 0100 xxxx xxxx */ {ADINC,"TMM,%b" }, /* a5: 0110 0100 1010 0101 xxxx xxxx */ - {illegal,0 }, /* a6: 0110 0100 1010 0110 xxxx xxxx */ - {illegal,0 }, /* a7: 0110 0100 1010 0111 xxxx xxxx */ + {illegal,0 }, /* a6: 0110 0100 1010 0110 xxxx xxxx */ + {illegal,0 }, /* a7: 0110 0100 1010 0111 xxxx xxxx */ {GTI,"ANM,%b" }, /* a8: 0110 0100 1010 1000 xxxx xxxx */ /* 7810 */ {GTI,"SMH,%b" }, /* a9: 0110 0100 1010 1001 xxxx xxxx */ - {illegal,0 }, /* aa: 0110 0100 1010 1010 xxxx xxxx */ + {illegal,0 }, /* aa: 0110 0100 1010 1010 xxxx xxxx */ {GTI,"EOM,%b" }, /* ab: 0110 0100 1010 1011 xxxx xxxx */ - {illegal,0 }, /* ac: 0110 0100 1010 1100 xxxx xxxx */ + {illegal,0 }, /* ac: 0110 0100 1010 1100 xxxx xxxx */ {GTI,"TMM,%b" }, /* ad: 0110 0100 1010 1101 xxxx xxxx */ - {illegal,0 }, /* ae: 0110 0100 1010 1110 xxxx xxxx */ - {illegal,0 }, /* af: 0110 0100 1010 1111 xxxx xxxx */ + {illegal,0 }, /* ae: 0110 0100 1010 1110 xxxx xxxx */ + {illegal,0 }, /* af: 0110 0100 1010 1111 xxxx xxxx */ {SUINB,"ANM,%b" }, /* b0: 0110 0100 1011 0000 xxxx xxxx */ /* 7810 */ {SUINB,"SMH,%b" }, /* b1: 0110 0100 1011 0001 xxxx xxxx */ - {illegal,0 }, /* b2: 0110 0100 1011 0010 xxxx xxxx */ + {illegal,0 }, /* b2: 0110 0100 1011 0010 xxxx xxxx */ {SUINB,"EOM,%b" }, /* b3: 0110 0100 1011 0011 xxxx xxxx */ - {illegal,0 }, /* b4: 0110 0100 1011 0100 xxxx xxxx */ + {illegal,0 }, /* b4: 0110 0100 1011 0100 xxxx xxxx */ {SUINB,"TMM,%b" }, /* b5: 0110 0100 1011 0101 xxxx xxxx */ - {illegal,0 }, /* b6: 0110 0100 1011 0110 xxxx xxxx */ - {illegal,0 }, /* b7: 0110 0100 1011 0111 xxxx xxxx */ + {illegal,0 }, /* b6: 0110 0100 1011 0110 xxxx xxxx */ + {illegal,0 }, /* b7: 0110 0100 1011 0111 xxxx xxxx */ {LTI,"ANM,%b" }, /* b8: 0110 0100 1011 1000 xxxx xxxx */ /* 7810 */ {LTI,"SMH,%b" }, /* b9: 0110 0100 1011 1001 xxxx xxxx */ - {illegal,0 }, /* ba: 0110 0100 1011 1010 xxxx xxxx */ + {illegal,0 }, /* ba: 0110 0100 1011 1010 xxxx xxxx */ {LTI,"EOM,%b" }, /* bb: 0110 0100 1011 1011 xxxx xxxx */ - {illegal,0 }, /* bc: 0110 0100 1011 1100 xxxx xxxx */ + {illegal,0 }, /* bc: 0110 0100 1011 1100 xxxx xxxx */ {LTI,"TMM,%b" }, /* bd: 0110 0100 1011 1101 xxxx xxxx */ - {illegal,0 }, /* be: 0110 0100 1011 1110 xxxx xxxx */ - {illegal,0 }, /* bf: 0110 0100 1011 1111 xxxx xxxx */ + {illegal,0 }, /* be: 0110 0100 1011 1110 xxxx xxxx */ + {illegal,0 }, /* bf: 0110 0100 1011 1111 xxxx xxxx */ {ADI,"ANM,%b" }, /* c0: 0110 0100 1100 0000 xxxx xxxx */ /* 7810 */ {ADI,"SMH,%b" }, /* c1: 0110 0100 1100 0001 xxxx xxxx */ - {illegal,0 }, /* c2: 0110 0100 1100 0010 xxxx xxxx */ + {illegal,0 }, /* c2: 0110 0100 1100 0010 xxxx xxxx */ {ADI,"EOM,%b" }, /* c3: 0110 0100 1100 0011 xxxx xxxx */ - {illegal,0 }, /* c4: 0110 0100 1100 0100 xxxx xxxx */ + {illegal,0 }, /* c4: 0110 0100 1100 0100 xxxx xxxx */ {ADI,"TMM,%b" }, /* c5: 0110 0100 1100 0101 xxxx xxxx */ - {illegal,0 }, /* c6: 0110 0100 1100 0110 xxxx xxxx */ - {illegal,0 }, /* c7: 0110 0100 1100 0111 xxxx xxxx */ + {illegal,0 }, /* c6: 0110 0100 1100 0110 xxxx xxxx */ + {illegal,0 }, /* c7: 0110 0100 1100 0111 xxxx xxxx */ {ONI,"ANM,%b" }, /* c8: 0110 0100 1100 1000 xxxx xxxx */ /* 7810 */ {ONI,"SMH,%b" }, /* c9: 0110 0100 1100 1001 xxxx xxxx */ - {illegal,0 }, /* ca: 0110 0100 1100 1010 xxxx xxxx */ + {illegal,0 }, /* ca: 0110 0100 1100 1010 xxxx xxxx */ {ONI,"EOM,%b" }, /* cb: 0110 0100 1100 1011 xxxx xxxx */ - {illegal,0 }, /* cc: 0110 0100 1100 1100 xxxx xxxx */ + {illegal,0 }, /* cc: 0110 0100 1100 1100 xxxx xxxx */ {ONI,"TMM,%b" }, /* cd: 0110 0100 1100 1101 xxxx xxxx */ - {illegal,0 }, /* ce: 0110 0100 1100 1110 xxxx xxxx */ - {illegal,0 }, /* cf: 0110 0100 1100 1111 xxxx xxxx */ + {illegal,0 }, /* ce: 0110 0100 1100 1110 xxxx xxxx */ + {illegal,0 }, /* cf: 0110 0100 1100 1111 xxxx xxxx */ {ACI,"ANM,%b" }, /* d0: 0110 0100 1101 0000 xxxx xxxx */ /* 7810 */ {ACI,"SMH,%b" }, /* d1: 0110 0100 1101 0001 xxxx xxxx */ - {illegal,0 }, /* d2: 0110 0100 1101 0010 xxxx xxxx */ + {illegal,0 }, /* d2: 0110 0100 1101 0010 xxxx xxxx */ {ACI,"EOM,%b" }, /* d3: 0110 0100 1101 0011 xxxx xxxx */ - {illegal,0 }, /* d4: 0110 0100 1101 0100 xxxx xxxx */ + {illegal,0 }, /* d4: 0110 0100 1101 0100 xxxx xxxx */ {ACI,"TMM,%b" }, /* d5: 0110 0100 1101 0101 xxxx xxxx */ - {illegal,0 }, /* d6: 0110 0100 1101 0110 xxxx xxxx */ - {illegal,0 }, /* d7: 0110 0100 1101 0111 xxxx xxxx */ + {illegal,0 }, /* d6: 0110 0100 1101 0110 xxxx xxxx */ + {illegal,0 }, /* d7: 0110 0100 1101 0111 xxxx xxxx */ {OFFI,"ANM,%b" }, /* d8: 0110 0100 1101 1000 xxxx xxxx */ /* 7810 */ {OFFI,"SMH,%b" }, /* d9: 0110 0100 1101 1001 xxxx xxxx */ - {illegal,0 }, /* da: 0110 0100 1101 1010 xxxx xxxx */ + {illegal,0 }, /* da: 0110 0100 1101 1010 xxxx xxxx */ {OFFI,"EOM,%b" }, /* db: 0110 0100 1101 1011 xxxx xxxx */ - {illegal,0 }, /* dc: 0110 0100 1101 1100 xxxx xxxx */ + {illegal,0 }, /* dc: 0110 0100 1101 1100 xxxx xxxx */ {OFFI,"TMM,%b" }, /* dd: 0110 0100 1101 1101 xxxx xxxx */ - {illegal,0 }, /* de: 0110 0100 1101 1110 xxxx xxxx */ - {illegal,0 }, /* df: 0110 0100 1101 1111 xxxx xxxx */ + {illegal,0 }, /* de: 0110 0100 1101 1110 xxxx xxxx */ + {illegal,0 }, /* df: 0110 0100 1101 1111 xxxx xxxx */ {SUI,"ANM,%b" }, /* e0: 0110 0100 1110 0000 xxxx xxxx */ /* 7810 */ {SUI,"SMH,%b" }, /* e1: 0110 0100 1110 0001 xxxx xxxx */ - {illegal,0 }, /* e2: 0110 0100 1110 0010 xxxx xxxx */ + {illegal,0 }, /* e2: 0110 0100 1110 0010 xxxx xxxx */ {SUI,"EOM,%b" }, /* e3: 0110 0100 1110 0011 xxxx xxxx */ - {illegal,0 }, /* e4: 0110 0100 1110 0100 xxxx xxxx */ + {illegal,0 }, /* e4: 0110 0100 1110 0100 xxxx xxxx */ {SUI,"TMM,%b" }, /* e5: 0110 0100 1110 0101 xxxx xxxx */ - {illegal,0 }, /* e6: 0110 0100 1110 0110 xxxx xxxx */ - {illegal,0 }, /* e7: 0110 0100 1110 0111 xxxx xxxx */ + {illegal,0 }, /* e6: 0110 0100 1110 0110 xxxx xxxx */ + {illegal,0 }, /* e7: 0110 0100 1110 0111 xxxx xxxx */ {NEI,"ANM,%b" }, /* e8: 0110 0100 1110 1000 xxxx xxxx */ /* 7810 */ {NEI,"SMH,%b" }, /* e9: 0110 0100 1110 1001 xxxx xxxx */ - {illegal,0 }, /* ea: 0110 0100 1110 1010 xxxx xxxx */ + {illegal,0 }, /* ea: 0110 0100 1110 1010 xxxx xxxx */ {NEI,"EOM,%b" }, /* eb: 0110 0100 1110 1011 xxxx xxxx */ - {illegal,0 }, /* ec: 0110 0100 1110 1100 xxxx xxxx */ + {illegal,0 }, /* ec: 0110 0100 1110 1100 xxxx xxxx */ {NEI,"TMM,%b" }, /* ed: 0110 0100 1110 1101 xxxx xxxx */ - {illegal,0 }, /* ee: 0110 0100 1110 1110 xxxx xxxx */ - {illegal,0 }, /* ef: 0110 0100 1110 1111 xxxx xxxx */ + {illegal,0 }, /* ee: 0110 0100 1110 1110 xxxx xxxx */ + {illegal,0 }, /* ef: 0110 0100 1110 1111 xxxx xxxx */ {SBI,"ANM,%b" }, /* f0: 0110 0100 1111 0000 xxxx xxxx */ /* 7810 */ {SBI,"SMH,%b" }, /* f1: 0110 0100 1111 0001 xxxx xxxx */ - {illegal,0 }, /* f2: 0110 0100 1111 0010 xxxx xxxx */ + {illegal,0 }, /* f2: 0110 0100 1111 0010 xxxx xxxx */ {SBI,"EOM,%b" }, /* f3: 0110 0100 1111 0011 xxxx xxxx */ - {illegal,0 }, /* f4: 0110 0100 1111 0100 xxxx xxxx */ + {illegal,0 }, /* f4: 0110 0100 1111 0100 xxxx xxxx */ {SBI,"TMM,%b" }, /* f5: 0110 0100 1111 0101 xxxx xxxx */ - {illegal,0 }, /* f6: 0110 0100 1111 0110 xxxx xxxx */ - {illegal,0 }, /* f7: 0110 0100 1111 0111 xxxx xxxx */ + {illegal,0 }, /* f6: 0110 0100 1111 0110 xxxx xxxx */ + {illegal,0 }, /* f7: 0110 0100 1111 0111 xxxx xxxx */ {EQI,"ANM,%b" }, /* f8: 0110 0100 1111 1000 xxxx xxxx */ /* 7810 */ {EQI,"SMH,%b" }, /* f9: 0110 0100 1111 1001 xxxx xxxx */ - {illegal,0 }, /* fa: 0110 0100 1111 1010 xxxx xxxx */ + {illegal,0 }, /* fa: 0110 0100 1111 1010 xxxx xxxx */ {EQI,"EOM,%b" }, /* fb: 0110 0100 1111 1011 xxxx xxxx */ - {illegal,0 }, /* fc: 0110 0100 1111 1100 xxxx xxxx */ + {illegal,0 }, /* fc: 0110 0100 1111 1100 xxxx xxxx */ {EQI,"TMM,%b" }, /* fd: 0110 0100 1111 1101 xxxx xxxx */ - {illegal,0 }, /* fe: 0110 0100 1111 1110 xxxx xxxx */ - {illegal,0 } /* ff: 0110 0100 1111 1111 xxxx xxxx */ + {illegal,0 }, /* fe: 0110 0100 1111 1110 xxxx xxxx */ + {illegal,0 } /* ff: 0110 0100 1111 1111 xxxx xxxx */ }; static const struct dasm_s dasm64_7807[256] = @@ -2586,7 +2586,7 @@ static const struct dasm_s dasm64_7807[256] = {MVI,"PB,%b" }, /* 01: 0110 0100 0000 0001 xxxx xxxx */ {MVI,"PC,%b" }, /* 02: 0110 0100 0000 0010 xxxx xxxx */ {MVI,"PD,%b" }, /* 03: 0110 0100 0000 0011 xxxx xxxx */ - {illegal,0 }, /* 04: 0110 0100 0000 0100 xxxx xxxx */ + {illegal,0 }, /* 04: 0110 0100 0000 0100 xxxx xxxx */ {MVI,"PF,%b" }, /* 05: 0110 0100 0000 0101 xxxx xxxx */ {MVI,"MKH,%b" }, /* 06: 0110 0100 0000 0110 xxxx xxxx */ {MVI,"MKL,%b" }, /* 07: 0110 0100 0000 0111 xxxx xxxx */ @@ -2594,7 +2594,7 @@ static const struct dasm_s dasm64_7807[256] = {ANI,"PB,%b" }, /* 09: 0110 0100 0000 1001 xxxx xxxx */ {ANI,"PC,%b" }, /* 0a: 0110 0100 0000 1010 xxxx xxxx */ {ANI,"PD,%b" }, /* 0b: 0110 0100 0000 1011 xxxx xxxx */ - {illegal,0 }, /* 0c: 0110 0100 0000 1100 xxxx xxxx */ + {illegal,0 }, /* 0c: 0110 0100 0000 1100 xxxx xxxx */ {ANI,"PF,%b" }, /* 0d: 0110 0100 0000 1101 xxxx xxxx */ {ANI,"MKH,%b" }, /* 0e: 0110 0100 0000 1110 xxxx xxxx */ {ANI,"MKL,%b" }, /* 0f: 0110 0100 0000 1111 xxxx xxxx */ @@ -2603,7 +2603,7 @@ static const struct dasm_s dasm64_7807[256] = {XRI,"PB,%b" }, /* 11: 0110 0100 0001 0001 xxxx xxxx */ {XRI,"PC,%b" }, /* 12: 0110 0100 0001 0010 xxxx xxxx */ {XRI,"PD,%b" }, /* 13: 0110 0100 0001 0011 xxxx xxxx */ - {illegal,0 }, /* 14: 0110 0100 0001 0100 xxxx xxxx */ + {illegal,0 }, /* 14: 0110 0100 0001 0100 xxxx xxxx */ {XRI,"PF,%b" }, /* 15: 0110 0100 0001 0101 xxxx xxxx */ {XRI,"MKH,%b" }, /* 16: 0110 0100 0001 0110 xxxx xxxx */ {XRI,"MKL,%b" }, /* 17: 0110 0100 0001 0111 xxxx xxxx */ @@ -2611,7 +2611,7 @@ static const struct dasm_s dasm64_7807[256] = {ORI,"PB,%b" }, /* 19: 0110 0100 0001 1001 xxxx xxxx */ {ORI,"PC,%b" }, /* 1a: 0110 0100 0001 1010 xxxx xxxx */ {ORI,"PD,%b" }, /* 1b: 0110 0100 0001 1011 xxxx xxxx */ - {illegal,0 }, /* 1c: 0110 0100 0001 1100 xxxx xxxx */ + {illegal,0 }, /* 1c: 0110 0100 0001 1100 xxxx xxxx */ {ORI,"PF,%b" }, /* 1d: 0110 0100 0001 1101 xxxx xxxx */ {ORI,"MKH,%b" }, /* 1e: 0110 0100 0001 1110 xxxx xxxx */ {ORI,"MKL,%b" }, /* 1f: 0110 0100 0001 1111 xxxx xxxx */ @@ -2620,7 +2620,7 @@ static const struct dasm_s dasm64_7807[256] = {ADINC,"PB,%b" }, /* 21: 0110 0100 0010 0001 xxxx xxxx */ {ADINC,"PC,%b" }, /* 22: 0110 0100 0010 0010 xxxx xxxx */ {ADINC,"PD,%b" }, /* 23: 0110 0100 0010 0011 xxxx xxxx */ - {illegal,0 }, /* 24: 0110 0100 0010 0100 xxxx xxxx */ + {illegal,0 }, /* 24: 0110 0100 0010 0100 xxxx xxxx */ {ADINC,"PF,%b" }, /* 25: 0110 0100 0010 0101 xxxx xxxx */ {ADINC,"MKH,%b" }, /* 26: 0110 0100 0010 0110 xxxx xxxx */ {ADINC,"MKL,%b" }, /* 27: 0110 0100 0010 0111 xxxx xxxx */ @@ -2628,7 +2628,7 @@ static const struct dasm_s dasm64_7807[256] = {GTI,"PB,%b" }, /* 29: 0110 0100 0010 1001 xxxx xxxx */ {GTI,"PC,%b" }, /* 2a: 0110 0100 0010 1010 xxxx xxxx */ {GTI,"PD,%b" }, /* 2b: 0110 0100 0010 1011 xxxx xxxx */ - {illegal,0 }, /* 2c: 0110 0100 0010 1100 xxxx xxxx */ + {illegal,0 }, /* 2c: 0110 0100 0010 1100 xxxx xxxx */ {GTI,"PF,%b" }, /* 2d: 0110 0100 0010 1101 xxxx xxxx */ {GTI,"MKH,%b" }, /* 2e: 0110 0100 0010 1110 xxxx xxxx */ {GTI,"MKL,%b" }, /* 2f: 0110 0100 0010 1111 xxxx xxxx */ @@ -2637,7 +2637,7 @@ static const struct dasm_s dasm64_7807[256] = {SUINB,"PB,%b" }, /* 31: 0110 0100 0011 0001 xxxx xxxx */ {SUINB,"PC,%b" }, /* 32: 0110 0100 0011 0010 xxxx xxxx */ {SUINB,"PD,%b" }, /* 33: 0110 0100 0011 0011 xxxx xxxx */ - {illegal,0 }, /* 34: 0110 0100 0011 0100 xxxx xxxx */ + {illegal,0 }, /* 34: 0110 0100 0011 0100 xxxx xxxx */ {SUINB,"PF,%b" }, /* 35: 0110 0100 0011 0101 xxxx xxxx */ {SUINB,"MKH,%b" }, /* 36: 0110 0100 0011 0110 xxxx xxxx */ {SUINB,"MKL,%b" }, /* 37: 0110 0100 0011 0111 xxxx xxxx */ @@ -2645,7 +2645,7 @@ static const struct dasm_s dasm64_7807[256] = {LTI,"PB,%b" }, /* 39: 0110 0100 0011 1001 xxxx xxxx */ {LTI,"PC,%b" }, /* 3a: 0110 0100 0011 1010 xxxx xxxx */ {LTI,"PD,%b" }, /* 3b: 0110 0100 0011 1011 xxxx xxxx */ - {illegal,0 }, /* 3c: 0110 0100 0011 1100 xxxx xxxx */ + {illegal,0 }, /* 3c: 0110 0100 0011 1100 xxxx xxxx */ {LTI,"PF,%b" }, /* 3d: 0110 0100 0011 1101 xxxx xxxx */ {LTI,"MKH,%b" }, /* 3e: 0110 0100 0011 1110 xxxx xxxx */ {LTI,"MKL,%b" }, /* 3f: 0110 0100 0011 1111 xxxx xxxx */ @@ -2654,7 +2654,7 @@ static const struct dasm_s dasm64_7807[256] = {ADI,"PB,%b" }, /* 41: 0110 0100 0100 0001 xxxx xxxx */ {ADI,"PC,%b" }, /* 42: 0110 0100 0100 0010 xxxx xxxx */ {ADI,"PD,%b" }, /* 43: 0110 0100 0100 0011 xxxx xxxx */ - {illegal,0 }, /* 44: 0110 0100 0100 0100 xxxx xxxx */ + {illegal,0 }, /* 44: 0110 0100 0100 0100 xxxx xxxx */ {ADI,"PF,%b" }, /* 45: 0110 0100 0100 0101 xxxx xxxx */ {ADI,"MKH,%b" }, /* 46: 0110 0100 0100 0110 xxxx xxxx */ {ADI,"MKL,%b" }, /* 47: 0110 0100 0100 0111 xxxx xxxx */ @@ -2662,7 +2662,7 @@ static const struct dasm_s dasm64_7807[256] = {ONI,"PB,%b" }, /* 49: 0110 0100 0100 1001 xxxx xxxx */ {ONI,"PC,%b" }, /* 4a: 0110 0100 0100 1010 xxxx xxxx */ {ONI,"PD,%b" }, /* 4b: 0110 0100 0100 1011 xxxx xxxx */ - {illegal,0 }, /* 4c: 0110 0100 0100 1100 xxxx xxxx */ + {illegal,0 }, /* 4c: 0110 0100 0100 1100 xxxx xxxx */ {ONI,"PF,%b" }, /* 4d: 0110 0100 0100 1101 xxxx xxxx */ {ONI,"MKH,%b" }, /* 4e: 0110 0100 0100 1110 xxxx xxxx */ {ONI,"MKL,%b" }, /* 4f: 0110 0100 0100 1111 xxxx xxxx */ @@ -2671,7 +2671,7 @@ static const struct dasm_s dasm64_7807[256] = {ACI,"PB,%b" }, /* 51: 0110 0100 0101 0001 xxxx xxxx */ {ACI,"PC,%b" }, /* 52: 0110 0100 0101 0010 xxxx xxxx */ {ACI,"PD,%b" }, /* 53: 0110 0100 0101 0011 xxxx xxxx */ - {illegal,0 }, /* 54: 0110 0100 0101 0100 xxxx xxxx */ + {illegal,0 }, /* 54: 0110 0100 0101 0100 xxxx xxxx */ {ACI,"PF,%b" }, /* 55: 0110 0100 0101 0101 xxxx xxxx */ {ACI,"MKH,%b" }, /* 56: 0110 0100 0101 0110 xxxx xxxx */ {ACI,"MKL,%b" }, /* 57: 0110 0100 0101 0111 xxxx xxxx */ @@ -2679,7 +2679,7 @@ static const struct dasm_s dasm64_7807[256] = {OFFI,"PB,%b" }, /* 59: 0110 0100 0101 1001 xxxx xxxx */ {OFFI,"PC,%b" }, /* 5a: 0110 0100 0101 1010 xxxx xxxx */ {OFFI,"PD,%b" }, /* 5b: 0110 0100 0101 1011 xxxx xxxx */ - {illegal,0 }, /* 5c: 0110 0100 0101 1100 xxxx xxxx */ + {illegal,0 }, /* 5c: 0110 0100 0101 1100 xxxx xxxx */ {OFFI,"PF,%b" }, /* 5d: 0110 0100 0101 1101 xxxx xxxx */ {OFFI,"MKH,%b" }, /* 5e: 0110 0100 0101 1110 xxxx xxxx */ {OFFI,"MKL,%b" }, /* 5f: 0110 0100 0101 1111 xxxx xxxx */ @@ -2688,7 +2688,7 @@ static const struct dasm_s dasm64_7807[256] = {SUI,"PB,%b" }, /* 61: 0110 0100 0110 0001 xxxx xxxx */ {SUI,"PC,%b" }, /* 62: 0110 0100 0110 0010 xxxx xxxx */ {SUI,"PD,%b" }, /* 63: 0110 0100 0110 0011 xxxx xxxx */ - {illegal,0 }, /* 64: 0110 0100 0110 0100 xxxx xxxx */ + {illegal,0 }, /* 64: 0110 0100 0110 0100 xxxx xxxx */ {SUI,"PF,%b" }, /* 65: 0110 0100 0110 0101 xxxx xxxx */ {SUI,"MKH,%b" }, /* 66: 0110 0100 0110 0110 xxxx xxxx */ {SUI,"MKL,%b" }, /* 67: 0110 0100 0110 0111 xxxx xxxx */ @@ -2696,7 +2696,7 @@ static const struct dasm_s dasm64_7807[256] = {NEI,"PB,%b" }, /* 69: 0110 0100 0110 1001 xxxx xxxx */ {NEI,"PC,%b" }, /* 6a: 0110 0100 0110 1010 xxxx xxxx */ {NEI,"PD,%b" }, /* 6b: 0110 0100 0110 1011 xxxx xxxx */ - {illegal,0 }, /* 6c: 0110 0100 0110 1100 xxxx xxxx */ + {illegal,0 }, /* 6c: 0110 0100 0110 1100 xxxx xxxx */ {NEI,"PF,%b" }, /* 6d: 0110 0100 0110 1101 xxxx xxxx */ {NEI,"MKH,%b" }, /* 6e: 0110 0100 0110 1110 xxxx xxxx */ {NEI,"MKL,%b" }, /* 6f: 0110 0100 0110 1111 xxxx xxxx */ @@ -2705,7 +2705,7 @@ static const struct dasm_s dasm64_7807[256] = {SBI,"PB,%b" }, /* 71: 0110 0100 0111 0001 xxxx xxxx */ {SBI,"PC,%b" }, /* 72: 0110 0100 0111 0010 xxxx xxxx */ {SBI,"PD,%b" }, /* 73: 0110 0100 0111 0011 xxxx xxxx */ - {illegal,0 }, /* 74: 0110 0100 0111 0100 xxxx xxxx */ + {illegal,0 }, /* 74: 0110 0100 0111 0100 xxxx xxxx */ {SBI,"PF,%b" }, /* 75: 0110 0100 0111 0101 xxxx xxxx */ {SBI,"MKH,%b" }, /* 76: 0110 0100 0111 0110 xxxx xxxx */ {SBI,"MKL,%b" }, /* 77: 0110 0100 0111 0111 xxxx xxxx */ @@ -2713,216 +2713,216 @@ static const struct dasm_s dasm64_7807[256] = {EQI,"PB,%b" }, /* 79: 0110 0100 0111 1001 xxxx xxxx */ {EQI,"PC,%b" }, /* 7a: 0110 0100 0111 1010 xxxx xxxx */ {EQI,"PD,%b" }, /* 7b: 0110 0100 0111 1011 xxxx xxxx */ - {illegal,0 }, /* 7c: 0110 0100 0111 1100 xxxx xxxx */ + {illegal,0 }, /* 7c: 0110 0100 0111 1100 xxxx xxxx */ {EQI,"PF,%b" }, /* 7d: 0110 0100 0111 1101 xxxx xxxx */ {EQI,"MKH,%b" }, /* 7e: 0110 0100 0111 1110 xxxx xxxx */ {EQI,"MKL,%b" }, /* 7f: 0110 0100 0111 1111 xxxx xxxx */ - {illegal,0 }, /* 80: 0110 0100 1000 0000 xxxx xxxx */ + {illegal,0 }, /* 80: 0110 0100 1000 0000 xxxx xxxx */ {MVI,"SMH,%b" }, /* 81: 0110 0100 1000 0001 xxxx xxxx */ - {illegal,0 }, /* 82: 0110 0100 1000 0010 xxxx xxxx */ + {illegal,0 }, /* 82: 0110 0100 1000 0010 xxxx xxxx */ {MVI,"EOM,%b" }, /* 83: 0110 0100 1000 0011 xxxx xxxx */ - {illegal,0 }, /* 84: 0110 0100 1000 0100 xxxx xxxx */ + {illegal,0 }, /* 84: 0110 0100 1000 0100 xxxx xxxx */ {MVI,"TMM,%b" }, /* 85: 0110 0100 1000 0101 xxxx xxxx */ - {illegal,0 }, /* 86: 0110 0100 1000 0110 xxxx xxxx */ - {illegal,0 }, /* 87: 0110 0100 1000 0111 xxxx xxxx */ - {illegal,0 }, /* 88: 0110 0100 1000 1000 xxxx xxxx */ + {illegal,0 }, /* 86: 0110 0100 1000 0110 xxxx xxxx */ + {illegal,0 }, /* 87: 0110 0100 1000 0111 xxxx xxxx */ + {illegal,0 }, /* 88: 0110 0100 1000 1000 xxxx xxxx */ {ANI,"SMH,%b" }, /* 89: 0110 0100 1000 1001 xxxx xxxx */ - {illegal,0 }, /* 8a: 0110 0100 1000 1010 xxxx xxxx */ + {illegal,0 }, /* 8a: 0110 0100 1000 1010 xxxx xxxx */ {ANI,"EOM,%b" }, /* 8b: 0110 0100 1000 1011 xxxx xxxx */ - {illegal,0 }, /* 8c: 0110 0100 1000 1100 xxxx xxxx */ + {illegal,0 }, /* 8c: 0110 0100 1000 1100 xxxx xxxx */ {ANI,"TMM,%b" }, /* 8d: 0110 0100 1000 1101 xxxx xxxx */ - {illegal,0 }, /* 8e: 0110 0100 1000 1110 xxxx xxxx */ - {illegal,0 }, /* 8f: 0110 0100 1000 1111 xxxx xxxx */ + {illegal,0 }, /* 8e: 0110 0100 1000 1110 xxxx xxxx */ + {illegal,0 }, /* 8f: 0110 0100 1000 1111 xxxx xxxx */ - {illegal,0 }, /* 90: 0110 0100 1001 0000 xxxx xxxx */ + {illegal,0 }, /* 90: 0110 0100 1001 0000 xxxx xxxx */ {XRI,"SMH,%b" }, /* 91: 0110 0100 1001 0001 xxxx xxxx */ - {illegal,0 }, /* 92: 0110 0100 1001 0010 xxxx xxxx */ + {illegal,0 }, /* 92: 0110 0100 1001 0010 xxxx xxxx */ {XRI,"EOM,%b" }, /* 93: 0110 0100 1001 0011 xxxx xxxx */ - {illegal,0 }, /* 94: 0110 0100 1001 0100 xxxx xxxx */ + {illegal,0 }, /* 94: 0110 0100 1001 0100 xxxx xxxx */ {XRI,"TMM,%b" }, /* 95: 0110 0100 1001 0101 xxxx xxxx */ - {illegal,0 }, /* 96: 0110 0100 1001 0110 xxxx xxxx */ - {illegal,0 }, /* 97: 0110 0100 1001 0111 xxxx xxxx */ - {illegal,0 }, /* 98: 0110 0100 1001 1000 xxxx xxxx */ + {illegal,0 }, /* 96: 0110 0100 1001 0110 xxxx xxxx */ + {illegal,0 }, /* 97: 0110 0100 1001 0111 xxxx xxxx */ + {illegal,0 }, /* 98: 0110 0100 1001 1000 xxxx xxxx */ {ORI,"SMH,%b" }, /* 99: 0110 0100 1001 1001 xxxx xxxx */ - {illegal,0 }, /* 9a: 0110 0100 1001 1010 xxxx xxxx */ + {illegal,0 }, /* 9a: 0110 0100 1001 1010 xxxx xxxx */ {ORI,"EOM,%b" }, /* 9b: 0110 0100 1001 1011 xxxx xxxx */ - {illegal,0 }, /* 9c: 0110 0100 1001 1100 xxxx xxxx */ + {illegal,0 }, /* 9c: 0110 0100 1001 1100 xxxx xxxx */ {ORI,"TMM,%b" }, /* 9d: 0110 0100 1001 1101 xxxx xxxx */ - {illegal,0 }, /* 9e: 0110 0100 1001 1110 xxxx xxxx */ - {illegal,0 }, /* 9f: 0110 0100 1001 1111 xxxx xxxx */ + {illegal,0 }, /* 9e: 0110 0100 1001 1110 xxxx xxxx */ + {illegal,0 }, /* 9f: 0110 0100 1001 1111 xxxx xxxx */ - {illegal,0 }, /* a0: 0110 0100 1010 0000 xxxx xxxx */ + {illegal,0 }, /* a0: 0110 0100 1010 0000 xxxx xxxx */ {ADINC,"SMH,%b" }, /* a1: 0110 0100 1010 0001 xxxx xxxx */ - {illegal,0 }, /* a2: 0110 0100 1010 0010 xxxx xxxx */ + {illegal,0 }, /* a2: 0110 0100 1010 0010 xxxx xxxx */ {ADINC,"EOM,%b" }, /* a3: 0110 0100 1010 0011 xxxx xxxx */ - {illegal,0 }, /* a4: 0110 0100 1010 0100 xxxx xxxx */ + {illegal,0 }, /* a4: 0110 0100 1010 0100 xxxx xxxx */ {ADINC,"TMM,%b" }, /* a5: 0110 0100 1010 0101 xxxx xxxx */ - {illegal,0 }, /* a6: 0110 0100 1010 0110 xxxx xxxx */ - {illegal,0 }, /* a7: 0110 0100 1010 0111 xxxx xxxx */ - {illegal,0 }, /* a8: 0110 0100 1010 1000 xxxx xxxx */ + {illegal,0 }, /* a6: 0110 0100 1010 0110 xxxx xxxx */ + {illegal,0 }, /* a7: 0110 0100 1010 0111 xxxx xxxx */ + {illegal,0 }, /* a8: 0110 0100 1010 1000 xxxx xxxx */ {GTI,"SMH,%b" }, /* a9: 0110 0100 1010 1001 xxxx xxxx */ - {illegal,0 }, /* aa: 0110 0100 1010 1010 xxxx xxxx */ + {illegal,0 }, /* aa: 0110 0100 1010 1010 xxxx xxxx */ {GTI,"EOM,%b" }, /* ab: 0110 0100 1010 1011 xxxx xxxx */ - {illegal,0 }, /* ac: 0110 0100 1010 1100 xxxx xxxx */ + {illegal,0 }, /* ac: 0110 0100 1010 1100 xxxx xxxx */ {GTI,"TMM,%b" }, /* ad: 0110 0100 1010 1101 xxxx xxxx */ {GTI,"PT,%b" }, /* ae: 0110 0100 1010 1110 xxxx xxxx */ - {illegal,0 }, /* af: 0110 0100 1010 1111 xxxx xxxx */ + {illegal,0 }, /* af: 0110 0100 1010 1111 xxxx xxxx */ - {illegal,0 }, /* b0: 0110 0100 1011 0000 xxxx xxxx */ + {illegal,0 }, /* b0: 0110 0100 1011 0000 xxxx xxxx */ {SUINB,"SMH,%b" }, /* b1: 0110 0100 1011 0001 xxxx xxxx */ - {illegal,0 }, /* b2: 0110 0100 1011 0010 xxxx xxxx */ + {illegal,0 }, /* b2: 0110 0100 1011 0010 xxxx xxxx */ {SUINB,"EOM,%b" }, /* b3: 0110 0100 1011 0011 xxxx xxxx */ - {illegal,0 }, /* b4: 0110 0100 1011 0100 xxxx xxxx */ + {illegal,0 }, /* b4: 0110 0100 1011 0100 xxxx xxxx */ {SUINB,"TMM,%b" }, /* b5: 0110 0100 1011 0101 xxxx xxxx */ - {illegal,0 }, /* b6: 0110 0100 1011 0110 xxxx xxxx */ - {illegal,0 }, /* b7: 0110 0100 1011 0111 xxxx xxxx */ - {illegal,0 }, /* b8: 0110 0100 1011 1000 xxxx xxxx */ + {illegal,0 }, /* b6: 0110 0100 1011 0110 xxxx xxxx */ + {illegal,0 }, /* b7: 0110 0100 1011 0111 xxxx xxxx */ + {illegal,0 }, /* b8: 0110 0100 1011 1000 xxxx xxxx */ {LTI,"SMH,%b" }, /* b9: 0110 0100 1011 1001 xxxx xxxx */ - {illegal,0 }, /* ba: 0110 0100 1011 1010 xxxx xxxx */ + {illegal,0 }, /* ba: 0110 0100 1011 1010 xxxx xxxx */ {LTI,"EOM,%b" }, /* bb: 0110 0100 1011 1011 xxxx xxxx */ - {illegal,0 }, /* bc: 0110 0100 1011 1100 xxxx xxxx */ + {illegal,0 }, /* bc: 0110 0100 1011 1100 xxxx xxxx */ {LTI,"TMM,%b" }, /* bd: 0110 0100 1011 1101 xxxx xxxx */ {LTI,"PT,%b" }, /* be: 0110 0100 1011 1110 xxxx xxxx */ - {illegal,0 }, /* bf: 0110 0100 1011 1111 xxxx xxxx */ + {illegal,0 }, /* bf: 0110 0100 1011 1111 xxxx xxxx */ - {illegal,0 }, /* c0: 0110 0100 1100 0000 xxxx xxxx */ + {illegal,0 }, /* c0: 0110 0100 1100 0000 xxxx xxxx */ {ADI,"SMH,%b" }, /* c1: 0110 0100 1100 0001 xxxx xxxx */ - {illegal,0 }, /* c2: 0110 0100 1100 0010 xxxx xxxx */ + {illegal,0 }, /* c2: 0110 0100 1100 0010 xxxx xxxx */ {ADI,"EOM,%b" }, /* c3: 0110 0100 1100 0011 xxxx xxxx */ - {illegal,0 }, /* c4: 0110 0100 1100 0100 xxxx xxxx */ + {illegal,0 }, /* c4: 0110 0100 1100 0100 xxxx xxxx */ {ADI,"TMM,%b" }, /* c5: 0110 0100 1100 0101 xxxx xxxx */ - {illegal,0 }, /* c6: 0110 0100 1100 0110 xxxx xxxx */ - {illegal,0 }, /* c7: 0110 0100 1100 0111 xxxx xxxx */ - {illegal,0 }, /* c8: 0110 0100 1100 1000 xxxx xxxx */ + {illegal,0 }, /* c6: 0110 0100 1100 0110 xxxx xxxx */ + {illegal,0 }, /* c7: 0110 0100 1100 0111 xxxx xxxx */ + {illegal,0 }, /* c8: 0110 0100 1100 1000 xxxx xxxx */ {ONI,"SMH,%b" }, /* c9: 0110 0100 1100 1001 xxxx xxxx */ - {illegal,0 }, /* ca: 0110 0100 1100 1010 xxxx xxxx */ + {illegal,0 }, /* ca: 0110 0100 1100 1010 xxxx xxxx */ {ONI,"EOM,%b" }, /* cb: 0110 0100 1100 1011 xxxx xxxx */ - {illegal,0 }, /* cc: 0110 0100 1100 1100 xxxx xxxx */ + {illegal,0 }, /* cc: 0110 0100 1100 1100 xxxx xxxx */ {ONI,"TMM,%b" }, /* cd: 0110 0100 1100 1101 xxxx xxxx */ {ONI,"PT,%b" }, /* ce: 0110 0100 1100 1110 xxxx xxxx */ - {illegal,0 }, /* cf: 0110 0100 1100 1111 xxxx xxxx */ + {illegal,0 }, /* cf: 0110 0100 1100 1111 xxxx xxxx */ - {illegal,0 }, /* d0: 0110 0100 1101 0000 xxxx xxxx */ + {illegal,0 }, /* d0: 0110 0100 1101 0000 xxxx xxxx */ {ACI,"SMH,%b" }, /* d1: 0110 0100 1101 0001 xxxx xxxx */ - {illegal,0 }, /* d2: 0110 0100 1101 0010 xxxx xxxx */ + {illegal,0 }, /* d2: 0110 0100 1101 0010 xxxx xxxx */ {ACI,"EOM,%b" }, /* d3: 0110 0100 1101 0011 xxxx xxxx */ - {illegal,0 }, /* d4: 0110 0100 1101 0100 xxxx xxxx */ + {illegal,0 }, /* d4: 0110 0100 1101 0100 xxxx xxxx */ {ACI,"TMM,%b" }, /* d5: 0110 0100 1101 0101 xxxx xxxx */ - {illegal,0 }, /* d6: 0110 0100 1101 0110 xxxx xxxx */ - {illegal,0 }, /* d7: 0110 0100 1101 0111 xxxx xxxx */ - {illegal,0 }, /* d8: 0110 0100 1101 1000 xxxx xxxx */ + {illegal,0 }, /* d6: 0110 0100 1101 0110 xxxx xxxx */ + {illegal,0 }, /* d7: 0110 0100 1101 0111 xxxx xxxx */ + {illegal,0 }, /* d8: 0110 0100 1101 1000 xxxx xxxx */ {OFFI,"SMH,%b" }, /* d9: 0110 0100 1101 1001 xxxx xxxx */ - {illegal,0 }, /* da: 0110 0100 1101 1010 xxxx xxxx */ + {illegal,0 }, /* da: 0110 0100 1101 1010 xxxx xxxx */ {OFFI,"EOM,%b" }, /* db: 0110 0100 1101 1011 xxxx xxxx */ - {illegal,0 }, /* dc: 0110 0100 1101 1100 xxxx xxxx */ + {illegal,0 }, /* dc: 0110 0100 1101 1100 xxxx xxxx */ {OFFI,"TMM,%b" }, /* dd: 0110 0100 1101 1101 xxxx xxxx */ {OFFI,"PT,%b" }, /* de: 0110 0100 1101 1110 xxxx xxxx */ - {illegal,0 }, /* df: 0110 0100 1101 1111 xxxx xxxx */ + {illegal,0 }, /* df: 0110 0100 1101 1111 xxxx xxxx */ - {illegal,0 }, /* e0: 0110 0100 1110 0000 xxxx xxxx */ + {illegal,0 }, /* e0: 0110 0100 1110 0000 xxxx xxxx */ {SUI,"SMH,%b" }, /* e1: 0110 0100 1110 0001 xxxx xxxx */ - {illegal,0 }, /* e2: 0110 0100 1110 0010 xxxx xxxx */ + {illegal,0 }, /* e2: 0110 0100 1110 0010 xxxx xxxx */ {SUI,"EOM,%b" }, /* e3: 0110 0100 1110 0011 xxxx xxxx */ - {illegal,0 }, /* e4: 0110 0100 1110 0100 xxxx xxxx */ + {illegal,0 }, /* e4: 0110 0100 1110 0100 xxxx xxxx */ {SUI,"TMM,%b" }, /* e5: 0110 0100 1110 0101 xxxx xxxx */ - {illegal,0 }, /* e6: 0110 0100 1110 0110 xxxx xxxx */ - {illegal,0 }, /* e7: 0110 0100 1110 0111 xxxx xxxx */ - {illegal,0 }, /* e8: 0110 0100 1110 1000 xxxx xxxx */ + {illegal,0 }, /* e6: 0110 0100 1110 0110 xxxx xxxx */ + {illegal,0 }, /* e7: 0110 0100 1110 0111 xxxx xxxx */ + {illegal,0 }, /* e8: 0110 0100 1110 1000 xxxx xxxx */ {NEI,"SMH,%b" }, /* e9: 0110 0100 1110 1001 xxxx xxxx */ - {illegal,0 }, /* ea: 0110 0100 1110 1010 xxxx xxxx */ + {illegal,0 }, /* ea: 0110 0100 1110 1010 xxxx xxxx */ {NEI,"EOM,%b" }, /* eb: 0110 0100 1110 1011 xxxx xxxx */ - {illegal,0 }, /* ec: 0110 0100 1110 1100 xxxx xxxx */ + {illegal,0 }, /* ec: 0110 0100 1110 1100 xxxx xxxx */ {NEI,"TMM,%b" }, /* ed: 0110 0100 1110 1101 xxxx xxxx */ {NEI,"PT,%b" }, /* ee: 0110 0100 1110 1110 xxxx xxxx */ - {illegal,0 }, /* ef: 0110 0100 1110 1111 xxxx xxxx */ + {illegal,0 }, /* ef: 0110 0100 1110 1111 xxxx xxxx */ - {illegal,0 }, /* f0: 0110 0100 1111 0000 xxxx xxxx */ + {illegal,0 }, /* f0: 0110 0100 1111 0000 xxxx xxxx */ {SBI,"SMH,%b" }, /* f1: 0110 0100 1111 0001 xxxx xxxx */ - {illegal,0 }, /* f2: 0110 0100 1111 0010 xxxx xxxx */ + {illegal,0 }, /* f2: 0110 0100 1111 0010 xxxx xxxx */ {SBI,"EOM,%b" }, /* f3: 0110 0100 1111 0011 xxxx xxxx */ - {illegal,0 }, /* f4: 0110 0100 1111 0100 xxxx xxxx */ + {illegal,0 }, /* f4: 0110 0100 1111 0100 xxxx xxxx */ {SBI,"TMM,%b" }, /* f5: 0110 0100 1111 0101 xxxx xxxx */ - {illegal,0 }, /* f6: 0110 0100 1111 0110 xxxx xxxx */ - {illegal,0 }, /* f7: 0110 0100 1111 0111 xxxx xxxx */ - {illegal,0 }, /* f8: 0110 0100 1111 1000 xxxx xxxx */ + {illegal,0 }, /* f6: 0110 0100 1111 0110 xxxx xxxx */ + {illegal,0 }, /* f7: 0110 0100 1111 0111 xxxx xxxx */ + {illegal,0 }, /* f8: 0110 0100 1111 1000 xxxx xxxx */ {EQI,"SMH,%b" }, /* f9: 0110 0100 1111 1001 xxxx xxxx */ - {illegal,0 }, /* fa: 0110 0100 1111 1010 xxxx xxxx */ + {illegal,0 }, /* fa: 0110 0100 1111 1010 xxxx xxxx */ {EQI,"EOM,%b" }, /* fb: 0110 0100 1111 1011 xxxx xxxx */ - {illegal,0 }, /* fc: 0110 0100 1111 1100 xxxx xxxx */ + {illegal,0 }, /* fc: 0110 0100 1111 1100 xxxx xxxx */ {EQI,"TMM,%b" }, /* fd: 0110 0100 1111 1101 xxxx xxxx */ {EQI,"PT,%b" }, /* fe: 0110 0100 1111 1110 xxxx xxxx */ - {illegal,0 } /* ff: 0110 0100 1111 1111 xxxx xxxx */ + {illegal,0 } /* ff: 0110 0100 1111 1111 xxxx xxxx */ }; /* prefix 70 */ static const struct dasm_s dasm70[256] = { - {illegal,0 }, /* 00: 0111 0000 0000 0000 */ - {illegal,0 }, /* 01: 0111 0000 0000 0001 */ - {illegal,0 }, /* 02: 0111 0000 0000 0010 */ - {illegal,0 }, /* 03: 0111 0000 0000 0011 */ - {illegal,0 }, /* 04: 0111 0000 0000 0100 */ - {illegal,0 }, /* 05: 0111 0000 0000 0101 */ - {illegal,0 }, /* 06: 0111 0000 0000 0110 */ - {illegal,0 }, /* 07: 0111 0000 0000 0111 */ - {illegal,0 }, /* 08: 0111 0000 0000 1000 */ - {illegal,0 }, /* 09: 0111 0000 0000 1001 */ - {illegal,0 }, /* 0a: 0111 0000 0000 1010 */ - {illegal,0 }, /* 0b: 0111 0000 0000 1011 */ - {illegal,0 }, /* 0c: 0111 0000 0000 1100 */ - {illegal,0 }, /* 0d: 0111 0000 0000 1101 */ + {illegal,0 }, /* 00: 0111 0000 0000 0000 */ + {illegal,0 }, /* 01: 0111 0000 0000 0001 */ + {illegal,0 }, /* 02: 0111 0000 0000 0010 */ + {illegal,0 }, /* 03: 0111 0000 0000 0011 */ + {illegal,0 }, /* 04: 0111 0000 0000 0100 */ + {illegal,0 }, /* 05: 0111 0000 0000 0101 */ + {illegal,0 }, /* 06: 0111 0000 0000 0110 */ + {illegal,0 }, /* 07: 0111 0000 0000 0111 */ + {illegal,0 }, /* 08: 0111 0000 0000 1000 */ + {illegal,0 }, /* 09: 0111 0000 0000 1001 */ + {illegal,0 }, /* 0a: 0111 0000 0000 1010 */ + {illegal,0 }, /* 0b: 0111 0000 0000 1011 */ + {illegal,0 }, /* 0c: 0111 0000 0000 1100 */ + {illegal,0 }, /* 0d: 0111 0000 0000 1101 */ {SSPD,"%w" }, /* 0e: 0111 0000 0000 1110 llll llll hhhh hhhh */ {LSPD,"%w" }, /* 0f: 0111 0000 0000 1111 llll llll hhhh hhhh */ - {illegal,0 }, /* 10: 0111 0000 0001 0000 */ - {illegal,0 }, /* 11: 0111 0000 0001 0001 */ - {illegal,0 }, /* 12: 0111 0000 0001 0010 */ - {illegal,0 }, /* 13: 0111 0000 0001 0011 */ - {illegal,0 }, /* 14: 0111 0000 0001 0100 */ - {illegal,0 }, /* 15: 0111 0000 0001 0101 */ - {illegal,0 }, /* 16: 0111 0000 0001 0110 */ - {illegal,0 }, /* 17: 0111 0000 0001 0111 */ - {illegal,0 }, /* 18: 0111 0000 0001 1000 */ - {illegal,0 }, /* 19: 0111 0000 0001 1001 */ - {illegal,0 }, /* 1a: 0111 0000 0001 1010 */ - {illegal,0 }, /* 1b: 0111 0000 0001 1011 */ - {illegal,0 }, /* 1c: 0111 0000 0001 1100 */ - {illegal,0 }, /* 1d: 0111 0000 0001 1101 */ + {illegal,0 }, /* 10: 0111 0000 0001 0000 */ + {illegal,0 }, /* 11: 0111 0000 0001 0001 */ + {illegal,0 }, /* 12: 0111 0000 0001 0010 */ + {illegal,0 }, /* 13: 0111 0000 0001 0011 */ + {illegal,0 }, /* 14: 0111 0000 0001 0100 */ + {illegal,0 }, /* 15: 0111 0000 0001 0101 */ + {illegal,0 }, /* 16: 0111 0000 0001 0110 */ + {illegal,0 }, /* 17: 0111 0000 0001 0111 */ + {illegal,0 }, /* 18: 0111 0000 0001 1000 */ + {illegal,0 }, /* 19: 0111 0000 0001 1001 */ + {illegal,0 }, /* 1a: 0111 0000 0001 1010 */ + {illegal,0 }, /* 1b: 0111 0000 0001 1011 */ + {illegal,0 }, /* 1c: 0111 0000 0001 1100 */ + {illegal,0 }, /* 1d: 0111 0000 0001 1101 */ {SBCD,"%w" }, /* 1e: 0111 0000 0001 1110 llll llll hhhh hhhh */ {LBCD,"%w" }, /* 1f: 0111 0000 0001 1111 llll llll hhhh hhhh */ - {illegal,0 }, /* 20: 0111 0000 0010 0000 */ - {illegal,0 }, /* 21: 0111 0000 0010 0001 */ - {illegal,0 }, /* 22: 0111 0000 0010 0010 */ - {illegal,0 }, /* 23: 0111 0000 0010 0011 */ - {illegal,0 }, /* 24: 0111 0000 0010 0100 */ - {illegal,0 }, /* 25: 0111 0000 0010 0101 */ - {illegal,0 }, /* 26: 0111 0000 0010 0110 */ - {illegal,0 }, /* 27: 0111 0000 0010 0111 */ - {illegal,0 }, /* 28: 0111 0000 0010 1000 */ - {illegal,0 }, /* 29: 0111 0000 0010 1001 */ - {illegal,0 }, /* 2a: 0111 0000 0010 1010 */ - {illegal,0 }, /* 2b: 0111 0000 0010 1011 */ - {illegal,0 }, /* 2c: 0111 0000 0010 1100 */ - {illegal,0 }, /* 2d: 0111 0000 0010 1101 */ + {illegal,0 }, /* 20: 0111 0000 0010 0000 */ + {illegal,0 }, /* 21: 0111 0000 0010 0001 */ + {illegal,0 }, /* 22: 0111 0000 0010 0010 */ + {illegal,0 }, /* 23: 0111 0000 0010 0011 */ + {illegal,0 }, /* 24: 0111 0000 0010 0100 */ + {illegal,0 }, /* 25: 0111 0000 0010 0101 */ + {illegal,0 }, /* 26: 0111 0000 0010 0110 */ + {illegal,0 }, /* 27: 0111 0000 0010 0111 */ + {illegal,0 }, /* 28: 0111 0000 0010 1000 */ + {illegal,0 }, /* 29: 0111 0000 0010 1001 */ + {illegal,0 }, /* 2a: 0111 0000 0010 1010 */ + {illegal,0 }, /* 2b: 0111 0000 0010 1011 */ + {illegal,0 }, /* 2c: 0111 0000 0010 1100 */ + {illegal,0 }, /* 2d: 0111 0000 0010 1101 */ {SDED,"%w" }, /* 2e: 0111 0000 0010 1110 llll llll hhhh hhhh */ {LDED,"%w" }, /* 2f: 0111 0000 0010 1111 llll llll hhhh hhhh */ - {illegal,0 }, /* 30: 0111 0000 0011 0000 */ - {illegal,0 }, /* 31: 0111 0000 0011 0001 */ - {illegal,0 }, /* 32: 0111 0000 0011 0010 */ - {illegal,0 }, /* 33: 0111 0000 0011 0011 */ - {illegal,0 }, /* 34: 0111 0000 0011 0100 */ - {illegal,0 }, /* 35: 0111 0000 0011 0101 */ - {illegal,0 }, /* 36: 0111 0000 0011 0110 */ - {illegal,0 }, /* 37: 0111 0000 0011 0111 */ - {illegal,0 }, /* 38: 0111 0000 0011 1000 */ - {illegal,0 }, /* 39: 0111 0000 0011 1001 */ - {illegal,0 }, /* 3a: 0111 0000 0011 1010 */ - {illegal,0 }, /* 3b: 0111 0000 0011 1011 */ - {illegal,0 }, /* 3c: 0111 0000 0011 1100 */ - {illegal,0 }, /* 3d: 0111 0000 0011 1101 */ + {illegal,0 }, /* 30: 0111 0000 0011 0000 */ + {illegal,0 }, /* 31: 0111 0000 0011 0001 */ + {illegal,0 }, /* 32: 0111 0000 0011 0010 */ + {illegal,0 }, /* 33: 0111 0000 0011 0011 */ + {illegal,0 }, /* 34: 0111 0000 0011 0100 */ + {illegal,0 }, /* 35: 0111 0000 0011 0101 */ + {illegal,0 }, /* 36: 0111 0000 0011 0110 */ + {illegal,0 }, /* 37: 0111 0000 0011 0111 */ + {illegal,0 }, /* 38: 0111 0000 0011 1000 */ + {illegal,0 }, /* 39: 0111 0000 0011 1001 */ + {illegal,0 }, /* 3a: 0111 0000 0011 1010 */ + {illegal,0 }, /* 3b: 0111 0000 0011 1011 */ + {illegal,0 }, /* 3c: 0111 0000 0011 1100 */ + {illegal,0 }, /* 3d: 0111 0000 0011 1101 */ {SHLD,"%w" }, /* 3e: 0111 0000 0011 1110 llll llll hhhh hhhh */ {LHLD,"%w" }, /* 3f: 0111 0000 0011 1111 llll llll hhhh hhhh */ @@ -2930,44 +2930,44 @@ static const struct dasm_s dasm70[256] = {EADD,"EA,A" }, /* 41: 0111 0000 0100 0001 */ {EADD,"EA,B" }, /* 42: 0111 0000 0100 0010 */ {EADD,"EA,C" }, /* 43: 0111 0000 0100 0011 */ - {illegal,0 }, /* 44: 0111 0000 0100 0100 */ - {illegal,0 }, /* 45: 0111 0000 0100 0101 */ - {illegal,0 }, /* 46: 0111 0000 0100 0110 */ - {illegal,0 }, /* 47: 0111 0000 0100 0111 */ - {illegal,0 }, /* 48: 0111 0000 0100 1000 */ - {illegal,0 }, /* 49: 0111 0000 0100 1001 */ - {illegal,0 }, /* 4a: 0111 0000 0100 1010 */ - {illegal,0 }, /* 4b: 0111 0000 0100 1011 */ - {illegal,0 }, /* 4c: 0111 0000 0100 1100 */ - {illegal,0 }, /* 4d: 0111 0000 0100 1101 */ - {illegal,0 }, /* 4e: 0111 0000 0100 1110 */ - {illegal,0 }, /* 4f: 0111 0000 0100 1111 */ - - {illegal,0 }, /* 50: 0111 0000 0101 0000 */ - {illegal,0 }, /* 51: 0111 0000 0101 0001 */ - {illegal,0 }, /* 52: 0111 0000 0101 0010 */ - {illegal,0 }, /* 53: 0111 0000 0101 0011 */ - {illegal,0 }, /* 54: 0111 0000 0101 0100 */ - {illegal,0 }, /* 55: 0111 0000 0101 0101 */ - {illegal,0 }, /* 56: 0111 0000 0101 0110 */ - {illegal,0 }, /* 57: 0111 0000 0101 0111 */ - {illegal,0 }, /* 58: 0111 0000 0101 1000 */ - {illegal,0 }, /* 59: 0111 0000 0101 1001 */ - {illegal,0 }, /* 5a: 0111 0000 0101 1010 */ - {illegal,0 }, /* 5b: 0111 0000 0101 1011 */ - {illegal,0 }, /* 5c: 0111 0000 0101 1100 */ - {illegal,0 }, /* 5d: 0111 0000 0101 1101 */ - {illegal,0 }, /* 5e: 0111 0000 0101 1110 */ - {illegal,0 }, /* 5f: 0111 0000 0101 1111 */ + {illegal,0 }, /* 44: 0111 0000 0100 0100 */ + {illegal,0 }, /* 45: 0111 0000 0100 0101 */ + {illegal,0 }, /* 46: 0111 0000 0100 0110 */ + {illegal,0 }, /* 47: 0111 0000 0100 0111 */ + {illegal,0 }, /* 48: 0111 0000 0100 1000 */ + {illegal,0 }, /* 49: 0111 0000 0100 1001 */ + {illegal,0 }, /* 4a: 0111 0000 0100 1010 */ + {illegal,0 }, /* 4b: 0111 0000 0100 1011 */ + {illegal,0 }, /* 4c: 0111 0000 0100 1100 */ + {illegal,0 }, /* 4d: 0111 0000 0100 1101 */ + {illegal,0 }, /* 4e: 0111 0000 0100 1110 */ + {illegal,0 }, /* 4f: 0111 0000 0100 1111 */ + + {illegal,0 }, /* 50: 0111 0000 0101 0000 */ + {illegal,0 }, /* 51: 0111 0000 0101 0001 */ + {illegal,0 }, /* 52: 0111 0000 0101 0010 */ + {illegal,0 }, /* 53: 0111 0000 0101 0011 */ + {illegal,0 }, /* 54: 0111 0000 0101 0100 */ + {illegal,0 }, /* 55: 0111 0000 0101 0101 */ + {illegal,0 }, /* 56: 0111 0000 0101 0110 */ + {illegal,0 }, /* 57: 0111 0000 0101 0111 */ + {illegal,0 }, /* 58: 0111 0000 0101 1000 */ + {illegal,0 }, /* 59: 0111 0000 0101 1001 */ + {illegal,0 }, /* 5a: 0111 0000 0101 1010 */ + {illegal,0 }, /* 5b: 0111 0000 0101 1011 */ + {illegal,0 }, /* 5c: 0111 0000 0101 1100 */ + {illegal,0 }, /* 5d: 0111 0000 0101 1101 */ + {illegal,0 }, /* 5e: 0111 0000 0101 1110 */ + {illegal,0 }, /* 5f: 0111 0000 0101 1111 */ {ESUB,"EA,V" }, /* 60: 0111 0000 0110 0000 */ {ESUB,"EA,A" }, /* 61: 0111 0000 0110 0001 */ {ESUB,"EA,B" }, /* 62: 0111 0000 0110 0010 */ {ESUB,"EA,C" }, /* 63: 0111 0000 0110 0011 */ - {illegal,0 }, /* 64: 0111 0000 0110 0100 */ - {illegal,0 }, /* 65: 0111 0000 0110 0101 */ - {illegal,0 }, /* 66: 0111 0000 0110 0110 */ - {illegal,0 }, /* 67: 0111 0000 0110 0111 */ + {illegal,0 }, /* 64: 0111 0000 0110 0100 */ + {illegal,0 }, /* 65: 0111 0000 0110 0101 */ + {illegal,0 }, /* 66: 0111 0000 0110 0110 */ + {illegal,0 }, /* 67: 0111 0000 0110 0111 */ {MOV,"V,(%w)" }, /* 68: 0111 0000 0110 1000 llll llll hhhh hhhh */ {MOV,"A,(%w)" }, /* 69: 0111 0000 0110 1001 llll llll hhhh hhhh */ {MOV,"B,(%w)" }, /* 6a: 0111 0000 0110 1010 llll llll hhhh hhhh */ @@ -2977,14 +2977,14 @@ static const struct dasm_s dasm70[256] = {MOV,"H,(%w)" }, /* 6e: 0111 0000 0110 1110 llll llll hhhh hhhh */ {MOV,"L,(%w)" }, /* 6f: 0111 0000 0110 1111 llll llll hhhh hhhh */ - {illegal,0 }, /* 70: 0111 0000 0111 0000 */ - {illegal,0 }, /* 71: 0111 0000 0111 0001 */ - {illegal,0 }, /* 72: 0111 0000 0111 0010 */ - {illegal,0 }, /* 73: 0111 0000 0111 0011 */ - {illegal,0 }, /* 74: 0111 0000 0111 0100 */ - {illegal,0 }, /* 75: 0111 0000 0111 0101 */ - {illegal,0 }, /* 76: 0111 0000 0111 0110 */ - {illegal,0 }, /* 77: 0111 0000 0111 0111 */ + {illegal,0 }, /* 70: 0111 0000 0111 0000 */ + {illegal,0 }, /* 71: 0111 0000 0111 0001 */ + {illegal,0 }, /* 72: 0111 0000 0111 0010 */ + {illegal,0 }, /* 73: 0111 0000 0111 0011 */ + {illegal,0 }, /* 74: 0111 0000 0111 0100 */ + {illegal,0 }, /* 75: 0111 0000 0111 0101 */ + {illegal,0 }, /* 76: 0111 0000 0111 0110 */ + {illegal,0 }, /* 77: 0111 0000 0111 0111 */ {MOV,"(%w),V" }, /* 78: 0111 0000 0111 1000 llll llll hhhh hhhh */ {MOV,"(%w),A" }, /* 79: 0111 0000 0111 1001 llll llll hhhh hhhh */ {MOV,"(%w),B" }, /* 7a: 0111 0000 0111 1010 llll llll hhhh hhhh */ @@ -2994,15 +2994,15 @@ static const struct dasm_s dasm70[256] = {MOV,"(%w),H" }, /* 7e: 0111 0000 0111 1110 llll llll hhhh hhhh */ {MOV,"(%w),L" }, /* 7f: 0111 0000 0111 1111 llll llll hhhh hhhh */ - {illegal,0 }, /* 80: 0111 0000 1000 0000 */ - {illegal,0 }, /* 81: 0111 0000 1000 0001 */ - {illegal,0 }, /* 82: 0111 0000 1000 0010 */ - {illegal,0 }, /* 83: 0111 0000 1000 0011 */ - {illegal,0 }, /* 84: 0111 0000 1000 0100 */ - {illegal,0 }, /* 85: 0111 0000 1000 0101 */ - {illegal,0 }, /* 86: 0111 0000 1000 0110 */ - {illegal,0 }, /* 87: 0111 0000 1000 0111 */ - {illegal,0 }, /* 88: 0111 0000 1000 1000 */ + {illegal,0 }, /* 80: 0111 0000 1000 0000 */ + {illegal,0 }, /* 81: 0111 0000 1000 0001 */ + {illegal,0 }, /* 82: 0111 0000 1000 0010 */ + {illegal,0 }, /* 83: 0111 0000 1000 0011 */ + {illegal,0 }, /* 84: 0111 0000 1000 0100 */ + {illegal,0 }, /* 85: 0111 0000 1000 0101 */ + {illegal,0 }, /* 86: 0111 0000 1000 0110 */ + {illegal,0 }, /* 87: 0111 0000 1000 0111 */ + {illegal,0 }, /* 88: 0111 0000 1000 1000 */ {ANAX,"(BC)" }, /* 89: 0111 0000 1000 1001 */ {ANAX,"(DE)" }, /* 8a: 0111 0000 1000 1010 */ {ANAX,"(HL)" }, /* 8b: 0111 0000 1000 1011 */ @@ -3011,7 +3011,7 @@ static const struct dasm_s dasm70[256] = {ANAX,"(DE-)" }, /* 8e: 0111 0000 1000 1110 */ {ANAX,"(HL-)" }, /* 8f: 0111 0000 1000 1111 */ - {illegal,0 }, /* 90: 0111 0000 1001 0000 */ + {illegal,0 }, /* 90: 0111 0000 1001 0000 */ {XRAX,"(BC)" }, /* 91: 0111 0000 1001 0001 */ {XRAX,"(DE)" }, /* 92: 0111 0000 1001 0010 */ {XRAX,"(HL)" }, /* 93: 0111 0000 1001 0011 */ @@ -3019,16 +3019,16 @@ static const struct dasm_s dasm70[256] = {XRAX,"(HL+)" }, /* 95: 0111 0000 1001 0101 */ {XRAX,"(DE-)" }, /* 96: 0111 0000 1001 0110 */ {XRAX,"(HL-)" }, /* 97: 0111 0000 1001 0111 */ - {illegal,0 }, /* 98: 0111 0000 1001 1000 */ - {ORAX,"(BC)" }, /* 99: 0111 0000 1001 1001 */ - {ORAX,"(DE)" }, /* 9a: 0111 0000 1001 1010 */ - {ORAX,"(HL)" }, /* 9b: 0111 0000 1001 1011 */ - {ORAX,"(DE+)" }, /* 9c: 0111 0000 1001 1100 */ - {ORAX,"(HL+)" }, /* 9d: 0111 0000 1001 1101 */ - {ORAX,"(DE-)" }, /* 9e: 0111 0000 1001 1110 */ - {ORAX,"(HL-)" }, /* 9f: 0111 0000 1001 1111 */ - - {illegal,0 }, /* a0: 0111 0000 1010 0000 */ + {illegal,0 }, /* 98: 0111 0000 1001 1000 */ + {ORAX,"(BC)" }, /* 99: 0111 0000 1001 1001 */ + {ORAX,"(DE)" }, /* 9a: 0111 0000 1001 1010 */ + {ORAX,"(HL)" }, /* 9b: 0111 0000 1001 1011 */ + {ORAX,"(DE+)" }, /* 9c: 0111 0000 1001 1100 */ + {ORAX,"(HL+)" }, /* 9d: 0111 0000 1001 1101 */ + {ORAX,"(DE-)" }, /* 9e: 0111 0000 1001 1110 */ + {ORAX,"(HL-)" }, /* 9f: 0111 0000 1001 1111 */ + + {illegal,0 }, /* a0: 0111 0000 1010 0000 */ {ADDNCX,"(BC)" }, /* a1: 0111 0000 1010 0001 */ {ADDNCX,"(DE)" }, /* a2: 0111 0000 1010 0010 */ {ADDNCX,"(HL)" }, /* a3: 0111 0000 1010 0011 */ @@ -3036,7 +3036,7 @@ static const struct dasm_s dasm70[256] = {ADDNCX,"(HL+)" }, /* a5: 0111 0000 1010 0101 */ {ADDNCX,"(DE-)" }, /* a6: 0111 0000 1010 0110 */ {ADDNCX,"(HL-)" }, /* a7: 0111 0000 1010 0111 */ - {illegal,0 }, /* a8: 0111 0000 1010 1000 */ + {illegal,0 }, /* a8: 0111 0000 1010 1000 */ {GTAX,"(BC)" }, /* a9: 0111 0000 1010 1001 */ {GTAX,"(DE)" }, /* aa: 0111 0000 1010 1010 */ {GTAX,"(HL)" }, /* ab: 0111 0000 1010 1011 */ @@ -3045,7 +3045,7 @@ static const struct dasm_s dasm70[256] = {GTAX,"(DE-)" }, /* ae: 0111 0000 1010 1110 */ {GTAX,"(HL-)" }, /* af: 0111 0000 1010 1111 */ - {illegal,0 }, /* b0: 0111 0000 1011 0000 */ + {illegal,0 }, /* b0: 0111 0000 1011 0000 */ {SUBNBX,"(BC)" }, /* b1: 0111 0000 1011 0001 */ {SUBNBX,"(DE)" }, /* b2: 0111 0000 1011 0010 */ {SUBNBX,"(HL)" }, /* b3: 0111 0000 1011 0011 */ @@ -3053,7 +3053,7 @@ static const struct dasm_s dasm70[256] = {SUBNBX,"(HL+)" }, /* b5: 0111 0000 1011 0101 */ {SUBNBX,"(DE-)" }, /* b6: 0111 0000 1011 0110 */ {SUBNBX,"(HL-)" }, /* b7: 0111 0000 1011 0111 */ - {illegal,0 }, /* b8: 0111 0000 1011 1000 */ + {illegal,0 }, /* b8: 0111 0000 1011 1000 */ {LTAX,"(BC)" }, /* b9: 0111 0000 1011 1001 */ {LTAX,"(DE)" }, /* ba: 0111 0000 1011 1010 */ {LTAX,"(HL)" }, /* bb: 0111 0000 1011 1011 */ @@ -3062,7 +3062,7 @@ static const struct dasm_s dasm70[256] = {LTAX,"(DE-)" }, /* be: 0111 0000 1011 1110 */ {LTAX,"(HL-)" }, /* bf: 0111 0000 1011 1111 */ - {illegal,0 }, /* c0: 0111 0000 1100 0000 */ + {illegal,0 }, /* c0: 0111 0000 1100 0000 */ {ADDX,"(BC)" }, /* c1: 0111 0000 1100 0001 */ {ADDX,"(DE)" }, /* c2: 0111 0000 1100 0010 */ {ADDX,"(HL)" }, /* c3: 0111 0000 1100 0011 */ @@ -3070,7 +3070,7 @@ static const struct dasm_s dasm70[256] = {ADDX,"(HL+)" }, /* c5: 0111 0000 1100 0101 */ {ADDX,"(DE-)" }, /* c6: 0111 0000 1100 0110 */ {ADDX,"(HL-)" }, /* c7: 0111 0000 1100 0111 */ - {illegal,0 }, /* c8: 0111 0000 1100 1000 */ + {illegal,0 }, /* c8: 0111 0000 1100 1000 */ {ONAX,"(BC)" }, /* c9: 0111 0000 1100 1001 */ {ONAX,"(DE)" }, /* ca: 0111 0000 1100 1010 */ {ONAX,"(HL)" }, /* cb: 0111 0000 1100 1011 */ @@ -3079,7 +3079,7 @@ static const struct dasm_s dasm70[256] = {ONAX,"(DE-)" }, /* ce: 0111 0000 1100 1110 */ {ONAX,"(HL-)" }, /* cf: 0111 0000 1100 1111 */ - {illegal,0 }, /* d0: 0111 0000 1101 0000 */ + {illegal,0 }, /* d0: 0111 0000 1101 0000 */ {ADCX,"(BC)" }, /* d1: 0111 0000 1101 0001 */ {ADCX,"(DE)" }, /* d2: 0111 0000 1101 0010 */ {ADCX,"(HL)" }, /* d3: 0111 0000 1101 0011 */ @@ -3087,7 +3087,7 @@ static const struct dasm_s dasm70[256] = {ADCX,"(HL+)" }, /* d5: 0111 0000 1101 0101 */ {ADCX,"(DE-)" }, /* d6: 0111 0000 1101 0110 */ {ADCX,"(HL-)" }, /* d7: 0111 0000 1101 0111 */ - {illegal,0 }, /* d8: 0111 0000 1101 1000 */ + {illegal,0 }, /* d8: 0111 0000 1101 1000 */ {OFFAX,"(BC)" }, /* d9: 0111 0000 1101 1001 */ {OFFAX,"(DE)" }, /* da: 0111 0000 1101 1010 */ {OFFAX,"(HL)" }, /* db: 0111 0000 1101 1011 */ @@ -3096,7 +3096,7 @@ static const struct dasm_s dasm70[256] = {OFFAX,"(DE-)" }, /* de: 0111 0000 1101 1110 */ {OFFAX,"(HL-)" }, /* df: 0111 0000 1101 1111 */ - {illegal,0 }, /* e0: 0111 0000 1110 0000 */ + {illegal,0 }, /* e0: 0111 0000 1110 0000 */ {SUBX,"(BC)" }, /* e1: 0111 0000 1110 0001 */ {SUBX,"(DE)" }, /* e2: 0111 0000 1110 0010 */ {SUBX,"(HL)" }, /* e3: 0111 0000 1110 0011 */ @@ -3104,7 +3104,7 @@ static const struct dasm_s dasm70[256] = {SUBX,"(HL+)" }, /* e5: 0111 0000 1110 0101 */ {SUBX,"(DE-)" }, /* e6: 0111 0000 1110 0110 */ {SUBX,"(HL-)" }, /* e7: 0111 0000 1110 0111 */ - {illegal,0 }, /* e8: 0111 0000 1110 1000 */ + {illegal,0 }, /* e8: 0111 0000 1110 1000 */ {NEAX,"(BC)" }, /* e9: 0111 0000 1110 1001 */ {NEAX,"(DE)" }, /* ea: 0111 0000 1110 1010 */ {NEAX,"(HL)" }, /* eb: 0111 0000 1110 1011 */ @@ -3113,7 +3113,7 @@ static const struct dasm_s dasm70[256] = {NEAX,"(DE-)" }, /* ee: 0111 0000 1110 1110 */ {NEAX,"(HL-)" }, /* ef: 0111 0000 1110 1111 */ - {illegal,0 }, /* f0: 0111 0000 1111 0000 */ + {illegal,0 }, /* f0: 0111 0000 1111 0000 */ {SBBX,"(BC)" }, /* f1: 0111 0000 1111 0001 */ {SBBX,"(DE)" }, /* f2: 0111 0000 1111 0010 */ {SBBX,"(HL)" }, /* f3: 0111 0000 1111 0011 */ @@ -3121,7 +3121,7 @@ static const struct dasm_s dasm70[256] = {SBBX,"(HL+)" }, /* f5: 0111 0000 1111 0101 */ {SBBX,"(DE-)" }, /* f6: 0111 0000 1111 0110 */ {SBBX,"(HL-)" }, /* f7: 0111 0000 1111 0111 */ - {illegal,0 }, /* f8: 0111 0000 1111 1000 */ + {illegal,0 }, /* f8: 0111 0000 1111 1000 */ {EQAX,"(BC)" }, /* f9: 0111 0000 1111 1001 */ {EQAX,"(DE)" }, /* fa: 0111 0000 1111 1010 */ {EQAX,"(HL)" }, /* fb: 0111 0000 1111 1011 */ @@ -3134,14 +3134,14 @@ static const struct dasm_s dasm70[256] = /* prefix 74 */ static const struct dasm_s dasm74[256] = { - {illegal,0 }, /* 00: 0111 0100 0000 0000 */ - {illegal,0 }, /* 01: 0111 0100 0000 0001 */ - {illegal,0 }, /* 02: 0111 0100 0000 0010 */ - {illegal,0 }, /* 03: 0111 0100 0000 0011 */ - {illegal,0 }, /* 04: 0111 0100 0000 0100 */ - {illegal,0 }, /* 05: 0111 0100 0000 0101 */ - {illegal,0 }, /* 06: 0111 0100 0000 0110 */ - {illegal,0 }, /* 07: 0111 0100 0000 0111 */ + {illegal,0 }, /* 00: 0111 0100 0000 0000 */ + {illegal,0 }, /* 01: 0111 0100 0000 0001 */ + {illegal,0 }, /* 02: 0111 0100 0000 0010 */ + {illegal,0 }, /* 03: 0111 0100 0000 0011 */ + {illegal,0 }, /* 04: 0111 0100 0000 0100 */ + {illegal,0 }, /* 05: 0111 0100 0000 0101 */ + {illegal,0 }, /* 06: 0111 0100 0000 0110 */ + {illegal,0 }, /* 07: 0111 0100 0000 0111 */ {ANI,"V,%b" }, /* 08: 0111 0100 0000 1000 xxxx xxxx */ {ANI,"A,%b" }, /* 09: 0111 0100 0000 1001 xxxx xxxx */ {ANI,"B,%b" }, /* 0a: 0111 0100 0000 1010 xxxx xxxx */ @@ -3270,138 +3270,138 @@ static const struct dasm_s dasm74[256] = {EQI,"H,%b" }, /* 7e: 0111 0100 0111 1110 xxxx xxxx */ {EQI,"L,%b" }, /* 7f: 0111 0100 0111 1111 xxxx xxxx */ - {illegal,0 }, /* 80: 0111 0100 1000 0000 */ - {illegal,0 }, /* 81: 0111 0100 1000 0001 */ - {illegal,0 }, /* 82: 0111 0100 1000 0010 */ - {illegal,0 }, /* 83: 0111 0100 1000 0011 */ - {illegal,0 }, /* 84: 0111 0100 1000 0100 */ - {illegal,0 }, /* 85: 0111 0100 1000 0101 */ - {illegal,0 }, /* 86: 0111 0100 1000 0110 */ - {illegal,0 }, /* 87: 0111 0100 1000 0111 */ + {illegal,0 }, /* 80: 0111 0100 1000 0000 */ + {illegal,0 }, /* 81: 0111 0100 1000 0001 */ + {illegal,0 }, /* 82: 0111 0100 1000 0010 */ + {illegal,0 }, /* 83: 0111 0100 1000 0011 */ + {illegal,0 }, /* 84: 0111 0100 1000 0100 */ + {illegal,0 }, /* 85: 0111 0100 1000 0101 */ + {illegal,0 }, /* 86: 0111 0100 1000 0110 */ + {illegal,0 }, /* 87: 0111 0100 1000 0111 */ {ANAW,"%a" }, /* 88: 0111 0100 1000 1000 oooo oooo */ - {illegal,0 }, /* 89: 0111 0100 1000 1001 */ - {illegal,0 }, /* 8a: 0111 0100 1000 1010 */ - {illegal,0 }, /* 8b: 0111 0100 1000 1011 */ - {illegal,0 }, /* 8c: 0111 0100 1000 1100 */ + {illegal,0 }, /* 89: 0111 0100 1000 1001 */ + {illegal,0 }, /* 8a: 0111 0100 1000 1010 */ + {illegal,0 }, /* 8b: 0111 0100 1000 1011 */ + {illegal,0 }, /* 8c: 0111 0100 1000 1100 */ {DAN,"EA,BC" }, /* 8d: 0111 0100 1000 1101 */ {DAN,"EA,DE" }, /* 8e: 0111 0100 1000 1110 */ {DAN,"EA,HL" }, /* 8f: 0111 0100 1000 1111 */ {XRAW,"%a" }, /* 90: 0111 0100 1001 0000 oooo oooo */ - {illegal,0 }, /* 91: 0111 0100 1001 0001 */ - {illegal,0 }, /* 92: 0111 0100 1001 0010 */ - {illegal,0 }, /* 93: 0111 0100 1001 0011 */ - {illegal,0 }, /* 94: 0111 0100 1001 0100 */ + {illegal,0 }, /* 91: 0111 0100 1001 0001 */ + {illegal,0 }, /* 92: 0111 0100 1001 0010 */ + {illegal,0 }, /* 93: 0111 0100 1001 0011 */ + {illegal,0 }, /* 94: 0111 0100 1001 0100 */ {DXR,"EA,BC" }, /* 95: 0111 0100 1001 0101 */ {DXR,"EA,DE" }, /* 96: 0111 0100 1001 0110 */ {DXR,"EA,HL" }, /* 97: 0111 0100 1001 0111 */ {ORAW,"%a" }, /* 98: 0111 0100 1001 1000 oooo oooo */ - {illegal,0 }, /* 99: 0111 0100 1001 1001 */ - {illegal,0 }, /* 9a: 0111 0100 1001 1010 */ - {illegal,0 }, /* 9b: 0111 0100 1001 1011 */ - {illegal,0 }, /* 9c: 0111 0100 1001 1100 */ + {illegal,0 }, /* 99: 0111 0100 1001 1001 */ + {illegal,0 }, /* 9a: 0111 0100 1001 1010 */ + {illegal,0 }, /* 9b: 0111 0100 1001 1011 */ + {illegal,0 }, /* 9c: 0111 0100 1001 1100 */ {DOR,"EA,BC" }, /* 9d: 0111 0100 1001 1101 */ {DOR,"EA,DE" }, /* 9e: 0111 0100 1001 1110 */ {DOR,"EA,HL" }, /* 9f: 0111 0100 1001 1111 */ {ADDNCW,"%a" }, /* a0: 0111 0100 1010 0000 oooo oooo */ - {illegal,0 }, /* a1: 0111 0100 1010 0001 */ - {illegal,0 }, /* a2: 0111 0100 1010 0010 */ - {illegal,0 }, /* a3: 0111 0100 1010 0011 */ - {illegal,0 }, /* a4: 0111 0100 1010 0100 */ + {illegal,0 }, /* a1: 0111 0100 1010 0001 */ + {illegal,0 }, /* a2: 0111 0100 1010 0010 */ + {illegal,0 }, /* a3: 0111 0100 1010 0011 */ + {illegal,0 }, /* a4: 0111 0100 1010 0100 */ {DADDNC,"EA,BC" }, /* a5: 0111 0100 1010 0101 */ {DADDNC,"EA,DE" }, /* a6: 0111 0100 1010 0110 */ {DADDNC,"EA,HL" }, /* a7: 0111 0100 1010 0111 */ {GTAW,"%a" }, /* a8: 0111 0100 1010 1000 oooo oooo */ - {illegal,0 }, /* a9: 0111 0100 1010 1001 */ - {illegal,0 }, /* aa: 0111 0100 1010 1010 */ - {illegal,0 }, /* ab: 0111 0100 1010 1011 */ - {illegal,0 }, /* ac: 0111 0100 1010 1100 */ + {illegal,0 }, /* a9: 0111 0100 1010 1001 */ + {illegal,0 }, /* aa: 0111 0100 1010 1010 */ + {illegal,0 }, /* ab: 0111 0100 1010 1011 */ + {illegal,0 }, /* ac: 0111 0100 1010 1100 */ {DGT,"EA,BC" }, /* ad: 0111 0100 1010 1101 */ {DGT,"EA,DE" }, /* ae: 0111 0100 1010 1110 */ {DGT,"EA,HL" }, /* af: 0111 0100 1010 1111 */ {SUBNBW,"%a" }, /* b0: 0111 0100 1011 0000 oooo oooo */ - {illegal,0 }, /* b1: 0111 0100 1011 0001 */ - {illegal,0 }, /* b2: 0111 0100 1011 0010 */ - {illegal,0 }, /* b3: 0111 0100 1011 0011 */ - {illegal,0 }, /* b4: 0111 0100 1011 0100 */ + {illegal,0 }, /* b1: 0111 0100 1011 0001 */ + {illegal,0 }, /* b2: 0111 0100 1011 0010 */ + {illegal,0 }, /* b3: 0111 0100 1011 0011 */ + {illegal,0 }, /* b4: 0111 0100 1011 0100 */ {DSUBNB,"EA,BC" }, /* b5: 0111 0100 1011 0101 */ {DSUBNB,"EA,DE" }, /* b6: 0111 0100 1011 0110 */ {DSUBNB,"EA,HL" }, /* b7: 0111 0100 1011 0111 */ {LTAW,"%a" }, /* b8: 0111 0100 1011 1000 oooo oooo */ - {illegal,0 }, /* b9: 0111 0100 1011 1001 */ - {illegal,0 }, /* ba: 0111 0100 1011 1010 */ - {illegal,0 }, /* bb: 0111 0100 1011 1011 */ - {illegal,0 }, /* bc: 0111 0100 1011 1100 */ + {illegal,0 }, /* b9: 0111 0100 1011 1001 */ + {illegal,0 }, /* ba: 0111 0100 1011 1010 */ + {illegal,0 }, /* bb: 0111 0100 1011 1011 */ + {illegal,0 }, /* bc: 0111 0100 1011 1100 */ {DLT,"EA,BC" }, /* bd: 0111 0100 1011 1101 */ {DLT,"EA,DE" }, /* be: 0111 0100 1011 1110 */ {DLT,"EA,HL" }, /* bf: 0111 0100 1011 1111 */ {ADDW,"%a" }, /* c0: 0111 0100 1100 0000 oooo oooo */ - {illegal,0 }, /* c1: 0111 0100 1100 0001 */ - {illegal,0 }, /* c2: 0111 0100 1100 0010 */ - {illegal,0 }, /* c3: 0111 0100 1100 0011 */ - {illegal,0 }, /* c4: 0111 0100 1100 0100 */ + {illegal,0 }, /* c1: 0111 0100 1100 0001 */ + {illegal,0 }, /* c2: 0111 0100 1100 0010 */ + {illegal,0 }, /* c3: 0111 0100 1100 0011 */ + {illegal,0 }, /* c4: 0111 0100 1100 0100 */ {DADD,"EA,BC" }, /* c5: 0111 0100 1100 0101 */ {DADD,"EA,DE" }, /* c6: 0111 0100 1100 0110 */ {DADD,"EA,HL" }, /* c7: 0111 0100 1100 0111 */ {ONAW,"%a" }, /* c8: 0111 0100 1100 1000 oooo oooo */ - {illegal,0 }, /* c9: 0111 0100 1100 1001 */ - {illegal,0 }, /* ca: 0111 0100 1100 1010 */ - {illegal,0 }, /* cb: 0111 0100 1100 1011 */ - {illegal,0 }, /* cc: 0111 0100 1100 1100 */ + {illegal,0 }, /* c9: 0111 0100 1100 1001 */ + {illegal,0 }, /* ca: 0111 0100 1100 1010 */ + {illegal,0 }, /* cb: 0111 0100 1100 1011 */ + {illegal,0 }, /* cc: 0111 0100 1100 1100 */ {DON,"EA,BC" }, /* cd: 0111 0100 1100 1101 */ {DON,"EA,DE" }, /* ce: 0111 0100 1100 1110 */ {DON,"EA,HL" }, /* cf: 0111 0100 1100 1111 */ {ADCW,"%a" }, /* d0: 0111 0100 1101 0000 oooo oooo */ - {illegal,0 }, /* d1: 0111 0100 1101 0001 */ - {illegal,0 }, /* d2: 0111 0100 1101 0010 */ - {illegal,0 }, /* d3: 0111 0100 1101 0011 */ - {illegal,0 }, /* d4: 0111 0100 1101 0100 */ + {illegal,0 }, /* d1: 0111 0100 1101 0001 */ + {illegal,0 }, /* d2: 0111 0100 1101 0010 */ + {illegal,0 }, /* d3: 0111 0100 1101 0011 */ + {illegal,0 }, /* d4: 0111 0100 1101 0100 */ {DADC,"EA,BC" }, /* d5: 0111 0100 1101 0101 */ {DADC,"EA,DE" }, /* d6: 0111 0100 1101 0110 */ {DADC,"EA,HL" }, /* d7: 0111 0100 1101 0111 */ {OFFAW,"%a" }, /* d8: 0111 0100 1101 1000 oooo oooo */ - {illegal,0 }, /* d9: 0111 0100 1101 1001 */ - {illegal,0 }, /* da: 0111 0100 1101 1010 */ - {illegal,0 }, /* db: 0111 0100 1101 1011 */ - {illegal,0 }, /* dc: 0111 0100 1101 1100 */ + {illegal,0 }, /* d9: 0111 0100 1101 1001 */ + {illegal,0 }, /* da: 0111 0100 1101 1010 */ + {illegal,0 }, /* db: 0111 0100 1101 1011 */ + {illegal,0 }, /* dc: 0111 0100 1101 1100 */ {DOFF,"EA,BC" }, /* dd: 0111 0100 1101 1101 */ {DOFF,"EA,DE" }, /* de: 0111 0100 1101 1110 */ {DOFF,"EA,HL" }, /* df: 0111 0100 1101 1111 */ {SUBW,"%a" }, /* e0: 0111 0100 1110 0000 oooo oooo */ - {illegal,0 }, /* e1: 0111 0100 1110 0001 */ - {illegal,0 }, /* e2: 0111 0100 1110 0010 */ - {illegal,0 }, /* e3: 0111 0100 1110 0011 */ - {illegal,0 }, /* e4: 0111 0100 1110 0100 */ + {illegal,0 }, /* e1: 0111 0100 1110 0001 */ + {illegal,0 }, /* e2: 0111 0100 1110 0010 */ + {illegal,0 }, /* e3: 0111 0100 1110 0011 */ + {illegal,0 }, /* e4: 0111 0100 1110 0100 */ {DSUB,"EA,BC" }, /* e5: 0111 0100 1110 0101 */ {DSUB,"EA,DE" }, /* e6: 0111 0100 1110 0110 */ {DSUB,"EA,HL" }, /* e7: 0111 0100 1110 0111 */ {NEAW,"%a" }, /* e8: 0111 0100 1110 1000 oooo oooo */ - {illegal,0 }, /* e9: 0111 0100 1110 1001 */ - {illegal,0 }, /* ea: 0111 0100 1110 1010 */ - {illegal,0 }, /* eb: 0111 0100 1110 1011 */ - {illegal,0 }, /* ec: 0111 0100 1110 1100 */ + {illegal,0 }, /* e9: 0111 0100 1110 1001 */ + {illegal,0 }, /* ea: 0111 0100 1110 1010 */ + {illegal,0 }, /* eb: 0111 0100 1110 1011 */ + {illegal,0 }, /* ec: 0111 0100 1110 1100 */ {DNE,"EA,BC" }, /* ed: 0111 0100 1110 1101 */ {DNE,"EA,DE" }, /* ee: 0111 0100 1110 1110 */ {DNE,"EA,HL" }, /* ef: 0111 0100 1110 1111 */ {SBBW,"%a" }, /* f0: 0111 0100 1111 0000 oooo oooo */ - {illegal,0 }, /* f1: 0111 0100 1111 0001 */ - {illegal,0 }, /* f2: 0111 0100 1111 0010 */ - {illegal,0 }, /* f3: 0111 0100 1111 0011 */ - {illegal,0 }, /* f4: 0111 0100 1111 0100 */ + {illegal,0 }, /* f1: 0111 0100 1111 0001 */ + {illegal,0 }, /* f2: 0111 0100 1111 0010 */ + {illegal,0 }, /* f3: 0111 0100 1111 0011 */ + {illegal,0 }, /* f4: 0111 0100 1111 0100 */ {DSBB,"EA,BC" }, /* f5: 0111 0100 1111 0101 */ {DSBB,"EA,DE" }, /* f6: 0111 0100 1111 0110 */ {DSBB,"EA,HL" }, /* f7: 0111 0100 1111 0111 */ {EQAW,"%a" }, /* f8: 0111 0100 1111 1000 oooo oooo */ - {illegal,0 }, /* f9: 0111 0100 1111 1001 */ - {illegal,0 }, /* fa: 0111 0100 1111 1010 */ - {illegal,0 }, /* fb: 0111 0100 1111 1011 */ - {illegal,0 }, /* fc: 0111 0100 1111 1100 */ + {illegal,0 }, /* f9: 0111 0100 1111 1001 */ + {illegal,0 }, /* fa: 0111 0100 1111 1010 */ + {illegal,0 }, /* fb: 0111 0100 1111 1011 */ + {illegal,0 }, /* fc: 0111 0100 1111 1100 */ {DEQ,"EA,BC" }, /* fd: 0111 0100 1111 1101 */ {DEQ,"EA,DE" }, /* fe: 0111 0100 1111 1110 */ {DEQ,"EA,HL" } /* ff: 0111 0100 1111 1111 */ @@ -3410,13 +3410,13 @@ static const struct dasm_s dasm74[256] = /* main opcodes */ static const struct dasm_s dasmXX_7810[256] = { - {NOP,0 }, /* 00: 0000 0000 */ + {NOP,0 }, /* 00: 0000 0000 */ {LDAW,"%a" }, /* 01: 0000 0001 oooo oooo */ {INX,"SP" }, /* 02: 0000 0010 */ {DCX,"SP" }, /* 03: 0000 0011 */ {LXI,"SP,%w" }, /* 04: 0000 0100 llll llll hhhh hhhh */ {ANIW,"%a,%b" }, /* 05: 0000 0101 oooo oooo xxxx xxxx */ - {illegal,0 }, /* 06: */ + {illegal,0 }, /* 06: */ {ANI,"A,%b" }, /* 07: 0000 0111 xxxx xxxx */ {MOV,"A,EAH" }, /* 08: 0000 1000 */ {MOV,"A,EAL" }, /* 09: 0000 1001 */ @@ -3427,8 +3427,8 @@ static const struct dasm_s dasmXX_7810[256] = {MOV,"A,H" }, /* 0e: 0000 1110 */ {MOV,"A,L" }, /* 0f: 0000 1111 */ - {EXA,0 }, /* 10: 0001 0000 */ /* 7810 */ - {EXX,0 }, /* 11: 0001 0001 */ /* 7810 */ + {EXA,0 }, /* 10: 0001 0000 */ /* 7810 */ + {EXX,0 }, /* 11: 0001 0001 */ /* 7810 */ {INX,"BC" }, /* 12: 0001 0010 */ {DCX,"BC" }, /* 13: 0001 0011 */ {LXI,"BC,%w" }, /* 14: 0001 0100 llll llll hhhh hhhh */ @@ -3452,7 +3452,7 @@ static const struct dasm_s dasmXX_7810[256] = {GTIW,"%a,%b" }, /* 25: 0010 0101 oooo oooo xxxx xxxx */ {ADINC,"A,%b" }, /* 26: 0010 0110 xxxx xxxx */ {GTI,"A,%b" }, /* 27: 0010 0111 xxxx xxxx */ - {illegal,0 }, /* 28: 0010 1000 */ + {illegal,0 }, /* 28: 0010 1000 */ {LDAX,"(BC)" }, /* 29: 0010 1001 */ {LDAX,"(DE)" }, /* 2a: 0010 1010 */ {LDAX,"(HL)" }, /* 2b: 0010 1011 */ @@ -3469,7 +3469,7 @@ static const struct dasm_s dasmXX_7810[256] = {LTIW,"%a,%b" }, /* 35: 0011 0101 oooo oooo xxxx xxxx */ {SUINB,"A,%b" }, /* 36: 0011 0110 xxxx xxxx */ {LTI,"A,%b" }, /* 37: 0011 0111 xxxx xxxx */ - {illegal,0 }, /* 38: */ + {illegal,0 }, /* 38: */ {STAX,"(BC)" }, /* 39: 0011 1001 */ {STAX,"(DE)" }, /* 3a: 0011 1010 */ {STAX,"(HL)" }, /* 3b: 0011 1011 */ @@ -3495,7 +3495,7 @@ static const struct dasm_s dasmXX_7810[256] = {JRE,"%d" }, /* 4e: 0100 111d dddd dddd */ {JRE,"%d" }, /* 4f: 0100 111d dddd dddd */ - {EXH,0 }, /* 50: 0101 0000 */ /* 7810 */ + {EXH,0 }, /* 50: 0101 0000 */ /* 7810 */ {DCR,"A" }, /* 51: 0101 0001 */ {DCR,"B" }, /* 52: 0101 0010 */ {DCR,"C" }, /* 53: 0101 0011 */ @@ -3513,7 +3513,7 @@ static const struct dasm_s dasmXX_7810[256] = {BIT,"7,%a", }, /* 5f: 0101 1111 oooo oooo */ /* 7810 */ {0,dasm60 }, /* 60: prefix */ - {DAA,0 }, /* 61: 0110 0001 */ + {DAA,0 }, /* 61: 0110 0001 */ {RETI,0 }, /* 62: 0110 0010 */ {STAW,"%a" }, /* 63: 0110 0011 oooo oooo */ {0,dasm64_7810 }, /* 64: prefix */ @@ -3532,7 +3532,7 @@ static const struct dasm_s dasmXX_7810[256] = {0,dasm70 }, /* 70: prefix */ {MVIW,"%a,%b" }, /* 71: 0111 0001 oooo oooo xxxx xxxx */ {SOFTI,0 }, /* 72: 0111 0010 */ - {illegal,0 }, /* 73: */ + {illegal,0 }, /* 73: */ {0,dasm74 }, /* 74: prefix */ {EQIW,"%a,%b" }, /* 75: 0111 0101 oooo oooo xxxx xxxx */ {SBI,"A,%b" }, /* 76: 0111 0110 xxxx xxxx */ @@ -3605,7 +3605,7 @@ static const struct dasm_s dasmXX_7810[256] = {DMOV,"BC,EA" }, /* b5: 1011 0101 */ {DMOV,"DE,EA" }, /* b6: 1011 0110 */ {DMOV,"HL,EA" }, /* b7: 1011 0111 */ - {RET,0 }, /* b8: 1011 1000 */ + {RET,0 }, /* b8: 1011 1000 */ {RETS,0 }, /* b9: 1011 1001 */ {DI,0 }, /* ba: 1011 1010 */ {STAX,"(DE+%b)" }, /* bb: 1011 1011 dddd dddd */ @@ -3685,13 +3685,13 @@ static const struct dasm_s dasmXX_7810[256] = static const struct dasm_s dasmXX_7807[256] = { - {NOP,0 }, /* 00: 0000 0000 */ + {NOP,0 }, /* 00: 0000 0000 */ {LDAW,"%a" }, /* 01: 0000 0001 oooo oooo */ {INX,"SP" }, /* 02: 0000 0010 */ {DCX,"SP" }, /* 03: 0000 0011 */ {LXI,"SP,%w" }, /* 04: 0000 0100 llll llll hhhh hhhh */ {ANIW,"%a,%b" }, /* 05: 0000 0101 oooo oooo xxxx xxxx */ - {illegal,0 }, /* 06: */ + {illegal,0 }, /* 06: */ {ANI,"A,%b" }, /* 07: 0000 0111 xxxx xxxx */ {MOV,"A,EAH" }, /* 08: 0000 1000 */ {MOV,"A,EAL" }, /* 09: 0000 1001 */ @@ -3727,7 +3727,7 @@ static const struct dasm_s dasmXX_7807[256] = {GTIW,"%a,%b" }, /* 25: 0010 0101 oooo oooo xxxx xxxx */ {ADINC,"A,%b" }, /* 26: 0010 0110 xxxx xxxx */ {GTI,"A,%b" }, /* 27: 0010 0111 xxxx xxxx */ - {illegal,0 }, /* 28: 0010 1000 */ + {illegal,0 }, /* 28: 0010 1000 */ {LDAX,"(BC)" }, /* 29: 0010 1001 */ {LDAX,"(DE)" }, /* 2a: 0010 1010 */ {LDAX,"(HL)" }, /* 2b: 0010 1011 */ @@ -3744,7 +3744,7 @@ static const struct dasm_s dasmXX_7807[256] = {LTIW,"%a,%b" }, /* 35: 0011 0101 oooo oooo xxxx xxxx */ {SUINB,"A,%b" }, /* 36: 0011 0110 xxxx xxxx */ {LTI,"A,%b" }, /* 37: 0011 0111 xxxx xxxx */ - {illegal,0 }, /* 38: */ + {illegal,0 }, /* 38: */ {STAX,"(BC)" }, /* 39: 0011 1001 */ {STAX,"(DE)" }, /* 3a: 0011 1010 */ {STAX,"(HL)" }, /* 3b: 0011 1011 */ @@ -3787,7 +3787,7 @@ static const struct dasm_s dasmXX_7807[256] = {MOV,"CY,%i" }, /* 5f: 0101 1111 bbbb bbbb */ /* 7807 */ {0,dasm60 }, /* 60: prefix */ - {DAA,0 }, /* 61: 0110 0001 */ + {DAA,0 }, /* 61: 0110 0001 */ {RETI,0 }, /* 62: 0110 0010 */ {STAW,"%a" }, /* 63: 0110 0011 oooo oooo */ {0,dasm64_7807 }, /* 64: prefix */ @@ -3806,7 +3806,7 @@ static const struct dasm_s dasmXX_7807[256] = {0,dasm70 }, /* 70: prefix */ {MVIW,"%a,%b" }, /* 71: 0111 0001 oooo oooo xxxx xxxx */ {SOFTI,0 }, /* 72: 0111 0010 */ - {illegal,0 }, /* 73: */ + {illegal,0 }, /* 73: */ {0,dasm74 }, /* 74: prefix */ {EQIW,"%a,%b" }, /* 75: 0111 0101 oooo oooo xxxx xxxx */ {SBI,"A,%b" }, /* 76: 0111 0110 xxxx xxxx */ @@ -3879,7 +3879,7 @@ static const struct dasm_s dasmXX_7807[256] = {DMOV,"BC,EA" }, /* b5: 1011 0101 */ {DMOV,"DE,EA" }, /* b6: 1011 0110 */ {DMOV,"HL,EA" }, /* b7: 1011 0111 */ - {RET,0 }, /* b8: 1011 1000 */ + {RET,0 }, /* b8: 1011 1000 */ {RETS,0 }, /* b9: 1011 1001 */ {DI,0 }, /* ba: 1011 1010 */ {STAX,"(DE+%b)" }, /* bb: 1011 1011 dddd dddd */ diff --git a/src/emu/cpu/upd7810/7810tbl.c b/src/emu/cpu/upd7810/7810tbl.c index 97373e4be14..f6d9ee8f5ac 100644 --- a/src/emu/cpu/upd7810/7810tbl.c +++ b/src/emu/cpu/upd7810/7810tbl.c @@ -1545,7 +1545,7 @@ static const struct opcode_s op4C[256] = {illegal2, 2,10,10,L0|L1}, /* cc: 0100 1100 1100 1100 */ {MOV_A_TMM, 2,10,10,L0|L1}, /* cd: 0100 1100 1100 1101 */ // {illegal2, 2,10,10,L0|L1}, /* ce: 0100 1100 1100 1110 */ - {MOV_A_PT, 2,10,10,L0|L1}, /* ce: 0100 1100 1100 1110 */ /* 7807 */ + {MOV_A_PT, 2,10,10,L0|L1}, /* ce: 0100 1100 1100 1110 */ /* 7807 */ {illegal2, 2,10,10,L0|L1}, /* cf: 0100 1100 1100 1111 */ {illegal2, 2,10,10,L0|L1}, /* d0: 0100 1100 1101 0000 */ @@ -3546,8 +3546,8 @@ static const struct opcode_s op48_7801[256] = {SKIT_F1, 2, 8, 8,L0|L1}, {SKIT_F2, 2, 8, 8,L0|L1}, {SKIT_FST, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, - {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, - {SK_CY, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, + {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, + {SK_CY, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, {SK_Z, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, {PUSH_VA, 2,15,15,L0|L1}, {POP_VA, 2,15,15,L0|L1}, @@ -3561,14 +3561,14 @@ static const struct opcode_s op48_7801[256] = {PUSH_BC, 2,17,17,L0|L1}, {POP_BC, 2,15,15,L0|L1}, /* 0x20 - 0x3F */ - {EI, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, - {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, - {DI, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, - {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, + {EI, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, + {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, + {DI, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, + {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, {CLC, 2, 8, 8,L0|L1}, {STC, 2, 8, 8,L0|L1}, {PEN, 2,11,11,L0|L1}, {PEX, 2,11,11,L0|L1}, - {PUSH_DE, 2,17,17,L0|L1}, {POP_DE, 2,15,15,L0|L1}, + {PUSH_DE, 2,17,17,L0|L1}, {POP_DE, 2,15,15,L0|L1}, {RLL_A, 2, 8, 8,L0|L1}, {RLR_A, 2, 8, 8,L0|L1}, {RLL_C, 2, 8, 8,L0|L1}, {RLR_C, 2, 8, 8,L0|L1}, @@ -3576,8 +3576,8 @@ static const struct opcode_s op48_7801[256] = {SLL_C, 2, 8, 8,L0|L1}, {SLR_C, 2, 8, 8,L0|L1}, {RLD, 2,17,17,L0|L1}, {RRD, 2,17,17,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {PER, 2,11,11,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, - {PUSH_HL, 2,17,17,L0|L1}, {POP_HL, 2,15,15,L0|L1}, + {PER, 2,11,11,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, + {PUSH_HL, 2,17,17,L0|L1}, {POP_HL, 2,15,15,L0|L1}, /* 0x40 - 0x5F */ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, @@ -4670,8 +4670,8 @@ static const struct opcode_s opXX_7801[256] = {STAX_Dm, 1, 7, 7,L0|L1}, {STAX_Hm, 1, 7, 7,L0|L1}, /* 0x40 - 0x5F */ - {illegal, 1, 4, 4,L0|L1}, {INR_A_7801, 1, 4, 4,L0|L1}, - {INR_B_7801, 1, 4, 4,L0|L1}, {INR_C_7801, 1, 4, 4,L0|L1}, + {illegal, 1, 4, 4,L0|L1}, {INR_A_7801, 1, 4, 4,L0|L1}, + {INR_B_7801, 1, 4, 4,L0|L1}, {INR_C_7801, 1, 4, 4,L0|L1}, {CALL_w, 3,16,16,L0|L1}, {ONIW_wa_xx, 3,13,13,L0|L1}, {ADI_A_xx, 2, 7, 7,L0|L1}, {ONI_A_xx, 2, 7, 7,L0|L1}, {PRE_48, 1, 0, 0,L0|L1}, {MVIX_BC_xx, 2,10,10,L0|L1}, @@ -4679,8 +4679,8 @@ static const struct opcode_s opXX_7801[256] = {PRE_4C, 1, 0, 0,L0|L1}, {PRE_4D, 1, 0, 0,L0|L1}, {JRE, 2,17,17,L0|L1}, {JRE, 2,17,17,L0|L1}, - {illegal, 1, 4, 4,L0|L1}, {DCR_A_7801, 1, 4, 4,L0|L1}, - {DCR_B_7801, 1, 4, 4,L0|L1}, {DCR_C_7801, 1, 4, 4,L0|L1}, + {illegal, 1, 4, 4,L0|L1}, {DCR_A_7801, 1, 4, 4,L0|L1}, + {DCR_B_7801, 1, 4, 4,L0|L1}, {DCR_C_7801, 1, 4, 4,L0|L1}, {JMP_w, 3,10,10,L0|L1}, {OFFIW_wa_xx, 3,13,13,L0|L1}, {ACI_A_xx, 2, 7, 7,L0|L1}, {OFFI_A_xx, 2, 7, 7,L0|L1}, {BIT_0_wa, 2,10,10,L0|L1}, {BIT_1_wa, 2,10,10,L0|L1}, @@ -4797,8 +4797,8 @@ static const struct opcode_s op48_78c05[256] = {SKIT_F1, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, {SKIT_FST, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, - {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, - {SK_CY, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, + {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, + {SK_CY, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, {SK_Z, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, {PUSH_VA, 2,17,17,L0|L1}, {POP_VA, 2,14,14,L0|L1}, @@ -4812,23 +4812,23 @@ static const struct opcode_s op48_78c05[256] = {PUSH_BC, 2,17,17,L0|L1}, {POP_BC, 2,14,14,L0|L1}, /* 0x20 - 0x3F */ - {EI, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, - {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, - {DI, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, - {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, + {EI, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, + {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, + {DI, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, + {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, {CLC, 2, 8, 8,L0|L1}, {STC, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, {PEX, 2,11,11,L0|L1}, - {PUSH_DE, 2,17,17,L0|L1}, {POP_DE, 2,14,14,L0|L1}, + {PUSH_DE, 2,17,17,L0|L1}, {POP_DE, 2,14,14,L0|L1}, {RLL_A, 2, 8, 8,L0|L1}, {RLR_A, 2, 8, 8,L0|L1}, - {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, - {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, - {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, + {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, + {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, + {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, {RLD, 2,17,17,L0|L1}, {RRD, 2,17,17,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, - {PER, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, - {PUSH_HL, 2,17,17,L0|L1}, {POP_HL, 2,14,14,L0|L1}, + {PER, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, + {PUSH_HL, 2,17,17,L0|L1}, {POP_HL, 2,14,14,L0|L1}, /* 0x40 - 0x5F */ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}, @@ -5921,7 +5921,7 @@ static const struct opcode_s opXX_78c05[256] = /* 0x40 - 0x5F */ {illegal, 1, 4, 4,L0|L1}, {INR_A_7801, 1, 4, 4,L0|L1}, - {INR_B_7801, 1, 4, 4,L0|L1}, {INR_C_7801, 1, 4, 4,L0|L1}, + {INR_B_7801, 1, 4, 4,L0|L1}, {INR_C_7801, 1, 4, 4,L0|L1}, {CALL_w, 3,16,16,L0|L1}, {ONIW_wa_xx, 3,13,13,L0|L1}, {ADI_A_xx, 2, 7, 7,L0|L1}, {ONI_A_xx, 2, 7, 7,L0|L1}, {PRE_48, 1, 0, 0,L0|L1}, {illegal, 1, 4, 4,L0|L1}, @@ -5929,8 +5929,8 @@ static const struct opcode_s opXX_78c05[256] = {PRE_4C, 1, 0, 0,L0|L1}, {PRE_4D, 1, 0, 0,L0|L1}, {JRE, 2,13,13,L0|L1}, {JRE, 2,13,13,L0|L1}, - {illegal, 1, 4, 4,L0|L1}, {DCR_A_7801, 1, 4, 4,L0|L1}, - {DCR_B_7801, 1, 4, 4,L0|L1}, {DCR_C_7801, 1, 4, 4,L0|L1}, + {illegal, 1, 4, 4,L0|L1}, {DCR_A_7801, 1, 4, 4,L0|L1}, + {DCR_B_7801, 1, 4, 4,L0|L1}, {DCR_C_7801, 1, 4, 4,L0|L1}, {JMP_w, 3,10,10,L0|L1}, {OFFIW_wa_xx, 3,13,13,L0|L1}, {ACI_A_xx, 2, 7, 7,L0|L1}, {OFFI_A_xx, 2, 7, 7,L0|L1}, {illegal, 1, 4, 4,L0|L1}, {illegal, 1, 4, 4,L0|L1}, @@ -6047,8 +6047,8 @@ static const struct opcode_s op48_78c06[256] = {SKIT_F1, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {SKIT_FST, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {SK_CY, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {SK_CY, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {SK_Z, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {PUSH_VA, 2,21,21,L0|L1}, {POP_VA, 2,18,18,L0|L1}, @@ -6062,254 +6062,254 @@ static const struct opcode_s op48_78c06[256] = {PUSH_BC, 2,21,21,L0|L1}, {POP_BC, 2,18,18,L0|L1}, /* 0x20 - 0x3F */ - {EI, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {DI, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {EI, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {DI, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {CLC, 2,12,12,L0|L1}, {STC, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {PEX, 2,15,15,L0|L1}, - {PUSH_DE, 2,21,21,L0|L1}, {POP_DE, 2,18,18,L0|L1}, + {PUSH_DE, 2,21,21,L0|L1}, {POP_DE, 2,18,18,L0|L1}, {RLL_A, 2,12,12,L0|L1}, {RLR_A, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {RLD, 2,21,21,L0|L1}, {RRD, 2,21,21,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {PER, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {PUSH_HL, 2,21,21,L0|L1}, {POP_HL, 2,18,18,L0|L1}, + {PER, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {PUSH_HL, 2,21,21,L0|L1}, {POP_HL, 2,18,18,L0|L1}, /* 0x40 - 0x5F */ - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0x60 - 0x7F */ - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0x80 - 0x9F */ - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0xA0 - 0xBF */ - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0xC0 - 0xDF */ - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0xE0 - 0xFF */ - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1} + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1} }; static const struct opcode_s op4C_78c06[256] = { /* 0x00 - 0x1F */ - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0x20 - 0x3F */ - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0x40 - 0x5F */ - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0x60 - 0x7F */ - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0x80 - 0x9F */ - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0xA0 - 0xBF */ - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0xC0 - 0xDF */ {MOV_A_PA, 2,14,14,L0|L1}, {MOV_A_PB, 2,14,14,L0|L1}, @@ -6321,151 +6321,151 @@ static const struct opcode_s op4C_78c06[256] = {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0xE0 - 0xFF */ - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1} + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1} }; /* prefix 4D */ static const struct opcode_s op4D_78c06[256] = { /* 0x00 - 0x1F */ - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0x20 - 0x3F */ - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0x40 - 0x5F */ - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0x60 - 0x7F */ - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0x80 - 0x9F */ - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0xA0 - 0xBF */ - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0xC0 - 0xDF */ {MOV_PA_A, 2,14,14,L0|L1}, {MOV_PB_A, 2,14,14,L0|L1}, @@ -6477,113 +6477,113 @@ static const struct opcode_s op4D_78c06[256] = {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0xE0 - 0xFF */ - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1} + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1} }; /* prefix 60 */ static const struct opcode_s op60_78c06[256] = { /* 0x00 - 0x1F */ - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {ANA_A_A, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {XRA_A_A, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {ORA_A_A, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0x20 - 0x3F */ {illegal2, 2,12,12,L0|L1}, {ADDNC_A_A, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {GTA_A_A, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {SUBNB_A_A, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {LTA_A_A, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0x40 - 0x5F */ {illegal2, 2,12,12,L0|L1}, {ADD_A_A, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {ADC_A_A, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0x60 - 0x7F */ {illegal2, 2, 8, 8,L0|L1}, {SUB_A_A, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {NEA_A_A, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {SBB_A_A, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {EQA_A_A, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0x80 - 0x9F */ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, @@ -6666,242 +6666,242 @@ static const struct opcode_s op60_78c06[256] = static const struct opcode_s op64_78c06[256] = { /* 0x00 - 0x1F */ - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {ANI_A_xx, 3,17,17,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {XRI_A_xx, 3,17,17,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {ORI_A_xx, 3,17,17,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0x20 - 0x3F */ {illegal2, 2,12,12,L0|L1}, {ADINC_A_xx, 3,17,17,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {GTI_A_xx, 3,17,17,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {SUINB_A_xx, 3,17,17,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 3,12,12,L0|L1}, {LTI_A_xx, 3,17,17,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0x40 - 0x5F */ {illegal2, 2,12,12,L0|L1}, {ADI_A_xx, 3,17,17,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {ONI_A_xx, 3,17,17,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 3,12,12,L0|L1}, {ACI_A_xx, 3,17,17,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 3,12,12,L0|L1}, {OFFI_A_xx, 3,17,17,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0x60 - 0x7F */ {illegal2, 2,12,12,L0|L1}, {SUI_A_xx, 3,17,17,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {NEI_A_xx, 3,17,17,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {SBI_A_xx, 3,17,17,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {EQI_A_xx, 3,17,17,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0x80 - 0x9F */ - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {ANI_PA_xx, 3,23,23,L0|L1}, {ANI_PB_xx, 3,23,23,L0|L1}, {ANI_PC_xx, 3,23,23,L0|L1}, {ANI_MKL_xx, 3,23,23,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {XRI_PA_xx, 3,23,23,L0|L1}, {XRI_PB_xx, 3,23,23,L0|L1}, {XRI_PC_xx, 3,23,23,L0|L1}, {XRI_MKL_xx, 3,23,23,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {ORI_PA_xx, 3,23,23,L0|L1}, {ORI_PB_xx, 3,23,23,L0|L1}, {ORI_PC_xx, 3,23,23,L0|L1}, {ORI_MKL_xx, 3,23,23,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0xA0 - 0xBF */ {ADINC_PA_xx, 3,23,23,L0|L1}, {ADINC_PB_xx, 3,23,23,L0|L1}, {ADINC_PC_xx, 3,23,23,L0|L1}, {ADINC_MKL_xx, 3,23,23,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {GTI_PA_xx, 3,20,20,L0|L1}, {GTI_PB_xx, 3,20,20,L0|L1}, {GTI_PC_xx, 3,20,20,L0|L1}, {GTI_MKL_xx, 3,20,20,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {SUINB_PA_xx, 3,23,23,L0|L1}, {SUINB_PB_xx, 3,23,23,L0|L1}, {SUINB_PC_xx, 3,23,23,L0|L1}, {SUINB_MKL_xx, 3,23,23,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {LTI_PA_xx, 3,20,20,L0|L1}, {LTI_PB_xx, 3,20,20,L0|L1}, {LTI_PC_xx, 3,20,20,L0|L1}, {LTI_MKL_xx, 3,20,20,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0xC0 - 0xDF */ {ADI_PA_xx, 3,23,23,L0|L1}, {ADI_PB_xx, 3,23,23,L0|L1}, {ADI_PC_xx, 3,23,23,L0|L1}, {ADI_MKL_xx, 3,23,23,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {ONI_PA_xx, 3,20,20,L0|L1}, {ONI_PB_xx, 3,20,20,L0|L1}, {ONI_PC_xx, 3,20,20,L0|L1}, {ONI_MKL_xx, 3,20,20,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {ACI_PA_xx, 3,23,23,L0|L1}, {ACI_PB_xx, 3,23,23,L0|L1}, {ACI_PC_xx, 3,23,23,L0|L1}, {ACI_MKL_xx, 3,23,23,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {OFFI_PA_xx, 3,20,20,L0|L1}, {OFFI_PB_xx, 3,20,20,L0|L1}, {OFFI_PC_xx, 3,20,20,L0|L1}, {OFFI_MKL_xx, 3,20,20,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0xE0 - 0xFF */ {SUI_PA_xx, 3,23,23,L0|L1}, {SUI_PB_xx, 3,23,23,L0|L1}, {SUI_PC_xx, 3,23,23,L0|L1}, {SUI_MKL_xx, 3,23,23,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {NEI_PA_xx, 3,20,20,L0|L1}, {NEI_PB_xx, 3,20,20,L0|L1}, {NEI_PC_xx, 3,20,20,L0|L1}, {NEI_MKL_xx, 3,20,20,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {SBI_PA_xx, 3,23,23,L0|L1}, {SBI_PB_xx, 3,23,23,L0|L1}, {SBI_PC_xx, 3,23,23,L0|L1}, {SBI_MKL_xx, 3,23,23,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {EQI_PA_xx, 3,20,20,L0|L1}, {EQI_PB_xx, 3,20,20,L0|L1}, {EQI_PC_xx, 3,20,20,L0|L1}, {EQI_MKL_xx, 3,20,20,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1} + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1} }; /* prefix 70 */ static const struct opcode_s op70_78c06[256] = { /* 0x00 - 0x1F */ - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {SSPD_w, 4,28,28,L0|L1}, {LSPD_w, 4,28,28,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {SBCD_w, 4,28,28,L0|L1}, {LBCD_w, 4,28,28,L0|L1}, /* 0x20 - 0x3F */ - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {SDED_w, 4,28,28,L0|L1}, {LDED_w, 4,28,28,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {SHLD_w, 4,28,28,L0|L1}, {LHLD_w, 4,28,28,L0|L1}, /* 0x40 - 0x5F */ - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0x60 - 0x7F */ - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {MOV_A_w, 4,25,25,L0|L1}, {MOV_B_w, 4,25,25,L0|L1}, {MOV_C_w, 4,25,25,L0|L1}, {MOV_D_w, 4,25,25,L0|L1}, {MOV_E_w, 4,25,25,L0|L1}, {MOV_H_w, 4,25,25,L0|L1}, {MOV_L_w, 4,25,25,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {MOV_w_A, 4,25,25,L0|L1}, {MOV_w_B, 4,25,25,L0|L1}, {MOV_w_C, 4,25,25,L0|L1}, {MOV_w_D, 4,25,25,L0|L1}, {MOV_w_E, 4,25,25,L0|L1}, {MOV_w_H, 4,25,25,L0|L1}, {MOV_w_L, 4,25,25,L0|L1}, /* 0x80 - 0x9F */ - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {ANAX_B, 2,15,15,L0|L1}, {ANAX_D, 2,15,15,L0|L1}, {ANAX_H, 2,15,15,L0|L1}, {ANAX_Dp, 2,15,15,L0|L1}, {ANAX_Hp, 2,15,15,L0|L1}, @@ -6978,156 +6978,156 @@ static const struct opcode_s op70_78c06[256] = static const struct opcode_s op74_78c06[256] = { /* 0x00 - 0x1F */ - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0x20 - 0x3F */ - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0x40 - 0x5F */ - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0x60 - 0x7F */ - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0x80 - 0x9F */ - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {ANAW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {XRAW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {ORAW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0xA0 - 0xBF */ {ADDNCW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {GTAW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {SUBNBW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {LTAW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0xC0 - 0xDF */ {ADDW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {ONAW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {ADCW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {OFFAW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, /* 0xE0 - 0xFF */ {SUBW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {NEAW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {SBBW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, {EQAW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, - {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1} + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}, + {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1} }; static const struct opcode_s opXX_78c06[256] = @@ -7180,8 +7180,8 @@ static const struct opcode_s opXX_78c06[256] = {PRE_4C, 1, 0, 0,L0|L1}, {PRE_4D, 1, 0, 0,L0|L1}, {JRE, 2,17,17,L0|L1}, {JRE, 2,17,17,L0|L1}, - {illegal, 1, 6, 6,L0|L1}, {DCR_A_7801, 1, 6, 6,L0|L1}, - {DCR_B_7801, 1, 6, 6,L0|L1}, {DCR_C_7801, 1, 6, 6,L0|L1}, + {illegal, 1, 6, 6,L0|L1}, {DCR_A_7801, 1, 6, 6,L0|L1}, + {DCR_B_7801, 1, 6, 6,L0|L1}, {DCR_C_7801, 1, 6, 6,L0|L1}, {JMP_w, 3,16,16,L0|L1}, {OFFIW_wa_xx, 3,19,19,L0|L1}, {ACI_A_xx, 2,11,11,L0|L1}, {OFFI_A_xx, 2,11,11,L0|L1}, {illegal, 1, 6, 6,L0|L1}, {illegal, 1, 6, 6,L0|L1}, diff --git a/src/emu/cpu/upd7810/upd7810.c b/src/emu/cpu/upd7810/upd7810.c index cddbdf572cb..391a5298f33 100644 --- a/src/emu/cpu/upd7810/upd7810.c +++ b/src/emu/cpu/upd7810/upd7810.c @@ -660,7 +660,7 @@ struct opcode_s { #define ZHC_SUB(after,before,carry) \ if (after == 0) PSW |= Z; else PSW &= ~Z; \ - if (before == after) \ + if (before == after) \ PSW = (PSW & ~CY) | (carry); \ else if (after > before) \ PSW |= CY; \ @@ -696,21 +696,21 @@ static UINT8 RP(upd7810_state *cpustate, offs_t port) if (cpustate->mc) // NS20031301 no need to read if the port is set as output cpustate->pc_in = memory_read_byte_8le(cpustate->io, port); data = (cpustate->pc_in & cpustate->mc) | (cpustate->pc_out & ~cpustate->mc); - if (cpustate->mcc & 0x01) /* PC0 = TxD output */ + if (cpustate->mcc & 0x01) /* PC0 = TxD output */ data = (data & ~0x01) | (cpustate->txd & 1 ? 0x01 : 0x00); - if (cpustate->mcc & 0x02) /* PC1 = RxD input */ + if (cpustate->mcc & 0x02) /* PC1 = RxD input */ data = (data & ~0x02) | (cpustate->rxd & 1 ? 0x02 : 0x00); - if (cpustate->mcc & 0x04) /* PC2 = SCK input/output */ + if (cpustate->mcc & 0x04) /* PC2 = SCK input/output */ data = (data & ~0x04) | (cpustate->sck & 1 ? 0x04 : 0x00); - if (cpustate->mcc & 0x08) /* PC3 = TI input */ + if (cpustate->mcc & 0x08) /* PC3 = TI input */ data = (data & ~0x08) | (cpustate->ti & 1 ? 0x08 : 0x00); - if (cpustate->mcc & 0x10) /* PC4 = TO output */ + if (cpustate->mcc & 0x10) /* PC4 = TO output */ data = (data & ~0x10) | (cpustate->to & 1 ? 0x10 : 0x00); - if (cpustate->mcc & 0x20) /* PC5 = CI input */ + if (cpustate->mcc & 0x20) /* PC5 = CI input */ data = (data & ~0x20) | (cpustate->ci & 1 ? 0x20 : 0x00); - if (cpustate->mcc & 0x40) /* PC6 = CO0 output */ + if (cpustate->mcc & 0x40) /* PC6 = CO0 output */ data = (data & ~0x40) | (cpustate->co0 & 1 ? 0x40 : 0x00); - if (cpustate->mcc & 0x80) /* PC7 = CO1 output */ + if (cpustate->mcc & 0x80) /* PC7 = CO1 output */ data = (data & ~0x80) | (cpustate->co1 & 1 ? 0x80 : 0x00); break; case UPD7810_PORTD: @@ -777,21 +777,21 @@ static void WP(upd7810_state *cpustate, offs_t port, UINT8 data) cpustate->pc_out = data; // data = (data & ~cpustate->mc) | (cpustate->pc_in & cpustate->mc); data = (data & ~cpustate->mc) | (cpustate->mc); // NS20031401 - if (cpustate->mcc & 0x01) /* PC0 = TxD output */ + if (cpustate->mcc & 0x01) /* PC0 = TxD output */ data = (data & ~0x01) | (cpustate->txd & 1 ? 0x01 : 0x00); - if (cpustate->mcc & 0x02) /* PC1 = RxD input */ + if (cpustate->mcc & 0x02) /* PC1 = RxD input */ data = (data & ~0x02) | (cpustate->rxd & 1 ? 0x02 : 0x00); - if (cpustate->mcc & 0x04) /* PC2 = SCK input/output */ + if (cpustate->mcc & 0x04) /* PC2 = SCK input/output */ data = (data & ~0x04) | (cpustate->sck & 1 ? 0x04 : 0x00); - if (cpustate->mcc & 0x08) /* PC3 = TI input */ + if (cpustate->mcc & 0x08) /* PC3 = TI input */ data = (data & ~0x08) | (cpustate->ti & 1 ? 0x08 : 0x00); - if (cpustate->mcc & 0x10) /* PC4 = TO output */ + if (cpustate->mcc & 0x10) /* PC4 = TO output */ data = (data & ~0x10) | (cpustate->to & 1 ? 0x10 : 0x00); - if (cpustate->mcc & 0x20) /* PC5 = CI input */ + if (cpustate->mcc & 0x20) /* PC5 = CI input */ data = (data & ~0x20) | (cpustate->ci & 1 ? 0x20 : 0x00); - if (cpustate->mcc & 0x40) /* PC6 = CO0 output */ + if (cpustate->mcc & 0x40) /* PC6 = CO0 output */ data = (data & ~0x40) | (cpustate->co0 & 1 ? 0x40 : 0x00); - if (cpustate->mcc & 0x80) /* PC7 = CO1 output */ + if (cpustate->mcc & 0x80) /* PC7 = CO1 output */ data = (data & ~0x80) | (cpustate->co1 & 1 ? 0x80 : 0x00); memory_write_byte_8le(cpustate->io, port, data); break; @@ -1949,60 +1949,60 @@ static CPU_SET_INFO( upd7810 ) case CPUINFO_INT_INPUT_STATE + UPD7810_INTF2: set_irq_line(cpustate, UPD7810_INTF2, info->i); break; case CPUINFO_INT_INPUT_STATE + UPD7810_INTFE1: set_irq_line(cpustate, UPD7810_INTFE1, info->i); break; - case CPUINFO_INT_PC: PC = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_PC: PC = info->i; break; + case CPUINFO_INT_PC: PC = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_PC: PC = info->i; break; case CPUINFO_INT_SP: - case CPUINFO_INT_REGISTER + UPD7810_SP: SP = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_PSW: PSW = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_A: A = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_V: V = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_EA: EA = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_VA: VA = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_BC: BC = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_DE: DE = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_HL: HL = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_EA2: EA2 = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_VA2: VA2 = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_BC2: BC2 = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_DE2: DE2 = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_HL2: HL2 = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_SP: SP = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_PSW: PSW = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_A: A = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_V: V = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_EA: EA = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_VA: VA = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_BC: BC = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_DE: DE = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_HL: HL = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_EA2: EA2 = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_VA2: VA2 = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_BC2: BC2 = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_DE2: DE2 = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_HL2: HL2 = info->i; break; case CPUINFO_INT_REGISTER + UPD7810_CNT0: CNT0 = info->i; break; case CPUINFO_INT_REGISTER + UPD7810_CNT1: CNT1 = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_TM0: TM0 = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_TM1: TM1 = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_TM0: TM0 = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_TM1: TM1 = info->i; break; case CPUINFO_INT_REGISTER + UPD7810_ECNT: ECNT = info->i; break; case CPUINFO_INT_REGISTER + UPD7810_ECPT: ECPT = info->i; break; case CPUINFO_INT_REGISTER + UPD7810_ETM0: ETM0 = info->i; break; case CPUINFO_INT_REGISTER + UPD7810_ETM1: ETM1 = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_MA: MA = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_MB: MB = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_MCC: MCC = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_MC: MC = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_MM: MM = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_MF: MF = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_TMM: TMM = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_MA: MA = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_MB: MB = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_MCC: MCC = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_MC: MC = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_MM: MM = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_MF: MF = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_TMM: TMM = info->i; break; case CPUINFO_INT_REGISTER + UPD7810_ETMM: ETMM = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_EOM: EOM = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_SML: SML = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_SMH: SMH = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_ANM: ANM = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_MKL: MKL = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_MKH: MKH = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_ZCM: ZCM = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_TXB: TXB = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_RXB: RXB = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_CR0: CR0 = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_CR1: CR1 = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_CR2: CR2 = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_CR3: CR3 = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_TXD: TXD = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_RXD: RXD = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_SCK: SCK = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_TI: TI = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_TO: TO = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_CI: CI = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_CO0: CO0 = info->i; break; - case CPUINFO_INT_REGISTER + UPD7810_CO1: CO1 = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_EOM: EOM = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_SML: SML = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_SMH: SMH = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_ANM: ANM = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_MKL: MKL = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_MKH: MKH = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_ZCM: ZCM = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_TXB: TXB = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_RXB: RXB = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_CR0: CR0 = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_CR1: CR1 = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_CR2: CR2 = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_CR3: CR3 = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_TXD: TXD = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_RXD: RXD = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_SCK: SCK = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_TI: TI = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_TO: TO = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_CI: CI = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_CO0: CO0 = info->i; break; + case CPUINFO_INT_REGISTER + UPD7810_CO1: CO1 = info->i; break; } } @@ -2033,11 +2033,11 @@ CPU_GET_INFO( upd7810 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 8; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = (IRR & INTNMI) ? ASSERT_LINE : CLEAR_LINE; break; case CPUINFO_INT_INPUT_STATE + UPD7810_INTF1: info->i = (IRR & INTF1) ? ASSERT_LINE : CLEAR_LINE; break; diff --git a/src/emu/cpu/v30mz/necmodrm.h b/src/emu/cpu/v30mz/necmodrm.h index 591a506827e..23cfedffad7 100644 --- a/src/emu/cpu/v30mz/necmodrm.h +++ b/src/emu/cpu/v30mz/necmodrm.h @@ -15,8 +15,8 @@ static struct { #define GetRMWord(ModRM) \ ((ModRM) >= 0xc0 ? cpustate->regs.w[Mod_RM.RM.w[ModRM]] : ( (*GetEA[ModRM])(cpustate), ReadWord( cpustate->ea ) )) -#define PutbackRMWord(ModRM,val) \ -{ \ +#define PutbackRMWord(ModRM,val) \ +{ \ if (ModRM >= 0xc0) cpustate->regs.w[Mod_RM.RM.w[ModRM]]=val; \ else WriteWord(cpustate->ea,val); \ } diff --git a/src/emu/cpu/v30mz/v30mz.c b/src/emu/cpu/v30mz/v30mz.c index 88819d37a42..6503d0e9fdd 100644 --- a/src/emu/cpu/v30mz/v30mz.c +++ b/src/emu/cpu/v30mz/v30mz.c @@ -65,7 +65,7 @@ typedef struct _v30mz_state v30mz_state; struct _v30mz_state { necbasicregs regs; - UINT16 sregs[4]; + UINT16 sregs[4]; UINT16 ip; @@ -216,7 +216,7 @@ static void external_int(v30mz_state *cpustate) #define OP(num,func_name) static void func_name(v30mz_state *cpustate) -OP( 0x00, i_add_br8 ) { DEF_br8; ADDB; PutbackRMByte(ModRM,dst); CLKM(1,3); } +OP( 0x00, i_add_br8 ) { DEF_br8; ADDB; PutbackRMByte(ModRM,dst); CLKM(1,3); } OP( 0x01, i_add_wr16 ) { DEF_wr16; ADDW; PutbackRMWord(ModRM,dst); CLKM(1,3);} OP( 0x02, i_add_r8b ) { DEF_r8b; ADDB; RegByte(ModRM)=dst; CLKM(1,2); } OP( 0x03, i_add_r16w ) { DEF_r16w; ADDW; RegWord(ModRM)=dst; CLKM(1,2); } @@ -267,25 +267,25 @@ OP( 0x0f, i_pre_nec ) { UINT32 ModRM, tmp, tmp2; } } -OP( 0x10, i_adc_br8 ) { DEF_br8; src+=CF; ADDB; PutbackRMByte(ModRM,dst); CLKM(1,3); } +OP( 0x10, i_adc_br8 ) { DEF_br8; src+=CF; ADDB; PutbackRMByte(ModRM,dst); CLKM(1,3); } OP( 0x11, i_adc_wr16 ) { DEF_wr16; src+=CF; ADDW; PutbackRMWord(ModRM,dst); CLKM(1,3);} -OP( 0x12, i_adc_r8b ) { DEF_r8b; src+=CF; ADDB; RegByte(ModRM)=dst; CLKM(1,2); } +OP( 0x12, i_adc_r8b ) { DEF_r8b; src+=CF; ADDB; RegByte(ModRM)=dst; CLKM(1,2); } OP( 0x13, i_adc_r16w ) { DEF_r16w; src+=CF; ADDW; RegWord(ModRM)=dst; CLKM(1,2); } OP( 0x14, i_adc_ald8 ) { DEF_ald8; src+=CF; ADDB; cpustate->regs.b[AL]=dst; CLK(1); } OP( 0x15, i_adc_axd16) { DEF_axd16; src+=CF; ADDW; cpustate->regs.w[AW]=dst; CLK(1); } OP( 0x16, i_push_ss ) { PUSH(cpustate->sregs[SS]); CLK(2); } OP( 0x17, i_pop_ss ) { POP(cpustate->sregs[SS]); CLK(3); cpustate->no_interrupt=1; } -OP( 0x18, i_sbb_br8 ) { DEF_br8; src+=CF; SUBB; PutbackRMByte(ModRM,dst); CLKM(1,3); } +OP( 0x18, i_sbb_br8 ) { DEF_br8; src+=CF; SUBB; PutbackRMByte(ModRM,dst); CLKM(1,3); } OP( 0x19, i_sbb_wr16 ) { DEF_wr16; src+=CF; SUBW; PutbackRMWord(ModRM,dst); CLKM(1,3);} -OP( 0x1a, i_sbb_r8b ) { DEF_r8b; src+=CF; SUBB; RegByte(ModRM)=dst; CLKM(1,2); } +OP( 0x1a, i_sbb_r8b ) { DEF_r8b; src+=CF; SUBB; RegByte(ModRM)=dst; CLKM(1,2); } OP( 0x1b, i_sbb_r16w ) { DEF_r16w; src+=CF; SUBW; RegWord(ModRM)=dst; CLKM(1,2); } OP( 0x1c, i_sbb_ald8 ) { DEF_ald8; src+=CF; SUBB; cpustate->regs.b[AL]=dst; CLK(1); } OP( 0x1d, i_sbb_axd16) { DEF_axd16; src+=CF; SUBW; cpustate->regs.w[AW]=dst; CLK(1); } OP( 0x1e, i_push_ds ) { PUSH(cpustate->sregs[DS]); CLK(2); } OP( 0x1f, i_pop_ds ) { POP(cpustate->sregs[DS]); CLK(3); } -OP( 0x20, i_and_br8 ) { DEF_br8; ANDB; PutbackRMByte(ModRM,dst); CLKM(1,3); } +OP( 0x20, i_and_br8 ) { DEF_br8; ANDB; PutbackRMByte(ModRM,dst); CLKM(1,3); } OP( 0x21, i_and_wr16 ) { DEF_wr16; ANDW; PutbackRMWord(ModRM,dst); CLKM(1,3);} OP( 0x22, i_and_r8b ) { DEF_r8b; ANDB; RegByte(ModRM)=dst; CLKM(1,2); } OP( 0x23, i_and_r16w ) { DEF_r16w; ANDW; RegWord(ModRM)=dst; CLKM(1,2); } @@ -294,9 +294,9 @@ OP( 0x25, i_and_axd16) { DEF_axd16; ANDW; cpustate->regs.w[AW]=dst; CLK(1); } OP( 0x26, i_es ) { cpustate->seg_prefix=TRUE; cpustate->prefix_base=cpustate->sregs[ES]<<4; CLK(1); nec_instruction[FETCHOP](cpustate); cpustate->seg_prefix=FALSE; } OP( 0x27, i_daa ) { ADJ4(6,0x60); CLK(10); } -OP( 0x28, i_sub_br8 ) { DEF_br8; SUBB; PutbackRMByte(ModRM,dst); CLKM(1,3); } +OP( 0x28, i_sub_br8 ) { DEF_br8; SUBB; PutbackRMByte(ModRM,dst); CLKM(1,3); } OP( 0x29, i_sub_wr16 ) { DEF_wr16; SUBW; PutbackRMWord(ModRM,dst); CLKM(1,3);} -OP( 0x2a, i_sub_r8b ) { DEF_r8b; SUBB; RegByte(ModRM)=dst; CLKM(1,2); } +OP( 0x2a, i_sub_r8b ) { DEF_r8b; SUBB; RegByte(ModRM)=dst; CLKM(1,2); } OP( 0x2b, i_sub_r16w ) { DEF_r16w; SUBW; RegWord(ModRM)=dst; CLKM(1,2); } OP( 0x2c, i_sub_ald8 ) { DEF_ald8; SUBB; cpustate->regs.b[AL]=dst; CLK(1); } OP( 0x2d, i_sub_axd16) { DEF_axd16; SUBW; cpustate->regs.w[AW]=dst; CLK(1); } @@ -305,7 +305,7 @@ OP( 0x2f, i_das ) { ADJ4(-6,-0x60); CLK(10); } OP( 0x30, i_xor_br8 ) { DEF_br8; XORB; PutbackRMByte(ModRM,dst); CLKM(1,3); } OP( 0x31, i_xor_wr16 ) { DEF_wr16; XORW; PutbackRMWord(ModRM,dst); CLKM(1,3);} -OP( 0x32, i_xor_r8b ) { DEF_r8b; XORB; RegByte(ModRM)=dst; CLKM(1,2); } +OP( 0x32, i_xor_r8b ) { DEF_r8b; XORB; RegByte(ModRM)=dst; CLKM(1,2); } OP( 0x33, i_xor_r16w ) { DEF_r16w; XORW; RegWord(ModRM)=dst; CLKM(1,2); } OP( 0x34, i_xor_ald8 ) { DEF_ald8; XORB; cpustate->regs.b[AL]=dst; CLK(1); } OP( 0x35, i_xor_axd16) { DEF_axd16; XORW; cpustate->regs.w[AW]=dst; CLK(1); } @@ -395,7 +395,7 @@ OP( 0x62, i_chkind ) { } logerror("%06x: bound %04x high %04x low %04x tmp\n",PC(cpustate),high,low,tmp); } -OP( 0x64, i_repnc ) { UINT32 next = FETCHOP; UINT16 c = cpustate->regs.w[CW]; +OP( 0x64, i_repnc ) { UINT32 next = FETCHOP; UINT16 c = cpustate->regs.w[CW]; switch(next) { /* Segments */ case 0x26: cpustate->seg_prefix=TRUE; cpustate->prefix_base=cpustate->sregs[ES]<<4; next = FETCHOP; CLK(2); break; case 0x2e: cpustate->seg_prefix=TRUE; cpustate->prefix_base=cpustate->sregs[CS]<<4; next = FETCHOP; CLK(2); break; @@ -423,7 +423,7 @@ OP( 0x64, i_repnc ) { UINT32 next = FETCHOP; UINT16 c = cpustate->regs.w[CW]; cpustate->seg_prefix=FALSE; } -OP( 0x65, i_repc ) { UINT32 next = FETCHOP; UINT16 c = cpustate->regs.w[CW]; +OP( 0x65, i_repc ) { UINT32 next = FETCHOP; UINT16 c = cpustate->regs.w[CW]; switch(next) { /* Segments */ case 0x26: cpustate->seg_prefix=TRUE; cpustate->prefix_base=cpustate->sregs[ES]<<4; next = FETCHOP; CLK(2); break; case 0x2e: cpustate->seg_prefix=TRUE; cpustate->prefix_base=cpustate->sregs[CS]<<4; next = FETCHOP; CLK(2); break; @@ -452,7 +452,7 @@ OP( 0x65, i_repc ) { UINT32 next = FETCHOP; UINT16 c = cpustate->regs.w[CW]; } OP( 0x68, i_push_d16 ) { UINT32 tmp; FETCHWORD(tmp); PUSH(tmp); CLK(1); } -OP( 0x69, i_imul_d16 ) { UINT32 tmp; DEF_r16w; FETCHWORD(tmp); dst = (INT32)((INT16)src)*(INT32)((INT16)tmp); cpustate->CarryVal = cpustate->OverVal = (((INT32)dst) >> 15 != 0) && (((INT32)dst) >> 15 != -1); RegWord(ModRM)=(WORD)dst; if (ModRM >= 0xc0) CLK(3) else CLK(4) } +OP( 0x69, i_imul_d16 ) { UINT32 tmp; DEF_r16w; FETCHWORD(tmp); dst = (INT32)((INT16)src)*(INT32)((INT16)tmp); cpustate->CarryVal = cpustate->OverVal = (((INT32)dst) >> 15 != 0) && (((INT32)dst) >> 15 != -1); RegWord(ModRM)=(WORD)dst; if (ModRM >= 0xc0) CLK(3) else CLK(4) } OP( 0x6a, i_push_d8 ) { UINT32 tmp = (WORD)((INT16)((INT8)FETCH)); PUSH(tmp); CLK(1); } OP( 0x6b, i_imul_d8 ) { UINT32 src2; DEF_r16w; src2= (WORD)((INT16)((INT8)FETCH)); dst = (INT32)((INT16)src)*(INT32)((INT16)src2); cpustate->CarryVal = cpustate->OverVal = (((INT32)dst) >> 15 != 0) && (((INT32)dst) >> 15 != -1); RegWord(ModRM)=(WORD)dst; if (ModRM >= 0xc0) CLK(3) else CLK(4) } OP( 0x6c, i_insb ) { PutMemB(ES,cpustate->regs.w[IY],read_port(cpustate->regs.w[DW])); cpustate->regs.w[IY]+= -2 * cpustate->DF + 1; CLK(6); } @@ -538,12 +538,12 @@ OP( 0x85, i_test_wr16 ) { DEF_wr16; ANDW; CLKM(1,2); } OP( 0x86, i_xchg_br8 ) { DEF_br8; RegByte(ModRM)=dst; PutbackRMByte(ModRM,src); CLKM(3,5); } OP( 0x87, i_xchg_wr16 ) { DEF_wr16; RegWord(ModRM)=dst; PutbackRMWord(ModRM,src); CLKM(3,5); } -OP( 0x88, i_mov_br8 ) { UINT8 src; GetModRM; src = RegByte(ModRM); PutRMByte(ModRM,src); CLK(1); } -OP( 0x89, i_mov_wr16 ) { UINT16 src; GetModRM; src = RegWord(ModRM); PutRMWord(ModRM,src); CLK(1); } +OP( 0x88, i_mov_br8 ) { UINT8 src; GetModRM; src = RegByte(ModRM); PutRMByte(ModRM,src); CLK(1); } +OP( 0x89, i_mov_wr16 ) { UINT16 src; GetModRM; src = RegWord(ModRM); PutRMWord(ModRM,src); CLK(1); } OP( 0x8a, i_mov_r8b ) { UINT8 src; GetModRM; src = GetRMByte(ModRM); RegByte(ModRM)=src; CLK(1); } OP( 0x8b, i_mov_r16w ) { UINT16 src; GetModRM; src = GetRMWord(ModRM); RegWord(ModRM)=src; CLK(1); } OP( 0x8c, i_mov_wsreg ) { GetModRM; PutRMWord(ModRM,cpustate->sregs[(ModRM & 0x38) >> 3]); CLKM(1,3); } -OP( 0x8d, i_lea ) { UINT16 ModRM = FETCH; (void)(*GetEA[ModRM])(cpustate); RegWord(ModRM)=cpustate->eo; CLK(1); } +OP( 0x8d, i_lea ) { UINT16 ModRM = FETCH; (void)(*GetEA[ModRM])(cpustate); RegWord(ModRM)=cpustate->eo; CLK(1); } OP( 0x8e, i_mov_sregw ) { UINT16 src; GetModRM; src = GetRMWord(ModRM); CLKM(2,3); switch (ModRM & 0x38) { case 0x00: cpustate->sregs[ES] = src; break; /* mov es,ew */ @@ -588,12 +588,12 @@ OP( 0xa7, i_cmpsw ) { UINT32 src = GetMemW(ES, cpustate->regs.w[IY]); UINT3 OP( 0xa8, i_test_ald8 ) { DEF_ald8; ANDB; CLK(1); } OP( 0xa9, i_test_axd16 ) { DEF_axd16; ANDW; CLK(1); } -OP( 0xaa, i_stosb ) { PutMemB(ES,cpustate->regs.w[IY],cpustate->regs.b[AL]); cpustate->regs.w[IY] += -2 * cpustate->DF + 1; CLK(3); } -OP( 0xab, i_stosw ) { PutMemW(ES,cpustate->regs.w[IY],cpustate->regs.w[AW]); cpustate->regs.w[IY] += -4 * cpustate->DF + 2; CLK(3); } +OP( 0xaa, i_stosb ) { PutMemB(ES,cpustate->regs.w[IY],cpustate->regs.b[AL]); cpustate->regs.w[IY] += -2 * cpustate->DF + 1; CLK(3); } +OP( 0xab, i_stosw ) { PutMemW(ES,cpustate->regs.w[IY],cpustate->regs.w[AW]); cpustate->regs.w[IY] += -4 * cpustate->DF + 2; CLK(3); } OP( 0xac, i_lodsb ) { cpustate->regs.b[AL] = GetMemB(DS,cpustate->regs.w[IX]); cpustate->regs.w[IX] += -2 * cpustate->DF + 1; CLK(3); } OP( 0xad, i_lodsw ) { cpustate->regs.w[AW] = GetMemW(DS,cpustate->regs.w[IX]); cpustate->regs.w[IX] += -4 * cpustate->DF + 2; CLK(3); } -OP( 0xae, i_scasb ) { UINT32 src = GetMemB(ES, cpustate->regs.w[IY]); UINT32 dst = cpustate->regs.b[AL]; SUBB; cpustate->regs.w[IY] += -2 * cpustate->DF + 1; CLK(4); } -OP( 0xaf, i_scasw ) { UINT32 src = GetMemW(ES, cpustate->regs.w[IY]); UINT32 dst = cpustate->regs.w[AW]; SUBW; cpustate->regs.w[IY] += -4 * cpustate->DF + 2; CLK(4); } +OP( 0xae, i_scasb ) { UINT32 src = GetMemB(ES, cpustate->regs.w[IY]); UINT32 dst = cpustate->regs.b[AL]; SUBB; cpustate->regs.w[IY] += -2 * cpustate->DF + 1; CLK(4); } +OP( 0xaf, i_scasw ) { UINT32 src = GetMemW(ES, cpustate->regs.w[IY]); UINT32 dst = cpustate->regs.w[AW]; SUBW; cpustate->regs.w[IY] += -4 * cpustate->DF + 2; CLK(4); } OP( 0xb0, i_mov_ald8 ) { cpustate->regs.b[AL] = FETCH; CLK(1); } OP( 0xb1, i_mov_cld8 ) { cpustate->regs.b[CL] = FETCH; CLK(1); } @@ -761,7 +761,7 @@ OP( 0xe7, i_outax ) { UINT8 port = FETCH; write_port(port, cpustate->regs.b[AL] OP( 0xe8, i_call_d16 ) { UINT32 tmp; FETCHWORD(tmp); PUSH(cpustate->ip); cpustate->ip = (WORD)(cpustate->ip+(INT16)tmp); CLK(5); } OP( 0xe9, i_jmp_d16 ) { UINT32 tmp; FETCHWORD(tmp); cpustate->ip = (WORD)(cpustate->ip+(INT16)tmp); CLK(4); } -OP( 0xea, i_jmp_far ) { UINT32 tmp,tmp1; FETCHWORD(tmp); FETCHWORD(tmp1); cpustate->sregs[CS] = (WORD)tmp1; cpustate->ip = (WORD)tmp; CLK(7); } +OP( 0xea, i_jmp_far ) { UINT32 tmp,tmp1; FETCHWORD(tmp); FETCHWORD(tmp1); cpustate->sregs[CS] = (WORD)tmp1; cpustate->ip = (WORD)tmp; CLK(7); } OP( 0xeb, i_jmp_d8 ) { int tmp = (int)((INT8)FETCH); CLK(4); if (tmp==-2 && cpustate->no_interrupt==0 && (cpustate->pending_irq==0) && cpustate->icount>0) cpustate->icount%=12; /* cycle skip */ cpustate->ip = (WORD)(cpustate->ip+tmp); @@ -833,7 +833,7 @@ OP( 0xf6, i_f6pre ) { UINT32 tmp; UINT32 uresult,uresult2; INT32 result,result2; switch (ModRM & 0x38) { case 0x00: tmp &= FETCH; cpustate->CarryVal = cpustate->OverVal = 0; SetSZPF_Byte(tmp); CLKM(1,2); break; /* TEST */ case 0x08: logerror("%06x: Undefined opcode 0xf6 0x08\n",PC(cpustate)); break; - case 0x10: PutbackRMByte(ModRM,~tmp); CLKM(1,3); break; /* NOT */ + case 0x10: PutbackRMByte(ModRM,~tmp); CLKM(1,3); break; /* NOT */ case 0x18: cpustate->CarryVal=(tmp!=0); tmp=(~tmp)+1; SetSZPF_Byte(tmp); PutbackRMByte(ModRM,tmp&0xff); CLKM(1,3); break; /* NEG */ case 0x20: uresult = cpustate->regs.b[AL]*tmp; cpustate->regs.w[AW]=(WORD)uresult; cpustate->CarryVal=cpustate->OverVal=(cpustate->regs.b[AH]!=0); CLKM(3,4); break; /* MULU */ case 0x28: result = (INT16)((INT8)cpustate->regs.b[AL])*(INT16)((INT8)tmp); cpustate->regs.w[AW]=(WORD)result; cpustate->CarryVal=cpustate->OverVal=(cpustate->regs.b[AH]!=0); CLKM(3,4); break; /* MUL */ @@ -847,13 +847,13 @@ OP( 0xf7, i_f7pre ) { UINT32 tmp,tmp2; UINT32 uresult,uresult2; INT32 result,r switch (ModRM & 0x38) { case 0x00: FETCHWORD(tmp2); tmp &= tmp2; cpustate->CarryVal = cpustate->OverVal = 0; SetSZPF_Word(tmp); CLKM(1,2); break; /* TEST */ case 0x08: logerror("%06x: Undefined opcode 0xf7 0x08\n",PC(cpustate)); break; - case 0x10: PutbackRMWord(ModRM,~tmp); CLKM(1,3); break; /* NOT */ + case 0x10: PutbackRMWord(ModRM,~tmp); CLKM(1,3); break; /* NOT */ case 0x18: cpustate->CarryVal=(tmp!=0); tmp=(~tmp)+1; SetSZPF_Word(tmp); PutbackRMWord(ModRM,tmp&0xffff); CLKM(1,3); break; /* NEG */ case 0x20: uresult = cpustate->regs.w[AW]*tmp; cpustate->regs.w[AW]=uresult&0xffff; cpustate->regs.w[DW]=((UINT32)uresult)>>16; cpustate->CarryVal=cpustate->OverVal=(cpustate->regs.w[DW]!=0); CLKM(3,4); break; /* MULU */ case 0x28: result = (INT32)((INT16)cpustate->regs.w[AW])*(INT32)((INT16)tmp); cpustate->regs.w[AW]=result&0xffff; cpustate->regs.w[DW]=result>>16; cpustate->CarryVal=cpustate->OverVal=(cpustate->regs.w[DW]!=0); CLKM(3,4); break; /* MUL */ case 0x30: if (tmp) { DIVUW; } else nec_interrupt(cpustate,0,0); CLKM(23,24); break; case 0x38: if (tmp) { DIVW; } else nec_interrupt(cpustate,0,0); CLKM(24,25); break; - } + } } OP( 0xf8, i_clc ) { cpustate->CarryVal = 0; CLK(4); } @@ -1063,11 +1063,11 @@ CPU_GET_INFO( v30mz ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 20; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 16; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 16; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + 0: info->i = (cpustate->pending_irq & INT_IRQ) ? ASSERT_LINE : CLEAR_LINE; break; case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_state; break; diff --git a/src/emu/cpu/v30mz/v30mz.h b/src/emu/cpu/v30mz/v30mz.h index e143604a78b..b5579606b3d 100644 --- a/src/emu/cpu/v30mz/v30mz.h +++ b/src/emu/cpu/v30mz/v30mz.h @@ -136,16 +136,16 @@ typedef enum { #define IncWordReg(Reg) \ unsigned tmp = (unsigned)cpustate->regs.w[Reg]; \ unsigned tmp1 = tmp+1; \ - cpustate->OverVal = (tmp == 0x7fff); \ + cpustate->OverVal = (tmp == 0x7fff); \ SetAF(tmp1,tmp,1); \ SetSZPF_Word(tmp1); \ cpustate->regs.w[Reg]=tmp1 #define DecWordReg(Reg) \ unsigned tmp = (unsigned)cpustate->regs.w[Reg]; \ - unsigned tmp1 = tmp-1; \ - cpustate->OverVal = (tmp == 0x8000); \ - SetAF(tmp1,tmp,1); \ + unsigned tmp1 = tmp-1; \ + cpustate->OverVal = (tmp == 0x8000); \ + SetAF(tmp1,tmp,1); \ SetSZPF_Word(tmp1); \ cpustate->regs.w[Reg]=tmp1 @@ -215,10 +215,10 @@ typedef enum { else \ tmp |= (1<<tmp2) -#define XchgAWReg(Reg) \ - WORD tmp; \ - tmp = cpustate->regs.w[Reg]; \ - cpustate->regs.w[Reg] = cpustate->regs.w[AW]; \ +#define XchgAWReg(Reg) \ + WORD tmp; \ + tmp = cpustate->regs.w[Reg]; \ + cpustate->regs.w[Reg] = cpustate->regs.w[AW]; \ cpustate->regs.w[AW] = tmp #define ROL_BYTE cpustate->CarryVal = dst & 0x80; dst = (dst << 1)+CF diff --git a/src/emu/cpu/v60/op12.c b/src/emu/cpu/v60/op12.c index 1055040a9cc..efb58d91a9d 100644 --- a/src/emu/cpu/v60/op12.c +++ b/src/emu/cpu/v60/op12.c @@ -16,21 +16,21 @@ * Macro to access data in operands decoded with ReadAMAddress(cpustate) */ -#define F12LOADOPBYTE(cs, num) \ +#define F12LOADOPBYTE(cs, num) \ if ((cs)->flag##num) \ appb = (UINT8)(cs)->reg[(cs)->op##num]; \ else \ appb = MemRead8((cs)->program, (cs)->op##num); -#define F12LOADOPHALF(cs, num) \ +#define F12LOADOPHALF(cs, num) \ if ((cs)->flag##num) \ - apph = (UINT16)(cs)->reg[(cs)->op##num]; \ + apph = (UINT16)(cs)->reg[(cs)->op##num]; \ else \ apph = MemRead16((cs)->program, (cs)->op##num); -#define F12LOADOPWORD(cs, num) \ +#define F12LOADOPWORD(cs, num) \ if ((cs)->flag##num) \ - appw = (cs)->reg[(cs)->op##num]; \ + appw = (cs)->reg[(cs)->op##num]; \ else \ appw = MemRead32((cs)->program,(cs)->op##num); diff --git a/src/emu/cpu/v60/op2.c b/src/emu/cpu/v60/op2.c index f002d3a375c..856249693f1 100644 --- a/src/emu/cpu/v60/op2.c +++ b/src/emu/cpu/v60/op2.c @@ -3,15 +3,15 @@ #define F2END(cs) \ return 2 + (cs)->amlength1 + (cs)->amlength2; -#define F2LOADOPFLOAT(cs, num) \ +#define F2LOADOPFLOAT(cs, num) \ if ((cs)->flag##num) \ - appf = u2f((cs)->reg[(cs)->op##num]); \ + appf = u2f((cs)->reg[(cs)->op##num]); \ else \ appf = u2f(MemRead32((cs)->program, (cs)->op##num)); -#define F2STOREOPFLOAT(cs,num) \ +#define F2STOREOPFLOAT(cs,num) \ if ((cs)->flag##num) \ - (cs)->reg[(cs)->op##num] = f2u(appf); \ + (cs)->reg[(cs)->op##num] = f2u(appf); \ else \ MemWrite32((cs)->program, (cs)->op##num, f2u(appf)); diff --git a/src/emu/cpu/v60/op7a.c b/src/emu/cpu/v60/op7a.c index 171c12a5e08..fd87230c218 100644 --- a/src/emu/cpu/v60/op7a.c +++ b/src/emu/cpu/v60/op7a.c @@ -579,7 +579,7 @@ static UINT32 opEXTBFZ(v60_state *cpustate) /* TRUSTED */ static UINT32 opEXTBFS(v60_state *cpustate) /* TRUSTED */ { - F7bDecodeFirstOperand(cpustate, BitReadAM, 11); + F7bDecodeFirstOperand(cpustate, BitReadAM, 11); F7BCREATEBITMASK(cpustate->lenop1); diff --git a/src/emu/cpu/v60/v60.c b/src/emu/cpu/v60/v60.c index d377a52ebb1..d332df57cb8 100644 --- a/src/emu/cpu/v60/v60.c +++ b/src/emu/cpu/v60/v60.c @@ -55,8 +55,8 @@ #define ADDW(dst, src) { unsigned res = (dst) + (src); SetCFW(res); SetOFW_Add(res, src, dst); SetSZPF_Word(res); dst = (UINT16)res; } #define ADDL(dst, src) { UINT64 res = (UINT64)(dst) + (UINT64)(src); SetCFL(res); SetOFL_Add(res, src, dst); SetSZPF_Long(res); dst = (UINT32)res; } -#define SETREG8(a, b) (a) = ((a) & ~0xff) | ((b) & 0xff) -#define SETREG16(a, b) (a) = ((a) & ~0xffff) | ((b) & 0xffff) +#define SETREG8(a, b) (a) = ((a) & ~0xff) | ((b) & 0xff) +#define SETREG16(a, b) (a) = ((a) & ~0xffff) | ((b) & 0xffff) typedef struct _v60_flags v60_flags; struct _v60_flags @@ -72,42 +72,42 @@ typedef struct _v60_state v60_state; struct _v60_state { struct cpu_info info; - UINT32 reg[68]; + UINT32 reg[68]; v60_flags flags; - UINT8 irq_line; - UINT8 nmi_line; - cpu_irq_callback irq_cb; + UINT8 irq_line; + UINT8 nmi_line; + cpu_irq_callback irq_cb; const device_config *device; const address_space *program; const address_space *io; - UINT32 PPC; + UINT32 PPC; int icount; int stall_io; - UINT32 op1, op2; - UINT8 flag1, flag2; - UINT8 instflags; + UINT32 op1, op2; + UINT8 flag1, flag2; + UINT8 instflags; UINT32 lenop1, lenop2; UINT8 subop; UINT32 bamoffset1, bamoffset2; // Output variables for ReadAMAddress(cpustate) - UINT8 amflag; - UINT32 amout; - UINT32 bamoffset; + UINT8 amflag; + UINT32 amout; + UINT32 bamoffset; // Appo temp var - UINT32 amlength1, amlength2; + UINT32 amlength1, amlength2; // Global vars used by AM functions - UINT32 modadd; - UINT8 modm; - UINT8 modval; - UINT8 modval2; - UINT8 modwritevalb; - UINT16 modwritevalh; - UINT32 modwritevalw; - UINT8 moddim; + UINT32 modadd; + UINT8 modm; + UINT8 modval; + UINT8 modval2; + UINT8 modwritevalb; + UINT16 modwritevalh; + UINT32 modwritevalw; + UINT8 moddim; }; INLINE v60_state *get_safe_token(const device_config *device) @@ -130,12 +130,12 @@ INLINE v60_state *get_safe_token(const device_config *device) #define _CY flags.CY #define _OV flags.OV -#define _S flags.S -#define _Z flags.Z +#define _S flags.S +#define _Z flags.Z // Defines of all v60 register... -#define R0 reg[0] +#define R0 reg[0] #define R1 reg[1] #define R2 reg[2] #define R3 reg[3] @@ -164,9 +164,9 @@ INLINE v60_state *get_safe_token(const device_config *device) #define R26 reg[26] #define R27 reg[27] #define R28 reg[28] -#define AP reg[29] +#define AP reg[29] #define FP reg[30] -#define SP reg[31] +#define SP reg[31] #define PC reg[32] #define PSW reg[33] @@ -571,11 +571,11 @@ CPU_GET_INFO( v60 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 24; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 16; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 24; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 24; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + 0: info->i = cpustate->irq_line; break; case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_line; break; @@ -715,11 +715,11 @@ CPU_GET_INFO( v60 ) case CPUINFO_STR_REGISTER + V60_ATLR2: sprintf(info->s, "ATLR2:%08X", cpustate->ATLR2); break; case CPUINFO_STR_REGISTER + V60_ATBR3: sprintf(info->s, "ATBR3:%08X", cpustate->ATBR3); break; case CPUINFO_STR_REGISTER + V60_ATLR3: sprintf(info->s, "ATLR3:%08X", cpustate->ATLR3); break; - case CPUINFO_STR_REGISTER + V60_TRMODE: sprintf(info->s, "TRMODE:%08X", cpustate->TRMODE); break; + case CPUINFO_STR_REGISTER + V60_TRMODE: sprintf(info->s, "TRMODE:%08X", cpustate->TRMODE); break; case CPUINFO_STR_REGISTER + V60_ADTR0: sprintf(info->s, "ADTR0:%08X", cpustate->ADTR0); break; case CPUINFO_STR_REGISTER + V60_ADTR1: sprintf(info->s, "ADTR1:%08X", cpustate->ADTR1); break; - case CPUINFO_STR_REGISTER + V60_ADTMR0: sprintf(info->s, "ADTMR0:%08X", cpustate->ADTMR0); break; - case CPUINFO_STR_REGISTER + V60_ADTMR1: sprintf(info->s, "ADTMR1:%08X", cpustate->ADTMR1); break; + case CPUINFO_STR_REGISTER + V60_ADTMR0: sprintf(info->s, "ADTMR0:%08X", cpustate->ADTMR0); break; + case CPUINFO_STR_REGISTER + V60_ADTMR1: sprintf(info->s, "ADTMR1:%08X", cpustate->ADTMR1); break; } } diff --git a/src/emu/cpu/v810/v810.c b/src/emu/cpu/v810/v810.c index 0b34484146e..fa2019a1fd8 100644 --- a/src/emu/cpu/v810/v810.c +++ b/src/emu/cpu/v810/v810.c @@ -190,7 +190,7 @@ static UINT32 opMOVEA(v810_state *cpustate,UINT32 op) // movea imm16, reg1, reg2 return clkIF; } -static UINT32 opMOVHI(v810_state *cpustate,UINT32 op) // movhi imm16, reg1 ,reg2 +static UINT32 opMOVHI(v810_state *cpustate,UINT32 op) // movhi imm16, reg1 ,reg2 { UINT32 op2=R_OP(cpustate,cpustate->PC); cpustate->PC+=2; @@ -200,7 +200,7 @@ static UINT32 opMOVHI(v810_state *cpustate,UINT32 op) // movhi imm16, reg1 ,reg return clkIF; } -static UINT32 opMOVi(v810_state *cpustate,UINT32 op) // mov imm5,r2 +static UINT32 opMOVi(v810_state *cpustate,UINT32 op) // mov imm5,r2 { SETREG(cpustate,GET2,I5(op)); return clkIF; @@ -958,40 +958,40 @@ static UINT32 (*const OpCodeTable[64])(v810_state *cpustate,UINT32 op) = /* 0x1b */ opUNDEF, /* 0x1c */ opLDSR, // ldsr reg2,regID 2 /* 0x1d */ opSTSR, // stsr regID,reg2 2 - /* 0x1e */ opDI, // DI 2 + /* 0x1e */ opDI, // DI 2 /* 0x1f */ opUNDEF, - /* 0x20 */ opB, // Branch (7 bit opcode) - /* 0x21 */ opB, // Branch (7 bit opcode) - /* 0x22 */ opB, // Branch (7 bit opcode) - /* 0x23 */ opB, // Branch (7 bit opcode) - /* 0x24 */ opB, // Branch (7 bit opcode) - /* 0x25 */ opB, // Branch (7 bit opcode) - /* 0x26 */ opB, // Branch (7 bit opcode) - /* 0x27 */ opB, // Branch (7 bit opcode) - /* 0x28 */ opMOVEA, // movea imm16, reg1, reg2 5 + /* 0x20 */ opB, // Branch (7 bit opcode) + /* 0x21 */ opB, // Branch (7 bit opcode) + /* 0x22 */ opB, // Branch (7 bit opcode) + /* 0x23 */ opB, // Branch (7 bit opcode) + /* 0x24 */ opB, // Branch (7 bit opcode) + /* 0x25 */ opB, // Branch (7 bit opcode) + /* 0x26 */ opB, // Branch (7 bit opcode) + /* 0x27 */ opB, // Branch (7 bit opcode) + /* 0x28 */ opMOVEA, // movea imm16, reg1, reg2 5 /* 0x29 */ opADDI, // addi imm16, reg1, reg2 5 - /* 0x2a */ opJR, // jr disp26 4 - /* 0x2b */ opJAL, // jal disp26 4 - /* 0x2c */ opORI, // ori imm16, reg1, reg2 5 + /* 0x2a */ opJR, // jr disp26 4 + /* 0x2b */ opJAL, // jal disp26 4 + /* 0x2c */ opORI, // ori imm16, reg1, reg2 5 /* 0x2d */ opANDI, // andi imm16, reg1, reg2 5 /* 0x2e */ opXORI, // xori imm16, reg1, reg2 5 - /* 0x2f */ opMOVHI, // movhi imm16, reg1 ,reg2 5 - /* 0x30 */ opLDB, // ld.b disp16[reg1],reg2 6a - /* 0x31 */ opLDH, // ld.h disp16[reg1],reg2 6a + /* 0x2f */ opMOVHI, // movhi imm16, reg1 ,reg2 5 + /* 0x30 */ opLDB, // ld.b disp16[reg1],reg2 6a + /* 0x31 */ opLDH, // ld.h disp16[reg1],reg2 6a /* 0x32 */ opUNDEF, - /* 0x33 */ opLDW, // ld.w disp16[reg1],reg2 6a - /* 0x34 */ opSTB, // st.b reg2, disp16[reg1] 6b - /* 0x35 */ opSTH, // st.h reg2, disp16[reg1] 6b + /* 0x33 */ opLDW, // ld.w disp16[reg1],reg2 6a + /* 0x34 */ opSTB, // st.b reg2, disp16[reg1] 6b + /* 0x35 */ opSTH, // st.h reg2, disp16[reg1] 6b /* 0x36 */ opUNDEF, - /* 0x37 */ opSTW, // st.w reg2, disp16[reg1] 6b - /* 0x38 */ opINB, // in.b disp16[reg1], reg2 6a - /* 0x39 */ opINH, // in.h disp16[reg1], reg2 6a + /* 0x37 */ opSTW, // st.w reg2, disp16[reg1] 6b + /* 0x38 */ opINB, // in.b disp16[reg1], reg2 6a + /* 0x39 */ opINH, // in.h disp16[reg1], reg2 6a /* 0x3a */ opCAXI, // caxi disp16[reg1],reg2 6a - /* 0x3b */ opINW, // in.w disp16[reg1], reg2 6a + /* 0x3b */ opINW, // in.w disp16[reg1], reg2 6a /* 0x3c */ opOUTB, // out.b reg2, disp16[reg1] 6b /* 0x3d */ opOUTH, // out.h reg2, disp16[reg1] 6b /* 0x3e */ opFpoint, //floating point opcodes - /* 0x3f */ opOUTW // out.w reg2, disp16[reg1] 6b + /* 0x3f */ opOUTW // out.w reg2, disp16[reg1] 6b }; static CPU_INIT( v810 ) @@ -1167,11 +1167,11 @@ CPU_GET_INFO( v810 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 32; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 32; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 32; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 32; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + 0: info->i = cpustate->irq_line; break; case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_line; break; @@ -1179,7 +1179,7 @@ CPU_GET_INFO( v810 ) case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->PPC; break; case CPUINFO_INT_REGISTER + V810_PC: - case CPUINFO_INT_PC: info->i = cpustate->PC; break; + case CPUINFO_INT_PC: info->i = cpustate->PC; break; case CPUINFO_INT_REGISTER + V810_R0: info->i = cpustate->R0; break; case CPUINFO_INT_REGISTER + V810_R1: info->i = cpustate->R1; break; diff --git a/src/emu/cpu/v810/v810dasm.c b/src/emu/cpu/v810/v810dasm.c index 299fb65a00f..0245f1a5248 100644 --- a/src/emu/cpu/v810/v810dasm.c +++ b/src/emu/cpu/v810/v810dasm.c @@ -59,7 +59,7 @@ CPU_DISASSEMBLE( v810 ) case 0x09: sprintf(buffer,"DIV %s,%s",GET1s(opc),GET2s(opc)); size=2; break; case 0x0a: sprintf(buffer,"MULU %s,%s",GET1s(opc),GET2s(opc)); size=2; break; case 0x0b: sprintf(buffer,"DIVU %s,%s",GET1s(opc),GET2s(opc)); size=2; break; - case 0x0c: sprintf(buffer,"OR %s,%s",GET1s(opc),GET2s(opc)); size=2; break; + case 0x0c: sprintf(buffer,"OR %s,%s",GET1s(opc),GET2s(opc)); size=2; break; case 0x0d: sprintf(buffer,"AND %s,%s",GET1s(opc),GET2s(opc)); size=2; break; case 0x0e: sprintf(buffer,"XOR %s,%s",GET1s(opc),GET2s(opc)); size=2; break; case 0x0f: sprintf(buffer,"NOT %s,%s",GET1s(opc),GET2s(opc)); size=2; break; @@ -79,7 +79,7 @@ CPU_DISASSEMBLE( v810 ) case 0x1d: sprintf(buffer,"STSR %s,%s",GETRs(opc),GET2s(opc));size=2; break; case 0x1e: sprintf(buffer,"DI"); size=2; break; case 0x1f: - switch(opc&0x1f) + switch(opc&0x1f) { case 0x00: sprintf(buffer,"SCH0BSU"); break; case 0x01: sprintf(buffer,"SCH0BSD"); break; @@ -96,7 +96,7 @@ CPU_DISASSEMBLE( v810 ) case 0x0d: sprintf(buffer,"ANDNBSU"); break; case 0x0e: sprintf(buffer,"XORNBSU"); break; case 0x0f: sprintf(buffer,"NOTBSU"); break; - default: sprintf(buffer,"UnkBS 0x%X",opc&0x1f); break; + default: sprintf(buffer,"UnkBS 0x%X",opc&0x1f); break; } size=2; break; @@ -109,25 +109,25 @@ CPU_DISASSEMBLE( v810 ) case 0x26: case 0x27: switch( (opc>>9) &0xf) { - case 0x0: sprintf(buffer,"BV %X",pc+D9(opc)); break; - case 0x1: sprintf(buffer,"BL %X",pc+D9(opc)); break; - case 0x2: sprintf(buffer,"BE %X",pc+D9(opc)); break; - case 0x3: sprintf(buffer,"BNH %X",pc+D9(opc)); break; - case 0x4: sprintf(buffer,"BN %X",pc+D9(opc)); break; - case 0x5: sprintf(buffer,"BR %X",pc+D9(opc)); break; - case 0x6: sprintf(buffer,"BLT %X",pc+D9(opc)); break; - case 0x7: sprintf(buffer,"BLE %X",pc+D9(opc)); break; - case 0x8: sprintf(buffer,"BNV %X",pc+D9(opc)); break; - case 0x9: sprintf(buffer,"BNL %X",pc+D9(opc)); break; - case 0xa: sprintf(buffer,"BNE %X",pc+D9(opc)); break; - case 0xb: sprintf(buffer,"BH %X",pc+D9(opc)); break; - case 0xc: sprintf(buffer,"BP %X",pc+D9(opc)); break; - case 0xd: sprintf(buffer,"NOP"); break; - case 0xe: sprintf(buffer,"BGE %X",pc+D9(opc)); break; - case 0xf: sprintf(buffer,"BGT %X",pc+D9(opc)); break; - } - size=2; - break; + case 0x0: sprintf(buffer,"BV %X",pc+D9(opc)); break; + case 0x1: sprintf(buffer,"BL %X",pc+D9(opc)); break; + case 0x2: sprintf(buffer,"BE %X",pc+D9(opc)); break; + case 0x3: sprintf(buffer,"BNH %X",pc+D9(opc)); break; + case 0x4: sprintf(buffer,"BN %X",pc+D9(opc)); break; + case 0x5: sprintf(buffer,"BR %X",pc+D9(opc)); break; + case 0x6: sprintf(buffer,"BLT %X",pc+D9(opc)); break; + case 0x7: sprintf(buffer,"BLE %X",pc+D9(opc)); break; + case 0x8: sprintf(buffer,"BNV %X",pc+D9(opc)); break; + case 0x9: sprintf(buffer,"BNL %X",pc+D9(opc)); break; + case 0xa: sprintf(buffer,"BNE %X",pc+D9(opc)); break; + case 0xb: sprintf(buffer,"BH %X",pc+D9(opc)); break; + case 0xc: sprintf(buffer,"BP %X",pc+D9(opc)); break; + case 0xd: sprintf(buffer,"NOP"); break; + case 0xe: sprintf(buffer,"BGE %X",pc+D9(opc)); break; + case 0xf: sprintf(buffer,"BGT %X",pc+D9(opc)); break; + } + size=2; + break; case 0x28: sprintf(buffer,"MOVEA %X, %s, %s",I16(opc2),GET1s(opc),GET2s(opc));size=4; break; case 0x29: sprintf(buffer,"ADDI %X, %s, %s",I16(opc2),GET1s(opc),GET2s(opc));size=4; break; diff --git a/src/emu/cpu/x86emit.h b/src/emu/cpu/x86emit.h index 007d3600c1a..eca16538e1d 100644 --- a/src/emu/cpu/x86emit.h +++ b/src/emu/cpu/x86emit.h @@ -30,7 +30,7 @@ /* opcode size flag; low 4 bits must match REX low 4 bits, hence the odd numbers here */ #define OP_16BIT 0x10 -#define OP_32BIT 0x00 +#define OP_32BIT 0x00 #define OP_64BIT 0x08 /* 16 registers on x64, only 8 on x86 */ @@ -224,16 +224,16 @@ #define OP_ADD_Gv_Ev 0x03 #define OP_ADD_AL_Ib 0x04 #define OP_ADD_rAX_Iz 0x05 -#define OP_PUSH_ES 0x06 -#define OP_POP_ES 0x07 -#define OP_OR_Eb_Gb (0x08 | OPFLAG_8BITRM | OPFLAG_8BITREG) -#define OP_OR_Ev_Gv 0x09 -#define OP_OR_Gb_Eb (0x0a | OPFLAG_8BITRM | OPFLAG_8BITREG) -#define OP_OR_Gv_Ev 0x0b -#define OP_OR_AL_Ib 0x0c +#define OP_PUSH_ES 0x06 +#define OP_POP_ES 0x07 +#define OP_OR_Eb_Gb (0x08 | OPFLAG_8BITRM | OPFLAG_8BITREG) +#define OP_OR_Ev_Gv 0x09 +#define OP_OR_Gb_Eb (0x0a | OPFLAG_8BITRM | OPFLAG_8BITREG) +#define OP_OR_Gv_Ev 0x0b +#define OP_OR_AL_Ib 0x0c #define OP_OR_eAX_Iv 0x0d -#define OP_PUSH_CS 0x0e -#define OP_EXTENDED 0x0f +#define OP_PUSH_CS 0x0e +#define OP_EXTENDED 0x0f #define OP_ADC_Eb_Gb (0x10 | OPFLAG_8BITRM | OPFLAG_8BITREG) #define OP_ADC_Ev_Gv 0x11 @@ -241,16 +241,16 @@ #define OP_ADC_Gv_Ev 0x13 #define OP_ADC_AL_Ib 0x14 #define OP_ADC_rAX_Iz 0x15 -#define OP_PUSH_SS 0x16 -#define OP_POP_SS 0x17 +#define OP_PUSH_SS 0x16 +#define OP_POP_SS 0x17 #define OP_SBB_Eb_Gb (0x18 | OPFLAG_8BITRM | OPFLAG_8BITREG) #define OP_SBB_Ev_Gv 0x19 #define OP_SBB_Gb_Eb (0x1a | OPFLAG_8BITRM | OPFLAG_8BITREG) #define OP_SBB_Gv_Ev 0x1b #define OP_SBB_AL_Ib 0x1c #define OP_SBB_eAX_Iv 0x1d -#define OP_PUSH_DS 0x1e -#define OP_POP_DS 0x1f +#define OP_PUSH_DS 0x1e +#define OP_POP_DS 0x1f #define OP_AND_Eb_Gb (0x20 | OPFLAG_8BITRM | OPFLAG_8BITREG) #define OP_AND_Ev_Gv 0x21 @@ -258,16 +258,16 @@ #define OP_AND_Gv_Ev 0x23 #define OP_AND_AL_Ib 0x24 #define OP_AND_rAX_Iz 0x25 -#define PREFIX_ES 0x26 -#define OP_DAA 0x27 +#define PREFIX_ES 0x26 +#define OP_DAA 0x27 #define OP_SUB_Eb_Gb (0x28 | OPFLAG_8BITRM | OPFLAG_8BITREG) #define OP_SUB_Ev_Gv 0x29 #define OP_SUB_Gb_Eb (0x2a | OPFLAG_8BITRM | OPFLAG_8BITREG) #define OP_SUB_Gv_Ev 0x2b #define OP_SUB_AL_Ib 0x2c #define OP_SUB_eAX_Iv 0x2d -#define PREFIX_CS 0x2e -#define OP_DAS 0x2f +#define PREFIX_CS 0x2e +#define OP_DAS 0x2f #define OP_XOR_Eb_Gb (0x30 | OPFLAG_8BITRM | OPFLAG_8BITREG) #define OP_XOR_Ev_Gv 0x31 @@ -275,16 +275,16 @@ #define OP_XOR_Gv_Ev 0x33 #define OP_XOR_AL_Ib 0x34 #define OP_XOR_rAX_Iz 0x35 -#define PREFIX_SS 0x36 -#define OP_AAA 0x37 +#define PREFIX_SS 0x36 +#define OP_AAA 0x37 #define OP_CMP_Eb_Gb (0x38 | OPFLAG_8BITRM | OPFLAG_8BITREG) #define OP_CMP_Ev_Gv 0x39 #define OP_CMP_Gb_Eb (0x3a | OPFLAG_8BITRM | OPFLAG_8BITREG) #define OP_CMP_Gv_Ev 0x3b #define OP_CMP_AL_Ib 0x3c #define OP_CMP_eAX_Iv 0x3d -#define PREFIX_DS 0x3e -#define OP_AAS 0x3f +#define PREFIX_DS 0x3e +#define OP_AAS 0x3f #define OP_REX 0x40 #define OP_REX_B 0x41 @@ -330,7 +330,7 @@ #define PREFIX_OPSIZE 0x66 #define PREFIX_ADSIZE 0x67 #define OP_PUSH_Iz 0x68 -#define OP_IMUL_Gv_Ev_Iz 0x69 +#define OP_IMUL_Gv_Ev_Iz 0x69 #define OP_PUSH_Ib 0x6a #define OP_IMUL_Gv_Ev_Ib 0x6b #define OP_INS_Yb_DX 0x6c @@ -644,7 +644,7 @@ #define OP_CVTSD2SS_Vss_Wsd 0xf20f5a #define OP_CVTDQ2PS_Vps_Wdq 0x0f5b #define OP_CVTPS2DQ_Vdq_Wps 0x660f5b -#define OP_CVTTPS2DQ_Vdq_Wps 0xf30f5b +#define OP_CVTTPS2DQ_Vdq_Wps 0xf30f5b #define OP_SUBPS_Vps_Wps 0x0f5c #define OP_SUBSS_Vss_Wss 0xf30f5c #define OP_SUBPD_Vpd_Wpd 0x660f5c @@ -663,11 +663,11 @@ #define OP_MAXSD_Vsd_Wsd 0xf20f5f #define OP_PUNPCKLBW_Pq_Qd 0x0f60 -#define OP_PUNPCKLBW_Vdq_Wdq 0x660f60 +#define OP_PUNPCKLBW_Vdq_Wdq 0x660f60 #define OP_PUNPCKLWD_Pq_Qd 0x0f61 -#define OP_PUNPCKLWD_Vdq_Wdq 0x660f61 +#define OP_PUNPCKLWD_Vdq_Wdq 0x660f61 #define OP_PUNPCKLDQ_Pq_Qd 0x0f62 -#define OP_PUNPCKLDQ_Vdq_Wdq 0x660f62 +#define OP_PUNPCKLDQ_Vdq_Wdq 0x660f62 #define OP_PACKSSWB_Pq_Qq 0x0f63 #define OP_PACKSSWB_Vdq_Wdq 0x660f63 #define OP_PCMPGTB_Pq_Qq 0x0f64 @@ -679,15 +679,15 @@ #define OP_PACKUSWB_Pq_Qq 0x0f67 #define OP_PACKUSWB_Vdq_Wdq 0x660f67 #define OP_PUNPCKHBW_Pq_Qq 0x0f68 -#define OP_PUNPCKHBW_Vdq_Qdq 0x660f68 +#define OP_PUNPCKHBW_Vdq_Qdq 0x660f68 #define OP_PUNPCKHWD_Pq_Qq 0x0f69 -#define OP_PUNPCKHWD_Vdq_Qdq 0x660f69 +#define OP_PUNPCKHWD_Vdq_Qdq 0x660f69 #define OP_PUNPCKHDQ_Pq_Qq 0x0f6a -#define OP_PUNPCKHDQ_Vdq_Qdq 0x660f6a +#define OP_PUNPCKHDQ_Vdq_Qdq 0x660f6a #define OP_PACKSSDW_Pq_Qq 0x0f6b #define OP_PACKSSDW_Vdq_Qdq 0x660f6b -#define OP_PUNPCKLQDQ_Vdq_Wdq 0x660f6c -#define OP_PUNPCKHQDQ_Vdq_Wdq 0x660f6d +#define OP_PUNPCKLQDQ_Vdq_Wdq 0x660f6c +#define OP_PUNPCKHQDQ_Vdq_Wdq 0x660f6d #define OP_MOVD_Pd_Ed 0x0f6e #define OP_MOVD_Vd_Ed 0x660f6e #define OP_MOVQ_Pq_Qq 0x0f6f @@ -695,9 +695,9 @@ #define OP_MOVDQU_Vdq_Wdq 0xf30f6f #define OP_PSHUFW_Pq_Qq_Ib 0x0f70 -#define OP_PSHUFD_Vdq_Wdq_Ib 0x660f70 -#define OP_PSHUFHW_Vdq_Wdq_Ib 0xf30f70 -#define OP_PSHUFLW_Vdq_Wdq_Ib 0xf20f70 +#define OP_PSHUFD_Vdq_Wdq_Ib 0x660f70 +#define OP_PSHUFHW_Vdq_Wdq_Ib 0xf30f70 +#define OP_PSHUFLW_Vdq_Wdq_Ib 0xf20f70 #define OP_G12 0x0f71 #define OP_G13 0x0f72 #define OP_G14 0x0f73 @@ -1796,7 +1796,7 @@ INLINE void emit_push_imm(x86code **emitptr, INT32 imm) INLINE void emit_push_r32(x86code **emitptr, UINT8 reg) { emit_op_reg(emitptr, OP_PUSH_rAX + (reg & 7), OP_32BIT, reg); } INLINE void emit_push_m32(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G5, OP_32BIT, 6, MEMPARAMS); } -INLINE void emit_pop_r32(x86code **emitptr, UINT8 reg) { emit_op_reg(emitptr, OP_POP_rAX + (reg & 7), OP_32BIT, reg); } +INLINE void emit_pop_r32(x86code **emitptr, UINT8 reg) { emit_op_reg(emitptr, OP_POP_rAX + (reg & 7), OP_32BIT, reg); } INLINE void emit_pop_m32(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G1A_Ev, OP_32BIT, 0, MEMPARAMS); } #else @@ -1827,7 +1827,7 @@ INLINE void emit_mov_r8_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) INLINE void emit_mov_r8_r8(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOV_Gb_Eb, OP_32BIT, dreg, sreg); } INLINE void emit_mov_r8_m8(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_MOV_Gb_Eb, OP_32BIT, dreg, MEMPARAMS); } INLINE void emit_mov_m8_r8(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_MOV_Eb_Gb, OP_32BIT, sreg, MEMPARAMS); } -INLINE void emit_mov_m8_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G11_Eb_Ib, OP_32BIT, 0, MEMPARAMS, imm); } +INLINE void emit_mov_m8_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G11_Eb_Ib, OP_32BIT, 0, MEMPARAMS, imm); } /*------------------------------------------------- @@ -1841,7 +1841,7 @@ INLINE void emit_xchg_r8_r8(x86code **emitptr, UINT8 dreg, UINT8 sreg) else if (sreg == REG_EAX) emit_op_reg(emitptr, OP_NOP | (dreg & 7), OP_32BIT, dreg); else - emit_op_modrm_reg(emitptr, OP_XCHG_Eb_Gb, OP_32BIT, dreg, sreg); + emit_op_modrm_reg(emitptr, OP_XCHG_Eb_Gb, OP_32BIT, dreg, sreg); } @@ -1861,10 +1861,10 @@ INLINE void emit_mov_m16_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT16 imm) INLINE void emit_mov_m16_r16(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_MOV_Ev_Gv, OP_16BIT, sreg, MEMPARAMS); } INLINE void emit_movsx_r16_r8(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVSX_Gv_Eb, OP_16BIT, dreg, sreg); } INLINE void emit_movsx_r16_m8(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_MOVSX_Gv_Eb, OP_16BIT, dreg, MEMPARAMS); } -INLINE void emit_movzx_r16_r8(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVZX_Gv_Eb, OP_16BIT, dreg, sreg); } +INLINE void emit_movzx_r16_r8(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVZX_Gv_Eb, OP_16BIT, dreg, sreg); } INLINE void emit_movzx_r16_m8(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_MOVZX_Gv_Eb, OP_16BIT, dreg, MEMPARAMS); } -INLINE void emit_cmovcc_r16_r16(x86code **emitptr, UINT8 cond, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CMOV_O_Gv_Ev + cond, OP_16BIT, dreg, sreg); } -INLINE void emit_cmovcc_r16_m16(x86code **emitptr, UINT8 cond, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_CMOV_O_Gv_Ev + cond, OP_16BIT, dreg, MEMPARAMS); } +INLINE void emit_cmovcc_r16_r16(x86code **emitptr, UINT8 cond, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CMOV_O_Gv_Ev + cond, OP_16BIT, dreg, sreg); } +INLINE void emit_cmovcc_r16_m16(x86code **emitptr, UINT8 cond, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_CMOV_O_Gv_Ev + cond, OP_16BIT, dreg, MEMPARAMS); } /*------------------------------------------------- @@ -1878,7 +1878,7 @@ INLINE void emit_xchg_r16_r16(x86code **emitptr, UINT8 dreg, UINT8 sreg) else if (sreg == REG_EAX) emit_op_reg(emitptr, OP_NOP | (dreg & 7), OP_16BIT, dreg); else - emit_op_modrm_reg(emitptr, OP_XCHG_Ev_Gv, OP_16BIT, dreg, sreg); + emit_op_modrm_reg(emitptr, OP_XCHG_Ev_Gv, OP_16BIT, dreg, sreg); } @@ -1906,7 +1906,7 @@ INLINE void emit_movzx_r32_r8(x86code **emitptr, UINT8 dreg, UINT8 sreg) if (sreg >= 4) { emit_op_modrm_reg(emitptr, OP_MOV_Gv_Ev, OP_32BIT, dreg, sreg); // mov dreg,sreg - emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 4, dreg, 0xff); // and dreg,0xff + emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 4, dreg, 0xff); // and dreg,0xff } else #endif @@ -1930,7 +1930,7 @@ INLINE void emit_xchg_r32_r32(x86code **emitptr, UINT8 dreg, UINT8 sreg) else if (sreg == REG_EAX) emit_op_reg(emitptr, OP_NOP | (dreg & 7), OP_32BIT, dreg); else - emit_op_modrm_reg(emitptr, OP_XCHG_Ev_Gv, OP_32BIT, dreg, sreg); + emit_op_modrm_reg(emitptr, OP_XCHG_Ev_Gv, OP_32BIT, dreg, sreg); } @@ -1970,7 +1970,7 @@ INLINE void emit_movzx_r64_r8(x86code **emitptr, UINT8 dreg, UINT8 sreg) { INLINE void emit_movzx_r64_m8(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_MOVZX_Gv_Eb, OP_64BIT, dreg, MEMPARAMS); } INLINE void emit_movzx_r64_r16(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVZX_Gv_Ew, OP_64BIT, dreg, sreg); } INLINE void emit_movzx_r64_m16(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_MOVZX_Gv_Ew, OP_64BIT, dreg, MEMPARAMS); } -INLINE void emit_cmovcc_r64_r64(x86code **emitptr, UINT8 cond, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CMOV_O_Gv_Ev + cond, OP_64BIT, dreg, sreg); } +INLINE void emit_cmovcc_r64_r64(x86code **emitptr, UINT8 cond, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CMOV_O_Gv_Ev + cond, OP_64BIT, dreg, sreg); } INLINE void emit_cmovcc_r64_m64(x86code **emitptr, UINT8 cond, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_CMOV_O_Gv_Ev + cond, OP_64BIT, dreg, MEMPARAMS); } @@ -1985,7 +1985,7 @@ INLINE void emit_xchg_r64_r64(x86code **emitptr, UINT8 dreg, UINT8 sreg) else if (sreg == REG_EAX) emit_op_reg(emitptr, OP_NOP | (dreg & 7), OP_64BIT, dreg); else - emit_op_modrm_reg(emitptr, OP_XCHG_Ev_Gv, OP_64BIT, dreg, sreg); + emit_op_modrm_reg(emitptr, OP_XCHG_Ev_Gv, OP_64BIT, dreg, sreg); } #endif @@ -2001,51 +2001,51 @@ INLINE void emit_xchg_r64_r64(x86code **emitptr, UINT8 dreg, UINT8 sreg) INLINE void emit_add_r8_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 0, dreg, imm); } INLINE void emit_add_m8_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 0, MEMPARAMS, imm); } -INLINE void emit_add_r8_r8(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADD_Gb_Eb, OP_32BIT, dreg, sreg); } -INLINE void emit_add_r8_m8(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_ADD_Gb_Eb, OP_32BIT, dreg, MEMPARAMS); } -INLINE void emit_add_m8_r8(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADD_Eb_Gb, OP_32BIT, sreg, MEMPARAMS); } +INLINE void emit_add_r8_r8(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADD_Gb_Eb, OP_32BIT, dreg, sreg); } +INLINE void emit_add_r8_m8(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_ADD_Gb_Eb, OP_32BIT, dreg, MEMPARAMS); } +INLINE void emit_add_m8_r8(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADD_Eb_Gb, OP_32BIT, sreg, MEMPARAMS); } INLINE void emit_or_r8_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 1, dreg, imm); } INLINE void emit_or_m8_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 1, MEMPARAMS, imm); } -INLINE void emit_or_r8_r8(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_OR_Gb_Eb, OP_32BIT, dreg, sreg); } +INLINE void emit_or_r8_r8(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_OR_Gb_Eb, OP_32BIT, dreg, sreg); } INLINE void emit_or_r8_m8(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_OR_Gb_Eb, OP_32BIT, dreg, MEMPARAMS); } INLINE void emit_or_m8_r8(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_OR_Eb_Gb, OP_32BIT, sreg, MEMPARAMS); } INLINE void emit_adc_r8_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 2, dreg, imm); } INLINE void emit_adc_m8_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 2, MEMPARAMS, imm); } -INLINE void emit_adc_r8_r8(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADC_Gb_Eb, OP_32BIT, dreg, sreg); } -INLINE void emit_adc_r8_m8(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_ADC_Gb_Eb, OP_32BIT, dreg, MEMPARAMS); } -INLINE void emit_adc_m8_r8(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADC_Eb_Gb, OP_32BIT, sreg, MEMPARAMS); } +INLINE void emit_adc_r8_r8(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADC_Gb_Eb, OP_32BIT, dreg, sreg); } +INLINE void emit_adc_r8_m8(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_ADC_Gb_Eb, OP_32BIT, dreg, MEMPARAMS); } +INLINE void emit_adc_m8_r8(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADC_Eb_Gb, OP_32BIT, sreg, MEMPARAMS); } INLINE void emit_sbb_r8_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 3, dreg, imm); } INLINE void emit_sbb_m8_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 3, MEMPARAMS, imm); } -INLINE void emit_sbb_r8_r8(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SBB_Gb_Eb, OP_32BIT, dreg, sreg); } -INLINE void emit_sbb_r8_m8(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_SBB_Gb_Eb, OP_32BIT, dreg, MEMPARAMS); } -INLINE void emit_sbb_m8_r8(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SBB_Eb_Gb, OP_32BIT, sreg, MEMPARAMS); } +INLINE void emit_sbb_r8_r8(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SBB_Gb_Eb, OP_32BIT, dreg, sreg); } +INLINE void emit_sbb_r8_m8(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_SBB_Gb_Eb, OP_32BIT, dreg, MEMPARAMS); } +INLINE void emit_sbb_m8_r8(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SBB_Eb_Gb, OP_32BIT, sreg, MEMPARAMS); } INLINE void emit_and_r8_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 4, dreg, imm); } INLINE void emit_and_m8_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 4, MEMPARAMS, imm); } -INLINE void emit_and_r8_r8(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_AND_Gb_Eb, OP_32BIT, dreg, sreg); } -INLINE void emit_and_r8_m8(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_AND_Gb_Eb, OP_32BIT, dreg, MEMPARAMS); } -INLINE void emit_and_m8_r8(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_AND_Eb_Gb, OP_32BIT, sreg, MEMPARAMS); } +INLINE void emit_and_r8_r8(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_AND_Gb_Eb, OP_32BIT, dreg, sreg); } +INLINE void emit_and_r8_m8(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_AND_Gb_Eb, OP_32BIT, dreg, MEMPARAMS); } +INLINE void emit_and_m8_r8(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_AND_Eb_Gb, OP_32BIT, sreg, MEMPARAMS); } INLINE void emit_sub_r8_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 5, dreg, imm); } INLINE void emit_sub_m8_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 5, MEMPARAMS, imm); } -INLINE void emit_sub_r8_r8(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SUB_Gb_Eb, OP_32BIT, dreg, sreg); } -INLINE void emit_sub_r8_m8(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_SUB_Gb_Eb, OP_32BIT, dreg, MEMPARAMS); } -INLINE void emit_sub_m8_r8(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SUB_Eb_Gb, OP_32BIT, sreg, MEMPARAMS); } +INLINE void emit_sub_r8_r8(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SUB_Gb_Eb, OP_32BIT, dreg, sreg); } +INLINE void emit_sub_r8_m8(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_SUB_Gb_Eb, OP_32BIT, dreg, MEMPARAMS); } +INLINE void emit_sub_m8_r8(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SUB_Eb_Gb, OP_32BIT, sreg, MEMPARAMS); } INLINE void emit_xor_r8_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 6, dreg, imm); } INLINE void emit_xor_m8_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 6, MEMPARAMS, imm); } -INLINE void emit_xor_r8_r8(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_XOR_Gb_Eb, OP_32BIT, dreg, sreg); } -INLINE void emit_xor_r8_m8(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_XOR_Gb_Eb, OP_32BIT, dreg, MEMPARAMS); } -INLINE void emit_xor_m8_r8(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_XOR_Eb_Gb, OP_32BIT, sreg, MEMPARAMS); } +INLINE void emit_xor_r8_r8(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_XOR_Gb_Eb, OP_32BIT, dreg, sreg); } +INLINE void emit_xor_r8_m8(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_XOR_Gb_Eb, OP_32BIT, dreg, MEMPARAMS); } +INLINE void emit_xor_m8_r8(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_XOR_Eb_Gb, OP_32BIT, sreg, MEMPARAMS); } INLINE void emit_cmp_r8_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 7, dreg, imm); } INLINE void emit_cmp_m8_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 7, MEMPARAMS, imm); } -INLINE void emit_cmp_r8_r8(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CMP_Gb_Eb, OP_32BIT, dreg, sreg); } -INLINE void emit_cmp_r8_m8(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_CMP_Gb_Eb, OP_32BIT, dreg, MEMPARAMS); } -INLINE void emit_cmp_m8_r8(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_CMP_Eb_Gb, OP_32BIT, sreg, MEMPARAMS); } +INLINE void emit_cmp_r8_r8(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CMP_Gb_Eb, OP_32BIT, dreg, sreg); } +INLINE void emit_cmp_r8_m8(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_CMP_Gb_Eb, OP_32BIT, dreg, MEMPARAMS); } +INLINE void emit_cmp_m8_r8(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_CMP_Eb_Gb, OP_32BIT, sreg, MEMPARAMS); } INLINE void emit_test_r8_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G3_Eb, OP_32BIT, 0, dreg, imm); } INLINE void emit_test_m8_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G3_Eb, OP_32BIT, 0, MEMPARAMS, imm); } @@ -2060,50 +2060,50 @@ INLINE void emit_test_m8_r8(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { INLINE void emit_add_r16_imm(x86code **emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 0, dreg, imm); } INLINE void emit_add_m16_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT16 imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 0, MEMPARAMS, imm); } INLINE void emit_add_r16_r16(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADD_Gv_Ev, OP_16BIT, dreg, sreg); } -INLINE void emit_add_r16_m16(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_ADD_Gv_Ev, OP_16BIT, dreg, MEMPARAMS); } -INLINE void emit_add_m16_r16(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADD_Ev_Gv, OP_16BIT, sreg, MEMPARAMS); } +INLINE void emit_add_r16_m16(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_ADD_Gv_Ev, OP_16BIT, dreg, MEMPARAMS); } +INLINE void emit_add_m16_r16(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADD_Ev_Gv, OP_16BIT, sreg, MEMPARAMS); } INLINE void emit_or_r16_imm(x86code **emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 1, dreg, imm); } INLINE void emit_or_m16_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT16 imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 1, MEMPARAMS, imm); } -INLINE void emit_or_r16_r16(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_OR_Gv_Ev, OP_16BIT, dreg, sreg); } -INLINE void emit_or_r16_m16(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_OR_Gv_Ev, OP_16BIT, dreg, MEMPARAMS); } -INLINE void emit_or_m16_r16(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_OR_Ev_Gv, OP_16BIT, sreg, MEMPARAMS); } +INLINE void emit_or_r16_r16(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_OR_Gv_Ev, OP_16BIT, dreg, sreg); } +INLINE void emit_or_r16_m16(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_OR_Gv_Ev, OP_16BIT, dreg, MEMPARAMS); } +INLINE void emit_or_m16_r16(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_OR_Ev_Gv, OP_16BIT, sreg, MEMPARAMS); } INLINE void emit_adc_r16_imm(x86code **emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 2, dreg, imm); } INLINE void emit_adc_m16_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT16 imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 2, MEMPARAMS, imm); } INLINE void emit_adc_r16_r16(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADC_Gv_Ev, OP_16BIT, dreg, sreg); } -INLINE void emit_adc_r16_m16(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_ADC_Gv_Ev, OP_16BIT, dreg, MEMPARAMS); } -INLINE void emit_adc_m16_r16(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADC_Ev_Gv, OP_16BIT, sreg, MEMPARAMS); } +INLINE void emit_adc_r16_m16(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_ADC_Gv_Ev, OP_16BIT, dreg, MEMPARAMS); } +INLINE void emit_adc_m16_r16(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADC_Ev_Gv, OP_16BIT, sreg, MEMPARAMS); } INLINE void emit_sbb_r16_imm(x86code **emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 3, dreg, imm); } INLINE void emit_sbb_m16_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT16 imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 3, MEMPARAMS, imm); } INLINE void emit_sbb_r16_r16(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SBB_Gv_Ev, OP_16BIT, dreg, sreg); } -INLINE void emit_sbb_r16_m16(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_SBB_Gv_Ev, OP_16BIT, dreg, MEMPARAMS); } -INLINE void emit_sbb_m16_r16(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SBB_Ev_Gv, OP_16BIT, sreg, MEMPARAMS); } +INLINE void emit_sbb_r16_m16(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_SBB_Gv_Ev, OP_16BIT, dreg, MEMPARAMS); } +INLINE void emit_sbb_m16_r16(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SBB_Ev_Gv, OP_16BIT, sreg, MEMPARAMS); } INLINE void emit_and_r16_imm(x86code **emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 4, dreg, imm); } INLINE void emit_and_m16_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT16 imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 4, MEMPARAMS, imm); } INLINE void emit_and_r16_r16(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_AND_Gv_Ev, OP_16BIT, dreg, sreg); } -INLINE void emit_and_r16_m16(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_AND_Gv_Ev, OP_16BIT, dreg, MEMPARAMS); } -INLINE void emit_and_m16_r16(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_AND_Ev_Gv, OP_16BIT, sreg, MEMPARAMS); } +INLINE void emit_and_r16_m16(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_AND_Gv_Ev, OP_16BIT, dreg, MEMPARAMS); } +INLINE void emit_and_m16_r16(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_AND_Ev_Gv, OP_16BIT, sreg, MEMPARAMS); } INLINE void emit_sub_r16_imm(x86code **emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 5, dreg, imm); } INLINE void emit_sub_m16_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT16 imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 5, MEMPARAMS, imm); } INLINE void emit_sub_r16_r16(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SUB_Gv_Ev, OP_16BIT, dreg, sreg); } -INLINE void emit_sub_r16_m16(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_SUB_Gv_Ev, OP_16BIT, dreg, MEMPARAMS); } -INLINE void emit_sub_m16_r16(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SUB_Ev_Gv, OP_16BIT, sreg, MEMPARAMS); } +INLINE void emit_sub_r16_m16(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_SUB_Gv_Ev, OP_16BIT, dreg, MEMPARAMS); } +INLINE void emit_sub_m16_r16(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SUB_Ev_Gv, OP_16BIT, sreg, MEMPARAMS); } INLINE void emit_xor_r16_imm(x86code **emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 6, dreg, imm); } INLINE void emit_xor_m16_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT16 imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 6, MEMPARAMS, imm); } INLINE void emit_xor_r16_r16(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_XOR_Gv_Ev, OP_16BIT, dreg, sreg); } -INLINE void emit_xor_r16_m16(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_XOR_Gv_Ev, OP_16BIT, dreg, MEMPARAMS); } -INLINE void emit_xor_m16_r16(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_XOR_Ev_Gv, OP_16BIT, sreg, MEMPARAMS); } +INLINE void emit_xor_r16_m16(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_XOR_Gv_Ev, OP_16BIT, dreg, MEMPARAMS); } +INLINE void emit_xor_m16_r16(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_XOR_Ev_Gv, OP_16BIT, sreg, MEMPARAMS); } INLINE void emit_cmp_r16_imm(x86code **emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 7, dreg, imm); } INLINE void emit_cmp_m16_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT16 imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 7, MEMPARAMS, imm); } INLINE void emit_cmp_r16_r16(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CMP_Gv_Ev, OP_16BIT, dreg, sreg); } -INLINE void emit_cmp_r16_m16(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_CMP_Gv_Ev, OP_16BIT, dreg, MEMPARAMS); } -INLINE void emit_cmp_m16_r16(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_CMP_Ev_Gv, OP_16BIT, sreg, MEMPARAMS); } +INLINE void emit_cmp_r16_m16(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_CMP_Gv_Ev, OP_16BIT, dreg, MEMPARAMS); } +INLINE void emit_cmp_m16_r16(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_CMP_Ev_Gv, OP_16BIT, sreg, MEMPARAMS); } INLINE void emit_test_r16_imm(x86code **emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm16(emitptr, OP_G3_Ev, OP_16BIT, 0, dreg, imm); } INLINE void emit_test_m16_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT16 imm) { emit_op_modrm_mem_imm16(emitptr, OP_G3_Ev, OP_16BIT, 0, MEMPARAMS, imm); } @@ -2118,50 +2118,50 @@ INLINE void emit_test_m16_r16(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) INLINE void emit_add_r32_imm(x86code **emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 0, dreg, imm); } INLINE void emit_add_m32_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 0, MEMPARAMS, imm); } INLINE void emit_add_r32_r32(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADD_Gv_Ev, OP_32BIT, dreg, sreg); } -INLINE void emit_add_r32_m32(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_ADD_Gv_Ev, OP_32BIT, dreg, MEMPARAMS); } -INLINE void emit_add_m32_r32(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADD_Ev_Gv, OP_32BIT, sreg, MEMPARAMS); } +INLINE void emit_add_r32_m32(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_ADD_Gv_Ev, OP_32BIT, dreg, MEMPARAMS); } +INLINE void emit_add_m32_r32(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADD_Ev_Gv, OP_32BIT, sreg, MEMPARAMS); } INLINE void emit_or_r32_imm(x86code **emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 1, dreg, imm); } INLINE void emit_or_m32_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 1, MEMPARAMS, imm); } -INLINE void emit_or_r32_r32(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_OR_Gv_Ev, OP_32BIT, dreg, sreg); } -INLINE void emit_or_r32_m32(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_OR_Gv_Ev, OP_32BIT, dreg, MEMPARAMS); } -INLINE void emit_or_m32_r32(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_OR_Ev_Gv, OP_32BIT, sreg, MEMPARAMS); } +INLINE void emit_or_r32_r32(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_OR_Gv_Ev, OP_32BIT, dreg, sreg); } +INLINE void emit_or_r32_m32(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_OR_Gv_Ev, OP_32BIT, dreg, MEMPARAMS); } +INLINE void emit_or_m32_r32(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_OR_Ev_Gv, OP_32BIT, sreg, MEMPARAMS); } INLINE void emit_adc_r32_imm(x86code **emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 2, dreg, imm); } INLINE void emit_adc_m32_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 2, MEMPARAMS, imm); } INLINE void emit_adc_r32_r32(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADC_Gv_Ev, OP_32BIT, dreg, sreg); } -INLINE void emit_adc_r32_m32(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_ADC_Gv_Ev, OP_32BIT, dreg, MEMPARAMS); } -INLINE void emit_adc_m32_r32(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADC_Ev_Gv, OP_32BIT, sreg, MEMPARAMS); } +INLINE void emit_adc_r32_m32(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_ADC_Gv_Ev, OP_32BIT, dreg, MEMPARAMS); } +INLINE void emit_adc_m32_r32(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADC_Ev_Gv, OP_32BIT, sreg, MEMPARAMS); } INLINE void emit_sbb_r32_imm(x86code **emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 3, dreg, imm); } INLINE void emit_sbb_m32_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 3, MEMPARAMS, imm); } INLINE void emit_sbb_r32_r32(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SBB_Gv_Ev, OP_32BIT, dreg, sreg); } -INLINE void emit_sbb_r32_m32(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_SBB_Gv_Ev, OP_32BIT, dreg, MEMPARAMS); } -INLINE void emit_sbb_m32_r32(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SBB_Ev_Gv, OP_32BIT, sreg, MEMPARAMS); } +INLINE void emit_sbb_r32_m32(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_SBB_Gv_Ev, OP_32BIT, dreg, MEMPARAMS); } +INLINE void emit_sbb_m32_r32(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SBB_Ev_Gv, OP_32BIT, sreg, MEMPARAMS); } INLINE void emit_and_r32_imm(x86code **emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 4, dreg, imm); } INLINE void emit_and_m32_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 4, MEMPARAMS, imm); } INLINE void emit_and_r32_r32(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_AND_Gv_Ev, OP_32BIT, dreg, sreg); } -INLINE void emit_and_r32_m32(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_AND_Gv_Ev, OP_32BIT, dreg, MEMPARAMS); } -INLINE void emit_and_m32_r32(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_AND_Ev_Gv, OP_32BIT, sreg, MEMPARAMS); } +INLINE void emit_and_r32_m32(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_AND_Gv_Ev, OP_32BIT, dreg, MEMPARAMS); } +INLINE void emit_and_m32_r32(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_AND_Ev_Gv, OP_32BIT, sreg, MEMPARAMS); } INLINE void emit_sub_r32_imm(x86code **emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 5, dreg, imm); } INLINE void emit_sub_m32_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 5, MEMPARAMS, imm); } INLINE void emit_sub_r32_r32(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SUB_Gv_Ev, OP_32BIT, dreg, sreg); } -INLINE void emit_sub_r32_m32(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_SUB_Gv_Ev, OP_32BIT, dreg, MEMPARAMS); } -INLINE void emit_sub_m32_r32(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SUB_Ev_Gv, OP_32BIT, sreg, MEMPARAMS); } +INLINE void emit_sub_r32_m32(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_SUB_Gv_Ev, OP_32BIT, dreg, MEMPARAMS); } +INLINE void emit_sub_m32_r32(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SUB_Ev_Gv, OP_32BIT, sreg, MEMPARAMS); } INLINE void emit_xor_r32_imm(x86code **emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 6, dreg, imm); } INLINE void emit_xor_m32_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 6, MEMPARAMS, imm); } INLINE void emit_xor_r32_r32(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_XOR_Gv_Ev, OP_32BIT, dreg, sreg); } -INLINE void emit_xor_r32_m32(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_XOR_Gv_Ev, OP_32BIT, dreg, MEMPARAMS); } -INLINE void emit_xor_m32_r32(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_XOR_Ev_Gv, OP_32BIT, sreg, MEMPARAMS); } +INLINE void emit_xor_r32_m32(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_XOR_Gv_Ev, OP_32BIT, dreg, MEMPARAMS); } +INLINE void emit_xor_m32_r32(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_XOR_Ev_Gv, OP_32BIT, sreg, MEMPARAMS); } INLINE void emit_cmp_r32_imm(x86code **emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 7, dreg, imm); } INLINE void emit_cmp_m32_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 7, MEMPARAMS, imm); } INLINE void emit_cmp_r32_r32(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CMP_Gv_Ev, OP_32BIT, dreg, sreg); } -INLINE void emit_cmp_r32_m32(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_CMP_Gv_Ev, OP_32BIT, dreg, MEMPARAMS); } -INLINE void emit_cmp_m32_r32(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_CMP_Ev_Gv, OP_32BIT, sreg, MEMPARAMS); } +INLINE void emit_cmp_r32_m32(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_CMP_Gv_Ev, OP_32BIT, dreg, MEMPARAMS); } +INLINE void emit_cmp_m32_r32(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_CMP_Ev_Gv, OP_32BIT, sreg, MEMPARAMS); } INLINE void emit_test_r32_imm(x86code **emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm32(emitptr, OP_G3_Ev, OP_32BIT, 0, dreg, imm); } INLINE void emit_test_m32_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT32 imm) { emit_op_modrm_mem_imm32(emitptr, OP_G3_Ev, OP_32BIT, 0, MEMPARAMS, imm); } @@ -2178,50 +2178,50 @@ INLINE void emit_test_m32_r32(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) INLINE void emit_add_r64_imm(x86code **emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 0, dreg, imm); } INLINE void emit_add_m64_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 0, MEMPARAMS, imm); } INLINE void emit_add_r64_r64(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADD_Gv_Ev, OP_64BIT, dreg, sreg); } -INLINE void emit_add_r64_m64(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_ADD_Gv_Ev, OP_64BIT, dreg, MEMPARAMS); } -INLINE void emit_add_m64_r64(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADD_Ev_Gv, OP_64BIT, sreg, MEMPARAMS); } +INLINE void emit_add_r64_m64(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_ADD_Gv_Ev, OP_64BIT, dreg, MEMPARAMS); } +INLINE void emit_add_m64_r64(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADD_Ev_Gv, OP_64BIT, sreg, MEMPARAMS); } INLINE void emit_or_r64_imm(x86code **emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 1, dreg, imm); } INLINE void emit_or_m64_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 1, MEMPARAMS, imm); } -INLINE void emit_or_r64_r64(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_OR_Gv_Ev, OP_64BIT, dreg, sreg); } -INLINE void emit_or_r64_m64(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_OR_Gv_Ev, OP_64BIT, dreg, MEMPARAMS); } -INLINE void emit_or_m64_r64(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_OR_Ev_Gv, OP_64BIT, sreg, MEMPARAMS); } +INLINE void emit_or_r64_r64(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_OR_Gv_Ev, OP_64BIT, dreg, sreg); } +INLINE void emit_or_r64_m64(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_OR_Gv_Ev, OP_64BIT, dreg, MEMPARAMS); } +INLINE void emit_or_m64_r64(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_OR_Ev_Gv, OP_64BIT, sreg, MEMPARAMS); } INLINE void emit_adc_r64_imm(x86code **emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 2, dreg, imm); } INLINE void emit_adc_m64_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 2, MEMPARAMS, imm); } INLINE void emit_adc_r64_r64(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADC_Gv_Ev, OP_64BIT, dreg, sreg); } -INLINE void emit_adc_r64_m64(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_ADC_Gv_Ev, OP_64BIT, dreg, MEMPARAMS); } -INLINE void emit_adc_m64_r64(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADC_Ev_Gv, OP_64BIT, sreg, MEMPARAMS); } +INLINE void emit_adc_r64_m64(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_ADC_Gv_Ev, OP_64BIT, dreg, MEMPARAMS); } +INLINE void emit_adc_m64_r64(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADC_Ev_Gv, OP_64BIT, sreg, MEMPARAMS); } INLINE void emit_sbb_r64_imm(x86code **emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 3, dreg, imm); } INLINE void emit_sbb_m64_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 3, MEMPARAMS, imm); } INLINE void emit_sbb_r64_r64(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SBB_Gv_Ev, OP_64BIT, dreg, sreg); } -INLINE void emit_sbb_r64_m64(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_SBB_Gv_Ev, OP_64BIT, dreg, MEMPARAMS); } -INLINE void emit_sbb_m64_r64(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SBB_Ev_Gv, OP_64BIT, sreg, MEMPARAMS); } +INLINE void emit_sbb_r64_m64(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_SBB_Gv_Ev, OP_64BIT, dreg, MEMPARAMS); } +INLINE void emit_sbb_m64_r64(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SBB_Ev_Gv, OP_64BIT, sreg, MEMPARAMS); } INLINE void emit_and_r64_imm(x86code **emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 4, dreg, imm); } INLINE void emit_and_m64_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 4, MEMPARAMS, imm); } INLINE void emit_and_r64_r64(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_AND_Gv_Ev, OP_64BIT, dreg, sreg); } -INLINE void emit_and_r64_m64(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_AND_Gv_Ev, OP_64BIT, dreg, MEMPARAMS); } -INLINE void emit_and_m64_r64(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_AND_Ev_Gv, OP_64BIT, sreg, MEMPARAMS); } +INLINE void emit_and_r64_m64(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_AND_Gv_Ev, OP_64BIT, dreg, MEMPARAMS); } +INLINE void emit_and_m64_r64(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_AND_Ev_Gv, OP_64BIT, sreg, MEMPARAMS); } INLINE void emit_sub_r64_imm(x86code **emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 5, dreg, imm); } INLINE void emit_sub_m64_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 5, MEMPARAMS, imm); } INLINE void emit_sub_r64_r64(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SUB_Gv_Ev, OP_64BIT, dreg, sreg); } -INLINE void emit_sub_r64_m64(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_SUB_Gv_Ev, OP_64BIT, dreg, MEMPARAMS); } -INLINE void emit_sub_m64_r64(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SUB_Ev_Gv, OP_64BIT, sreg, MEMPARAMS); } +INLINE void emit_sub_r64_m64(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_SUB_Gv_Ev, OP_64BIT, dreg, MEMPARAMS); } +INLINE void emit_sub_m64_r64(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SUB_Ev_Gv, OP_64BIT, sreg, MEMPARAMS); } INLINE void emit_xor_r64_imm(x86code **emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 6, dreg, imm); } INLINE void emit_xor_m64_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 6, MEMPARAMS, imm); } INLINE void emit_xor_r64_r64(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_XOR_Gv_Ev, OP_64BIT, dreg, sreg); } -INLINE void emit_xor_r64_m64(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_XOR_Gv_Ev, OP_64BIT, dreg, MEMPARAMS); } -INLINE void emit_xor_m64_r64(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_XOR_Ev_Gv, OP_64BIT, sreg, MEMPARAMS); } +INLINE void emit_xor_r64_m64(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_XOR_Gv_Ev, OP_64BIT, dreg, MEMPARAMS); } +INLINE void emit_xor_m64_r64(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_XOR_Ev_Gv, OP_64BIT, sreg, MEMPARAMS); } INLINE void emit_cmp_r64_imm(x86code **emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 7, dreg, imm); } INLINE void emit_cmp_m64_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 7, MEMPARAMS, imm); } INLINE void emit_cmp_r64_r64(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CMP_Gv_Ev, OP_64BIT, dreg, sreg); } -INLINE void emit_cmp_r64_m64(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_CMP_Gv_Ev, OP_64BIT, dreg, MEMPARAMS); } -INLINE void emit_cmp_m64_r64(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_CMP_Ev_Gv, OP_64BIT, sreg, MEMPARAMS); } +INLINE void emit_cmp_r64_m64(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_CMP_Gv_Ev, OP_64BIT, dreg, MEMPARAMS); } +INLINE void emit_cmp_m64_r64(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_CMP_Ev_Gv, OP_64BIT, sreg, MEMPARAMS); } INLINE void emit_test_r64_imm(x86code **emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm32(emitptr, OP_G3_Ev, OP_64BIT, 0, dreg, imm); } INLINE void emit_test_m64_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT32 imm) { emit_op_modrm_mem_imm32(emitptr, OP_G3_Ev, OP_64BIT, 0, MEMPARAMS, imm); } @@ -2261,120 +2261,120 @@ INLINE void emit_shift_mem_imm(x86code **emitptr, UINT32 op1, UINT32 opn, UINT8 emit_shift_r8_* -------------------------------------------------*/ -INLINE void emit_rol_r8_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 0, dreg, imm); } -INLINE void emit_rol_m8_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 0, MEMPARAMS, imm); } -INLINE void emit_rol_r8_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 0, dreg); } -INLINE void emit_rol_m8_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Eb_CL, OP_32BIT, 0, MEMPARAMS); } +INLINE void emit_rol_r8_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 0, dreg, imm); } +INLINE void emit_rol_m8_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 0, MEMPARAMS, imm); } +INLINE void emit_rol_r8_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 0, dreg); } +INLINE void emit_rol_m8_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Eb_CL, OP_32BIT, 0, MEMPARAMS); } -INLINE void emit_ror_r8_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 1, dreg, imm); } -INLINE void emit_ror_m8_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 1, MEMPARAMS, imm); } -INLINE void emit_ror_r8_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 1, dreg); } -INLINE void emit_ror_m8_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Eb_CL, OP_32BIT, 1, MEMPARAMS); } +INLINE void emit_ror_r8_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 1, dreg, imm); } +INLINE void emit_ror_m8_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 1, MEMPARAMS, imm); } +INLINE void emit_ror_r8_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 1, dreg); } +INLINE void emit_ror_m8_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Eb_CL, OP_32BIT, 1, MEMPARAMS); } -INLINE void emit_rcl_r8_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 2, dreg, imm); } -INLINE void emit_rcl_m8_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 2, MEMPARAMS, imm); } -INLINE void emit_rcl_r8_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 2, dreg); } -INLINE void emit_rcl_m8_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Eb_CL, OP_32BIT, 2, MEMPARAMS); } +INLINE void emit_rcl_r8_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 2, dreg, imm); } +INLINE void emit_rcl_m8_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 2, MEMPARAMS, imm); } +INLINE void emit_rcl_r8_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 2, dreg); } +INLINE void emit_rcl_m8_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Eb_CL, OP_32BIT, 2, MEMPARAMS); } -INLINE void emit_rcr_r8_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 3, dreg, imm); } -INLINE void emit_rcr_m8_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 3, MEMPARAMS, imm); } -INLINE void emit_rcr_r8_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 3, dreg); } -INLINE void emit_rcr_m8_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Eb_CL, OP_32BIT, 3, MEMPARAMS); } +INLINE void emit_rcr_r8_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 3, dreg, imm); } +INLINE void emit_rcr_m8_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 3, MEMPARAMS, imm); } +INLINE void emit_rcr_r8_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 3, dreg); } +INLINE void emit_rcr_m8_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Eb_CL, OP_32BIT, 3, MEMPARAMS); } -INLINE void emit_shl_r8_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 4, dreg, imm); } -INLINE void emit_shl_m8_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 4, MEMPARAMS, imm); } -INLINE void emit_shl_r8_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 4, dreg); } -INLINE void emit_shl_m8_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Eb_CL, OP_32BIT, 4, MEMPARAMS); } +INLINE void emit_shl_r8_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 4, dreg, imm); } +INLINE void emit_shl_m8_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 4, MEMPARAMS, imm); } +INLINE void emit_shl_r8_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 4, dreg); } +INLINE void emit_shl_m8_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Eb_CL, OP_32BIT, 4, MEMPARAMS); } -INLINE void emit_shr_r8_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 5, dreg, imm); } -INLINE void emit_shr_m8_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 5, MEMPARAMS, imm); } -INLINE void emit_shr_r8_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 5, dreg); } -INLINE void emit_shr_m8_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Eb_CL, OP_32BIT, 5, MEMPARAMS); } +INLINE void emit_shr_r8_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 5, dreg, imm); } +INLINE void emit_shr_m8_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 5, MEMPARAMS, imm); } +INLINE void emit_shr_r8_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 5, dreg); } +INLINE void emit_shr_m8_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Eb_CL, OP_32BIT, 5, MEMPARAMS); } -INLINE void emit_sar_r8_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 7, dreg, imm); } -INLINE void emit_sar_m8_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 7, MEMPARAMS, imm); } -INLINE void emit_sar_r8_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 7, dreg); } -INLINE void emit_sar_m8_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Eb_CL, OP_32BIT, 7, MEMPARAMS); } +INLINE void emit_sar_r8_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 7, dreg, imm); } +INLINE void emit_sar_m8_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 7, MEMPARAMS, imm); } +INLINE void emit_sar_r8_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 7, dreg); } +INLINE void emit_sar_m8_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Eb_CL, OP_32BIT, 7, MEMPARAMS); } /*------------------------------------------------- emit_shift_r16_* -------------------------------------------------*/ -INLINE void emit_rol_r16_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 0, dreg, imm); } -INLINE void emit_rol_m16_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 0, MEMPARAMS, imm); } -INLINE void emit_rol_r16_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 0, dreg); } -INLINE void emit_rol_m16_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_16BIT, 0, MEMPARAMS); } +INLINE void emit_rol_r16_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 0, dreg, imm); } +INLINE void emit_rol_m16_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 0, MEMPARAMS, imm); } +INLINE void emit_rol_r16_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 0, dreg); } +INLINE void emit_rol_m16_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_16BIT, 0, MEMPARAMS); } -INLINE void emit_ror_r16_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 1, dreg, imm); } -INLINE void emit_ror_m16_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 1, MEMPARAMS, imm); } -INLINE void emit_ror_r16_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 1, dreg); } -INLINE void emit_ror_m16_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_16BIT, 1, MEMPARAMS); } +INLINE void emit_ror_r16_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 1, dreg, imm); } +INLINE void emit_ror_m16_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 1, MEMPARAMS, imm); } +INLINE void emit_ror_r16_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 1, dreg); } +INLINE void emit_ror_m16_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_16BIT, 1, MEMPARAMS); } -INLINE void emit_rcl_r16_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 2, dreg, imm); } -INLINE void emit_rcl_m16_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 2, MEMPARAMS, imm); } -INLINE void emit_rcl_r16_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 2, dreg); } -INLINE void emit_rcl_m16_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_16BIT, 2, MEMPARAMS); } +INLINE void emit_rcl_r16_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 2, dreg, imm); } +INLINE void emit_rcl_m16_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 2, MEMPARAMS, imm); } +INLINE void emit_rcl_r16_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 2, dreg); } +INLINE void emit_rcl_m16_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_16BIT, 2, MEMPARAMS); } -INLINE void emit_rcr_r16_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 3, dreg, imm); } -INLINE void emit_rcr_m16_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 3, MEMPARAMS, imm); } -INLINE void emit_rcr_r16_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 3, dreg); } -INLINE void emit_rcr_m16_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_16BIT, 3, MEMPARAMS); } +INLINE void emit_rcr_r16_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 3, dreg, imm); } +INLINE void emit_rcr_m16_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 3, MEMPARAMS, imm); } +INLINE void emit_rcr_r16_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 3, dreg); } +INLINE void emit_rcr_m16_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_16BIT, 3, MEMPARAMS); } -INLINE void emit_shl_r16_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 4, dreg, imm); } -INLINE void emit_shl_m16_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 4, MEMPARAMS, imm); } -INLINE void emit_shl_r16_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 4, dreg); } -INLINE void emit_shl_m16_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_16BIT, 4, MEMPARAMS); } +INLINE void emit_shl_r16_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 4, dreg, imm); } +INLINE void emit_shl_m16_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 4, MEMPARAMS, imm); } +INLINE void emit_shl_r16_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 4, dreg); } +INLINE void emit_shl_m16_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_16BIT, 4, MEMPARAMS); } -INLINE void emit_shr_r16_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 5, dreg, imm); } -INLINE void emit_shr_m16_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 5, MEMPARAMS, imm); } -INLINE void emit_shr_r16_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 5, dreg); } -INLINE void emit_shr_m16_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_16BIT, 5, MEMPARAMS); } +INLINE void emit_shr_r16_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 5, dreg, imm); } +INLINE void emit_shr_m16_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 5, MEMPARAMS, imm); } +INLINE void emit_shr_r16_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 5, dreg); } +INLINE void emit_shr_m16_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_16BIT, 5, MEMPARAMS); } -INLINE void emit_sar_r16_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 7, dreg, imm); } -INLINE void emit_sar_m16_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 7, MEMPARAMS, imm); } -INLINE void emit_sar_r16_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 7, dreg); } -INLINE void emit_sar_m16_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_16BIT, 7, MEMPARAMS); } +INLINE void emit_sar_r16_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 7, dreg, imm); } +INLINE void emit_sar_m16_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 7, MEMPARAMS, imm); } +INLINE void emit_sar_r16_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 7, dreg); } +INLINE void emit_sar_m16_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_16BIT, 7, MEMPARAMS); } /*------------------------------------------------- emit_shift_r32_* -------------------------------------------------*/ -INLINE void emit_rol_r32_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 0, dreg, imm); } -INLINE void emit_rol_m32_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 0, MEMPARAMS, imm); } -INLINE void emit_rol_r32_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 0, dreg); } -INLINE void emit_rol_m32_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_32BIT, 0, MEMPARAMS); } - -INLINE void emit_ror_r32_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 1, dreg, imm); } -INLINE void emit_ror_m32_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 1, MEMPARAMS, imm); } -INLINE void emit_ror_r32_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 1, dreg); } -INLINE void emit_ror_m32_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_32BIT, 1, MEMPARAMS); } - -INLINE void emit_rcl_r32_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 2, dreg, imm); } -INLINE void emit_rcl_m32_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 2, MEMPARAMS, imm); } -INLINE void emit_rcl_r32_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 2, dreg); } -INLINE void emit_rcl_m32_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_32BIT, 2, MEMPARAMS); } - -INLINE void emit_rcr_r32_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 3, dreg, imm); } -INLINE void emit_rcr_m32_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 3, MEMPARAMS, imm); } -INLINE void emit_rcr_r32_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 3, dreg); } -INLINE void emit_rcr_m32_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_32BIT, 3, MEMPARAMS); } - -INLINE void emit_shl_r32_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 4, dreg, imm); } -INLINE void emit_shl_m32_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 4, MEMPARAMS, imm); } -INLINE void emit_shl_r32_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 4, dreg); } -INLINE void emit_shl_m32_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_32BIT, 4, MEMPARAMS); } - -INLINE void emit_shr_r32_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 5, dreg, imm); } -INLINE void emit_shr_m32_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 5, MEMPARAMS, imm); } -INLINE void emit_shr_r32_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 5, dreg); } -INLINE void emit_shr_m32_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_32BIT, 5, MEMPARAMS); } - -INLINE void emit_sar_r32_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 7, dreg, imm); } -INLINE void emit_sar_m32_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 7, MEMPARAMS, imm); } -INLINE void emit_sar_r32_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 7, dreg); } -INLINE void emit_sar_m32_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_32BIT, 7, MEMPARAMS); } +INLINE void emit_rol_r32_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 0, dreg, imm); } +INLINE void emit_rol_m32_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 0, MEMPARAMS, imm); } +INLINE void emit_rol_r32_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 0, dreg); } +INLINE void emit_rol_m32_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_32BIT, 0, MEMPARAMS); } + +INLINE void emit_ror_r32_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 1, dreg, imm); } +INLINE void emit_ror_m32_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 1, MEMPARAMS, imm); } +INLINE void emit_ror_r32_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 1, dreg); } +INLINE void emit_ror_m32_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_32BIT, 1, MEMPARAMS); } + +INLINE void emit_rcl_r32_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 2, dreg, imm); } +INLINE void emit_rcl_m32_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 2, MEMPARAMS, imm); } +INLINE void emit_rcl_r32_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 2, dreg); } +INLINE void emit_rcl_m32_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_32BIT, 2, MEMPARAMS); } + +INLINE void emit_rcr_r32_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 3, dreg, imm); } +INLINE void emit_rcr_m32_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 3, MEMPARAMS, imm); } +INLINE void emit_rcr_r32_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 3, dreg); } +INLINE void emit_rcr_m32_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_32BIT, 3, MEMPARAMS); } + +INLINE void emit_shl_r32_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 4, dreg, imm); } +INLINE void emit_shl_m32_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 4, MEMPARAMS, imm); } +INLINE void emit_shl_r32_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 4, dreg); } +INLINE void emit_shl_m32_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_32BIT, 4, MEMPARAMS); } + +INLINE void emit_shr_r32_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 5, dreg, imm); } +INLINE void emit_shr_m32_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 5, MEMPARAMS, imm); } +INLINE void emit_shr_r32_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 5, dreg); } +INLINE void emit_shr_m32_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_32BIT, 5, MEMPARAMS); } + +INLINE void emit_sar_r32_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 7, dreg, imm); } +INLINE void emit_sar_m32_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 7, MEMPARAMS, imm); } +INLINE void emit_sar_r32_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 7, dreg); } +INLINE void emit_sar_m32_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_32BIT, 7, MEMPARAMS); } INLINE void emit_shld_r32_r32_imm(x86code **emitptr, UINT8 dreg, UINT8 sreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_SHLD_Ev_Gv_Ib, OP_32BIT, sreg, dreg, imm); } INLINE void emit_shld_m32_r32_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_SHLD_Ev_Gv_Ib, OP_32BIT, sreg, MEMPARAMS, imm); } @@ -2393,40 +2393,40 @@ INLINE void emit_shrd_m32_r32_cl(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sre #ifdef PTR64 -INLINE void emit_rol_r64_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 0, dreg, imm); } -INLINE void emit_rol_m64_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 0, MEMPARAMS, imm); } -INLINE void emit_rol_r64_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 0, dreg); } -INLINE void emit_rol_m64_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_64BIT, 0, MEMPARAMS); } - -INLINE void emit_ror_r64_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 1, dreg, imm); } -INLINE void emit_ror_m64_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 1, MEMPARAMS, imm); } -INLINE void emit_ror_r64_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 1, dreg); } -INLINE void emit_ror_m64_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_64BIT, 1, MEMPARAMS); } - -INLINE void emit_rcl_r64_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 2, dreg, imm); } -INLINE void emit_rcl_m64_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 2, MEMPARAMS, imm); } -INLINE void emit_rcl_r64_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 2, dreg); } -INLINE void emit_rcl_m64_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_64BIT, 2, MEMPARAMS); } - -INLINE void emit_rcr_r64_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 3, dreg, imm); } -INLINE void emit_rcr_m64_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 3, MEMPARAMS, imm); } -INLINE void emit_rcr_r64_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 3, dreg); } -INLINE void emit_rcr_m64_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_64BIT, 3, MEMPARAMS); } - -INLINE void emit_shl_r64_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 4, dreg, imm); } -INLINE void emit_shl_m64_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 4, MEMPARAMS, imm); } -INLINE void emit_shl_r64_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 4, dreg); } -INLINE void emit_shl_m64_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_64BIT, 4, MEMPARAMS); } - -INLINE void emit_shr_r64_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 5, dreg, imm); } -INLINE void emit_shr_m64_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 5, MEMPARAMS, imm); } -INLINE void emit_shr_r64_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 5, dreg); } -INLINE void emit_shr_m64_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_64BIT, 5, MEMPARAMS); } - -INLINE void emit_sar_r64_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 7, dreg, imm); } -INLINE void emit_sar_m64_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 7, MEMPARAMS, imm); } -INLINE void emit_sar_r64_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 7, dreg); } -INLINE void emit_sar_m64_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_64BIT, 7, MEMPARAMS); } +INLINE void emit_rol_r64_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 0, dreg, imm); } +INLINE void emit_rol_m64_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 0, MEMPARAMS, imm); } +INLINE void emit_rol_r64_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 0, dreg); } +INLINE void emit_rol_m64_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_64BIT, 0, MEMPARAMS); } + +INLINE void emit_ror_r64_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 1, dreg, imm); } +INLINE void emit_ror_m64_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 1, MEMPARAMS, imm); } +INLINE void emit_ror_r64_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 1, dreg); } +INLINE void emit_ror_m64_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_64BIT, 1, MEMPARAMS); } + +INLINE void emit_rcl_r64_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 2, dreg, imm); } +INLINE void emit_rcl_m64_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 2, MEMPARAMS, imm); } +INLINE void emit_rcl_r64_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 2, dreg); } +INLINE void emit_rcl_m64_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_64BIT, 2, MEMPARAMS); } + +INLINE void emit_rcr_r64_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 3, dreg, imm); } +INLINE void emit_rcr_m64_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 3, MEMPARAMS, imm); } +INLINE void emit_rcr_r64_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 3, dreg); } +INLINE void emit_rcr_m64_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_64BIT, 3, MEMPARAMS); } + +INLINE void emit_shl_r64_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 4, dreg, imm); } +INLINE void emit_shl_m64_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 4, MEMPARAMS, imm); } +INLINE void emit_shl_r64_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 4, dreg); } +INLINE void emit_shl_m64_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_64BIT, 4, MEMPARAMS); } + +INLINE void emit_shr_r64_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 5, dreg, imm); } +INLINE void emit_shr_m64_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 5, MEMPARAMS, imm); } +INLINE void emit_shr_r64_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 5, dreg); } +INLINE void emit_shr_m64_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_64BIT, 5, MEMPARAMS); } + +INLINE void emit_sar_r64_imm(x86code **emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 7, dreg, imm); } +INLINE void emit_sar_m64_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 7, MEMPARAMS, imm); } +INLINE void emit_sar_r64_cl(x86code **emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 7, dreg); } +INLINE void emit_sar_m64_cl(x86code **emitptr, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_64BIT, 7, MEMPARAMS); } INLINE void emit_shld_r64_r64_imm(x86code **emitptr, UINT8 dreg, UINT8 sreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_SHLD_Ev_Gv_Ib, OP_64BIT, sreg, dreg, imm); } INLINE void emit_shld_m64_r64_imm(x86code **emitptr, DECLARE_MEMPARAMS, UINT8 sreg, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_SHLD_Ev_Gv_Ib, OP_64BIT, sreg, MEMPARAMS, imm); } @@ -2580,8 +2580,8 @@ INLINE void emit_imul_r64_m64_imm(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARA emit_bswap_* -------------------------------------------------*/ -INLINE void emit_bswap_r32(x86code **emitptr, UINT8 dreg) { emit_op_reg(emitptr, OP_BSWAP_EAX + (dreg & 7), OP_32BIT, dreg); } -INLINE void emit_bswap_r64(x86code **emitptr, UINT8 dreg) { emit_op_reg(emitptr, OP_BSWAP_EAX + (dreg & 7), OP_64BIT, dreg); } +INLINE void emit_bswap_r32(x86code **emitptr, UINT8 dreg) { emit_op_reg(emitptr, OP_BSWAP_EAX + (dreg & 7), OP_32BIT, dreg); } +INLINE void emit_bswap_r64(x86code **emitptr, UINT8 dreg) { emit_op_reg(emitptr, OP_BSWAP_EAX + (dreg & 7), OP_64BIT, dreg); } /*------------------------------------------------- @@ -2589,9 +2589,9 @@ INLINE void emit_bswap_r64(x86code **emitptr, UINT8 dreg) { emit_op_reg(em -------------------------------------------------*/ INLINE void emit_bsf_r16_r16(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_BSF_Gv_Ev, OP_16BIT, dreg, sreg); } -INLINE void emit_bsf_r16_m16(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_BSF_Gv_Ev, OP_16BIT, dreg, MEMPARAMS); } +INLINE void emit_bsf_r16_m16(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_BSF_Gv_Ev, OP_16BIT, dreg, MEMPARAMS); } INLINE void emit_bsr_r16_r16(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_BSR_Gv_Ev, OP_16BIT, dreg, sreg); } -INLINE void emit_bsr_r16_m16(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_BSR_Gv_Ev, OP_16BIT, dreg, MEMPARAMS); } +INLINE void emit_bsr_r16_m16(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_BSR_Gv_Ev, OP_16BIT, dreg, MEMPARAMS); } INLINE void emit_bsf_r32_r32(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_BSF_Gv_Ev, OP_32BIT, dreg, sreg); } INLINE void emit_bsf_r32_m32(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_BSF_Gv_Ev, OP_32BIT, dreg, MEMPARAMS); } @@ -3038,7 +3038,7 @@ INLINE void emit_cvtps2dq_r128_r128(x86code **emitptr, UINT8 dreg, UINT8 sreg) INLINE void emit_cvtps2dq_r128_m128(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_CVTPS2DQ_Vdq_Wps, OP_32BIT, dreg, MEMPARAMS); } INLINE void emit_cvttps2dq_r128_r128(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTTPS2DQ_Vdq_Wps, OP_32BIT, dreg, sreg); } -INLINE void emit_cvttps2dq_r128_m128(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_CVTTPS2DQ_Vdq_Wps, OP_32BIT, dreg, MEMPARAMS); } +INLINE void emit_cvttps2dq_r128_m128(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_CVTTPS2DQ_Vdq_Wps, OP_32BIT, dreg, MEMPARAMS); } INLINE void emit_roundps_r128_r128_imm(x86code **emitptr, UINT8 dreg, UINT8 sreg, UINT8 imm) { emit_op_modrm_reg(emitptr, OP_ROUNDPS_Vdq_Wdq_Ib, OP_32BIT, dreg, sreg); emit_byte(emitptr, imm); } INLINE void emit_roundps_r128_m128_imm(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS, UINT8 imm) { emit_op_modrm_mem(emitptr, OP_ROUNDPS_Vdq_Wdq_Ib, OP_32BIT, dreg, MEMPARAMS); emit_byte(emitptr, imm); } @@ -3151,7 +3151,7 @@ INLINE void emit_cvtpd2dq_r128_r128(x86code **emitptr, UINT8 dreg, UINT8 sreg) INLINE void emit_cvtpd2dq_r128_m128(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_CVTPD2DQ_Vdq_Wpd, OP_32BIT, dreg, MEMPARAMS); } INLINE void emit_cvttpd2dq_r128_r128(x86code **emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTTPD2DQ_Vdq_Wpd, OP_32BIT, dreg, sreg); } -INLINE void emit_cvttpd2dq_r128_m128(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_CVTTPD2DQ_Vdq_Wpd, OP_32BIT, dreg, MEMPARAMS); } +INLINE void emit_cvttpd2dq_r128_m128(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS) { emit_op_modrm_mem(emitptr, OP_CVTTPD2DQ_Vdq_Wpd, OP_32BIT, dreg, MEMPARAMS); } INLINE void emit_roundpd_r128_r128_imm(x86code **emitptr, UINT8 dreg, UINT8 sreg, UINT8 imm) { emit_op_modrm_reg(emitptr, OP_ROUNDPD_Vdq_Wdq_Ib, OP_32BIT, dreg, sreg); emit_byte(emitptr, imm); } INLINE void emit_roundpd_r128_m128_imm(x86code **emitptr, UINT8 dreg, DECLARE_MEMPARAMS, UINT8 imm) { emit_op_modrm_mem(emitptr, OP_ROUNDPD_Vdq_Wdq_Ib, OP_32BIT, dreg, MEMPARAMS); emit_byte(emitptr, imm); } diff --git a/src/emu/cpu/x86log.c b/src/emu/cpu/x86log.c index 059fffefca9..bf61884ce58 100644 --- a/src/emu/cpu/x86log.c +++ b/src/emu/cpu/x86log.c @@ -63,7 +63,7 @@ struct _x86log_context log_comment comment_list[MAX_COMMENTS]; /* list of comments */ int comment_count; /* number of live comments */ - char comment_pool[COMMENT_POOL_SIZE];/* string pool to hold comments */ + char comment_pool[COMMENT_POOL_SIZE];/* string pool to hold comments */ char * comment_pool_next; /* pointer to next string pool location */ }; @@ -219,10 +219,10 @@ void x86log_disasm_code_range(x86log_context *log, const char *label, x86code *s switch (curdata->size) { default: - case 1: sprintf(buffer, "db %02X", *cur); break; - case 2: sprintf(buffer, "dw %04X", *(UINT16 *)cur); break; - case 4: sprintf(buffer, "dd %08X", *(UINT32 *)cur); break; - case 8: sprintf(buffer, "dq %08X%08X", ((UINT32 *)cur)[1], ((UINT32 *)cur)[0]); break; + case 1: sprintf(buffer, "db %02X", *cur); break; + case 2: sprintf(buffer, "dw %04X", *(UINT16 *)cur); break; + case 4: sprintf(buffer, "dd %08X", *(UINT32 *)cur); break; + case 8: sprintf(buffer, "dq %08X%08X", ((UINT32 *)cur)[1], ((UINT32 *)cur)[0]); break; } } diff --git a/src/emu/cpu/z180/z180.c b/src/emu/cpu/z180/z180.c index 3924b4fbe5d..d2bcd3898db 100644 --- a/src/emu/cpu/z180/z180.c +++ b/src/emu/cpu/z180/z180.c @@ -2322,7 +2322,7 @@ static CPU_EXECUTE( z180 ) { LOG(("Z180 '%s' take NMI\n", cpustate->device->tag)); cpustate->_PPC = -1; /* there isn't a valid previous program counter */ - LEAVE_HALT(cpustate); /* Check if processor was halted */ + LEAVE_HALT(cpustate); /* Check if processor was halted */ /* disable DMA transfers!! */ cpustate->IO_DSTAT &= ~Z180_DSTAT_DME; @@ -2516,12 +2516,12 @@ static CPU_SET_INFO( z180 ) case CPUINFO_INT_INPUT_STATE + Z180_INT0: set_irq_line(cpustate, Z180_INT0, info->i); break; /* --- the following bits of info are set as pointers to data or functions --- */ - case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_op: cpustate->cc[Z180_TABLE_op] = (UINT8 *)info->p; break; - case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_cb: cpustate->cc[Z180_TABLE_cb] = (UINT8 *)info->p; break; - case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_ed: cpustate->cc[Z180_TABLE_ed] = (UINT8 *)info->p; break; - case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_xy: cpustate->cc[Z180_TABLE_xy] = (UINT8 *)info->p; break; - case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_xycb: cpustate->cc[Z180_TABLE_xycb] = (UINT8 *)info->p; break; - case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_ex: cpustate->cc[Z180_TABLE_ex] = (UINT8 *)info->p; break; + case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_op: cpustate->cc[Z180_TABLE_op] = (UINT8 *)info->p; break; + case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_cb: cpustate->cc[Z180_TABLE_cb] = (UINT8 *)info->p; break; + case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_ed: cpustate->cc[Z180_TABLE_ed] = (UINT8 *)info->p; break; + case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_xy: cpustate->cc[Z180_TABLE_xy] = (UINT8 *)info->p; break; + case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_xycb: cpustate->cc[Z180_TABLE_xycb] = (UINT8 *)info->p; break; + case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_ex: cpustate->cc[Z180_TABLE_ex] = (UINT8 *)info->p; break; } } @@ -2551,8 +2551,8 @@ CPU_GET_INFO( z180 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 20; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 16; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 16; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_state; break; case CPUINFO_INT_INPUT_STATE + Z180_INT0: info->i = cpustate->irq_state[0]; break; @@ -2574,12 +2574,12 @@ CPU_GET_INFO( z180 ) case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break; case CPUINFO_PTR_STATE_TABLE: info->state_table = &cpustate->state; break; - case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_op: info->p = (void *)cpustate->cc[Z180_TABLE_op]; break; - case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_cb: info->p = (void *)cpustate->cc[Z180_TABLE_cb]; break; - case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_ed: info->p = (void *)cpustate->cc[Z180_TABLE_ed]; break; - case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_xy: info->p = (void *)cpustate->cc[Z180_TABLE_xy]; break; + case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_op: info->p = (void *)cpustate->cc[Z180_TABLE_op]; break; + case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_cb: info->p = (void *)cpustate->cc[Z180_TABLE_cb]; break; + case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_ed: info->p = (void *)cpustate->cc[Z180_TABLE_ed]; break; + case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_xy: info->p = (void *)cpustate->cc[Z180_TABLE_xy]; break; case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_xycb: info->p = (void *)cpustate->cc[Z180_TABLE_xycb]; break; - case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_ex: info->p = (void *)cpustate->cc[Z180_TABLE_ex]; break; + case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_ex: info->p = (void *)cpustate->cc[Z180_TABLE_ex]; break; /* --- the following bits of info are returned as NULL-terminated strings --- */ case DEVINFO_STR_NAME: strcpy(info->s, "Z180"); break; diff --git a/src/emu/cpu/z180/z180cb.c b/src/emu/cpu/z180/z180cb.c index 77db1acc93a..6c24c6971e5 100644 --- a/src/emu/cpu/z180/z180cb.c +++ b/src/emu/cpu/z180/z180cb.c @@ -26,7 +26,7 @@ OP(cb,12) { cpustate->_D = RL(cpustate, cpustate->_D); } /* RL D OP(cb,13) { cpustate->_E = RL(cpustate, cpustate->_E); } /* RL E */ OP(cb,14) { cpustate->_H = RL(cpustate, cpustate->_H); } /* RL H */ OP(cb,15) { cpustate->_L = RL(cpustate, cpustate->_L); } /* RL L */ -OP(cb,16) { WM(cpustate, cpustate->_HL, RL(cpustate, RM(cpustate, cpustate->_HL)) ); } /* RL (HL) */ +OP(cb,16) { WM(cpustate, cpustate->_HL, RL(cpustate, RM(cpustate, cpustate->_HL)) ); } /* RL (HL) */ OP(cb,17) { cpustate->_A = RL(cpustate, cpustate->_A); } /* RL A */ OP(cb,18) { cpustate->_B = RR(cpustate, cpustate->_B); } /* RR B */ @@ -35,7 +35,7 @@ OP(cb,1a) { cpustate->_D = RR(cpustate, cpustate->_D); } /* RR D OP(cb,1b) { cpustate->_E = RR(cpustate, cpustate->_E); } /* RR E */ OP(cb,1c) { cpustate->_H = RR(cpustate, cpustate->_H); } /* RR H */ OP(cb,1d) { cpustate->_L = RR(cpustate, cpustate->_L); } /* RR L */ -OP(cb,1e) { WM(cpustate, cpustate->_HL, RR(cpustate, RM(cpustate, cpustate->_HL)) ); } /* RR (HL) */ +OP(cb,1e) { WM(cpustate, cpustate->_HL, RR(cpustate, RM(cpustate, cpustate->_HL)) ); } /* RR (HL) */ OP(cb,1f) { cpustate->_A = RR(cpustate, cpustate->_A); } /* RR A */ OP(cb,20) { cpustate->_B = SLA(cpustate, cpustate->_B); } /* SLA B */ diff --git a/src/emu/cpu/z180/z180dd.c b/src/emu/cpu/z180/z180dd.c index 2ec62f63d9f..c2898097b4c 100644 --- a/src/emu/cpu/z180/z180dd.c +++ b/src/emu/cpu/z180/z180dd.c @@ -16,7 +16,7 @@ OP(dd,06) { illegal_1(cpustate); op_06(cpustate); } /* DB DD OP(dd,07) { illegal_1(cpustate); op_07(cpustate); } /* DB DD */ OP(dd,08) { illegal_1(cpustate); op_08(cpustate); } /* DB DD */ -OP(dd,09) { cpustate->R++; ADD16(IX,BC); } /* ADD IX,BC */ +OP(dd,09) { cpustate->R++; ADD16(IX,BC); } /* ADD IX,BC */ OP(dd,0a) { illegal_1(cpustate); op_0a(cpustate); } /* DB DD */ OP(dd,0b) { illegal_1(cpustate); op_0b(cpustate); } /* DB DD */ OP(dd,0c) { illegal_1(cpustate); op_0c(cpustate); } /* DB DD */ @@ -34,7 +34,7 @@ OP(dd,16) { illegal_1(cpustate); op_16(cpustate); } /* DB DD OP(dd,17) { illegal_1(cpustate); op_17(cpustate); } /* DB DD */ OP(dd,18) { illegal_1(cpustate); op_18(cpustate); } /* DB DD */ -OP(dd,19) { cpustate->R++; ADD16(IX,DE); } /* ADD IX,DE */ +OP(dd,19) { cpustate->R++; ADD16(IX,DE); } /* ADD IX,DE */ OP(dd,1a) { illegal_1(cpustate); op_1a(cpustate); } /* DB DD */ OP(dd,1b) { illegal_1(cpustate); op_1b(cpustate); } /* DB DD */ OP(dd,1c) { illegal_1(cpustate); op_1c(cpustate); } /* DB DD */ @@ -52,7 +52,7 @@ OP(dd,26) { cpustate->R++; cpustate->_HX = ARG(cpustate); } /* LD HX, OP(dd,27) { illegal_1(cpustate); op_27(cpustate); } /* DB DD */ OP(dd,28) { illegal_1(cpustate); op_28(cpustate); } /* DB DD */ -OP(dd,29) { cpustate->R++; ADD16(IX,IX); } /* ADD IX,IX */ +OP(dd,29) { cpustate->R++; ADD16(IX,IX); } /* ADD IX,IX */ OP(dd,2a) { cpustate->R++; cpustate->ea = ARG16(cpustate); RM16(cpustate, cpustate->ea, &cpustate->IX ); } /* LD IX,(w) */ OP(dd,2b) { cpustate->R++; cpustate->_IX--; } /* DEC IX */ OP(dd,2c) { cpustate->R++; cpustate->_LX = INC(cpustate, cpustate->_LX); } /* INC LX */ @@ -66,11 +66,11 @@ OP(dd,32) { illegal_1(cpustate); op_32(cpustate); } /* DB DD OP(dd,33) { illegal_1(cpustate); op_33(cpustate); } /* DB DD */ OP(dd,34) { cpustate->R++; EAX(cpustate); WM(cpustate, cpustate->ea, INC(cpustate, RM(cpustate, cpustate->ea)) ); } /* INC (IX+o) */ OP(dd,35) { cpustate->R++; EAX(cpustate); WM(cpustate, cpustate->ea, DEC(cpustate, RM(cpustate, cpustate->ea)) ); } /* DEC (IX+o) */ -OP(dd,36) { cpustate->R++; EAX(cpustate); WM(cpustate, cpustate->ea, ARG(cpustate) ); } /* LD (IX+o),n */ +OP(dd,36) { cpustate->R++; EAX(cpustate); WM(cpustate, cpustate->ea, ARG(cpustate) ); } /* LD (IX+o),n */ OP(dd,37) { illegal_1(cpustate); op_37(cpustate); } /* DB DD */ OP(dd,38) { illegal_1(cpustate); op_38(cpustate); } /* DB DD */ -OP(dd,39) { cpustate->R++; ADD16(IX,SP); } /* ADD IX,SP */ +OP(dd,39) { cpustate->R++; ADD16(IX,SP); } /* ADD IX,SP */ OP(dd,3a) { illegal_1(cpustate); op_3a(cpustate); } /* DB DD */ OP(dd,3b) { illegal_1(cpustate); op_3b(cpustate); } /* DB DD */ OP(dd,3c) { illegal_1(cpustate); op_3c(cpustate); } /* DB DD */ @@ -82,55 +82,55 @@ OP(dd,40) { illegal_1(cpustate); op_40(cpustate); } /* DB DD OP(dd,41) { illegal_1(cpustate); op_41(cpustate); } /* DB DD */ OP(dd,42) { illegal_1(cpustate); op_42(cpustate); } /* DB DD */ OP(dd,43) { illegal_1(cpustate); op_43(cpustate); } /* DB DD */ -OP(dd,44) { cpustate->R++; cpustate->_B = cpustate->_HX; } /* LD B,HX */ -OP(dd,45) { cpustate->R++; cpustate->_B = cpustate->_LX; } /* LD B,LX */ -OP(dd,46) { cpustate->R++; EAX(cpustate); cpustate->_B = RM(cpustate, cpustate->ea); } /* LD B,(IX+o) */ +OP(dd,44) { cpustate->R++; cpustate->_B = cpustate->_HX; } /* LD B,HX */ +OP(dd,45) { cpustate->R++; cpustate->_B = cpustate->_LX; } /* LD B,LX */ +OP(dd,46) { cpustate->R++; EAX(cpustate); cpustate->_B = RM(cpustate, cpustate->ea); } /* LD B,(IX+o) */ OP(dd,47) { illegal_1(cpustate); op_47(cpustate); } /* DB DD */ OP(dd,48) { illegal_1(cpustate); op_48(cpustate); } /* DB DD */ OP(dd,49) { illegal_1(cpustate); op_49(cpustate); } /* DB DD */ OP(dd,4a) { illegal_1(cpustate); op_4a(cpustate); } /* DB DD */ OP(dd,4b) { illegal_1(cpustate); op_4b(cpustate); } /* DB DD */ -OP(dd,4c) { cpustate->R++; cpustate->_C = cpustate->_HX; } /* LD C,HX */ -OP(dd,4d) { cpustate->R++; cpustate->_C = cpustate->_LX; } /* LD C,LX */ -OP(dd,4e) { cpustate->R++; EAX(cpustate); cpustate->_C = RM(cpustate, cpustate->ea); } /* LD C,(IX+o) */ +OP(dd,4c) { cpustate->R++; cpustate->_C = cpustate->_HX; } /* LD C,HX */ +OP(dd,4d) { cpustate->R++; cpustate->_C = cpustate->_LX; } /* LD C,LX */ +OP(dd,4e) { cpustate->R++; EAX(cpustate); cpustate->_C = RM(cpustate, cpustate->ea); } /* LD C,(IX+o) */ OP(dd,4f) { illegal_1(cpustate); op_4f(cpustate); } /* DB DD */ OP(dd,50) { illegal_1(cpustate); op_50(cpustate); } /* DB DD */ OP(dd,51) { illegal_1(cpustate); op_51(cpustate); } /* DB DD */ OP(dd,52) { illegal_1(cpustate); op_52(cpustate); } /* DB DD */ OP(dd,53) { illegal_1(cpustate); op_53(cpustate); } /* DB DD */ -OP(dd,54) { cpustate->R++; cpustate->_D = cpustate->_HX; } /* LD D,HX */ -OP(dd,55) { cpustate->R++; cpustate->_D = cpustate->_LX; } /* LD D,LX */ -OP(dd,56) { cpustate->R++; EAX(cpustate); cpustate->_D = RM(cpustate, cpustate->ea); } /* LD D,(IX+o) */ +OP(dd,54) { cpustate->R++; cpustate->_D = cpustate->_HX; } /* LD D,HX */ +OP(dd,55) { cpustate->R++; cpustate->_D = cpustate->_LX; } /* LD D,LX */ +OP(dd,56) { cpustate->R++; EAX(cpustate); cpustate->_D = RM(cpustate, cpustate->ea); } /* LD D,(IX+o) */ OP(dd,57) { illegal_1(cpustate); op_57(cpustate); } /* DB DD */ OP(dd,58) { illegal_1(cpustate); op_58(cpustate); } /* DB DD */ OP(dd,59) { illegal_1(cpustate); op_59(cpustate); } /* DB DD */ OP(dd,5a) { illegal_1(cpustate); op_5a(cpustate); } /* DB DD */ OP(dd,5b) { illegal_1(cpustate); op_5b(cpustate); } /* DB DD */ -OP(dd,5c) { cpustate->R++; cpustate->_E = cpustate->_HX; } /* LD E,HX */ -OP(dd,5d) { cpustate->R++; cpustate->_E = cpustate->_LX; } /* LD E,LX */ -OP(dd,5e) { cpustate->R++; EAX(cpustate); cpustate->_E = RM(cpustate, cpustate->ea); } /* LD E,(IX+o) */ +OP(dd,5c) { cpustate->R++; cpustate->_E = cpustate->_HX; } /* LD E,HX */ +OP(dd,5d) { cpustate->R++; cpustate->_E = cpustate->_LX; } /* LD E,LX */ +OP(dd,5e) { cpustate->R++; EAX(cpustate); cpustate->_E = RM(cpustate, cpustate->ea); } /* LD E,(IX+o) */ OP(dd,5f) { illegal_1(cpustate); op_5f(cpustate); } /* DB DD */ -OP(dd,60) { cpustate->R++; cpustate->_HX = cpustate->_B; } /* LD HX,B */ -OP(dd,61) { cpustate->R++; cpustate->_HX = cpustate->_C; } /* LD HX,C */ -OP(dd,62) { cpustate->R++; cpustate->_HX = cpustate->_D; } /* LD HX,D */ -OP(dd,63) { cpustate->R++; cpustate->_HX = cpustate->_E; } /* LD HX,E */ +OP(dd,60) { cpustate->R++; cpustate->_HX = cpustate->_B; } /* LD HX,B */ +OP(dd,61) { cpustate->R++; cpustate->_HX = cpustate->_C; } /* LD HX,C */ +OP(dd,62) { cpustate->R++; cpustate->_HX = cpustate->_D; } /* LD HX,D */ +OP(dd,63) { cpustate->R++; cpustate->_HX = cpustate->_E; } /* LD HX,E */ OP(dd,64) { } /* LD HX,HX */ OP(dd,65) { cpustate->R++; cpustate->_HX = cpustate->_LX; } /* LD HX,LX */ -OP(dd,66) { cpustate->R++; EAX(cpustate); cpustate->_H = RM(cpustate, cpustate->ea); } /* LD H,(IX+o) */ -OP(dd,67) { cpustate->R++; cpustate->_HX = cpustate->_A; } /* LD HX,A */ +OP(dd,66) { cpustate->R++; EAX(cpustate); cpustate->_H = RM(cpustate, cpustate->ea); } /* LD H,(IX+o) */ +OP(dd,67) { cpustate->R++; cpustate->_HX = cpustate->_A; } /* LD HX,A */ -OP(dd,68) { cpustate->R++; cpustate->_LX = cpustate->_B; } /* LD LX,B */ -OP(dd,69) { cpustate->R++; cpustate->_LX = cpustate->_C; } /* LD LX,C */ -OP(dd,6a) { cpustate->R++; cpustate->_LX = cpustate->_D; } /* LD LX,D */ -OP(dd,6b) { cpustate->R++; cpustate->_LX = cpustate->_E; } /* LD LX,E */ +OP(dd,68) { cpustate->R++; cpustate->_LX = cpustate->_B; } /* LD LX,B */ +OP(dd,69) { cpustate->R++; cpustate->_LX = cpustate->_C; } /* LD LX,C */ +OP(dd,6a) { cpustate->R++; cpustate->_LX = cpustate->_D; } /* LD LX,D */ +OP(dd,6b) { cpustate->R++; cpustate->_LX = cpustate->_E; } /* LD LX,E */ OP(dd,6c) { cpustate->R++; cpustate->_LX = cpustate->_HX; } /* LD LX,HX */ OP(dd,6d) { } /* LD LX,LX */ -OP(dd,6e) { cpustate->R++; EAX(cpustate); cpustate->_L = RM(cpustate, cpustate->ea); } /* LD L,(IX+o) */ -OP(dd,6f) { cpustate->R++; cpustate->_LX = cpustate->_A; } /* LD LX,A */ +OP(dd,6e) { cpustate->R++; EAX(cpustate); cpustate->_L = RM(cpustate, cpustate->ea); } /* LD L,(IX+o) */ +OP(dd,6f) { cpustate->R++; cpustate->_LX = cpustate->_A; } /* LD LX,A */ OP(dd,70) { cpustate->R++; EAX(cpustate); WM(cpustate, cpustate->ea, cpustate->_B ); } /* LD (IX+o),B */ OP(dd,71) { cpustate->R++; EAX(cpustate); WM(cpustate, cpustate->ea, cpustate->_C ); } /* LD (IX+o),C */ @@ -145,63 +145,63 @@ OP(dd,78) { illegal_1(cpustate); op_78(cpustate); } /* DB DD OP(dd,79) { illegal_1(cpustate); op_79(cpustate); } /* DB DD */ OP(dd,7a) { illegal_1(cpustate); op_7a(cpustate); } /* DB DD */ OP(dd,7b) { illegal_1(cpustate); op_7b(cpustate); } /* DB DD */ -OP(dd,7c) { cpustate->R++; cpustate->_A = cpustate->_HX; } /* LD A,HX */ -OP(dd,7d) { cpustate->R++; cpustate->_A = cpustate->_LX; } /* LD A,LX */ -OP(dd,7e) { cpustate->R++; EAX(cpustate); cpustate->_A = RM(cpustate, cpustate->ea); } /* LD A,(IX+o) */ +OP(dd,7c) { cpustate->R++; cpustate->_A = cpustate->_HX; } /* LD A,HX */ +OP(dd,7d) { cpustate->R++; cpustate->_A = cpustate->_LX; } /* LD A,LX */ +OP(dd,7e) { cpustate->R++; EAX(cpustate); cpustate->_A = RM(cpustate, cpustate->ea); } /* LD A,(IX+o) */ OP(dd,7f) { illegal_1(cpustate); op_7f(cpustate); } /* DB DD */ OP(dd,80) { illegal_1(cpustate); op_80(cpustate); } /* DB DD */ OP(dd,81) { illegal_1(cpustate); op_81(cpustate); } /* DB DD */ OP(dd,82) { illegal_1(cpustate); op_82(cpustate); } /* DB DD */ OP(dd,83) { illegal_1(cpustate); op_83(cpustate); } /* DB DD */ -OP(dd,84) { cpustate->R++; ADD(cpustate->_HX); } /* ADD A,HX */ -OP(dd,85) { cpustate->R++; ADD(cpustate->_LX); } /* ADD A,LX */ -OP(dd,86) { cpustate->R++; EAX(cpustate); ADD(RM(cpustate, cpustate->ea)); } /* ADD A,(IX+o) */ +OP(dd,84) { cpustate->R++; ADD(cpustate->_HX); } /* ADD A,HX */ +OP(dd,85) { cpustate->R++; ADD(cpustate->_LX); } /* ADD A,LX */ +OP(dd,86) { cpustate->R++; EAX(cpustate); ADD(RM(cpustate, cpustate->ea)); } /* ADD A,(IX+o) */ OP(dd,87) { illegal_1(cpustate); op_87(cpustate); } /* DB DD */ OP(dd,88) { illegal_1(cpustate); op_88(cpustate); } /* DB DD */ OP(dd,89) { illegal_1(cpustate); op_89(cpustate); } /* DB DD */ OP(dd,8a) { illegal_1(cpustate); op_8a(cpustate); } /* DB DD */ OP(dd,8b) { illegal_1(cpustate); op_8b(cpustate); } /* DB DD */ -OP(dd,8c) { cpustate->R++; ADC(cpustate->_HX); } /* ADC A,HX */ -OP(dd,8d) { cpustate->R++; ADC(cpustate->_LX); } /* ADC A,LX */ -OP(dd,8e) { cpustate->R++; EAX(cpustate); ADC(RM(cpustate, cpustate->ea)); } /* ADC A,(IX+o) */ +OP(dd,8c) { cpustate->R++; ADC(cpustate->_HX); } /* ADC A,HX */ +OP(dd,8d) { cpustate->R++; ADC(cpustate->_LX); } /* ADC A,LX */ +OP(dd,8e) { cpustate->R++; EAX(cpustate); ADC(RM(cpustate, cpustate->ea)); } /* ADC A,(IX+o) */ OP(dd,8f) { illegal_1(cpustate); op_8f(cpustate); } /* DB DD */ OP(dd,90) { illegal_1(cpustate); op_90(cpustate); } /* DB DD */ OP(dd,91) { illegal_1(cpustate); op_91(cpustate); } /* DB DD */ OP(dd,92) { illegal_1(cpustate); op_92(cpustate); } /* DB DD */ OP(dd,93) { illegal_1(cpustate); op_93(cpustate); } /* DB DD */ -OP(dd,94) { cpustate->R++; SUB(cpustate->_HX); } /* SUB HX */ -OP(dd,95) { cpustate->R++; SUB(cpustate->_LX); } /* SUB LX */ -OP(dd,96) { cpustate->R++; EAX(cpustate); SUB(RM(cpustate, cpustate->ea)); } /* SUB (IX+o) */ +OP(dd,94) { cpustate->R++; SUB(cpustate->_HX); } /* SUB HX */ +OP(dd,95) { cpustate->R++; SUB(cpustate->_LX); } /* SUB LX */ +OP(dd,96) { cpustate->R++; EAX(cpustate); SUB(RM(cpustate, cpustate->ea)); } /* SUB (IX+o) */ OP(dd,97) { illegal_1(cpustate); op_97(cpustate); } /* DB DD */ OP(dd,98) { illegal_1(cpustate); op_98(cpustate); } /* DB DD */ OP(dd,99) { illegal_1(cpustate); op_99(cpustate); } /* DB DD */ OP(dd,9a) { illegal_1(cpustate); op_9a(cpustate); } /* DB DD */ OP(dd,9b) { illegal_1(cpustate); op_9b(cpustate); } /* DB DD */ -OP(dd,9c) { cpustate->R++; SBC(cpustate->_HX); } /* SBC A,HX */ -OP(dd,9d) { cpustate->R++; SBC(cpustate->_LX); } /* SBC A,LX */ -OP(dd,9e) { cpustate->R++; EAX(cpustate); SBC(RM(cpustate, cpustate->ea)); } /* SBC A,(IX+o) */ +OP(dd,9c) { cpustate->R++; SBC(cpustate->_HX); } /* SBC A,HX */ +OP(dd,9d) { cpustate->R++; SBC(cpustate->_LX); } /* SBC A,LX */ +OP(dd,9e) { cpustate->R++; EAX(cpustate); SBC(RM(cpustate, cpustate->ea)); } /* SBC A,(IX+o) */ OP(dd,9f) { illegal_1(cpustate); op_9f(cpustate); } /* DB DD */ OP(dd,a0) { illegal_1(cpustate); op_a0(cpustate); } /* DB DD */ OP(dd,a1) { illegal_1(cpustate); op_a1(cpustate); } /* DB DD */ OP(dd,a2) { illegal_1(cpustate); op_a2(cpustate); } /* DB DD */ OP(dd,a3) { illegal_1(cpustate); op_a3(cpustate); } /* DB DD */ -OP(dd,a4) { cpustate->R++; AND(cpustate->_HX); } /* AND HX */ -OP(dd,a5) { cpustate->R++; AND(cpustate->_LX); } /* AND LX */ -OP(dd,a6) { cpustate->R++; EAX(cpustate); AND(RM(cpustate, cpustate->ea)); } /* AND (IX+o) */ +OP(dd,a4) { cpustate->R++; AND(cpustate->_HX); } /* AND HX */ +OP(dd,a5) { cpustate->R++; AND(cpustate->_LX); } /* AND LX */ +OP(dd,a6) { cpustate->R++; EAX(cpustate); AND(RM(cpustate, cpustate->ea)); } /* AND (IX+o) */ OP(dd,a7) { illegal_1(cpustate); op_a7(cpustate); } /* DB DD */ OP(dd,a8) { illegal_1(cpustate); op_a8(cpustate); } /* DB DD */ OP(dd,a9) { illegal_1(cpustate); op_a9(cpustate); } /* DB DD */ OP(dd,aa) { illegal_1(cpustate); op_aa(cpustate); } /* DB DD */ OP(dd,ab) { illegal_1(cpustate); op_ab(cpustate); } /* DB DD */ -OP(dd,ac) { cpustate->R++; XOR(cpustate->_HX); } /* XOR HX */ -OP(dd,ad) { cpustate->R++; XOR(cpustate->_LX); } /* XOR LX */ -OP(dd,ae) { cpustate->R++; EAX(cpustate); XOR(RM(cpustate, cpustate->ea)); } /* XOR (IX+o) */ +OP(dd,ac) { cpustate->R++; XOR(cpustate->_HX); } /* XOR HX */ +OP(dd,ad) { cpustate->R++; XOR(cpustate->_LX); } /* XOR LX */ +OP(dd,ae) { cpustate->R++; EAX(cpustate); XOR(RM(cpustate, cpustate->ea)); } /* XOR (IX+o) */ OP(dd,af) { illegal_1(cpustate); op_af(cpustate); } /* DB DD */ OP(dd,b0) { illegal_1(cpustate); op_b0(cpustate); } /* DB DD */ @@ -261,14 +261,14 @@ OP(dd,df) { illegal_1(cpustate); op_df(cpustate); } /* DB DD OP(dd,e0) { illegal_1(cpustate); op_e0(cpustate); } /* DB DD */ OP(dd,e1) { cpustate->R++; POP(cpustate, IX); } /* POP IX */ OP(dd,e2) { illegal_1(cpustate); op_e2(cpustate); } /* DB DD */ -OP(dd,e3) { cpustate->R++; EXSP(IX); } /* EX (SP),IX */ +OP(dd,e3) { cpustate->R++; EXSP(IX); } /* EX (SP),IX */ OP(dd,e4) { illegal_1(cpustate); op_e4(cpustate); } /* DB DD */ OP(dd,e5) { cpustate->R++; PUSH(cpustate, IX ); } /* PUSH IX */ OP(dd,e6) { illegal_1(cpustate); op_e6(cpustate); } /* DB DD */ OP(dd,e7) { illegal_1(cpustate); op_e7(cpustate); } /* DB DD */ OP(dd,e8) { illegal_1(cpustate); op_e8(cpustate); } /* DB DD */ -OP(dd,e9) { cpustate->R++; cpustate->_PC = cpustate->_IX; } /* JP (IX) */ +OP(dd,e9) { cpustate->R++; cpustate->_PC = cpustate->_IX; } /* JP (IX) */ OP(dd,ea) { illegal_1(cpustate); op_ea(cpustate); } /* DB DD */ OP(dd,eb) { illegal_1(cpustate); op_eb(cpustate); } /* DB DD */ OP(dd,ec) { illegal_1(cpustate); op_ec(cpustate); } /* DB DD */ diff --git a/src/emu/cpu/z180/z180ed.c b/src/emu/cpu/z180/z180ed.c index ddc0fb62ada..111c53c6515 100644 --- a/src/emu/cpu/z180/z180ed.c +++ b/src/emu/cpu/z180/z180ed.c @@ -82,7 +82,7 @@ OP(ed,3f) { illegal_2(cpustate); } /* DB ED */ OP(ed,40) { cpustate->_B = IN(cpustate, cpustate->_BC); cpustate->_F = (cpustate->_F & CF) | SZP[cpustate->_B]; } /* IN B,(C) */ OP(ed,41) { OUT(cpustate, cpustate->_BC,cpustate->_B); } /* OUT (C),B */ OP(ed,42) { SBC16( BC ); } /* SBC HL,BC */ -OP(ed,43) { cpustate->ea = ARG16(cpustate); WM16(cpustate, cpustate->ea, &cpustate->BC ); } /* LD (w),BC */ +OP(ed,43) { cpustate->ea = ARG16(cpustate); WM16(cpustate, cpustate->ea, &cpustate->BC ); } /* LD (w),BC */ OP(ed,44) { NEG; } /* NEG */ OP(ed,45) { RETN; } /* RETN; */ OP(ed,46) { cpustate->IM = 0; } /* IM 0 */ @@ -91,7 +91,7 @@ OP(ed,47) { LD_I_A; } /* LD I,A */ OP(ed,48) { cpustate->_C = IN(cpustate, cpustate->_BC); cpustate->_F = (cpustate->_F & CF) | SZP[cpustate->_C]; } /* IN C,(C) */ OP(ed,49) { OUT(cpustate, cpustate->_BC,cpustate->_C); } /* OUT (C),C */ OP(ed,4a) { ADC16( BC ); } /* ADC HL,BC */ -OP(ed,4b) { cpustate->ea = ARG16(cpustate); RM16(cpustate, cpustate->ea, &cpustate->BC ); } /* LD BC,(w) */ +OP(ed,4b) { cpustate->ea = ARG16(cpustate); RM16(cpustate, cpustate->ea, &cpustate->BC ); } /* LD BC,(w) */ OP(ed,4c) { MLT( BC ); } /* MLT BC */ OP(ed,4d) { RETI; } /* RETI */ OP(ed,4e) { cpustate->IM = 0; } /* IM 0 */ @@ -100,7 +100,7 @@ OP(ed,4f) { LD_R_A; } /* LD R,A */ OP(ed,50) { cpustate->_D = IN(cpustate, cpustate->_BC); cpustate->_F = (cpustate->_F & CF) | SZP[cpustate->_D]; } /* IN D,(C) */ OP(ed,51) { OUT(cpustate, cpustate->_BC,cpustate->_D); } /* OUT (C),D */ OP(ed,52) { SBC16( DE ); } /* SBC HL,DE */ -OP(ed,53) { cpustate->ea = ARG16(cpustate); WM16(cpustate, cpustate->ea, &cpustate->DE ); } /* LD (w),DE */ +OP(ed,53) { cpustate->ea = ARG16(cpustate); WM16(cpustate, cpustate->ea, &cpustate->DE ); } /* LD (w),DE */ OP(ed,54) { NEG; } /* NEG */ OP(ed,55) { RETN; } /* RETN; */ OP(ed,56) { cpustate->IM = 1; } /* IM 1 */ @@ -109,7 +109,7 @@ OP(ed,57) { LD_A_I; } /* LD A,I */ OP(ed,58) { cpustate->_E = IN(cpustate, cpustate->_BC); cpustate->_F = (cpustate->_F & CF) | SZP[cpustate->_E]; } /* IN E,(C) */ OP(ed,59) { OUT(cpustate, cpustate->_BC,cpustate->_E); } /* OUT (C),E */ OP(ed,5a) { ADC16( DE ); } /* ADC HL,DE */ -OP(ed,5b) { cpustate->ea = ARG16(cpustate); RM16(cpustate, cpustate->ea, &cpustate->DE ); } /* LD DE,(w) */ +OP(ed,5b) { cpustate->ea = ARG16(cpustate); RM16(cpustate, cpustate->ea, &cpustate->DE ); } /* LD DE,(w) */ OP(ed,5c) { MLT( DE ); } /* MLT DE */ OP(ed,5d) { RETI; } /* RETI */ OP(ed,5e) { cpustate->IM = 2; } /* IM 2 */ @@ -118,7 +118,7 @@ OP(ed,5f) { LD_A_R; } /* LD A,R */ OP(ed,60) { cpustate->_H = IN(cpustate, cpustate->_BC); cpustate->_F = (cpustate->_F & CF) | SZP[cpustate->_H]; } /* IN H,(C) */ OP(ed,61) { OUT(cpustate, cpustate->_BC,cpustate->_H); } /* OUT (C),H */ OP(ed,62) { SBC16( HL ); } /* SBC HL,HL */ -OP(ed,63) { cpustate->ea = ARG16(cpustate); WM16(cpustate, cpustate->ea, &cpustate->HL ); } /* LD (w),HL */ +OP(ed,63) { cpustate->ea = ARG16(cpustate); WM16(cpustate, cpustate->ea, &cpustate->HL ); } /* LD (w),HL */ OP(ed,64) { unsigned m = ARG(cpustate); TST( m ); } /* TST m */ OP(ed,65) { RETN; } /* RETN; */ OP(ed,66) { cpustate->IM = 0; } /* IM 0 */ @@ -127,7 +127,7 @@ OP(ed,67) { RRD; } /* RRD (HL) */ OP(ed,68) { cpustate->_L = IN(cpustate, cpustate->_BC); cpustate->_F = (cpustate->_F & CF) | SZP[cpustate->_L]; } /* IN L,(C) */ OP(ed,69) { OUT(cpustate, cpustate->_BC,cpustate->_L); } /* OUT (C),L */ OP(ed,6a) { ADC16( HL ); } /* ADC HL,HL */ -OP(ed,6b) { cpustate->ea = ARG16(cpustate); RM16(cpustate, cpustate->ea, &cpustate->HL ); } /* LD HL,(w) */ +OP(ed,6b) { cpustate->ea = ARG16(cpustate); RM16(cpustate, cpustate->ea, &cpustate->HL ); } /* LD HL,(w) */ OP(ed,6c) { MLT( HL ); } /* MLT HL */ OP(ed,6d) { RETI; } /* RETI */ OP(ed,6e) { cpustate->IM = 0; } /* IM 0 */ @@ -136,7 +136,7 @@ OP(ed,6f) { RLD; } /* RLD (HL) */ OP(ed,70) { UINT8 res = IN(cpustate, cpustate->_BC); cpustate->_F = (cpustate->_F & CF) | SZP[res]; } /* IN 0,(C) */ OP(ed,71) { OUT(cpustate, cpustate->_BC,0); } /* OUT (C),0 */ OP(ed,72) { SBC16( SP ); } /* SBC HL,SP */ -OP(ed,73) { cpustate->ea = ARG16(cpustate); WM16(cpustate, cpustate->ea, &cpustate->SP ); } /* LD (w),SP */ +OP(ed,73) { cpustate->ea = ARG16(cpustate); WM16(cpustate, cpustate->ea, &cpustate->SP ); } /* LD (w),SP */ OP(ed,74) { unsigned m = ARG(cpustate); cpustate->_F = (cpustate->_F & CF) | SZP[IN(cpustate, cpustate->_C) & m]; } /* TSTIO m */ OP(ed,75) { RETN; } /* RETN; */ OP(ed,76) { SLP; } /* SLP */ @@ -145,7 +145,7 @@ OP(ed,77) { illegal_2(cpustate); } /* DB ED,77 */ OP(ed,78) { cpustate->_A = IN(cpustate, cpustate->_BC); cpustate->_F = (cpustate->_F & CF) | SZP[cpustate->_A]; } /* IN E,(C) */ OP(ed,79) { OUT(cpustate, cpustate->_BC,cpustate->_A); } /* OUT (C),E */ OP(ed,7a) { ADC16( SP ); } /* ADC HL,SP */ -OP(ed,7b) { cpustate->ea = ARG16(cpustate); RM16(cpustate, cpustate->ea, &cpustate->SP ); } /* LD SP,(w) */ +OP(ed,7b) { cpustate->ea = ARG16(cpustate); RM16(cpustate, cpustate->ea, &cpustate->SP ); } /* LD SP,(w) */ OP(ed,7c) { MLT( SP ); } /* MLT SP */ OP(ed,7d) { RETI; } /* RETI */ OP(ed,7e) { cpustate->IM = 2; } /* IM 2 */ diff --git a/src/emu/cpu/z180/z180fd.c b/src/emu/cpu/z180/z180fd.c index 5c923b665f9..ee6d29706f2 100644 --- a/src/emu/cpu/z180/z180fd.c +++ b/src/emu/cpu/z180/z180fd.c @@ -11,7 +11,7 @@ OP(fd,06) { illegal_1(cpustate); op_06(cpustate); } /* DB FD OP(fd,07) { illegal_1(cpustate); op_07(cpustate); } /* DB FD */ OP(fd,08) { illegal_1(cpustate); op_08(cpustate); } /* DB FD */ -OP(fd,09) { cpustate->R++; ADD16(IY,BC); } /* ADD IY,BC */ +OP(fd,09) { cpustate->R++; ADD16(IY,BC); } /* ADD IY,BC */ OP(fd,0a) { illegal_1(cpustate); op_0a(cpustate); } /* DB FD */ OP(fd,0b) { illegal_1(cpustate); op_0b(cpustate); } /* DB FD */ OP(fd,0c) { illegal_1(cpustate); op_0c(cpustate); } /* DB FD */ @@ -29,7 +29,7 @@ OP(fd,16) { illegal_1(cpustate); op_16(cpustate); } /* DB FD OP(fd,17) { illegal_1(cpustate); op_17(cpustate); } /* DB FD */ OP(fd,18) { illegal_1(cpustate); op_18(cpustate); } /* DB FD */ -OP(fd,19) { cpustate->R++; ADD16(IY,DE); } /* ADD IY,DE */ +OP(fd,19) { cpustate->R++; ADD16(IY,DE); } /* ADD IY,DE */ OP(fd,1a) { illegal_1(cpustate); op_1a(cpustate); } /* DB FD */ OP(fd,1b) { illegal_1(cpustate); op_1b(cpustate); } /* DB FD */ OP(fd,1c) { illegal_1(cpustate); op_1c(cpustate); } /* DB FD */ @@ -47,7 +47,7 @@ OP(fd,26) { cpustate->R++; cpustate->_HY = ARG(cpustate); } /* LD HY, OP(fd,27) { illegal_1(cpustate); op_27(cpustate); } /* DB FD */ OP(fd,28) { illegal_1(cpustate); op_28(cpustate); } /* DB FD */ -OP(fd,29) { cpustate->R++; ADD16(IY,IY); } /* ADD IY,IY */ +OP(fd,29) { cpustate->R++; ADD16(IY,IY); } /* ADD IY,IY */ OP(fd,2a) { cpustate->R++; cpustate->ea = ARG16(cpustate); RM16(cpustate, cpustate->ea, &cpustate->IY ); } /* LD IY,(w) */ OP(fd,2b) { cpustate->R++; cpustate->_IY--; } /* DEC IY */ OP(fd,2c) { cpustate->R++; cpustate->_LY = INC(cpustate, cpustate->_LY); } /* INC LY */ @@ -61,11 +61,11 @@ OP(fd,32) { illegal_1(cpustate); op_32(cpustate); } /* DB FD OP(fd,33) { illegal_1(cpustate); op_33(cpustate); } /* DB FD */ OP(fd,34) { cpustate->R++; EAY(cpustate); WM(cpustate, cpustate->ea, INC(cpustate, RM(cpustate, cpustate->ea)) ); } /* INC (IY+o) */ OP(fd,35) { cpustate->R++; EAY(cpustate); WM(cpustate, cpustate->ea, DEC(cpustate, RM(cpustate, cpustate->ea)) ); } /* DEC (IY+o) */ -OP(fd,36) { cpustate->R++; EAY(cpustate); WM(cpustate, cpustate->ea, ARG(cpustate) ); } /* LD (IY+o),n */ +OP(fd,36) { cpustate->R++; EAY(cpustate); WM(cpustate, cpustate->ea, ARG(cpustate) ); } /* LD (IY+o),n */ OP(fd,37) { illegal_1(cpustate); op_37(cpustate); } /* DB FD */ OP(fd,38) { illegal_1(cpustate); op_38(cpustate); } /* DB FD */ -OP(fd,39) { cpustate->R++; ADD16(IY,SP); } /* ADD IY,SP */ +OP(fd,39) { cpustate->R++; ADD16(IY,SP); } /* ADD IY,SP */ OP(fd,3a) { illegal_1(cpustate); op_3a(cpustate); } /* DB FD */ OP(fd,3b) { illegal_1(cpustate); op_3b(cpustate); } /* DB FD */ OP(fd,3c) { illegal_1(cpustate); op_3c(cpustate); } /* DB FD */ @@ -77,55 +77,55 @@ OP(fd,40) { illegal_1(cpustate); op_40(cpustate); } /* DB FD OP(fd,41) { illegal_1(cpustate); op_41(cpustate); } /* DB FD */ OP(fd,42) { illegal_1(cpustate); op_42(cpustate); } /* DB FD */ OP(fd,43) { illegal_1(cpustate); op_43(cpustate); } /* DB FD */ -OP(fd,44) { cpustate->R++; cpustate->_B = cpustate->_HY; } /* LD B,HY */ -OP(fd,45) { cpustate->R++; cpustate->_B = cpustate->_LY; } /* LD B,LY */ -OP(fd,46) { cpustate->R++; EAY(cpustate); cpustate->_B = RM(cpustate, cpustate->ea); } /* LD B,(IY+o) */ +OP(fd,44) { cpustate->R++; cpustate->_B = cpustate->_HY; } /* LD B,HY */ +OP(fd,45) { cpustate->R++; cpustate->_B = cpustate->_LY; } /* LD B,LY */ +OP(fd,46) { cpustate->R++; EAY(cpustate); cpustate->_B = RM(cpustate, cpustate->ea); } /* LD B,(IY+o) */ OP(fd,47) { illegal_1(cpustate); op_47(cpustate); } /* DB FD */ OP(fd,48) { illegal_1(cpustate); op_48(cpustate); } /* DB FD */ OP(fd,49) { illegal_1(cpustate); op_49(cpustate); } /* DB FD */ OP(fd,4a) { illegal_1(cpustate); op_4a(cpustate); } /* DB FD */ OP(fd,4b) { illegal_1(cpustate); op_4b(cpustate); } /* DB FD */ -OP(fd,4c) { cpustate->R++; cpustate->_C = cpustate->_HY; } /* LD C,HY */ -OP(fd,4d) { cpustate->R++; cpustate->_C = cpustate->_LY; } /* LD C,LY */ -OP(fd,4e) { cpustate->R++; EAY(cpustate); cpustate->_C = RM(cpustate, cpustate->ea); } /* LD C,(IY+o) */ +OP(fd,4c) { cpustate->R++; cpustate->_C = cpustate->_HY; } /* LD C,HY */ +OP(fd,4d) { cpustate->R++; cpustate->_C = cpustate->_LY; } /* LD C,LY */ +OP(fd,4e) { cpustate->R++; EAY(cpustate); cpustate->_C = RM(cpustate, cpustate->ea); } /* LD C,(IY+o) */ OP(fd,4f) { illegal_1(cpustate); op_4f(cpustate); } /* DB FD */ OP(fd,50) { illegal_1(cpustate); op_50(cpustate); } /* DB FD */ OP(fd,51) { illegal_1(cpustate); op_51(cpustate); } /* DB FD */ OP(fd,52) { illegal_1(cpustate); op_52(cpustate); } /* DB FD */ OP(fd,53) { illegal_1(cpustate); op_53(cpustate); } /* DB FD */ -OP(fd,54) { cpustate->R++; cpustate->_D = cpustate->_HY; } /* LD D,HY */ -OP(fd,55) { cpustate->R++; cpustate->_D = cpustate->_LY; } /* LD D,LY */ -OP(fd,56) { cpustate->R++; EAY(cpustate); cpustate->_D = RM(cpustate, cpustate->ea); } /* LD D,(IY+o) */ +OP(fd,54) { cpustate->R++; cpustate->_D = cpustate->_HY; } /* LD D,HY */ +OP(fd,55) { cpustate->R++; cpustate->_D = cpustate->_LY; } /* LD D,LY */ +OP(fd,56) { cpustate->R++; EAY(cpustate); cpustate->_D = RM(cpustate, cpustate->ea); } /* LD D,(IY+o) */ OP(fd,57) { illegal_1(cpustate); op_57(cpustate); } /* DB FD */ OP(fd,58) { illegal_1(cpustate); op_58(cpustate); } /* DB FD */ OP(fd,59) { illegal_1(cpustate); op_59(cpustate); } /* DB FD */ OP(fd,5a) { illegal_1(cpustate); op_5a(cpustate); } /* DB FD */ OP(fd,5b) { illegal_1(cpustate); op_5b(cpustate); } /* DB FD */ -OP(fd,5c) { cpustate->R++; cpustate->_E = cpustate->_HY; } /* LD E,HY */ -OP(fd,5d) { cpustate->R++; cpustate->_E = cpustate->_LY; } /* LD E,LY */ -OP(fd,5e) { cpustate->R++; EAY(cpustate); cpustate->_E = RM(cpustate, cpustate->ea); } /* LD E,(IY+o) */ +OP(fd,5c) { cpustate->R++; cpustate->_E = cpustate->_HY; } /* LD E,HY */ +OP(fd,5d) { cpustate->R++; cpustate->_E = cpustate->_LY; } /* LD E,LY */ +OP(fd,5e) { cpustate->R++; EAY(cpustate); cpustate->_E = RM(cpustate, cpustate->ea); } /* LD E,(IY+o) */ OP(fd,5f) { illegal_1(cpustate); op_5f(cpustate); } /* DB FD */ -OP(fd,60) { cpustate->R++; cpustate->_HY = cpustate->_B; } /* LD HY,B */ -OP(fd,61) { cpustate->R++; cpustate->_HY = cpustate->_C; } /* LD HY,C */ -OP(fd,62) { cpustate->R++; cpustate->_HY = cpustate->_D; } /* LD HY,D */ -OP(fd,63) { cpustate->R++; cpustate->_HY = cpustate->_E; } /* LD HY,E */ +OP(fd,60) { cpustate->R++; cpustate->_HY = cpustate->_B; } /* LD HY,B */ +OP(fd,61) { cpustate->R++; cpustate->_HY = cpustate->_C; } /* LD HY,C */ +OP(fd,62) { cpustate->R++; cpustate->_HY = cpustate->_D; } /* LD HY,D */ +OP(fd,63) { cpustate->R++; cpustate->_HY = cpustate->_E; } /* LD HY,E */ OP(fd,64) { cpustate->R++; } /* LD HY,HY */ OP(fd,65) { cpustate->R++; cpustate->_HY = cpustate->_LY; } /* LD HY,LY */ -OP(fd,66) { cpustate->R++; EAY(cpustate); cpustate->_H = RM(cpustate, cpustate->ea); } /* LD H,(IY+o) */ -OP(fd,67) { cpustate->R++; cpustate->_HY = cpustate->_A; } /* LD HY,A */ +OP(fd,66) { cpustate->R++; EAY(cpustate); cpustate->_H = RM(cpustate, cpustate->ea); } /* LD H,(IY+o) */ +OP(fd,67) { cpustate->R++; cpustate->_HY = cpustate->_A; } /* LD HY,A */ -OP(fd,68) { cpustate->R++; cpustate->_LY = cpustate->_B; } /* LD LY,B */ -OP(fd,69) { cpustate->R++; cpustate->_LY = cpustate->_C; } /* LD LY,C */ -OP(fd,6a) { cpustate->R++; cpustate->_LY = cpustate->_D; } /* LD LY,D */ -OP(fd,6b) { cpustate->R++; cpustate->_LY = cpustate->_E; } /* LD LY,E */ +OP(fd,68) { cpustate->R++; cpustate->_LY = cpustate->_B; } /* LD LY,B */ +OP(fd,69) { cpustate->R++; cpustate->_LY = cpustate->_C; } /* LD LY,C */ +OP(fd,6a) { cpustate->R++; cpustate->_LY = cpustate->_D; } /* LD LY,D */ +OP(fd,6b) { cpustate->R++; cpustate->_LY = cpustate->_E; } /* LD LY,E */ OP(fd,6c) { cpustate->R++; cpustate->_LY = cpustate->_HY; } /* LD LY,HY */ OP(fd,6d) { cpustate->R++; } /* LD LY,LY */ -OP(fd,6e) { cpustate->R++; EAY(cpustate); cpustate->_L = RM(cpustate, cpustate->ea); } /* LD L,(IY+o) */ -OP(fd,6f) { cpustate->R++; cpustate->_LY = cpustate->_A; } /* LD LY,A */ +OP(fd,6e) { cpustate->R++; EAY(cpustate); cpustate->_L = RM(cpustate, cpustate->ea); } /* LD L,(IY+o) */ +OP(fd,6f) { cpustate->R++; cpustate->_LY = cpustate->_A; } /* LD LY,A */ OP(fd,70) { cpustate->R++; EAY(cpustate); WM(cpustate, cpustate->ea, cpustate->_B ); } /* LD (IY+o),B */ OP(fd,71) { cpustate->R++; EAY(cpustate); WM(cpustate, cpustate->ea, cpustate->_C ); } /* LD (IY+o),C */ @@ -140,63 +140,63 @@ OP(fd,78) { illegal_1(cpustate); op_78(cpustate); } /* DB FD OP(fd,79) { illegal_1(cpustate); op_79(cpustate); } /* DB FD */ OP(fd,7a) { illegal_1(cpustate); op_7a(cpustate); } /* DB FD */ OP(fd,7b) { illegal_1(cpustate); op_7b(cpustate); } /* DB FD */ -OP(fd,7c) { cpustate->R++; cpustate->_A = cpustate->_HY; } /* LD A,HY */ -OP(fd,7d) { cpustate->R++; cpustate->_A = cpustate->_LY; } /* LD A,LY */ -OP(fd,7e) { cpustate->R++; EAY(cpustate); cpustate->_A = RM(cpustate, cpustate->ea); } /* LD A,(IY+o) */ +OP(fd,7c) { cpustate->R++; cpustate->_A = cpustate->_HY; } /* LD A,HY */ +OP(fd,7d) { cpustate->R++; cpustate->_A = cpustate->_LY; } /* LD A,LY */ +OP(fd,7e) { cpustate->R++; EAY(cpustate); cpustate->_A = RM(cpustate, cpustate->ea); } /* LD A,(IY+o) */ OP(fd,7f) { illegal_1(cpustate); op_7f(cpustate); } /* DB FD */ OP(fd,80) { illegal_1(cpustate); op_80(cpustate); } /* DB FD */ OP(fd,81) { illegal_1(cpustate); op_81(cpustate); } /* DB FD */ OP(fd,82) { illegal_1(cpustate); op_82(cpustate); } /* DB FD */ OP(fd,83) { illegal_1(cpustate); op_83(cpustate); } /* DB FD */ -OP(fd,84) { cpustate->R++; ADD(cpustate->_HY); } /* ADD A,HY */ -OP(fd,85) { cpustate->R++; ADD(cpustate->_LY); } /* ADD A,LY */ -OP(fd,86) { cpustate->R++; EAY(cpustate); ADD(RM(cpustate, cpustate->ea)); } /* ADD A,(IY+o) */ +OP(fd,84) { cpustate->R++; ADD(cpustate->_HY); } /* ADD A,HY */ +OP(fd,85) { cpustate->R++; ADD(cpustate->_LY); } /* ADD A,LY */ +OP(fd,86) { cpustate->R++; EAY(cpustate); ADD(RM(cpustate, cpustate->ea)); } /* ADD A,(IY+o) */ OP(fd,87) { illegal_1(cpustate); op_87(cpustate); } /* DB FD */ OP(fd,88) { illegal_1(cpustate); op_88(cpustate); } /* DB FD */ OP(fd,89) { illegal_1(cpustate); op_89(cpustate); } /* DB FD */ OP(fd,8a) { illegal_1(cpustate); op_8a(cpustate); } /* DB FD */ OP(fd,8b) { illegal_1(cpustate); op_8b(cpustate); } /* DB FD */ -OP(fd,8c) { cpustate->R++; ADC(cpustate->_HY); } /* ADC A,HY */ -OP(fd,8d) { cpustate->R++; ADC(cpustate->_LY); } /* ADC A,LY */ -OP(fd,8e) { cpustate->R++; EAY(cpustate); ADC(RM(cpustate, cpustate->ea)); } /* ADC A,(IY+o) */ +OP(fd,8c) { cpustate->R++; ADC(cpustate->_HY); } /* ADC A,HY */ +OP(fd,8d) { cpustate->R++; ADC(cpustate->_LY); } /* ADC A,LY */ +OP(fd,8e) { cpustate->R++; EAY(cpustate); ADC(RM(cpustate, cpustate->ea)); } /* ADC A,(IY+o) */ OP(fd,8f) { illegal_1(cpustate); op_8f(cpustate); } /* DB FD */ OP(fd,90) { illegal_1(cpustate); op_90(cpustate); } /* DB FD */ OP(fd,91) { illegal_1(cpustate); op_91(cpustate); } /* DB FD */ OP(fd,92) { illegal_1(cpustate); op_92(cpustate); } /* DB FD */ OP(fd,93) { illegal_1(cpustate); op_93(cpustate); } /* DB FD */ -OP(fd,94) { cpustate->R++; SUB(cpustate->_HY); } /* SUB HY */ -OP(fd,95) { cpustate->R++; SUB(cpustate->_LY); } /* SUB LY */ -OP(fd,96) { cpustate->R++; EAY(cpustate); SUB(RM(cpustate, cpustate->ea)); } /* SUB (IY+o) */ +OP(fd,94) { cpustate->R++; SUB(cpustate->_HY); } /* SUB HY */ +OP(fd,95) { cpustate->R++; SUB(cpustate->_LY); } /* SUB LY */ +OP(fd,96) { cpustate->R++; EAY(cpustate); SUB(RM(cpustate, cpustate->ea)); } /* SUB (IY+o) */ OP(fd,97) { illegal_1(cpustate); op_97(cpustate); } /* DB FD */ OP(fd,98) { illegal_1(cpustate); op_98(cpustate); } /* DB FD */ OP(fd,99) { illegal_1(cpustate); op_99(cpustate); } /* DB FD */ OP(fd,9a) { illegal_1(cpustate); op_9a(cpustate); } /* DB FD */ OP(fd,9b) { illegal_1(cpustate); op_9b(cpustate); } /* DB FD */ -OP(fd,9c) { cpustate->R++; SBC(cpustate->_HY); } /* SBC A,HY */ -OP(fd,9d) { cpustate->R++; SBC(cpustate->_LY); } /* SBC A,LY */ -OP(fd,9e) { cpustate->R++; EAY(cpustate); SBC(RM(cpustate, cpustate->ea)); } /* SBC A,(IY+o) */ +OP(fd,9c) { cpustate->R++; SBC(cpustate->_HY); } /* SBC A,HY */ +OP(fd,9d) { cpustate->R++; SBC(cpustate->_LY); } /* SBC A,LY */ +OP(fd,9e) { cpustate->R++; EAY(cpustate); SBC(RM(cpustate, cpustate->ea)); } /* SBC A,(IY+o) */ OP(fd,9f) { illegal_1(cpustate); op_9f(cpustate); } /* DB FD */ OP(fd,a0) { illegal_1(cpustate); op_a0(cpustate); } /* DB FD */ OP(fd,a1) { illegal_1(cpustate); op_a1(cpustate); } /* DB FD */ OP(fd,a2) { illegal_1(cpustate); op_a2(cpustate); } /* DB FD */ OP(fd,a3) { illegal_1(cpustate); op_a3(cpustate); } /* DB FD */ -OP(fd,a4) { cpustate->R++; AND(cpustate->_HY); } /* AND HY */ -OP(fd,a5) { cpustate->R++; AND(cpustate->_LY); } /* AND LY */ -OP(fd,a6) { cpustate->R++; EAY(cpustate); AND(RM(cpustate, cpustate->ea)); } /* AND (IY+o) */ +OP(fd,a4) { cpustate->R++; AND(cpustate->_HY); } /* AND HY */ +OP(fd,a5) { cpustate->R++; AND(cpustate->_LY); } /* AND LY */ +OP(fd,a6) { cpustate->R++; EAY(cpustate); AND(RM(cpustate, cpustate->ea)); } /* AND (IY+o) */ OP(fd,a7) { illegal_1(cpustate); op_a7(cpustate); } /* DB FD */ OP(fd,a8) { illegal_1(cpustate); op_a8(cpustate); } /* DB FD */ OP(fd,a9) { illegal_1(cpustate); op_a9(cpustate); } /* DB FD */ OP(fd,aa) { illegal_1(cpustate); op_aa(cpustate); } /* DB FD */ OP(fd,ab) { illegal_1(cpustate); op_ab(cpustate); } /* DB FD */ -OP(fd,ac) { cpustate->R++; XOR(cpustate->_HY); } /* XOR HY */ -OP(fd,ad) { cpustate->R++; XOR(cpustate->_LY); } /* XOR LY */ -OP(fd,ae) { cpustate->R++; EAY(cpustate); XOR(RM(cpustate, cpustate->ea)); } /* XOR (IY+o) */ +OP(fd,ac) { cpustate->R++; XOR(cpustate->_HY); } /* XOR HY */ +OP(fd,ad) { cpustate->R++; XOR(cpustate->_LY); } /* XOR LY */ +OP(fd,ae) { cpustate->R++; EAY(cpustate); XOR(RM(cpustate, cpustate->ea)); } /* XOR (IY+o) */ OP(fd,af) { illegal_1(cpustate); op_af(cpustate); } /* DB FD */ OP(fd,b0) { illegal_1(cpustate); op_b0(cpustate); } /* DB FD */ @@ -256,14 +256,14 @@ OP(fd,df) { illegal_1(cpustate); op_df(cpustate); } /* DB FD OP(fd,e0) { illegal_1(cpustate); op_e0(cpustate); } /* DB FD */ OP(fd,e1) { cpustate->R++; POP(cpustate, IY); } /* POP IY */ OP(fd,e2) { illegal_1(cpustate); op_e2(cpustate); } /* DB FD */ -OP(fd,e3) { cpustate->R++; EXSP(IY); } /* EX (SP),IY */ +OP(fd,e3) { cpustate->R++; EXSP(IY); } /* EX (SP),IY */ OP(fd,e4) { illegal_1(cpustate); op_e4(cpustate); } /* DB FD */ OP(fd,e5) { cpustate->R++; PUSH(cpustate, IY ); } /* PUSH IY */ OP(fd,e6) { illegal_1(cpustate); op_e6(cpustate); } /* DB FD */ OP(fd,e7) { illegal_1(cpustate); op_e7(cpustate); } /* DB FD */ OP(fd,e8) { illegal_1(cpustate); op_e8(cpustate); } /* DB FD */ -OP(fd,e9) { cpustate->R++; cpustate->_PC = cpustate->_IY; } /* JP (IY) */ +OP(fd,e9) { cpustate->R++; cpustate->_PC = cpustate->_IY; } /* JP (IY) */ OP(fd,ea) { illegal_1(cpustate); op_ea(cpustate); } /* DB FD */ OP(fd,eb) { illegal_1(cpustate); op_eb(cpustate); } /* DB FD */ OP(fd,ec) { illegal_1(cpustate); op_ec(cpustate); } /* DB FD */ diff --git a/src/emu/cpu/z180/z180op.c b/src/emu/cpu/z180/z180op.c index 77686629c3d..f3ea6b7cc5f 100644 --- a/src/emu/cpu/z180/z180op.c +++ b/src/emu/cpu/z180/z180op.c @@ -8,7 +8,7 @@ OP(op,02) { WM(cpustate, cpustate->_BC, cpustate->_A ); } /* LD (BC OP(op,03) { cpustate->_BC++; } /* INC BC */ OP(op,04) { cpustate->_B = INC(cpustate, cpustate->_B); } /* INC B */ OP(op,05) { cpustate->_B = DEC(cpustate, cpustate->_B); } /* DEC B */ -OP(op,06) { cpustate->_B = ARG(cpustate); } /* LD B,n */ +OP(op,06) { cpustate->_B = ARG(cpustate); } /* LD B,n */ OP(op,07) { RLCA; } /* RLCA */ OP(op,08) { EX_AF; } /* EX AF,AF' */ @@ -17,7 +17,7 @@ OP(op,0a) { cpustate->_A = RM(cpustate, cpustate->_BC); } /* LD A,(B OP(op,0b) { cpustate->_BC--; } /* DEC BC */ OP(op,0c) { cpustate->_C = INC(cpustate, cpustate->_C); } /* INC C */ OP(op,0d) { cpustate->_C = DEC(cpustate, cpustate->_C); } /* DEC C */ -OP(op,0e) { cpustate->_C = ARG(cpustate); } /* LD C,n */ +OP(op,0e) { cpustate->_C = ARG(cpustate); } /* LD C,n */ OP(op,0f) { RRCA; } /* RRCA */ OP(op,10) { cpustate->_B--; JR_COND( cpustate->_B, 0x10 ); } /* DJNZ o */ @@ -26,7 +26,7 @@ OP(op,12) { WM(cpustate, cpustate->_DE, cpustate->_A ); } /* LD (DE OP(op,13) { cpustate->_DE++; } /* INC DE */ OP(op,14) { cpustate->_D = INC(cpustate, cpustate->_D); } /* INC D */ OP(op,15) { cpustate->_D = DEC(cpustate, cpustate->_D); } /* DEC D */ -OP(op,16) { cpustate->_D = ARG(cpustate); } /* LD D,n */ +OP(op,16) { cpustate->_D = ARG(cpustate); } /* LD D,n */ OP(op,17) { RLA; } /* RLA */ OP(op,18) { JR(); } /* JR o */ @@ -35,25 +35,25 @@ OP(op,1a) { cpustate->_A = RM(cpustate, cpustate->_DE); } /* LD A,(D OP(op,1b) { cpustate->_DE--; ; } /* DEC DE */ OP(op,1c) { cpustate->_E = INC(cpustate, cpustate->_E); } /* INC E */ OP(op,1d) { cpustate->_E = DEC(cpustate, cpustate->_E); } /* DEC E */ -OP(op,1e) { cpustate->_E = ARG(cpustate); } /* LD E,n */ +OP(op,1e) { cpustate->_E = ARG(cpustate); } /* LD E,n */ OP(op,1f) { RRA; } /* RRA */ OP(op,20) { JR_COND( !(cpustate->_F & ZF), 0x20 ); } /* JR NZ,o */ OP(op,21) { cpustate->_HL = ARG16(cpustate); } /* LD HL,w */ -OP(op,22) { cpustate->ea = ARG16(cpustate); WM16(cpustate, cpustate->ea, &cpustate->HL ); } /* LD (w),HL */ +OP(op,22) { cpustate->ea = ARG16(cpustate); WM16(cpustate, cpustate->ea, &cpustate->HL ); } /* LD (w),HL */ OP(op,23) { cpustate->_HL++; } /* INC HL */ OP(op,24) { cpustate->_H = INC(cpustate, cpustate->_H); } /* INC H */ OP(op,25) { cpustate->_H = DEC(cpustate, cpustate->_H); } /* DEC H */ -OP(op,26) { cpustate->_H = ARG(cpustate); } /* LD H,n */ +OP(op,26) { cpustate->_H = ARG(cpustate); } /* LD H,n */ OP(op,27) { DAA; } /* DAA */ OP(op,28) { JR_COND( cpustate->_F & ZF, 0x28 ); } /* JR Z,o */ OP(op,29) { ADD16(HL,HL); } /* ADD HL,HL */ -OP(op,2a) { cpustate->ea = ARG16(cpustate); RM16(cpustate, cpustate->ea, &cpustate->HL ); } /* LD HL,(w) */ +OP(op,2a) { cpustate->ea = ARG16(cpustate); RM16(cpustate, cpustate->ea, &cpustate->HL ); } /* LD HL,(w) */ OP(op,2b) { cpustate->_HL--; } /* DEC HL */ OP(op,2c) { cpustate->_L = INC(cpustate, cpustate->_L); } /* INC L */ OP(op,2d) { cpustate->_L = DEC(cpustate, cpustate->_L); } /* DEC L */ -OP(op,2e) { cpustate->_L = ARG(cpustate); } /* LD L,n */ +OP(op,2e) { cpustate->_L = ARG(cpustate); } /* LD L,n */ OP(op,2f) { cpustate->_A ^= 0xff; cpustate->_F = (cpustate->_F&(SF|ZF|PF|CF))|HF|NF|(cpustate->_A&(YF|XF)); } /* CPL */ OP(op,30) { JR_COND( !(cpustate->_F & CF), 0x30 ); } /* JR NC,o */ @@ -71,7 +71,7 @@ OP(op,3a) { cpustate->ea = ARG16(cpustate); cpustate->_A = RM(cpustate, cpustat OP(op,3b) { cpustate->_SP--; } /* DEC SP */ OP(op,3c) { cpustate->_A = INC(cpustate, cpustate->_A); } /* INC A */ OP(op,3d) { cpustate->_A = DEC(cpustate, cpustate->_A); } /* DEC A */ -OP(op,3e) { cpustate->_A = ARG(cpustate); } /* LD A,n */ +OP(op,3e) { cpustate->_A = ARG(cpustate); } /* LD A,n */ OP(op,3f) { cpustate->_F = ((cpustate->_F&(SF|ZF|PF|CF))|((cpustate->_F&CF)<<4)|(cpustate->_A&(YF|XF)))^CF; } /* CCF */ //OP(op,3f) { cpustate->_F = ((cpustate->_F & ~(HF|NF)) | ((cpustate->_F & CF)<<4)) ^ CF; } /* CCF */ @@ -135,7 +135,7 @@ OP(op,72) { WM(cpustate, cpustate->_HL, cpustate->_D ); } /* LD (HL OP(op,73) { WM(cpustate, cpustate->_HL, cpustate->_E ); } /* LD (HL),E */ OP(op,74) { WM(cpustate, cpustate->_HL, cpustate->_H ); } /* LD (HL),H */ OP(op,75) { WM(cpustate, cpustate->_HL, cpustate->_L ); } /* LD (HL),L */ -OP(op,76) { ENTER_HALT(cpustate); } /* HALT */ +OP(op,76) { ENTER_HALT(cpustate); } /* HALT */ OP(op,77) { WM(cpustate, cpustate->_HL, cpustate->_A ); } /* LD (HL),A */ OP(op,78) { cpustate->_A = cpustate->_B; } /* LD A,B */ @@ -201,38 +201,38 @@ OP(op,ad) { XOR(cpustate->_L); } /* XOR L */ OP(op,ae) { XOR(RM(cpustate, cpustate->_HL)); } /* XOR (HL) */ OP(op,af) { XOR(cpustate->_A); } /* XOR A */ -OP(op,b0) { OR(cpustate->_B); } /* OR B */ -OP(op,b1) { OR(cpustate->_C); } /* OR C */ -OP(op,b2) { OR(cpustate->_D); } /* OR D */ -OP(op,b3) { OR(cpustate->_E); } /* OR E */ -OP(op,b4) { OR(cpustate->_H); } /* OR H */ -OP(op,b5) { OR(cpustate->_L); } /* OR L */ +OP(op,b0) { OR(cpustate->_B); } /* OR B */ +OP(op,b1) { OR(cpustate->_C); } /* OR C */ +OP(op,b2) { OR(cpustate->_D); } /* OR D */ +OP(op,b3) { OR(cpustate->_E); } /* OR E */ +OP(op,b4) { OR(cpustate->_H); } /* OR H */ +OP(op,b5) { OR(cpustate->_L); } /* OR L */ OP(op,b6) { OR(RM(cpustate, cpustate->_HL)); } /* OR (HL) */ -OP(op,b7) { OR(cpustate->_A); } /* OR A */ - -OP(op,b8) { CP(cpustate->_B); } /* CP B */ -OP(op,b9) { CP(cpustate->_C); } /* CP C */ -OP(op,ba) { CP(cpustate->_D); } /* CP D */ -OP(op,bb) { CP(cpustate->_E); } /* CP E */ -OP(op,bc) { CP(cpustate->_H); } /* CP H */ -OP(op,bd) { CP(cpustate->_L); } /* CP L */ +OP(op,b7) { OR(cpustate->_A); } /* OR A */ + +OP(op,b8) { CP(cpustate->_B); } /* CP B */ +OP(op,b9) { CP(cpustate->_C); } /* CP C */ +OP(op,ba) { CP(cpustate->_D); } /* CP D */ +OP(op,bb) { CP(cpustate->_E); } /* CP E */ +OP(op,bc) { CP(cpustate->_H); } /* CP H */ +OP(op,bd) { CP(cpustate->_L); } /* CP L */ OP(op,be) { CP(RM(cpustate, cpustate->_HL)); } /* CP (HL) */ -OP(op,bf) { CP(cpustate->_A); } /* CP A */ +OP(op,bf) { CP(cpustate->_A); } /* CP A */ OP(op,c0) { RET_COND( !(cpustate->_F & ZF), 0xc0 ); } /* RET NZ */ OP(op,c1) { POP(cpustate, BC); } /* POP BC */ OP(op,c2) { JP_COND( !(cpustate->_F & ZF) ); } /* JP NZ,a */ OP(op,c3) { JP; } /* JP a */ OP(op,c4) { CALL_COND( !(cpustate->_F & ZF), 0xc4 ); } /* CALL NZ,a */ -OP(op,c5) { PUSH(cpustate, BC ); } /* PUSH BC */ +OP(op,c5) { PUSH(cpustate, BC ); } /* PUSH BC */ OP(op,c6) { ADD(ARG(cpustate)); } /* ADD A,n */ OP(op,c7) { RST(0x00); } /* RST 0 */ OP(op,c8) { RET_COND( cpustate->_F & ZF, 0xc8 ); } /* RET Z */ -OP(op,c9) { POP(cpustate, PC); } /* RET */ -OP(op,ca) { JP_COND( cpustate->_F & ZF ); } /* JP Z,a */ +OP(op,c9) { POP(cpustate, PC); } /* RET */ +OP(op,ca) { JP_COND( cpustate->_F & ZF ); } /* JP Z,a */ OP(op,cb) { cpustate->R++; EXEC(cb,ROP(cpustate)); } /* **** CB xx */ -OP(op,cc) { CALL_COND( cpustate->_F & ZF, 0xcc ); } /* CALL Z,a */ +OP(op,cc) { CALL_COND( cpustate->_F & ZF, 0xcc ); } /* CALL Z,a */ OP(op,cd) { CALL(); } /* CALL a */ OP(op,ce) { ADC(ARG(cpustate)); } /* ADC A,n */ OP(op,cf) { RST(0x08); } /* RST 1 */ @@ -242,15 +242,15 @@ OP(op,d1) { POP(cpustate, DE); } /* POP DE */ OP(op,d2) { JP_COND( !(cpustate->_F & CF) ); } /* JP NC,a */ OP(op,d3) { unsigned n = ARG(cpustate) | (cpustate->_A << 8); OUT( cpustate, n, cpustate->_A ); } /* OUT (n),A */ OP(op,d4) { CALL_COND( !(cpustate->_F & CF), 0xd4 ); } /* CALL NC,a */ -OP(op,d5) { PUSH(cpustate, DE ); } /* PUSH DE */ +OP(op,d5) { PUSH(cpustate, DE ); } /* PUSH DE */ OP(op,d6) { SUB(ARG(cpustate)); } /* SUB n */ OP(op,d7) { RST(0x10); } /* RST 2 */ OP(op,d8) { RET_COND( cpustate->_F & CF, 0xd8 ); } /* RET C */ OP(op,d9) { EXX; } /* EXX */ -OP(op,da) { JP_COND( cpustate->_F & CF ); } /* JP C,a */ +OP(op,da) { JP_COND( cpustate->_F & CF ); } /* JP C,a */ OP(op,db) { unsigned n = ARG(cpustate) | (cpustate->_A << 8); cpustate->_A = IN( cpustate, n ); } /* IN A,(n) */ -OP(op,dc) { CALL_COND( cpustate->_F & CF, 0xdc ); } /* CALL C,a */ +OP(op,dc) { CALL_COND( cpustate->_F & CF, 0xdc ); } /* CALL C,a */ OP(op,dd) { cpustate->R++; EXEC(dd,ROP(cpustate)); } /* **** DD xx */ OP(op,de) { SBC(ARG(cpustate)); } /* SBC A,n */ OP(op,df) { RST(0x18); } /* RST 3 */ @@ -260,15 +260,15 @@ OP(op,e1) { POP(cpustate, HL); } /* POP HL */ OP(op,e2) { JP_COND( !(cpustate->_F & PF) ); } /* JP PO,a */ OP(op,e3) { EXSP(HL); } /* EX HL,(SP) */ OP(op,e4) { CALL_COND( !(cpustate->_F & PF), 0xe4 ); } /* CALL PO,a */ -OP(op,e5) { PUSH(cpustate, HL ); } /* PUSH HL */ +OP(op,e5) { PUSH(cpustate, HL ); } /* PUSH HL */ OP(op,e6) { AND(ARG(cpustate)); } /* AND n */ OP(op,e7) { RST(0x20); } /* RST 4 */ OP(op,e8) { RET_COND( cpustate->_F & PF, 0xe8 ); } /* RET PE */ -OP(op,e9) { cpustate->_PC = cpustate->_HL; } /* JP (HL) */ -OP(op,ea) { JP_COND( cpustate->_F & PF ); } /* JP PE,a */ +OP(op,e9) { cpustate->_PC = cpustate->_HL; } /* JP (HL) */ +OP(op,ea) { JP_COND( cpustate->_F & PF ); } /* JP PE,a */ OP(op,eb) { EX_DE_HL; } /* EX DE,HL */ -OP(op,ec) { CALL_COND( cpustate->_F & PF, 0xec ); } /* CALL PE,a */ +OP(op,ec) { CALL_COND( cpustate->_F & PF, 0xec ); } /* CALL PE,a */ OP(op,ed) { cpustate->R++; EXEC(ed,ROP(cpustate)); } /* **** ED xx */ OP(op,ee) { XOR(ARG(cpustate)); } /* XOR n */ OP(op,ef) { RST(0x28); } /* RST 5 */ @@ -278,7 +278,7 @@ OP(op,f1) { POP(cpustate, AF); } /* POP AF */ OP(op,f2) { JP_COND( !(cpustate->_F & SF) ); } /* JP P,a */ OP(op,f3) { cpustate->IFF1 = cpustate->IFF2 = 0; } /* DI */ OP(op,f4) { CALL_COND( !(cpustate->_F & SF), 0xf4 ); } /* CALL P,a */ -OP(op,f5) { PUSH(cpustate, AF ); } /* PUSH AF */ +OP(op,f5) { PUSH(cpustate, AF ); } /* PUSH AF */ OP(op,f6) { OR(ARG(cpustate)); } /* OR n */ OP(op,f7) { RST(0x30); } /* RST 6 */ @@ -286,7 +286,7 @@ OP(op,f8) { RET_COND( cpustate->_F & SF, 0xf8 ); } /* RET M */ OP(op,f9) { cpustate->_SP = cpustate->_HL; } /* LD SP,HL */ OP(op,fa) { JP_COND(cpustate->_F & SF); } /* JP M,a */ OP(op,fb) { EI; } /* EI */ -OP(op,fc) { CALL_COND( cpustate->_F & SF, 0xfc ); } /* CALL M,a */ +OP(op,fc) { CALL_COND( cpustate->_F & SF, 0xfc ); } /* CALL M,a */ OP(op,fd) { cpustate->R++; EXEC(fd,ROP(cpustate)); } /* **** FD xx */ OP(op,fe) { CP(ARG(cpustate)); } /* CP n */ OP(op,ff) { RST(0x38); } /* RST 7 */ diff --git a/src/emu/cpu/z180/z180ops.h b/src/emu/cpu/z180/z180ops.h index f1fdf47694a..92820b2e6fb 100644 --- a/src/emu/cpu/z180/z180ops.h +++ b/src/emu/cpu/z180/z180ops.h @@ -4,7 +4,7 @@ #define ENTER_HALT(cs) { \ (cs)->_PC--; \ (cs)->HALT = 1; \ - if( !(cs)->after_EI ) \ + if( !(cs)->after_EI ) \ CPU_BURN_NAME(z180)( (cs)->device, (cs)->icount ); \ } @@ -12,7 +12,7 @@ * Leave HALT state; write 0 to fake port ***************************************************************/ #define LEAVE_HALT(cs) { \ - if( (cs)->HALT ) \ + if( (cs)->HALT ) \ { \ (cs)->HALT = 0; \ (cs)->_PC++; \ @@ -29,7 +29,7 @@ /*************************************************************** * Output a byte to given I/O port ***************************************************************/ -#define OUT(cs,port,value) \ +#define OUT(cs,port,value) \ if (((port ^ (cs)->IO_IOCR) & 0xffc0) == 0) \ z180_writecontrol(cs,port,value); \ else memory_write_byte_8le((cs)->iospace,port,value) @@ -160,7 +160,7 @@ INLINE UINT32 ARG16(z180_state *cpustate) * JP ***************************************************************/ #define JP { \ - cpustate->_PCD = ARG16(cpustate); \ + cpustate->_PCD = ARG16(cpustate); \ } /*************************************************************** @@ -170,7 +170,7 @@ INLINE UINT32 ARG16(z180_state *cpustate) #define JP_COND(cond) \ if( cond ) \ { \ - cpustate->_PCD = ARG16(cpustate); \ + cpustate->_PCD = ARG16(cpustate); \ } \ else \ { \ @@ -182,8 +182,8 @@ INLINE UINT32 ARG16(z180_state *cpustate) ***************************************************************/ #define JR() \ { \ - INT8 arg = (INT8)ARG(cpustate); /* ARG(cpustate) also increments cpustate->_PC */ \ - cpustate->_PC += arg; /* so don't do cpustate->_PC += ARG(cpustate) */ \ + INT8 arg = (INT8)ARG(cpustate); /* ARG(cpustate) also increments cpustate->_PC */ \ + cpustate->_PC += arg; /* so don't do cpustate->_PC += ARG(cpustate) */ \ } /*************************************************************** @@ -193,17 +193,17 @@ INLINE UINT32 ARG16(z180_state *cpustate) if( cond ) \ { \ INT8 arg = (INT8)ARG(cpustate); /* ARG(cpustate) also increments cpustate->_PC */ \ - cpustate->_PC += arg; /* so don't do cpustate->_PC += ARG(cpustate) */ \ + cpustate->_PC += arg; /* so don't do cpustate->_PC += ARG(cpustate) */ \ CC(ex,opcode); \ } \ - else cpustate->_PC++; \ + else cpustate->_PC++; \ /*************************************************************** * CALL ***************************************************************/ #define CALL() \ cpustate->ea = ARG16(cpustate); \ - PUSH(cpustate, PC ); \ + PUSH(cpustate, PC ); \ cpustate->_PCD = cpustate->ea; /*************************************************************** @@ -213,13 +213,13 @@ INLINE UINT32 ARG16(z180_state *cpustate) if( cond ) \ { \ cpustate->ea = ARG16(cpustate); \ - PUSH(cpustate, PC ); \ + PUSH(cpustate, PC ); \ cpustate->_PCD = cpustate->ea; \ CC(ex,opcode); \ } \ else \ { \ - cpustate->_PC+=2; \ + cpustate->_PC+=2; \ } /*************************************************************** @@ -287,7 +287,7 @@ INLINE UINT32 ARG16(z180_state *cpustate) * RST ***************************************************************/ #define RST(addr) \ - PUSH(cpustate, PC ); \ + PUSH(cpustate, PC ); \ cpustate->_PCD = addr; /*************************************************************** @@ -314,14 +314,14 @@ INLINE UINT8 DEC(z180_state *cpustate, UINT8 value) * RLCA ***************************************************************/ #define RLCA \ - cpustate->_A = (cpustate->_A << 1) | (cpustate->_A >> 7); \ + cpustate->_A = (cpustate->_A << 1) | (cpustate->_A >> 7); \ cpustate->_F = (cpustate->_F & (SF | ZF | PF)) | (cpustate->_A & (YF | XF | CF)) /*************************************************************** * RRCA ***************************************************************/ #define RRCA \ - cpustate->_F = (cpustate->_F & (SF | ZF | PF)) | (cpustate->_A & (YF | XF | CF)); \ + cpustate->_F = (cpustate->_F & (SF | ZF | PF)) | (cpustate->_A & (YF | XF | CF)); \ cpustate->_A = (cpustate->_A >> 1) | (cpustate->_A << 7) /*************************************************************** @@ -329,7 +329,7 @@ INLINE UINT8 DEC(z180_state *cpustate, UINT8 value) ***************************************************************/ #define RLA { \ UINT8 res = (cpustate->_A << 1) | (cpustate->_F & CF); \ - UINT8 c = (cpustate->_A & 0x80) ? CF : 0; \ + UINT8 c = (cpustate->_A & 0x80) ? CF : 0; \ cpustate->_F = (cpustate->_F & (SF | ZF | PF)) | c | (res & (YF | XF)); \ cpustate->_A = res; \ } @@ -339,7 +339,7 @@ INLINE UINT8 DEC(z180_state *cpustate, UINT8 value) ***************************************************************/ #define RRA { \ UINT8 res = (cpustate->_A >> 1) | (cpustate->_F << 7); \ - UINT8 c = (cpustate->_A & 0x01) ? CF : 0; \ + UINT8 c = (cpustate->_A & 0x01) ? CF : 0; \ cpustate->_F = (cpustate->_F & (SF | ZF | PF)) | c | (res & (YF | XF)); \ cpustate->_A = res; \ } @@ -404,7 +404,7 @@ INLINE UINT8 DEC(z180_state *cpustate, UINT8 value) { \ UINT32 ah = cpustate->_AFD & 0xff00, c = cpustate->_AFD & 1; \ UINT32 res = (UINT8)((ah >> 8) - value - c); \ - cpustate->_F = SZHVC_sub[(c<<16) | ah | res]; \ + cpustate->_F = SZHVC_sub[(c<<16) | ah | res]; \ cpustate->_A = res; \ } @@ -413,7 +413,7 @@ INLINE UINT8 DEC(z180_state *cpustate, UINT8 value) ***************************************************************/ #define NEG { \ UINT8 value = cpustate->_A; \ - cpustate->_A = 0; \ + cpustate->_A = 0; \ SUB(value); \ } @@ -498,7 +498,7 @@ INLINE UINT8 DEC(z180_state *cpustate, UINT8 value) { \ PAIR tmp = { { 0, 0, 0, 0 } }; \ RM16(cpustate, cpustate->_SPD, &tmp ); \ - WM16(cpustate, cpustate->_SPD, &cpustate->DR ); \ + WM16(cpustate, cpustate->_SPD, &cpustate->DR ); \ cpustate->DR = tmp; \ } @@ -508,7 +508,7 @@ INLINE UINT8 DEC(z180_state *cpustate, UINT8 value) ***************************************************************/ #define ADD16(DR,SR) \ { \ - UINT32 res = cpustate->DR.d + cpustate->SR.d; \ + UINT32 res = cpustate->DR.d + cpustate->SR.d; \ cpustate->_F = (cpustate->_F & (SF | ZF | VF)) | \ (((cpustate->DR.d ^ res ^ cpustate->SR.d) >> 8) & HF) | \ ((res >> 16) & CF); \ @@ -674,7 +674,7 @@ INLINE UINT8 SET(UINT8 bit, UINT8 value) #define LDI { \ UINT8 io = RM(cpustate, cpustate->_HL); \ WM(cpustate, cpustate->_DE, io ); \ - cpustate->_F &= SF | ZF | CF; \ + cpustate->_F &= SF | ZF | CF; \ if( (cpustate->_A + io) & 0x02 ) cpustate->_F |= YF; /* bit 1 -> flag 5 */ \ if( (cpustate->_A + io) & 0x08 ) cpustate->_F |= XF; /* bit 3 -> flag 3 */ \ cpustate->_HL++; cpustate->_DE++; cpustate->_BC--; \ @@ -689,7 +689,7 @@ INLINE UINT8 SET(UINT8 bit, UINT8 value) UINT8 res = cpustate->_A - val; \ cpustate->_HL++; cpustate->_BC--; \ cpustate->_F = (cpustate->_F & CF) | (SZ[res] & ~(YF|XF)) | ((cpustate->_A ^ val ^ res) & HF) | NF; \ - if( cpustate->_F & HF ) res -= 1; \ + if( cpustate->_F & HF ) res -= 1; \ if( res & 0x02 ) cpustate->_F |= YF; /* bit 1 -> flag 5 */ \ if( res & 0x08 ) cpustate->_F |= XF; /* bit 3 -> flag 3 */ \ if( cpustate->_BC ) cpustate->_F |= VF; \ @@ -704,7 +704,7 @@ INLINE UINT8 SET(UINT8 bit, UINT8 value) WM(cpustate, cpustate->_HL, io ); \ cpustate->_HL++; \ cpustate->_F = SZ[cpustate->_B]; \ - if( io & SF ) cpustate->_F |= NF; \ + if( io & SF ) cpustate->_F |= NF; \ if( (cpustate->_C + io + 1) & 0x100 ) cpustate->_F |= HF | CF; \ if( (irep_tmp1[cpustate->_C & 3][io & 3] ^ \ breg_tmp2[cpustate->_B] ^ \ @@ -722,7 +722,7 @@ INLINE UINT8 SET(UINT8 bit, UINT8 value) OUT(cpustate, cpustate->_BC, io ); \ cpustate->_HL++; \ cpustate->_F = SZ[cpustate->_B]; \ - if( io & SF ) cpustate->_F |= NF; \ + if( io & SF ) cpustate->_F |= NF; \ if( (cpustate->_C + io + 1) & 0x100 ) cpustate->_F |= HF | CF; \ if( (irep_tmp1[cpustate->_C & 3][io & 3] ^ \ breg_tmp2[cpustate->_B] ^ \ @@ -737,7 +737,7 @@ INLINE UINT8 SET(UINT8 bit, UINT8 value) #define LDD { \ UINT8 io = RM(cpustate, cpustate->_HL); \ WM(cpustate, cpustate->_DE, io ); \ - cpustate->_F &= SF | ZF | CF; \ + cpustate->_F &= SF | ZF | CF; \ if( (cpustate->_A + io) & 0x02 ) cpustate->_F |= YF; /* bit 1 -> flag 5 */ \ if( (cpustate->_A + io) & 0x08 ) cpustate->_F |= XF; /* bit 3 -> flag 3 */ \ cpustate->_HL--; cpustate->_DE--; cpustate->_BC--; \ @@ -752,7 +752,7 @@ INLINE UINT8 SET(UINT8 bit, UINT8 value) UINT8 res = cpustate->_A - val; \ cpustate->_HL--; cpustate->_BC--; \ cpustate->_F = (cpustate->_F & CF) | (SZ[res] & ~(YF|XF)) | ((cpustate->_A ^ val ^ res) & HF) | NF; \ - if( cpustate->_F & HF ) res -= 1; \ + if( cpustate->_F & HF ) res -= 1; \ if( res & 0x02 ) cpustate->_F |= YF; /* bit 1 -> flag 5 */ \ if( res & 0x08 ) cpustate->_F |= XF; /* bit 3 -> flag 3 */ \ if( cpustate->_BC ) cpustate->_F |= VF; \ @@ -767,7 +767,7 @@ INLINE UINT8 SET(UINT8 bit, UINT8 value) WM(cpustate, cpustate->_HL, io ); \ cpustate->_HL--; \ cpustate->_F = SZ[cpustate->_B]; \ - if( io & SF ) cpustate->_F |= NF; \ + if( io & SF ) cpustate->_F |= NF; \ if( (cpustate->_C + io - 1) & 0x100 ) cpustate->_F |= HF | CF; \ if( (drep_tmp1[cpustate->_C & 3][io & 3] ^ \ breg_tmp2[cpustate->_B] ^ \ @@ -785,7 +785,7 @@ INLINE UINT8 SET(UINT8 bit, UINT8 value) OUT(cpustate, cpustate->_BC, io ); \ cpustate->_HL--; \ cpustate->_F = SZ[cpustate->_B]; \ - if( io & SF ) cpustate->_F |= NF; \ + if( io & SF ) cpustate->_F |= NF; \ if( (cpustate->_C + io - 1) & 0x100 ) cpustate->_F |= HF | CF; \ if( (drep_tmp1[cpustate->_C & 3][io & 3] ^ \ breg_tmp2[cpustate->_B] ^ \ diff --git a/src/emu/cpu/z8/z8.c b/src/emu/cpu/z8/z8.c index a899375fd68..a5b65b71072 100644 --- a/src/emu/cpu/z8/z8.c +++ b/src/emu/cpu/z8/z8.c @@ -865,10 +865,10 @@ static CPU_GET_INFO( z8 ) case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 8; break; case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 16; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 2; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 2; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; /* --- the following bits of info are returned as pointers to functions --- */ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(z8); break; diff --git a/src/emu/cpu/z80/z80.c b/src/emu/cpu/z80/z80.c index 8439f9ab509..f13b97b9928 100644 --- a/src/emu/cpu/z80/z80.c +++ b/src/emu/cpu/z80/z80.c @@ -154,7 +154,7 @@ struct _z80_state int icount; z80_daisy_state *daisy; cpu_state_table state; - UINT8 rtemp; + UINT8 rtemp; const UINT8 * cc_op; const UINT8 * cc_cb; const UINT8 * cc_ed; @@ -188,42 +188,42 @@ INLINE z80_state *get_safe_token(const device_config *device) #define PRVPC prvpc.d /* previous program counter */ #define PCD pc.d -#define PC pc.w.l +#define PC pc.w.l #define SPD sp.d -#define SP sp.w.l +#define SP sp.w.l #define AFD af.d -#define AF af.w.l -#define A af.b.h -#define F af.b.l +#define AF af.w.l +#define A af.b.h +#define F af.b.l #define BCD bc.d -#define BC bc.w.l -#define B bc.b.h -#define C bc.b.l +#define BC bc.w.l +#define B bc.b.h +#define C bc.b.l #define DED de.d -#define DE de.w.l -#define D de.b.h -#define E de.b.l +#define DE de.w.l +#define D de.b.h +#define E de.b.l #define HLD hl.d -#define HL hl.w.l -#define H hl.b.h -#define L hl.b.l +#define HL hl.w.l +#define H hl.b.h +#define L hl.b.l #define IXD ix.d -#define IX ix.w.l -#define HX ix.b.h -#define LX ix.b.l +#define IX ix.w.l +#define HX ix.b.h +#define LX ix.b.l #define IYD iy.d -#define IY iy.w.l -#define HY iy.b.h -#define LY iy.b.l +#define IY iy.w.l +#define HY iy.b.h +#define LY iy.b.l -#define WZ wz.w.l +#define WZ wz.w.l #define WZ_H wz.b.h #define WZ_L wz.b.l @@ -651,17 +651,17 @@ INLINE void BURNODD(z80_state *z80, int cycles, int opcodes, int cyclesum) /*************************************************************** * Input a byte from given I/O port ***************************************************************/ -#define IN(Z,port) memory_read_byte_8le((Z)->io, port) +#define IN(Z,port) memory_read_byte_8le((Z)->io, port) /*************************************************************** * Output a byte to given I/O port ***************************************************************/ -#define OUT(Z,port,value) memory_write_byte_8le((Z)->io, port, value) +#define OUT(Z,port,value) memory_write_byte_8le((Z)->io, port, value) /*************************************************************** * Read a byte from given memory location ***************************************************************/ -#define RM(Z,addr) memory_read_byte_8le((Z)->program, addr) +#define RM(Z,addr) memory_read_byte_8le((Z)->program, addr) /*************************************************************** * Read a word from given memory location @@ -722,18 +722,18 @@ INLINE UINT32 ARG16(z80_state *z80) * Calculate the effective address EA of an opcode using * IX+offset resp. IY+offset addressing. ***************************************************************/ -#define EAX(Z) do { (Z)->ea = (UINT32)(UINT16)((Z)->IX + (INT8)ARG(Z)); (Z)->WZ = (Z)->ea; } while (0) +#define EAX(Z) do { (Z)->ea = (UINT32)(UINT16)((Z)->IX + (INT8)ARG(Z)); (Z)->WZ = (Z)->ea; } while (0) #define EAY(Z) do { (Z)->ea = (UINT32)(UINT16)((Z)->IY + (INT8)ARG(Z)); (Z)->WZ = (Z)->ea; } while (0) /*************************************************************** * POP ***************************************************************/ -#define POP(Z,DR) do { RM16((Z), (Z)->SPD, &(Z)->DR); (Z)->SP += 2; } while (0) +#define POP(Z,DR) do { RM16((Z), (Z)->SPD, &(Z)->DR); (Z)->SP += 2; } while (0) /*************************************************************** * PUSH ***************************************************************/ -#define PUSH(Z,SR) do { (Z)->SP -= 2; WM16((Z), (Z)->SPD, &(Z)->SR); } while (0) +#define PUSH(Z,SR) do { (Z)->SP -= 2; WM16((Z), (Z)->SPD, &(Z)->SR); } while (0) /*************************************************************** * JP @@ -762,7 +762,7 @@ INLINE UINT32 ARG16(z80_state *z80) * JR ***************************************************************/ #define JR(Z) do { \ - INT8 arg = (INT8)ARG(Z); /* ARG() also increments PC */ \ + INT8 arg = (INT8)ARG(Z); /* ARG() also increments PC */ \ (Z)->PC += arg; /* so don't do PC += ARG() */ \ (Z)->WZ = (Z)->PC; \ } while (0) @@ -823,8 +823,8 @@ INLINE UINT32 ARG16(z80_state *z80) * RETN ***************************************************************/ #define RETN(Z) do { \ - LOG(("Z80 '%s' RETN z80->iff1:%d z80->iff2:%d\n", \ - (Z)->device->tag, (Z)->iff1, (Z)->iff2)); \ + LOG(("Z80 '%s' RETN z80->iff1:%d z80->iff2:%d\n", \ + (Z)->device->tag, (Z)->iff1, (Z)->iff2)); \ POP((Z), pc); \ (Z)->WZ = (Z)->PC; \ (Z)->iff1 = (Z)->iff2; \ @@ -2361,7 +2361,7 @@ OP(dd,e6) { illegal_1(z80); op_e6(z80); } /* DB DD */ OP(dd,e7) { illegal_1(z80); op_e7(z80); } /* DB DD */ OP(dd,e8) { illegal_1(z80); op_e8(z80); } /* DB DD */ -OP(dd,e9) { z80->PC = z80->IX; } /* JP (IX) */ +OP(dd,e9) { z80->PC = z80->IX; } /* JP (IX) */ OP(dd,ea) { illegal_1(z80); op_ea(z80); } /* DB DD */ OP(dd,eb) { illegal_1(z80); op_eb(z80); } /* DB DD */ OP(dd,ec) { illegal_1(z80); op_ec(z80); } /* DB DD */ @@ -2652,7 +2652,7 @@ OP(fd,e6) { illegal_1(z80); op_e6(z80); } /* DB FD */ OP(fd,e7) { illegal_1(z80); op_e7(z80); } /* DB FD */ OP(fd,e8) { illegal_1(z80); op_e8(z80); } /* DB FD */ -OP(fd,e9) { z80->PC = z80->IY; } /* JP (IY) */ +OP(fd,e9) { z80->PC = z80->IY; } /* JP (IY) */ OP(fd,ea) { illegal_1(z80); op_ea(z80); } /* DB FD */ OP(fd,eb) { illegal_1(z80); op_eb(z80); } /* DB FD */ OP(fd,ec) { illegal_1(z80); op_ec(z80); } /* DB FD */ @@ -2879,7 +2879,7 @@ OP(ed,a7) { illegal_2(z80); } /* DB ED */ OP(ed,a8) { LDD(z80); } /* LDD */ OP(ed,a9) { CPD(z80); } /* CPD */ OP(ed,aa) { IND(z80); } /* IND */ -OP(ed,ab) { OUTD(z80); } /* OUTD */ +OP(ed,ab) { OUTD(z80); } /* OUTD */ OP(ed,ac) { illegal_2(z80); } /* DB ED */ OP(ed,ad) { illegal_2(z80); } /* DB ED */ OP(ed,ae) { illegal_2(z80); } /* DB ED */ @@ -2990,8 +2990,8 @@ OP(op,07) { RLCA(z80); } /* RLCA */ OP(op,08) { EX_AF(z80); } /* EX AF,AF' */ OP(op,09) { ADD16(z80, hl, bc); } /* ADD HL,BC */ -OP(op,0a) { z80->A = RM(z80, z80->BC); z80->WZ=z80->BC+1; } /* LD A,(BC) */ -OP(op,0b) { z80->BC--; } /* DEC BC */ +OP(op,0a) { z80->A = RM(z80, z80->BC); z80->WZ=z80->BC+1; } /* LD A,(BC) */ +OP(op,0b) { z80->BC--; } /* DEC BC */ OP(op,0c) { z80->C = INC(z80, z80->C); } /* INC C */ OP(op,0d) { z80->C = DEC(z80, z80->C); } /* DEC C */ OP(op,0e) { z80->C = ARG(z80); } /* LD C,n */ @@ -3009,7 +3009,7 @@ OP(op,17) { RLA(z80); } /* RLA */ OP(op,18) { JR(z80); } /* JR o */ OP(op,19) { ADD16(z80, hl, de); } /* ADD HL,DE */ OP(op,1a) { z80->A = RM(z80, z80->DE); z80->WZ=z80->DE+1; } /* LD A,(DE) */ -OP(op,1b) { z80->DE--; } /* DEC DE */ +OP(op,1b) { z80->DE--; } /* DEC DE */ OP(op,1c) { z80->E = INC(z80, z80->E); } /* INC E */ OP(op,1d) { z80->E = DEC(z80, z80->E); } /* DEC E */ OP(op,1e) { z80->E = ARG(z80); } /* LD E,n */ @@ -3027,7 +3027,7 @@ OP(op,27) { DAA(z80); } /* DAA */ OP(op,28) { JR_COND(z80, z80->F & ZF, 0x28); } /* JR Z,o */ OP(op,29) { ADD16(z80, hl, hl); } /* ADD HL,HL */ OP(op,2a) { z80->ea = ARG16(z80); RM16(z80, z80->ea, &z80->hl); z80->WZ = z80->ea+1;} /* LD HL,(w) */ -OP(op,2b) { z80->HL--; } /* DEC HL */ +OP(op,2b) { z80->HL--; } /* DEC HL */ OP(op,2c) { z80->L = INC(z80, z80->L); } /* INC L */ OP(op,2d) { z80->L = DEC(z80, z80->L); } /* DEC L */ OP(op,2e) { z80->L = ARG(z80); } /* LD L,n */ @@ -3241,7 +3241,7 @@ OP(op,e6) { AND(z80, ARG(z80)); } /* AND n */ OP(op,e7) { RST(z80, 0x20); } /* RST 4 */ OP(op,e8) { RET_COND(z80, z80->F & PF, 0xe8); } /* RET PE */ -OP(op,e9) { z80->PC = z80->HL; } /* JP (HL) */ +OP(op,e9) { z80->PC = z80->HL; } /* JP (HL) */ OP(op,ea) { JP_COND(z80, z80->F & PF); } /* JP PE,a */ OP(op,eb) { EX_DE_HL(z80); } /* EX DE,HL */ OP(op,ec) { CALL_COND(z80, z80->F & PF, 0xec); } /* CALL PE,a */ diff --git a/src/emu/cpu/z80/z80daisy.h b/src/emu/cpu/z80/z80daisy.h index 1a710a7c06c..efa4107e782 100644 --- a/src/emu/cpu/z80/z80daisy.h +++ b/src/emu/cpu/z80/z80daisy.h @@ -19,8 +19,8 @@ ***************************************************************************/ /* these constants are returned from the irq_state function */ -#define Z80_DAISY_INT 0x01 /* interrupt request mask */ -#define Z80_DAISY_IEO 0x02 /* interrupt disable mask (IEO) */ +#define Z80_DAISY_INT 0x01 /* interrupt request mask */ +#define Z80_DAISY_IEO 0x02 /* interrupt disable mask (IEO) */ enum diff --git a/src/emu/cpu/z80/z80dasm.c b/src/emu/cpu/z80/z80dasm.c index 89a42bd2d41..e4841550f9d 100644 --- a/src/emu/cpu/z80/z80dasm.c +++ b/src/emu/cpu/z80/z80dasm.c @@ -447,7 +447,7 @@ CPU_DISASSEMBLE( z80 ) break; case 0xed: op1 = oprom[pos++]; - d = &mnemonic_ed[op1]; + d = &mnemonic_ed[op1]; break; case 0xdd: ixy = "ix"; diff --git a/src/emu/cpu/z8000/z8000.c b/src/emu/cpu/z8000/z8000.c index b77a20e1d87..6cd1b1aeb01 100644 --- a/src/emu/cpu/z8000/z8000.c +++ b/src/emu/cpu/z8000/z8000.c @@ -478,7 +478,7 @@ static CPU_SET_INFO( z8000 ) case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(cpustate, 0, info->i); break; case CPUINFO_INT_INPUT_STATE + 1: set_irq_line(cpustate, 1, info->i); break; - case CPUINFO_INT_PC: cpustate->pc = info->i; break; + case CPUINFO_INT_PC: cpustate->pc = info->i; break; case CPUINFO_INT_REGISTER + Z8000_PC: cpustate->pc = info->i; break; case CPUINFO_INT_SP: case CPUINFO_INT_REGISTER + Z8000_NSP: cpustate->nsp = info->i; break; @@ -535,11 +535,11 @@ CPU_GET_INFO( z8000 ) case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break; case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_DATA: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_SHIFT_DATA: info->i = 0; break; case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 16; break; - case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; + case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 16; break; + case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break; case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_state; break; case CPUINFO_INT_INPUT_STATE + 0: info->i = cpustate->irq_state[0]; break; diff --git a/src/emu/cpu/z8000/z8000tbl.c b/src/emu/cpu/z8000/z8000tbl.c index 023c8b5e29f..4ce36f55bac 100644 --- a/src/emu/cpu/z8000/z8000tbl.c +++ b/src/emu/cpu/z8000/z8000tbl.c @@ -83,9 +83,9 @@ static const Z8000_init table[] = { {0x1b00,0x1b0f, 1,2,107,Z1B_0000_dddd_imm16, "div %rl3,%#w1", 0}, {0x1b10,0x1bff, 1,1,107,Z1B_ssN0_dddd, "div %rl3,@%rw2", 0}, {0x1c11,0x1cf1,16,2, 11,Z1C_ssN0_0001_0000_dddd_0000_nmin1, "ldm %rw5,@%rw2,#%n", 0}, -{0x1c18,0x1cf8,16,1, 13,Z1C_ddN0_1000, "testl @%rw2", 0}, +{0x1c18,0x1cf8,16,1, 13,Z1C_ddN0_1000, "testl @%rw2", 0}, {0x1c19,0x1cf9,16,2, 11,Z1C_ddN0_1001_0000_ssss_0000_nmin1, "ldm @%rw2,%rw5,#%n", 0}, -{0x1d10,0x1dff, 1,1, 11,Z1D_ddN0_ssss, "ldl @%rw2,%rl3", 0}, +{0x1d10,0x1dff, 1,1, 11,Z1D_ddN0_ssss, "ldl @%rw2,%rl3", 0}, {0x1e10,0x1eff, 1,1, 10,Z1E_ddN0_cccc, "jp %c3,@%rl2", 0}, {0x1f10,0x1ff0,16,1, 10,Z1F_ddN0_0000, "call %rw2", DASMFLAG_STEP_OVER}, {0x2010,0x20ff, 1,1, 7,Z20_ssN0_dddd, "ldb %rb3,@%rw2", 0}, @@ -497,7 +497,7 @@ static const Z8000_init table[] = { {0xbb1a,0xbbfa,16,2, 11,ZBB_ssN0_1010_0000_rrrr_ddN0_cccc, "cpsd @%rw6,@%rw2,%rw5,%c7", 0}, {0xbb1c,0xbbfc,16,2, 11,ZBB_ssN0_1100_0000_rrrr_dddd_cccc, "cpdr %rw6,@%rw2,%rw5,%c7", DASMFLAG_STEP_OVER}, {0xbb1e,0xbbfe,16,2, 11,ZBB_ssN0_1110_0000_rrrr_ddN0_cccc, "cpsdr @%rw6,@%rw2,%rw5,%c7", DASMFLAG_STEP_OVER}, -{0xbc00,0xbcff, 1,1, 9,ZBC_aaaa_bbbb, "rrdb %rb3,%rb2", 0}, +{0xbc00,0xbcff, 1,1, 9,ZBC_aaaa_bbbb, "rrdb %rb3,%rb2", 0}, {0xbd00,0xbdff, 1,1, 5,ZBD_dddd_imm4, "ldk %rw2,%3", 0}, {0xbe00,0xbeff, 1,1, 9,ZBE_aaaa_bbbb, "rldb %rb3,%rb2", 0}, {0xbf00,0xbfff, 1,1, 10,ZBF_imm8, "rsvdbf", 0}, diff --git a/src/emu/cpuexec.c b/src/emu/cpuexec.c index 620277d2c39..fe9035bf308 100644 --- a/src/emu/cpuexec.c +++ b/src/emu/cpuexec.c @@ -33,7 +33,7 @@ enum { TRIGGER_INT = -2000, - TRIGGER_YIELDTIME = -3000, + TRIGGER_YIELDTIME = -3000, TRIGGER_SUSPENDTIME = -4000 }; @@ -83,8 +83,8 @@ struct _cpu_class_data INT32 inttrigger; /* interrupt trigger index */ /* clock and timing information */ - UINT64 totalcycles; /* total CPU cycles executed */ - attotime localtime; /* local time, relative to the timer system's global time */ + UINT64 totalcycles; /* total CPU cycles executed */ + attotime localtime; /* local time, relative to the timer system's global time */ INT32 clock; /* current active clock */ double clockscale; /* current active clock scale factor */ INT32 divisor; /* 32-bit attoseconds_per_cycle divisor */ @@ -98,7 +98,7 @@ struct _cpu_class_data const cpu_state_entry *regstate[MAX_REGS];/* pointer to the state entry for each register */ /* these below are hacks to support multiple interrupts per frame */ - INT32 iloops; /* number of interrupts remaining this frame */ + INT32 iloops; /* number of interrupts remaining this frame */ emu_timer * partial_frame_timer; /* the timer that triggers partial frame interrupts */ attotime partial_frame_period; /* the length of one partial frame for interrupt purposes */ }; @@ -688,9 +688,9 @@ DEVICE_GET_INFO( cpu ) case DEVINFO_INT_CLASS: info->i = DEVICE_CLASS_CPU_CHIP; break; /* --- the following bits of info are returned as pointers to data or functions --- */ - case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(cpu); break; + case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(cpu); break; case DEVINFO_FCT_STOP: info->stop = DEVICE_STOP_NAME(cpu); break; - case DEVINFO_FCT_RESET: info->reset = DEVICE_RESET_NAME(cpu); break; + case DEVINFO_FCT_RESET: info->reset = DEVICE_RESET_NAME(cpu); break; default: /* if we don't have a device pointer, ignore everything else */ @@ -1728,9 +1728,9 @@ static void get_register_string_value(const device_config *device, void *baseptr { static const UINT64 decdivisor[] = { 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000, 100000000, 1000000000, - U64(10000000000), U64(100000000000), U64(1000000000000), - U64(10000000000000), U64(100000000000000), U64(1000000000000000), - U64(10000000000000000), U64(100000000000000000), U64(1000000000000000000), + U64(10000000000), U64(100000000000), U64(1000000000000), + U64(10000000000000), U64(100000000000000), U64(1000000000000000), + U64(10000000000000000), U64(100000000000000000), U64(1000000000000000000), U64(10000000000000000000) }; static const char hexchars[] = "0123456789ABCDEF"; @@ -1788,7 +1788,7 @@ static void get_register_string_value(const device_config *device, void *baseptr break; /* 1-9 accumulate into the width */ - case '1': case '2': case '3': case '4': case '5': + case '1': case '2': case '3': case '4': case '5': case '6': case '7': case '8': case '9': width = width * 10 + (*fptr - '0'); break; @@ -1934,7 +1934,7 @@ static int get_register_string_max_width(const device_config *device, void *base break; /* 1-9 accumulate into the width */ - case '1': case '2': case '3': case '4': case '5': + case '1': case '2': case '3': case '4': case '5': case '6': case '7': case '8': case '9': width = width * 10 + (*fptr - '0'); break; diff --git a/src/emu/cpuexec.h b/src/emu/cpuexec.h index ddc39bd9b7b..39a5987d825 100644 --- a/src/emu/cpuexec.h +++ b/src/emu/cpuexec.h @@ -35,12 +35,12 @@ enum enum { SUSPEND_REASON_HALT = 0x0001, - SUSPEND_REASON_RESET = 0x0002, + SUSPEND_REASON_RESET = 0x0002, SUSPEND_REASON_SPIN = 0x0004, - SUSPEND_REASON_TRIGGER = 0x0008, - SUSPEND_REASON_DISABLE = 0x0010, + SUSPEND_REASON_TRIGGER = 0x0008, + SUSPEND_REASON_DISABLE = 0x0010, SUSPEND_REASON_TIMESLICE= 0x0020, - SUSPEND_ANY_REASON = ~0 + SUSPEND_ANY_REASON = ~0 }; @@ -63,11 +63,11 @@ struct _cpu_config { cpu_type type; /* index for the CPU type */ UINT32 flags; /* flags; see #defines below */ - cpu_interrupt_func vblank_interrupt; /* for interrupts tied to VBLANK */ + cpu_interrupt_func vblank_interrupt; /* for interrupts tied to VBLANK */ int vblank_interrupts_per_frame;/* usually 1 */ const char * vblank_interrupt_screen; /* the screen that causes the VBLANK interrupt */ - cpu_interrupt_func timed_interrupt; /* for interrupts not tied to VBLANK */ - UINT64 timed_interrupt_period; /* period for periodic interrupts */ + cpu_interrupt_func timed_interrupt; /* for interrupts not tied to VBLANK */ + UINT64 timed_interrupt_period; /* period for periodic interrupts */ }; diff --git a/src/emu/cpuintrf.h b/src/emu/cpuintrf.h index 25521053392..2ef0f27500e 100644 --- a/src/emu/cpuintrf.h +++ b/src/emu/cpuintrf.h @@ -281,7 +281,7 @@ enum #define CPU_READOP(name) int CPU_READOP_NAME(name)(const device_config *device, UINT32 offset, int size, UINT64 *value) #define CPU_READOP_CALL(name) CPU_READOP_NAME(name)(device, offset, size, value) -#define CPU_DEBUG_INIT_NAME(name) cpu_debug_init_##name +#define CPU_DEBUG_INIT_NAME(name) cpu_debug_init_##name #define CPU_DEBUG_INIT(name) void CPU_DEBUG_INIT_NAME(name)(const device_config *device) #define CPU_DEBUG_INIT_CALL(name) CPU_DEBUG_INIT_NAME(name)(device) @@ -437,8 +437,8 @@ union _cpuinfo cpu_validity_check_func validity_check; /* CPUINFO_FCT_VALIDITY_CHECK */ cpu_state_io_func import_state; /* CPUINFO_FCT_IMPORT_STATE */ cpu_state_io_func export_state; /* CPUINFO_FCT_EXPORT_STATE */ - cpu_string_io_func import_string; /* CPUINFO_FCT_IMPORT_STRING */ - cpu_string_io_func export_string; /* CPUINFO_FCT_EXPORT_STRING */ + cpu_string_io_func import_string; /* CPUINFO_FCT_IMPORT_STRING */ + cpu_string_io_func export_string; /* CPUINFO_FCT_EXPORT_STRING */ int * icount; /* CPUINFO_PTR_INSTRUCTION_COUNTER */ const cpu_state_table * state_table; /* CPUINFO_PTR_STATE_TABLE */ const addrmap8_token * internal_map8; /* DEVINFO_PTR_INTERNAL_MEMORY_MAP */ diff --git a/src/emu/crsshair.c b/src/emu/crsshair.c index 029e850cd49..5f110256dc9 100644 --- a/src/emu/crsshair.c +++ b/src/emu/crsshair.c @@ -32,18 +32,18 @@ typedef struct _crosshair_global crosshair_global; struct _crosshair_global { UINT8 usage; /* true if any crosshairs are used */ - UINT8 used[MAX_PLAYERS]; /* usage per player */ - UINT8 mode[MAX_PLAYERS]; /* visibility mode per player */ - UINT8 visible[MAX_PLAYERS]; /* visibility per player */ + UINT8 used[MAX_PLAYERS]; /* usage per player */ + UINT8 mode[MAX_PLAYERS]; /* visibility mode per player */ + UINT8 visible[MAX_PLAYERS]; /* visibility per player */ bitmap_t * bitmap[MAX_PLAYERS]; /* bitmap per player */ render_texture * texture[MAX_PLAYERS]; /* texture per player */ const device_config *screen[MAX_PLAYERS]; /* the screen on which this player's crosshair is drawn */ - float x[MAX_PLAYERS]; /* current X position */ + float x[MAX_PLAYERS]; /* current X position */ float y[MAX_PLAYERS]; /* current Y position */ - float last_x[MAX_PLAYERS]; /* last X position */ + float last_x[MAX_PLAYERS]; /* last X position */ float last_y[MAX_PLAYERS]; /* last Y position */ UINT8 fade; /* color fading factor */ - UINT8 animation_counter; /* animation frame index */ + UINT8 animation_counter; /* animation frame index */ UINT16 auto_time; /* time in seconds to turn invisible */ UINT16 time[MAX_PLAYERS]; /* time since last movement */ char name[MAX_PLAYERS][CROSSHAIR_PIC_NAME_LENGTH + 1]; /* name of crosshair png file */ diff --git a/src/emu/crsshair.h b/src/emu/crsshair.h index 6458dc4648b..237a77ad5ee 100644 --- a/src/emu/crsshair.h +++ b/src/emu/crsshair.h @@ -46,8 +46,8 @@ typedef struct _crosshair_user_settings crosshair_user_settings; struct _crosshair_user_settings { - UINT8 used; /* is used */ - UINT8 mode; /* visibility mode */ + UINT8 used; /* is used */ + UINT8 mode; /* visibility mode */ UINT8 auto_time; /* time in seconds to blank crosshair if no movement */ char name[CROSSHAIR_PIC_NAME_LENGTH + 1]; /* bitmap name */ }; diff --git a/src/emu/debug/debugcmd.c b/src/emu/debug/debugcmd.c index 87de4164c82..4f00d1dfd21 100644 --- a/src/emu/debug/debugcmd.c +++ b/src/emu/debug/debugcmd.c @@ -289,7 +289,7 @@ void debug_command_init(running_machine *machine) debug_console_register_command(machine, "comadd", CMDFLAG_NONE, 0, 1, 2, execute_comment); debug_console_register_command(machine, "//", CMDFLAG_NONE, 0, 1, 2, execute_comment); debug_console_register_command(machine, "comdelete", CMDFLAG_NONE, 0, 1, 1, execute_comment_del); - debug_console_register_command(machine, "comsave", CMDFLAG_NONE, 0, 0, 0, execute_comment_save); + debug_console_register_command(machine, "comsave", CMDFLAG_NONE, 0, 0, 0, execute_comment_save); debug_console_register_command(machine, "bpset", CMDFLAG_NONE, 0, 1, 3, execute_bpset); debug_console_register_command(machine, "bp", CMDFLAG_NONE, 0, 1, 3, execute_bpset); diff --git a/src/emu/debug/debugcmt.c b/src/emu/debug/debugcmt.c index 6595194738c..92c900d78dd 100644 --- a/src/emu/debug/debugcmt.c +++ b/src/emu/debug/debugcmt.c @@ -54,11 +54,11 @@ typedef struct _debug_comment debug_comment; struct _debug_comment { - UINT8 is_valid; - UINT32 address; - char text[DEBUG_COMMENT_MAX_LINE_LENGTH]; - rgb_t color; - UINT32 crc; + UINT8 is_valid; + UINT32 address; + char text[DEBUG_COMMENT_MAX_LINE_LENGTH]; + rgb_t color; + UINT32 crc; }; @@ -66,7 +66,7 @@ struct _debug_comment struct _debug_cpu_comment_group { int comment_count; - UINT32 change_count; + UINT32 change_count; debug_comment * comment_info[DEBUG_COMMENT_MAX_NUM]; }; @@ -413,15 +413,15 @@ int debug_comment_save(running_machine *machine) { file_error filerr; astring *fname; - mame_file *fp; + mame_file *fp; - fname = astring_assemble_2(astring_alloc(), machine->basename, ".cmt"); - filerr = mame_fopen(SEARCHPATH_COMMENT, astring_c(fname), OPEN_FLAG_WRITE | OPEN_FLAG_CREATE | OPEN_FLAG_CREATE_PATHS, &fp); - astring_free(fname); + fname = astring_assemble_2(astring_alloc(), machine->basename, ".cmt"); + filerr = mame_fopen(SEARCHPATH_COMMENT, astring_c(fname), OPEN_FLAG_WRITE | OPEN_FLAG_CREATE | OPEN_FLAG_CREATE_PATHS, &fp); + astring_free(fname); - if (filerr == FILERR_NONE) - { - xml_file_write(root, mame_core_file(fp)); + if (filerr == FILERR_NONE) + { + xml_file_write(root, mame_core_file(fp)); mame_fclose(fp); } } diff --git a/src/emu/debug/debugcon.c b/src/emu/debug/debugcon.c index 9b1162a90f7..262dc9a3da2 100644 --- a/src/emu/debug/debugcon.c +++ b/src/emu/debug/debugcon.c @@ -305,7 +305,7 @@ static CMDERR internal_parse_command(running_machine *machine, const char *origi case ']': if (parendex == 0 || parens[--parendex] != '[') return MAKE_CMDERR_UNBALANCED_PARENS(p - command); break; case '}': if (parendex == 0 || parens[--parendex] != '{') return MAKE_CMDERR_UNBALANCED_PARENS(p - command); break; case ',': if (parendex == 0) params[paramcount++] = p; break; - case ';': if (parendex == 0) foundend = TRUE; break; + case ';': if (parendex == 0) foundend = TRUE; break; case '-': if (parendex == 0 && paramcount == 1 && p[1] == '-') isexpr = TRUE; *p = c; break; case '+': if (parendex == 0 && paramcount == 1 && p[1] == '+') isexpr = TRUE; *p = c; break; case '=': if (parendex == 0 && paramcount == 1) isexpr = TRUE; *p = c; break; diff --git a/src/emu/debug/debugcpu.c b/src/emu/debug/debugcpu.c index eae47c3adde..c34e4636d45 100644 --- a/src/emu/debug/debugcpu.c +++ b/src/emu/debug/debugcpu.c @@ -71,7 +71,7 @@ struct _debugcpu_private UINT64 wpdata; UINT64 wpaddr; - UINT64 tempvar[NUM_TEMP_VARIABLES]; + UINT64 tempvar[NUM_TEMP_VARIABLES]; osd_ticks_t last_periodic_update_time; }; diff --git a/src/emu/debug/debugcpu.h b/src/emu/debug/debugcpu.h index 566e008ffae..a29ba715137 100644 --- a/src/emu/debug/debugcpu.h +++ b/src/emu/debug/debugcpu.h @@ -112,19 +112,19 @@ struct _cpu_debug_data int stopirq; /* stop IRQ number for DEBUG_FLAG_STOP_INTERRUPT */ int stopexception; /* stop exception number for DEBUG_FLAG_STOP_EXCEPTION */ attotime endexectime; /* ending time of the current execution */ - debug_trace_info trace; /* trace info */ + debug_trace_info trace; /* trace info */ debug_cpu_breakpoint * bplist; /* list of breakpoints */ debug_hotspot_entry * hotspots; /* hotspot list */ offs_t pc_history[DEBUG_HISTORY_SIZE]; /* history of recent PCs */ UINT32 pc_history_index; /* current history index */ int hotspot_count; /* number of hotspots */ int hotspot_threshhold; /* threshhold for the number of hits to print */ - cpu_read_func read; /* memory read routine */ + cpu_read_func read; /* memory read routine */ cpu_write_func write; /* memory write routine */ cpu_readop_func readop; /* opcode read routine */ - cpu_translate_func translate; /* pointer to CPU's translate function */ + cpu_translate_func translate; /* pointer to CPU's translate function */ cpu_disassemble_func disassemble; /* pointer to CPU's dissasemble function */ - cpu_disassemble_func dasm_override; /* pointer to provided override function */ + cpu_disassemble_func dasm_override; /* pointer to provided override function */ debug_instruction_hook_func instrhook; /* per-instruction callback hook */ debug_cpu_watchpoint * wplist[ADDRESS_SPACES]; /* watchpoint lists for each address space */ debug_cpu_comment_group *comments; /* disassembly comments */ diff --git a/src/emu/debug/debugvw.h b/src/emu/debug/debugvw.h index 85cf219fb67..64bea264a60 100644 --- a/src/emu/debug/debugvw.h +++ b/src/emu/debug/debugvw.h @@ -112,7 +112,7 @@ struct _registers_subview_item registers_subview_item *next; /* link to next item */ int index; /* index of this item */ const device_config *device; /* CPU to display */ - char name[1]; /* name of the subview item */ + char name[1]; /* name of the subview item */ }; @@ -123,7 +123,7 @@ struct _disasm_subview_item disasm_subview_item *next; /* link to next item */ int index; /* index of this item */ const address_space *space; /* address space to display */ - char name[1]; /* name of the subview item */ + char name[1]; /* name of the subview item */ }; @@ -139,7 +139,7 @@ struct _memory_subview_item offs_t offsetxor; /* XOR to apply to offsets */ UINT8 endianness; /* endianness of memory */ UINT8 prefsize; /* preferred bytes per chunk */ - char name[1]; /* name of the subview item */ + char name[1]; /* name of the subview item */ }; diff --git a/src/emu/debug/express.c b/src/emu/debug/express.c index 2c81b6d4cd5..5bd4d9642ee 100644 --- a/src/emu/debug/express.c +++ b/src/emu/debug/express.c @@ -190,7 +190,7 @@ struct _symbol_table { symbol_table * parent; /* pointer to the parent symbol table */ void * globalref; /* global reference parameter */ - internal_symbol_entry * hash[SYM_TABLE_HASH_SIZE]; /* hash table */ + internal_symbol_entry * hash[SYM_TABLE_HASH_SIZE]; /* hash table */ }; @@ -206,9 +206,9 @@ struct _expression_string /* typedef struct _parsed_expression parsed_expression -- defined in express.h */ struct _parsed_expression { - const symbol_table * table; /* symbol table */ + const symbol_table * table; /* symbol table */ char * original_string; /* original string (prior to parsing) */ - express_callbacks callbacks; /* callbacks */ + express_callbacks callbacks; /* callbacks */ void * cbparam; /* callbakc parameter */ expression_string * stringlist; /* string list */ UINT16 stringcount; /* number of strings allocated so far */ diff --git a/src/emu/debug/express.h b/src/emu/debug/express.h index 83b0aa0a703..901dd15cebd 100644 --- a/src/emu/debug/express.h +++ b/src/emu/debug/express.h @@ -140,8 +140,8 @@ struct _symbol_entry /* register info */ struct { - symbol_getter_func getter; /* value getter */ - symbol_setter_func setter; /* value setter */ + symbol_getter_func getter; /* value getter */ + symbol_setter_func setter; /* value setter */ } reg; /* function info */ @@ -149,7 +149,7 @@ struct _symbol_entry { UINT16 minparams; /* minimum expected parameters */ UINT16 maxparams; /* maximum expected parameters */ - function_execute_func execute; /* execute callback */ + function_execute_func execute; /* execute callback */ } func; /* generic info */ @@ -175,7 +175,7 @@ typedef struct _parsed_expression parsed_expression; EXPRERR expression_evaluate(const char *expression, const symbol_table *table, const express_callbacks *callbacks, void *cbparam, UINT64 *result); EXPRERR expression_parse(const char *expression, const symbol_table *table, const express_callbacks *callbacks, void *cbparam, parsed_expression **result); EXPRERR expression_execute(parsed_expression *expr, UINT64 *result); -void expression_free(parsed_expression *expr); +void expression_free(parsed_expression *expr); const char * expression_original_string(parsed_expression *expr); const char * exprerr_to_string(EXPRERR error); @@ -188,6 +188,6 @@ int symtable_add_function(symbol_table *table, const char *name, void *sym int symtable_add_value(symbol_table *table, const char *name, UINT64 value); const symbol_entry * symtable_find(const symbol_table *table, const char *name); const char * symtable_find_indexed(const symbol_table *table, int index, const symbol_entry **entry); -void symtable_free(symbol_table *table); +void symtable_free(symbol_table *table); #endif diff --git a/src/emu/devcb.h b/src/emu/devcb.h index f405e10d091..eabb19bbb2a 100644 --- a/src/emu/devcb.h +++ b/src/emu/devcb.h @@ -83,7 +83,7 @@ /* macros for defining read_line/write_line functions */ -#define READ_LINE_DEVICE_HANDLER(name) int name(ATTR_UNUSED const device_config *device) +#define READ_LINE_DEVICE_HANDLER(name) int name(ATTR_UNUSED const device_config *device) #define WRITE_LINE_DEVICE_HANDLER(name) void name(ATTR_UNUSED const device_config *device, ATTR_UNUSED int state) diff --git a/src/emu/devintrf.h b/src/emu/devintrf.h index 6c4eed31e66..5c066c79c51 100644 --- a/src/emu/devintrf.h +++ b/src/emu/devintrf.h @@ -200,10 +200,10 @@ enum #define devtype_get_addrbus_width(type,space) devtype_get_info_int(type, DEVINFO_INT_ADDRBUS_WIDTH + (space)) #define devtype_get_addrbus_shift(type,space) devtype_get_info_int(type, DEVINFO_INT_ADDRBUS_SHIFT + (space)) #define devtype_get_name(type) devtype_get_info_string(type, DEVINFO_STR_NAME) -#define devtype_get_family(type) devtype_get_info_string(type, DEVINFO_STR_FAMILY) -#define devtype_get_version(type) devtype_get_info_string(type, DEVINFO_STR_VERSION) -#define devtype_get_source_file(type) devtype_get_info_string(type, DEVINFO_STR_SOURCE_FILE) -#define devtype_get_credits(type) devtype_get_info_string(type, DEVINFO_STR_CREDITS) +#define devtype_get_family(type) devtype_get_info_string(type, DEVINFO_STR_FAMILY) +#define devtype_get_version(type) devtype_get_info_string(type, DEVINFO_STR_VERSION) +#define devtype_get_source_file(type) devtype_get_info_string(type, DEVINFO_STR_SOURCE_FILE) +#define devtype_get_credits(type) devtype_get_info_string(type, DEVINFO_STR_CREDITS) /* shorthand for getting standard data about devices */ @@ -212,7 +212,7 @@ enum #define device_get_addrbus_width(dev,space) device_get_info_int(dev, DEVINFO_INT_ADDRBUS_WIDTH + (space)) #define device_get_addrbus_shift(dev,space) device_get_info_int(dev, DEVINFO_INT_ADDRBUS_SHIFT + (space)) #define device_get_name(dev) device_get_info_string(dev, DEVINFO_STR_NAME) -#define device_get_family(dev) device_get_info_string(dev, DEVINFO_STR_FAMILY) +#define device_get_family(dev) device_get_info_string(dev, DEVINFO_STR_FAMILY) #define device_get_version(dev) device_get_info_string(dev, DEVINFO_STR_VERSION) #define device_get_source_file(dev) device_get_info_string(dev, DEVINFO_STR_SOURCE_FILE) #define device_get_credits(dev) device_get_info_string(dev, DEVINFO_STR_CREDITS) @@ -225,9 +225,9 @@ enum #define devtag_get_addrbus_shift(mach,tag,space) devtag_get_info_int(mach, tag, DEVINFO_INT_ADDRBUS_SHIFT + (space)) #define devtag_get_name(mach,tag) devtag_get_info_string(mach, tag, DEVINFO_STR_NAME) #define devtag_get_family(mach,tag) devtag_get_info_string(mach, tag, DEVINFO_STR_FAMILY) -#define devtag_get_version(mach,tag) devtag_get_info_string(mach, tag, DEVINFO_STR_VERSION) +#define devtag_get_version(mach,tag) devtag_get_info_string(mach, tag, DEVINFO_STR_VERSION) #define devtag_get_source_file(mach,tag) devtag_get_info_string(mach, tag, DEVINFO_STR_SOURCE_FILE) -#define devtag_get_credits(mach,tag) devtag_get_info_string(mach, tag, DEVINFO_STR_CREDITS) +#define devtag_get_credits(mach,tag) devtag_get_info_string(mach, tag, DEVINFO_STR_CREDITS) diff --git a/src/emu/devtempl.h b/src/emu/devtempl.h index 09cf2c4b6b6..4fe33c8a9d3 100644 --- a/src/emu/devtempl.h +++ b/src/emu/devtempl.h @@ -184,7 +184,7 @@ DEVICE_GET_INFO( DEVTEMPLATE_ID(,) ) case DEVINFO_FCT_RESET: info->reset = DEVTEMPLATE_ID1(DEVICE_RESET_NAME()); break; #endif #if ((DEVTEMPLATE_FEATURES) & DT_HAS_STOP) - case DEVINFO_FCT_STOP: info->stop = DEVTEMPLATE_ID1(DEVICE_STOP_NAME()); break; + case DEVINFO_FCT_STOP: info->stop = DEVTEMPLATE_ID1(DEVICE_STOP_NAME()); break; #endif #if ((DEVTEMPLATE_FEATURES) & DT_HAS_EXECUTE) case DEVINFO_FCT_EXECUTE: info->execute = DEVTEMPLATE_ID1(DEVICE_EXECUTE_NAME()); break; @@ -204,7 +204,7 @@ DEVICE_GET_INFO( DEVTEMPLATE_ID(,) ) case DEVINFO_STR_FAMILY: strcpy(info->s, DEVTEMPLATE_FAMILY); break; case DEVINFO_STR_VERSION: strcpy(info->s, DEVTEMPLATE_VERSION); break; case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, DEVTEMPLATE_SOURCE); break; - case DEVINFO_STR_CREDITS: strcpy(info->s, DEVTEMPLATE_CREDITS); break; + case DEVINFO_STR_CREDITS: strcpy(info->s, DEVTEMPLATE_CREDITS); break; } } @@ -245,7 +245,7 @@ DEVICE_GET_INFO( DEVTEMPLATE_DERIVED_ID(,) ) case DEVINFO_PTR_ROM_REGION: info->romregion = DEVTEMPLATE_DERIVED_ID1(ROM_NAME()); break; #endif #if ((DEVTEMPLATE_DERIVED_FEATURES) & DT_HAS_MACHINE_CONFIG) - case DEVINFO_PTR_MACHINE_CONFIG: info->machine_config = DEVTEMPLATE_DERIVED_ID1(MACHINE_DRIVER_NAME()); break; + case DEVINFO_PTR_MACHINE_CONFIG: info->machine_config = DEVTEMPLATE_DERIVED_ID1(MACHINE_DRIVER_NAME()); break; #endif #if ((DEVTEMPLATE_DERIVED_FEATURES) & DT_HAS_CONTRACT_LIST) case DEVINFO_PTR_CONTRACT_LIST: info->contract_list = DEVTEMPLATE_DERIVED_ID1(DEVICE_CONTRACT_LIST_NAME()); break; @@ -259,7 +259,7 @@ DEVICE_GET_INFO( DEVTEMPLATE_DERIVED_ID(,) ) case DEVINFO_FCT_RESET: info->reset = DEVTEMPLATE_DERIVED_ID1(DEVICE_RESET_NAME()); break; #endif #if ((DEVTEMPLATE_DERIVED_FEATURES) & DT_HAS_STOP) - case DEVINFO_FCT_STOP: info->stop = DEVTEMPLATE_DERIVED_ID1(DEVICE_STORE_NAME()); break; + case DEVINFO_FCT_STOP: info->stop = DEVTEMPLATE_DERIVED_ID1(DEVICE_STORE_NAME()); break; #endif #if ((DEVTEMPLATE_DERIVED_FEATURES) & DT_HAS_EXECUTE) case DEVINFO_FCT_EXECUTE: info->execute = DEVTEMPLATE_DERIVED_ID1(DEVICE_EXECUTE_NAME()); break; diff --git a/src/emu/drawgfx.c b/src/emu/drawgfx.c index 36a4aa84547..eb705349bf3 100644 --- a/src/emu/drawgfx.c +++ b/src/emu/drawgfx.c @@ -1909,7 +1909,7 @@ void copyscrollbitmap_trans(bitmap_t *dest, bitmap_t *src, UINT32 numrows, const /* count consecutive columns scrolled by the same amount */ for (groupcols = 1; col + groupcols < numcols; groupcols++) if (colscroll[col + groupcols] != yscroll) - break; + break; /* iterate over reps of the columns in question */ yscroll = normalize_yscroll(src, yscroll); @@ -1947,7 +1947,7 @@ void copyscrollbitmap_trans(bitmap_t *dest, bitmap_t *src, UINT32 numrows, const /* count consecutive rows scrolled by the same amount */ for (grouprows = 1; row + grouprows < numrows; grouprows++) if (rowscroll[row + grouprows] != xscroll) - break; + break; /* iterate over reps of the rows in question */ xscroll = normalize_xscroll(src, xscroll); diff --git a/src/emu/drawgfx.h b/src/emu/drawgfx.h index 9408e0156c7..0ef35862474 100644 --- a/src/emu/drawgfx.h +++ b/src/emu/drawgfx.h @@ -126,7 +126,7 @@ struct _gfx_element UINT16 origwidth; /* starting pixel width of each element */ UINT16 origheight; /* staring pixel height of each element */ UINT8 flags; /* one of the GFX_ELEMENT_* flags above */ - UINT32 total_elements; /* total number of decoded elements */ + UINT32 total_elements; /* total number of decoded elements */ UINT32 color_base; /* base color for rendering */ UINT16 color_depth; /* number of colors each pixel can represent */ @@ -151,11 +151,11 @@ typedef struct _gfx_decode_entry gfx_decode_entry; struct _gfx_decode_entry { const char * memory_region; /* memory region where the data resides */ - UINT32 start; /* offset of beginning of data to decode */ + UINT32 start; /* offset of beginning of data to decode */ const gfx_layout *gfxlayout; /* pointer to gfx_layout describing the layout; NULL marks the end of the array */ - UINT16 color_codes_start; /* offset in the color lookup table where color codes start */ - UINT16 total_color_codes; /* total number of color codes */ - UINT8 xscale; /* optional horizontal scaling factor; 0 means 1x */ + UINT16 color_codes_start; /* offset in the color lookup table where color codes start */ + UINT16 total_color_codes; /* total number of color codes */ + UINT8 xscale; /* optional horizontal scaling factor; 0 means 1x */ UINT8 yscale; /* optional vertical scaling factor; 0 means 1x */ }; diff --git a/src/emu/drawgfxm.h b/src/emu/drawgfxm.h index e95fcc800e0..a48d83d255f 100644 --- a/src/emu/drawgfxm.h +++ b/src/emu/drawgfxm.h @@ -74,7 +74,7 @@ typedef struct { char dummy[3]; } NO_PRIORITY; regardless of pen, copying directly -------------------------------------------------*/ -#define PIXEL_OP_COPY_OPAQUE(DEST, PRIORITY, SOURCE) \ +#define PIXEL_OP_COPY_OPAQUE(DEST, PRIORITY, SOURCE) \ do \ { \ (DEST) = SOURCE; \ @@ -88,7 +88,7 @@ while (0) \ directly -------------------------------------------------*/ -#define PIXEL_OP_COPY_TRANSPEN(DEST, PRIORITY, SOURCE) \ +#define PIXEL_OP_COPY_TRANSPEN(DEST, PRIORITY, SOURCE) \ do \ { \ UINT32 srcdata = (SOURCE); \ @@ -104,14 +104,14 @@ while (0) \ 'paldata' array -------------------------------------------------*/ -#define PIXEL_OP_REMAP_OPAQUE(DEST, PRIORITY, SOURCE) \ +#define PIXEL_OP_REMAP_OPAQUE(DEST, PRIORITY, SOURCE) \ do \ { \ (DEST) = paldata[SOURCE]; \ } \ while (0) \ -#define PIXEL_OP_REMAP_OPAQUE_PRIORITY(DEST, PRIORITY, SOURCE) \ +#define PIXEL_OP_REMAP_OPAQUE_PRIORITY(DEST, PRIORITY, SOURCE) \ do \ { \ if (((1 << ((PRIORITY) & 0x1f)) & pmask) == 0) \ @@ -127,7 +127,7 @@ while (0) \ pen via the 'paldata' array -------------------------------------------------*/ -#define PIXEL_OP_REMAP_TRANSPEN(DEST, PRIORITY, SOURCE) \ +#define PIXEL_OP_REMAP_TRANSPEN(DEST, PRIORITY, SOURCE) \ do \ { \ UINT32 srcdata = (SOURCE); \ @@ -136,7 +136,7 @@ do \ } \ while (0) \ -#define PIXEL_OP_REMAP_TRANSPEN_PRIORITY(DEST, PRIORITY, SOURCE) \ +#define PIXEL_OP_REMAP_TRANSPEN_PRIORITY(DEST, PRIORITY, SOURCE) \ do \ { \ UINT32 srcdata = (SOURCE); \ @@ -156,7 +156,7 @@ while (0) \ 'color' to the pen value -------------------------------------------------*/ -#define PIXEL_OP_REBASE_TRANSPEN(DEST, PRIORITY, SOURCE) \ +#define PIXEL_OP_REBASE_TRANSPEN(DEST, PRIORITY, SOURCE) \ do \ { \ UINT32 srcdata = (SOURCE); \ @@ -165,7 +165,7 @@ do \ } \ while (0) \ -#define PIXEL_OP_REBASE_TRANSPEN_PRIORITY(DEST, PRIORITY, SOURCE) \ +#define PIXEL_OP_REBASE_TRANSPEN_PRIORITY(DEST, PRIORITY, SOURCE) \ do \ { \ UINT32 srcdata = (SOURCE); \ @@ -185,7 +185,7 @@ while (0) \ pen via the 'paldata' array -------------------------------------------------*/ -#define PIXEL_OP_REMAP_TRANSMASK(DEST, PRIORITY, SOURCE) \ +#define PIXEL_OP_REMAP_TRANSMASK(DEST, PRIORITY, SOURCE) \ do \ { \ UINT32 srcdata = (SOURCE); \ @@ -194,7 +194,7 @@ do \ } \ while (0) \ -#define PIXEL_OP_REMAP_TRANSMASK_PRIORITY(DEST, PRIORITY, SOURCE) \ +#define PIXEL_OP_REMAP_TRANSMASK_PRIORITY(DEST, PRIORITY, SOURCE) \ do \ { \ UINT32 srcdata = (SOURCE); \ @@ -217,7 +217,7 @@ while (0) \ the destination pixel using 'shadowtable' -------------------------------------------------*/ -#define PIXEL_OP_REMAP_TRANSTABLE16(DEST, PRIORITY, SOURCE) \ +#define PIXEL_OP_REMAP_TRANSTABLE16(DEST, PRIORITY, SOURCE) \ do \ { \ UINT32 srcdata = (SOURCE); \ @@ -232,7 +232,7 @@ do \ } \ while (0) \ -#define PIXEL_OP_REMAP_TRANSTABLE32(DEST, PRIORITY, SOURCE) \ +#define PIXEL_OP_REMAP_TRANSTABLE32(DEST, PRIORITY, SOURCE) \ do \ { \ UINT32 srcdata = (SOURCE); \ @@ -247,7 +247,7 @@ do \ } \ while (0) \ -#define PIXEL_OP_REMAP_TRANSTABLE16_PRIORITY(DEST, PRIORITY, SOURCE) \ +#define PIXEL_OP_REMAP_TRANSTABLE16_PRIORITY(DEST, PRIORITY, SOURCE) \ do \ { \ UINT32 srcdata = (SOURCE); \ @@ -306,7 +306,7 @@ while (0) \ against the destination using 'alpha' -------------------------------------------------*/ -#define PIXEL_OP_REMAP_TRANSPEN_ALPHA16(DEST, PRIORITY, SOURCE) \ +#define PIXEL_OP_REMAP_TRANSPEN_ALPHA16(DEST, PRIORITY, SOURCE) \ do \ { \ UINT32 srcdata = (SOURCE); \ @@ -315,7 +315,7 @@ do \ } \ while (0) \ -#define PIXEL_OP_REMAP_TRANSPEN_ALPHA32(DEST, PRIORITY, SOURCE) \ +#define PIXEL_OP_REMAP_TRANSPEN_ALPHA32(DEST, PRIORITY, SOURCE) \ do \ { \ UINT32 srcdata = (SOURCE); \ @@ -324,7 +324,7 @@ do \ } \ while (0) \ -#define PIXEL_OP_REMAP_TRANSPEN_ALPHA16_PRIORITY(DEST, PRIORITY, SOURCE) \ +#define PIXEL_OP_REMAP_TRANSPEN_ALPHA16_PRIORITY(DEST, PRIORITY, SOURCE) \ do \ { \ UINT32 srcdata = (SOURCE); \ @@ -337,7 +337,7 @@ do \ } \ while (0) \ -#define PIXEL_OP_REMAP_TRANSPEN_ALPHA32_PRIORITY(DEST, PRIORITY, SOURCE) \ +#define PIXEL_OP_REMAP_TRANSPEN_ALPHA32_PRIORITY(DEST, PRIORITY, SOURCE) \ do \ { \ UINT32 srcdata = (SOURCE); \ @@ -373,9 +373,9 @@ while (0) \ #define DRAWGFX_CORE(PIXEL_TYPE, PIXEL_OP, PRIORITY_TYPE) \ -do { \ +do { \ profiler_mark_start(PROFILER_DRAWGFX); \ - do { \ + do { \ const UINT8 *srcdata; \ INT32 destendx, destendy; \ INT32 srcx, srcy; \ @@ -471,10 +471,10 @@ do { \ /* iterate over unrolled blocks of 4 */ \ for (curx = 0; curx < numblocks; curx++) \ { \ - PIXEL_OP(destptr[0], priptr[0], srcptr[0]); \ - PIXEL_OP(destptr[1], priptr[1], srcptr[1]); \ - PIXEL_OP(destptr[2], priptr[2], srcptr[2]); \ - PIXEL_OP(destptr[3], priptr[3], srcptr[3]); \ + PIXEL_OP(destptr[0], priptr[0], srcptr[0]); \ + PIXEL_OP(destptr[1], priptr[1], srcptr[1]); \ + PIXEL_OP(destptr[2], priptr[2], srcptr[2]); \ + PIXEL_OP(destptr[3], priptr[3], srcptr[3]); \ \ srcptr += 4; \ destptr += 4; \ @@ -484,7 +484,7 @@ do { \ /* iterate over leftover pixels */ \ for (curx = 0; curx < leftovers; curx++) \ { \ - PIXEL_OP(destptr[0], priptr[0], srcptr[0]); \ + PIXEL_OP(destptr[0], priptr[0], srcptr[0]); \ srcptr++; \ destptr++; \ PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 1); \ @@ -493,7 +493,7 @@ do { \ } \ \ /* flipped 8bpp case */ \ - else \ + else \ { \ /* iterate over pixels in Y */ \ for (cury = desty; cury <= destendy; cury++) \ @@ -506,10 +506,10 @@ do { \ /* iterate over unrolled blocks of 4 */ \ for (curx = 0; curx < numblocks; curx++) \ { \ - PIXEL_OP(destptr[0], priptr[0], srcptr[ 0]); \ - PIXEL_OP(destptr[1], priptr[1], srcptr[-1]); \ - PIXEL_OP(destptr[2], priptr[2], srcptr[-2]); \ - PIXEL_OP(destptr[3], priptr[3], srcptr[-3]); \ + PIXEL_OP(destptr[0], priptr[0], srcptr[ 0]); \ + PIXEL_OP(destptr[1], priptr[1], srcptr[-1]); \ + PIXEL_OP(destptr[2], priptr[2], srcptr[-2]); \ + PIXEL_OP(destptr[3], priptr[3], srcptr[-3]); \ \ srcptr -= 4; \ destptr += 4; \ @@ -553,7 +553,7 @@ do { \ /* odd starting pixel */ \ if (oddstart) \ { \ - PIXEL_OP(destptr[0], priptr[0], srcptr[0] >> 4); \ + PIXEL_OP(destptr[0], priptr[0], srcptr[0] >> 4); \ srcptr++; \ destptr++; \ PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 1); \ @@ -563,15 +563,15 @@ do { \ for (curx = 0; curx < numblocks; curx++) \ { \ UINT8 srcbyte = *srcptr++; \ - PIXEL_OP(destptr[0], priptr[0], srcbyte & 15); \ - PIXEL_OP(destptr[1], priptr[1], srcbyte >> 4); \ + PIXEL_OP(destptr[0], priptr[0], srcbyte & 15); \ + PIXEL_OP(destptr[1], priptr[1], srcbyte >> 4); \ destptr += 2; \ PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 2); \ } \ \ /* iterate over leftover pixels */ \ if (leftovers > 0) \ - PIXEL_OP(destptr[0], priptr[0], srcptr[0] & 15); \ + PIXEL_OP(destptr[0], priptr[0], srcptr[0] & 15); \ } \ } \ \ @@ -594,7 +594,7 @@ do { \ /* odd right pixel */ \ if (oddstart) \ { \ - PIXEL_OP(destptr[0], priptr[0], srcptr[0] & 15); \ + PIXEL_OP(destptr[0], priptr[0], srcptr[0] & 15); \ srcptr--; \ destptr++; \ PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 1); \ @@ -604,15 +604,15 @@ do { \ for (curx = 0; curx < numblocks; curx++) \ { \ UINT8 srcbyte = *srcptr--; \ - PIXEL_OP(destptr[0], priptr[0], srcbyte >> 4); \ - PIXEL_OP(destptr[1], priptr[1], srcbyte & 15); \ + PIXEL_OP(destptr[0], priptr[0], srcbyte >> 4); \ + PIXEL_OP(destptr[1], priptr[1], srcbyte & 15); \ destptr += 2; \ PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 2); \ } \ \ /* odd left pixel */ \ if (leftovers > 0) \ - PIXEL_OP(destptr[0], priptr[0], srcptr[0] >> 4); \ + PIXEL_OP(destptr[0], priptr[0], srcptr[0] >> 4); \ } \ } \ } \ @@ -645,9 +645,9 @@ do { \ #define DRAWGFXZOOM_CORE(PIXEL_TYPE, PIXEL_OP, PRIORITY_TYPE) \ -do { \ +do { \ profiler_mark_start(PROFILER_DRAWGFX); \ - do { \ + do { \ const UINT8 *srcdata; \ UINT32 dstwidth, dstheight; \ INT32 destendx, destendy; \ @@ -824,9 +824,9 @@ do { \ */ #define COPYBITMAP_CORE(PIXEL_TYPE, PIXEL_OP, PRIORITY_TYPE) \ -do { \ +do { \ profiler_mark_start(PROFILER_COPYBITMAP); \ - do { \ + do { \ const PIXEL_TYPE *srcdata; \ UINT32 numblocks, leftovers; \ INT32 destendx, destendy; \ @@ -923,10 +923,10 @@ do { \ /* iterate over unrolled blocks of 4 */ \ for (curx = 0; curx < numblocks; curx++) \ { \ - PIXEL_OP(destptr[0], priptr[0], srcptr[0]); \ - PIXEL_OP(destptr[1], priptr[1], srcptr[1]); \ - PIXEL_OP(destptr[2], priptr[2], srcptr[2]); \ - PIXEL_OP(destptr[3], priptr[3], srcptr[3]); \ + PIXEL_OP(destptr[0], priptr[0], srcptr[0]); \ + PIXEL_OP(destptr[1], priptr[1], srcptr[1]); \ + PIXEL_OP(destptr[2], priptr[2], srcptr[2]); \ + PIXEL_OP(destptr[3], priptr[3], srcptr[3]); \ \ srcptr += 4; \ destptr += 4; \ @@ -936,7 +936,7 @@ do { \ /* iterate over leftover pixels */ \ for (curx = 0; curx < leftovers; curx++) \ { \ - PIXEL_OP(destptr[0], priptr[0], srcptr[0]); \ + PIXEL_OP(destptr[0], priptr[0], srcptr[0]); \ srcptr++; \ destptr++; \ PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 1); \ @@ -945,7 +945,7 @@ do { \ } \ \ /* flipped case */ \ - else \ + else \ { \ /* iterate over pixels in Y */ \ for (cury = desty; cury <= destendy; cury++) \ @@ -958,10 +958,10 @@ do { \ /* iterate over unrolled blocks of 4 */ \ for (curx = 0; curx < numblocks; curx++) \ { \ - PIXEL_OP(destptr[0], priptr[0], srcptr[ 0]); \ - PIXEL_OP(destptr[1], priptr[1], srcptr[-1]); \ - PIXEL_OP(destptr[2], priptr[2], srcptr[-2]); \ - PIXEL_OP(destptr[3], priptr[3], srcptr[-3]); \ + PIXEL_OP(destptr[0], priptr[0], srcptr[ 0]); \ + PIXEL_OP(destptr[1], priptr[1], srcptr[-1]); \ + PIXEL_OP(destptr[2], priptr[2], srcptr[-2]); \ + PIXEL_OP(destptr[3], priptr[3], srcptr[-3]); \ \ srcptr -= 4; \ destptr += 4; \ @@ -1005,7 +1005,7 @@ do { \ */ #define COPYROZBITMAP_CORE(PIXEL_TYPE, PIXEL_OP, PRIORITY_TYPE) \ -do { \ +do { \ UINT32 srcfixwidth, srcfixheight; \ UINT32 numblocks, leftovers; \ INT32 curx, cury; \ @@ -1091,7 +1091,7 @@ do { \ for (curx = 0; curx < leftovers; curx++) \ { \ if ((UINT32)srcx < srcfixwidth) \ - PIXEL_OP(destptr[0], priptr[0], srcptr[srcx >> 16]); \ + PIXEL_OP(destptr[0], priptr[0], srcptr[srcx >> 16]); \ srcx += incxx; \ destptr++; \ PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 1); \ @@ -1122,13 +1122,13 @@ do { \ /* iterate over unrolled blocks of 4 */ \ for (curx = 0; curx < numblocks; curx++) \ { \ - PIXEL_OP(destptr[0], priptr[0], srcptr[srcx >> 16]); \ + PIXEL_OP(destptr[0], priptr[0], srcptr[srcx >> 16]); \ srcx = (srcx + incxx) & srcfixwidth; \ \ - PIXEL_OP(destptr[1], priptr[1], srcptr[srcx >> 16]); \ + PIXEL_OP(destptr[1], priptr[1], srcptr[srcx >> 16]); \ srcx = (srcx + incxx) & srcfixwidth; \ \ - PIXEL_OP(destptr[2], priptr[2], srcptr[srcx >> 16]); \ + PIXEL_OP(destptr[2], priptr[2], srcptr[srcx >> 16]); \ srcx = (srcx + incxx) & srcfixwidth; \ \ PIXEL_OP(destptr[3], priptr[3], srcptr[srcx >> 16]); \ @@ -1141,7 +1141,7 @@ do { \ /* iterate over leftover pixels */ \ for (curx = 0; curx < leftovers; curx++) \ { \ - PIXEL_OP(destptr[0], priptr[0], srcptr[srcx >> 16]); \ + PIXEL_OP(destptr[0], priptr[0], srcptr[srcx >> 16]); \ srcx = (srcx + incxx) & srcfixwidth; \ destptr++; \ PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 1); \ @@ -1213,7 +1213,7 @@ do { \ if ((UINT32)srcx < srcfixwidth && (UINT32)srcy < srcfixheight) \ { \ srcptr = BITMAP_ADDR(src, PIXEL_TYPE, srcy >> 16, srcx >> 16); \ - PIXEL_OP(destptr[0], priptr[0], srcptr[0]); \ + PIXEL_OP(destptr[0], priptr[0], srcptr[0]); \ } \ srcx += incxx; \ srcy += incxy; \ @@ -1305,7 +1305,7 @@ do { \ */ #define DRAWSCANLINE_CORE(PIXEL_TYPE, PIXEL_OP, PRIORITY_TYPE) \ -do { \ +do { \ assert(bitmap != NULL); \ assert(destx >= 0); \ assert(destx + length <= bitmap->width); \ @@ -1360,7 +1360,7 @@ do { \ */ #define EXTRACTSCANLINE_CORE(PIXEL_TYPE) \ -do { \ +do { \ assert(bitmap != NULL); \ assert(srcx >= 0); \ assert(srcx + length <= bitmap->width); \ @@ -1374,10 +1374,10 @@ do { \ /* iterate over unrolled blocks of 4 */ \ while (length >= 4) \ { \ - destptr[0] = srcptr[0]; \ - destptr[1] = srcptr[1]; \ - destptr[2] = srcptr[2]; \ - destptr[3] = srcptr[3]; \ + destptr[0] = srcptr[0]; \ + destptr[1] = srcptr[1]; \ + destptr[2] = srcptr[2]; \ + destptr[3] = srcptr[3]; \ length -= 4; \ srcptr += 4; \ destptr += 4; \ @@ -1386,7 +1386,7 @@ do { \ /* iterate over leftover pixels */ \ while (length > 0) \ { \ - destptr[0] = srcptr[0]; \ + destptr[0] = srcptr[0]; \ length--; \ srcptr++; \ destptr++; \ diff --git a/src/emu/driver.h b/src/emu/driver.h index 850c6a49cbc..41744efdd87 100644 --- a/src/emu/driver.h +++ b/src/emu/driver.h @@ -76,13 +76,13 @@ #define memcard_handler_0 NULL #define machine_start_0 NULL #define machine_reset_0 NULL -#define sound_start_0 NULL -#define sound_reset_0 NULL -#define video_start_0 NULL -#define video_reset_0 NULL +#define sound_start_0 NULL +#define sound_reset_0 NULL +#define video_start_0 NULL +#define video_reset_0 NULL #define palette_init_0 NULL #define video_eof_0 NULL -#define video_update_0 NULL +#define video_update_0 NULL typedef void (*driver_init_func)(running_machine *machine); diff --git a/src/emu/drivers/xtal.h b/src/emu/drivers/xtal.h index eab8d08a4fd..02922bbb109 100644 --- a/src/emu/drivers/xtal.h +++ b/src/emu/drivers/xtal.h @@ -42,135 +42,135 @@ enum Name = Frequency Examples ------------------ ------------ ------------------------------------------------------------ */ XTAL_32_768kHz = 32768, /* 32.768kHz, used to drive RTC chips */ - XTAL_1MHz = 1000000, /* Used to drive OKI M6295 chips */ + XTAL_1MHz = 1000000, /* Used to drive OKI M6295 chips */ XTAL_1_75MHz = 1750000, /* RCA CDP1861 */ XTAL_1_8432MHz = 1843200, /* Bondwell 12/14 */ - XTAL_2MHz = 2000000, + XTAL_2MHz = 2000000, XTAL_2_01216MHz = 2012160, /* Cidelsa Draco sound board */ XTAL_2_4576MHz = 2457600, /* Atari ST MFP */ - XTAL_3MHz = 3000000, /* Probably only used to drive 68705 or similar MCUs on 80's Taito PCBs */ - XTAL_3_12MHz = 3120000, /* SP0250 clock on Gottlieb games */ + XTAL_3MHz = 3000000, /* Probably only used to drive 68705 or similar MCUs on 80's Taito PCBs */ + XTAL_3_12MHz = 3120000, /* SP0250 clock on Gottlieb games */ XTAL_3_52128MHz = 3521280, /* RCA COSMAC VIP */ - XTAL_3_579545MHz = 3579545, /* NTSC color subcarrier, extremely common, used on 100's of PCBs */ + XTAL_3_579545MHz = 3579545, /* NTSC color subcarrier, extremely common, used on 100's of PCBs */ XTAL_3_6864MHz = 3686400, /* CPS3 */ - XTAL_4MHz = 4000000, + XTAL_4MHz = 4000000, XTAL_4_224MHz = 4224000, /* Used to drive OKI M6295 chips, usually with /4 divider */ XTAL_4_41MHz = 4410000, /* Pioneer PR-8210 ldplayer */ XTAL_4_43361MHz = 4433610, /* Cidelsa Draco */ XTAL_4_433619MHz = 4433619, /* PAL color subcarrier */ XTAL_4_608MHz = 4608000, /* Luxor ABC-77 keyboard */ - XTAL_4_9152MHz = 4915200, - XTAL_5MHz = 5000000, /* Mutant Night */ + XTAL_4_9152MHz = 4915200, + XTAL_5MHz = 5000000, /* Mutant Night */ XTAL_5_0688MHz = 5068800, /* Xerox 820, DEC VK100 */ XTAL_5_7143MHz = 5714300, /* Cidelsa Destroyer */ - XTAL_6MHz = 6000000, /* American Poker II */ + XTAL_6MHz = 6000000, /* American Poker II */ XTAL_6_144MHz = 6144000, /* Used on Alpha Denshi early 80's games sound board */ - XTAL_7MHz = 7000000, /* Jaleco Mega System PCBs */ - XTAL_7_15909MHz = 7159090, /* Blood Bros */ - XTAL_7_3728MHz = 7372800, - XTAL_7_8643MHz = 7864300, /* Used on InterFlip games as video clock */ - XTAL_8MHz = 8000000, /* Extremely common, used on 100's of PCBs */ + XTAL_7MHz = 7000000, /* Jaleco Mega System PCBs */ + XTAL_7_15909MHz = 7159090, /* Blood Bros */ + XTAL_7_3728MHz = 7372800, + XTAL_7_8643MHz = 7864300, /* Used on InterFlip games as video clock */ + XTAL_8MHz = 8000000, /* Extremely common, used on 100's of PCBs */ XTAL_8_4672MHz = 8467200, /* Subsino's Ying Hua Lian */ XTAL_8_664MHz = 8664000, /* Touchmaster */ XTAL_8_945MHz = 8945000, /* Hit Me */ XTAL_9_828MHz = 9828000, /* Universal PCBs */ XTAL_9_8304MHz = 9830400, /* Epson PX-8 */ XTAL_9_987MHz = 9987000, /* Crazy Balloon */ - XTAL_10MHz = 10000000, + XTAL_10MHz = 10000000, XTAL_10_595MHz = 10595000, /* Mad Alien */ XTAL_10_6875MHz = 10687500, /* BBC Bridge Companion */ XTAL_10_69425MHz = 10694250, /* Xerox 820 */ - XTAL_10_730MHz = 10730000, /* Ruleta RE-900 VDP Clock */ - XTAL_10_733MHz = 10733000, /* The Fairyland Story */ + XTAL_10_730MHz = 10730000, /* Ruleta RE-900 VDP Clock */ + XTAL_10_733MHz = 10733000, /* The Fairyland Story */ XTAL_10_738635MHz = 10738635, /* TMS9918 family */ - XTAL_10_816MHz = 10816000, /* Universal 1979-1980 (Cosmic Alien, etc) */ + XTAL_10_816MHz = 10816000, /* Universal 1979-1980 (Cosmic Alien, etc) */ XTAL_11MHz = 11000000, /* Mario I8039 sound */ - XTAL_11_0592MHz = 11059200, /* Lethal Justice, Ruleta RE-900 */ - XTAL_11_2MHz = 11200000, /* New York, New York */ + XTAL_11_0592MHz = 11059200, /* Lethal Justice, Ruleta RE-900 */ + XTAL_11_2MHz = 11200000, /* New York, New York */ XTAL_11_289MHz = 11289000, /* Vanguard */ - XTAL_11_6688MHz = 11668800, /* Gameplan pixel clock */ - XTAL_12MHz = 12000000, /* Extremely common, used on 100's of PCBs */ - XTAL_12_096MHz = 12096000, /* Some early 80's Atari games */ + XTAL_11_6688MHz = 11668800, /* Gameplan pixel clock */ + XTAL_12MHz = 12000000, /* Extremely common, used on 100's of PCBs */ + XTAL_12_096MHz = 12096000, /* Some early 80's Atari games */ XTAL_12_288MHz = 12288000, /* Sega Model 3 digital audio board */ - XTAL_12_5MHz = 12500000, /* Red Alert audio board */ + XTAL_12_5MHz = 12500000, /* Red Alert audio board */ XTAL_12_9792MHz = 12979200, /* Exidy 440 */ - XTAL_13_3MHz = 13300000, /* BMC bowling */ - XTAL_13_33056MHz = 13330560, /* Taito L */ + XTAL_13_3MHz = 13300000, /* BMC bowling */ + XTAL_13_33056MHz = 13330560, /* Taito L */ XTAL_13_4MHz = 13400000, /* TNK3, Ikari Warriors h/w */ XTAL_13_4952MHz = 13495200, /* Used on Shadow Force pcb and maybe other Technos pcbs? */ - XTAL_14MHz = 14000000, - XTAL_14_112MHz = 14112000, /* Timex/Sinclair TS2068 */ - XTAL_14_31818MHz = 14318180, /* Extremely common, used on 100's of PCBs */ - XTAL_14_705882MHz = 14705882, /* Aleck64 */ + XTAL_14MHz = 14000000, + XTAL_14_112MHz = 14112000, /* Timex/Sinclair TS2068 */ + XTAL_14_31818MHz = 14318180, /* Extremely common, used on 100's of PCBs */ + XTAL_14_705882MHz = 14705882, /* Aleck64 */ XTAL_14_7456MHz = 14745600, /* Namco System 12 & System Super 22/23 for H8/3002 CPU */ XTAL_15MHz = 15000000, /* Sinclair QL */ XTAL_15_36MHz = 15360000, /* Visual 1050 */ XTAL_15_468MHz = 15468000, /* Bank Panic h/w, Sega G80 */ - XTAL_16MHz = 16000000, /* Extremely common, used on 100's of PCBs */ - XTAL_16_9344MHz = 16934400, /* Usually used to drive 90's Yamaha OPL/FM chips */ + XTAL_16MHz = 16000000, /* Extremely common, used on 100's of PCBs */ + XTAL_16_9344MHz = 16934400, /* Usually used to drive 90's Yamaha OPL/FM chips */ XTAL_17_73447MHz = 17734470, /* 4 times the PAL subcarrier */ - XTAL_18MHz = 18000000, /* S.A.R, Ikari Warriors 3 */ + XTAL_18MHz = 18000000, /* S.A.R, Ikari Warriors 3 */ XTAL_18_432MHz = 18432000, /* Extremely common, used on 100's of PCBs */ - XTAL_18_720MHz = 18720000, /* Nokia MikroMikko 1 */ + XTAL_18_720MHz = 18720000, /* Nokia MikroMikko 1 */ XTAL_19_6608MHz = 19660800, /* Euro League (bootleg), labeled as "UKI 19.6608 20PF" */ XTAL_19_923MHz = 19923000, /* Cinematronics vectors */ XTAL_19_968MHz = 19968000, /* Used mostly by some Taito games */ - XTAL_20MHz = 20000000, + XTAL_20MHz = 20000000, XTAL_20_16MHz = 20160000, /* Nintendo 8080 */ XTAL_20_079MHz = 20790000, /* Blockade-hardware Gremlin games */ XTAL_21MHz = 21000000, /* Lock-On pixel clock */ - XTAL_21_3MHz = 21300000, - XTAL_21_477MHz = 21477000, /* Super Othello */ + XTAL_21_3MHz = 21300000, + XTAL_21_477MHz = 21477000, /* Super Othello */ XTAL_21_4772MHz = 21477270, /* BMC bowling, some Data East 90's games, Vtech Socrates; NTSC color subcarrier * 6 */ - XTAL_22MHz = 22000000, + XTAL_22MHz = 22000000, XTAL_22_1184MHz = 22118400, - XTAL_24MHz = 24000000, /* Mario, 80's Data East games, 80's Konami games */ + XTAL_24MHz = 24000000, /* Mario, 80's Data East games, 80's Konami games */ XTAL_24_576MHz = 24576000, /* Pole Position h/w, Model 3 CPU board */ XTAL_24_8832MHz = 24883200, /* DEC VT100 */ - XTAL_25MHz = 25000000, /* Namco System 22, Taito GNET, Dogyuun h/w */ - XTAL_25_1748MHz = 25174800, /* Sega S16A, S16B */ + XTAL_25MHz = 25000000, /* Namco System 22, Taito GNET, Dogyuun h/w */ + XTAL_25_1748MHz = 25174800, /* Sega S16A, S16B */ XTAL_25_447MHz = 25447000, /* Namco EVA3A (Funcube2) */ - XTAL_25_601712MHz = 25601712, /* Astro Corp.'s Show Hand */ - XTAL_26_66666MHz = 26666660, /* Irem M92 but most use 27MHz */ - XTAL_26_686MHz = 26686000, /* Typically used on 90's Taito PCBs to drive the custom chips */ - XTAL_27MHz = 27000000, /* Some Banpresto games macrossp, Irem M92 and 90's Toaplan games */ + XTAL_25_601712MHz = 25601712, /* Astro Corp.'s Show Hand */ + XTAL_26_66666MHz = 26666660, /* Irem M92 but most use 27MHz */ + XTAL_26_686MHz = 26686000, /* Typically used on 90's Taito PCBs to drive the custom chips */ + XTAL_27MHz = 27000000, /* Some Banpresto games macrossp, Irem M92 and 90's Toaplan games */ XTAL_27_164MHz = 27164000, /* Typically used on 90's Taito PCBs to drive the custom chips */ XTAL_27_2109MHz = 27210900, /* LA Girl */ - XTAL_28MHz = 28000000, + XTAL_28MHz = 28000000, XTAL_28_37516MHz = 28375160, /* Amiga PAL systems */ - XTAL_28_63636MHz = 28636360, /* Later Leland games and Atari GT, Amiga NTSC , Raiden2 h/w */ - XTAL_30MHz = 30000000, /* Impera Magic Card */ - XTAL_30_4761MHz = 30476100, /* Taito JC */ - XTAL_32MHz = 32000000, - XTAL_32_22MHz = 32220000, /* Typically used on 90's Data East PCBs */ - XTAL_32_5304MHz = 32530400, /* Seta 2 */ - XTAL_33MHz = 33000000, /* Sega Model 3 video board */ + XTAL_28_63636MHz = 28636360, /* Later Leland games and Atari GT, Amiga NTSC , Raiden2 h/w */ + XTAL_30MHz = 30000000, /* Impera Magic Card */ + XTAL_30_4761MHz = 30476100, /* Taito JC */ + XTAL_32MHz = 32000000, + XTAL_32_22MHz = 32220000, /* Typically used on 90's Data East PCBs */ + XTAL_32_5304MHz = 32530400, /* Seta 2 */ + XTAL_33MHz = 33000000, /* Sega Model 3 video board */ XTAL_33_333MHz = 33333000, /* Sega Model 3 CPU board, Vegas */ - XTAL_33_8688MHz = 33868800, /* Usually used to drive 90's Yamaha OPL/FM chips with /2 divider */ - XTAL_36MHz = 36000000, /* Sega Model 1 video board */ - XTAL_38_76922MHz = 38769220, /* Namco System 21 video board */ - XTAL_40MHz = 40000000, - XTAL_42_9545MHz = 42954500, /* CPS3 */ + XTAL_33_8688MHz = 33868800, /* Usually used to drive 90's Yamaha OPL/FM chips with /2 divider */ + XTAL_36MHz = 36000000, /* Sega Model 1 video board */ + XTAL_38_76922MHz = 38769220, /* Namco System 21 video board */ + XTAL_40MHz = 40000000, + XTAL_42_9545MHz = 42954500, /* CPS3 */ XTAL_44_1MHz = 44100000, /* Subsino's Bishou Jan */ - XTAL_45MHz = 45000000, /* Eolith with Hyperstone CPUs */ + XTAL_45MHz = 45000000, /* Eolith with Hyperstone CPUs */ XTAL_45_158MHz = 45158000, /* Sega Model 2A video board, Model 3 CPU board */ XTAL_45_6192Mhz = 45619200, /* DEC VK100 */ - XTAL_48MHz = 48000000, /* Williams/Midway Y/Z-unit system */ - XTAL_48_66MHz = 48660000, /* Zaxxon */ + XTAL_48MHz = 48000000, /* Williams/Midway Y/Z-unit system */ + XTAL_48_66MHz = 48660000, /* Zaxxon */ XTAL_49_152MHz = 49152000, /* Used on some Namco PCBs, Baraduke h/w, System 21, Super System 22 */ - XTAL_50MHz = 50000000, /* Williams/Midway T/W/V-unit system */ - XTAL_52MHz = 52000000, /* Cojag */ - XTAL_53_693175MHz = 53693175, /* PSX-based h/w, Sony ZN1-2-based */ - XTAL_54MHz = 54000000, /* Taito JC */ - XTAL_57_2727MHz = 57272700, /* Psikyo SH2 with /2 divider */ - XTAL_60MHz = 60000000, + XTAL_50MHz = 50000000, /* Williams/Midway T/W/V-unit system */ + XTAL_52MHz = 52000000, /* Cojag */ + XTAL_53_693175MHz = 53693175, /* PSX-based h/w, Sony ZN1-2-based */ + XTAL_54MHz = 54000000, /* Taito JC */ + XTAL_57_2727MHz = 57272700, /* Psikyo SH2 with /2 divider */ + XTAL_60MHz = 60000000, XTAL_61_44MHz = 61440000, /* dkong */ - XTAL_64MHz = 64000000, /* BattleToads */ - XTAL_66_6667MHz = 66666700, /* Later Midway games */ - XTAL_67_7376MHz = 67737600, /* PSX-based h/w, Sony ZN1-2-based */ + XTAL_64MHz = 64000000, /* BattleToads */ + XTAL_66_6667MHz = 66666700, /* Later Midway games */ + XTAL_67_7376MHz = 67737600, /* PSX-based h/w, Sony ZN1-2-based */ XTAL_73_728MHz = 73728000, /* Ms. Pac-Man/Galaga 20th Anniversary */ - XTAL_100MHz = 100000000, /* PSX-based Namco System 12, Vegas, Sony ZN1-2-based */ - XTAL_101_4912MHz = 101491200, /* PSX-based Namco System 10 */ + XTAL_100MHz = 100000000, /* PSX-based Namco System 12, Vegas, Sony ZN1-2-based */ + XTAL_101_4912MHz = 101491200, /* PSX-based Namco System 10 */ /* Resonators (There are probably more. Almost always used for driving OKI sound chips) */ @@ -178,7 +178,7 @@ enum XTAL_400kHz = 400000, /* Used on Great Swordman h/w */ XTAL_455kHz = 455000, /* Used on Gladiator h/w */ XTAL_640kHz = 640000, - XTAL_1_056MHz = 1056000 /* used on Trio The Punch */ + XTAL_1_056MHz = 1056000 /* used on Trio The Punch */ }; diff --git a/src/emu/emu.mak b/src/emu/emu.mak index f504f3f3684..d7fab1dc404 100644 --- a/src/emu/emu.mak +++ b/src/emu/emu.mak @@ -126,9 +126,9 @@ EMUMACHINEOBJS = \ $(EMUMACHINE)/adc083x.o \ $(EMUMACHINE)/adc1038.o \ $(EMUMACHINE)/adc1213x.o \ - $(EMUMACHINE)/am53cf96.o \ - $(EMUMACHINE)/at28c16.o \ - $(EMUMACHINE)/cdp1852.o \ + $(EMUMACHINE)/am53cf96.o \ + $(EMUMACHINE)/at28c16.o \ + $(EMUMACHINE)/cdp1852.o \ $(EMUMACHINE)/ds1302.o \ $(EMUMACHINE)/ds2401.o \ $(EMUMACHINE)/ds2404.o \ @@ -139,10 +139,10 @@ EMUMACHINEOBJS = \ $(EMUMACHINE)/i8255a.o \ $(EMUMACHINE)/i2cmem.o \ $(EMUMACHINE)/i2cmemdev.o \ - $(EMUMACHINE)/idectrl.o \ - $(EMUMACHINE)/intelfsh.o \ - $(EMUMACHINE)/k033906.o \ - $(EMUMACHINE)/k056230.o \ + $(EMUMACHINE)/idectrl.o \ + $(EMUMACHINE)/intelfsh.o \ + $(EMUMACHINE)/k033906.o \ + $(EMUMACHINE)/k056230.o \ $(EMUMACHINE)/latch8.o \ $(EMUMACHINE)/ldcore.o \ $(EMUMACHINE)/ldpr8210.o \ @@ -167,7 +167,7 @@ EMUMACHINEOBJS = \ $(EMUMACHINE)/scsidev.o \ $(EMUMACHINE)/scsihd.o \ $(EMUMACHINE)/cr589.o \ - $(EMUMACHINE)/smc91c9x.o \ + $(EMUMACHINE)/smc91c9x.o \ $(EMUMACHINE)/timekpr.o \ $(EMUMACHINE)/tmp68301.o \ $(EMUMACHINE)/upd4701.o \ @@ -182,7 +182,7 @@ EMUMACHINEOBJS = \ EMUVIDEOOBJS = \ $(EMUVIDEO)/generic.o \ - $(EMUVIDEO)/mc6845.o \ + $(EMUVIDEO)/mc6845.o \ $(EMUVIDEO)/poly.o \ $(EMUVIDEO)/resnet.o \ $(EMUVIDEO)/rgbutil.o \ @@ -190,11 +190,11 @@ EMUVIDEOOBJS = \ $(EMUVIDEO)/saa5050.o \ $(EMUVIDEO)/tlc34076.o \ $(EMUVIDEO)/tms34061.o \ - $(EMUVIDEO)/tms9927.o \ - $(EMUVIDEO)/tms9928a.o \ + $(EMUVIDEO)/tms9927.o \ + $(EMUVIDEO)/tms9928a.o \ $(EMUVIDEO)/v9938.o \ - $(EMUVIDEO)/vector.o \ - $(EMUVIDEO)/voodoo.o \ + $(EMUVIDEO)/vector.o \ + $(EMUVIDEO)/voodoo.o \ $(LIBEMU): $(EMUOBJS) $(EMUSOUNDOBJS) $(EMUAUDIOOBJS) $(EMUDRIVEROBJS) $(EMUMACHINEOBJS) $(EMUVIDEOOBJS) diff --git a/src/emu/emupal.c b/src/emu/emupal.c index 06d90641d80..e65f060e1dd 100644 --- a/src/emu/emupal.c +++ b/src/emu/emupal.c @@ -20,7 +20,7 @@ #define PEN_BRIGHTNESS_BITS 8 #define MAX_PEN_BRIGHTNESS (4 << PEN_BRIGHTNESS_BITS) -#define MAX_SHADOW_PRESETS 4 +#define MAX_SHADOW_PRESETS 4 @@ -45,10 +45,10 @@ struct _palette_private { bitmap_format format; /* format assumed for palette data */ - UINT32 shadow_group; /* index of the shadow group, or 0 if none */ + UINT32 shadow_group; /* index of the shadow group, or 0 if none */ UINT32 hilight_group; /* index of the hilight group, or 0 if none */ - pen_t black_pen; /* precomputed black pen value */ + pen_t black_pen; /* precomputed black pen value */ pen_t white_pen; /* precomputed white pen value */ shadow_table_data shadow_table[MAX_SHADOW_PRESETS]; /* array of shadow table data */ diff --git a/src/emu/fileio.c b/src/emu/fileio.c index c551ab1fce7..67a41194b4e 100644 --- a/src/emu/fileio.c +++ b/src/emu/fileio.c @@ -55,7 +55,7 @@ struct _mame_file #endif astring * filename; /* full filename */ core_file * file; /* core file pointer */ - path_iterator iterator; /* iterator for paths */ + path_iterator iterator; /* iterator for paths */ UINT32 openflags; /* flags we used for the open */ char hash[HASH_BUF_SIZE]; /* hash data for the file */ zip_file * zipfile; /* ZIP file pointer */ diff --git a/src/emu/info.c b/src/emu/info.c index baa5976cb95..628a3e6f008 100644 --- a/src/emu/info.c +++ b/src/emu/info.c @@ -1023,7 +1023,7 @@ void print_mame_xml(FILE *out, const game_driver *const games[], const char *gam "\t\t\t<!ATTLIST driver cocktail (good|imperfect|preliminary) #IMPLIED>\n" "\t\t\t<!ATTLIST driver protection (good|imperfect|preliminary) #IMPLIED>\n" "\t\t\t<!ATTLIST driver savestate (supported|unsupported) #REQUIRED>\n" - "\t\t\t<!ATTLIST driver palettesize CDATA #REQUIRED>\n" + "\t\t\t<!ATTLIST driver palettesize CDATA #REQUIRED>\n" #ifdef MESS "\t\t<!ELEMENT device (instance*, extension*)>\n" "\t\t\t<!ATTLIST device type CDATA #REQUIRED>\n" diff --git a/src/emu/inptport.c b/src/emu/inptport.c index 57f75f41f2a..26ca03ea7a5 100644 --- a/src/emu/inptport.c +++ b/src/emu/inptport.c @@ -202,7 +202,7 @@ struct _device_field_info { device_field_info * next; /* linked list of info for this port */ const input_field_config * field; /* pointer to the input field referenced */ - const device_config * device; /* device */ + const device_config * device; /* device */ UINT8 shift; /* shift to apply to the final result */ input_port_value oldval; /* last value */ }; @@ -256,7 +256,7 @@ struct _input_port_private input_type_state * type_to_typestate[__ipt_max][MAX_PLAYERS]; /* map from type/player to type state */ /* specific special global input states */ - digital_joystick_state joystick_info[MAX_PLAYERS][DIGITAL_JOYSTICKS_PER_PLAYER]; /* joystick states */ + digital_joystick_state joystick_info[MAX_PLAYERS][DIGITAL_JOYSTICKS_PER_PLAYER]; /* joystick states */ /* frame time tracking */ attotime last_frame_time; /* time of the last frame callback */ diff --git a/src/emu/inptport.h b/src/emu/inptport.h index 7b3e2ab6d1c..d7e88308aea 100644 --- a/src/emu/inptport.h +++ b/src/emu/inptport.h @@ -586,10 +586,10 @@ union _input_port_token TOKEN_COMMON_FIELDS const input_port_token * tokenptr; input_field_custom_func customptr; - input_field_changed_func changedptr; - input_field_crossmap_func crossmapptr; - read_line_device_func read_line_device; - write_line_device_func write_line_device; + input_field_changed_func changedptr; + input_field_crossmap_func crossmapptr; + read_line_device_func read_line_device; + write_line_device_func write_line_device; }; @@ -650,7 +650,7 @@ struct _input_field_config const char * write_device_name; /* input device name */ input_field_custom_func custom; /* custom callback routine */ void * custom_param; /* parameter for custom callback routine */ - input_field_changed_func changed; /* changed callback routine */ + input_field_changed_func changed; /* changed callback routine */ void * changed_param; /* parameter for changed callback routine */ /* data relevant to analog control types */ @@ -663,7 +663,7 @@ struct _input_field_config float crossscale; /* crosshair scale */ float crossoffset; /* crosshair offset */ float crossaltaxis; /* crosshair alternate axis value */ - input_field_crossmap_func crossmapper; /* crosshair mapping function */ + input_field_crossmap_func crossmapper; /* crosshair mapping function */ UINT16 full_turn_count;/* number of optical counts for 1 full turn of the original control */ const input_port_value * remap_table; /* pointer to an array that remaps the port value */ @@ -671,7 +671,7 @@ struct _input_field_config const input_setting_config *settinglist; /* list of input_setting_configs */ const input_field_diplocation *diploclist; /* list of locations for various bits */ UINT8 way; /* digital joystick 2/4/8-way descriptions */ - unicode_char chars[3]; /* (MESS-specific) unicode key data */ + unicode_char chars[3]; /* (MESS-specific) unicode key data */ /* this field is only valid if the device is live */ input_field_state * state; /* live state of field (NULL if not live) */ diff --git a/src/emu/input.c b/src/emu/input.c index d65362d153d..4d3690f34b5 100644 --- a/src/emu/input.c +++ b/src/emu/input.c @@ -118,7 +118,7 @@ struct _code_string_table struct _input_private { /* array of devices for each class */ - input_device_list device_list[DEVICE_CLASS_MAXIMUM]; + input_device_list device_list[DEVICE_CLASS_MAXIMUM]; input_code code_pressed_memory[MAX_PRESSED_SWITCHES]; /* device configuration */ @@ -126,7 +126,7 @@ struct _input_private UINT8 lightgun_reload_button; const char * joystick_map_default; INT32 joystick_deadzone; - INT32 joystick_saturation; + INT32 joystick_saturation; }; diff --git a/src/emu/input.h b/src/emu/input.h index e8299822d08..6d8dcfd062f 100644 --- a/src/emu/input.h +++ b/src/emu/input.h @@ -46,10 +46,10 @@ /* build or modify input codes */ #define INPUT_CODE(d,x,i,m,o) ((((d) & 0x0f) << 24) | (((x) & 0x0f) << 20) | (((i) & 0x0f) << 16) | (((m) & 0x0f) << 12) | ((o) & 0xfff)) -#define INPUT_CODE_SET_DEVINDEX(c,x) (((c) & ~(0xf << 20)) | (((x) & 0x0f) << 20)) -#define INPUT_CODE_SET_ITEMCLASS(c,i) (((c) & ~(0xf << 16)) | (((i) & 0x0f) << 16)) -#define INPUT_CODE_SET_MODIFIER(c,m) (((c) & ~(0xf << 12)) | (((m) & 0x0f) << 12)) -#define INPUT_CODE_SET_ITEMID(c,d) (((c) & ~0xfff) | ((d) & 0xfff)) +#define INPUT_CODE_SET_DEVINDEX(c,x) (((c) & ~(0xf << 20)) | (((x) & 0x0f) << 20)) +#define INPUT_CODE_SET_ITEMCLASS(c,i) (((c) & ~(0xf << 16)) | (((i) & 0x0f) << 16)) +#define INPUT_CODE_SET_MODIFIER(c,m) (((c) & ~(0xf << 12)) | (((m) & 0x0f) << 12)) +#define INPUT_CODE_SET_ITEMID(c,d) (((c) & ~0xfff) | ((d) & 0xfff)) /* standard code building */ #define STANDARD_CODE(d,x,i,m,o) (INPUT_CODE(DEVICE_CLASS_##d, x, ITEM_CLASS_##i, ITEM_MODIFIER_##m, ITEM_ID_##o)) diff --git a/src/emu/machine/6532riot.c b/src/emu/machine/6532riot.c index 25aeeba48fa..2a2ce8175d2 100644 --- a/src/emu/machine/6532riot.c +++ b/src/emu/machine/6532riot.c @@ -40,7 +40,7 @@ struct _riot6532_port { UINT8 in; UINT8 out; - UINT8 ddr; + UINT8 ddr; devcb_resolved_read8 in_func; devcb_resolved_write8 out_func; }; @@ -60,8 +60,8 @@ struct _riot6532_state UINT8 irqstate; UINT8 irqenable; - UINT8 pa7dir; /* 0x80 = high-to-low, 0x00 = low-to-high */ - UINT8 pa7prev; + UINT8 pa7dir; /* 0x80 = high-to-low, 0x00 = low-to-high */ + UINT8 pa7prev; UINT8 timershift; UINT8 timerstate; diff --git a/src/emu/machine/6850acia.c b/src/emu/machine/6850acia.c index 7b96301ffb6..d68dac4c986 100644 --- a/src/emu/machine/6850acia.c +++ b/src/emu/machine/6850acia.c @@ -92,8 +92,8 @@ struct _acia6850_t int brk; int first_reset; int status_read; - enum serial_state rx_state; - enum serial_state tx_state; + enum serial_state rx_state; + enum serial_state tx_state; emu_timer *rx_timer; emu_timer *tx_timer; diff --git a/src/emu/machine/74181.c b/src/emu/machine/74181.c index f7456de7218..3d15e4241f1 100644 --- a/src/emu/machine/74181.c +++ b/src/emu/machine/74181.c @@ -10,7 +10,7 @@ -#define TTL74181_MAX_CHIPS (2) +#define TTL74181_MAX_CHIPS (2) #define TTL74181_INPUT_TOTAL (14) #define TTL74181_OUTPUT_TOTAL (8) diff --git a/src/emu/machine/7474.c b/src/emu/machine/7474.c index bcfbeccfc4a..195a27ea1cc 100644 --- a/src/emu/machine/7474.c +++ b/src/emu/machine/7474.c @@ -79,22 +79,22 @@ void ttl7474_update(const device_config *device) if (!state->preset && state->clear) /* line 1 in truth table */ { - state->output = 1; + state->output = 1; state->output_comp = 0; } else if (state->preset && !state->clear) /* line 2 in truth table */ { - state->output = 0; + state->output = 0; state->output_comp = 1; } else if (!state->preset && !state->clear) /* line 3 in truth table */ { - state->output = 1; + state->output = 1; state->output_comp = 1; } else if (!state->last_clock && state->clock) /* line 4 in truth table */ { - state->output = state->d; + state->output = state->d; state->output_comp = !state->d; } diff --git a/src/emu/machine/8255ppi.c b/src/emu/machine/8255ppi.c index c96206ee7fc..d7bbb5572d3 100644 --- a/src/emu/machine/8255ppi.c +++ b/src/emu/machine/8255ppi.c @@ -163,7 +163,7 @@ INLINE void ppi8255_get_handshake_signals(ppi8255_t *ppi8255, int is_read, UINT8 } } else if (ppi8255->group_a_mode == 2) - { + { handshake |= ppi8255->obf_a ? 0x00 : 0x80; handshake |= ppi8255->ibf_a ? 0x20 : 0x00; handshake |= ((ppi8255->obf_a && ppi8255->inte_1) || (ppi8255->ibf_a && ppi8255->inte_2)) ? 0x08 : 0x00; @@ -172,20 +172,20 @@ INLINE void ppi8255_get_handshake_signals(ppi8255_t *ppi8255, int is_read, UINT8 /* group B */ if (ppi8255->group_b_mode == 1) - { + { if (ppi8255->port_b_dir) { handshake |= ppi8255->ibf_b ? 0x02 : 0x00; handshake |= (ppi8255->ibf_b && ppi8255->inte_b) ? 0x01 : 0x00; mask |= 0x03; - } + } else - { + { handshake |= ppi8255->obf_b ? 0x00 : 0x02; handshake |= (ppi8255->obf_b && ppi8255->inte_b) ? 0x01 : 0x00; mask |= 0x03; } - } + } *result &= ~mask; *result |= handshake & mask; @@ -337,11 +337,11 @@ WRITE8_DEVICE_HANDLER( ppi8255_w ) offset %= 4; - switch( offset ) - { - case 0: /* Port A write */ + switch( offset ) + { + case 0: /* Port A write */ case 1: /* Port B write */ - case 2: /* Port C write */ + case 2: /* Port C write */ ppi8255->latch[offset] = data; ppi8255_write_port(device, offset); @@ -363,7 +363,7 @@ WRITE8_DEVICE_HANDLER( ppi8255_w ) } break; } - break; + break; case 3: /* Control word */ if (data & 0x80) @@ -372,14 +372,14 @@ WRITE8_DEVICE_HANDLER( ppi8255_w ) } else { - /* bit set/reset */ - int bit; + /* bit set/reset */ + int bit; - bit = (data >> 1) & 0x07; + bit = (data >> 1) & 0x07; - if (data & 1) + if (data & 1) ppi8255->latch[2] |= (1<<bit); /* set bit */ - else + else ppi8255->latch[2] &= ~(1<<bit); /* reset bit */ if (ppi8255->group_b_mode == 1) @@ -461,20 +461,20 @@ static void set_mode(const device_config *device, int data, int call_handlers) if (ppi8255->group_a_mode == 3) ppi8255->group_a_mode = 2; - /* Port A direction */ + /* Port A direction */ if (ppi8255->group_a_mode == 2) ppi8255->in_mask[0] = 0xFF, ppi8255->out_mask[0] = 0xFF; /* bidirectional */ else if (ppi8255->port_a_dir) ppi8255->in_mask[0] = 0xFF, ppi8255->out_mask[0] = 0x00; /* input */ else - ppi8255->in_mask[0] = 0x00, ppi8255->out_mask[0] = 0xFF; /* output */ + ppi8255->in_mask[0] = 0x00, ppi8255->out_mask[0] = 0xFF; /* output */ - /* Port B direction */ + /* Port B direction */ if (ppi8255->port_b_dir) ppi8255->in_mask[1] = 0xFF, ppi8255->out_mask[1] = 0x00; /* input */ else - ppi8255->in_mask[1] = 0x00, ppi8255->out_mask[1] = 0xFF; /* output */ + ppi8255->in_mask[1] = 0x00, ppi8255->out_mask[1] = 0xFF; /* output */ /* Port C upper direction */ if (ppi8255->port_ch_dir) @@ -482,7 +482,7 @@ static void set_mode(const device_config *device, int data, int call_handlers) else ppi8255->in_mask[2] = 0x00, ppi8255->out_mask[2] = 0xF0; /* output */ - /* Port C lower direction */ + /* Port C lower direction */ if (ppi8255->port_cl_dir) ppi8255->in_mask[2] |= 0x0F; /* input */ else diff --git a/src/emu/machine/8257dma.c b/src/emu/machine/8257dma.c index 1bd5c531336..f263b1894bc 100644 --- a/src/emu/machine/8257dma.c +++ b/src/emu/machine/8257dma.c @@ -188,7 +188,7 @@ static TIMER_CALLBACK( dma8257_timerproc ) { i8257->drq &= ~(0x01 << channel); dma8257_update_status(device); - if (!(DMA_MODE_AUTOLOAD(i8257->mode) && channel==2)) { + if (!(DMA_MODE_AUTOLOAD(i8257->mode) && channel==2)) { if (DMA_MODE_TCSTOP(i8257->mode)) { i8257->mode &= ~(0x01 << channel); } diff --git a/src/emu/machine/am53cf96.c b/src/emu/machine/am53cf96.c index f5a9b0d24a1..d8423561b8a 100644 --- a/src/emu/machine/am53cf96.c +++ b/src/emu/machine/am53cf96.c @@ -161,7 +161,7 @@ WRITE32_HANDLER( am53cf96_w ) xfer_state = 0; timer_set( space->machine, ATTOTIME_IN_HZ( 16384 ), NULL, 0, am53cf96_irq ); break; - case 0x42: // select with ATN steps + case 0x42: // select with ATN steps timer_set( space->machine, ATTOTIME_IN_HZ( 16384 ), NULL, 0, am53cf96_irq ); if ((fifo[1] == 0) || (fifo[1] == 0x48) || (fifo[1] == 0x4b)) { diff --git a/src/emu/machine/eeprom.c b/src/emu/machine/eeprom.c index f985e6145a6..7c9fcd75760 100644 --- a/src/emu/machine/eeprom.c +++ b/src/emu/machine/eeprom.c @@ -88,7 +88,7 @@ static int eeprom_command_match(const char *buf, const char *cmd, int len) { case '0': case '1': - if (b == c) { cmd++; } + if (b == c) { cmd++; } else { buf++; len--; } break; default: return 0; diff --git a/src/emu/machine/generic.c b/src/emu/machine/generic.c index 71b06b336a5..fb43c68c165 100644 --- a/src/emu/machine/generic.c +++ b/src/emu/machine/generic.c @@ -32,16 +32,16 @@ static void interrupt_reset(running_machine *machine); struct _generic_machine_private { /* tickets and coin counters */ - UINT32 dispensed_tickets; - UINT32 coin_count[COIN_COUNTERS]; - UINT32 coinlockedout[COIN_COUNTERS]; - UINT32 lastcoin[COIN_COUNTERS]; + UINT32 dispensed_tickets; + UINT32 coin_count[COIN_COUNTERS]; + UINT32 coinlockedout[COIN_COUNTERS]; + UINT32 lastcoin[COIN_COUNTERS]; /* memory card status */ int memcard_inserted; /* interrupt status for up to 8 CPUs */ - UINT8 interrupt_enable[8]; + UINT8 interrupt_enable[8]; }; diff --git a/src/emu/machine/idectrl.c b/src/emu/machine/idectrl.c index 58f16119a8a..4c8b668c32b 100644 --- a/src/emu/machine/idectrl.c +++ b/src/emu/machine/idectrl.c @@ -466,7 +466,7 @@ static void ide_generate_features(ide_state *ide) ide->features[ 8*2+1] = 0; ide->features[ 9*2+0] = 0; /* 9: vendor-specific */ ide->features[ 9*2+1] = 0; - swap_strncpy(&ide->features[10*2+0], /* 10-19: serial number */ + swap_strncpy(&ide->features[10*2+0], /* 10-19: serial number */ "00000000000000000000", 10); ide->features[20*2+0] = 0; /* 20: vendor-specific */ ide->features[20*2+1] = 0; @@ -474,9 +474,9 @@ static void ide_generate_features(ide_state *ide) ide->features[21*2+1] = 0; ide->features[22*2+0] = 4; /* 22: # of vendor-specific bytes on read/write long commands */ ide->features[22*2+1] = 0; - swap_strncpy(&ide->features[23*2+0], /* 23-26: firmware revision */ + swap_strncpy(&ide->features[23*2+0], /* 23-26: firmware revision */ "1.0", 4); - swap_strncpy(&ide->features[27*2+0], /* 27-46: model number */ + swap_strncpy(&ide->features[27*2+0], /* 27-46: model number */ "MAME Compressed Hard Disk", 20); ide->features[47*2+0] = 0x01; /* 47: read/write multiple support */ ide->features[47*2+1] = 0x80; diff --git a/src/emu/machine/idectrl.h b/src/emu/machine/idectrl.h index f9515ecc4e1..b67a5875f66 100644 --- a/src/emu/machine/idectrl.h +++ b/src/emu/machine/idectrl.h @@ -24,7 +24,7 @@ typedef struct _ide_config ide_config; struct _ide_config { - void (*interrupt)(const device_config *device, int state); + void (*interrupt)(const device_config *device, int state); const char *master; /* name of master region (defaults to device tag) */ const char *slave; /* name of slave region (defaults to NULL) */ const char *bmcpu; /* name of bus master CPU */ diff --git a/src/emu/machine/laserdsc.h b/src/emu/machine/laserdsc.h index 3d74571a3df..b2e7f29633d 100644 --- a/src/emu/machine/laserdsc.h +++ b/src/emu/machine/laserdsc.h @@ -225,4 +225,4 @@ int laserdisc_get_type(const device_config *device); void laserdisc_set_type(const device_config *device, int type); -#endif /* __LASERDSC_H__ */ +#endif /* __LASERDSC_H__ */ diff --git a/src/emu/machine/ldcore.c b/src/emu/machine/ldcore.c index 0e244362051..9a1d42d2514 100644 --- a/src/emu/machine/ldcore.c +++ b/src/emu/machine/ldcore.c @@ -1658,7 +1658,7 @@ DEVICE_GET_INFO( laserdisc ) /* --- the following bits of info are returned as pointers to data or functions --- */ case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(laserdisc); break; - case DEVINFO_FCT_STOP: info->stop = DEVICE_STOP_NAME(laserdisc); break; + case DEVINFO_FCT_STOP: info->stop = DEVICE_STOP_NAME(laserdisc); break; case DEVINFO_FCT_RESET: info->reset = DEVICE_RESET_NAME(laserdisc); break; /* --- the following bits of info are returned as NULL-terminated strings --- */ diff --git a/src/emu/machine/ldpr8210.c b/src/emu/machine/ldpr8210.c index 0ee447c87b6..47320671d72 100644 --- a/src/emu/machine/ldpr8210.c +++ b/src/emu/machine/ldpr8210.c @@ -112,8 +112,8 @@ struct _ldplayer_data attotime slowtrg; /* time of the last SLOW TRG */ pioneer_pia pia; /* PIA state */ UINT8 vsync; /* live VSYNC state */ - UINT8 port1; /* 8049 port 1 state */ - UINT8 port2; /* 8049 port 2 state */ + UINT8 port1; /* 8049 port 1 state */ + UINT8 port2; /* 8049 port 2 state */ /* Simutrek-specific data */ simutrek_data simutrek; /* Simutrek-specific data */ diff --git a/src/emu/machine/ldv1000.c b/src/emu/machine/ldv1000.c index 48fd46ab614..df074f9044d 100644 --- a/src/emu/machine/ldv1000.c +++ b/src/emu/machine/ldv1000.c @@ -65,7 +65,7 @@ struct _ldplayer_data /* I/O port states */ UINT8 counter_start; /* starting value for counter */ - UINT8 counter; /* current counter value */ + UINT8 counter; /* current counter value */ UINT8 portc0; /* port C on PPI 0 */ UINT8 portb1; /* port B on PPI 1 */ UINT8 portc1; /* port C on PPI 1 */ diff --git a/src/emu/machine/ldvp931.c b/src/emu/machine/ldvp931.c index a1a076744fa..05cd8ffdef0 100644 --- a/src/emu/machine/ldvp931.c +++ b/src/emu/machine/ldvp931.c @@ -50,7 +50,7 @@ struct _ldplayer_data /* low-level emulation data */ const device_config *cpu; /* CPU index of the 8049 */ const device_config *tracktimer; /* timer device */ - vp931_data_ready_func data_ready_cb; /* data ready callback */ + vp931_data_ready_func data_ready_cb; /* data ready callback */ /* I/O port states */ UINT8 out0; /* output 0 state */ diff --git a/src/emu/machine/roc10937.c b/src/emu/machine/roc10937.c index bd00d833247..62650a2e96c 100644 --- a/src/emu/machine/roc10937.c +++ b/src/emu/machine/roc10937.c @@ -218,7 +218,7 @@ UINT32 *ROC10937_set_outputs(int id) if ( ROC10937_get_segments(id)[val] & 0x0002 ) roc10937[id].outputs[cursor] |= 0x0002; else roc10937[id].outputs[cursor] &= ~0x0002; if ( ROC10937_get_segments(id)[val] & 0x0004 ) roc10937[id].outputs[cursor] |= 0x0004; - else roc10937[id].outputs[cursor] &= ~0x0004; + else roc10937[id].outputs[cursor] &= ~0x0004; if ( ROC10937_get_segments(id)[val] & 0x0008 ) roc10937[id].outputs[cursor] |= 0x0008; else roc10937[id].outputs[cursor] &= ~0x0008; if ( ROC10937_get_segments(id)[val] & 0x0010 ) roc10937[id].outputs[cursor] |= 0x0010; @@ -238,7 +238,7 @@ UINT32 *ROC10937_set_outputs(int id) if ( ROC10937_get_segments(id)[val] & 0x1000 ) roc10937[id].outputs[cursor] |= 0x0800; else roc10937[id].outputs[cursor] &= ~0x0800; if ( ROC10937_get_segments(id)[val] & 0x2000 ) roc10937[id].outputs[cursor] |= 0x1000; - else roc10937[id].outputs[cursor] &= ~0x1000; + else roc10937[id].outputs[cursor] &= ~0x1000; if ( ROC10937_get_segments(id)[val] & 0x8000 ) roc10937[id].outputs[cursor] |= 0x2000; else roc10937[id].outputs[cursor] &= ~0x2000; if ( ROC10937_get_segments(id)[val] & 0x0200 ) roc10937[id].outputs[cursor] |= 0x4000; diff --git a/src/emu/machine/roc10937.h b/src/emu/machine/roc10937.h index 9b7d8516787..75e092e90e9 100644 --- a/src/emu/machine/roc10937.h +++ b/src/emu/machine/roc10937.h @@ -11,7 +11,7 @@ #define MAX_ROCK_ALPHAS 3 // max number of displays emulated #define ROCKWELL10937 0 // Rockwell 10937 -#define MSC1937 0 // OKI MSC1937 clone of Rockwell 10937 +#define MSC1937 0 // OKI MSC1937 clone of Rockwell 10937 #define ROCKWELL10957 1 // Rockwell 10957 void ROC10937_init( int id, int type,int reversed ); // setup a display diff --git a/src/emu/machine/scsicd.c b/src/emu/machine/scsicd.c index bb1fef6e439..f169bfade5e 100644 --- a/src/emu/machine/scsicd.c +++ b/src/emu/machine/scsicd.c @@ -22,7 +22,7 @@ typedef struct UINT32 num_subblocks; UINT32 cur_subblock; UINT32 play_err_flag; - cdrom_file *cdrom; + cdrom_file *cdrom; } SCSICd; static void phys_frame_to_msf(int phys_frame, int *m, int *s, int *f) diff --git a/src/emu/machine/scsihd.c b/src/emu/machine/scsihd.c index dc69147bc4e..c098fe056de 100644 --- a/src/emu/machine/scsihd.c +++ b/src/emu/machine/scsihd.c @@ -17,7 +17,7 @@ typedef struct { UINT32 lba; UINT32 blocks; - hard_disk_file *disk; + hard_disk_file *disk; } SCSIHd; diff --git a/src/emu/machine/smc91c9x.c b/src/emu/machine/smc91c9x.c index dfaa13fcce6..8dab60f6271 100644 --- a/src/emu/machine/smc91c9x.c +++ b/src/emu/machine/smc91c9x.c @@ -123,7 +123,7 @@ struct _smc91c9x_state UINT8 alloc_count; /* transmit/receive FIFOs */ - UINT8 fifo_count; + UINT8 fifo_count; UINT8 rx[ETHER_BUFFER_SIZE * ETHER_RX_BUFFERS]; UINT8 tx[ETHER_BUFFER_SIZE]; diff --git a/src/emu/machine/timekpr.c b/src/emu/machine/timekpr.c index 2a7f8699ed6..67f4b8a0bf5 100644 --- a/src/emu/machine/timekpr.c +++ b/src/emu/machine/timekpr.c @@ -226,7 +226,7 @@ INLINE timekeeper_state *get_safe_token(const device_config *device) { assert(device != NULL); assert(device->token != NULL); - assert((device->type == M48T02) || + assert((device->type == M48T02) || (device->type == M48T35) || (device->type == M48T58) || (device->type == MK48T08)); @@ -484,7 +484,7 @@ DEVICE_GET_INFO( m48t02 ) /* --- the following bits of info are returned as pointers to data or functions --- */ case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(m48t02); break; - default: DEVICE_GET_INFO_CALL(timekeeper); break; + default: DEVICE_GET_INFO_CALL(timekeeper); break; } } @@ -498,7 +498,7 @@ DEVICE_GET_INFO( m48t35 ) /* --- the following bits of info are returned as pointers to data or functions --- */ case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(m48t35); break; - default: DEVICE_GET_INFO_CALL(timekeeper); break; + default: DEVICE_GET_INFO_CALL(timekeeper); break; } } @@ -512,7 +512,7 @@ DEVICE_GET_INFO( m48t58 ) /* --- the following bits of info are returned as pointers to data or functions --- */ case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(m48t58); break; - default: DEVICE_GET_INFO_CALL(timekeeper); break; + default: DEVICE_GET_INFO_CALL(timekeeper); break; } } @@ -526,6 +526,6 @@ DEVICE_GET_INFO( mk48t08 ) /* --- the following bits of info are returned as pointers to data or functions --- */ case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(mk48t08); break; - default: DEVICE_GET_INFO_CALL(timekeeper); break; + default: DEVICE_GET_INFO_CALL(timekeeper); break; } } diff --git a/src/emu/machine/z80ctc.c b/src/emu/machine/z80ctc.c index 4be12766a1e..bc869d6fba2 100644 --- a/src/emu/machine/z80ctc.c +++ b/src/emu/machine/z80ctc.c @@ -32,7 +32,7 @@ /* these are the bits of the incoming commands to the CTC */ #define INTERRUPT 0x80 -#define INTERRUPT_ON 0x80 +#define INTERRUPT_ON 0x80 #define INTERRUPT_OFF 0x00 #define MODE 0x40 @@ -78,10 +78,10 @@ struct _ctc_channel devcb_resolved_write_line zc; /* zero crossing callbacks */ UINT8 notimer; /* no timer masks */ - UINT16 mode; /* current mode */ - UINT16 tconst; /* time constant */ - UINT16 down; /* down counter (clock mode only) */ - UINT8 extclk; /* current signal from the external clock */ + UINT16 mode; /* current mode */ + UINT16 tconst; /* time constant */ + UINT16 down; /* down counter (clock mode only) */ + UINT8 extclk; /* current signal from the external clock */ emu_timer * timer; /* array of active timers */ UINT8 int_state; /* interrupt status (for daisy chain) */ }; diff --git a/src/emu/machine/z80dma.c b/src/emu/machine/z80dma.c index ef5b504cc32..a69a23d5433 100644 --- a/src/emu/machine/z80dma.c +++ b/src/emu/machine/z80dma.c @@ -107,13 +107,13 @@ struct _z80dma_t emu_timer *timer; - UINT16 regs[REGNUM(6,1)+1]; - UINT8 num_follow; + UINT16 regs[REGNUM(6,1)+1]; + UINT8 num_follow; UINT8 cur_follow; - UINT8 regs_follow[4]; + UINT8 regs_follow[4]; UINT8 read_num_follow; UINT8 read_cur_follow; - UINT8 read_regs_follow[7]; + UINT8 read_regs_follow[7]; UINT8 status; UINT8 dma_enabled; diff --git a/src/emu/mame.c b/src/emu/mame.c index d30196e0cd4..394a5a4281e 100644 --- a/src/emu/mame.c +++ b/src/emu/mame.c @@ -146,7 +146,7 @@ struct _mame_private callback_item * logerror_callback_list; /* load/save */ - void (*saveload_schedule_callback)(running_machine *); + void (*saveload_schedule_callback)(running_machine *); attotime saveload_schedule_time; /* list of memory regions, and a map for lookups */ @@ -1136,7 +1136,7 @@ static void fatalerror_common(running_machine *machine, int exitcode, const char /* longjmp back if we can; otherwise, exit */ if (machine != NULL && machine->mame_data != NULL && machine->mame_data->fatal_error_jmpbuf_valid) - longjmp(machine->mame_data->fatal_error_jmpbuf, exitcode); + longjmp(machine->mame_data->fatal_error_jmpbuf, exitcode); else exit(exitcode); } diff --git a/src/emu/mconfig.h b/src/emu/mconfig.h index 06d3c3b7648..7d9cb1faa1a 100644 --- a/src/emu/mconfig.h +++ b/src/emu/mconfig.h @@ -138,7 +138,7 @@ struct _machine_config video_start_func video_start; /* one-time video start callback */ video_reset_func video_reset; /* video reset callback */ video_eof_func video_eof; /* end-of-frame video callback */ - video_update_func video_update; /* video update callback */ + video_update_func video_update; /* video update callback */ sound_start_func sound_start; /* one-time sound start callback */ sound_reset_func sound_reset; /* sound reset callback */ diff --git a/src/emu/memory.c b/src/emu/memory.c index 4c3fdd1863a..0c254cd172d 100644 --- a/src/emu/memory.c +++ b/src/emu/memory.c @@ -265,7 +265,7 @@ struct _memory_block memory_block * next; /* next memory block in the list */ const address_space * space; /* which address space are we associated with? */ UINT8 isallocated; /* did we allocate this ourselves? */ - offs_t bytestart, byteend; /* byte-normalized start/end for verifying a match */ + offs_t bytestart, byteend; /* byte-normalized start/end for verifying a match */ UINT8 * data; /* pointer to the data for this block */ }; @@ -283,12 +283,12 @@ struct _bank_info { bank_info * next; /* next bank in sequence */ UINT8 index; /* array index for this handler */ - UINT8 read; /* is this bank used for reads? */ - UINT8 write; /* is this bank used for writes? */ + UINT8 read; /* is this bank used for reads? */ + UINT8 write; /* is this bank used for writes? */ void * handler; /* handler for this bank */ bank_reference * reflist; /* linked list of address spaces referencing this bank */ - offs_t bytestart; /* byte-adjusted start offset */ - offs_t byteend; /* byte-adjusted end offset */ + offs_t bytestart; /* byte-adjusted start offset */ + offs_t byteend; /* byte-adjusted end offset */ UINT16 curentry; /* current entry */ void * entry[MAX_BANK_ENTRIES];/* array of entries for this bank */ void * entryd[MAX_BANK_ENTRIES];/* array of decrypted entries for this bank */ @@ -300,7 +300,7 @@ struct _bank_info struct _direct_range { direct_range * next; /* pointer to the next range in the list */ - offs_t bytestart; /* starting byte offset of the range */ + offs_t bytestart; /* starting byte offset of the range */ offs_t byteend; /* ending byte offset of the range */ }; @@ -1436,10 +1436,10 @@ void _memory_install_port(const address_space *space, offs_t addrstart, offs_t a /* pick the appropriate read/write handlers */ switch (space->dbits) { - case 8: rhandler = (genf *)input_port_read8; whandler = (genf *)input_port_write8; break; - case 16: rhandler = (genf *)input_port_read16; whandler = (genf *)input_port_write16; break; - case 32: rhandler = (genf *)input_port_read32; whandler = (genf *)input_port_write32; break; - case 64: rhandler = (genf *)input_port_read64; whandler = (genf *)input_port_write64; break; + case 8: rhandler = (genf *)input_port_read8; whandler = (genf *)input_port_write8; break; + case 16: rhandler = (genf *)input_port_read16; whandler = (genf *)input_port_write16; break; + case 32: rhandler = (genf *)input_port_read32; whandler = (genf *)input_port_write32; break; + case 64: rhandler = (genf *)input_port_read64; whandler = (genf *)input_port_write64; break; } /* assign the read handler */ @@ -2175,7 +2175,7 @@ static void memory_init_locate(running_machine *machine) { memdata->bank_ptr[bank->index] = (UINT8 *)entry->memory; foundit = TRUE; - VPRINTF(("assigned bank '%s' pointer to memory from range %08X-%08X [%p]\n", bank->tag, entry->addrstart, entry->addrend, entry->memory)); + VPRINTF(("assigned bank '%s' pointer to memory from range %08X-%08X [%p]\n", bank->tag, entry->addrstart, entry->addrend, entry->memory)); break; } @@ -3484,8 +3484,8 @@ static address_map_entry *block_assign_intersecting(address_space *space, offs_t if (shareptr != UNMAPPED_SHARE_PTR) { entry->memory = shareptr; - VPRINTF(("memory range %08X-%08X -> shared_ptr '%s' [%p]\n", entry->addrstart, entry->addrend, entry->share, entry->memory)); - } + VPRINTF(("memory range %08X-%08X -> shared_ptr '%s' [%p]\n", entry->addrstart, entry->addrend, entry->share, entry->memory)); + } } /* otherwise, look for a match in this block */ diff --git a/src/emu/memory.h b/src/emu/memory.h index fc5b6df1d86..c589df2be45 100644 --- a/src/emu/memory.h +++ b/src/emu/memory.h @@ -109,7 +109,7 @@ struct _direct_read_data offs_t bytemask; /* byte address mask */ offs_t bytestart; /* minimum valid byte address */ offs_t byteend; /* maximum valid byte address */ - UINT8 entry; /* live entry */ + UINT8 entry; /* live entry */ direct_range * rangelist[256]; /* list of ranges for each entry */ direct_range * freerangelist; /* list of recycled range entries */ }; @@ -267,8 +267,8 @@ typedef struct _address_table address_table; struct _address_table { UINT8 * table; /* pointer to base of table */ - UINT8 subtable_alloc; /* number of subtables allocated */ - subtable_data * subtable; /* info about each subtable */ + UINT8 subtable_alloc; /* number of subtables allocated */ + subtable_data * subtable; /* info about each subtable */ handler_data * handlers[256]; /* array of user-installed handlers */ }; @@ -284,9 +284,9 @@ struct _address_space const char * name; /* friendly name of the address space */ UINT8 * readlookup; /* live lookup table for reads */ UINT8 * writelookup; /* live lookup table for writes */ - data_accessors accessors; /* data access handlers */ + data_accessors accessors; /* data access handlers */ direct_read_data direct; /* fast direct-access read info */ - direct_update_func directupdate; /* fast direct-access update callback */ + direct_update_func directupdate; /* fast direct-access update callback */ UINT64 unmap; /* unmapped value */ offs_t addrmask; /* physical address mask */ offs_t bytemask; /* byte-converted physical address mask */ @@ -296,7 +296,7 @@ struct _address_space UINT8 endianness; /* endianness of this space */ INT8 ashift; /* address shift */ UINT8 abits; /* address bits */ - UINT8 dbits; /* data bits */ + UINT8 dbits; /* data bits */ UINT8 addrchars; /* number of characters to use for physical addresses */ UINT8 logaddrchars; /* number of characters to use for logical addresses */ UINT8 debugger_access; /* treat accesses as coming from the debugger */ @@ -343,7 +343,7 @@ union _addrmap16_token TOKEN_COMMON_FIELDS const addrmap16_token * tokenptr; read16_space_func sread; /* pointer to native read handler */ - write16_space_func swrite; /* pointer to native write handler */ + write16_space_func swrite; /* pointer to native write handler */ read16_device_func dread; /* pointer to native device read handler */ write16_device_func dwrite; /* pointer to native device write handler */ read8_space_func sread8; /* pointer to 8-bit space read handler */ @@ -364,7 +364,7 @@ union _addrmap32_token TOKEN_COMMON_FIELDS const addrmap32_token * tokenptr; read32_space_func sread; /* pointer to native read handler */ - write32_space_func swrite; /* pointer to native write handler */ + write32_space_func swrite; /* pointer to native write handler */ read32_device_func dread; /* pointer to native device read handler */ write32_device_func dwrite; /* pointer to native device write handler */ read8_space_func sread8; /* pointer to 8-bit space read handler */ @@ -389,7 +389,7 @@ union _addrmap64_token TOKEN_COMMON_FIELDS const addrmap64_token * tokenptr; read64_space_func sread; /* pointer to native read handler */ - write64_space_func swrite; /* pointer to native write handler */ + write64_space_func swrite; /* pointer to native write handler */ read64_device_func dread; /* pointer to native device read handler */ write64_device_func dwrite; /* pointer to native device write handler */ read8_space_func sread8; /* pointer to 8-bit space read handler */ @@ -422,7 +422,7 @@ union _addrmap64_token /* space read/write handler function macros */ #define READ8_HANDLER(name) UINT8 name(ATTR_UNUSED const address_space *space, ATTR_UNUSED offs_t offset) -#define WRITE8_HANDLER(name) void name(ATTR_UNUSED const address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data) +#define WRITE8_HANDLER(name) void name(ATTR_UNUSED const address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data) #define READ16_HANDLER(name) UINT16 name(ATTR_UNUSED const address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask) #define WRITE16_HANDLER(name) void name(ATTR_UNUSED const address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask) #define READ32_HANDLER(name) UINT32 name(ATTR_UNUSED const address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask) @@ -432,7 +432,7 @@ union _addrmap64_token /* device read/write handler function macros */ -#define READ8_DEVICE_HANDLER(name) UINT8 name(ATTR_UNUSED const device_config *device, ATTR_UNUSED offs_t offset) +#define READ8_DEVICE_HANDLER(name) UINT8 name(ATTR_UNUSED const device_config *device, ATTR_UNUSED offs_t offset) #define WRITE8_DEVICE_HANDLER(name) void name(ATTR_UNUSED const device_config *device, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data) #define READ16_DEVICE_HANDLER(name) UINT16 name(ATTR_UNUSED const device_config *device, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask) #define WRITE16_DEVICE_HANDLER(name) void name(ATTR_UNUSED const device_config *device, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask) @@ -577,12 +577,12 @@ union _addrmap64_token #define BYTE8_XOR_LE(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(0,7)) /* read/write a word to a 64-bit space */ -#define WORD2_XOR_BE(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(6,0)) -#define WORD2_XOR_LE(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(0,6)) +#define WORD2_XOR_BE(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(6,0)) +#define WORD2_XOR_LE(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(0,6)) /* read/write a dword to a 64-bit space */ -#define DWORD_XOR_BE(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(4,0)) -#define DWORD_XOR_LE(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(0,4)) +#define DWORD_XOR_BE(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(4,0)) +#define DWORD_XOR_LE(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(0,4)) diff --git a/src/emu/profiler.h b/src/emu/profiler.h index bb8de392888..791e172d9f0 100644 --- a/src/emu/profiler.h +++ b/src/emu/profiler.h @@ -130,7 +130,7 @@ extern profiler_state global_profiler; #define profiler_mark_end() do { } while (0) #define profiler_start() do { } while (0) #define profiler_stop() do { } while (0) -#define profiler_get_text(x,s) astring_reset(s) +#define profiler_get_text(x,s) astring_reset(s) #endif diff --git a/src/emu/render.c b/src/emu/render.c index e2f7bf01bba..03866274206 100644 --- a/src/emu/render.c +++ b/src/emu/render.c @@ -3009,8 +3009,8 @@ void render_container_add_char(render_container *container, float x0, float y0, texture = render_font_get_char_texture_and_bounds(font, height, aspect, ch, &bounds); /* add it like a quad */ - item = render_container_item_add_generic(container, CONTAINER_ITEM_QUAD, bounds.x0, bounds.y0, bounds.x1, bounds.y1, argb); - item->texture = texture; + item = render_container_item_add_generic(container, CONTAINER_ITEM_QUAD, bounds.x0, bounds.y0, bounds.x1, bounds.y1, argb); + item->texture = texture; item->flags = PRIMFLAG_TEXORIENT(ROT0) | PRIMFLAG_BLENDMODE(BLENDMODE_ALPHA); item->internal = INTERNAL_FLAG_CHAR; } diff --git a/src/emu/restrack.h b/src/emu/restrack.h index 570291aa3a7..84fed6a37d8 100644 --- a/src/emu/restrack.h +++ b/src/emu/restrack.h @@ -61,7 +61,7 @@ INLINE int get_resource_tag(void) #define alloc_or_die(t) ((t *)malloc_or_die_file_line(sizeof(t), __FILE__, __LINE__)) #define alloc_clear_or_die(t) ((t *)memset(malloc_or_die_file_line(sizeof(t), __FILE__, __LINE__), 0, sizeof(t))) #define alloc_array_or_die(t, c) ((t *)malloc_or_die_file_line((c) * sizeof(t), __FILE__, __LINE__)) -#define alloc_array_clear_or_die(t, c) ((t *)memset(malloc_or_die_file_line((c) * sizeof(t), __FILE__, __LINE__), 0, (c) * sizeof(t))) +#define alloc_array_clear_or_die(t, c) ((t *)memset(malloc_or_die_file_line((c) * sizeof(t), __FILE__, __LINE__), 0, (c) * sizeof(t))) void *malloc_or_die_file_line(size_t size, const char *file, int line) ATTR_MALLOC; diff --git a/src/emu/romload.h b/src/emu/romload.h index 1bd923fba33..c10c11023eb 100644 --- a/src/emu/romload.h +++ b/src/emu/romload.h @@ -241,7 +241,7 @@ struct _rom_entry #define ROM_CONTINUE(offset,length) { NULL, NULL, offset, length, ROMENTRYTYPE_CONTINUE | ROM_INHERITFLAGS }, #define ROM_IGNORE(length) { NULL, NULL, 0, length, ROMENTRYTYPE_IGNORE | ROM_INHERITFLAGS }, #define ROM_FILL(offset,length,value) { NULL, (const char *)value, offset, length, ROMENTRYTYPE_FILL }, -#define ROM_COPY(srctag,srcoffs,offset,length) { srctag, (const char *)srcoffs, offset, length, ROMENTRYTYPE_COPY }, +#define ROM_COPY(srctag,srcoffs,offset,length) { srctag, (const char *)srcoffs, offset, length, ROMENTRYTYPE_COPY }, /* ----- system BIOS macros ----- */ diff --git a/src/emu/sound/aica.c b/src/emu/sound/aica.c index 0c34fe515e9..8757e3c891f 100644 --- a/src/emu/sound/aica.c +++ b/src/emu/sound/aica.c @@ -135,7 +135,7 @@ struct _SLOT #define MVOL(aica) ((aica->udata.data[0]>>0x0)&0x000F) #define RBL(aica) ((aica->udata.data[2]>>0xD)&0x0003) #define RBP(aica) ((aica->udata.data[2]>>0x0)&0x0fff) -#define MOFULL(aica) ((aica->udata.data[4]>>0x0)&0x1000) +#define MOFULL(aica) ((aica->udata.data[4]>>0x0)&0x1000) #define MOEMPTY(aica) ((aica->udata.data[4]>>0x0)&0x0800) #define MIOVF(aica) ((aica->udata.data[4]>>0x0)&0x0400) #define MIFULL(aica) ((aica->udata.data[4]>>0x0)&0x0200) @@ -401,7 +401,7 @@ static int EG_Update(struct _SLOT *slot) slot->EG.volume-=slot->EG.RR; if(slot->EG.volume<=0) { - slot->EG.volume=0; + slot->EG.volume=0; AICA_StopSlot(slot,0); // slot->EG.volume=0x17f<<EG_SHIFT; // slot->EG.state=ATTACK; @@ -990,7 +990,7 @@ static void AICA_TimersAddTicks(aica_state *AICA, int ticks) { if(AICA->TimCnt[0]<=0xff00) { - AICA->TimCnt[0] += ticks << (8-((AICA->udata.data[0x18/2]>>8)&0x7)); + AICA->TimCnt[0] += ticks << (8-((AICA->udata.data[0x18/2]>>8)&0x7)); if (AICA->TimCnt[0] > 0xFF00) { AICA->TimCnt[0] = 0xFFFF; @@ -1369,7 +1369,7 @@ DEVICE_GET_INFO( aica ) /* --- the following bits of info are returned as NULL-terminated strings --- */ case DEVINFO_STR_NAME: strcpy(info->s, "AICA"); break; case DEVINFO_STR_FAMILY: strcpy(info->s, "Sega/Yamaha custom"); break; - case DEVINFO_STR_VERSION: strcpy(info->s, "1.0.1"); break; + case DEVINFO_STR_VERSION: strcpy(info->s, "1.0.1"); break; case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break; case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break; } diff --git a/src/emu/sound/aicalfo.c b/src/emu/sound/aicalfo.c index d9e8b07f77b..a2ca1fedeb6 100644 --- a/src/emu/sound/aicalfo.c +++ b/src/emu/sound/aicalfo.c @@ -7,7 +7,7 @@ By ElSemi, kingshriek, Deunan Knute, and R. Belmont */ -#define LFO_SHIFT 8 +#define LFO_SHIFT 8 struct _LFO { @@ -20,7 +20,7 @@ struct _LFO #define LFIX(v) ((unsigned int) ((float) (1<<LFO_SHIFT)*(v))) //Convert DB to multiply amplitude -#define DB(v) LFIX(pow(10.0,v/20.0)) +#define DB(v) LFIX(pow(10.0,v/20.0)) //Convert cents to step increment #define CENTS(v) LFIX(pow(2.0,v/1200.0)) @@ -152,7 +152,7 @@ static void AICALFO_ComputeStep(struct _LFO *LFO,UINT32 LFOF,UINT32 LFOWS,UINT32 case 1: LFO->table=PLFO_SQR; break; case 2: LFO->table=PLFO_TRI; break; case 3: LFO->table=PLFO_NOI; break; - default: printf("Unknown PLFO %d\n", LFOWS); + default: printf("Unknown PLFO %d\n", LFOWS); } LFO->scale=PSCALES[LFOS]; } diff --git a/src/emu/sound/ay8910.c b/src/emu/sound/ay8910.c index 266203052b2..27cacd35899 100644 --- a/src/emu/sound/ay8910.c +++ b/src/emu/sound/ay8910.c @@ -648,7 +648,7 @@ static STREAM_UPDATE( ay8910_update ) /* if CountEnv has looped an odd number of times (usually 1), */ /* invert the output. */ if (psg->alternate && (psg->env_step & (psg->env_step_mask + 1))) - psg->attack ^= psg->env_step_mask; + psg->attack ^= psg->env_step_mask; psg->env_step &= psg->env_step_mask; } @@ -972,7 +972,7 @@ DEVICE_GET_INFO( ay8912 ) { case DEVINFO_FCT_START: info->start = DEVICE_START_NAME( ay8910 ); break; case DEVINFO_STR_NAME: strcpy(info->s, "AY-3-8912A"); break; - default: DEVICE_GET_INFO_CALL(ay8910); break; + default: DEVICE_GET_INFO_CALL(ay8910); break; } } @@ -982,7 +982,7 @@ DEVICE_GET_INFO( ay8913 ) { case DEVINFO_FCT_START: info->start = DEVICE_START_NAME( ay8910 ); break; case DEVINFO_STR_NAME: strcpy(info->s, "AY-3-8913A"); break; - default: DEVICE_GET_INFO_CALL(ay8910); break; + default: DEVICE_GET_INFO_CALL(ay8910); break; } } @@ -992,7 +992,7 @@ DEVICE_GET_INFO( ay8930 ) { case DEVINFO_FCT_START: info->start = DEVICE_START_NAME( ay8910 ); break; case DEVINFO_STR_NAME: strcpy(info->s, "AY8930"); break; - default: DEVICE_GET_INFO_CALL(ay8910); break; + default: DEVICE_GET_INFO_CALL(ay8910); break; } } @@ -1002,7 +1002,7 @@ DEVICE_GET_INFO( ym2149 ) { case DEVINFO_FCT_START: info->start = DEVICE_START_NAME( ym2149 ); break; case DEVINFO_STR_NAME: strcpy(info->s, "YM2149"); break; - default: DEVICE_GET_INFO_CALL(ay8910); break; + default: DEVICE_GET_INFO_CALL(ay8910); break; } } @@ -1012,7 +1012,7 @@ DEVICE_GET_INFO( ym3439 ) { case DEVINFO_FCT_START: info->start = DEVICE_START_NAME( ym2149 ); break; case DEVINFO_STR_NAME: strcpy(info->s, "YM3439"); break; - default: DEVICE_GET_INFO_CALL(ay8910); break; + default: DEVICE_GET_INFO_CALL(ay8910); break; } } @@ -1022,7 +1022,7 @@ DEVICE_GET_INFO( ymz284 ) { case DEVINFO_FCT_START: info->start = DEVICE_START_NAME( ym2149 ); break; case DEVINFO_STR_NAME: strcpy(info->s, "YMZ284"); break; - default: DEVICE_GET_INFO_CALL(ay8910); break; + default: DEVICE_GET_INFO_CALL(ay8910); break; } } @@ -1032,7 +1032,7 @@ DEVICE_GET_INFO( ymz294 ) { case DEVINFO_FCT_START: info->start = DEVICE_START_NAME( ym2149 ); break; case DEVINFO_STR_NAME: strcpy(info->s, "YMZ294"); break; - default: DEVICE_GET_INFO_CALL(ay8910); break; + default: DEVICE_GET_INFO_CALL(ay8910); break; } } diff --git a/src/emu/sound/ay8910.h b/src/emu/sound/ay8910.h index b6e49f8a3e3..13c615a255a 100644 --- a/src/emu/sound/ay8910.h +++ b/src/emu/sound/ay8910.h @@ -67,7 +67,7 @@ typedef struct _ay8910_interface ay8910_interface; struct _ay8910_interface { int flags; /* Flags */ - int res_load[3]; /* Load on channel in ohms */ + int res_load[3]; /* Load on channel in ohms */ devcb_read8 portAread; devcb_read8 portBread; devcb_write8 portAwrite; diff --git a/src/emu/sound/beep.c b/src/emu/sound/beep.c index e320f39d845..d5479f05366 100644 --- a/src/emu/sound/beep.c +++ b/src/emu/sound/beep.c @@ -21,7 +21,7 @@ typedef struct _beep_state beep_state; struct _beep_state { - sound_stream *stream; /* stream number */ + sound_stream *stream; /* stream number */ int enable; /* enable beep */ int frequency; /* set frequency - this can be changed using the appropiate function */ int incr; /* initial wave state */ diff --git a/src/emu/sound/c352.c b/src/emu/sound/c352.c index 93344471a03..ce63816c7df 100644 --- a/src/emu/sound/c352.c +++ b/src/emu/sound/c352.c @@ -29,7 +29,7 @@ enum { C352_FLG_KEYOFF = 0x2000, // Keyoff C352_FLG_LOOPTRG = 0x1000, // Loop Trigger C352_FLG_LOOPHIST = 0x0800, // Loop History - C352_FLG_FM = 0x0400, // Frequency Modulation + C352_FLG_FM = 0x0400, // Frequency Modulation C352_FLG_PHASERL = 0x0200, // Rear Left invert phase 180 degrees C352_FLG_PHASEFL = 0x0100, // Front Left invert phase 180 degrees C352_FLG_PHASEFR = 0x0080, // invert phase 180 degrees (e.g. flip sign of sample) @@ -101,7 +101,7 @@ static int get_mseq_bit(c352_state *info) if (bit) { - reg = ((reg ^ mask) << 1) | 1; + reg = ((reg ^ mask) << 1) | 1; } else { diff --git a/src/emu/sound/disc_flt.c b/src/emu/sound/disc_flt.c index 4b8ff1bf7e3..54007a962a3 100644 --- a/src/emu/sound/disc_flt.c +++ b/src/emu/sound/disc_flt.c @@ -117,8 +117,8 @@ struct dst_rcfilter_sw_context { double vCap[4]; double exp[4]; - double exp0; /* fast case bit 0 */ - double exp1; /* fast case bit 1 */ + double exp0; /* fast case bit 0 */ + double exp1; /* fast case bit 1 */ double factor; /* fast case */ double f1[16]; double f2[16]; diff --git a/src/emu/sound/disc_inp.c b/src/emu/sound/disc_inp.c index aa3ac08e595..5ae665afc1f 100644 --- a/src/emu/sound/disc_inp.c +++ b/src/emu/sound/disc_inp.c @@ -34,7 +34,7 @@ struct dss_adjustment_context struct dss_input_context { stream_sample_t *ptr; /* current in ptr for stream */ - double gain; /* node gain */ + double gain; /* node gain */ double offset; /* node offset */ UINT8 data; /* data written */ UINT8 is_stream; diff --git a/src/emu/sound/disc_mth.c b/src/emu/sound/disc_mth.c index b37b9b4e537..afffb97152b 100644 --- a/src/emu/sound/disc_mth.c +++ b/src/emu/sound/disc_mth.c @@ -853,8 +853,8 @@ static DISCRETE_RESET(dst_logic_ff) #define DST_LOGIC_JKFF__RESET !DISCRETE_INPUT(0) #define DST_LOGIC_JKFF__SET !DISCRETE_INPUT(1) #define DST_LOGIC_JKFF__CLOCK DISCRETE_INPUT(2) -#define DST_LOGIC_JKFF__J DISCRETE_INPUT(3) -#define DST_LOGIC_JKFF__K DISCRETE_INPUT(4) +#define DST_LOGIC_JKFF__J DISCRETE_INPUT(3) +#define DST_LOGIC_JKFF__K DISCRETE_INPUT(4) static DISCRETE_STEP(dst_logic_jkff) { @@ -1466,10 +1466,10 @@ static DISCRETE_RESET(dst_oneshot) context->countdown = 0; context->state = 0; - context->last_trig = 0; - context->type = DST_ONESHOT__TYPE; + context->last_trig = 0; + context->type = DST_ONESHOT__TYPE; - node->output[0] = (context->type & DISC_OUT_ACTIVE_LOW) ? DST_ONESHOT__AMP : 0; + node->output[0] = (context->type & DISC_OUT_ACTIVE_LOW) ? DST_ONESHOT__AMP : 0; } @@ -2011,7 +2011,7 @@ static DISCRETE_STEP(dst_tvca_op_amp) * So now the discharge rate is dependent upon F3. * If F3 is at ground then we discharge to 0V through r6. * If F3 is out of circuit then we discharge to OP_AMP_NORTON_VBE through r6+r7. */ - context->v_cap1 += ((f3 ? OP_AMP_NORTON_VBE : 0.0) - context->v_cap1) * context->exponent_d[f3]; + context->v_cap1 += ((f3 ? OP_AMP_NORTON_VBE : 0.0) - context->v_cap1) * context->exponent_d[f3]; } /* Calculate c1 current going in to + input. */ diff --git a/src/emu/sound/disc_wav.c b/src/emu/sound/disc_wav.c index e68686772d5..9c54c0c5357 100644 --- a/src/emu/sound/disc_wav.c +++ b/src/emu/sound/disc_wav.c @@ -1690,7 +1690,7 @@ INLINE double dss_inverter_tftab(const node_description *node, double x) x = x / info->vB; if (x > 0) - return info->vB * exp(-context->tf_a * pow(x, context->tf_b)); + return info->vB * exp(-context->tf_a * pow(x, context->tf_b)); else return info->vB; } diff --git a/src/emu/sound/discrete.c b/src/emu/sound/discrete.c index cc4e8fe4700..00dd4c16dc3 100644 --- a/src/emu/sound/discrete.c +++ b/src/emu/sound/discrete.c @@ -680,7 +680,7 @@ static void *task_callback(void *param, int threadid) { for (entry = list; entry != 0; entry = entry->next) { - discrete_task *task = (discrete_task *) entry->ptr; + discrete_task *task = (discrete_task *) entry->ptr; INT32 prev_id; /* try to lock */ @@ -763,7 +763,7 @@ static STREAM_UPDATE( discrete_stream_update ) /* Setup tasks */ for (entry = info->task_list; entry != 0; entry = entry->next) { - discrete_task *task = (discrete_task *) entry->ptr; + discrete_task *task = (discrete_task *) entry->ptr; linked_list_entry *src_entry; int i; diff --git a/src/emu/sound/discrete.h b/src/emu/sound/discrete.h index dc66cb3e621..2b82c992885 100644 --- a/src/emu/sound/discrete.h +++ b/src/emu/sound/discrete.h @@ -3453,22 +3453,22 @@ * *************************************/ -#define DISCRETE_STEP_NAME( _func ) _func ## _step +#define DISCRETE_STEP_NAME( _func ) _func ## _step #define DISCRETE_RESET_NAME( _func ) _func ## _reset -#define DISCRETE_START_NAME( _func ) _func ## _start -#define DISCRETE_STOP_NAME( _func ) _func ## _stop +#define DISCRETE_START_NAME( _func ) _func ## _start +#define DISCRETE_STOP_NAME( _func ) _func ## _stop -#define DISCRETE_FUNC(_func) void _func (node_description *node) +#define DISCRETE_FUNC(_func) void _func (node_description *node) -#define DISCRETE_STEP(_func) DISCRETE_FUNC(DISCRETE_STEP_NAME(_func)) -#define DISCRETE_RESET(_func) DISCRETE_FUNC(DISCRETE_RESET_NAME(_func)) -#define DISCRETE_START(_func) DISCRETE_FUNC(DISCRETE_START_NAME(_func)) -#define DISCRETE_STOP(_func) DISCRETE_FUNC(DISCRETE_STOP_NAME(_func)) +#define DISCRETE_STEP(_func) DISCRETE_FUNC(DISCRETE_STEP_NAME(_func)) +#define DISCRETE_RESET(_func) DISCRETE_FUNC(DISCRETE_RESET_NAME(_func)) +#define DISCRETE_START(_func) DISCRETE_FUNC(DISCRETE_START_NAME(_func)) +#define DISCRETE_STOP(_func) DISCRETE_FUNC(DISCRETE_STOP_NAME(_func)) -#define DISCRETE_STEP_CALL(_func) DISCRETE_STEP_NAME(_func) (node) -#define DISCRETE_RESET_CALL(_func) DISCRETE_RESET_NAME(_func) (node) -#define DISCRETE_START_CALL(_func) DISCRETE_START_NAME(_func) (node) -#define DISCRETE_STOP_CALL(_func) DISCRETE_STOP_NAME(_func) (node) +#define DISCRETE_STEP_CALL(_func) DISCRETE_STEP_NAME(_func) (node) +#define DISCRETE_RESET_CALL(_func) DISCRETE_RESET_NAME(_func) (node) +#define DISCRETE_START_CALL(_func) DISCRETE_START_NAME(_func) (node) +#define DISCRETE_STOP_CALL(_func) DISCRETE_STOP_NAME(_func) (node) #define DISCRETE_CUSTOM_MODULE(_basename, _context_type) \ { DST_CUSTOM, "CUSTOM", 1, sizeof(_context_type), DISCRETE_RESET_NAME(_basename), DISCRETE_STEP_NAME(_basename) } @@ -3483,7 +3483,7 @@ #define DISCRETE_MAX_NODES 300 #define DISCRETE_MAX_INPUTS 10 -#define DISCRETE_MAX_OUTPUTS 8 +#define DISCRETE_MAX_OUTPUTS 8 #define DISCRETE_MAX_TASK_OUTPUTS 8 #define DISCRETE_MAX_TASK_GROUPS 10 @@ -3566,7 +3566,7 @@ /* Mixer types */ #define DISC_MIXER_IS_RESISTOR 0 #define DISC_MIXER_IS_OP_AMP 1 -#define DISC_MIXER_IS_OP_AMP_WITH_RI 2 /* Used only internally. Use DISC_MIXER_IS_OP_AMP */ +#define DISC_MIXER_IS_OP_AMP_WITH_RI 2 /* Used only internally. Use DISC_MIXER_IS_OP_AMP */ /* Triggered Op Amp Functions */ enum @@ -3790,8 +3790,8 @@ struct _node_description typedef struct _linked_list_entry linked_list_entry; struct _linked_list_entry { - linked_list_entry *next; - const void *ptr; + linked_list_entry *next; + const void *ptr; }; typedef struct _discrete_task discrete_task; @@ -3808,7 +3808,7 @@ struct _discrete_task int task_group; int numbuffered; double *ptr[DISCRETE_MAX_TASK_OUTPUTS]; - const double *source[DISCRETE_MAX_TASK_OUTPUTS]; + const double *source[DISCRETE_MAX_TASK_OUTPUTS]; double *node_buf[DISCRETE_MAX_TASK_OUTPUTS]; const node_description *nodes[DISCRETE_MAX_TASK_OUTPUTS]; @@ -3845,23 +3845,23 @@ struct _discrete_info linked_list_entry *task_list; /* discrete_task_context * */ /* the input streams */ - linked_list_entry *input_list; + linked_list_entry *input_list; /* output node tracking */ - linked_list_entry *output_list; + linked_list_entry *output_list; /* the output stream */ - sound_stream *discrete_stream; + sound_stream *discrete_stream; /* debugging statistics */ - FILE *disclogfile; + FILE *disclogfile; /* parallel tasks */ - osd_work_queue *queue; + osd_work_queue *queue; /* profiling */ - UINT64 total_samples; - UINT64 total_stream_updates; + UINT64 total_samples; + UINT64 total_stream_updates; }; @@ -3912,7 +3912,7 @@ struct _discrete_op_amp_osc_info #define DEFAULT_7414_VALUES 1.7, 0.9, 3.4 -#define DEFAULT_74LS14_VALUES 1.6, 0.8, 3.4 +#define DEFAULT_74LS14_VALUES 1.6, 0.8, 3.4 typedef struct _discrete_schmitt_osc_desc discrete_schmitt_osc_desc; struct _discrete_schmitt_osc_desc @@ -4122,7 +4122,7 @@ struct _discrete_custom_info // Taken from the transfer characteristerics diagram in CD4049UB datasheet (TI) // There is no default trigger point and vI-vO is a continuous function -#define DEFAULT_CD40XX_VALUES(_vB) (_vB),(_vB)*0.02,(_vB)*0.98,(_vB)/5.0*1.5,(_vB)/5.0*3.5, 0.1 +#define DEFAULT_CD40XX_VALUES(_vB) (_vB),(_vB)*0.02,(_vB)*0.98,(_vB)/5.0*1.5,(_vB)/5.0*3.5, 0.1 #define DISC_OSC_INVERTER_IS_TYPE1 0x00 #define DISC_OSC_INVERTER_IS_TYPE2 0x01 @@ -4141,7 +4141,7 @@ struct _discrete_inverter_osc_desc double vOutHigh; double vInFall; // voltage that triggers the gate input to go low (0V) on fall double vInRise; // voltage that triggers the gate input to go high (vGate) on rise - double clamp; // voltage is clamped to -clamp ... vb+clamp if clamp>= 0; + double clamp; // voltage is clamped to -clamp ... vb+clamp if clamp>= 0; int options; // bitmaped options }; diff --git a/src/emu/sound/es5503.c b/src/emu/sound/es5503.c index 2ea4d7b5c53..a8dbc7794ca 100644 --- a/src/emu/sound/es5503.c +++ b/src/emu/sound/es5503.c @@ -292,7 +292,7 @@ READ8_DEVICE_HANDLER( es5503_r ) case 0: // freq lo return (chip->oscillators[osc].freq & 0xff); - case 0x20: // freq hi + case 0x20: // freq hi return (chip->oscillators[osc].freq >> 8); case 0x40: // volume @@ -394,7 +394,7 @@ WRITE8_DEVICE_HANDLER( es5503_w ) chip->oscillators[osc].freq |= data; break; - case 0x20: // freq hi + case 0x20: // freq hi chip->oscillators[osc].freq &= 0x00ff; chip->oscillators[osc].freq |= (data<<8); break; @@ -528,7 +528,7 @@ DEVICE_GET_INFO( es5503 ) case DEVINFO_STR_FAMILY: strcpy(info->s, "Ensoniq ES550x"); break; case DEVINFO_STR_VERSION: strcpy(info->s, "1.0"); break; case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break; - case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright R. Belmont"); break; + case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright R. Belmont"); break; } } diff --git a/src/emu/sound/es5506.c b/src/emu/sound/es5506.c index 3d650a68dfb..288260bc8a3 100644 --- a/src/emu/sound/es5506.c +++ b/src/emu/sound/es5506.c @@ -95,7 +95,7 @@ struct _es5506_voice /* internal state */ UINT8 index; /* index of this voice */ UINT8 filtcount; /* filter count */ - UINT32 accum_mask; + UINT32 accum_mask; }; typedef struct _es5506_state es5506_state; @@ -104,13 +104,13 @@ struct _es5506_state sound_stream *stream; /* which stream are we using */ int sample_rate; /* current sample rate */ UINT16 * region_base[4]; /* pointer to the base of the region */ - UINT32 write_latch; /* currently accumulated data for write */ - UINT32 read_latch; /* currently accumulated data for read */ - UINT32 master_clock; /* master clock frequency */ - void (*irq_callback)(const device_config *, int); /* IRQ callback */ + UINT32 write_latch; /* currently accumulated data for write */ + UINT32 read_latch; /* currently accumulated data for read */ + UINT32 master_clock; /* master clock frequency */ + void (*irq_callback)(const device_config *, int); /* IRQ callback */ UINT16 (*port_read)(void); /* input port read */ - UINT8 current_page; /* current register page */ + UINT8 current_page; /* current register page */ UINT8 active_voices; /* number of active voices */ UINT8 mode; /* MODE register */ UINT8 wst; /* W_ST register */ @@ -234,7 +234,7 @@ static void compute_tables(es5506_state *chip) ***********************************************************************************************/ #define interpolate(sample1, sample2, accum) \ - (sample1 * (INT32)(0x800 - (accum & 0x7ff)) + \ + (sample1 * (INT32)(0x800 - (accum & 0x7ff)) + \ sample2 * (INT32)(accum & 0x7ff)) >> 11; diff --git a/src/emu/sound/fm.c b/src/emu/sound/fm.c index 7a22562d438..5c5084024e3 100644 --- a/src/emu/sound/fm.c +++ b/src/emu/sound/fm.c @@ -2419,10 +2419,10 @@ typedef struct const UINT8 *pcmbuf; /* pcm rom buffer */ UINT32 pcm_size; /* size of pcm rom */ UINT8 adpcmTL; /* adpcmA total level */ - ADPCM_CH adpcm[6]; /* adpcm channels */ + ADPCM_CH adpcm[6]; /* adpcm channels */ UINT32 adpcmreg[0x30]; /* registers */ UINT8 adpcm_arrivedEndAddress; - YM_DELTAT deltaT; /* Delta-T ADPCM unit */ + YM_DELTAT deltaT; /* Delta-T ADPCM unit */ UINT8 flagmask; /* YM2608 only */ UINT8 irqmask; /* YM2608 only */ @@ -3672,7 +3672,7 @@ int ym2608_write(void *chip, int a,UINT8 v) case 0x20: /* Mode Register */ switch(addr) { - case 0x29: /* SCH,xx,xxx,EN_ZERO,EN_BRDY,EN_EOS,EN_TB,EN_TA */ + case 0x29: /* SCH,xx,xxx,EN_ZERO,EN_BRDY,EN_EOS,EN_TB,EN_TA */ YM2608IRQMaskWrite(OPN, F2608, v); break; default: diff --git a/src/emu/sound/fm.h b/src/emu/sound/fm.h index fda70b29f3e..5ae7aa3cef6 100644 --- a/src/emu/sound/fm.h +++ b/src/emu/sound/fm.h @@ -40,10 +40,10 @@ struct _ssg_callbacks /* --- external callback funstions for realtime update --- */ #if FM_BUSY_FLAG_SUPPORT -#define TIME_TYPE attotime +#define TIME_TYPE attotime #define UNDEFINED_TIME attotime_zero -#define FM_GET_TIME_NOW(machine) timer_get_time(machine) -#define ADD_TIMES(t1, t2) attotime_add((t1), (t2)) +#define FM_GET_TIME_NOW(machine) timer_get_time(machine) +#define ADD_TIMES(t1, t2) attotime_add((t1), (t2)) #define COMPARE_TIMES(t1, t2) attotime_compare((t1), (t2)) #define MULTIPLY_TIME_BY_INT(t,i) attotime_mul(t, i) #endif diff --git a/src/emu/sound/fm2612.c b/src/emu/sound/fm2612.c index 0a08994716f..ca1a2bced34 100644 --- a/src/emu/sound/fm2612.c +++ b/src/emu/sound/fm2612.c @@ -648,8 +648,8 @@ typedef struct #if FM_BUSY_FLAG_SUPPORT TIME_TYPE busy_expiry_time; /* expiry time of the busy status */ #endif - UINT32 clock; /* master clock (Hz) */ - UINT32 rate; /* sampling rate (Hz) */ + UINT32 clock; /* master clock (Hz) */ + UINT32 rate; /* sampling rate (Hz) */ UINT16 address; /* address register */ UINT8 status; /* status flag */ UINT32 mode; /* mode CSM / 3SLOT */ @@ -1442,7 +1442,7 @@ static void update_ssg_eg_channel(FM_SLOT *SLOT) { /* set inversion flag */ if (SLOT->ssg & 0x02) - SLOT->ssgn = 4; + SLOT->ssgn = 4; /* force attenuation level during decay phases */ if ((SLOT->state != EG_ATT) && !(SLOT->ssgn ^ (SLOT->ssg & 0x04))) @@ -2010,7 +2010,7 @@ static void OPNWriteMode(FM_OPN *OPN, int r, int v) } else { - OPN->lfo_inc = 0; + OPN->lfo_inc = 0; } break; case 0x24: /* timer A High 8*/ diff --git a/src/emu/sound/fmopl.c b/src/emu/sound/fmopl.c index 951114f9ca7..90dc292ca9a 100644 --- a/src/emu/sound/fmopl.c +++ b/src/emu/sound/fmopl.c @@ -1538,9 +1538,9 @@ static void OPLWriteReg(FM_OPL *OPL, int r, int v) case 0x0d: /* PRESCALE */ case 0x0e: case 0x0f: /* ADPCM data write */ - case 0x10: /* DELTA-N */ - case 0x11: /* DELTA-N */ - case 0x12: /* ADPCM volume */ + case 0x10: /* DELTA-N */ + case 0x11: /* DELTA-N */ + case 0x12: /* ADPCM volume */ if(OPL->type&OPL_TYPE_ADPCM) YM_DELTAT_ADPCM_Write(OPL->deltat,r-0x07,v); break; diff --git a/src/emu/sound/gaelco.c b/src/emu/sound/gaelco.c index 5021a29b605..3cde4ba0c8a 100644 --- a/src/emu/sound/gaelco.c +++ b/src/emu/sound/gaelco.c @@ -48,7 +48,7 @@ Registers per channel: //#define ALT_MIX #define GAELCO_NUM_CHANNELS 0x07 -#define VOLUME_LEVELS 0x10 +#define VOLUME_LEVELS 0x10 UINT16 *gaelco_sndregs; diff --git a/src/emu/sound/hc55516.c b/src/emu/sound/hc55516.c index 93e6ede932e..99242a30b9e 100644 --- a/src/emu/sound/hc55516.c +++ b/src/emu/sound/hc55516.c @@ -41,7 +41,7 @@ struct _hc55516_state UINT32 update_count; - double filter; + double filter; double integrator; }; @@ -331,7 +331,7 @@ DEVICE_GET_INFO( mc3417 ) case DEVINFO_FCT_START: info->start = DEVICE_START_NAME( mc3417 ); break; case DEVINFO_FCT_RESET: /* chip has no reset pin */ break; case DEVINFO_STR_NAME: strcpy(info->s, "MC3417"); break; - default: DEVICE_GET_INFO_CALL(hc55516); break; + default: DEVICE_GET_INFO_CALL(hc55516); break; } } @@ -343,6 +343,6 @@ DEVICE_GET_INFO( mc3418 ) case DEVINFO_FCT_START: info->start = DEVICE_START_NAME( mc3418 ); break; case DEVINFO_FCT_RESET: /* chip has no reset pin */ break; case DEVINFO_STR_NAME: strcpy(info->s, "MC3418"); break; - default: DEVICE_GET_INFO_CALL(hc55516); break; + default: DEVICE_GET_INFO_CALL(hc55516); break; } } diff --git a/src/emu/sound/k005289.c b/src/emu/sound/k005289.c index cb5acc9098f..35b0c8ee362 100644 --- a/src/emu/sound/k005289.c +++ b/src/emu/sound/k005289.c @@ -196,7 +196,7 @@ static void k005289_recompute(k005289_state *info) { k005289_sound_channel *voice = info->channel_list; - stream_update(info->stream); /* update the streams */ + stream_update(info->stream); /* update the streams */ voice[0].frequency = info->k005289_A_frequency; voice[1].frequency = info->k005289_B_frequency; diff --git a/src/emu/sound/k007232.c b/src/emu/sound/k007232.c index e8299225f73..903809028c3 100644 --- a/src/emu/sound/k007232.c +++ b/src/emu/sound/k007232.c @@ -41,15 +41,15 @@ typedef struct kdacApcm UINT32 bank[KDAC_A_PCM_MAX]; int play[KDAC_A_PCM_MAX]; - UINT8 wreg[0x10]; /* write data */ + UINT8 wreg[0x10]; /* write data */ UINT8 * pcmbuf[2]; /* Channel A & B pointers */ UINT32 clock; /* chip clock */ UINT32 pcmlimit; - sound_stream * stream; + sound_stream * stream; const k007232_interface *intf; - UINT32 fncode[0x200]; + UINT32 fncode[0x200]; } KDAC_A_PCM; diff --git a/src/emu/sound/msm5232.c b/src/emu/sound/msm5232.c index 96d5c26c7ad..4e9e75eecd6 100644 --- a/src/emu/sound/msm5232.c +++ b/src/emu/sound/msm5232.c @@ -159,7 +159,7 @@ static FILE *sample[9]; */ -#define R51 1400 /* charge resistance */ +#define R51 1400 /* charge resistance */ #define R52 28750 /* discharge resistance */ #if 0 diff --git a/src/emu/sound/multipcm.c b/src/emu/sound/multipcm.c index fefb043b952..4d554ca2bd7 100644 --- a/src/emu/sound/multipcm.c +++ b/src/emu/sound/multipcm.c @@ -37,7 +37,7 @@ #include "multipcm.h" //???? -#define MULTIPCM_CLOCKDIV (180.0) +#define MULTIPCM_CLOCKDIV (180.0) struct _Sample { @@ -227,13 +227,13 @@ static void EG_Calc(MultiPCM *ptChip,struct _SLOT *slot) LFO SECTION *****************************/ -#define LFO_SHIFT 8 +#define LFO_SHIFT 8 #define LFIX(v) ((unsigned int) ((float) (1<<LFO_SHIFT)*(v))) //Convert DB to multiply amplitude -#define DB(v) LFIX(pow(10.0,v/20.0)) +#define DB(v) LFIX(pow(10.0,v/20.0)) //Convert cents to step increment #define CENTS(v) LFIX(pow(2.0,v/1200.0)) diff --git a/src/emu/sound/namco.c b/src/emu/sound/namco.c index 3070b670080..6d4ae62be26 100644 --- a/src/emu/sound/namco.c +++ b/src/emu/sound/namco.c @@ -219,7 +219,7 @@ static STREAM_UPDATE( namco_update_mono ) continue; } - hold = hold_time; + hold = hold_time; c += delta; cnt = (c >> 12); @@ -311,7 +311,7 @@ static STREAM_UPDATE( namco_update_stereo ) continue; } - hold = hold_time; + hold = hold_time; c += delta; cnt = (c >> 12); diff --git a/src/emu/sound/nes_apu.c b/src/emu/sound/nes_apu.c index 9956dd4b343..b2f9d983244 100644 --- a/src/emu/sound/nes_apu.c +++ b/src/emu/sound/nes_apu.c @@ -638,7 +638,7 @@ INLINE void apu_update(nesapu_state *info, stream_sample_t *buffer16, int sample INLINE uint8 apu_read(nesapu_state *info,int address) { if (address == 0x15) /*FIXED* Address $4015 has different behaviour*/ - { + { int readval = 0; if (info->APU.squ[0].vbl_length > 0) readval |= 0x01; @@ -652,10 +652,10 @@ INLINE uint8 apu_read(nesapu_state *info,int address) if (info->APU.noi.vbl_length > 0) readval |= 0x08; - if (info->APU.dpcm.enabled == TRUE) + if (info->APU.dpcm.enabled == TRUE) readval |= 0x10; - if (info->APU.dpcm.irq_occurred == TRUE) + if (info->APU.dpcm.irq_occurred == TRUE) readval |= 0x80; return readval; diff --git a/src/emu/sound/okim6258.h b/src/emu/sound/okim6258.h index 286741e0590..d949f160bba 100644 --- a/src/emu/sound/okim6258.h +++ b/src/emu/sound/okim6258.h @@ -18,7 +18,7 @@ struct _okim6258_interface #define FOSC_DIV_BY_768 1 #define FOSC_DIV_BY_512 2 -#define TYPE_3BITS 0 +#define TYPE_3BITS 0 #define TYPE_4BITS 1 #define OUTPUT_10BITS 0 diff --git a/src/emu/sound/pokey.c b/src/emu/sound/pokey.c index 0644b08ac3b..e4e9a10fd7b 100644 --- a/src/emu/sound/pokey.c +++ b/src/emu/sound/pokey.c @@ -178,7 +178,7 @@ struct _pokey_state UINT32 clockmult; /* clock multiplier */ const device_config *device; sound_stream * channel; /* streams channel */ - emu_timer *timer[3]; /* timers for channel 1,2 and 4 events */ + emu_timer *timer[3]; /* timers for channel 1,2 and 4 events */ attotime timer_period[3]; /* computed periods for these timers */ int timer_param[3]; /* computed parameters for these timers */ emu_timer *rtimer; /* timer for calculating the random offset */ @@ -248,9 +248,9 @@ static TIMER_CALLBACK( pokey_pot_trigger ); chip->p4 = (chip->p4+chip->polyadjust)%0x0000f; \ chip->p5 = (chip->p5+chip->polyadjust)%0x0001f; \ chip->p9 = (chip->p9+chip->polyadjust)%0x001ff; \ - chip->p17 = (chip->p17+chip->polyadjust)%0x1ffff; \ - chip->polyadjust = 0; \ - if( (chip->AUDC[ch] & NOTPOLY5) || P5(chip) ) \ + chip->p17 = (chip->p17+chip->polyadjust)%0x1ffff; \ + chip->polyadjust = 0; \ + if( (chip->AUDC[ch] & NOTPOLY5) || P5(chip) ) \ { \ if( chip->AUDC[ch] & PURE ) \ toggle = 1; \ @@ -275,7 +275,7 @@ static TIMER_CALLBACK( pokey_pot_trigger ); chip->output[ch] ^= 1; \ } \ /* is this a filtering channel (3/4) and is the filter active? */ \ - if( chip->AUDCTL & ((CH1_FILTER|CH2_FILTER) & (0x10 >> ch)) ) \ + if( chip->AUDCTL & ((CH1_FILTER|CH2_FILTER) & (0x10 >> ch)) ) \ { \ if( chip->output[ch-2] ) \ { \ @@ -295,9 +295,9 @@ static TIMER_CALLBACK( pokey_pot_trigger ); chip->p4 = (chip->p4+chip->polyadjust)%0x0000f; \ chip->p5 = (chip->p5+chip->polyadjust)%0x0001f; \ chip->p9 = (chip->p9+chip->polyadjust)%0x001ff; \ - chip->p17 = (chip->p17+chip->polyadjust)%0x1ffff; \ - chip->polyadjust = 0; \ - if( (chip->AUDC[ch] & NOTPOLY5) || P5(chip) ) \ + chip->p17 = (chip->p17+chip->polyadjust)%0x1ffff; \ + chip->polyadjust = 0; \ + if( (chip->AUDC[ch] & NOTPOLY5) || P5(chip) ) \ { \ if( chip->AUDC[ch] & PURE ) \ toggle = 1; \ @@ -319,7 +319,7 @@ static TIMER_CALLBACK( pokey_pot_trigger ); chip->output[ch] ^= 1; \ } \ /* is this a filtering channel (3/4) and is the filter active? */ \ - if( chip->AUDCTL & ((CH1_FILTER|CH2_FILTER) & (0x10 >> ch)) ) \ + if( chip->AUDCTL & ((CH1_FILTER|CH2_FILTER) & (0x10 >> ch)) ) \ { \ if( chip->output[ch-2] ) \ { \ @@ -349,23 +349,23 @@ static TIMER_CALLBACK( pokey_pot_trigger ); #define PROCESS_POKEY(chip) \ UINT32 sum = 0; \ - if( chip->output[CHAN1] ) \ + if( chip->output[CHAN1] ) \ sum += chip->volume[CHAN1]; \ - if( chip->output[CHAN2] ) \ + if( chip->output[CHAN2] ) \ sum += chip->volume[CHAN2]; \ - if( chip->output[CHAN3] ) \ + if( chip->output[CHAN3] ) \ sum += chip->volume[CHAN3]; \ - if( chip->output[CHAN4] ) \ + if( chip->output[CHAN4] ) \ sum += chip->volume[CHAN4]; \ while( samples > 0 ) \ { \ if( chip->counter[CHAN1] < chip->samplepos_whole ) \ { \ - if( chip->counter[CHAN2] < chip->counter[CHAN1] ) \ + if( chip->counter[CHAN2] < chip->counter[CHAN1] ) \ { \ if( chip->counter[CHAN3] < chip->counter[CHAN2] ) \ { \ - if( chip->counter[CHAN4] < chip->counter[CHAN3] ) \ + if( chip->counter[CHAN4] < chip->counter[CHAN3] ) \ { \ UINT32 event = chip->counter[CHAN4]; \ PROCESS_CHANNEL(chip,CHAN4); \ @@ -377,7 +377,7 @@ static TIMER_CALLBACK( pokey_pot_trigger ); } \ } \ else \ - if( chip->counter[CHAN4] < chip->counter[CHAN2] ) \ + if( chip->counter[CHAN4] < chip->counter[CHAN2] ) \ { \ UINT32 event = chip->counter[CHAN4]; \ PROCESS_CHANNEL(chip,CHAN4); \ @@ -389,9 +389,9 @@ static TIMER_CALLBACK( pokey_pot_trigger ); } \ } \ else \ - if( chip->counter[CHAN3] < chip->counter[CHAN1] ) \ + if( chip->counter[CHAN3] < chip->counter[CHAN1] ) \ { \ - if( chip->counter[CHAN4] < chip->counter[CHAN3] ) \ + if( chip->counter[CHAN4] < chip->counter[CHAN3] ) \ { \ UINT32 event = chip->counter[CHAN4]; \ PROCESS_CHANNEL(chip,CHAN4); \ @@ -403,7 +403,7 @@ static TIMER_CALLBACK( pokey_pot_trigger ); } \ } \ else \ - if( chip->counter[CHAN4] < chip->counter[CHAN1] ) \ + if( chip->counter[CHAN4] < chip->counter[CHAN1] ) \ { \ UINT32 event = chip->counter[CHAN4]; \ PROCESS_CHANNEL(chip,CHAN4); \ @@ -417,9 +417,9 @@ static TIMER_CALLBACK( pokey_pot_trigger ); else \ if( chip->counter[CHAN2] < chip->samplepos_whole ) \ { \ - if( chip->counter[CHAN3] < chip->counter[CHAN2] ) \ + if( chip->counter[CHAN3] < chip->counter[CHAN2] ) \ { \ - if( chip->counter[CHAN4] < chip->counter[CHAN3] ) \ + if( chip->counter[CHAN4] < chip->counter[CHAN3] ) \ { \ UINT32 event = chip->counter[CHAN4]; \ PROCESS_CHANNEL(chip,CHAN4); \ @@ -431,7 +431,7 @@ static TIMER_CALLBACK( pokey_pot_trigger ); } \ } \ else \ - if( chip->counter[CHAN4] < chip->counter[CHAN2] ) \ + if( chip->counter[CHAN4] < chip->counter[CHAN2] ) \ { \ UINT32 event = chip->counter[CHAN4]; \ PROCESS_CHANNEL(chip,CHAN4); \ @@ -445,7 +445,7 @@ static TIMER_CALLBACK( pokey_pot_trigger ); else \ if( chip->counter[CHAN3] < chip->samplepos_whole ) \ { \ - if( chip->counter[CHAN4] < chip->counter[CHAN3] ) \ + if( chip->counter[CHAN4] < chip->counter[CHAN3] ) \ { \ UINT32 event = chip->counter[CHAN4]; \ PROCESS_CHANNEL(chip,CHAN4); \ @@ -464,7 +464,7 @@ static TIMER_CALLBACK( pokey_pot_trigger ); } \ else \ { \ - UINT32 event = chip->samplepos_whole; \ + UINT32 event = chip->samplepos_whole; \ PROCESS_SAMPLE(chip); \ } \ } \ @@ -478,36 +478,36 @@ static TIMER_CALLBACK( pokey_pot_trigger ); #define PROCESS_POKEY(chip) \ UINT32 sum = 0; \ - if( chip->output[CHAN1] ) \ + if( chip->output[CHAN1] ) \ sum += chip->volume[CHAN1]; \ - if( chip->output[CHAN2] ) \ + if( chip->output[CHAN2] ) \ sum += chip->volume[CHAN2]; \ - if( chip->output[CHAN3] ) \ + if( chip->output[CHAN3] ) \ sum += chip->volume[CHAN3]; \ - if( chip->output[CHAN4] ) \ + if( chip->output[CHAN4] ) \ sum += chip->volume[CHAN4]; \ while( samples > 0 ) \ { \ - UINT32 event = chip->samplepos_whole; \ + UINT32 event = chip->samplepos_whole; \ UINT32 channel = SAMPLE; \ if( chip->counter[CHAN1] < event ) \ { \ - event = chip->counter[CHAN1]; \ + event = chip->counter[CHAN1]; \ channel = CHAN1; \ } \ if( chip->counter[CHAN2] < event ) \ { \ - event = chip->counter[CHAN2]; \ + event = chip->counter[CHAN2]; \ channel = CHAN2; \ } \ if( chip->counter[CHAN3] < event ) \ { \ - event = chip->counter[CHAN3]; \ + event = chip->counter[CHAN3]; \ channel = CHAN3; \ } \ if( chip->counter[CHAN4] < event ) \ { \ - event = chip->counter[CHAN4]; \ + event = chip->counter[CHAN4]; \ channel = CHAN4; \ } \ if( channel == SAMPLE ) \ diff --git a/src/emu/sound/s14001a.c b/src/emu/sound/s14001a.c index d47ca6c5e0d..e903a22b7cc 100644 --- a/src/emu/sound/s14001a.c +++ b/src/emu/sound/s14001a.c @@ -460,7 +460,7 @@ static void s14001a_clock(S14001AChip *chip) /* called once per clock */ chip->nextstate = 6; break; case 6: // Play phone forward, shift = 2 - CurDelta = (chip->SpeechRom[(chip->PhoneAddress)+chip->PhoneOffset]&0x30)>>4; // grab current delta from low 2 bits of high nybble + CurDelta = (chip->SpeechRom[(chip->PhoneAddress)+chip->PhoneOffset]&0x30)>>4; // grab current delta from low 2 bits of high nybble chip->DACOutput += DeltaTable[CurDelta][chip->OldDelta]; // send data to forward delta table and add result to accumulator chip->OldDelta = CurDelta; // Move current delta to old chip->nextstate = 7; diff --git a/src/emu/sound/samples.c b/src/emu/sound/samples.c index 56b2b86be17..28aa3ea8f88 100644 --- a/src/emu/sound/samples.c +++ b/src/emu/sound/samples.c @@ -532,10 +532,10 @@ DEVICE_GET_INFO( samples ) case DEVINFO_FCT_RESET: /* Nothing */ break; /* --- the following bits of info are returned as NULL-terminated strings --- */ - case DEVINFO_STR_NAME: strcpy(info->s, "Samples"); break; - case DEVINFO_STR_FAMILY: strcpy(info->s, "Big Hack"); break; - case DEVINFO_STR_VERSION: strcpy(info->s, "1.1"); break; - case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break; + case DEVINFO_STR_NAME: strcpy(info->s, "Samples"); break; + case DEVINFO_STR_FAMILY: strcpy(info->s, "Big Hack"); break; + case DEVINFO_STR_VERSION: strcpy(info->s, "1.1"); break; + case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break; case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break; } } diff --git a/src/emu/sound/scsp.c b/src/emu/sound/scsp.c index 2d65bae1a78..3cae40a088b 100644 --- a/src/emu/sound/scsp.c +++ b/src/emu/sound/scsp.c @@ -156,7 +156,7 @@ struct _SLOT #define MVOL(scsp) ((scsp->udata.data[0]>>0x0)&0x000F) #define RBL(scsp) ((scsp->udata.data[1]>>0x7)&0x0003) #define RBP(scsp) ((scsp->udata.data[1]>>0x0)&0x003F) -#define MOFULL(scsp) ((scsp->udata.data[2]>>0x0)&0x1000) +#define MOFULL(scsp) ((scsp->udata.data[2]>>0x0)&0x1000) #define MOEMPTY(scsp) ((scsp->udata.data[2]>>0x0)&0x0800) #define MIOVF(scsp) ((scsp->udata.data[2]>>0x0)&0x0400) #define MIFULL(scsp) ((scsp->udata.data[2]>>0x0)&0x0200) @@ -229,10 +229,10 @@ struct _SCSP const device_config *device; }; -static void dma_scsp(const address_space *space, struct _SCSP *SCSP); /*SCSP DMA transfer function*/ +static void dma_scsp(const address_space *space, struct _SCSP *SCSP); /*SCSP DMA transfer function*/ #define scsp_dgate scsp_regs[0x16/2] & 0x4000 #define scsp_ddir scsp_regs[0x16/2] & 0x2000 -#define scsp_dexe scsp_regs[0x16/2] & 0x1000 +#define scsp_dexe scsp_regs[0x16/2] & 0x1000 #define dma_transfer_end ((scsp_regs[0x24/2] & 0x10)>>4)|(((scsp_regs[0x26/2] & 0x10)>>4)<<1)|(((scsp_regs[0x28/2] & 0x10)>>4)<<2) static const float SDLT[8]={-1000000.0f,-36.0f,-30.0f,-24.0f,-18.0f,-12.0f,-6.0f,0.0f}; @@ -490,7 +490,7 @@ static void SCSP_StartSlot(struct _SCSP *SCSP, struct _SLOT *slot) slot->active=1; start_offset = PCM8B(slot) ? SA(slot) : SA(slot) & 0x7FFFE; slot->base=SCSP->SCSPRAM + start_offset; - slot->cur_addr=0; + slot->cur_addr=0; slot->nxt_addr=1<<SHIFT; slot->step=SCSP_Step(slot); Compute_EG(SCSP,slot); @@ -960,16 +960,16 @@ INLINE INT32 SCSP_UpdateSlot(struct _SCSP *SCSP, struct _SLOT *slot) step>>=SHIFT; } - if(PCM8B(slot)) - { - addr1=slot->cur_addr>>SHIFT; - addr2=slot->nxt_addr>>SHIFT; - } - else - { - addr1=(slot->cur_addr>>(SHIFT-1))&0x7fffe; - addr2=(slot->nxt_addr>>(SHIFT-1))&0x7fffe; - } + if(PCM8B(slot)) + { + addr1=slot->cur_addr>>SHIFT; + addr2=slot->nxt_addr>>SHIFT; + } + else + { + addr1=(slot->cur_addr>>(SHIFT-1))&0x7fffe; + addr2=(slot->nxt_addr>>(SHIFT-1))&0x7fffe; + } if(MDL(slot)!=0 || MDXSL(slot)!=0 || MDYSL(slot)!=0) { @@ -1011,10 +1011,10 @@ INLINE INT32 SCSP_UpdateSlot(struct _SCSP *SCSP, struct _SLOT *slot) slot->cur_addr-=step; else slot->cur_addr+=step; - slot->nxt_addr=slot->cur_addr+(1<<SHIFT); + slot->nxt_addr=slot->cur_addr+(1<<SHIFT); - addr1=slot->cur_addr>>SHIFT; - addr2=slot->nxt_addr>>SHIFT; + addr1=slot->cur_addr>>SHIFT; + addr2=slot->nxt_addr>>SHIFT; if(addr1>=LSA(slot) && !(slot->Backwards)) { @@ -1022,54 +1022,54 @@ INLINE INT32 SCSP_UpdateSlot(struct _SCSP *SCSP, struct _SLOT *slot) slot->EG.state = DECAY1; } - for (addr_select=0;addr_select<2;addr_select++) - { + for (addr_select=0;addr_select<2;addr_select++) + { INT32 rem_addr; - switch(LPCTL(slot)) - { - case 0: //no loop - if(*addr[addr_select]>=LSA(slot) && *addr[addr_select]>=LEA(slot)) - { - //slot->active=0; - SCSP_StopSlot(slot,0); - } - break; - case 1: //normal loop - if(*addr[addr_select]>=LEA(slot)) + switch(LPCTL(slot)) + { + case 0: //no loop + if(*addr[addr_select]>=LSA(slot) && *addr[addr_select]>=LEA(slot)) + { + //slot->active=0; + SCSP_StopSlot(slot,0); + } + break; + case 1: //normal loop + if(*addr[addr_select]>=LEA(slot)) { rem_addr = *slot_addr[addr_select] - (LEA(slot)<<SHIFT); *slot_addr[addr_select]=(LSA(slot)<<SHIFT) + rem_addr; } - break; - case 2: //reverse loop - if((*addr[addr_select]>=LSA(slot)) && !(slot->Backwards)) - { + break; + case 2: //reverse loop + if((*addr[addr_select]>=LSA(slot)) && !(slot->Backwards)) + { rem_addr = *slot_addr[addr_select] - (LSA(slot)<<SHIFT); *slot_addr[addr_select]=(LEA(slot)<<SHIFT) - rem_addr; - slot->Backwards=1; - } + slot->Backwards=1; + } else if((*addr[addr_select]<LSA(slot) || (*slot_addr[addr_select]&0x80000000)) && slot->Backwards) { rem_addr = (LSA(slot)<<SHIFT) - *slot_addr[addr_select]; *slot_addr[addr_select]=(LEA(slot)<<SHIFT) - rem_addr; } - break; - case 3: //ping-pong - if(*addr[addr_select]>=LEA(slot)) //reached end, reverse till start - { + break; + case 3: //ping-pong + if(*addr[addr_select]>=LEA(slot)) //reached end, reverse till start + { rem_addr = *slot_addr[addr_select] - (LEA(slot)<<SHIFT); *slot_addr[addr_select]=(LEA(slot)<<SHIFT) - rem_addr; - slot->Backwards=1; - } + slot->Backwards=1; + } else if((*addr[addr_select]<LSA(slot) || (*slot_addr[addr_select]&0x80000000)) && slot->Backwards)//reached start or negative - { + { rem_addr = (LSA(slot)<<SHIFT) - *slot_addr[addr_select]; *slot_addr[addr_select]=(LSA(slot)<<SHIFT) + rem_addr; - slot->Backwards=0; - } - break; - } - } + slot->Backwards=0; + } + break; + } + } if(ALFOS(slot)!=0) { @@ -1083,10 +1083,10 @@ INLINE INT32 SCSP_UpdateSlot(struct _SCSP *SCSP, struct _SLOT *slot) sample=(sample*EG_TABLE[EG_Update(slot)>>(SHIFT-10)])>>SHIFT; if(!STWINH(slot)) - { - unsigned short Enc=((TL(slot))<<0x0)|(0x7<<0xd); - *RBUFDST=(sample*SCSP->LPANTABLE[Enc])>>(SHIFT+1); - } + { + unsigned short Enc=((TL(slot))<<0x0)|(0x7<<0xd); + *RBUFDST=(sample*SCSP->LPANTABLE[Enc])>>(SHIFT+1); + } return sample; } @@ -1149,14 +1149,14 @@ static void SCSP_DoMasterSamples(struct _SCSP *SCSP, int nsamples) struct _SLOT *slot=SCSP->Slots+i; if(EFSDL(slot)) { - unsigned short Enc=((EFPAN(slot))<<0x8)|((EFSDL(slot))<<0xd); - smpl+=(SCSP->DSP.EFREG[i]*SCSP->LPANTABLE[Enc])>>SHIFT; - smpr+=(SCSP->DSP.EFREG[i]*SCSP->RPANTABLE[Enc])>>SHIFT; + unsigned short Enc=((EFPAN(slot))<<0x8)|((EFSDL(slot))<<0xd); + smpl+=(SCSP->DSP.EFREG[i]*SCSP->LPANTABLE[Enc])>>SHIFT; + smpr+=(SCSP->DSP.EFREG[i]*SCSP->RPANTABLE[Enc])>>SHIFT; } } - *bufl++ = ICLIP16(smpl>>2); - *bufr++ = ICLIP16(smpr>>2); + *bufl++ = ICLIP16(smpl>>2); + *bufr++ = ICLIP16(smpr>>2); } } @@ -1171,7 +1171,7 @@ static void dma_scsp(const address_space *space, struct _SCSP *SCSP) "DGATE: %d DDIR: %d\n",SCSP->scsp_dmea,SCSP->scsp_drga,SCSP->scsp_dtlg,scsp_dgate ? 1 : 0,scsp_ddir ? 1 : 0); /* Copy the dma values in a temp storage for resuming later */ - /* (DMA *can't* overwrite his parameters). */ + /* (DMA *can't* overwrite his parameters). */ if(!(scsp_ddir)) { tmp_dma[0] = scsp_regs[0x12/2]; @@ -1192,7 +1192,7 @@ static void dma_scsp(const address_space *space, struct _SCSP *SCSP) { for(;SCSP->scsp_dtlg > 0;SCSP->scsp_dtlg-=2) { - memory_write_word(space,0x100000|SCSP->scsp_drga,memory_read_word(space,SCSP->scsp_dmea)); + memory_write_word(space,0x100000|SCSP->scsp_drga,memory_read_word(space,SCSP->scsp_dmea)); SCSP->scsp_dmea+=2; SCSP->scsp_drga+=2; } @@ -1201,7 +1201,7 @@ static void dma_scsp(const address_space *space, struct _SCSP *SCSP) /*Resume the values*/ if(!(scsp_ddir)) { - scsp_regs[0x12/2] = tmp_dma[0]; + scsp_regs[0x12/2] = tmp_dma[0]; scsp_regs[0x14/2] = tmp_dma[1]; scsp_regs[0x16/2] = tmp_dma[2]; } diff --git a/src/emu/sound/scspdsp.c b/src/emu/sound/scspdsp.c index cfa648d0be3..a1261398b77 100644 --- a/src/emu/sound/scspdsp.c +++ b/src/emu/sound/scspdsp.c @@ -308,7 +308,7 @@ void SCSPDSP_Step(struct _SCSPDSP *DSP) if(MWT && (step&1)) { if(NOFL) - DSP->SCSPRAM[ADDR]=SHIFTED>>8; + DSP->SCSPRAM[ADDR]=SHIFTED>>8; else DSP->SCSPRAM[ADDR]=PACK(SHIFTED); } diff --git a/src/emu/sound/scsplfo.c b/src/emu/sound/scsplfo.c index 4d55697ac0d..cd7ef51631d 100644 --- a/src/emu/sound/scsplfo.c +++ b/src/emu/sound/scsplfo.c @@ -8,7 +8,7 @@ MAME/M1 conversion and cleanup by R. Belmont */ -#define LFO_SHIFT 8 +#define LFO_SHIFT 8 struct _LFO { @@ -21,7 +21,7 @@ struct _LFO #define LFIX(v) ((unsigned int) ((float) (1<<LFO_SHIFT)*(v))) //Convert DB to multiply amplitude -#define DB(v) LFIX(pow(10.0,v/20.0)) +#define DB(v) LFIX(pow(10.0,v/20.0)) //Convert cents to step increment #define CENTS(v) LFIX(pow(2.0,v/1200.0)) @@ -50,7 +50,7 @@ static void LFO_Init(running_machine *machine) if(i<128) p=i; else - p=i-256; + p=i-256; ALFO_SAW[i]=a; PLFO_SAW[i]=p; diff --git a/src/emu/sound/sn76477.c b/src/emu/sound/sn76477.c index f0b766143fc..3216753d47f 100644 --- a/src/emu/sound/sn76477.c +++ b/src/emu/sound/sn76477.c @@ -104,7 +104,7 @@ static const sn76477_interface empty_interface = 0, /* 6 filter_cap */ 0, /* 7 decay_res */ 0, /* 8 attack_decay_cap */ - 0, /* 10 attack_res */ + 0, /* 10 attack_res */ 0, /* 11 amplitude_res */ 0, /* 12 feedback_res */ 0, /* 16 vco_voltage */ @@ -136,8 +136,8 @@ static const sn76477_interface empty_interface = * *****************************************************************************/ -#define ONE_SHOT_CAP_VOLTAGE_MIN (0) /* the voltage at which the one-shot starts from (measured) */ -#define ONE_SHOT_CAP_VOLTAGE_MAX (2.5) /* the voltage at which the one-shot finishes (measured) */ +#define ONE_SHOT_CAP_VOLTAGE_MIN (0) /* the voltage at which the one-shot starts from (measured) */ +#define ONE_SHOT_CAP_VOLTAGE_MAX (2.5) /* the voltage at which the one-shot finishes (measured) */ #define ONE_SHOT_CAP_VOLTAGE_RANGE (ONE_SHOT_CAP_VOLTAGE_MAX - ONE_SHOT_CAP_VOLTAGE_MIN) #define SLF_CAP_VOLTAGE_MIN (0.33) /* the voltage at the bottom peak of the SLF triangle wave (measured) */ @@ -176,7 +176,7 @@ static const double out_pos_gain[] = 0.03, 0.11, 0.15, 0.19, 0.21, 0.23, 0.26, 0.29, 0.31, 0.33, /* 1.0 - 1.9V */ 0.36, 0.38, 0.41, 0.43, 0.46, 0.49, 0.52, 0.54, 0.57, 0.60, /* 2.0 - 2.9V */ 0.62, 0.65, 0.68, 0.70, 0.73, 0.76, 0.80, 0.82, 0.84, 0.87, /* 3.0 - 3.9V */ - 0.90, 0.93, 0.96, 0.98, 1.00 /* 4.0 - 4.4V */ + 0.90, 0.93, 0.96, 0.98, 1.00 /* 4.0 - 4.4V */ }; static const double out_neg_gain[] = @@ -256,7 +256,7 @@ struct _sn76477_state /* others */ sound_stream *channel; /* returned by stream_create() */ - int sample_rate; /* from machine->sample_rate */ + int sample_rate; /* from machine->sample_rate */ const device_config *device; wav_file *file; /* handle of the wave file to produce */ diff --git a/src/emu/sound/sn76496.c b/src/emu/sound/sn76496.c index 3451d8e05d4..fe412057289 100644 --- a/src/emu/sound/sn76496.c +++ b/src/emu/sound/sn76496.c @@ -451,7 +451,7 @@ DEVICE_GET_INFO( sn76496 ) switch (state) { /* --- the following bits of info are returned as 64-bit signed integers --- */ - case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(sn76496_state); break; + case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(sn76496_state); break; /* --- the following bits of info are returned as pointers to data or functions --- */ case DEVINFO_FCT_START: info->start = DEVICE_START_NAME( sn76496 ); break; @@ -473,7 +473,7 @@ DEVICE_GET_INFO( sn76489 ) { case DEVINFO_FCT_START: info->start = DEVICE_START_NAME( sn76489 ); break; case DEVINFO_STR_NAME: strcpy(info->s, "SN76489"); break; - default: DEVICE_GET_INFO_CALL(sn76496); break; + default: DEVICE_GET_INFO_CALL(sn76496); break; } } @@ -483,7 +483,7 @@ DEVICE_GET_INFO( sn76489a ) { case DEVINFO_FCT_START: info->start = DEVICE_START_NAME( sn76489a ); break; case DEVINFO_STR_NAME: strcpy(info->s, "SN76489A"); break; - default: DEVICE_GET_INFO_CALL(sn76496); break; + default: DEVICE_GET_INFO_CALL(sn76496); break; } } @@ -493,7 +493,7 @@ DEVICE_GET_INFO( sn76494 ) { case DEVINFO_FCT_START: info->start = DEVICE_START_NAME( sn76494 ); break; case DEVINFO_STR_NAME: strcpy(info->s, "SN76494"); break; - default: DEVICE_GET_INFO_CALL(sn76496); break; + default: DEVICE_GET_INFO_CALL(sn76496); break; } } @@ -503,7 +503,7 @@ DEVICE_GET_INFO( sn94624 ) { case DEVINFO_FCT_START: info->start = DEVICE_START_NAME( sn94624 ); break; case DEVINFO_STR_NAME: strcpy(info->s, "SN94624"); break; - default: DEVICE_GET_INFO_CALL(sn76496); break; + default: DEVICE_GET_INFO_CALL(sn76496); break; } } @@ -513,7 +513,7 @@ DEVICE_GET_INFO( ncr7496 ) { case DEVINFO_FCT_START: info->start = DEVICE_START_NAME( ncr7496 ); break; case DEVINFO_STR_NAME: strcpy(info->s, "NCR7496"); break; - default: DEVICE_GET_INFO_CALL(sn76496); break; + default: DEVICE_GET_INFO_CALL(sn76496); break; } } @@ -523,7 +523,7 @@ DEVICE_GET_INFO( gamegear ) { case DEVINFO_FCT_START: info->start = DEVICE_START_NAME( gamegear ); break; case DEVINFO_STR_NAME: strcpy(info->s, "Game Gear PSG"); break; - default: DEVICE_GET_INFO_CALL(sn76496); break; + default: DEVICE_GET_INFO_CALL(sn76496); break; } } @@ -533,6 +533,6 @@ DEVICE_GET_INFO( smsiii ) { case DEVINFO_FCT_START: info->start = DEVICE_START_NAME( smsiii ); break; case DEVINFO_STR_NAME: strcpy(info->s, "SMSIII PSG"); break; - default: DEVICE_GET_INFO_CALL(sn76496); break; + default: DEVICE_GET_INFO_CALL(sn76496); break; } } diff --git a/src/emu/sound/snkwave.c b/src/emu/sound/snkwave.c index a4395982cc4..27d1deab1ee 100644 --- a/src/emu/sound/snkwave.c +++ b/src/emu/sound/snkwave.c @@ -173,7 +173,7 @@ DEVICE_GET_INFO( snkwave ) switch (state) { /* --- the following bits of info are returned as 64-bit signed integers --- */ - case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(snkwave_state); break; + case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(snkwave_state); break; /* --- the following bits of info are returned as pointers to data or functions --- */ case DEVINFO_FCT_START: info->start = DEVICE_START_NAME( snkwave ); break; diff --git a/src/emu/sound/speaker.c b/src/emu/sound/speaker.c index aba2258dd7f..4a7e4bd6cb2 100644 --- a/src/emu/sound/speaker.c +++ b/src/emu/sound/speaker.c @@ -431,7 +431,7 @@ DEVICE_GET_INFO( speaker ) switch (state) { /* --- the following bits of info are returned as 64-bit signed integers --- */ - case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(speaker_state); break; + case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(speaker_state); break; /* --- the following bits of info are returned as pointers to data or functions --- */ case DEVINFO_FCT_START: info->start = DEVICE_START_NAME( speaker ); break; diff --git a/src/emu/sound/speaker.h b/src/emu/sound/speaker.h index 8598f28c903..79ed35c0377 100644 --- a/src/emu/sound/speaker.h +++ b/src/emu/sound/speaker.h @@ -19,8 +19,8 @@ extern "C" { typedef struct _speaker_interface speaker_interface; struct _speaker_interface { - int num_level; /* optional: number of levels (if not two) */ - const INT16 *levels; /* optional: pointer to level lookup table */ + int num_level; /* optional: number of levels (if not two) */ + const INT16 *levels; /* optional: pointer to level lookup table */ }; void speaker_level_w (const device_config *device, int new_level); diff --git a/src/emu/sound/t6w28.c b/src/emu/sound/t6w28.c index 1fb11d5ed8d..1e4a27218e9 100644 --- a/src/emu/sound/t6w28.c +++ b/src/emu/sound/t6w28.c @@ -378,7 +378,7 @@ DEVICE_GET_INFO( t6w28 ) switch (state) { /* --- the following bits of info are returned as 64-bit signed integers --- */ - case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(t6w28_state); break; + case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(t6w28_state); break; /* --- the following bits of info are returned as pointers to data or functions --- */ case DEVINFO_FCT_START: info->start = DEVICE_START_NAME( t6w28 ); break; diff --git a/src/emu/sound/tiaintf.c b/src/emu/sound/tiaintf.c index 53c3c7e5769..feedcf70333 100644 --- a/src/emu/sound/tiaintf.c +++ b/src/emu/sound/tiaintf.c @@ -62,7 +62,7 @@ DEVICE_GET_INFO( tia ) switch (state) { /* --- the following bits of info are returned as 64-bit signed integers --- */ - case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(tia_state); break; + case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(tia_state); break; /* --- the following bits of info are returned as pointers to data or functions --- */ case DEVINFO_FCT_START: info->start = DEVICE_START_NAME( tia ); break; diff --git a/src/emu/sound/tms3615.c b/src/emu/sound/tms3615.c index 7061c9aca1f..c5375865a58 100644 --- a/src/emu/sound/tms3615.c +++ b/src/emu/sound/tms3615.c @@ -16,8 +16,8 @@ struct _tms_state { int basefreq; /* chip's base frequency */ int counter8[TONES]; /* tone frequency counter for 8' */ int counter16[TONES]; /* tone frequency counter for 16'*/ - int output8; /* output signal bits for 8' */ - int output16; /* output signal bits for 16' */ + int output8; /* output signal bits for 8' */ + int output16; /* output signal bits for 16' */ int enable; /* mask which tones to play */ }; @@ -106,7 +106,7 @@ DEVICE_GET_INFO( tms3615 ) switch (state) { /* --- the following bits of info are returned as 64-bit signed integers --- */ - case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(tms_state); break; + case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(tms_state); break; /* --- the following bits of info are returned as pointers to data or functions --- */ case DEVINFO_FCT_START: info->start = DEVICE_START_NAME( tms3615 ); break; diff --git a/src/emu/sound/tms36xx.c b/src/emu/sound/tms36xx.c index 7679a97ea7a..2846c9cbef0 100644 --- a/src/emu/sound/tms36xx.c +++ b/src/emu/sound/tms36xx.c @@ -538,7 +538,7 @@ DEVICE_GET_INFO( tms36xx ) switch (state) { /* --- the following bits of info are returned as 64-bit signed integers --- */ - case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(tms_state); break; + case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(tms_state); break; /* --- the following bits of info are returned as pointers to data or functions --- */ case DEVINFO_FCT_START: info->start = DEVICE_START_NAME( tms36xx ); break; diff --git a/src/emu/sound/tms5110.c b/src/emu/sound/tms5110.c index dc2143ec9da..eea5a08e64a 100644 --- a/src/emu/sound/tms5110.c +++ b/src/emu/sound/tms5110.c @@ -73,7 +73,7 @@ #define SUBTYPE_TMS5100 1 #define SUBTYPE_M58817 2 #define SUBTYPE_TMS5110 4 -#define FIFO_SIZE 64 +#define FIFO_SIZE 64 #define MAX_CHIRP_SIZE 51 /* Variants */ @@ -91,8 +91,8 @@ /* States for CTL */ #define CTL_STATE_INPUT (0) -#define CTL_STATE_OUTPUT (1) -#define CTL_STATE_NEXT_OUTPUT (2) +#define CTL_STATE_OUTPUT (1) +#define CTL_STATE_NEXT_OUTPUT (2) struct tms5100_coeffs { @@ -104,7 +104,7 @@ struct tms5100_coeffs unsigned short energytable[MAX_SCALE]; unsigned short pitchtable[MAX_SCALE]; int ktable[MAX_K][MAX_SCALE]; - INT8 chirptable[MAX_CHIRP_SIZE]; + INT8 chirptable[MAX_CHIRP_SIZE]; INT8 interp_coeff[8]; }; @@ -966,7 +966,7 @@ static DEVICE_START( tms5110 ) } tms->state = CTL_STATE_INPUT; /* most probably not defined */ - tms->romclk_timer = timer_alloc(device->machine, romclk_timer_cb, (void *) device); + tms->romclk_timer = timer_alloc(device->machine, romclk_timer_cb, (void *) device); register_for_save_states(tms); } @@ -1145,7 +1145,7 @@ READ8_DEVICE_HANDLER( tms5110_romclk_r ) if (!tms->romclk_timer_started) { tms->romclk_timer_started = TRUE; - timer_adjust_periodic(tms->romclk_timer, ATTOTIME_IN_HZ(device->clock / 40), 0, ATTOTIME_IN_HZ(device->clock / 40)); + timer_adjust_periodic(tms->romclk_timer, ATTOTIME_IN_HZ(device->clock / 40), 0, ATTOTIME_IN_HZ(device->clock / 40)); } return tms->romclk_state; } diff --git a/src/emu/sound/tms5110r.c b/src/emu/sound/tms5110r.c index c07740df5e1..486e375ea85 100644 --- a/src/emu/sound/tms5110r.c +++ b/src/emu/sound/tms5110r.c @@ -198,7 +198,7 @@ static const struct tms5100_coeffs tms5110a_coeff = 80, 157, 226, 287, 337, 379, 411, 436 }, /* K2 */ { -328, -303, -274, -244, -211, -175, -138, -99, - -59, -18, 24, 64, 105, 143, 180, 215, + -59, -18, 24, 64, 105, 143, 180, 215, 248, 278, 306, 331, 354, 374, 392, 408, 422, 435, 445, 455, 463, 470, 476, 506 }, /* K3 */ diff --git a/src/emu/sound/tms5220.c b/src/emu/sound/tms5220.c index af6bae8f28b..782886ae86c 100644 --- a/src/emu/sound/tms5220.c +++ b/src/emu/sound/tms5220.c @@ -196,7 +196,7 @@ struct _tms5220_state */ UINT8 tms5220_speaking; /* Speak or Speak External command in progress */ UINT8 speak_external; /* Speak External command in progress */ - UINT8 talk_status; /* tms5220 is really currently speaking */ + UINT8 talk_status; /* tms5220 is really currently speaking */ UINT8 first_frame; /* we have just started speaking, and we are to parse the first frame */ UINT8 last_frame; /* we are doing the frame of sound */ UINT8 buffer_low; /* FIFO has less than 8 bytes in it */ diff --git a/src/emu/sound/upd7759.c b/src/emu/sound/upd7759.c index 63b447d1f73..be053bb0f78 100644 --- a/src/emu/sound/upd7759.c +++ b/src/emu/sound/upd7759.c @@ -756,7 +756,7 @@ DEVICE_GET_INFO( upd7759 ) switch (state) { /* --- the following bits of info are returned as 64-bit signed integers --- */ - case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(upd7759_state); break; + case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(upd7759_state); break; /* --- the following bits of info are returned as pointers to data or functions --- */ case DEVINFO_FCT_START: info->start = DEVICE_START_NAME( upd7759 ); break; diff --git a/src/emu/sound/vlm5030.c b/src/emu/sound/vlm5030.c index aff1d037b09..92a56433f28 100644 --- a/src/emu/sound/vlm5030.c +++ b/src/emu/sound/vlm5030.c @@ -708,7 +708,7 @@ DEVICE_GET_INFO( vlm5030 ) switch (state) { /* --- the following bits of info are returned as 64-bit signed integers --- */ - case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(vlm5030_state); break; + case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(vlm5030_state); break; /* --- the following bits of info are returned as pointers to data or functions --- */ case DEVINFO_FCT_START: info->start = DEVICE_START_NAME( vlm5030 ); break; diff --git a/src/emu/sound/votrax.c b/src/emu/sound/votrax.c index a63cc45f92e..a988ca8618d 100644 --- a/src/emu/sound/votrax.c +++ b/src/emu/sound/votrax.c @@ -28,7 +28,7 @@ struct _votrax_state int stream; int frequency; /* Some games (Qbert) change this */ int volume; - sound_stream * channel; + sound_stream * channel; loaded_sample *sample; UINT32 pos; @@ -137,7 +137,7 @@ WRITE8_DEVICE_HANDLER( votrax_w ) Phoneme = data & 0x3F; Intonation = data >> 6; - logerror("Speech : %s at intonation %d\n",VotraxTable[Phoneme],Intonation); + logerror("Speech : %s at intonation %d\n",VotraxTable[Phoneme],Intonation); if(Phoneme==63) info->sample = NULL; diff --git a/src/emu/sound/vrender0.c b/src/emu/sound/vrender0.c index e6523750994..bf4057d823b 100644 --- a/src/emu/sound/vrender0.c +++ b/src/emu/sound/vrender0.c @@ -252,7 +252,7 @@ DEVICE_GET_INFO( vrender0 ) switch (state) { /* --- the following bits of info are returned as 64-bit signed integers --- */ - case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(vr0_state); break; + case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(vr0_state); break; /* --- the following bits of info are returned as pointers to data or functions --- */ case DEVINFO_FCT_START: info->start = DEVICE_START_NAME( vrender0 ); break; diff --git a/src/emu/sound/wave.c b/src/emu/sound/wave.c index b16446aa646..fa92069308c 100644 --- a/src/emu/sound/wave.c +++ b/src/emu/sound/wave.c @@ -84,7 +84,7 @@ DEVICE_GET_INFO( wave ) switch (state) { /* --- the following bits of info are returned as 64-bit signed integers --- */ - case DEVINFO_INT_TOKEN_BYTES: info->i = 0; break; + case DEVINFO_INT_TOKEN_BYTES: info->i = 0; break; /* --- the following bits of info are returned as pointers to data or functions --- */ case DEVINFO_FCT_START: info->start = DEVICE_START_NAME( wave ); break; diff --git a/src/emu/sound/x1_010.c b/src/emu/sound/x1_010.c index 7244b016ec9..57582cabf8d 100644 --- a/src/emu/sound/x1_010.c +++ b/src/emu/sound/x1_010.c @@ -178,7 +178,7 @@ static STREAM_UPDATE( seta_update ) for( i = 0; i < samples; i++ ) { int vol; delta = env_offs>>ENV_BASE_BITS; - // Envelope one shot mode + // Envelope one shot mode if( (reg->status&4) != 0 && delta >= 0x80 ) { reg->status &= 0xfe; // Key off break; @@ -256,8 +256,8 @@ WRITE8_DEVICE_HANDLER( seta_sound_w ) if( channel < SETA_NUM_CHANNELS && reg == 0 && (info->reg[offset]&1) == 0 && (data&1) != 0 ) { - info->smp_offset[channel] = 0; - info->env_offset[channel] = 0; + info->smp_offset[channel] = 0; + info->env_offset[channel] = 0; } LOG_REGISTER_WRITE(("%s: offset %6X : data %2X\n", cpuexec_describe_context(device->machine), offset, data )); info->reg[offset] = data; diff --git a/src/emu/sound/ymdeltat.c b/src/emu/sound/ymdeltat.c index 25c6e9a9582..1dd08fd0042 100644 --- a/src/emu/sound/ymdeltat.c +++ b/src/emu/sound/ymdeltat.c @@ -337,7 +337,7 @@ value: START, REC, MEMDAT, REPEAT, SPOFF, x,x,RESET meaning: if ( DELTAT->now_addr != (DELTAT->end<<1) ) { DELTAT->memory[DELTAT->now_addr>>1] = v; - DELTAT->now_addr+=2; /* two nibbles at a time */ + DELTAT->now_addr+=2; /* two nibbles at a time */ /* reset BRDY bit in status register, which means we are processing the write */ if(DELTAT->status_reset_handler) diff --git a/src/emu/sound/ymf271.c b/src/emu/sound/ymf271.c index 1baa8a5086b..842d63c31e9 100644 --- a/src/emu/sound/ymf271.c +++ b/src/emu/sound/ymf271.c @@ -1820,7 +1820,7 @@ DEVICE_GET_INFO( ymf271 ) switch (state) { /* --- the following bits of info are returned as 64-bit signed integers --- */ - case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(YMF271Chip); break; + case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(YMF271Chip); break; /* --- the following bits of info are returned as pointers to data or functions --- */ case DEVINFO_FCT_START: info->start = DEVICE_START_NAME( ymf271 ); break; diff --git a/src/emu/sound/ymf278b.c b/src/emu/sound/ymf278b.c index 00939c8762b..3ea20c7ee04 100644 --- a/src/emu/sound/ymf278b.c +++ b/src/emu/sound/ymf278b.c @@ -83,7 +83,7 @@ typedef struct INT8 D1R; INT8 DL; INT8 D2R; - INT8 RC; /* rate correction */ + INT8 RC; /* rate correction */ INT8 RR; UINT32 step; /* fixed-point frequency step */ @@ -294,14 +294,14 @@ static STREAM_UPDATE( ymf278b_pcm_update ) sample = rombase[slot->startaddr + (slot->stepptr>>16)]<<8; break; - case 12: // 12 bit + case 12: // 12 bit if (slot->stepptr & 1) sample = rombase[slot->startaddr + (slot->stepptr>>17)*3 + 2]<<8 | ((rombase[slot->startaddr + (slot->stepptr>>17)*3 + 1] << 4) & 0xf0); else sample = rombase[slot->startaddr + (slot->stepptr>>17)*3]<<8 | (rombase[slot->startaddr + (slot->stepptr>>17)*3 + 1] & 0xf0); break; - case 16: // 16 bit + case 16: // 16 bit sample = rombase[slot->startaddr + ((slot->stepptr>>16)*2)]<<8; sample |= rombase[slot->startaddr + ((slot->stepptr>>16)*2) + 1]; break; @@ -330,7 +330,7 @@ static STREAM_UPDATE( ymf278b_pcm_update ) // update envelope slot->env_vol += slot->env_vol_step; if(((INT32)(slot->env_vol - slot->env_vol_lim)) >= 0) - ymf278b_envelope_next(slot); + ymf278b_envelope_next(slot); } } } @@ -551,7 +551,7 @@ static void ymf278b_C_w(YMF278BChip *chip, UINT8 reg, UINT8 data) case 5: slot->vib = data&0x7; slot->lfo = (data>>3)&0x7; - break; + break; case 6: slot->AR = data>>4; slot->D1R = data&0xf; @@ -574,7 +574,7 @@ static void ymf278b_C_w(YMF278BChip *chip, UINT8 reg, UINT8 data) // All non-slot registers switch (reg) { - case 0x00: // TEST + case 0x00: // TEST case 0x01: break; @@ -723,7 +723,7 @@ DEVICE_GET_INFO( ymf278b ) switch (state) { /* --- the following bits of info are returned as 64-bit signed integers --- */ - case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(YMF278BChip); break; + case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(YMF278BChip); break; /* --- the following bits of info are returned as pointers to data or functions --- */ case DEVINFO_FCT_START: info->start = DEVICE_START_NAME( ymf278b ); break; diff --git a/src/emu/sound/ymz280b.c b/src/emu/sound/ymz280b.c index 360b3aac8de..7708a28da57 100644 --- a/src/emu/sound/ymz280b.c +++ b/src/emu/sound/ymz280b.c @@ -35,8 +35,8 @@ #define FRAC_ONE (1 << FRAC_BITS) #define FRAC_MASK (FRAC_ONE - 1) -#define INTERNAL_BUFFER_SIZE (1 << 15) -#define INTERNAL_SAMPLE_RATE (chip->master_clock * 2.0) +#define INTERNAL_BUFFER_SIZE (1 << 15) +#define INTERNAL_SAMPLE_RATE (chip->master_clock * 2.0) #if MAKE_WAVS #include "wavwrite.h" diff --git a/src/emu/state.h b/src/emu/state.h index afe628dcb35..47be8c350b3 100644 --- a/src/emu/state.h +++ b/src/emu/state.h @@ -64,7 +64,7 @@ typedef enum _state_save_error state_save_error; /* generic registration; all further registrations are based on this */ -#define state_save_register_generic(_mach, _mod, _tag, _index, _name, _val, _valsize, _count) \ +#define state_save_register_generic(_mach, _mod, _tag, _index, _name, _val, _valsize, _count) \ do { \ assert_always(IS_VALID_SAVE_TYPE(_valsize), "Invalid data type supplied for state saving."); \ state_save_register_memory(_mach, _mod, _tag, _index, _name, _val, sizeof(_valsize), _count, __FILE__, __LINE__); \ diff --git a/src/emu/streams.c b/src/emu/streams.c index 4445e94c3f3..2628b40d5f6 100644 --- a/src/emu/streams.c +++ b/src/emu/streams.c @@ -144,7 +144,7 @@ struct _sound_stream INT32 output_base_sampindex; /* sample at base of buffer, relative to the current emulated second */ /* callback information */ - stream_update_func callback; /* callback function */ + stream_update_func callback; /* callback function */ void * param; /* callback function parameter */ }; diff --git a/src/emu/tilemap.c b/src/emu/tilemap.c index 1b9c6e7ca8f..b6c043583f6 100644 --- a/src/emu/tilemap.c +++ b/src/emu/tilemap.c @@ -56,9 +56,9 @@ struct _blit_parameters { bitmap_t * bitmap; rectangle cliprect; - blitmask_func draw_masked; + blitmask_func draw_masked; blitopaque_func draw_opaque; - UINT32 tilemap_priority_code; + UINT32 tilemap_priority_code; UINT8 mask; UINT8 value; UINT8 alpha; @@ -107,9 +107,9 @@ struct _tilemap_t UINT32 scrollcols; /* number of independently scrolled colums */ INT32 * rowscroll; /* array of rowscroll values */ INT32 * colscroll; /* array of colscroll values */ - INT32 dx; /* global horizontal scroll offset */ + INT32 dx; /* global horizontal scroll offset */ INT32 dx_flipped; /* global horizontal scroll offset when flipped */ - INT32 dy; /* global vertical scroll offset */ + INT32 dy; /* global vertical scroll offset */ INT32 dy_flipped; /* global vertical scroll offset when flipped */ /* pixel data */ @@ -118,7 +118,7 @@ struct _tilemap_t /* transparency mapping */ bitmap_t * flagsmap; /* per-pixel flags */ UINT8 * tileflags; /* per-tile flags */ - UINT8 * pen_to_flags; /* mapping of pens to flags */ + UINT8 * pen_to_flags; /* mapping of pens to flags */ }; @@ -900,7 +900,7 @@ profiler_mark_start(PROFILER_TILEMAP_DRAW); if (effective_colscroll(tmap, nextcol, height) != scrolly) break; - /* skip if disabled */ + /* skip if disabled */ if (scrolly == TILE_LINE_DISABLED) continue; @@ -1258,7 +1258,7 @@ static void pixmap_update(tilemap_t *tmap, const rectangle *cliprect) int row, col; /* if the graphics changed, we need to mark everything dirty */ - if (gfx_elements_changed(tmap)) + if (gfx_elements_changed(tmap)) tilemap_mark_all_tiles_dirty(tmap); /* if everything is clean, do nothing */ diff --git a/src/emu/timer.c b/src/emu/timer.c index fde65e262c6..35ceb66c65f 100644 --- a/src/emu/timer.c +++ b/src/emu/timer.c @@ -46,16 +46,16 @@ struct _emu_timer emu_timer * next; /* next timer in order in the list */ emu_timer * prev; /* previous timer in order in the list */ timer_fired_func callback; /* callback function */ - INT32 param; /* integer parameter */ + INT32 param; /* integer parameter */ void * ptr; /* pointer parameter */ const char * file; /* file that created the timer */ int line; /* line number that created the timer */ const char * func; /* string name of the callback function */ - UINT8 enabled; /* is the timer enabled? */ - UINT8 temporary; /* is the timer temporary? */ - attotime period; /* the repeat frequency of the timer */ - attotime start; /* time when the timer was started */ - attotime expire; /* time when the timer will expire */ + UINT8 enabled; /* is the timer enabled? */ + UINT8 temporary; /* is the timer temporary? */ + attotime period; /* the repeat frequency of the timer */ + attotime start; /* time when the timer was started */ + attotime expire; /* time when the timer will expire */ }; @@ -64,7 +64,7 @@ typedef struct _timer_state timer_state; struct _timer_state { emu_timer *timer; /* the backing timer */ - void *ptr; /* the pointer parameter passed to the timer callback */ + void *ptr; /* the pointer parameter passed to the timer callback */ /* periodic timers only */ attotime start_delay; /* delay before the timer fires for the first time */ @@ -72,7 +72,7 @@ struct _timer_state INT32 param; /* the integer parameter passed to the timer callback */ /* scanline timers only */ - UINT32 first_time; /* indicates that the system is starting */ + UINT32 first_time; /* indicates that the system is starting */ }; @@ -91,9 +91,9 @@ struct _quantum_slot struct _timer_private { /* list of active timers */ - emu_timer timers[MAX_TIMERS]; /* actual timers */ + emu_timer timers[MAX_TIMERS]; /* actual timers */ emu_timer * activelist; /* head of the active list */ - emu_timer * freelist; /* head of the free list */ + emu_timer * freelist; /* head of the free list */ emu_timer * freelist_tail; /* tail of the free list */ /* execution state */ @@ -105,9 +105,9 @@ struct _timer_private attotime callback_timer_expire_time; /* the original expiration time */ /* scheduling quanta */ - quantum_slot quantum_list[MAX_QUANTA]; /* list of scheduling quanta */ + quantum_slot quantum_list[MAX_QUANTA]; /* list of scheduling quanta */ quantum_slot * quantum_current; /* current minimum quantum */ - attoseconds_t quantum_minimum; /* duration of minimum quantum */ + attoseconds_t quantum_minimum; /* duration of minimum quantum */ }; diff --git a/src/emu/timer.h b/src/emu/timer.h index 9c4ef6b4643..ce62752e845 100644 --- a/src/emu/timer.h +++ b/src/emu/timer.h @@ -80,7 +80,7 @@ struct _timer_config { int type; /* type of timer */ timer_device_fired_func callback; /* the timer's callback function */ - void *ptr; /* the pointer parameter passed to the timer callback */ + void *ptr; /* the pointer parameter passed to the timer callback */ /* periodic timers only */ UINT64 start_delay; /* delay before the timer fires for the first time */ @@ -88,7 +88,7 @@ struct _timer_config INT32 param; /* the integer parameter passed to the timer callback */ /* scanline timers only */ - const char *screen; /* the name of the screen this timer tracks */ + const char *screen; /* the name of the screen this timer tracks */ UINT32 first_vpos; /* the first vertical scanline position the timer fires on */ UINT32 increment; /* the number of scanlines between firings */ }; diff --git a/src/emu/tokenize.h b/src/emu/tokenize.h index fc139e404b6..07361f1a0d5 100644 --- a/src/emu/tokenize.h +++ b/src/emu/tokenize.h @@ -63,7 +63,7 @@ struct _generic_token /* GCC and C99 compilers can use designated initializers for type safety */ #if (defined(__GNUC__) && (__GNUC__ >= 3) && !defined(__cplusplus)) || (defined(_STDC_VERSION__) && (__STDC_VERSION__ >= 199901L)) -#define TOKEN_VALUE(field,a) { .field = (a) } +#define TOKEN_VALUE(field,a) { .field = (a) } #else #define TOKEN_VALUE(field,a) { (FPTR)(a) } #endif diff --git a/src/emu/ui.c b/src/emu/ui.c index 72b663f3172..04daa3c9c21 100644 --- a/src/emu/ui.c +++ b/src/emu/ui.c @@ -930,7 +930,7 @@ static astring *warnings_string(running_machine *machine, astring *string) /* find the parent of this driver */ clone_of = driver_get_clone(machine->gamedrv); if (clone_of != NULL && !(clone_of->flags & GAME_IS_BIOS_ROOT)) - maindrv = clone_of; + maindrv = clone_of; else maindrv = machine->gamedrv; diff --git a/src/emu/uiinput.h b/src/emu/uiinput.h index ef557a01d86..fad20937bb3 100644 --- a/src/emu/uiinput.h +++ b/src/emu/uiinput.h @@ -39,12 +39,12 @@ typedef enum _ui_event_type ui_event_type; typedef struct _ui_event ui_event; struct _ui_event { - ui_event_type event_type; + ui_event_type event_type; render_target * target; - INT32 mouse_x; - INT32 mouse_y; - input_item_id key; - unicode_char ch; + INT32 mouse_x; + INT32 mouse_y; + input_item_id key; + unicode_char ch; }; diff --git a/src/emu/uimenu.c b/src/emu/uimenu.c index 6923eb5be52..1e17b841572 100644 --- a/src/emu/uimenu.c +++ b/src/emu/uimenu.c @@ -107,7 +107,7 @@ struct _ui_menu_item { const char * text; const char * subtext; - UINT32 flags; + UINT32 flags; void * ref; }; @@ -146,8 +146,8 @@ struct _input_item_data input_seq seq; /* copy of the live sequence */ const input_seq * defseq; /* pointer to the default sequence */ const char * name; /* pointer to the base name of the item */ - UINT16 sortorder; /* sorting information */ - UINT8 type; /* type of port */ + UINT16 sortorder; /* sorting information */ + UINT8 type; /* type of port */ }; @@ -168,7 +168,7 @@ typedef struct _dip_descriptor dip_descriptor; struct _dip_descriptor { dip_descriptor * next; - const char * name; + const char * name; UINT32 mask; UINT32 state; }; @@ -186,11 +186,11 @@ struct _settings_menu_state typedef struct _input_menu_state input_menu_state; struct _input_menu_state { - UINT16 last_sortorder; + UINT16 last_sortorder; const void * pollingref; input_item_data * pollingitem; UINT8 record_next; - input_seq starting_seq; + input_seq starting_seq; }; @@ -1488,7 +1488,7 @@ static void menu_main_populate(running_machine *machine, ui_menu *menu, void *st ui_menu_item_append(menu, "Analog Controls", NULL, 0, (void *)menu_analog); #ifndef MESS - /* add bookkeeping menu */ + /* add bookkeeping menu */ ui_menu_item_append(menu, "Bookkeeping Info", NULL, 0, (void *)menu_bookkeeping); #endif @@ -2140,7 +2140,7 @@ static void menu_settings_custom_render_one(float x1, float y1, float x2, float numtoggles = 32 - count_leading_zeros(dip->mask); /* center based on the number of switches */ - x1 += (x2 - x1 - numtoggles * switch_field_width) / 2; + x1 += (x2 - x1 - numtoggles * switch_field_width) / 2; /* draw the dip switch name */ ui_draw_text_full( dip->name, @@ -3058,8 +3058,8 @@ static void menu_video_options_populate(running_machine *machine, ui_menu *menu, { case ROT0: subtext = "None"; break; case ROT90: subtext = "CW 90" UTF8_DEGREES; break; - case ROT180: subtext = "180" UTF8_DEGREES; break; - case ROT270: subtext = "CCW 90" UTF8_DEGREES; break; + case ROT180: subtext = "180" UTF8_DEGREES; break; + case ROT270: subtext = "CCW 90" UTF8_DEGREES; break; } ui_menu_item_append(menu, "Rotate", subtext, MENU_FLAG_LEFT_ARROW | MENU_FLAG_RIGHT_ARROW, (void *)VIDEO_ITEM_ROTATE); diff --git a/src/emu/validity.c b/src/emu/validity.c index eca3bdadcc3..8cdf1619978 100644 --- a/src/emu/validity.c +++ b/src/emu/validity.c @@ -24,7 +24,7 @@ ***************************************************************************/ #define REPORT_TIMES (0) -#define DETECT_OVERLAPPING_MEMORY (0) +#define DETECT_OVERLAPPING_MEMORY (0) diff --git a/src/emu/video.c b/src/emu/video.c index 4275820d30b..d13aaa0b115 100644 --- a/src/emu/video.c +++ b/src/emu/video.c @@ -69,9 +69,9 @@ struct _screen_state attoseconds_t frame_period; /* attoseconds per frame */ attoseconds_t scantime; /* attoseconds per scanline */ attoseconds_t pixeltime; /* attoseconds per pixel */ - attoseconds_t vblank_period; /* attoseconds per VBLANK period */ - attotime vblank_start_time; /* time of last VBLANK start */ - attotime vblank_end_time; /* time of last VBLANK end */ + attoseconds_t vblank_period; /* attoseconds per VBLANK period */ + attotime vblank_start_time; /* time of last VBLANK start */ + attotime vblank_end_time; /* time of last VBLANK end */ emu_timer * vblank_begin_timer; /* timer to signal VBLANK start */ emu_timer * vblank_end_timer; /* timer to signal VBLANK end */ emu_timer * scanline0_timer; /* scanline 0 timer */ @@ -92,15 +92,15 @@ struct _video_global /* throttling calculations */ osd_ticks_t throttle_last_ticks; /* osd_ticks the last call to throttle */ - attotime throttle_realtime; /* real time the last call to throttle */ - attotime throttle_emutime; /* emulated time the last call to throttle */ - UINT32 throttle_history; /* history of frames where we were fast enough */ + attotime throttle_realtime; /* real time the last call to throttle */ + attotime throttle_emutime; /* emulated time the last call to throttle */ + UINT32 throttle_history; /* history of frames where we were fast enough */ /* dynamic speed computation */ osd_ticks_t speed_last_realtime; /* real time at the last speed calculation */ - attotime speed_last_emutime; /* emulated time at the last speed calculation */ - double speed_percent; /* most recent speed percentage */ - UINT32 partial_updates_this_frame;/* partial update counter this frame */ + attotime speed_last_emutime; /* emulated time at the last speed calculation */ + double speed_percent; /* most recent speed percentage */ + UINT32 partial_updates_this_frame;/* partial update counter this frame */ /* overall speed computation */ UINT32 overall_real_seconds; /* accumulated real seconds at normal speed */ @@ -135,7 +135,7 @@ struct _video_global avi_file * avifile; /* handle to the open movie file */ attotime movie_frame_period; /* period of a single movie frame */ attotime movie_next_frame_time; /* time of next frame */ - UINT32 movie_frame; /* current movie frame number */ + UINT32 movie_frame; /* current movie frame number */ }; diff --git a/src/emu/video/generic.h b/src/emu/video/generic.h index 64eb05cb259..75d5261295c 100644 --- a/src/emu/video/generic.h +++ b/src/emu/video/generic.h @@ -70,7 +70,7 @@ void buffer_spriteram_2(running_machine *machine, UINT8 *ptr, int length); /* set global attributes */ void flip_screen_set(running_machine *machine, int on); -void flip_screen_set_no_update(running_machine *machine, int on); /* will not call update_flip */ +void flip_screen_set_no_update(running_machine *machine, int on); /* will not call update_flip */ void flip_screen_x_set(running_machine *machine, int on); void flip_screen_y_set(running_machine *machine, int on); int flip_screen_get(running_machine *machine); diff --git a/src/emu/video/mc6845.c b/src/emu/video/mc6845.c index 31a106432d6..f623a34a387 100644 --- a/src/emu/video/mc6845.c +++ b/src/emu/video/mc6845.c @@ -826,10 +826,10 @@ void mc6845_update(const device_config *device, bitmap_t *bitmap, const rectangl /* check if the cursor is visible and is on this scanline */ int cursor_visible = mc6845->cursor_state && - (ra >= (mc6845->cursor_start_ras & 0x1f)) && - (ra <= mc6845->cursor_end_ras) && - (mc6845->cursor_addr >= mc6845->current_disp_addr) && - (mc6845->cursor_addr < (mc6845->current_disp_addr + mc6845->horiz_disp)); + (ra >= (mc6845->cursor_start_ras & 0x1f)) && + (ra <= mc6845->cursor_end_ras) && + (mc6845->cursor_addr >= mc6845->current_disp_addr) && + (mc6845->cursor_addr < (mc6845->current_disp_addr + mc6845->horiz_disp)); /* compute the cursor X position, or -1 if not visible */ INT8 cursor_x = cursor_visible ? (mc6845->cursor_addr - mc6845->current_disp_addr) : -1; @@ -1058,7 +1058,7 @@ DEVICE_GET_INFO( mc6845_1 ) /* --- the following bits of info are returned as pointers to data or functions --- */ case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(mc6845_1); break; - default: DEVICE_GET_INFO_CALL(mc6845); break; + default: DEVICE_GET_INFO_CALL(mc6845); break; } } @@ -1073,7 +1073,7 @@ DEVICE_GET_INFO( c6545_1 ) /* --- the following bits of info are returned as pointers to data or functions --- */ case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(c6545_1); break; - default: DEVICE_GET_INFO_CALL(mc6845); break; + default: DEVICE_GET_INFO_CALL(mc6845); break; } } @@ -1088,7 +1088,7 @@ DEVICE_GET_INFO( r6545_1 ) /* --- the following bits of info are returned as pointers to data or functions --- */ case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(r6545_1); break; - default: DEVICE_GET_INFO_CALL(mc6845); break; + default: DEVICE_GET_INFO_CALL(mc6845); break; } } @@ -1103,7 +1103,7 @@ DEVICE_GET_INFO( h46505 ) /* --- the following bits of info are returned as pointers to data or functions --- */ case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(h46505); break; - default: DEVICE_GET_INFO_CALL(mc6845); break; + default: DEVICE_GET_INFO_CALL(mc6845); break; } } @@ -1118,7 +1118,7 @@ DEVICE_GET_INFO( hd6845 ) /* --- the following bits of info are returned as pointers to data or functions --- */ case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(hd6845); break; - default: DEVICE_GET_INFO_CALL(mc6845); break; + default: DEVICE_GET_INFO_CALL(mc6845); break; } } @@ -1133,6 +1133,6 @@ DEVICE_GET_INFO( sy6545_1 ) /* --- the following bits of info are returned as pointers to data or functions --- */ case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(sy6545_1); break; - default: DEVICE_GET_INFO_CALL(mc6845); break; + default: DEVICE_GET_INFO_CALL(mc6845); break; } } diff --git a/src/emu/video/mc6845.h b/src/emu/video/mc6845.h index 624efbd7d43..6d9e771280f 100644 --- a/src/emu/video/mc6845.h +++ b/src/emu/video/mc6845.h @@ -16,9 +16,9 @@ #define MC6845_1 DEVICE_GET_INFO_NAME(mc6845_1) #define R6545_1 DEVICE_GET_INFO_NAME(r6545_1) #define C6545_1 DEVICE_GET_INFO_NAME(c6545_1) -#define H46505 DEVICE_GET_INFO_NAME(h46505) -#define HD6845 DEVICE_GET_INFO_NAME(hd6845) -#define SY6545_1 DEVICE_GET_INFO_NAME(sy6545_1) +#define H46505 DEVICE_GET_INFO_NAME(h46505) +#define HD6845 DEVICE_GET_INFO_NAME(hd6845) +#define SY6545_1 DEVICE_GET_INFO_NAME(sy6545_1) #define MDRV_MC6845_ADD(_tag, _variant, _clock, _config) \ @@ -31,11 +31,11 @@ typedef void * (*mc6845_begin_update_func)(const device_config *device, bitmap_t #define MC6845_BEGIN_UPDATE(name) void *name(const device_config *device, bitmap_t *bitmap, const rectangle *cliprect) typedef void (*mc6845_update_row_func)(const device_config *device, bitmap_t *bitmap, - const rectangle *cliprect, UINT16 ma, UINT8 ra, - UINT16 y, UINT8 x_count, INT8 cursor_x, void *param); + const rectangle *cliprect, UINT16 ma, UINT8 ra, + UINT16 y, UINT8 x_count, INT8 cursor_x, void *param); #define MC6845_UPDATE_ROW(name) void name(const device_config *device, bitmap_t *bitmap, \ - const rectangle *cliprect, UINT16 ma, UINT8 ra, \ - UINT16 y, UINT8 x_count, INT8 cursor_x, void *param) + const rectangle *cliprect, UINT16 ma, UINT8 ra, \ + UINT16 y, UINT8 x_count, INT8 cursor_x, void *param) typedef void (*mc6845_end_update_func)(const device_config *device, bitmap_t *bitmap, const rectangle *cliprect, void *param); #define MC6845_END_UPDATE(name) void name(const device_config *device, bitmap_t *bitmap, const rectangle *cliprect, void *param) diff --git a/src/emu/video/poly.c b/src/emu/video/poly.c index 6d46061b83a..f94927e66e9 100644 --- a/src/emu/video/poly.c +++ b/src/emu/video/poly.c @@ -74,8 +74,8 @@ struct _poly_edge int index; /* index of this edge */ const poly_vertex * v1; /* pointer to first vertex */ const poly_vertex * v2; /* pointer to second vertex */ - float dxdy; /* dx/dy along the edge */ - float dpdy[MAX_VERTEX_PARAMS];/* per-parameter dp/dy values */ + float dxdy; /* dx/dy along the edge */ + float dpdy[MAX_VERTEX_PARAMS];/* per-parameter dp/dy values */ }; @@ -85,7 +85,7 @@ struct _poly_section { const poly_edge * ledge; /* pointer to left edge */ const poly_edge * redge; /* pointer to right edge */ - float ybottom; /* bottom of this section */ + float ybottom; /* bottom of this section */ }; diff --git a/src/emu/video/resnet.h b/src/emu/video/resnet.h index 8278957bb68..c7f574fc855 100644 --- a/src/emu/video/resnet.h +++ b/src/emu/video/resnet.h @@ -87,9 +87,9 @@ /* Some aliases */ -#define RES_NET_VIN_MB7052 RES_NET_VIN_TTL_OUT -#define RES_NET_VIN_MB7053 RES_NET_VIN_TTL_OUT -#define RES_NET_VIN_28S42 RES_NET_VIN_TTL_OUT +#define RES_NET_VIN_MB7052 RES_NET_VIN_TTL_OUT +#define RES_NET_VIN_MB7053 RES_NET_VIN_TTL_OUT +#define RES_NET_VIN_28S42 RES_NET_VIN_TTL_OUT /* Structures */ @@ -150,7 +150,7 @@ struct _res_net_decode_info { int end; UINT16 offset[3 * RES_NET_MAX_COMP]; INT16 shift[3 * RES_NET_MAX_COMP]; - UINT16 mask[3 * RES_NET_MAX_COMP]; + UINT16 mask[3 * RES_NET_MAX_COMP]; }; /* return a single value for one channel */ diff --git a/src/emu/video/saa5050.c b/src/emu/video/saa5050.c index d84a148ba02..052c80bc7e2 100644 --- a/src/emu/video/saa5050.c +++ b/src/emu/video/saa5050.c @@ -291,7 +291,7 @@ void saa5050_update( const device_config *device, bitmap_t *bitmap, const rectan } if (saa5050->flags & SAA5050_HOLDGR) - code = saa5050->prvchr; + code = saa5050->prvchr; else code = 32; } diff --git a/src/emu/video/tms9927.c b/src/emu/video/tms9927.c index ff1608561c2..293ef7b3b66 100644 --- a/src/emu/video/tms9927.c +++ b/src/emu/video/tms9927.c @@ -43,7 +43,7 @@ struct _tms9927_state UINT8 reg[9]; UINT8 start_datarow; UINT8 reset; - UINT8 hpixels_per_column; + UINT8 hpixels_per_column; /* derived state; no need to save */ UINT8 valid_config; diff --git a/src/emu/video/tms9928a.c b/src/emu/video/tms9928a.c index 5e07c79532f..198bf13fcb4 100644 --- a/src/emu/video/tms9928a.c +++ b/src/emu/video/tms9928a.c @@ -394,9 +394,9 @@ VIDEO_UPDATE( tms9928a ) INT32 BackColour = tms.Regs[7] & 15; rgb_t oldcolor = palette_get_color(screen->machine, 0); - if (!BackColour) BackColour=1; - /* note we preserve the alpha here; this is so that it can be controlled independently */ - /* see cliffhgr.c for an example */ + if (!BackColour) BackColour=1; + /* note we preserve the alpha here; this is so that it can be controlled independently */ + /* see cliffhgr.c for an example */ palette_set_color(screen->machine, 0, (TMS9928A_palette[BackColour] & MAKE_ARGB(0,255,255,255)) | (oldcolor & MAKE_ARGB(255,0,0,0))); if (! (tms.Regs[1] & 0x40)) diff --git a/src/emu/video/v9938.c b/src/emu/video/v9938.c index 47f54235114..c0886cfa192 100644 --- a/src/emu/video/v9938.c +++ b/src/emu/video/v9938.c @@ -246,8 +246,8 @@ static void v9938_palette_w(UINT8 data) vdp->palReg[indexp*2+1] = data & 0x07; /* update palette */ vdp->pal_ind16[indexp] = (((int)vdp->pal_write << 2) & 0x01c0) | - (((int)data << 3) & 0x0038) | - ((int)vdp->pal_write & 0x0007); + (((int)data << 3) & 0x0038) | + ((int)vdp->pal_write & 0x0007); vdp->contReg[0x10] = (vdp->contReg[0x10] + 1) & 15; vdp->pal_write_first = 0; @@ -328,7 +328,7 @@ static void v9938_vram_write (int offset, int data) if ( (vdp->mode == V9938_MODE_GRAPHIC6) || (vdp->mode == V9938_MODE_GRAPHIC7) ) { newoffset = ((offset & 1) << 16) | (offset >> 1); - if (newoffset < vdp->vram_size) + if (newoffset < vdp->vram_size) vdp->vram[newoffset] = data; } else @@ -835,10 +835,10 @@ READ8_HANDLER( v9938_1_status_r ) #define V9938_BPP (16) #define V9938_WIDTH (512 + 32) #include "v9938mod.c" -#undef V9938_WIDTH +#undef V9938_WIDTH #define V9938_WIDTH (256 + 16) #include "v9938mod.c" -#undef V9938_WIDTH +#undef V9938_WIDTH #undef V9938_BPP static void v9938_sprite_mode1 (int line, UINT8 *col) @@ -932,13 +932,13 @@ static void v9938_sprite_mode1 (int line, UINT8 *col) { if (col[x+1] & 0x40) { - /* we have a collision! */ + /* we have a collision! */ if (p2 < 4) vdp->statReg[0] |= 0x20; } if ( !(col[x+1] & 0x80) ) { - if (c || (vdp->contReg[8] & 0x20) ) + if (c || (vdp->contReg[8] & 0x20) ) col[x+1] |= 0xc0 | c; else col[x+1] |= 0x80; diff --git a/src/emu/video/v9938mod.c b/src/emu/video/v9938mod.c index daee5f7957b..68c71437200 100644 --- a/src/emu/video/v9938mod.c +++ b/src/emu/video/v9938mod.c @@ -26,7 +26,7 @@ #define V9938_BORDER_FUNC(name) \ static void FNAME (name) (const pen_t *pens, PEN_TYPE *ln) -#define V9938_MODE_FUNC(name) \ +#define V9938_MODE_FUNC(name) \ static void FNAME (name) (const pen_t *pens, PEN_TYPE *ln, int line) #define V9938_SPRITE_FUNC(name) \ @@ -325,7 +325,7 @@ V9938_MODE_FUNC (mode_graphic23) patternmask = (vdp->contReg[4] & 0x03) * 256 | (colourmask & 255); nametbl = vdp->vram + (vdp->contReg[2] << 10); - colourtbl = vdp->vram + ((vdp->contReg[3] & 0x80) << 6) + (vdp->contReg[10] << 14); + colourtbl = vdp->vram + ((vdp->contReg[3] & 0x80) << 6) + (vdp->contReg[10] << 14); patterntbl = vdp->vram + ((vdp->contReg[4] & 0x3c) << 11); line2 = (line + vdp->contReg[23]) & 255; @@ -449,7 +449,7 @@ V9938_MODE_FUNC (mode_graphic5) *ln++ = pen_bg0[colour>>6]; *ln++ = pen_bg1[(colour>>4)&3]; *ln++ = pen_bg0[(colour>>2)&3]; - *ln++ = pen_bg1[(colour&3)]; + *ln++ = pen_bg1[(colour&3)]; } pen_bg1[0] = pens[vdp->pal_ind16[(vdp->contReg[7]&0x03)]]; @@ -495,7 +495,7 @@ V9938_MODE_FUNC (mode_graphic6) line2 = ((line + vdp->contReg[23]) & linemask) & 255; nametbl = line2 << 8 ; - if ( (vdp->contReg[2] & 0x20) && (V9938_SECOND_FIELD) ) + if ( (vdp->contReg[2] & 0x20) && (V9938_SECOND_FIELD) ) nametbl += 0x10000; pen_bg = pens[vdp->pal_ind16[(vdp->contReg[7]&0x0f)]]; @@ -555,12 +555,12 @@ V9938_MODE_FUNC (mode_graphic7) int line2, linemask, x, xx, nametbl; PEN_TYPE pen, pen_bg; - linemask = ((vdp->contReg[2] & 0x1f) << 3) | 7; + linemask = ((vdp->contReg[2] & 0x1f) << 3) | 7; line2 = ((line + vdp->contReg[23]) & linemask) & 255; nametbl = line2 << 8; - if ( (vdp->contReg[2] & 0x20) && (V9938_SECOND_FIELD) ) + if ( (vdp->contReg[2] & 0x20) && (V9938_SECOND_FIELD) ) nametbl += 0x10000; pen_bg = pens[vdp->pal_ind256[vdp->contReg[7]]]; @@ -593,16 +593,16 @@ V9938_MODE_FUNC (mode_graphic7) } else { - for (x=0;x<256;x++) + for (x=0;x<256;x++) { colour = vdp->vram[((nametbl&1) << 16) | (nametbl>>1)]; pen = pens[vdp->pal_ind256[colour]]; *ln++ = pen; #if (V9938_WIDTH > 512) - *ln++ = pen; + *ln++ = pen; #endif nametbl++; - } + } } xx = 16 - vdp->offset_x; diff --git a/src/emu/video/vooddefs.h b/src/emu/video/vooddefs.h index 02aa816524b..e2ff3fce926 100644 --- a/src/emu/video/vooddefs.h +++ b/src/emu/video/vooddefs.h @@ -990,17 +990,17 @@ static const UINT8 dither_matrix_2x2[16] = *************************************/ #define EXTRACT_565_TO_888(val, a, b, c) \ - (a) = (((val) >> 8) & 0xf8) | (((val) >> 13) & 0x07); \ + (a) = (((val) >> 8) & 0xf8) | (((val) >> 13) & 0x07); \ (b) = (((val) >> 3) & 0xfc) | (((val) >> 9) & 0x03); \ (c) = (((val) << 3) & 0xf8) | (((val) >> 2) & 0x07); \ #define EXTRACT_x555_TO_888(val, a, b, c) \ - (a) = (((val) >> 7) & 0xf8) | (((val) >> 12) & 0x07); \ + (a) = (((val) >> 7) & 0xf8) | (((val) >> 12) & 0x07); \ (b) = (((val) >> 2) & 0xf8) | (((val) >> 7) & 0x07); \ (c) = (((val) << 3) & 0xf8) | (((val) >> 2) & 0x07); \ #define EXTRACT_555x_TO_888(val, a, b, c) \ - (a) = (((val) >> 8) & 0xf8) | (((val) >> 13) & 0x07); \ + (a) = (((val) >> 8) & 0xf8) | (((val) >> 13) & 0x07); \ (b) = (((val) >> 3) & 0xf8) | (((val) >> 8) & 0x07); \ (c) = (((val) << 2) & 0xf8) | (((val) >> 3) & 0x07); \ @@ -1084,7 +1084,7 @@ static const UINT8 dither_matrix_2x2[16] = #define FBZCP_CC_ASELECT(val) (((val) >> 2) & 3) #define FBZCP_CC_LOCALSELECT(val) (((val) >> 4) & 1) #define FBZCP_CCA_LOCALSELECT(val) (((val) >> 5) & 3) -#define FBZCP_CC_LOCALSELECT_OVERRIDE(val) (((val) >> 7) & 1) +#define FBZCP_CC_LOCALSELECT_OVERRIDE(val) (((val) >> 7) & 1) #define FBZCP_CC_ZERO_OTHER(val) (((val) >> 8) & 1) #define FBZCP_CC_SUB_CLOCAL(val) (((val) >> 9) & 1) #define FBZCP_CC_MSELECT(val) (((val) >> 10) & 7) @@ -1445,9 +1445,9 @@ struct _ncc_table { UINT8 dirty; /* is the texel lookup dirty? */ voodoo_reg * reg; /* pointer to our registers */ - INT32 ir[4], ig[4], ib[4]; /* I values for R,G,B */ - INT32 qr[4], qg[4], qb[4]; /* Q values for R,G,B */ - INT32 y[16]; /* Y values */ + INT32 ir[4], ig[4], ib[4]; /* I values for R,G,B */ + INT32 qr[4], qg[4], qb[4]; /* Q values for R,G,B */ + INT32 y[16]; /* Y values */ rgb_t * palette; /* pointer to associated RGB palette */ rgb_t * palettea; /* pointer to associated ARGB palette */ rgb_t texel[256]; /* texel lookup */ @@ -1514,7 +1514,7 @@ struct _setup_vertex { float x, y; /* X, Y coordinates */ float a, r, g, b; /* A, R, G, B values */ - float z, wb; /* Z and broadcast W values */ + float z, wb; /* Z and broadcast W values */ float w0, s0, t0; /* W, S, T for TMU 0 */ float w1, s1, t1; /* W, S, T for TMU 1 */ }; @@ -1574,10 +1574,10 @@ struct _fbi_state stats_block lfb_stats; /* LFB-access statistics */ UINT8 sverts; /* number of vertices ready */ - setup_vertex svert[3]; /* 3 setup vertices */ + setup_vertex svert[3]; /* 3 setup vertices */ fifo_state fifo; /* framebuffer memory fifo */ - cmdfifo_info cmdfifo[2]; /* command FIFOs */ + cmdfifo_info cmdfifo[2]; /* command FIFOs */ UINT8 fogblend[64]; /* 64-entry fog table */ UINT8 fogdelta[64]; /* 64-entry fog table */ @@ -1647,7 +1647,7 @@ struct _poly_extra_data INT64 dw1dy; /* delta W per Y */ INT32 lodbase1; /* used during rasterization */ - UINT16 dither[16]; /* dither matrix, for fastfill */ + UINT16 dither[16]; /* dither matrix, for fastfill */ }; @@ -1675,7 +1675,7 @@ struct _voodoo_state UINT8 type; /* type of system */ UINT8 chipmask; /* mask for which chips are available */ UINT32 freq; /* operating frequency */ - attoseconds_t attoseconds_per_cycle; /* attoseconds per cycle */ + attoseconds_t attoseconds_per_cycle; /* attoseconds per cycle */ UINT32 extra_cycles; /* extra cycles not yet accounted for */ int trigger; /* trigger used for stalling */ @@ -1689,13 +1689,13 @@ struct _voodoo_state fbi_state fbi; /* FBI states */ tmu_state tmu[MAX_TMU]; /* TMU states */ - tmu_shared_state tmushare; /* TMU shared state */ - banshee_info banshee; /* Banshee state */ + tmu_shared_state tmushare; /* TMU shared state */ + banshee_info banshee; /* Banshee state */ poly_manager * poly; /* polygon manager */ stats_block * thread_stats; /* per-thread statistics */ - voodoo_stats stats; /* internal statistics */ + voodoo_stats stats; /* internal statistics */ offs_t last_status_pc; /* PC of last status description (for logging) */ UINT32 last_status_value; /* value of last status read (for logging) */ @@ -2048,8 +2048,8 @@ INLINE UINT32 compute_raster_hash(const raster_info *info) const UINT8 *dither4 = NULL; \ const UINT8 *dither = NULL \ -#define COMPUTE_DITHER_POINTERS(FBZMODE, YY) \ -do \ +#define COMPUTE_DITHER_POINTERS(FBZMODE, YY) \ +do \ { \ /* compute the dithering pointers */ \ if (FBZMODE_ENABLE_DITHERING(FBZMODE)) \ @@ -2070,7 +2070,7 @@ do \ while (0) #define APPLY_DITHER(FBZMODE, XX, DITHER_LOOKUP, RR, GG, BB) \ -do \ +do \ { \ /* apply dithering */ \ if (FBZMODE_ENABLE_DITHERING(FBZMODE)) \ @@ -2101,7 +2101,7 @@ while (0) *************************************/ #define CLAMPED_ARGB(ITERR, ITERG, ITERB, ITERA, FBZCP, RESULT) \ -do \ +do \ { \ INT32 r = (INT32)(ITERR) >> 12; \ INT32 g = (INT32)(ITERG) >> 12; \ @@ -2145,12 +2145,12 @@ do \ RESULT.rgb.b = (b < 0) ? 0 : (b > 0xff) ? 0xff : b; \ RESULT.rgb.a = (a < 0) ? 0 : (a > 0xff) ? 0xff : a; \ } \ -} \ +} \ while (0) #define CLAMPED_Z(ITERZ, FBZCP, RESULT) \ -do \ +do \ { \ (RESULT) = (INT32)(ITERZ) >> 12; \ if (FBZCP_RGBZW_CLAMP(FBZCP) == 0) \ @@ -2167,12 +2167,12 @@ do \ { \ CLAMP((RESULT), 0, 0xffff); \ } \ -} \ +} \ while (0) #define CLAMPED_W(ITERW, FBZCP, RESULT) \ -do \ +do \ { \ (RESULT) = (INT16)((ITERW) >> 32); \ if (FBZCP_RGBZW_CLAMP(FBZCP) == 0) \ @@ -2188,7 +2188,7 @@ do \ { \ CLAMP((RESULT), 0, 0xff); \ } \ -} \ +} \ while (0) @@ -2200,7 +2200,7 @@ while (0) *************************************/ #define APPLY_CHROMAKEY(VV, STATS, FBZMODE, COLOR) \ -do \ +do \ { \ if (FBZMODE_ENABLE_CHROMAKEY(FBZMODE)) \ { \ @@ -2274,7 +2274,7 @@ while (0) *************************************/ #define APPLY_ALPHAMASK(VV, STATS, FBZMODE, AA) \ -do \ +do \ { \ if (FBZMODE_ENABLE_ALPHA_MASK(FBZMODE)) \ { \ @@ -2296,7 +2296,7 @@ while (0) *************************************/ #define APPLY_ALPHATEST(VV, STATS, ALPHAMODE, AA) \ -do \ +do \ { \ if (ALPHAMODE_ALPHATEST(ALPHAMODE)) \ { \ @@ -2655,7 +2655,7 @@ while (0) *************************************/ #define TEXTURE_PIPELINE(TT, XX, DITHER4, TEXMODE, COTHER, LOOKUP, LODBASE, ITERS, ITERT, ITERW, RESULT) \ -do \ +do \ { \ INT32 blendr, blendg, blendb, blenda; \ INT32 tr, tg, tb, ta; \ @@ -2982,7 +2982,7 @@ do \ RESULT.u ^= 0x00ffffff; \ if (TEXMODE_TCA_INVERT_OUTPUT(TEXMODE)) \ RESULT.rgb.a ^= 0xff; \ -} \ +} \ while (0) @@ -2994,7 +2994,7 @@ while (0) *************************************/ #define PIXEL_PIPELINE_BEGIN(VV, STATS, XX, YY, FBZCOLORPATH, FBZMODE, ITERZ, ITERW) \ -do \ +do \ { \ INT32 depthval, wfloat; \ INT32 prefogr, prefogg, prefogb; \ @@ -3154,7 +3154,7 @@ do \ prefogr = r; \ prefogg = g; \ prefogb = b; \ - APPLY_FOGGING(VV, FOGMODE, FBZCOLORPATH, XX, DITHER4, r, g, b, \ + APPLY_FOGGING(VV, FOGMODE, FBZCOLORPATH, XX, DITHER4, r, g, b, \ ITERZ, ITERW, ITERAXXX); \ \ /* perform alpha blending */ \ @@ -3234,7 +3234,7 @@ while (0) INT32 r, g, b, a; */ #define COLORPATH_PIPELINE(VV, STATS, FBZCOLORPATH, FBZMODE, ALPHAMODE, TEXELARGB, ITERZ, ITERW, ITERARGB) \ -do \ +do \ { \ INT32 blendr, blendg, blendb, blenda; \ rgb_union c_other; \ @@ -3255,7 +3255,7 @@ do \ c_other.u = (VV)->reg[color1].u; \ break; \ \ - default: /* reserved */ \ + default: /* reserved */ \ c_other.u = 0; \ break; \ } \ @@ -3278,7 +3278,7 @@ do \ c_other.rgb.a = (VV)->reg[color1].rgb.a; \ break; \ \ - default: /* reserved */ \ + default: /* reserved */ \ c_other.rgb.a = 0; \ break; \ } \ @@ -3365,7 +3365,7 @@ do \ /* blend RGB */ \ switch (FBZCP_CC_MSELECT(FBZCOLORPATH)) \ { \ - default: /* reserved */ \ + default: /* reserved */ \ case 0: /* 0 */ \ blendr = blendg = blendb = 0; \ break; \ @@ -3398,7 +3398,7 @@ do \ /* blend alpha */ \ switch (FBZCP_CCA_MSELECT(FBZCOLORPATH)) \ { \ - default: /* reserved */ \ + default: /* reserved */ \ case 0: /* 0 */ \ blenda = 0; \ break; \ @@ -3606,7 +3606,7 @@ static void raster_##name(void *destbase, INT32 y, const poly_extent *extent, co \ /* pixel pipeline part 2 handles fog, alpha, and final output */ \ PIXEL_PIPELINE_END(v, stats, dither, dither4, dither_lookup, x, dest, depth, \ - FBZMODE, FBZCOLORPATH, ALPHAMODE, FOGMODE, \ + FBZMODE, FBZCOLORPATH, ALPHAMODE, FOGMODE, \ iterz, iterw, iterargb); \ \ /* update the iterated parameters */ \ diff --git a/src/ldplayer/ldplayer.c b/src/ldplayer/ldplayer.c index 9d9bea5c70c..dade07800b0 100644 --- a/src/ldplayer/ldplayer.c +++ b/src/ldplayer/ldplayer.c @@ -155,7 +155,7 @@ static chd_file *get_disc(const device_config *device) static void process_commands(const device_config *laserdisc) { input_port_value controls = input_port_read(laserdisc->machine, "controls"); - int number; + int number; /* step backwards */ if (!(last_controls & 0x01) && (controls & 0x01)) @@ -302,7 +302,7 @@ static TIMER_CALLBACK( pr8210_bit_callback ) if (bitsleft != 0) { /* assert the line and set a timer for deassertion */ - laserdisc_line_w(laserdisc, LASERDISC_LINE_CONTROL, ASSERT_LINE); + laserdisc_line_w(laserdisc, LASERDISC_LINE_CONTROL, ASSERT_LINE); timer_set(machine, ATTOTIME_IN_USEC(250), ptr, 0, pr8210_bit_off_callback); /* space 0 bits apart by 1msec, and 1 bits by 2msec */ diff --git a/src/lib/expat/xmlparse.c b/src/lib/expat/xmlparse.c index ed9344ca8ff..53ae3f4b2bf 100644 --- a/src/lib/expat/xmlparse.c +++ b/src/lib/expat/xmlparse.c @@ -3751,7 +3751,7 @@ doProlog(XML_Parser parser, #endif /* XML_DTD */ dtd->hasParamEntityRefs = XML_TRUE; if (startDoctypeDeclHandler) { - XML_Char *tem; + XML_Char *tem; if (!XmlIsPublicId(enc, s, next, eventPP)) return XML_ERROR_PUBLICID; tem = poolStoreString(&tempPool, enc, diff --git a/src/lib/util/aviio.c b/src/lib/util/aviio.c index d7dd74adeb1..ef2ebc62e81 100644 --- a/src/lib/util/aviio.c +++ b/src/lib/util/aviio.c @@ -175,7 +175,7 @@ struct _avi_stream struct _avi_file { /* shared data */ - osd_file * file; /* pointer to open file */ + osd_file * file; /* pointer to open file */ int type; /* type of access (read/create) */ avi_movie_info info; /* movie info structure */ UINT8 * tempbuffer; /* temporary buffer */ @@ -1956,7 +1956,7 @@ static avi_error write_strh_chunk(avi_file *file, avi_stream *stream, int initia /* video-stream specific data */ if (stream->type == STREAMTYPE_VIDS) { - put_32bits(&buffer[4], /* fccHandler */ + put_32bits(&buffer[4], /* fccHandler */ (stream->format == FORMAT_HFYU) ? HANDLER_HFYU : HANDLER_DIB); put_32bits(&buffer[36], /* dwSuggestedBufferSize */ stream->width * stream->height * 4); @@ -2017,7 +2017,7 @@ static avi_error write_strf_chunk(avi_file *file, avi_stream *stream) put_16bits(&buffer[0], 1); /* wFormatTag */ put_16bits(&buffer[2], stream->channels); /* nChannels */ put_32bits(&buffer[4], stream->samplerate); /* nSamplesPerSec */ - put_32bits(&buffer[8], /* nAvgBytesPerSec */ + put_32bits(&buffer[8], /* nAvgBytesPerSec */ stream->samplerate * stream->channels * (stream->samplebits / 8)); put_16bits(&buffer[12], /* nBlockAlign */ stream->channels * (stream->samplebits / 8)); diff --git a/src/lib/util/cdrom.h b/src/lib/util/cdrom.h index 33675e220e8..d8a37c0b7a6 100644 --- a/src/lib/util/cdrom.h +++ b/src/lib/util/cdrom.h @@ -75,7 +75,7 @@ enum enum { - CD_SUB_NORMAL = 0, /* "cooked" 96 bytes per sector */ + CD_SUB_NORMAL = 0, /* "cooked" 96 bytes per sector */ CD_SUB_RAW, /* raw uninterleaved 96 bytes per sector */ CD_SUB_NONE /* no subcode data stored */ }; diff --git a/src/lib/util/chd.c b/src/lib/util/chd.c index de1516c83d9..c83f6b81c5f 100644 --- a/src/lib/util/chd.c +++ b/src/lib/util/chd.c @@ -106,7 +106,7 @@ struct _codec_interface const char *compname; /* name of the algorithm */ UINT8 lossy; /* is this a lossy algorithm? */ chd_error (*init)(chd_file *chd); /* codec initialize */ - void (*free)(chd_file *chd); /* codec free */ + void (*free)(chd_file *chd); /* codec free */ chd_error (*compress)(chd_file *chd, const void *src, UINT32 *complen); /* compress data */ chd_error (*decompress)(chd_file *chd, UINT32 complen, void *dst); /* decompress data */ chd_error (*config)(chd_file *chd, int param, void *config); /* configure */ @@ -153,7 +153,7 @@ struct _chd_file core_file * file; /* handle to the open core file */ UINT8 owns_file; /* flag indicating if this file should be closed on chd_close() */ - chd_header header; /* header, extracted from file */ + chd_header header; /* header, extracted from file */ chd_file * parent; /* pointer to parent file, or NULL */ @@ -176,13 +176,13 @@ struct _chd_file UINT32 maxhunk; /* maximum hunk accessed */ UINT8 compressing; /* are we compressing? */ - struct MD5Context compmd5; /* running MD5 during compression */ - struct sha1_ctx compsha1; /* running SHA1 during compression */ + struct MD5Context compmd5; /* running MD5 during compression */ + struct sha1_ctx compsha1; /* running SHA1 during compression */ UINT32 comphunk; /* next hunk we will compress */ UINT8 verifying; /* are we verifying? */ struct MD5Context vermd5; /* running MD5 during verification */ - struct sha1_ctx versha1; /* running SHA1 during verification */ + struct sha1_ctx versha1; /* running SHA1 during verification */ UINT32 verhunk; /* next hunk we will verify */ osd_work_queue * workqueue; /* pointer to work queue for async operations */ diff --git a/src/lib/util/corestr.c b/src/lib/util/corestr.c index fa119ba6eb5..cff0eb32f4c 100644 --- a/src/lib/util/corestr.c +++ b/src/lib/util/corestr.c @@ -50,12 +50,12 @@ int core_stricmp(const char *s1, const char *s2) { for (;;) - { + { int c1 = tolower((UINT8)*s1++); int c2 = tolower((UINT8)*s2++); if (c1 == 0 || c1 != c2) return c1 - c2; - } + } } @@ -67,12 +67,12 @@ int core_strnicmp(const char *s1, const char *s2, size_t n) { size_t i; for (i = 0; i < n; i++) - { + { int c1 = tolower((UINT8)*s1++); int c2 = tolower((UINT8)*s2++); if (c1 == 0 || c1 != c2) return c1 - c2; - } + } return 0; } diff --git a/src/lib/util/harddisk.c b/src/lib/util/harddisk.c index 0aa1cf32178..128b5372db3 100644 --- a/src/lib/util/harddisk.c +++ b/src/lib/util/harddisk.c @@ -48,7 +48,7 @@ struct _hard_disk_file { chd_file * chd; /* CHD file */ - hard_disk_info info; /* hard disk info */ + hard_disk_info info; /* hard disk info */ UINT32 hunksectors; /* sectors per hunk */ UINT32 cachehunk; /* which hunk is cached */ UINT8 * cache; /* cache of the current hunk */ diff --git a/src/lib/util/huffman.c b/src/lib/util/huffman.c index 3eee846a019..a03f192e580 100644 --- a/src/lib/util/huffman.c +++ b/src/lib/util/huffman.c @@ -189,7 +189,7 @@ struct _huffman_context UINT8 prevdata; /* value of the previous data (for delta-RLE encoding) */ UINT32 datahisto[MAX_HUFFMAN_CODES]; /* histogram of data values */ int rleremaining; /* number of RLE bytes remaining (for delta-RLE encoding) */ - huffman_node huffnode[MAX_HUFFMAN_NODES]; /* array of nodes */ + huffman_node huffnode[MAX_HUFFMAN_NODES]; /* array of nodes */ huffman_lookup_value * lookup; /* pointer to the lookup table */ }; diff --git a/src/lib/util/options.c b/src/lib/util/options.c index 27cc6fff2a1..aeb6d187467 100644 --- a/src/lib/util/options.c +++ b/src/lib/util/options.c @@ -64,7 +64,7 @@ typedef struct _options_data options_data; typedef union _options_range_parameter options_range_parameter; union _options_range_parameter { - float f; + float f; int i; }; diff --git a/src/lib/util/palette.h b/src/lib/util/palette.h index a62dffe434b..53c92ee3842 100644 --- a/src/lib/util/palette.h +++ b/src/lib/util/palette.h @@ -68,7 +68,7 @@ typedef struct _palette_client palette_client; ***************************************************************************/ /* macros to assemble rgb_t values */ -#define MAKE_ARGB(a,r,g,b) ((((rgb_t)(a) & 0xff) << 24) | (((rgb_t)(r) & 0xff) << 16) | (((rgb_t)(g) & 0xff) << 8) | ((rgb_t)(b) & 0xff)) +#define MAKE_ARGB(a,r,g,b) ((((rgb_t)(a) & 0xff) << 24) | (((rgb_t)(r) & 0xff) << 16) | (((rgb_t)(g) & 0xff) << 8) | ((rgb_t)(b) & 0xff)) #define MAKE_RGB(r,g,b) (MAKE_ARGB(255,r,g,b)) /* macros to extract components from rgb_t values */ diff --git a/src/lib/util/pool.c b/src/lib/util/pool.c index 892e1760887..48b5791b304 100644 --- a/src/lib/util/pool.c +++ b/src/lib/util/pool.c @@ -76,7 +76,7 @@ struct _object_entry object_entry * globalprev; objtype_entry * type; void * object; - size_t size; + size_t size; const char * file; int line; }; @@ -99,7 +99,7 @@ struct _object_pool object_entry * freelist; object_entry_block *blocklist; objtype_entry * typelist; - void (*fail)(const char *message); + void (*fail)(const char *message); }; diff --git a/src/mame/audio/blockade.c b/src/mame/audio/blockade.c index 67a5310a124..a28c42c53ce 100644 --- a/src/mame/audio/blockade.c +++ b/src/mame/audio/blockade.c @@ -11,8 +11,8 @@ * along with proper mixing and volume control */ -#define BLOCKADE_NOTE_DATA NODE_01 -#define BLOCKADE_NOTE NODE_02 +#define BLOCKADE_NOTE_DATA NODE_01 +#define BLOCKADE_NOTE NODE_02 DISCRETE_SOUND_START(blockade) DISCRETE_INPUT_DATA (BLOCKADE_NOTE_DATA) diff --git a/src/mame/audio/bzone.c b/src/mame/audio/bzone.c index 384d3bad5c8..53e066cb070 100644 --- a/src/mame/audio/bzone.c +++ b/src/mame/audio/bzone.c @@ -114,21 +114,21 @@ D0 explosion enable gates a noise generator static const discrete_lfsr_desc bzone_lfsr = { DISC_CLK_IS_FREQ, - 16, /* Bit Length */ - 0, /* Reset Value */ - 3, /* Use Bit 10 (QC of second LS164) as F0 input 0 */ - 14, /* Use Bit 23 (QH of third LS164) as F0 input 1 */ + 16, /* Bit Length */ + 0, /* Reset Value */ + 3, /* Use Bit 10 (QC of second LS164) as F0 input 0 */ + 14, /* Use Bit 23 (QH of third LS164) as F0 input 1 */ DISC_LFSR_XOR, /* F0 is XOR */ - DISC_LFSR_NOT_IN0, /* F1 is inverted F0*/ - DISC_LFSR_REPLACE, /* F2 replaces the shifted register contents */ - 0x000001, /* Everything is shifted into the first bit only */ + DISC_LFSR_NOT_IN0, /* F1 is inverted F0*/ + DISC_LFSR_REPLACE, /* F2 replaces the shifted register contents */ + 0x000001, /* Everything is shifted into the first bit only */ DISC_LFSR_FLAG_OUTPUT_SR_SN1, /* output the complete shift register to sub node 1*/ - 15 /* Output bit */ + 15 /* Output bit */ }; static const discrete_op_amp_filt_info bzone_explo_0 = { - BZ_R18 + BZ_R19, 0, 0, 0, /* r1, r2, r3, r4 */ + BZ_R18 + BZ_R19, 0, 0, 0, /* r1, r2, r3, r4 */ BZ_R33, /* rF */ BZ_C22, 0, 0, /* c1, c2, c3 */ 0, /* vRef - not used */ @@ -137,7 +137,7 @@ static const discrete_op_amp_filt_info bzone_explo_0 = static const discrete_op_amp_filt_info bzone_explo_1 = { - BZ_R18, 0, 0, 0, /* r1, r2, r3, r4 */ + BZ_R18, 0, 0, 0, /* r1, r2, r3, r4 */ BZ_R33, /* rF */ BZ_C22, 0, 0, /* c1, c2, c3 */ 0, /* vRef - not used */ @@ -146,7 +146,7 @@ static const discrete_op_amp_filt_info bzone_explo_1 = static const discrete_op_amp_filt_info bzone_shell_0 = { - BZ_R13 + BZ_R12, 0, 0, 0, /* r1, r2, r3, r4 */ + BZ_R13 + BZ_R12, 0, 0, 0, /* r1, r2, r3, r4 */ BZ_R32, /* rF */ BZ_C21, 0, 0, /* c1, c2, c3 */ 0, /* vRef - not used */ @@ -155,7 +155,7 @@ static const discrete_op_amp_filt_info bzone_shell_0 = static const discrete_op_amp_filt_info bzone_shell_1 = { - BZ_R13, 0, 0, 0, /* r1, r2, r3, r4 */ + BZ_R13, 0, 0, 0, /* r1, r2, r3, r4 */ BZ_R32, /* rF */ BZ_C21, 0, 0, /* c1, c2, c3 */ 0, /* vRef - not used */ @@ -243,7 +243,7 @@ static DISCRETE_STEP(bzone_custom_filter) struct bzone_custom_filter_context *context = (struct bzone_custom_filter_context *)node->context; int in0 = (BZONE_CUSTOM_FILTER__IN0 == 0) ? 0 : 1; - double v; + double v; if (BZONE_CUSTOM_FILTER__IN1 > 0) v = 0; @@ -289,7 +289,7 @@ static DISCRETE_SOUND_START(bzone) /************************************************/ DISCRETE_INPUT_DATA(BZ_INPUT) /* decode the bits */ - DISCRETE_BITS_DECODE(NODE_10, BZ_INPUT, 0, 7, 1) /* IC M2, bits 0 - 7 */ + DISCRETE_BITS_DECODE(NODE_10, BZ_INPUT, 0, 7, 1) /* IC M2, bits 0 - 7 */ /* the pot is 250K, but we will use a smaller range to get a better adjustment range */ DISCRETE_ADJUSTMENT(BZ_R11_POT, RES_K(75), RES_K(10), DISC_LINADJ, "R11") @@ -364,13 +364,13 @@ static DISCRETE_SOUND_START(bzone) 1, NODE_64, NODE_63, /* ENAB, RESET, CLK */ 4, 15, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) /* MIN, MAX, DIR, INIT, CLKTYPE */ DISCRETE_TRANSFORM2(NODE_66, NODE_65, 7, "01>") /* QD - IC F4, pin 11 */ - DISCRETE_TRANSFORM2(NODE_67, NODE_65, 15, "01=") /* Ripple - IC F4, pin 15 */ + DISCRETE_TRANSFORM2(NODE_67, NODE_65, 15, "01=") /* Ripple - IC F4, pin 15 */ DISCRETE_COUNTER(NODE_68, /* IC F5 */ 1, NODE_64, NODE_63, /* ENAB, RESET, CLK */ 6, 15, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) /* MIN, MAX, DIR, INIT, CLKTYPE */ DISCRETE_TRANSFORM2(NODE_69, NODE_68, 7, "01>") /* QD - IC F5, pin 11 */ - DISCRETE_TRANSFORM2(NODE_70, NODE_68, 15, "01=") /* Ripple - IC F5, pin 15 */ + DISCRETE_TRANSFORM2(NODE_70, NODE_68, 15, "01=") /* Ripple - IC F5, pin 15 */ DISCRETE_MIXER4(BZ_ENGINE_SND, 1, NODE_66, NODE_67, NODE_69, NODE_70, &bzone_eng_mixer_desc) diff --git a/src/mame/audio/dcs.c b/src/mame/audio/dcs.c index da620b64275..813199edf6f 100644 --- a/src/mame/audio/dcs.c +++ b/src/mame/audio/dcs.c @@ -320,7 +320,7 @@ struct _dcs_state UINT64 output_control_cycles; UINT8 last_output_full; UINT8 last_input_empty; - UINT16 progflags; + UINT16 progflags; void (*output_full_cb)(running_machine *, int); void (*input_empty_cb)(running_machine *, int); UINT16 (*fifo_data_r)(const device_config *device); @@ -1593,7 +1593,7 @@ void dcs_data_w(int data) if (dcs.sport_timer == NULL) timer_call_after_resynch(dcs.cpu->machine, NULL, data, dcs_delayed_data_w_callback); else - dcs_delayed_data_w(dcs.cpu->machine, data); + dcs_delayed_data_w(dcs.cpu->machine, data); } diff --git a/src/mame/audio/dkong.c b/src/mame/audio/dkong.c index 34ee1ebcb08..1b020a78821 100644 --- a/src/mame/audio/dkong.c +++ b/src/mame/audio/dkong.c @@ -100,8 +100,8 @@ /* Resistors */ -#define DK_R1 RES_K(47) -#define DK_R2 RES_K(47) +#define DK_R1 RES_K(47) +#define DK_R2 RES_K(47) #define DK_R3 RES_K(5.1) #define DK_R4 RES_K(2) #define DK_R5 750 @@ -109,8 +109,8 @@ #define DK_R7 RES_K(10) #define DK_R8 RES_K(100) #define DK_R9 RES_K(10) -#define DK_R10 RES_K(10) -#define DK_R14 RES_K(47) +#define DK_R10 RES_K(10) +#define DK_R14 RES_K(47) #define DK_R15 RES_K(5.6) #define DK_R16 RES_K(5.6) @@ -119,15 +119,15 @@ #define DK_R20 RES_K(10) #define DK_R21 RES_K(5.6) #define DK_R22 RES_K(5.6) -#define DK_R24 RES_K(47) +#define DK_R24 RES_K(47) #define DK_R25 RES_K(5.1) #define DK_R26 RES_K(2) #define DK_R27 150 #define DK_R28 RES_K(4.7) #define DK_R29 RES_K(10) #define DK_R30 RES_K(100) -#define DK_R31 RES_K(10) -#define DK_R32 RES_K(10) +#define DK_R31 RES_K(10) +#define DK_R32 RES_K(10) #define DK_R35 RES_K(1) #define DK_R36 RES_K(1) #define DK_R38 RES_K(18) @@ -894,8 +894,8 @@ DISCRETE_TASK_START(1) DISCRETE_LOGIC_INVERT(DS_SOUND7,DS_SOUND7_INV) DISCRETE_COUNTER(NODE_100, 1, 0, NODE_118, 0, 0xFFFF, DISC_COUNT_UP, 0, DISC_CLK_BY_COUNT) - DISCRETE_BIT_DECODE(NODE_101, NODE_100, 6, 1) /*LS157 2A */ - DISCRETE_BIT_DECODE(NODE_102, NODE_100, 3, 1) /*LS157 2B */ + DISCRETE_BIT_DECODE(NODE_101, NODE_100, 6, 1) /*LS157 2A */ + DISCRETE_BIT_DECODE(NODE_102, NODE_100, 3, 1) /*LS157 2B */ DISCRETE_BIT_DECODE(NODE_103, NODE_100, 12, 1) /*LS157 3A */ DISCRETE_BIT_DECODE(NODE_104, NODE_100, 11, 1) /*LS157 3B */ diff --git a/src/mame/audio/exidy.c b/src/mame/audio/exidy.c index fdd137daa95..840c1d49337 100644 --- a/src/mame/audio/exidy.c +++ b/src/mame/audio/exidy.c @@ -28,7 +28,7 @@ #define SH6840_CLOCK (CRYSTAL_OSC / 4) #define SH6532_CLOCK (CRYSTAL_OSC / 4) #define CVSD_CLOCK (1.0 / (0.693 * (RES_K(2.4) + 2.0 * RES_K(20)) * CAP_P(2200))) -#define CVSD_Z80_CLOCK (CRYSTAL_OSC / 2) +#define CVSD_Z80_CLOCK (CRYSTAL_OSC / 2) #define BASE_VOLUME (32767 / 6) enum diff --git a/src/mame/audio/galaga.c b/src/mame/audio/galaga.c index f3a8de34b67..803a9439663 100644 --- a/src/mame/audio/galaga.c +++ b/src/mame/audio/galaga.c @@ -28,9 +28,9 @@ static const discrete_dac_r1_ladder bosco_54xx_dac = { 4, /* number of DAC bits */ /* 54XX_0 54XX_1 54XX_2 */ - { RES_K(47), /* R28, R32, R46 */ - RES_K(22), /* R27, R31, R45 */ - RES_K(10), /* R26, R30, R44 */ + { RES_K(47), /* R28, R32, R46 */ + RES_K(22), /* R27, R31, R45 */ + RES_K(10), /* R26, R30, R44 */ RES_K(4.7)}, /* R25, R29, R43 */ 0, 0, 0, 0 /* nothing extra */ }; @@ -40,8 +40,8 @@ static const discrete_dac_r1_ladder bosco_52xx_dac = { 4, /* number of DAC bits */ { RES_K(100), /* R14 */ - RES_K(47), /* R13 */ - RES_K(22), /* R12 */ + RES_K(47), /* R13 */ + RES_K(22), /* R12 */ RES_K(10)}, /* R11 */ 0, 0, 0, 0 /* nothing extra */ }; diff --git a/src/mame/audio/galaxian.c b/src/mame/audio/galaxian.c index 3cfc060fe57..ef914fe5808 100644 --- a/src/mame/audio/galaxian.c +++ b/src/mame/audio/galaxian.c @@ -177,16 +177,16 @@ static const discrete_mixer_desc galaxian_bck_mixer_desc = static const discrete_lfsr_desc galaxian_lfsr = { DISC_CLK_IS_FREQ, - 17, /* Bit Length */ - 0, /* Reset Value */ - 4, /* Use Bit 10 (QC of second LS164) as F0 input 0 */ - 16, /* Use Bit 23 (QH of third LS164) as F0 input 1 */ + 17, /* Bit Length */ + 0, /* Reset Value */ + 4, /* Use Bit 10 (QC of second LS164) as F0 input 0 */ + 16, /* Use Bit 23 (QH of third LS164) as F0 input 1 */ DISC_LFSR_XOR_INV_IN1, /* F0 is XOR */ - DISC_LFSR_IN0, /* F1 is inverted F0*/ - DISC_LFSR_REPLACE, /* F2 replaces the shifted register contents */ - 0x000001, /* Everything is shifted into the first bit only */ + DISC_LFSR_IN0, /* F1 is inverted F0*/ + DISC_LFSR_REPLACE, /* F2 replaces the shifted register contents */ + 0x000001, /* Everything is shifted into the first bit only */ DISC_LFSR_FLAG_OUTPUT_F0, /* Output is result of F0 */ - 0 /* Output bit */ + 0 /* Output bit */ }; static const discrete_mixer_desc galaxian_mixerpre_desc = diff --git a/src/mame/audio/gorf.c b/src/mame/audio/gorf.c index 33440fc81f1..2671f0bf0ae 100644 --- a/src/mame/audio/gorf.c +++ b/src/mame/audio/gorf.c @@ -131,7 +131,7 @@ READ8_HANDLER( gorf_speech_r ) logerror("Date : %d Speech : %s at intonation %d\n",Phoneme, PhonemeTable[Phoneme],Intonation); if(Phoneme==63) { - sample_stop(samples, 0); + sample_stop(samples, 0); if (strlen(totalword)>2) logerror("Clearing sample %s\n",totalword); totalword[0] = 0; /* Clear the total word stack */ return data; diff --git a/src/mame/audio/gottlieb.c b/src/mame/audio/gottlieb.c index 73bc0be2f1e..9161c600dec 100644 --- a/src/mame/audio/gottlieb.c +++ b/src/mame/audio/gottlieb.c @@ -130,11 +130,11 @@ static void play_sample(const device_config *samples, const char *phonemes) sample_start(samples, 0, 42, 0); else if (strcmp(phonemes, "BAH1EH1Y") == 0) /* Q-Bert - Bye, bye */ sample_start(samples, 0, 43, 0); - else if (strcmp(phonemes, "A2YHT LEH2FTTH") == 0) /* Reactor - Eight left */ + else if (strcmp(phonemes, "A2YHT LEH2FTTH") == 0) /* Reactor - Eight left */ sample_start(samples, 0, 0, 0); - else if (strcmp(phonemes, "SI3KS DTYN LEH2FTTH") == 0) /* Reactor - Sixteen left */ + else if (strcmp(phonemes, "SI3KS DTYN LEH2FTTH") == 0) /* Reactor - Sixteen left */ sample_start(samples, 0, 1, 0); - else if (strcmp(phonemes, "WO2RNYNG KO2R UH1NSDTABUH1L") == 0) /* Reactor - Warning core unstable */ + else if (strcmp(phonemes, "WO2RNYNG KO2R UH1NSDTABUH1L") == 0) /* Reactor - Warning core unstable */ sample_start(samples, 0, 5, 0); else if (strcmp(phonemes, "CHAMBERR AE1EH2KTI1VA1I3DTEH1DT ") == 0) /* Reactor - Chamber activated */ sample_start(samples, 0, 7, 0); diff --git a/src/mame/audio/hitme.c b/src/mame/audio/hitme.c index 108cc1dba41..15b632cd06f 100644 --- a/src/mame/audio/hitme.c +++ b/src/mame/audio/hitme.c @@ -22,8 +22,8 @@ static const discrete_comp_adder_table desc_hitme_adder = 0.100e-6, // C19 0.022e-6, // C18 0.033e-6, // C17 - 0.010e-6, // C16 - 0.005e-6 // C15 + 0.010e-6, // C16 + 0.005e-6 // C15 } }; @@ -41,7 +41,7 @@ DISCRETE_SOUND_START(hitme) DISCRETE_INPUT_DATA (HITME_ENABLE_VAL) DISCRETE_INPUT_PULSE(HITME_OUT1, 0) - /* This represents the resistor at R3, which controls the speed of the sound effects */ + /* This represents the resistor at R3, which controls the speed of the sound effects */ DISCRETE_ADJUSTMENT(HITME_GAME_SPEED,0.0,25000.0,DISC_LINADJ,"R3") /* The clock for the main downcounter is a "404", or LS123 retriggerable multivibrator. diff --git a/src/mame/audio/irem.c b/src/mame/audio/irem.c index 9105c2e9dcb..de737d7d93c 100644 --- a/src/mame/audio/irem.c +++ b/src/mame/audio/irem.c @@ -298,7 +298,7 @@ static const discrete_mixer_desc m52_sound_c_stage1 = {M52_R19, M52_R22, M52_R23 }, { 0, 0, 0 }, /* variable resistors */ {M52_C37, 0, 0 }, /* node capacitors */ - 0, 0, /* rI, rF */ + 0, 0, /* rI, rF */ M52_C35*0, /* cF */ 0, /* cAmp */ 0, 1}; diff --git a/src/mame/audio/leland.c b/src/mame/audio/leland.c index fc183ff2170..8cbd5557f2e 100644 --- a/src/mame/audio/leland.c +++ b/src/mame/audio/leland.c @@ -605,7 +605,7 @@ static void leland_80186_reset(void) /* reset the interrupt state */ i80186.intr.priority_mask = 0x0007; - i80186.intr.timer = 0x000f; + i80186.intr.timer = 0x000f; i80186.intr.dma[0] = 0x000f; i80186.intr.dma[1] = 0x000f; i80186.intr.ext[0] = 0x000f; @@ -2110,7 +2110,7 @@ static WRITE16_HANDLER( peripheral_w ) WRITE8_HANDLER( ataxx_80186_control_w ) { /* compute the bit-shuffled variants of the bits and then write them */ - int modified = ((data & 0x01) << 7) | + int modified = ((data & 0x01) << 7) | ((data & 0x02) << 5) | ((data & 0x04) << 3) | ((data & 0x08) << 1); diff --git a/src/mame/audio/m79amb.c b/src/mame/audio/m79amb.c index fe92ca913c8..2d987212b27 100644 --- a/src/mame/audio/m79amb.c +++ b/src/mame/audio/m79amb.c @@ -154,7 +154,7 @@ DISCRETE_SOUND_START( m79amb ) ************************************************/ DISCRETE_ONESHOT(NODE_20, M79AMB_BOOM_EN, /* TRIG */ - 1, /* AMPL */ + 1, /* AMPL */ TIME_OF_9602_WITH_DIODE(M79AMB_R2, M79AMB_C2), DISC_ONESHOT_REDGE | DISC_ONESHOT_RETRIG | DISC_OUT_ACTIVE_HIGH) DISCRETE_RCDISC2(NODE_21, @@ -175,7 +175,7 @@ DISCRETE_SOUND_START( m79amb ) ************************************************/ DISCRETE_ONESHOT(NODE_30, M79AMB_THUD_EN, /* TRIG */ - 1, /* AMPL */ + 1, /* AMPL */ TIME_OF_9602_WITH_DIODE(M79AMB_R12, M79AMB_C8), DISC_ONESHOT_REDGE | DISC_ONESHOT_RETRIG | DISC_OUT_ACTIVE_HIGH) DISCRETE_RCDISC2(NODE_31, @@ -196,7 +196,7 @@ DISCRETE_SOUND_START( m79amb ) ************************************************/ DISCRETE_ONESHOT(NODE_40, M79AMB_SHOT_EN, /* TRIG */ - 1, /* AMPL */ + 1, /* AMPL */ TIME_OF_9602_WITH_DIODE(M79AMB_R22, M79AMB_C14), DISC_ONESHOT_REDGE | DISC_ONESHOT_RETRIG | DISC_OUT_ACTIVE_HIGH) DISCRETE_RCDISC2(NODE_41, @@ -247,7 +247,7 @@ DISCRETE_SOUND_START( m79amb ) DISC_566_OUT_DC | DISC_566_OUT_TRIANGLE) DISCRETE_ONOFF(NODE_61, M79AMB_TANK_TRUCK_JEEP_EN, /* Q16, Q17 */ - NODE_60) + NODE_60) DISCRETE_CRFILTER(NODE_62, NODE_61, M79AMB_R48 + M79AMB_R49, M79AMB_C26) DISCRETE_GAIN(NODE_63, NODE_62, RES_VOLTAGE_DIVIDER(M79AMB_R48, M79AMB_R49)) diff --git a/src/mame/audio/mario.c b/src/mame/audio/mario.c index 7789503c7dd..01c8bf372a4 100644 --- a/src/mame/audio/mario.c +++ b/src/mame/audio/mario.c @@ -381,7 +381,7 @@ static DISCRETE_SOUND_START(mario) DISCRETE_TASK_START(1) DISCRETE_COUNTER(NODE_100,1,0,NODE_118,0,0xFFFF,DISC_COUNT_UP,0,DISC_CLK_BY_COUNT) - DISCRETE_BIT_DECODE(NODE_102, NODE_100, 3, 1) //LS157 2B + DISCRETE_BIT_DECODE(NODE_102, NODE_100, 3, 1) //LS157 2B DISCRETE_BIT_DECODE(NODE_104, NODE_100, 11, TTL_HIGH) //LS157 3B DISCRETE_LS123(NODE_110, DS_SOUND7_INV, MR_R61, MR_C41) diff --git a/src/mame/audio/mcr.c b/src/mame/audio/mcr.c index d8bdb6c9a38..b26ce04cef9 100644 --- a/src/mame/audio/mcr.c +++ b/src/mame/audio/mcr.c @@ -514,7 +514,7 @@ static WRITE_LINE_DEVICE_HANDLER( csdeluxe_irq ) { int combined_state = pia6821_get_irq_a(device) | pia6821_get_irq_b(device); - cpu_set_input_line(csdeluxe_sound_cpu, 4, combined_state ? ASSERT_LINE : CLEAR_LINE); + cpu_set_input_line(csdeluxe_sound_cpu, 4, combined_state ? ASSERT_LINE : CLEAR_LINE); } static TIMER_CALLBACK( csdeluxe_delayed_data_w ) @@ -652,7 +652,7 @@ static WRITE_LINE_DEVICE_HANDLER( soundsgood_irq ) { int combined_state = pia6821_get_irq_a(device) | pia6821_get_irq_b(device); - cpu_set_input_line(soundsgood_sound_cpu, 4, combined_state ? ASSERT_LINE : CLEAR_LINE); + cpu_set_input_line(soundsgood_sound_cpu, 4, combined_state ? ASSERT_LINE : CLEAR_LINE); } static TIMER_CALLBACK( soundsgood_delayed_data_w ) diff --git a/src/mame/audio/mw8080bw.c b/src/mame/audio/mw8080bw.c index 25a42779b29..3b31ec7c48d 100644 --- a/src/mame/audio/mw8080bw.c +++ b/src/mame/audio/mw8080bw.c @@ -3927,7 +3927,7 @@ static const discrete_mixer_desc invaders_mixer = RES_K(47), /* R95 */ \ CAP_U(1), /* C34 */ \ &invaders_bonus_555) \ - DISCRETE_SQUAREWFIX(INVADERS_NODE(41, _board), \ + DISCRETE_SQUAREWFIX(INVADERS_NODE(41, _board), \ 1, /* ENAB */ \ 480, /* FREQ */ \ 1, /* AMP */ \ diff --git a/src/mame/audio/namcoc7x.c b/src/mame/audio/namcoc7x.c index 379c34e6e3b..04bdca50007 100644 --- a/src/mame/audio/namcoc7x.c +++ b/src/mame/audio/namcoc7x.c @@ -189,7 +189,7 @@ ADDRESS_MAP_END INTERRUPT_GEN( namcoc7x_interrupt ) { if (cpu_getiloops(device) == 0) - cpu_set_input_line(device, M37710_LINE_IRQ0, HOLD_LINE); + cpu_set_input_line(device, M37710_LINE_IRQ0, HOLD_LINE); else cpu_set_input_line(device, M37710_LINE_IRQ2, HOLD_LINE); } diff --git a/src/mame/audio/phoenix.c b/src/mame/audio/phoenix.c index 1cef8094f33..f6cfb2fc555 100644 --- a/src/mame/audio/phoenix.c +++ b/src/mame/audio/phoenix.c @@ -61,11 +61,11 @@ struct n_state INT32 lowpass_polybit; }; -static struct c_state c24_state; -static struct c_state c25_state; -static struct n_state noise_state; -static UINT8 sound_latch_a; -static sound_stream * channel; +static struct c_state c24_state; +static struct c_state c25_state; +static struct n_state noise_state; +static UINT8 sound_latch_a; +static sound_stream * channel; static UINT32 * poly18; INLINE int update_c24(int samplerate) @@ -303,12 +303,12 @@ static const discrete_mixer_desc phoenix_mixer = /* Nodes - Inputs */ #define PHOENIX_EFFECT_1_DATA NODE_01 -#define PHOENIX_EFFECT_1_FREQ NODE_02 +#define PHOENIX_EFFECT_1_FREQ NODE_02 #define PHOENIX_EFFECT_1_FILT NODE_03 #define PHOENIX_EFFECT_2_DATA NODE_04 #define PHOENIX_EFFECT_2_FREQ NODE_05 -#define PHOENIX_EFFECT_3_EN NODE_06 -#define PHOENIX_EFFECT_4_EN NODE_07 +#define PHOENIX_EFFECT_3_EN NODE_06 +#define PHOENIX_EFFECT_4_EN NODE_07 /* Nodes - Sounds */ #define PHOENIX_EFFECT_1_SND NODE_10 #define PHOENIX_EFFECT_2_SND NODE_11 diff --git a/src/mame/audio/polepos.c b/src/mame/audio/polepos.c index b240450b2b1..2a64ecdd1f0 100644 --- a/src/mame/audio/polepos.c +++ b/src/mame/audio/polepos.c @@ -180,9 +180,9 @@ static const discrete_dac_r1_ladder polepos_54xx_dac = { 4, /* number of DAC bits */ /* 54XX_0 54XX_1 54XX_2 */ - { RES_K(47), /* R124, R136, R152 */ - RES_K(22), /* R120, R132, R142 */ - RES_K(10), /* R119, R131, R138 */ + { RES_K(47), /* R124, R136, R152 */ + RES_K(22), /* R120, R132, R142 */ + RES_K(10), /* R119, R131, R138 */ RES_K(4.7)}, /* R118, R126, R103 */ 0, 0, 0, 0 /* nothing extra */ }; @@ -192,8 +192,8 @@ static const discrete_dac_r1_ladder polepos_52xx_dac = { 4, /* number of DAC bits */ { RES_K(100), /* R160 */ - RES_K(47), /* R159 */ - RES_K(22), /* R155 */ + RES_K(47), /* R159 */ + RES_K(22), /* R155 */ RES_K(10)}, /* R154 */ 0, 0, 0, 0 /* nothing extra */ }; diff --git a/src/mame/audio/scramble.c b/src/mame/audio/scramble.c index 4ee9c4d8f93..59346c14f04 100644 --- a/src/mame/audio/scramble.c +++ b/src/mame/audio/scramble.c @@ -19,7 +19,7 @@ #include "sound/ay8910.h" #include "includes/galaxold.h" -#define AD2083_TMS5110_CLOCK XTAL_640kHz +#define AD2083_TMS5110_CLOCK XTAL_640kHz /* The timer clock in Scramble which feeds the upper 4 bits of */ /* AY-3-8910 port A is based on the same clock */ diff --git a/src/mame/audio/segag80r.c b/src/mame/audio/segag80r.c index 5edae1948f1..0a15988c7db 100644 --- a/src/mame/audio/segag80r.c +++ b/src/mame/audio/segag80r.c @@ -654,11 +654,11 @@ static const char *const spaceod_sample_names[] = "eexplode.wav", /* 2 */ "pexplode.wav", /* 3 */ "warp.wav", /* 4 */ - "birth.wav", /* 5 */ - "scoreup.wav", /* 6 */ + "birth.wav", /* 5 */ + "scoreup.wav", /* 6 */ "ssound.wav", /* 7 */ - "accel.wav", /* 8 */ - "damaged.wav", /* 9 */ + "accel.wav", /* 8 */ + "damaged.wav", /* 9 */ "erocket.wav", /* 10 */ 0 }; diff --git a/src/mame/audio/segag80v.c b/src/mame/audio/segag80v.c index 8caecf0f2be..2b4f9610bf9 100644 --- a/src/mame/audio/segag80v.c +++ b/src/mame/audio/segag80v.c @@ -154,7 +154,7 @@ WRITE8_HANDLER( elim1_sh_w ) /* Play bounce sample */ if (data & 0x20) - { + { if (sample_playing(samples, 2)) sample_stop (samples, 2); sample_start (samples, 2, 1, 0); @@ -162,7 +162,7 @@ WRITE8_HANDLER( elim1_sh_w ) /* Play lazer sample */ if (data & 0xc0) - { + { if (sample_playing(samples, 3)) sample_stop (samples, 3); sample_start (samples, 3, 5, 0); @@ -209,14 +209,14 @@ WRITE8_HANDLER( zektor1_sh_w ) /* Play explosion samples */ if (data & 0x04) sample_start (samples, 1, 10, 0); - if (data & 0x08) + if (data & 0x08) sample_start (samples, 1, 9, 0); - if (data & 0x10) + if (data & 0x10) sample_start (samples, 1, 8, 0); /* Play bounce sample */ if (data & 0x20) - { + { if (sample_playing(samples, 2)) sample_stop (samples, 2); sample_start (samples, 2, 1, 0); @@ -224,7 +224,7 @@ WRITE8_HANDLER( zektor1_sh_w ) /* Play lazer sample */ if (data & 0xc0) - { + { if (sample_playing(samples, 3)) sample_stop (samples, 3); sample_start (samples, 3, 5, 0); @@ -270,7 +270,7 @@ WRITE8_HANDLER( spacfury1_sh_w ) /* craft moving */ if (data & 0x02) - { + { if (!sample_playing(samples, 2)) sample_start (samples, 2, 1, 1); } @@ -279,7 +279,7 @@ WRITE8_HANDLER( spacfury1_sh_w ) /* Thrust */ if (data & 0x04) - { + { if (!sample_playing(samples, 3)) sample_start (samples, 3, 4, 1); } @@ -307,7 +307,7 @@ WRITE8_HANDLER( spacfury2_sh_w ) /* ship firing */ if (data & 0x02) - { + { if (sample_playing(samples, 6)) sample_stop(samples, 6); sample_start(samples, 6, 3, 0); diff --git a/src/mame/audio/sprint8.c b/src/mame/audio/sprint8.c index ba34dfd3158..a57b343aa3a 100644 --- a/src/mame/audio/sprint8.c +++ b/src/mame/audio/sprint8.c @@ -130,7 +130,7 @@ static const discrete_555_desc sprint8_motor_555m_desc = static const discrete_op_amp_filt_info sprint8_motor_filter = { SPRINT8_R27, 0, SPRINT8_R28 + RES_2_PARALLEL(SPRINT8_R19, SPRINT8_R20), 0, SPRINT8_R29, /* r1, r2, r3, r4, rF, */ - SPRINT8_C18, SPRINT8_C19, 0, /* c1, c2, c3, */ + SPRINT8_C18, SPRINT8_C19, 0, /* c1, c2, c3, */ 5.0 * RES_VOLTAGE_DIVIDER(SPRINT8_R19, SPRINT8_R20), 5, 0 /* vRef, vP, vN */ }; @@ -158,7 +158,7 @@ static const discrete_mixer_desc sprint8_mixer = * we will just tell the monostable it was triggered once and ignore C17/R40. */ #define SPRINT8_MOTOR_CIRCUIT(_car) \ -DISCRETE_RCFILTER(NODE_RELATIVE(NODE_30, _car - 1), NODE_RELATIVE(SPRINT8_MOTOR1_EN, _car - 1), SPRINT8_R89, SPRINT8_C26) \ +DISCRETE_RCFILTER(NODE_RELATIVE(NODE_30, _car - 1), NODE_RELATIVE(SPRINT8_MOTOR1_EN, _car - 1), SPRINT8_R89, SPRINT8_C26) \ DISCRETE_ADDER2(NODE_RELATIVE(NODE_40, _car - 1), 1, NODE_RELATIVE(NODE_30, _car - 1), 0.7) /* add Q21 shift */ \ DISCRETE_555_ASTABLE_CV(NODE_RELATIVE(NODE_50, _car - 1), 1, SPRINT8_R39, 0, SPRINT8_C27, NODE_RELATIVE(NODE_40, _car - 1), &sprint8_motor_555a_desc) \ DISCRETE_555_MSTABLE(NODE_RELATIVE(NODE_60, _car - 1), 1, NODE_RELATIVE(NODE_50, _car - 1), SPRINT8_R41, SPRINT8_C28, &sprint8_motor_555m_desc) \ diff --git a/src/mame/audio/starshp1.c b/src/mame/audio/starshp1.c index a2a260d5439..919ee7f4fbf 100644 --- a/src/mame/audio/starshp1.c +++ b/src/mame/audio/starshp1.c @@ -66,7 +66,7 @@ #define STARSHP1_C78 CAP_U(0.1) /* Convert DAC value to voltage out at IC E10, pin 4 */ -#define STARSHP1_MC1408_GAIN MC1408_DAC(5.0, STARSHP1_R4, STARSHP1_R62) +#define STARSHP1_MC1408_GAIN MC1408_DAC(5.0, STARSHP1_R4, STARSHP1_R62) /* Gain at IC E10, pin 12 */ #define STARSHP1_TONE_PITCH_GAIN OP_AMP_NON_INVERT_GAIN(STARSHP1_R63, STARSHP1_R64) @@ -163,7 +163,7 @@ DISCRETE_SOUND_START( starshp1 ) /************************************************ * Noise ************************************************/ - DISCRETE_LFSR_NOISE(NODE_20, /* IC B9, pin 13 */ + DISCRETE_LFSR_NOISE(NODE_20, /* IC B9, pin 13 */ 1, /* ENAB */ STARSHP1_KICKER, /* IC B9 & C9, pin 9 */ STARSHP1_S1V, /* IC B9 & C9, pin 8 */ diff --git a/src/mame/audio/trackfld.c b/src/mame/audio/trackfld.c index 070810b353d..1b005246bde 100644 --- a/src/mame/audio/trackfld.c +++ b/src/mame/audio/trackfld.c @@ -108,6 +108,6 @@ WRITE8_HANDLER( konami_SN76496_latch_w ) WRITE8_DEVICE_HANDLER( konami_SN76496_w ) { - trackfld_state *state = (trackfld_state *)device->machine->driver_data; + trackfld_state *state = (trackfld_state *)device->machine->driver_data; sn76496_w(device, offset, state->SN76496_latch); } diff --git a/src/mame/audio/turbo.c b/src/mame/audio/turbo.c index d3138fe3a2f..e435892db75 100644 --- a/src/mame/audio/turbo.c +++ b/src/mame/audio/turbo.c @@ -651,17 +651,17 @@ DISCRETE_SOUND_START(turbo) /************************************************/ /* NODE ADDR MASK GAIN OFFSET INIT */ DISCRETE_INPUT(TURBO_CRASH_EN ,0x00,0x001f, 0.0) - DISCRETE_INPUT(TURBO_TRIG1_INV ,0x01,0x001f, 1.0) - DISCRETE_INPUT(TURBO_TRIG2_INV ,0x02,0x001f, 1.0) - DISCRETE_INPUT(TURBO_TRIG3_INV ,0x03,0x001f, 1.0) - DISCRETE_INPUT(TURBO_TRIG4_INV ,0x04,0x001f, 1.0) + DISCRETE_INPUT(TURBO_TRIG1_INV ,0x01,0x001f, 1.0) + DISCRETE_INPUT(TURBO_TRIG2_INV ,0x02,0x001f, 1.0) + DISCRETE_INPUT(TURBO_TRIG3_INV ,0x03,0x001f, 1.0) + DISCRETE_INPUT(TURBO_TRIG4_INV ,0x04,0x001f, 1.0) DISCRETE_INPUT(TURBO_SLIP_EN ,0x05,0x001f, 0.0) DISCRETE_INPUT(TURBO_CRASHL_EN ,0x06,0x001f, 0.0) - DISCRETE_INPUT(TURBO_ACC_VAL ,0x07,0x001f, 0.0) - DISCRETE_INPUT(TURBO_AMBU_EN ,0x08,0x001f, 0.0) - DISCRETE_INPUT(TURBO_SPIN_EN ,0x09,0x001f, 0.0) - DISCRETE_INPUT(TURBO_OSEL_VAL ,0x0a,0x001f, 0.0) - DISCRETE_INPUT(TURBO_BSEL_VAL ,0x0b,0x001f, 0.0) + DISCRETE_INPUT(TURBO_ACC_VAL ,0x07,0x001f, 0.0) + DISCRETE_INPUT(TURBO_AMBU_EN ,0x08,0x001f, 0.0) + DISCRETE_INPUT(TURBO_SPIN_EN ,0x09,0x001f, 0.0) + DISCRETE_INPUT(TURBO_OSEL_VAL ,0x0a,0x001f, 0.0) + DISCRETE_INPUT(TURBO_BSEL_VAL ,0x0b,0x001f, 0.0) /************************************************/ /* Alarm sounds */ diff --git a/src/mame/audio/vicdual.c b/src/mame/audio/vicdual.c index 36c33f00267..ccb655bbd50 100644 --- a/src/mame/audio/vicdual.c +++ b/src/mame/audio/vicdual.c @@ -311,7 +311,7 @@ static const discrete_lfsr_desc mm5837_lfsr = DISC_LFSR_NOT_IN0, /* F1 is inverted F0*/ DISC_LFSR_REPLACE, /* F2 replaces the shifted register contents */ 0x000001, /* Everything is shifted into the first bit only */ - 0, /* Flags */ + 0, /* Flags */ 16 /* Output bit */ }; diff --git a/src/mame/audio/wow.c b/src/mame/audio/wow.c index abefb9213a5..9c1313a5367 100644 --- a/src/mame/audio/wow.c +++ b/src/mame/audio/wow.c @@ -123,7 +123,7 @@ READ8_HANDLER( wow_speech_r ) // logerror("Data : %d Speech : %s at intonation %d\n",Phoneme, PhonemeTable[Phoneme],Intonation); if(Phoneme==63) { - sample_stop(samples, 0); + sample_stop(samples, 0); // logerror("Clearing sample %s\n",totalword); totalword[0] = 0; /* Clear the total word stack */ return data; diff --git a/src/mame/drivers/2mindril.c b/src/mame/drivers/2mindril.c index 55fba698f24..da8e7b15732 100644 --- a/src/mame/drivers/2mindril.c +++ b/src/mame/drivers/2mindril.c @@ -80,19 +80,19 @@ struct __2mindril_state -#define DRAW_MAP(map,num) { int x, y; \ - for (y = 0; y < 16; y++) \ - for (x = 0; x < 128; x++) \ - { \ - UINT16 data0 = map[y * 128 + x * 2]; \ - UINT16 data1 = map[y * 128 + x * 2 + 1]; \ - drawgfx_transpen(bitmap, \ +#define DRAW_MAP(map,num) { int x, y; \ + for (y = 0; y < 16; y++) \ + for (x = 0; x < 128; x++) \ + { \ + UINT16 data0 = map[y * 128 + x * 2]; \ + UINT16 data1 = map[y * 128 + x * 2 + 1]; \ + drawgfx_transpen(bitmap, \ cliprect,screen->machine->gfx[0], data1, \ - data0 & 0xff, \ + data0 & 0xff, \ data0 & 0x4000, data0 & 0x8000, \ x * 16 - 512 /*+(((INT16)(state->unkram[0x60000 / 2 + num])) / 32)*/, \ y * 16 /*+(((INT16)(state->unkram[0x60008 / 2 + num])) / 32)*/,0); \ - } \ + } \ } static VIDEO_UPDATE( drill ) @@ -108,16 +108,16 @@ static VIDEO_UPDATE( drill ) { int x, y; for (y = 0; y < 64; y++) - for(x = 0; x < 64; x++) - { - drawgfx_transpen( bitmap, + for(x = 0; x < 64; x++) + { + drawgfx_transpen( bitmap, cliprect, screen->machine->gfx[1], state->textram[y * 64 + x] & 0xff, //1ff ?? ((state->textram[y * 64 + x] >> 9) & 0xf), 0, 0, x*8,y*8,0); - } + } } /*printf("%.4X %.4X %.4X %.4X %.4X %.4X\n", state->unkram[0x60000 / 2], state->unkram[0x60000 / 2 + 1], state->unkram[0x60000 / 2 + 2], state->unkram[0x60000 / 2 + 3], state->unkram[0x60000 / 2 + 4], state->unkram[0x60000 / 2 + 5]);*/ @@ -317,7 +317,7 @@ static INPUT_PORTS_START( drill ) PORT_DIPSETTING( 0x8000, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_START("IN0")//sensors + PORT_START("IN0")//sensors PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(25) PORT_KEYDELTA(20) PORT_START("IN1") diff --git a/src/mame/drivers/8080bw.c b/src/mame/drivers/8080bw.c index ab827621969..da989f0334a 100644 --- a/src/mame/drivers/8080bw.c +++ b/src/mame/drivers/8080bw.c @@ -1080,7 +1080,7 @@ static MACHINE_DRIVER_START( sflush ) /* basic machine hardware */ MDRV_IMPORT_FROM(mw8080bw_root) - MDRV_CPU_REPLACE("maincpu",M6800,2000000) /* ?? */ + MDRV_CPU_REPLACE("maincpu",M6800,2000000) /* ?? */ MDRV_CPU_PROGRAM_MAP(sflush_map) MDRV_CPU_VBLANK_INT_HACK(irq0_line_pulse,2) MDRV_MACHINE_START(sflush) @@ -2298,7 +2298,7 @@ ROM_START( lrescue ) ROM_REGION( 0x0800, "proms", 0 ) /* color map */ ROM_LOAD( "7643-1.cpu", 0x0000, 0x0400, CRC(8b2e38de) SHA1(d6a757be31c3a179d31bd3709e71f9e38ec632e9) ) - ROM_RELOAD( 0x0400, 0x0400 ) + ROM_RELOAD( 0x0400, 0x0400 ) ROM_END /* @@ -2395,7 +2395,7 @@ ROM_START( grescue ) ROM_REGION( 0x0800, "proms", 0 ) /* color map */ ROM_LOAD( "7643-1.cpu", 0x0000, 0x0400, CRC(8b2e38de) SHA1(d6a757be31c3a179d31bd3709e71f9e38ec632e9) ) - ROM_RELOAD( 0x0400, 0x0400 ) + ROM_RELOAD( 0x0400, 0x0400 ) ROM_END ROM_START( desterth ) @@ -2410,7 +2410,7 @@ ROM_START( desterth ) ROM_REGION( 0x0800, "proms", 0 ) /* color map */ ROM_LOAD( "7643-1.cpu", 0x0000, 0x0400, CRC(8b2e38de) SHA1(d6a757be31c3a179d31bd3709e71f9e38ec632e9) ) - ROM_RELOAD( 0x0400, 0x0400 ) + ROM_RELOAD( 0x0400, 0x0400 ) ROM_END ROM_START( lrescuem ) @@ -2590,16 +2590,16 @@ ROM_END ROM_START( schasercv ) ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD( "1", 0x0000, 0x0400, CRC(bec2b16b) SHA1(c62210ecb64d7c38e5b63481d7fe04eb59bb1068) ) - ROM_LOAD( "2", 0x0400, 0x0400, CRC(9d25e608) SHA1(4cc52a93a3ab96a0ec1d07593e17832fa59b30a1) ) - ROM_LOAD( "3", 0x0800, 0x0400, CRC(113d0635) SHA1(ab5e98d0b5fc37d7d69bb5c541681a0f66460440) ) - ROM_LOAD( "4", 0x0c00, 0x0400, CRC(f3a43c8d) SHA1(29a7a8b7d1de763a255cfec79157fd95e7bff551) ) - ROM_LOAD( "5", 0x1000, 0x0400, CRC(47c84f23) SHA1(61b475fa92b8335f8edd3a128d8ac8561658e464) ) - ROM_LOAD( "6", 0x1400, 0x0400, CRC(02ff2199) SHA1(e12c235b2064cb4bb426145172e523256e3c6358) ) - ROM_LOAD( "7", 0x1800, 0x0400, CRC(87d06b88) SHA1(2d743161f85e47cb8ee2a600cbee790b1ad7ad99) ) - ROM_LOAD( "8", 0x1c00, 0x0400, CRC(6dfaad08) SHA1(2184c4e2f4b6bffdc4fe13e178134331fcd43253) ) - ROM_LOAD( "9", 0x4000, 0x0400, CRC(3d1a2ae3) SHA1(672ad6590aebdfebc2748455fa638107f3934c41) ) - ROM_LOAD( "10", 0x4400, 0x0400, CRC(037edb99) SHA1(f2fc5e61f962666e7f6bb81753ac24ea0b97e581) ) + ROM_LOAD( "1", 0x0000, 0x0400, CRC(bec2b16b) SHA1(c62210ecb64d7c38e5b63481d7fe04eb59bb1068) ) + ROM_LOAD( "2", 0x0400, 0x0400, CRC(9d25e608) SHA1(4cc52a93a3ab96a0ec1d07593e17832fa59b30a1) ) + ROM_LOAD( "3", 0x0800, 0x0400, CRC(113d0635) SHA1(ab5e98d0b5fc37d7d69bb5c541681a0f66460440) ) + ROM_LOAD( "4", 0x0c00, 0x0400, CRC(f3a43c8d) SHA1(29a7a8b7d1de763a255cfec79157fd95e7bff551) ) + ROM_LOAD( "5", 0x1000, 0x0400, CRC(47c84f23) SHA1(61b475fa92b8335f8edd3a128d8ac8561658e464) ) + ROM_LOAD( "6", 0x1400, 0x0400, CRC(02ff2199) SHA1(e12c235b2064cb4bb426145172e523256e3c6358) ) + ROM_LOAD( "7", 0x1800, 0x0400, CRC(87d06b88) SHA1(2d743161f85e47cb8ee2a600cbee790b1ad7ad99) ) + ROM_LOAD( "8", 0x1c00, 0x0400, CRC(6dfaad08) SHA1(2184c4e2f4b6bffdc4fe13e178134331fcd43253) ) + ROM_LOAD( "9", 0x4000, 0x0400, CRC(3d1a2ae3) SHA1(672ad6590aebdfebc2748455fa638107f3934c41) ) + ROM_LOAD( "10", 0x4400, 0x0400, CRC(037edb99) SHA1(f2fc5e61f962666e7f6bb81753ac24ea0b97e581) ) ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 (not used, but they were on the board) */ ROM_LOAD( "cv01", 0x0000, 0x0400, CRC(037e16ac) SHA1(d585030aaff428330c91ae94d7cd5c96ebdd67dd) ) @@ -2731,19 +2731,19 @@ ROM_END ROM_START( yosakdon ) ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD( "yd1.bin", 0x0000, 0x0400, CRC(607899c9) SHA1(219c0c99894715818606fba49cc75517f6f43e0c) ) - ROM_LOAD( "yd2.bin", 0x0400, 0x0400, CRC(78336df4) SHA1(b0b6254568d191d2d0b9c9280a3ccf2417ef3f38) ) - ROM_LOAD( "yd3.bin", 0x0800, 0x0400, CRC(c5af6d52) SHA1(c40af79fe060562c64fc316881b7d0348e11ee3f) ) - ROM_LOAD( "yd4.bin", 0x0c00, 0x0400, CRC(dca8064f) SHA1(77a58137cc7f0b5fbe0e9e8deb9c5be88b1ebbcf) ) - ROM_LOAD( "yd5.bin", 0x1400, 0x0400, CRC(38804ff1) SHA1(9b7527b9d2b106355f0c8df46666b1e3f286b2e3) ) - ROM_LOAD( "yd6.bin", 0x1800, 0x0400, CRC(988d2362) SHA1(deaf864b4e287cbc2585c2a11343b1ae82e15463) ) - ROM_LOAD( "yd7.bin", 0x1c00, 0x0400, CRC(2744e68b) SHA1(5ad5a7a615d36f57b6d560425e035c15e25e9005) ) + ROM_LOAD( "yd1.bin", 0x0000, 0x0400, CRC(607899c9) SHA1(219c0c99894715818606fba49cc75517f6f43e0c) ) + ROM_LOAD( "yd2.bin", 0x0400, 0x0400, CRC(78336df4) SHA1(b0b6254568d191d2d0b9c9280a3ccf2417ef3f38) ) + ROM_LOAD( "yd3.bin", 0x0800, 0x0400, CRC(c5af6d52) SHA1(c40af79fe060562c64fc316881b7d0348e11ee3f) ) + ROM_LOAD( "yd4.bin", 0x0c00, 0x0400, CRC(dca8064f) SHA1(77a58137cc7f0b5fbe0e9e8deb9c5be88b1ebbcf) ) + ROM_LOAD( "yd5.bin", 0x1400, 0x0400, CRC(38804ff1) SHA1(9b7527b9d2b106355f0c8df46666b1e3f286b2e3) ) + ROM_LOAD( "yd6.bin", 0x1800, 0x0400, CRC(988d2362) SHA1(deaf864b4e287cbc2585c2a11343b1ae82e15463) ) + ROM_LOAD( "yd7.bin", 0x1c00, 0x0400, CRC(2744e68b) SHA1(5ad5a7a615d36f57b6d560425e035c15e25e9005) ) ROM_END ROM_START( yosakdona ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "yosaku1", 0x0000, 0x0400, CRC(d132f4f0) SHA1(373c7ea1bd6debcb3dad5881793b8c31dc7a01e6) ) - ROM_LOAD( "yd2.bin", 0x0400, 0x0400, CRC(78336df4) SHA1(b0b6254568d191d2d0b9c9280a3ccf2417ef3f38) ) + ROM_LOAD( "yd2.bin", 0x0400, 0x0400, CRC(78336df4) SHA1(b0b6254568d191d2d0b9c9280a3ccf2417ef3f38) ) ROM_LOAD( "yosaku3", 0x0800, 0x0400, CRC(b1a0b3eb) SHA1(4eb80668920b45dc6216424f8ca53d753a35f4f1) ) ROM_LOAD( "yosaku4", 0x0c00, 0x0400, CRC(c06c225e) SHA1(2699e3c13b09b6de16bd3ca3ca2e9d7a91b7e268) ) ROM_LOAD( "yosaku5", 0x1400, 0x0400, CRC(ae422a43) SHA1(5219680f9d6c5d984b29167f85106fa375856121) ) @@ -2815,14 +2815,14 @@ ROM_END ROM_START( steelwkr ) ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD( "1.36", 0x0000, 0x0400, CRC(5d78873a) SHA1(293cbc067937668148181453877239cb5ed57600) ) - ROM_LOAD( "2.35", 0x0400, 0x0400, CRC(99cd70c6) SHA1(a08bf4db6b39d22dfcf052cc6603aab041db0208) ) - ROM_LOAD( "3.34", 0x0800, 0x0400, CRC(18103b67) SHA1(45929ea56ab15769fc68873570aab3d403e8e913) ) - ROM_LOAD( "4.33", 0x0c00, 0x0400, CRC(c413ae82) SHA1(302b933b45b2aaa515434b5268fd74aec4160e3f) ) - ROM_LOAD( "5.32", 0x1000, 0x0400, CRC(ca7b07b5) SHA1(cbea221c4daf84825f99bbef6d731fc2ef88feeb) ) - ROM_LOAD( "6.31", 0x1400, 0x0400, CRC(f8181fa0) SHA1(a907611529a1500a2ae118e834c2d4b6d11974f1) ) - ROM_LOAD( "7.42", 0x1800, 0x0400, CRC(a35f113e) SHA1(53073037db55c14055810c0bee7b85eb75bbaa72) ) - ROM_LOAD( "8.41", 0x1c00, 0x0400, CRC(af208370) SHA1(ccbd002accda26cc0a02987d9801a47e5f49921a) ) + ROM_LOAD( "1.36", 0x0000, 0x0400, CRC(5d78873a) SHA1(293cbc067937668148181453877239cb5ed57600) ) + ROM_LOAD( "2.35", 0x0400, 0x0400, CRC(99cd70c6) SHA1(a08bf4db6b39d22dfcf052cc6603aab041db0208) ) + ROM_LOAD( "3.34", 0x0800, 0x0400, CRC(18103b67) SHA1(45929ea56ab15769fc68873570aab3d403e8e913) ) + ROM_LOAD( "4.33", 0x0c00, 0x0400, CRC(c413ae82) SHA1(302b933b45b2aaa515434b5268fd74aec4160e3f) ) + ROM_LOAD( "5.32", 0x1000, 0x0400, CRC(ca7b07b5) SHA1(cbea221c4daf84825f99bbef6d731fc2ef88feeb) ) + ROM_LOAD( "6.31", 0x1400, 0x0400, CRC(f8181fa0) SHA1(a907611529a1500a2ae118e834c2d4b6d11974f1) ) + ROM_LOAD( "7.42", 0x1800, 0x0400, CRC(a35f113e) SHA1(53073037db55c14055810c0bee7b85eb75bbaa72) ) + ROM_LOAD( "8.41", 0x1c00, 0x0400, CRC(af208370) SHA1(ccbd002accda26cc0a02987d9801a47e5f49921a) ) ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 (not used, but they were on the board) */ ROM_LOAD( "la05.1", 0x0000, 0x0400, CRC(98f31392) SHA1(ccdd1bd2ddd24bd6b1f8255a87e138f937eaf5b4) ) diff --git a/src/mame/drivers/acommand.c b/src/mame/drivers/acommand.c index 98efdd7efc8..612aec8ee96 100644 --- a/src/mame/drivers/acommand.c +++ b/src/mame/drivers/acommand.c @@ -273,7 +273,7 @@ static UINT16 *ac_devram; static READ16_HANDLER(ac_devices_r) { - logerror("(PC=%06x) read at %04x\n",cpu_get_pc(space->cpu),offset*2); + logerror("(PC=%06x) read at %04x\n",cpu_get_pc(space->cpu),offset*2); switch(offset) { diff --git a/src/mame/drivers/actfancr.c b/src/mame/drivers/actfancr.c index 05c82b7e8e0..ca7b195cd37 100644 --- a/src/mame/drivers/actfancr.c +++ b/src/mame/drivers/actfancr.c @@ -278,7 +278,7 @@ static const ym3812_interface ym3812_config = static MACHINE_START( actfancr ) { - actfancr_state *state = (actfancr_state *)machine->driver_data; + actfancr_state *state = (actfancr_state *)machine->driver_data; state->maincpu = devtag_get_device(machine, "maincpu"); state->audiocpu = devtag_get_device(machine, "audiocpu"); @@ -286,7 +286,7 @@ static MACHINE_START( actfancr ) static MACHINE_START( triothep ) { - actfancr_state *state = (actfancr_state *)machine->driver_data; + actfancr_state *state = (actfancr_state *)machine->driver_data; MACHINE_START_CALL(actfancr); @@ -295,7 +295,7 @@ static MACHINE_START( triothep ) static MACHINE_RESET( actfancr ) { - actfancr_state *state = (actfancr_state *)machine->driver_data; + actfancr_state *state = (actfancr_state *)machine->driver_data; int i; state->flipscreen = 0; @@ -308,7 +308,7 @@ static MACHINE_RESET( actfancr ) static MACHINE_RESET( triothep ) { - actfancr_state *state = (actfancr_state *)machine->driver_data; + actfancr_state *state = (actfancr_state *)machine->driver_data; MACHINE_RESET_CALL(actfancr); state->trio_control_select = 0; diff --git a/src/mame/drivers/aeroboto.c b/src/mame/drivers/aeroboto.c index c91d2ee3456..02076c5ca40 100644 --- a/src/mame/drivers/aeroboto.c +++ b/src/mame/drivers/aeroboto.c @@ -71,7 +71,7 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x01a2, 0x01a2) AM_WRITE(aeroboto_1a2_w) // affects IRQ line (more protection?) AM_RANGE(0x0000, 0x07ff) AM_RAM AM_BASE_MEMBER(aeroboto_state, mainram) // main RAM AM_RANGE(0x0800, 0x08ff) AM_RAM // tile color buffer; copied to 0x2000 - AM_RANGE(0x0900, 0x09ff) AM_WRITEONLY // a backup of default tile colors + AM_RANGE(0x0900, 0x09ff) AM_WRITEONLY // a backup of default tile colors AM_RANGE(0x1000, 0x17ff) AM_RAM_WRITE(aeroboto_videoram_w) AM_BASE_MEMBER(aeroboto_state, videoram) // tile RAM AM_RANGE(0x1800, 0x183f) AM_RAM AM_BASE_MEMBER(aeroboto_state, hscroll) // horizontal scroll regs AM_RANGE(0x2000, 0x20ff) AM_RAM_WRITE(aeroboto_tilecolor_w) AM_BASE_MEMBER(aeroboto_state, tilecolor) // tile color RAM diff --git a/src/mame/drivers/aerofgt.c b/src/mame/drivers/aerofgt.c index 4bd07ef2a15..7afac1cc4be 100644 --- a/src/mame/drivers/aerofgt.c +++ b/src/mame/drivers/aerofgt.c @@ -562,7 +562,7 @@ static INPUT_PORTS_START( pspikesc ) PORT_INCLUDE( pspikes ) PORT_MODIFY("DSW") - PORT_DIPNAME( 0x0030, 0x0030, "Country" ) PORT_DIPLOCATION("SW1:5,6") + PORT_DIPNAME( 0x0030, 0x0030, "Country" ) PORT_DIPLOCATION("SW1:5,6") PORT_DIPSETTING( 0x0030, "China" ) PORT_DIPSETTING( 0x0020, "Taiwan" ) PORT_DIPSETTING( 0x0010, "Hong-Kong" ) @@ -628,7 +628,7 @@ static INPUT_PORTS_START( karatblz ) PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(4) PORT_START("DSW") - PORT_DIPNAME( 0x0007, 0x0007, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:1,2,3") /* It affects Coin 1, 2, 3 and 4 */ + PORT_DIPNAME( 0x0007, 0x0007, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:1,2,3") /* It affects Coin 1, 2, 3 and 4 */ PORT_DIPSETTING( 0x0004, DEF_STR( 4C_1C ) ) PORT_DIPSETTING( 0x0005, DEF_STR( 3C_1C ) ) PORT_DIPSETTING( 0x0006, DEF_STR( 2C_1C ) ) @@ -664,13 +664,13 @@ static INPUT_PORTS_START( karatblz ) PORT_DIPSETTING( 0x0200, DEF_STR( Hard ) ) PORT_DIPSETTING( 0x0000, DEF_STR( Hardest ) ) /* Default is DEF_STR( Hard ) */ - PORT_DIPNAME( 0x1800, 0x0800, "Strength of Enemies" ) PORT_DIPLOCATION("SW2:4,5") + PORT_DIPNAME( 0x1800, 0x0800, "Strength of Enemies" ) PORT_DIPLOCATION("SW2:4,5") PORT_DIPSETTING( 0x1000, DEF_STR( Easy ) ) PORT_DIPSETTING( 0x1800, DEF_STR( Normal ) ) PORT_DIPSETTING( 0x0800, DEF_STR( Hard ) ) PORT_DIPSETTING( 0x0000, DEF_STR( Hardest ) ) /* Listed in manual as N.C. (aka No Connection) */ - PORT_DIPNAME( 0x2000, 0x2000, "Freeze" ) PORT_DIPLOCATION("SW2:6") + PORT_DIPNAME( 0x2000, 0x2000, "Freeze" ) PORT_DIPLOCATION("SW2:6") PORT_DIPSETTING( 0x2000, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) PORT_DIPNAME( 0x4000, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:7") @@ -827,7 +827,7 @@ static INPUT_PORTS_START( turbofrc ) PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_START3 ) PORT_START("DSW") - PORT_DIPNAME( 0x0007, 0x0007, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:1,2,3") /* It affects Coin 1, 2 and 3 */ + PORT_DIPNAME( 0x0007, 0x0007, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:1,2,3") /* It affects Coin 1, 2 and 3 */ PORT_DIPSETTING( 0x0004, DEF_STR( 4C_1C ) ) PORT_DIPSETTING( 0x0005, DEF_STR( 3C_1C ) ) PORT_DIPSETTING( 0x0006, DEF_STR( 2C_1C ) ) diff --git a/src/mame/drivers/airbustr.c b/src/mame/drivers/airbustr.c index 7feea43e00f..118cbeaf2b6 100644 --- a/src/mame/drivers/airbustr.c +++ b/src/mame/drivers/airbustr.c @@ -626,7 +626,7 @@ static MACHINE_RESET( airbustr ) static const kaneko_pandora_interface airbustr_pandora_config = { "screen", /* screen tag */ - 1, /* gfx_region */ + 1, /* gfx_region */ 0, 0 /* x_offs, y_offs */ }; diff --git a/src/mame/drivers/aleck64.c b/src/mame/drivers/aleck64.c index 364da0335d3..1dae8fd7401 100644 --- a/src/mame/drivers/aleck64.c +++ b/src/mame/drivers/aleck64.c @@ -215,7 +215,7 @@ static INPUT_PORTS_START( aleck64 ) PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(1) // Button A PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(1) // Button B PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_PLAYER(1) // Button Z - PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_START1 ) // Start + PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_START1 ) // Start PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_PLAYER(1) // Joypad Up PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1) // Joypad Down PORT_BIT( 0x0200, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1) // Joypad Left @@ -238,7 +238,7 @@ static INPUT_PORTS_START( aleck64 ) PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2) // Button A PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(2) // Button B PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_PLAYER(2) // Button Z - PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_START2 ) // Start + PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_START2 ) // Start PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_PLAYER(2) // Joypad Up PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2) // Joypad Down PORT_BIT( 0x0200, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2) // Joypad Left @@ -326,7 +326,7 @@ static INPUT_PORTS_START( 11beat ) PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(1) // Button A PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(1) // Button B PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_UNUSED ) // Button Z - PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_START1 ) // Start + PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_START1 ) // Start PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_PLAYER(1) // Joypad Up PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1) // Joypad Down PORT_BIT( 0x0200, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1) // Joypad Left @@ -334,16 +334,16 @@ static INPUT_PORTS_START( 11beat ) PORT_BIT( 0x00c0, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_UNUSED ) // Pan Left PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_PLAYER(1) // Pan Right - PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_UNUSED ) // C Button Up - PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_UNUSED ) // C Button Down - PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_UNUSED ) // C Button Left + PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_UNUSED ) // C Button Up + PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_UNUSED ) // C Button Down + PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_UNUSED ) // C Button Left PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_PLAYER(1) // C Button Right PORT_START("P2") PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2) // Button A PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(2) // Button B PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_UNUSED ) // Button Z - PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_START2 ) // Start + PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_START2 ) // Start PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_PLAYER(2) // Joypad Up PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2) // Joypad Down PORT_BIT( 0x0200, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2) // Joypad Left @@ -351,9 +351,9 @@ static INPUT_PORTS_START( 11beat ) PORT_BIT( 0x00c0, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_UNUSED ) // Pan Left PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_PLAYER(2) // Pan Right (Button C here) - PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_UNUSED ) // C Button Up - PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_UNUSED ) // C Button Down - PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_UNUSED ) // C Button Left + PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_UNUSED ) // C Button Up + PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_UNUSED ) // C Button Down + PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_UNUSED ) // C Button Left PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_PLAYER(2) // C Button Right (Button D here) PORT_START("IN0") @@ -456,7 +456,7 @@ static INPUT_PORTS_START( starsldr ) PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(1) // Button A PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(1) // Button B PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_UNUSED ) - PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_START1 ) // Start + PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_START1 ) // Start PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_PLAYER(1) // Joypad Up PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1) // Joypad Down PORT_BIT( 0x0200, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1) // Joypad Left @@ -479,7 +479,7 @@ static INPUT_PORTS_START( starsldr ) PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(1) // Button A PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(1) // Button B PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_UNUSED ) - PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_START1 ) // Start + PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_START1 ) // Start PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_PLAYER(1) // Joypad Up PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1) // Joypad Down PORT_BIT( 0x0200, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1) // Joypad Left diff --git a/src/mame/drivers/appoooh.c b/src/mame/drivers/appoooh.c index 4f08e3fd575..d634575705b 100644 --- a/src/mame/drivers/appoooh.c +++ b/src/mame/drivers/appoooh.c @@ -375,9 +375,9 @@ static const gfx_layout robowres_spritelayout = static GFXDECODE_START( robowres ) GFXDECODE_ENTRY( "gfx1", 0, robowres_charlayout, 0, 32 ) - GFXDECODE_ENTRY( "gfx2", 0, robowres_charlayout, 0, 32 ) + GFXDECODE_ENTRY( "gfx2", 0, robowres_charlayout, 0, 32 ) GFXDECODE_ENTRY( "gfx1", 0, robowres_spritelayout, 0, 32 ) - GFXDECODE_ENTRY( "gfx2", 0, robowres_spritelayout, 0, 32 ) + GFXDECODE_ENTRY( "gfx2", 0, robowres_spritelayout, 0, 32 ) GFXDECODE_END diff --git a/src/mame/drivers/arabian.c b/src/mame/drivers/arabian.c index e7e968c5b59..5d8cff75b5a 100644 --- a/src/mame/drivers/arabian.c +++ b/src/mame/drivers/arabian.c @@ -173,7 +173,7 @@ static WRITE8_HANDLER( custom_cpu_w ) { arabian_state *state = (arabian_state *)space->machine->driver_data; - state->custom_cpu_ram[0x7f0 + offset] = data; + state->custom_cpu_ram[0x7f0 + offset] = data; } diff --git a/src/mame/drivers/aristmk4.c b/src/mame/drivers/aristmk4.c index f23c68aae82..427f91d5fcb 100644 --- a/src/mame/drivers/aristmk4.c +++ b/src/mame/drivers/aristmk4.c @@ -211,7 +211,7 @@ static WRITE8_DEVICE_HANDLER(mkiv_pia_outb) int i = 0; //pia_data = data; emet[0] = data & 0x01; /* emet1 - bit 1 - PB0 */ - /* seren1 - bit 2 - PB1 */ + /* seren1 - bit 2 - PB1 */ emet[1] = data & 0x04; /* emet3 - bit 3 - PB2 */ emet[2] = data & 0x08; /* emet4 - bit 4 - PB3 */ emet[3] = data & 0x10; /* emet5 - bit 5 - PB4 */ @@ -514,7 +514,7 @@ ROM_START( 3bagflnz ) ROM_REGION(0xc000, "tile_gfx", 0 ) ROM_LOAD("u20.bin", 0x00000, 0x2000, BAD_DUMP CRC(44babe95) SHA1(047c00ebb21030563921108b8e24f62e9ef44a10)) // gfx ROM_LOAD("u21.bin", 0x02000, 0x2000, BAD_DUMP CRC(06218c95) SHA1(cbda8e50fd4e9c8a3c51a006921a85d4bfaa6f78)) - ROM_LOAD("u22.bin", 0x04000, 0x2000, BAD_DUMP CRC(191e73f1) SHA1(e6d510b155f9cd3427a70346e5ff28969309be4e)) + ROM_LOAD("u22.bin", 0x04000, 0x2000, BAD_DUMP CRC(191e73f1) SHA1(e6d510b155f9cd3427a70346e5ff28969309be4e)) ROM_LOAD("u45.bin", 0x06000, 0x2000, BAD_DUMP CRC(054c55cb) SHA1(3df1893095f867220f3d6a52a40bcdffbfc8b529)) ROM_LOAD("u46.bin", 0x08000, 0x2000, BAD_DUMP CRC(7a4e8b80) SHA1(35711d6a8f5675ad6c6496bf8e7e5a73504f2409)) ROM_LOAD("u47.bin", 0x0a000, 0x2000, BAD_DUMP CRC(609ecf9e) SHA1(9d819bb71f62eb4dd1b3d71748e87c7d77e2afe6)) @@ -538,7 +538,7 @@ ROM_START( blkrhino ) ROM_REGION(0xc000, "tile_gfx", 0 ) ROM_LOAD("u20.bin", 0x00000, 0x2000, CRC(0559fe98) SHA1(2ffb7b3ce3b7ba3bd846cae514b66b1c1a3be91f)) // gfx ROM_LOAD("u21.bin", 0x02000, 0x2000, CRC(c0b94f7b) SHA1(8fc3bc53c532407b77682e5e9ac6a625081d22a3)) - ROM_LOAD("u22.bin", 0x04000, 0x2000, CRC(2f4f0fe5) SHA1(b6c75bd3b6281a2de7bfea8162c39d58b0e8fa32)) + ROM_LOAD("u22.bin", 0x04000, 0x2000, CRC(2f4f0fe5) SHA1(b6c75bd3b6281a2de7bfea8162c39d58b0e8fa32)) ROM_LOAD("u45.bin", 0x06000, 0x2000, CRC(e483b4cd) SHA1(1cb3f77e7d470d7dcd8e50a0f59298d5546e8b58)) ROM_LOAD("u46.bin", 0x08000, 0x2000, CRC(4a0ce91d) SHA1(e2f853c69fb256870c9809cdfbba2b40b47a0004)) ROM_LOAD("u47.bin", 0x0a000, 0x2000, CRC(b265276e) SHA1(8fc0b7a0c12549b4138c51eb91b74f13282909dd)) @@ -562,7 +562,7 @@ ROM_START( coralr2 ) ROM_REGION(0xc000, "tile_gfx", 0 ) ROM_LOAD("u20.bin", 0x00000, 0x2000, CRC(5156f5ec) SHA1(8b4d0699b4477531d513e21f549fcc0ee6ea82ee)) // gfx ROM_LOAD("u21.bin", 0x02000, 0x2000, CRC(bf27732a) SHA1(9383dfc37c5c3ad0d628f2134f010e977e25ef39)) - ROM_LOAD("u22.bin", 0x04000, 0x2000, CRC(a563c2fa) SHA1(10dab35515e2d8332d114a5f103343403334a65f)) + ROM_LOAD("u22.bin", 0x04000, 0x2000, CRC(a563c2fa) SHA1(10dab35515e2d8332d114a5f103343403334a65f)) ROM_LOAD("u45.bin", 0x06000, 0x2000, CRC(73814767) SHA1(91c77d7b634bd8a5c32e0ceeb54a8bbeedfe8130)) ROM_LOAD("u46.bin", 0x08000, 0x2000, CRC(e13ec0ed) SHA1(80d5ef2d980a8fe1f2bb28b512022518ffc82de1)) ROM_LOAD("u47.bin", 0x0a000, 0x2000, CRC(30e88bb4) SHA1(dfcd21c6fc50123dfcc0e60429948c650a6de625)) @@ -586,7 +586,7 @@ ROM_START( eforest ) ROM_REGION(0xc000, "tile_gfx", 0 ) ROM_LOAD("u20.bin", 0x00000, 0x2000, CRC(00446ff1) SHA1(e37e2782669667efab07ab3cd4e2c9f87770add5)) // gfx ROM_LOAD("u21.bin", 0x02000, 0x2000, CRC(75670af6) SHA1(c6ce3dcc9e46ebdee65220cc0e0c8b43ee786ec0)) - ROM_LOAD("u22.bin", 0x04000, 0x2000, CRC(531378f3) SHA1(7ce52ccfb38c8078eeb77e43cff8e426bd8d4d0f)) + ROM_LOAD("u22.bin", 0x04000, 0x2000, CRC(531378f3) SHA1(7ce52ccfb38c8078eeb77e43cff8e426bd8d4d0f)) ROM_LOAD("u45.bin", 0x06000, 0x2000, CRC(e4dd4c72) SHA1(caeb1f754bcb7304b9a61786fb818eea7714808f)) ROM_LOAD("u46.bin", 0x08000, 0x2000, CRC(75ad8e3f) SHA1(87812850f08f8ad3057d0e5a2a20ad8acba01a26)) ROM_LOAD("u47.bin", 0x0a000, 0x2000, CRC(af9f9869) SHA1(1dac81470889a5fc5b58f3ad0c8dfa1369a800e8)) @@ -610,7 +610,7 @@ ROM_START( eforesta ) ROM_REGION(0xc000, "tile_gfx", 0 ) ROM_LOAD("u20.bin", 0x00000, 0x2000, CRC(00446ff1) SHA1(e37e2782669667efab07ab3cd4e2c9f87770add5)) // gfx ROM_LOAD("u21.bin", 0x02000, 0x2000, CRC(75670af6) SHA1(c6ce3dcc9e46ebdee65220cc0e0c8b43ee786ec0)) - ROM_LOAD("u22.bin", 0x04000, 0x2000, CRC(531378f3) SHA1(7ce52ccfb38c8078eeb77e43cff8e426bd8d4d0f)) + ROM_LOAD("u22.bin", 0x04000, 0x2000, CRC(531378f3) SHA1(7ce52ccfb38c8078eeb77e43cff8e426bd8d4d0f)) ROM_LOAD("u45.bin", 0x06000, 0x2000, CRC(e4dd4c72) SHA1(caeb1f754bcb7304b9a61786fb818eea7714808f)) ROM_LOAD("u46.bin", 0x08000, 0x2000, CRC(75ad8e3f) SHA1(87812850f08f8ad3057d0e5a2a20ad8acba01a26)) ROM_LOAD("u47.bin", 0x0a000, 0x2000, CRC(af9f9869) SHA1(1dac81470889a5fc5b58f3ad0c8dfa1369a800e8)) @@ -634,7 +634,7 @@ ROM_START( eforestb ) ROM_REGION(0xc000, "tile_gfx", 0 ) ROM_LOAD("u20.bin", 0x00000, 0x2000, CRC(bf3a23b0) SHA1(00405e0c0ac03ecffba1077bacf61265cca72130)) // gfx ROM_LOAD("u21.bin", 0x02000, 0x2000, CRC(ba171964) SHA1(7d43559965f467f07419f77d07d7d34ae60d2e90)) - ROM_LOAD("u22.bin", 0x04000, 0x2000, CRC(531378f3) SHA1(7ce52ccfb38c8078eeb77e43cff8e426bd8d4d0f)) + ROM_LOAD("u22.bin", 0x04000, 0x2000, CRC(531378f3) SHA1(7ce52ccfb38c8078eeb77e43cff8e426bd8d4d0f)) ROM_LOAD("u45.bin", 0x06000, 0x2000, CRC(e4dd4c72) SHA1(caeb1f754bcb7304b9a61786fb818eea7714808f)) ROM_LOAD("u46.bin", 0x08000, 0x2000, CRC(a3ca69b0) SHA1(c4bdd8afbb4d076f07d4a14a7e7ac8907a0cb7ec)) ROM_LOAD("u47.bin", 0x0a000, 0x2000, CRC(af9f9869) SHA1(1dac81470889a5fc5b58f3ad0c8dfa1369a800e8)) @@ -658,7 +658,7 @@ ROM_START( goldenc ) ROM_REGION(0xc000, "tile_gfx", 0 ) ROM_LOAD("u20.bin", 0x00000, 0x2000, CRC(d4b18412) SHA1(a42a06dbfc55730b27b3857646bfa34ae0e3cb32)) // gfx ROM_LOAD("u21.bin", 0x02000, 0x2000, CRC(80e22d51) SHA1(5e187070d300209e31f603aa561011e17d4305d2)) - ROM_LOAD("u22.bin", 0x04000, 0x2000, CRC(1f84ed74) SHA1(df2af247972d6540fd4aac31b51f3aa44248061c)) + ROM_LOAD("u22.bin", 0x04000, 0x2000, CRC(1f84ed74) SHA1(df2af247972d6540fd4aac31b51f3aa44248061c)) ROM_LOAD("u45.bin", 0x06000, 0x2000, CRC(9d267ef1) SHA1(3781e63552036dc7613b21704a4456ddfb67433f)) ROM_LOAD("u46.bin", 0x08000, 0x2000, CRC(a3ca369e) SHA1(e3076c9f3017991b93214bebf7f5227d995eeda1)) ROM_LOAD("u47.bin", 0x0a000, 0x2000, CRC(844fa43b) SHA1(b8ef6cc2aca955f41b15cd8e3c281eee4b611e80)) @@ -682,7 +682,7 @@ ROM_START( swtht2nz ) ROM_REGION(0xc000, "tile_gfx", 0 ) ROM_LOAD("u20.bin", 0x00000, 0x2000, CRC(1e38dfc3) SHA1(40a75fc35ebd49ea9c21cb42c30a2aba988c3139)) // gfx ROM_LOAD("u21.bin", 0x02000, 0x2000, CRC(77caf3fa) SHA1(559898ccffffd8f59c555722dea75600c823997f)) - ROM_LOAD("u22.bin", 0x04000, 0x2000, CRC(76babc55) SHA1(0902497ad2222490a690fe77feacc350d2997403)) + ROM_LOAD("u22.bin", 0x04000, 0x2000, CRC(76babc55) SHA1(0902497ad2222490a690fe77feacc350d2997403)) ROM_LOAD("u45.bin", 0x06000, 0x2000, CRC(da9514b5) SHA1(d63562095cec463864dfd2c580aa93f45adef853)) ROM_LOAD("u46.bin", 0x08000, 0x2000, CRC(4d03c73f) SHA1(7ae629a90feb87019cc01ecef804c5ba28861f00)) ROM_LOAD("u47.bin", 0x0a000, 0x2000, CRC(c51e37bb) SHA1(8f3d9b61926fe21089559736b3458fe3b84618f2)) @@ -706,7 +706,7 @@ ROM_START( kgbird ) ROM_REGION(0xc000, "tile_gfx", 0 ) ROM_LOAD("u20.bin", 0x00000, 0x2000, CRC(df737d57) SHA1(2ec7efe55938ee11376d12d51516c4094ad3fc01)) // gfx ROM_LOAD("u21.bin", 0x02000, 0x2000, CRC(8e9a65d9) SHA1(e305b8d75b9666377498abf3e2801033effb969b)) - ROM_LOAD("u22.bin", 0x04000, 0x2000, CRC(5614ee55) SHA1(3eb3872aa8d2b8c2bd798fd46cc715c64bf35714)) + ROM_LOAD("u22.bin", 0x04000, 0x2000, CRC(5614ee55) SHA1(3eb3872aa8d2b8c2bd798fd46cc715c64bf35714)) ROM_LOAD("u45.bin", 0x06000, 0x2000, CRC(cf496cf2) SHA1(cf097835b5f3d5a656ff84063c54d6b1d40703cd)) ROM_LOAD("u46.bin", 0x08000, 0x2000, CRC(e155c8d4) SHA1(9c50152dd420d545a88eaea98c2dd2ef49cf056a)) ROM_LOAD("u47.bin", 0x0a000, 0x2000, CRC(f91b66ba) SHA1(4f5d0f0562c6a6029ad6d76507091a159983d6f4)) @@ -730,7 +730,7 @@ ROM_START( kgbirda ) ROM_REGION(0xc000, "tile_gfx", 0 ) ROM_LOAD("u20.bin", 0x00000, 0x2000, CRC(df737d57) SHA1(2ec7efe55938ee11376d12d51516c4094ad3fc01)) // gfx ROM_LOAD("u21.bin", 0x02000, 0x2000, CRC(8e9a65d9) SHA1(e305b8d75b9666377498abf3e2801033effb969b)) - ROM_LOAD("u22.bin", 0x04000, 0x2000, CRC(5614ee55) SHA1(3eb3872aa8d2b8c2bd798fd46cc715c64bf35714)) + ROM_LOAD("u22.bin", 0x04000, 0x2000, CRC(5614ee55) SHA1(3eb3872aa8d2b8c2bd798fd46cc715c64bf35714)) ROM_LOAD("u45.bin", 0x06000, 0x2000, CRC(cf496cf2) SHA1(cf097835b5f3d5a656ff84063c54d6b1d40703cd)) ROM_LOAD("u46.bin", 0x08000, 0x2000, CRC(e155c8d4) SHA1(9c50152dd420d545a88eaea98c2dd2ef49cf056a)) ROM_LOAD("u47.bin", 0x0a000, 0x2000, CRC(f91b66ba) SHA1(4f5d0f0562c6a6029ad6d76507091a159983d6f4)) @@ -754,7 +754,7 @@ ROM_START( phantomp ) ROM_REGION(0xc000, "tile_gfx", 0 ) ROM_LOAD("u20.bin", 0x00000, 0x2000, CRC(0f73cf57) SHA1(f99aa9671297d8cefeff86e642af5ea3e7f6f6fb)) // gfx ROM_LOAD("u21.bin", 0x02000, 0x2000, CRC(2449d69e) SHA1(181d7d093dce1acc332255cab5d56a9043bcab47)) - ROM_LOAD("u22.bin", 0x04000, 0x2000, CRC(5cb0f179) SHA1(041f7baa5a36f544a98832753ff54ca5238f12c5)) + ROM_LOAD("u22.bin", 0x04000, 0x2000, CRC(5cb0f179) SHA1(041f7baa5a36f544a98832753ff54ca5238f12c5)) ROM_LOAD("u45.bin", 0x06000, 0x2000, CRC(75f94143) SHA1(aac2b0bee1a0d83b25c6fd21f00803209b621543)) ROM_LOAD("u46.bin", 0x08000, 0x2000, CRC(6ead5ffc) SHA1(1611d5e2dd5ea06525b6079577a45e713a8065d5)) ROM_LOAD("u47.bin", 0x0a000, 0x2000, CRC(c1fb4f23) SHA1(6c9a4e52bd0312c9b49f91a1f563fecd87e5bb82)) @@ -778,7 +778,7 @@ ROM_START( topgear ) ROM_REGION(0xc000, "tile_gfx", 0 ) ROM_LOAD("u20.bin", 0x00000, 0x2000, CRC(e3163956) SHA1(b3b55be33fad96858dc683860d72c81ed02b3d97)) // gfx ROM_LOAD("u21.bin", 0x02000, 0x2000, CRC(9ce936cb) SHA1(cca6ec0190a61cb0b52fbe1b11fb678f5e0960df)) - ROM_LOAD("u22.bin", 0x04000, 0x2000, CRC(972f091a) SHA1(b94a04e9503fb6f1a687c854076cfc9629ed7b6a)) + ROM_LOAD("u22.bin", 0x04000, 0x2000, CRC(972f091a) SHA1(b94a04e9503fb6f1a687c854076cfc9629ed7b6a)) ROM_LOAD("u45.bin", 0x06000, 0x2000, CRC(27fd4204) SHA1(0d082a4297a384c992188dd43be0ecb706117c13)) ROM_LOAD("u46.bin", 0x08000, 0x2000, CRC(186f3e3b) SHA1(57f82a79a3d24090f33f5525207d6697e954cdf5)) ROM_LOAD("u47.bin", 0x0a000, 0x2000, CRC(dc7d2dab) SHA1(16d223f28b377fafb478d6124fc0eb6d7dd7d591)) @@ -802,7 +802,7 @@ ROM_START( wtigernz ) ROM_REGION(0xc000, "tile_gfx", 0 ) ROM_LOAD("u20.bin", 0x00000, 0x2000, CRC(08624625) SHA1(3c052220b171f8ef009484f0ea38074b538f542b)) // gfx ROM_LOAD("u21.bin", 0x02000, 0x2000, CRC(4bce2fa1) SHA1(8c25cd51ea61a4a9ff1238d1617e38b2cd298c53)) - ROM_LOAD("u22.bin", 0x04000, 0x2000, CRC(da141f20) SHA1(e0ebeeff2e085a30032d29748f5aa6116428aaa8)) + ROM_LOAD("u22.bin", 0x04000, 0x2000, CRC(da141f20) SHA1(e0ebeeff2e085a30032d29748f5aa6116428aaa8)) ROM_LOAD("u45.bin", 0x06000, 0x2000, CRC(13783f87) SHA1(662f6afdd027c3d139d7dfcd45a4a2a5a2bf2101)) ROM_LOAD("u46.bin", 0x08000, 0x2000, CRC(7dfd06ec) SHA1(51fbc3d24e270edb8de432a99ca28695e42e72a6)) ROM_LOAD("u47.bin", 0x0a000, 0x2000, CRC(177a45ea) SHA1(6b044f88c79de571a007fb71ff2f99587babe474)) diff --git a/src/mame/drivers/armedf.c b/src/mame/drivers/armedf.c index 4e93fcba89d..964b0782f27 100644 --- a/src/mame/drivers/armedf.c +++ b/src/mame/drivers/armedf.c @@ -447,8 +447,8 @@ static READ8_HANDLER( soundlatch_clear_r ) static ADDRESS_MAP_START( sound_portmap, ADDRESS_SPACE_IO, 8 ) ADDRESS_MAP_GLOBAL_MASK(0xff) AM_RANGE(0x0, 0x1) AM_DEVWRITE("ymsnd", ym3812_w) - AM_RANGE(0x2, 0x2) AM_DEVWRITE("dac1", dac_signed_w) - AM_RANGE(0x3, 0x3) AM_DEVWRITE("dac2", dac_signed_w) + AM_RANGE(0x2, 0x2) AM_DEVWRITE("dac1", dac_signed_w) + AM_RANGE(0x3, 0x3) AM_DEVWRITE("dac2", dac_signed_w) AM_RANGE(0x4, 0x4) AM_READ(soundlatch_clear_r) AM_RANGE(0x6, 0x6) AM_READ(soundlatch_r) ADDRESS_MAP_END diff --git a/src/mame/drivers/astrocde.c b/src/mame/drivers/astrocde.c index 16139c4575c..cfca2d174e9 100644 --- a/src/mame/drivers/astrocde.c +++ b/src/mame/drivers/astrocde.c @@ -311,7 +311,7 @@ static READ8_HANDLER( wow_io_r ) case 3: astrocade_sparkle[1] = data; break; case 4: astrocade_sparkle[2] = data; break; case 5: astrocade_sparkle[3] = data; break; - case 7: coin_counter_w(space->machine, 2, data); break; + case 7: coin_counter_w(space->machine, 2, data); break; } return 0xff; } @@ -502,7 +502,7 @@ static WRITE8_HANDLER( demndrgn_sound_w ) static Z80CTC_INTERFACE( ctc_intf ) { 0, /* timer disables */ - DEVCB_CPU_INPUT_LINE("sub", INPUT_LINE_IRQ0), /* interrupt handler */ + DEVCB_CPU_INPUT_LINE("sub", INPUT_LINE_IRQ0), /* interrupt handler */ DEVCB_NULL, /* ZC/TO0 callback */ DEVCB_NULL, /* ZC/TO1 callback */ DEVCB_NULL /* ZC/TO2 callback */ @@ -619,7 +619,7 @@ static ADDRESS_MAP_START( robby_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x0000, 0x3fff) AM_WRITE(astrocade_funcgen_w) AM_RANGE(0x4000, 0x7fff) AM_RAM AM_BASE_GENERIC(videoram) AM_RANGE(0x8000, 0xdfff) AM_ROM - AM_RANGE(0xe000, 0xe1ff) AM_READWRITE(protected_ram_r, protected_ram_w) AM_BASE(&protected_ram) + AM_RANGE(0xe000, 0xe1ff) AM_READWRITE(protected_ram_r, protected_ram_w) AM_BASE(&protected_ram) AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_BASE_SIZE_GENERIC(nvram) AM_RANGE(0xe800, 0xffff) AM_RAM ADDRESS_MAP_END @@ -631,8 +631,8 @@ static ADDRESS_MAP_START( profpac_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x4000, 0x7fff) AM_READWRITE(profpac_videoram_r, profpac_videoram_w) AM_RANGE(0x4000, 0xbfff) AM_ROMBANK("bank1") AM_RANGE(0xc000, 0xdfff) AM_ROM - AM_RANGE(0xe000, 0xe1ff) AM_READWRITE(protected_ram_r, protected_ram_w) AM_BASE(&protected_ram) - AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_BASE_SIZE_GENERIC(nvram) + AM_RANGE(0xe000, 0xe1ff) AM_READWRITE(protected_ram_r, protected_ram_w) AM_BASE(&protected_ram) + AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_BASE_SIZE_GENERIC(nvram) AM_RANGE(0xe800, 0xffff) AM_RAM ADDRESS_MAP_END @@ -643,7 +643,7 @@ static ADDRESS_MAP_START( demndrgn_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x4000, 0x7fff) AM_READWRITE(profpac_videoram_r, profpac_videoram_w) AM_RANGE(0x4000, 0xbfff) AM_ROMBANK("bank1") AM_RANGE(0xc000, 0xdfff) AM_ROM - AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_BASE_SIZE_GENERIC(nvram) + AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_BASE_SIZE_GENERIC(nvram) AM_RANGE(0xe800, 0xffff) AM_RAM ADDRESS_MAP_END @@ -925,8 +925,8 @@ static INPUT_PORTS_START( wow ) PORT_DIPSETTING( 0x08, DEF_STR( English ) ) PORT_DIPSETTING( 0x00, "Foreign (NEED ROM)" ) /* "Requires A082-91374-A000" */ PORT_DIPNAME( 0x10, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("S1:5") - PORT_DIPSETTING( 0x10, "2 for 1 Credit / 5 for 2 Credits" ) - PORT_DIPSETTING( 0x00, "3 for 1 Credit / 7 for 2 Credits" ) + PORT_DIPSETTING( 0x10, "2 for 1 Credit / 5 for 2 Credits" ) + PORT_DIPSETTING( 0x00, "3 for 1 Credit / 7 for 2 Credits" ) PORT_DIPNAME( 0x20, 0x20, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("S1:6") PORT_DIPSETTING( 0x20, "After 3rd Level" ) PORT_DIPSETTING( 0x00, "After 4th Level" ) @@ -1603,7 +1603,7 @@ ROM_START( robby ) ROM_LOAD( "rotox6.bin", 0x9000, 0x1000, CRC(7916b730) SHA1(c5166625a404da4a93a1a7ae21d01fdb6e78680e) ) ROM_LOAD( "rotox7.bin", 0xa000, 0x1000, CRC(276dc4a5) SHA1(d740b30c28f6a94ee2348291e80d57af5c2e2d99) ) ROM_LOAD( "rotox8.bin", 0xb000, 0x1000, CRC(1ef13457) SHA1(4dc1ee9ce2a28c4ba75e630fbfe4659cd68d3a66) ) - ROM_LOAD( "rotox9.bin", 0xc000, 0x1000, CRC(370352bf) SHA1(72cd35b4306b46de3d2a3e4e46fa4917ed9d18cb) ) + ROM_LOAD( "rotox9.bin", 0xc000, 0x1000, CRC(370352bf) SHA1(72cd35b4306b46de3d2a3e4e46fa4917ed9d18cb) ) ROM_LOAD( "rotox10.bin", 0xd000, 0x1000, CRC(e762cbda) SHA1(48c274a859963097a90f80c48366250301eddb5f) ) ROM_END diff --git a/src/mame/drivers/astrof.c b/src/mame/drivers/astrof.c index 48429581094..34aed881e88 100644 --- a/src/mame/drivers/astrof.c +++ b/src/mame/drivers/astrof.c @@ -61,9 +61,9 @@ #include "includes/astrof.h" -#define MASTER_CLOCK (XTAL_10_595MHz) +#define MASTER_CLOCK (XTAL_10_595MHz) #define MAIN_CPU_CLOCK (MASTER_CLOCK / 16) -#define PIXEL_CLOCK (MASTER_CLOCK / 2) +#define PIXEL_CLOCK (MASTER_CLOCK / 2) #define HTOTAL (0x150) #define HBEND (0x000) #define HBSTART (0x100) @@ -884,7 +884,7 @@ static INPUT_PORTS_START( tomahawk ) PORT_BIT( 0x1f, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(tomahawk_controls_r, NULL) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1 ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START2 ) - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_START("P1") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY @@ -902,7 +902,7 @@ static INPUT_PORTS_START( tomahawk ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL PORT_BIT( 0xe0, IP_ACTIVE_HIGH, IPT_UNUSED ) - PORT_START("DSW") + PORT_START("DSW") PORT_DIPNAME( 0x03, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW:1,2") PORT_DIPSETTING( 0x00, "3" ) PORT_DIPSETTING( 0x01, "4" ) diff --git a/src/mame/drivers/atarisy1.c b/src/mame/drivers/atarisy1.c index 053bc6d9336..eeba497b1e6 100644 --- a/src/mame/drivers/atarisy1.c +++ b/src/mame/drivers/atarisy1.c @@ -833,27 +833,27 @@ MACHINE_DRIVER_END #define MOTHERBOARD_BIOS \ ROM_SYSTEM_BIOS( 0, "ttl", "TTL Motherboard (Rev 2)" ) \ - ROM_LOAD16_BYTE_BIOS(0, "136032.205.l13", 0x00000, 0x04000, CRC(88d0be26) SHA1(d124045eccc562ff0423b23a240e27ad740fa0c9) ) \ + ROM_LOAD16_BYTE_BIOS(0, "136032.205.l13", 0x00000, 0x04000, CRC(88d0be26) SHA1(d124045eccc562ff0423b23a240e27ad740fa0c9) ) \ ROM_LOAD16_BYTE_BIOS(0, "136032.206.l12", 0x00001, 0x04000, CRC(3c79ef05) SHA1(20fdca7131478e1ee12691bdafd2d5bb74cbd16f) ) \ ROM_SYSTEM_BIOS( 1, "ttl1", "TTL Motherboard (Rev 1)" ) \ - ROM_LOAD16_BYTE_BIOS(1, "136032.105.l13", 0x00000, 0x04000, CRC(690b37d3) SHA1(547372f1044a3442aa52fcd2b3546540aba59344) ) \ + ROM_LOAD16_BYTE_BIOS(1, "136032.105.l13", 0x00000, 0x04000, CRC(690b37d3) SHA1(547372f1044a3442aa52fcd2b3546540aba59344) ) \ ROM_LOAD16_BYTE_BIOS(1, "136032.106.l12", 0x00001, 0x04000, CRC(76ee86c4) SHA1(cbcd424510435a04e9041967a13781fd19b0f2c4) ) \ ROM_SYSTEM_BIOS( 2, "lsi", "LSI Motherboard" ) \ - ROM_LOAD16_BYTE_BIOS(2, "136032.114.j11", 0x00000, 0x04000, CRC(195c54ad) SHA1(d7cda3cd3db4c6f77074ca05e96ae11b62e048b7) ) \ + ROM_LOAD16_BYTE_BIOS(2, "136032.114.j11", 0x00000, 0x04000, CRC(195c54ad) SHA1(d7cda3cd3db4c6f77074ca05e96ae11b62e048b7) ) \ ROM_LOAD16_BYTE_BIOS(2, "136032.115.j10", 0x00001, 0x04000, CRC(7275b4dc) SHA1(0896ab37ea832a1335046353612c1b4c86d8d040) ) #define MOTHERBOARD_ALPHA \ - ROM_LOAD_BIOS(0, "136032.104.f5", 0x00000, 0x02000, CRC(7a29dc07) SHA1(72ba464da01bd6d3a91b8d9997d5ac14b6f47aad) ) \ - ROM_LOAD_BIOS(1, "136032.104.f5", 0x00000, 0x02000, CRC(7a29dc07) SHA1(72ba464da01bd6d3a91b8d9997d5ac14b6f47aad) ) \ - ROM_LOAD_BIOS(2, "136032.107.b2", 0x00000, 0x02000, CRC(315e4bea) SHA1(a00ea23fbdbf075f8f3f184275be83387e8ac82b) ) + ROM_LOAD_BIOS(0, "136032.104.f5", 0x00000, 0x02000, CRC(7a29dc07) SHA1(72ba464da01bd6d3a91b8d9997d5ac14b6f47aad) ) \ + ROM_LOAD_BIOS(1, "136032.104.f5", 0x00000, 0x02000, CRC(7a29dc07) SHA1(72ba464da01bd6d3a91b8d9997d5ac14b6f47aad) ) \ + ROM_LOAD_BIOS(2, "136032.107.b2", 0x00000, 0x02000, CRC(315e4bea) SHA1(a00ea23fbdbf075f8f3f184275be83387e8ac82b) ) #define MOTHERBOARD_PROMS \ - ROM_LOAD_BIOS(0, "136032.101.e3", 0x00000, 0x00100, CRC(7e84972a) SHA1(84d422b53547271e3a07342704a05ef481db3f99) ) \ - ROM_LOAD_BIOS(0, "136032.102.e5", 0x00000, 0x00100, CRC(ebf1e0ae) SHA1(2d327e78832edd67ca3909c25b8c8c839637a1ed) ) \ - ROM_LOAD_BIOS(0, "136032.103.f7", 0x00000, 0x00001, NO_DUMP ) /* N82S153 */ \ - ROM_LOAD_BIOS(1, "136032.101.e3", 0x00000, 0x00100, CRC(7e84972a) SHA1(84d422b53547271e3a07342704a05ef481db3f99) ) \ - ROM_LOAD_BIOS(1, "136032.102.e5", 0x00000, 0x00100, CRC(ebf1e0ae) SHA1(2d327e78832edd67ca3909c25b8c8c839637a1ed) ) \ - ROM_LOAD_BIOS(1, "136032.103.f7", 0x00000, 0x00001, NO_DUMP ) /* N82S153 */ + ROM_LOAD_BIOS(0, "136032.101.e3", 0x00000, 0x00100, CRC(7e84972a) SHA1(84d422b53547271e3a07342704a05ef481db3f99) ) \ + ROM_LOAD_BIOS(0, "136032.102.e5", 0x00000, 0x00100, CRC(ebf1e0ae) SHA1(2d327e78832edd67ca3909c25b8c8c839637a1ed) ) \ + ROM_LOAD_BIOS(0, "136032.103.f7", 0x00000, 0x00001, NO_DUMP ) /* N82S153 */ \ + ROM_LOAD_BIOS(1, "136032.101.e3", 0x00000, 0x00100, CRC(7e84972a) SHA1(84d422b53547271e3a07342704a05ef481db3f99) ) \ + ROM_LOAD_BIOS(1, "136032.102.e5", 0x00000, 0x00100, CRC(ebf1e0ae) SHA1(2d327e78832edd67ca3909c25b8c8c839637a1ed) ) \ + ROM_LOAD_BIOS(1, "136032.103.f7", 0x00000, 0x00001, NO_DUMP ) /* N82S153 */ ROM_START( atarisy1 ) ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */ @@ -1060,7 +1060,7 @@ ROM_END ROM_START( marble5 ) /* LSI Cartridge */ - ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */ + ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */ MOTHERBOARD_BIOS ROM_LOAD16_BYTE( "136033.201", 0x10000, 0x08000, CRC(9395804d) SHA1(7cca2cc85a9678199c7a60c0976f3e0362f8538f) ) /* Located at B10 */ ROM_LOAD16_BYTE( "136033.202", 0x10001, 0x08000, CRC(edd313f5) SHA1(f3ec6f5812287e187026446fe286f257b54c426e) ) /* Located at A10 */ @@ -1086,7 +1086,7 @@ ROM_START( marble5 ) /* LSI Cartridge */ ROM_LOAD( "136033.116", 0x94000, 0x04000, CRC(84ee1c80) SHA1(5192c0a2887f46b616d130bdbfffbbd5e394e9a3) ) /* bank 2, plane 1 - located at B7 */ ROM_LOAD( "136033.117", 0xa4000, 0x04000, CRC(daa02926) SHA1(33c7a38c66fb4d67a6ee88ef2da2bba091439e0c) ) /* bank 2, plane 2 - located at C7 */ - ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */ + ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */ ROM_LOAD( "136033.118", 0x00000, 0x00200, CRC(2101b0ed) SHA1(e4fb8dfa80ed78847c697f9de2bd8540b0c04889) ) /* remap, located at A7 */ ROM_LOAD( "136033.159", 0x00200, 0x00200, CRC(19f6e767) SHA1(041f24cc03c9043c31c3294c9565dfda9bdada74) ) /* color, located at A5 */ diff --git a/src/mame/drivers/ataxx.c b/src/mame/drivers/ataxx.c index 683e1b1fc14..7ba2f408044 100644 --- a/src/mame/drivers/ataxx.c +++ b/src/mame/drivers/ataxx.c @@ -99,7 +99,7 @@ ADDRESS_MAP_END *************************************/ /* Helps document the input ports. */ -#define IPT_SLAVEHALT IPT_SPECIAL +#define IPT_SLAVEHALT IPT_SPECIAL static INPUT_PORTS_START( ataxx ) diff --git a/src/mame/drivers/avalnche.c b/src/mame/drivers/avalnche.c index 07c73fcbcd1..8ccc642cf34 100644 --- a/src/mame/drivers/avalnche.c +++ b/src/mame/drivers/avalnche.c @@ -271,22 +271,22 @@ MACHINE_DRIVER_END ROM_START( avalnche ) ROM_REGION( 0x8000, "maincpu", 0 ) - ROM_LOAD_NIB_HIGH( "30612.d2", 0x6800, 0x0800, CRC(3f975171) SHA1(afe680865da97824f1ebade4c7a2ba5d7ee2cbab) ) - ROM_LOAD_NIB_LOW ( "30615.d3", 0x6800, 0x0800, CRC(3e1a86b4) SHA1(3ff4cffea5b7a32231c0996473158f24c3bbe107) ) - ROM_LOAD_NIB_HIGH( "30613.e2", 0x7000, 0x0800, CRC(47a224d3) SHA1(9feb7444a2e5a3d90a4fe78ae5d23c3a5039bfaa) ) - ROM_LOAD_NIB_LOW ( "30616.e3", 0x7000, 0x0800, CRC(f620f0f8) SHA1(7802b399b3469fc840796c3145b5f63781090956) ) - ROM_LOAD_NIB_HIGH( "30611.c2", 0x7800, 0x0800, CRC(0ad07f85) SHA1(5a1a873b14e63dbb69ee3686ba53f7ca831fe9d0) ) - ROM_LOAD_NIB_LOW ( "30614.c3", 0x7800, 0x0800, CRC(a12d5d64) SHA1(1647d7416bf9266d07f066d3797bda943e004d24) ) + ROM_LOAD_NIB_HIGH( "30612.d2", 0x6800, 0x0800, CRC(3f975171) SHA1(afe680865da97824f1ebade4c7a2ba5d7ee2cbab) ) + ROM_LOAD_NIB_LOW ( "30615.d3", 0x6800, 0x0800, CRC(3e1a86b4) SHA1(3ff4cffea5b7a32231c0996473158f24c3bbe107) ) + ROM_LOAD_NIB_HIGH( "30613.e2", 0x7000, 0x0800, CRC(47a224d3) SHA1(9feb7444a2e5a3d90a4fe78ae5d23c3a5039bfaa) ) + ROM_LOAD_NIB_LOW ( "30616.e3", 0x7000, 0x0800, CRC(f620f0f8) SHA1(7802b399b3469fc840796c3145b5f63781090956) ) + ROM_LOAD_NIB_HIGH( "30611.c2", 0x7800, 0x0800, CRC(0ad07f85) SHA1(5a1a873b14e63dbb69ee3686ba53f7ca831fe9d0) ) + ROM_LOAD_NIB_LOW ( "30614.c3", 0x7800, 0x0800, CRC(a12d5d64) SHA1(1647d7416bf9266d07f066d3797bda943e004d24) ) ROM_END ROM_START( cascade ) ROM_REGION( 0x8000, "maincpu", 0 ) - ROM_LOAD( "10005.1a", 0x6800, 0x0400, CRC(54774594) SHA1(03e013b563675fb8a30bd69836466a353db9bfc7) ) - ROM_LOAD( "10005.1b", 0x6c00, 0x0400, CRC(fd9575ad) SHA1(ed0a1343d3c0456d458561256d5ee966b6c213f4) ) - ROM_LOAD( "10005.2a", 0x7000, 0x0400, CRC(12857c75) SHA1(e42fdee70bd19d6f60e88f106a49dbbd68c591cd) ) - ROM_LOAD( "10005.2b", 0x7400, 0x0400, CRC(26361698) SHA1(587cc6f0dc068a74aac41c2cb3336d70d2dd91e5) ) - ROM_LOAD( "10005.3a", 0x7800, 0x0400, CRC(d1f422ff) SHA1(65ecbf0a22ba340d6a1768ed029030bac9c19e0f) ) - ROM_LOAD( "10005.3b", 0x7c00, 0x0400, CRC(bb243d96) SHA1(3a387a8c50cd9b0db37d12b94dc9e260892dbf21) ) + ROM_LOAD( "10005.1a", 0x6800, 0x0400, CRC(54774594) SHA1(03e013b563675fb8a30bd69836466a353db9bfc7) ) + ROM_LOAD( "10005.1b", 0x6c00, 0x0400, CRC(fd9575ad) SHA1(ed0a1343d3c0456d458561256d5ee966b6c213f4) ) + ROM_LOAD( "10005.2a", 0x7000, 0x0400, CRC(12857c75) SHA1(e42fdee70bd19d6f60e88f106a49dbbd68c591cd) ) + ROM_LOAD( "10005.2b", 0x7400, 0x0400, CRC(26361698) SHA1(587cc6f0dc068a74aac41c2cb3336d70d2dd91e5) ) + ROM_LOAD( "10005.3a", 0x7800, 0x0400, CRC(d1f422ff) SHA1(65ecbf0a22ba340d6a1768ed029030bac9c19e0f) ) + ROM_LOAD( "10005.3b", 0x7c00, 0x0400, CRC(bb243d96) SHA1(3a387a8c50cd9b0db37d12b94dc9e260892dbf21) ) ROM_END diff --git a/src/mame/drivers/bagman.c b/src/mame/drivers/bagman.c index 608fbcf220f..e1ad7389f3d 100644 --- a/src/mame/drivers/bagman.c +++ b/src/mame/drivers/bagman.c @@ -334,23 +334,23 @@ INPUT_PORTS_END static INPUT_PORTS_START( squaitsa ) PORT_START("P1") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 ) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SPECIAL ) // special handling for the p1 dial - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SPECIAL ) // ^ - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) - - PORT_START("P2") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN3 ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN4 ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START2 ) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_COCKTAIL - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_COCKTAIL - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SPECIAL ) // special handling for the p2 dial - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SPECIAL ) // ^ + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SPECIAL ) // special handling for the p1 dial + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SPECIAL ) // ^ + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) + + PORT_START("P2") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN3 ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN4 ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START2 ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_COCKTAIL + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_COCKTAIL + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SPECIAL ) // special handling for the p2 dial + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SPECIAL ) // ^ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL PORT_START("DSW") @@ -962,7 +962,7 @@ GAME( 1982, bagnard, bagman, bagman, bagman, 0, ROT270, "Valadon Auto GAME( 1982, bagnarda, bagman, bagman, bagman, bagnarda, ROT270, "Valadon Automation", "Le Bagnard (set 2)", 0 ) GAME( 1982, bagmans, bagman, bagman, bagmans, 0, ROT270, "Valadon Automation (Stern license)", "Bagman (Stern set 1)", 0 ) GAME( 1982, bagmans2, bagman, bagman, bagman, 0, ROT270, "Valadon Automation (Stern license)", "Bagman (Stern set 2)", 0 ) -GAME( 1984, sbagman, 0, bagman, sbagman, 0, ROT270, "Valadon Automation", "Super Bagman", 0 ) +GAME( 1984, sbagman, 0, bagman, sbagman, 0, ROT270, "Valadon Automation", "Super Bagman", 0 ) GAME( 1984, sbagmans, sbagman, bagman, sbagman, 0, ROT270, "Valadon Automation (Stern license)", "Super Bagman (Stern)", 0 ) GAME( 1983, pickin, 0, pickin, pickin, 0, ROT270, "Valadon Automation", "Pickin'", 0 ) GAME( 1984, botanic, 0, botanic, botanic, 0, ROT270, "Valadon Automation (Itisa license)", "Botanic", 0 ) diff --git a/src/mame/drivers/bankp.c b/src/mame/drivers/bankp.c index ddb8aac03a5..ee5db38e099 100644 --- a/src/mame/drivers/bankp.c +++ b/src/mame/drivers/bankp.c @@ -365,9 +365,9 @@ ROM_START( combh ) ROM_LOAD( "epr-10912.5i", 0xa000, 0x2000, CRC(cbe22738) SHA1(2dbdb593882ec66e783411f02941ce822e1c62a1) ) ROM_REGION( 0x0220, "proms", 0 ) - ROM_LOAD( "pr-10900.8a", 0x0000, 0x020, CRC(f95fcd66) SHA1(ed7bf6691a942f344b0230310876a63a68606922) ) /* palette */ - ROM_LOAD( "pr-10901.6f", 0x0020, 0x100, CRC(6fd981c8) SHA1(0bd2e7b72fd5e055224a675108e2e706cd6f6e5a) ) /* charset #2 lookup table */ - ROM_LOAD( "pr-10902.5a", 0x0120, 0x100, CRC(84d6bded) SHA1(67d9c4c7d7c84eb54ec655a4cf1768ca0cbb047d) ) /* charset #1 lookup table */ + ROM_LOAD( "pr-10900.8a", 0x0000, 0x020, CRC(f95fcd66) SHA1(ed7bf6691a942f344b0230310876a63a68606922) ) /* palette */ + ROM_LOAD( "pr-10901.6f", 0x0020, 0x100, CRC(6fd981c8) SHA1(0bd2e7b72fd5e055224a675108e2e706cd6f6e5a) ) /* charset #2 lookup table */ + ROM_LOAD( "pr-10902.5a", 0x0120, 0x100, CRC(84d6bded) SHA1(67d9c4c7d7c84eb54ec655a4cf1768ca0cbb047d) ) /* charset #1 lookup table */ ROM_REGION( 0x025c, "user1", 0 ) ROM_LOAD( "315-5074.2c.bin", 0x0000, 0x025b, CRC(2e57bbba) SHA1(c3e45e8a972342779442e50872a2f5f2d61e9c0a) ) diff --git a/src/mame/drivers/battlera.c b/src/mame/drivers/battlera.c index 67173de173a..9284b407962 100644 --- a/src/mame/drivers/battlera.c +++ b/src/mame/drivers/battlera.c @@ -120,7 +120,7 @@ static WRITE8_DEVICE_HANDLER( battlera_adpcm_reset_w ) } static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 ) - AM_RANGE(0x000000, 0x00ffff) AM_ROM + AM_RANGE(0x000000, 0x00ffff) AM_ROM AM_RANGE(0x040000, 0x040001) AM_DEVWRITE("ymsnd", ym2203_w) AM_RANGE(0x080000, 0x080001) AM_WRITE(battlera_adpcm_data_w) AM_RANGE(0x1fe800, 0x1fe80f) AM_DEVWRITE("c6280", c6280_w) diff --git a/src/mame/drivers/battlnts.c b/src/mame/drivers/battlnts.c index 0c80902b5e2..32205618fdd 100644 --- a/src/mame/drivers/battlnts.c +++ b/src/mame/drivers/battlnts.c @@ -214,7 +214,7 @@ static const k007342_interface bladestl_k007342_intf = static const k007420_interface bladestl_k007420_intf = { - 0x3ff, battlnts_sprite_callback /* banklimit, callback */ + 0x3ff, battlnts_sprite_callback /* banklimit, callback */ }; diff --git a/src/mame/drivers/berzerk.c b/src/mame/drivers/berzerk.c index 27ef6a95e90..12c856a15bd 100644 --- a/src/mame/drivers/berzerk.c +++ b/src/mame/drivers/berzerk.c @@ -20,7 +20,7 @@ #define MASTER_CLOCK (XTAL_10MHz) #define MAIN_CPU_CLOCK (MASTER_CLOCK / 4) -#define PIXEL_CLOCK (MASTER_CLOCK / 2) +#define PIXEL_CLOCK (MASTER_CLOCK / 2) #define S14001_CLOCK (MASTER_CLOCK / 4) #define HTOTAL (0x140) #define HBEND (0x000) @@ -311,8 +311,8 @@ static MACHINE_RESET( berzerk ) #define NUM_PENS (0x10) -#define LS181_12C (0) -#define LS181_10C (1) +#define LS181_12C (0) +#define LS181_10C (1) static VIDEO_START( berzerk ) diff --git a/src/mame/drivers/bfcobra.c b/src/mame/drivers/bfcobra.c index 5dfd2541209..c0666f5b84e 100644 --- a/src/mame/drivers/bfcobra.c +++ b/src/mame/drivers/bfcobra.c @@ -177,9 +177,9 @@ typedef union #define MODE_BITTOBYTE 0x04 #define MODE_PALREMAP 0x10 -#define CMPFUNC_LT 0x01 -#define CMPFUNC_EQ 0x02 -#define CMPFUNC_GT 0x04 +#define CMPFUNC_LT 0x01 +#define CMPFUNC_EQ 0x02 +#define CMPFUNC_GT 0x04 #define CMPFUNC_BEQ 0x08 #define CMPFUNC_LOG0 0x10 #define CMPFUNC_LOG1 0x20 @@ -1368,13 +1368,13 @@ static WRITE8_HANDLER( meter_w ) is connected, the /FIRQ line will be pulsed. */ for (i = 0; i < 8; i++) - { + { if (changed & (1 << i)) { Mechmtr_update(i, cycles, data & (1 << i) ); generic_pulse_irq_line(space->cpu, M6809_FIRQ_LINE); } - } + } } /* TODO */ diff --git a/src/mame/drivers/bfm_sc1.c b/src/mame/drivers/bfm_sc1.c index 8d0d887977a..7ec0daac26f 100644 --- a/src/mame/drivers/bfm_sc1.c +++ b/src/mame/drivers/bfm_sc1.c @@ -143,7 +143,7 @@ static int Scorpion1_GetSwitchState(int strobe, int data) { int state = 0; - if ( strobe < 7 && data < 8 ) state = (sc1_Inputs[strobe] & (1<<data))?1:0; + if ( strobe < 7 && data < 8 ) state = (sc1_Inputs[strobe] & (1<<data))?1:0; return state; } @@ -333,7 +333,7 @@ static WRITE8_HANDLER( vfd_w ) BFM_BD1_draw(0); BFM_BD1_draw(1); BFM_BD1_draw(2); - } + } } ///////////////////////////////////////////////////////////////////////////////////// @@ -766,9 +766,9 @@ static MACHINE_RESET( bfm_sc1 ) static ADDRESS_MAP_START( memmap, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x0000, 0x1FFF) AM_RAM AM_BASE_SIZE_GENERIC(nvram) //8k RAM - AM_RANGE(0x2000, 0x21FF) AM_WRITE(reel34_w) // reel 2+3 latch - AM_RANGE(0x2200, 0x23FF) AM_WRITE(reel12_w) // reel 1+2 latch - AM_RANGE(0x2400, 0x25FF) AM_WRITE(vfd_w) // vfd latch + AM_RANGE(0x2000, 0x21FF) AM_WRITE(reel34_w) // reel 2+3 latch + AM_RANGE(0x2200, 0x23FF) AM_WRITE(reel12_w) // reel 1+2 latch + AM_RANGE(0x2400, 0x25FF) AM_WRITE(vfd_w) // vfd latch AM_RANGE(0x2600, 0x27FF) AM_READWRITE(mmtr_r,mmtr_w) // mechanical meters AM_RANGE(0x2800, 0x2800) AM_READWRITE(triac_r,triac_w) // payslide triacs @@ -794,7 +794,7 @@ static ADDRESS_MAP_START( memmap, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x3801, 0x3801) AM_READNOP // uPD5579 status on soundcard (not installed) AM_RANGE(0x3600, 0x3600) AM_WRITE(bankswitch_w) // write bank - AM_RANGE(0x3800, 0x39FF) AM_WRITE(reel56_w) // reel 5+6 latch + AM_RANGE(0x3800, 0x39FF) AM_WRITE(reel56_w) // reel 5+6 latch AM_RANGE(0x4000, 0x5FFF) AM_ROM // 8k ROM AM_RANGE(0x6000, 0x7FFF) AM_ROMBANK("bank1") // 8k paged ROM (4 pages) diff --git a/src/mame/drivers/bfm_sc2.c b/src/mame/drivers/bfm_sc2.c index 3e32847f6a7..22a2b87205c 100644 --- a/src/mame/drivers/bfm_sc2.c +++ b/src/mame/drivers/bfm_sc2.c @@ -605,15 +605,15 @@ static WRITE8_HANDLER( mmtr_w ) mmtr_latch = data; for (i = 0; i<8; i++) - { + { if ( changed & (1 << i) ) - { + { if ( Mechmtr_update(i, cycles, data & (1 << i) ) ) { sc2gui_update_mmtr |= (1 << i); } - } - } + } + } if ( data & 0x1F ) cputag_set_input_line(space->machine, "maincpu", M6809_FIRQ_LINE, ASSERT_LINE ); } @@ -1275,7 +1275,7 @@ static WRITE8_HANDLER( e2ram_w ) e2data_to_read = e2ram[e2address]; if ( e2rw & 1 ) e2state = 7; // read data - else e2state = 0; //?not sure + else e2state = 0; //?not sure } else { @@ -2613,7 +2613,7 @@ GAMEL( 1995, paradice, 0, scorpion2_vid, paradice, adder_dutch,0, "BFM GAMEL( 1996, pyramid, 0, scorpion2_vid, pyramid, pyramid, 0, "BFM/ELAM", "Pyramid (Dutch, Game Card 95-750-898)", GAME_SUPPORTS_SAVE,layout_pyramid ) GAMEL( 1996, sltblgtk, 0, scorpion2_vid, sltblgtk, sltsbelg, 0, "BFM/ELAM", "Slots (Belgian Token, Game Card 95-750-943)", GAME_SUPPORTS_SAVE,layout_sltblgtk ) -GAMEL( 1996, sltblgpo, 0, scorpion2_vid, sltblgpo, sltsbelg, 0, "BFM/ELAM", "Slots (Belgian Cash, Game Card 95-750-938)", GAME_SUPPORTS_SAVE,layout_sltblgpo ) +GAMEL( 1996, sltblgpo, 0, scorpion2_vid, sltblgpo, sltsbelg, 0, "BFM/ELAM", "Slots (Belgian Cash, Game Card 95-750-938)", GAME_SUPPORTS_SAVE,layout_sltblgpo ) GAMEL( 1996, sltblgp1, sltblgpo, scorpion2_vid, sltblgpo, sltsbelg, 0, "BFM/ELAM", "Slots (Belgian Cash, Game Card 95-752-008)", GAME_SUPPORTS_SAVE,layout_sltblgpo ) GAMEL( 1997, gldncrwn, 0, scorpion2_vid, gldncrwn, gldncrwn, 0, "BFM/ELAM", "Golden Crown (Dutch, Game Card 95-752-011)", GAME_SUPPORTS_SAVE,layout_gldncrwn ) diff --git a/src/mame/drivers/bfmsys85.c b/src/mame/drivers/bfmsys85.c index 6ce922f8b3f..615bf3cfa68 100644 --- a/src/mame/drivers/bfmsys85.c +++ b/src/mame/drivers/bfmsys85.c @@ -484,4 +484,4 @@ ROM_START( m_supcrd ) ROM_END // year,name, parent, machine, input, init, monitor, company, fullname, flags -GAME( 1985,m_supcrd, 0, bfmsys85, bfmsys85, 0, 0, "BFM/ELAM", "Supercards (Dutch, Game Card 39-340-271?)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK ) +GAME( 1985,m_supcrd, 0, bfmsys85, bfmsys85, 0, 0, "BFM/ELAM", "Supercards (Dutch, Game Card 39-340-271?)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK ) diff --git a/src/mame/drivers/bigevglf.c b/src/mame/drivers/bigevglf.c index 666210454a9..4cb960f77fa 100644 --- a/src/mame/drivers/bigevglf.c +++ b/src/mame/drivers/bigevglf.c @@ -248,8 +248,8 @@ static INPUT_PORTS_START( bigevglf ) PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_SERVICE_DIPLOC( 0x04, IP_ACTIVE_LOW, "SW1:3" ) - PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:4") - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) + PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:4") + PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPSETTING( 0x08, DEF_STR( On ) ) PORT_DIPNAME( 0xf0, 0xf0, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:5,6,7,8") PORT_DIPSETTING( 0x50, DEF_STR( 2C_1C ) ) @@ -264,14 +264,14 @@ static INPUT_PORTS_START( bigevglf ) PORT_DIPSETTING( 0x02, DEF_STR( Hard ) ) PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) ) PORT_DIPNAME( 0x0c, 0x0c, "Holes" ) PORT_DIPLOCATION("SW2:3,4") - PORT_DIPSETTING( 0x04, "1" ) - PORT_DIPSETTING( 0x08, "2" ) + PORT_DIPSETTING( 0x04, "1" ) + PORT_DIPSETTING( 0x08, "2" ) PORT_DIPSETTING( 0x0c, "3" ) - PORT_DIPSETTING( 0x00, "4" ) + PORT_DIPSETTING( 0x00, "4" ) PORT_DIPNAME( 0x10, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW2:5") /* Also changes the copyright on the title screen */ PORT_DIPSETTING( 0x00, DEF_STR( English ) ) /* (c) 1986 Taito America Corp. */ - PORT_DIPSETTING( 0x10, DEF_STR( Japanese ) ) /* (c) Taito Corporation 1986 */ - PORT_DIPNAME( 0xe0, 0xa0, "Full game price (credits)" ) PORT_DIPLOCATION("SW2:6,7,8") + PORT_DIPSETTING( 0x10, DEF_STR( Japanese ) ) /* (c) Taito Corporation 1986 */ + PORT_DIPNAME( 0xe0, 0xa0, "Full game price (credits)" ) PORT_DIPLOCATION("SW2:6,7,8") PORT_DIPSETTING( 0xe0, "3" ) PORT_DIPSETTING( 0xc0, "4" ) PORT_DIPSETTING( 0xa0, "5" ) @@ -300,7 +300,7 @@ static INPUT_PORTS_START( bigevglj ) PORT_MODIFY("DSW2") PORT_DIPNAME( 0x10, 0x10, DEF_STR( Language ) ) PORT_DIPLOCATION("SW2:5") /* Doesn't change the title screen copyright like the US set */ PORT_DIPSETTING( 0x00, DEF_STR( English ) ) - PORT_DIPSETTING( 0x10, DEF_STR( Japanese ) ) + PORT_DIPSETTING( 0x10, DEF_STR( Japanese ) ) INPUT_PORTS_END @@ -320,7 +320,7 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( bigevglf_portmap, ADDRESS_SPACE_IO, 8 ) ADDRESS_MAP_GLOBAL_MASK(0xff) - AM_RANGE(0x00, 0x00) AM_WRITENOP /* video ram enable ???*/ + AM_RANGE(0x00, 0x00) AM_WRITENOP /* video ram enable ???*/ AM_RANGE(0x01, 0x01) AM_WRITE(bigevglf_gfxcontrol_w) /* plane select */ AM_RANGE(0x02, 0x02) AM_WRITE(beg_banking_w) AM_RANGE(0x03, 0x03) AM_WRITE(beg13_a_set_w) @@ -588,7 +588,7 @@ ROM_START( bigevglf ) ROM_REGION( 0x10000, "sub", 0 ) ROM_LOAD( "a67-11", 0x00000, 0x4000, CRC(a2660d20) SHA1(3d8b670c071862d677d4e30655dcb6b8d830648a)) - ROM_REGION( 0x10000, "audiocpu", 0 ) + ROM_REGION( 0x10000, "audiocpu", 0 ) ROM_LOAD( "a67-16", 0x0000, 0x4000, CRC(5fb6d22e) SHA1(1701aa94b7f524187fd7213a94535bed3e8b6cc9)) ROM_LOAD( "a67-17", 0x4000, 0x4000, CRC(9f57deae) SHA1(dbdb3d77c3de0113ef6671aec854e4e44ee162ef)) ROM_LOAD( "a67-18", 0x8000, 0x4000, CRC(40d54fed) SHA1(bfa0922809bffafec15d3ef59ac8b8ad653860a1)) @@ -619,7 +619,7 @@ ROM_START( bigevglfj ) ROM_REGION( 0x10000, "sub", 0 ) ROM_LOAD( "a67-11", 0x00000, 0x4000, CRC(a2660d20) SHA1(3d8b670c071862d677d4e30655dcb6b8d830648a)) - ROM_REGION( 0x10000, "audiocpu", 0 ) + ROM_REGION( 0x10000, "audiocpu", 0 ) ROM_LOAD( "a67-16", 0x0000, 0x4000, CRC(5fb6d22e) SHA1(1701aa94b7f524187fd7213a94535bed3e8b6cc9)) ROM_LOAD( "a67-17", 0x4000, 0x4000, CRC(9f57deae) SHA1(dbdb3d77c3de0113ef6671aec854e4e44ee162ef)) ROM_LOAD( "a67-18", 0x8000, 0x4000, CRC(40d54fed) SHA1(bfa0922809bffafec15d3ef59ac8b8ad653860a1)) diff --git a/src/mame/drivers/bigfghtr.c b/src/mame/drivers/bigfghtr.c index 75c3b46e2fd..00686a13744 100644 --- a/src/mame/drivers/bigfghtr.c +++ b/src/mame/drivers/bigfghtr.c @@ -259,7 +259,7 @@ static void draw_sprites( running_machine *machine, bitmap_t *bitmap, const rect drawgfx_transpen(bitmap,cliprect,machine->gfx[3], code & 0xfff, color, - flipx,flipy, + flipx,flipy, sx,sy,15); } } diff --git a/src/mame/drivers/bishi.c b/src/mame/drivers/bishi.c index 19ca252d01d..5e97f7b511a 100644 --- a/src/mame/drivers/bishi.c +++ b/src/mame/drivers/bishi.c @@ -197,7 +197,7 @@ static INPUT_PORTS_START( bishi ) PORT_START("DSW") PORT_DIPNAME( 0x0007, 0x0004, DEF_STR( Difficulty ) ) PORT_DIPSETTING( 0x0007, DEF_STR( Easiest ) ) - PORT_DIPSETTING( 0x0006, DEF_STR( Very_Easy) ) + PORT_DIPSETTING( 0x0006, DEF_STR( Very_Easy) ) PORT_DIPSETTING( 0x0005, DEF_STR( Easy ) ) PORT_DIPSETTING( 0x0004, DEF_STR( Medium ) ) PORT_DIPSETTING( 0x0003, DEF_STR( Medium_Hard ) ) @@ -298,7 +298,7 @@ static INPUT_PORTS_START( bishi2p ) PORT_START("DSW") PORT_DIPNAME( 0x0007, 0x0004, DEF_STR( Difficulty ) ) PORT_DIPSETTING( 0x0007, DEF_STR( Easiest ) ) - PORT_DIPSETTING( 0x0006, DEF_STR( Very_Easy) ) + PORT_DIPSETTING( 0x0006, DEF_STR( Very_Easy) ) PORT_DIPSETTING( 0x0005, DEF_STR( Easy ) ) PORT_DIPSETTING( 0x0004, DEF_STR( Medium ) ) PORT_DIPSETTING( 0x0003, DEF_STR( Medium_Hard ) ) diff --git a/src/mame/drivers/bladestl.c b/src/mame/drivers/bladestl.c index fe858a624a4..ba787fcde99 100644 --- a/src/mame/drivers/bladestl.c +++ b/src/mame/drivers/bladestl.c @@ -300,7 +300,7 @@ static const k007342_interface bladestl_k007342_intf = static const k007420_interface bladestl_k007420_intf = { - 0x3ff, bladestl_sprite_callback /* banklimit, callback */ + 0x3ff, bladestl_sprite_callback /* banklimit, callback */ }; diff --git a/src/mame/drivers/blktiger.c b/src/mame/drivers/blktiger.c index 33dd5679290..06977771e56 100644 --- a/src/mame/drivers/blktiger.c +++ b/src/mame/drivers/blktiger.c @@ -130,7 +130,7 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( blktiger_mcu_io_map, ADDRESS_SPACE_IO, 8 ) AM_RANGE(MCS51_PORT_P0,MCS51_PORT_P0) AM_READWRITE(blktiger_from_main_r,blktiger_to_main_w) - AM_RANGE(MCS51_PORT_P1,MCS51_PORT_P3) AM_WRITENOP /* other ports unknown */ + AM_RANGE(MCS51_PORT_P1,MCS51_PORT_P3) AM_WRITENOP /* other ports unknown */ ADDRESS_MAP_END diff --git a/src/mame/drivers/blmbycar.c b/src/mame/drivers/blmbycar.c index bd3e03c1858..b9d42d96641 100644 --- a/src/mame/drivers/blmbycar.c +++ b/src/mame/drivers/blmbycar.c @@ -107,7 +107,7 @@ static ADDRESS_MAP_START( blmbycar_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x100000, 0x103fff) AM_WRITEONLY // ??? AM_RANGE(0x104000, 0x105fff) AM_RAM_WRITE(blmbycar_vram_1_w) AM_BASE_MEMBER(blmbycar_state, vram_1) // Layer 1 AM_RANGE(0x106000, 0x107fff) AM_RAM_WRITE(blmbycar_vram_0_w) AM_BASE_MEMBER(blmbycar_state, vram_0) // Layer 0 - AM_RANGE(0x108000, 0x10bfff) AM_WRITEONLY // ??? + AM_RANGE(0x108000, 0x10bfff) AM_WRITEONLY // ??? AM_RANGE(0x10c000, 0x10c003) AM_WRITEONLY AM_BASE_MEMBER(blmbycar_state, scroll_1) // Scroll 1 AM_RANGE(0x10c004, 0x10c007) AM_WRITEONLY AM_BASE_MEMBER(blmbycar_state, scroll_0) // Scroll 0 AM_RANGE(0x200000, 0x2005ff) AM_RAM_WRITE(blmbycar_palette_w) // Palette @@ -139,10 +139,10 @@ static READ16_HANDLER( waterball_unk_r ) static ADDRESS_MAP_START( watrball_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x000000, 0x0fffff) AM_ROM AM_RANGE(0xfec000, 0xfeffff) AM_RAM - AM_RANGE(0x100000, 0x103fff) AM_WRITEONLY // ??? + AM_RANGE(0x100000, 0x103fff) AM_WRITEONLY // ??? AM_RANGE(0x104000, 0x105fff) AM_RAM_WRITE(blmbycar_vram_1_w) AM_BASE_MEMBER(blmbycar_state, vram_1) // Layer 1 AM_RANGE(0x106000, 0x107fff) AM_RAM_WRITE(blmbycar_vram_0_w) AM_BASE_MEMBER(blmbycar_state, vram_0) // Layer 0 - AM_RANGE(0x108000, 0x10bfff) AM_WRITEONLY // ??? + AM_RANGE(0x108000, 0x10bfff) AM_WRITEONLY // ??? AM_RANGE(0x10c000, 0x10c003) AM_WRITEONLY AM_BASE_MEMBER(blmbycar_state, scroll_1) // Scroll 1 AM_RANGE(0x10c004, 0x10c007) AM_WRITEONLY AM_BASE_MEMBER(blmbycar_state, scroll_0) // Scroll 0 AM_RANGE(0x200000, 0x2005ff) AM_RAM_WRITE(blmbycar_palette_w) // Palette @@ -155,7 +155,7 @@ static ADDRESS_MAP_START( watrball_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x700002, 0x700003) AM_READ_PORT("P1_P2") AM_RANGE(0x700006, 0x700007) AM_READNOP // read AM_RANGE(0x700008, 0x700009) AM_READ(waterball_unk_r) // 0x0008 must toggle - AM_RANGE(0x70000a, 0x70000b) AM_WRITEONLY // ?? busy + AM_RANGE(0x70000a, 0x70000b) AM_WRITEONLY // ?? busy AM_RANGE(0x70000c, 0x70000d) AM_WRITE(blmbycar_okibank_w) // Sound AM_RANGE(0x70000e, 0x70000f) AM_DEVREADWRITE8("oki", okim6295_r, okim6295_w, 0x00ff) // ADDRESS_MAP_END diff --git a/src/mame/drivers/bloodbro.c b/src/mame/drivers/bloodbro.c index 13bad065244..e56ec21930a 100644 --- a/src/mame/drivers/bloodbro.c +++ b/src/mame/drivers/bloodbro.c @@ -408,7 +408,7 @@ static const gfx_layout weststry_spritelayout = 4, /* 4 bits per pixel */ { RGN_FRAC(0,4), RGN_FRAC(1,4), RGN_FRAC(2,4), RGN_FRAC(3,4) }, { 0, 1, 2, 3, 4, 5, 6, 7, - 16*8+0, 16*8+1, 16*8+2, 16*8+3, 16*8+4, 16*8+5, 16*8+6, 16*8+7 }, + 16*8+0, 16*8+1, 16*8+2, 16*8+3, 16*8+4, 16*8+5, 16*8+6, 16*8+7 }, { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8, 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 }, 32*8 /* every sprite takes 32 consecutive bytes */ @@ -447,7 +447,7 @@ static MACHINE_DRIVER_START( bloodbro ) MDRV_SCREEN_ADD("screen", RASTER) MDRV_SCREEN_REFRESH_RATE(59.39) /* verified on pcb */ - MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */) + MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */) MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16) MDRV_SCREEN_SIZE(32*8, 32*8) MDRV_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1) diff --git a/src/mame/drivers/bnstars.c b/src/mame/drivers/bnstars.c index 80f2e883700..5e64902f69b 100644 --- a/src/mame/drivers/bnstars.c +++ b/src/mame/drivers/bnstars.c @@ -1264,7 +1264,7 @@ static ADDRESS_MAP_START( bnstars_map, ADDRESS_SPACE_PROGRAM, 32 ) AM_RANGE(0xfe800000, 0xfe83ffff) AM_RAM_WRITE(ms32_spramx_w) AM_BASE(&ms32_spram) AM_RANGE(0xfea00000, 0xfea07fff) AM_RAM_WRITE(ms32_tx1_ram_w) AM_BASE(&ms32_tx1_ram) AM_RANGE(0xfea08000, 0xfea0ffff) AM_RAM_WRITE(ms32_bg1_ram_w) AM_BASE(&ms32_bg1_ram) - AM_RANGE(0xfec00000, 0xfec07fff) AM_RAM_WRITE(ms32_tx0_ram_w) AM_BASE(&ms32_tx0_ram) + AM_RANGE(0xfec00000, 0xfec07fff) AM_RAM_WRITE(ms32_tx0_ram_w) AM_BASE(&ms32_tx0_ram) AM_RANGE(0xfec08000, 0xfec0ffff) AM_RAM_WRITE(ms32_bg0_ram_w) AM_BASE(&ms32_bg0_ram) AM_RANGE(0xfee00000, 0xfee1ffff) AM_RAM diff --git a/src/mame/drivers/bogeyman.c b/src/mame/drivers/bogeyman.c index 1ffa6f1219e..77152cc8760 100644 --- a/src/mame/drivers/bogeyman.c +++ b/src/mame/drivers/bogeyman.c @@ -52,8 +52,8 @@ static ADDRESS_MAP_START( bogeyman_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x0000, 0x17ff) AM_RAM AM_RANGE(0x1800, 0x1bff) AM_RAM_WRITE(bogeyman_videoram2_w) AM_BASE_MEMBER(bogeyman_state, videoram2) AM_RANGE(0x1c00, 0x1fff) AM_RAM_WRITE(bogeyman_colorram2_w) AM_BASE_MEMBER(bogeyman_state, colorram2) - AM_RANGE(0x2000, 0x20ff) AM_RAM_WRITE(bogeyman_videoram_w) AM_BASE_MEMBER(bogeyman_state, videoram) - AM_RANGE(0x2100, 0x21ff) AM_RAM_WRITE(bogeyman_colorram_w) AM_BASE_MEMBER(bogeyman_state, colorram) + AM_RANGE(0x2000, 0x20ff) AM_RAM_WRITE(bogeyman_videoram_w) AM_BASE_MEMBER(bogeyman_state, videoram) + AM_RANGE(0x2100, 0x21ff) AM_RAM_WRITE(bogeyman_colorram_w) AM_BASE_MEMBER(bogeyman_state, colorram) AM_RANGE(0x2800, 0x2bff) AM_RAM AM_BASE_SIZE_MEMBER(bogeyman_state, spriteram, spriteram_size) AM_RANGE(0x3000, 0x300f) AM_RAM_WRITE(bogeyman_paletteram_w) AM_BASE_GENERIC(paletteram) AM_RANGE(0x3800, 0x3800) AM_READ_PORT("P1") AM_WRITE(bogeyman_8910_control_w) @@ -181,7 +181,7 @@ static const gfx_layout sprites = 16, 16, 512, 3, - { 0x8000*8, 0x4000*8, 0 }, + { 0x8000*8, 0x4000*8, 0 }, { 16*8, 1+(16*8), 2+(16*8), 3+(16*8), 4+(16*8), 5+(16*8), 6+(16*8), 7+(16*8), 0, 1, 2, 3, 4, 5, 6, 7 }, { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8, @@ -266,7 +266,7 @@ MACHINE_DRIVER_END ROM_START( bogeyman ) ROM_REGION( 0x58000, "maincpu", 0 ) - ROM_LOAD( "j20.c14", 0x04000, 0x04000, CRC(ea90d637) SHA1(aa89bee806badb05119516d84e7674cd302aaf4e) ) + ROM_LOAD( "j20.c14", 0x04000, 0x04000, CRC(ea90d637) SHA1(aa89bee806badb05119516d84e7674cd302aaf4e) ) ROM_LOAD( "j10.c15", 0x08000, 0x04000, CRC(0a8f218d) SHA1(5e5958cccfe634e3d274d187a0a7fe4789f3a9c3) ) ROM_LOAD( "j00.c17", 0x0c000, 0x04000, CRC(5d486de9) SHA1(40ea14a4a25f8f38d33a8844f627ba42503e1280) ) diff --git a/src/mame/drivers/btime.c b/src/mame/drivers/btime.c index dbca222d5e5..692eb68a422 100644 --- a/src/mame/drivers/btime.c +++ b/src/mame/drivers/btime.c @@ -322,7 +322,7 @@ static WRITE8_HANDLER( zoar_w ) { btime_state *state = (btime_state *)space->machine->driver_data; - if (offset <= 0x07ff) ; + if (offset <= 0x07ff) ; else if (offset >= 0x8000 && offset <= 0x87ff) ; else if (offset >= 0x8800 && offset <= 0x8bff) btime_mirrorvideoram_w(space, offset - 0x8800, data); else if (offset >= 0x8c00 && offset <= 0x8fff) btime_mirrorcolorram_w(space, offset - 0x8c00, data); @@ -1376,7 +1376,7 @@ static const discrete_mixer_desc btime_sound_mixer_desc = */ #define BTIME_R52 RES_K(1) /* pcb: .912k = 1K || 11k */ -#define BTIME_R51 RES_K(5) /* pcb: .923k = 1k || 11k schematics 1k */ +#define BTIME_R51 RES_K(5) /* pcb: .923k = 1k || 11k schematics 1k */ #define BTIME_R50 RES_K(10) /* pcb: 1.667k = 10k || 2k */ static const discrete_op_amp_filt_info btime_opamp_desc = diff --git a/src/mame/drivers/bublbobl.c b/src/mame/drivers/bublbobl.c index 3dfdf2ca53e..91b2dc3d205 100644 --- a/src/mame/drivers/bublbobl.c +++ b/src/mame/drivers/bublbobl.c @@ -276,7 +276,7 @@ TODO: #include "includes/bublbobl.h" -#define MAIN_XTAL XTAL_24MHz +#define MAIN_XTAL XTAL_24MHz /************************************* diff --git a/src/mame/drivers/bwidow.c b/src/mame/drivers/bwidow.c index 440a0b196bf..dd6b0e7ad7d 100644 --- a/src/mame/drivers/bwidow.c +++ b/src/mame/drivers/bwidow.c @@ -407,7 +407,7 @@ static INPUT_PORTS_START( bwidow ) PORT_BIT( 0x0c, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_SERVICE( 0x10, IP_ACTIVE_LOW ) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Diagnostic Step") PORT_CODE(KEYCODE_F1) - /* bit 6 is the VG HALT bit. We set it to "low" */ + /* bit 6 is the VG HALT bit. We set it to "low" */ /* per default (busy vector processor). */ PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(avgdvg_done_r, NULL) /* bit 7 is tied to a 3kHz clock */ @@ -486,7 +486,7 @@ static INPUT_PORTS_START( gravitar ) PORT_BIT( 0x0c, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_SERVICE( 0x10, IP_ACTIVE_LOW ) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Diagnostic Step") PORT_CODE(KEYCODE_F1) - /* bit 6 is the VG HALT bit. We set it to "low" */ + /* bit 6 is the VG HALT bit. We set it to "low" */ /* per default (busy vector processor). */ PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(avgdvg_done_r, NULL) /* bit 7 is tied to a 3kHz clock */ @@ -560,7 +560,7 @@ static INPUT_PORTS_START( lunarbat ) PORT_BIT( 0x0c, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_SERVICE( 0x10, IP_ACTIVE_LOW ) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) - /* bit 6 is the VG HALT bit. We set it to "low" */ + /* bit 6 is the VG HALT bit. We set it to "low" */ /* per default (busy vector processor). */ PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(avgdvg_done_r, NULL) /* bit 7 is tied to a 3kHz clock */ @@ -594,7 +594,7 @@ static INPUT_PORTS_START( spacduel ) PORT_BIT( 0x0c, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_SERVICE( 0x10, IP_ACTIVE_LOW ) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Diagnostic Step") PORT_CODE(KEYCODE_F1) - /* bit 6 is the VG HALT bit. We set it to "low" */ + /* bit 6 is the VG HALT bit. We set it to "low" */ /* per default (busy vector processor). */ PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(avgdvg_done_r, NULL) /* bit 7 is tied to a 3kHz clock */ diff --git a/src/mame/drivers/bzone.c b/src/mame/drivers/bzone.c index 0812ff0d117..7b3b0c75160 100644 --- a/src/mame/drivers/bzone.c +++ b/src/mame/drivers/bzone.c @@ -351,7 +351,7 @@ ADDRESS_MAP_END PORT_BIT( 0x0c, IP_ACTIVE_LOW, IPT_UNUSED )\ PORT_SERVICE( 0x10, IP_ACTIVE_LOW )\ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Diagnostic Step") PORT_CODE(KEYCODE_F1)\ - /* bit 6 is the VG HALT bit. We set it to "low" */\ + /* bit 6 is the VG HALT bit. We set it to "low" */\ /* per default (busy vector processor). */\ PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(avgdvg_done_r, NULL)\ /* bit 7 is tied to a 3kHz clock */\ @@ -379,7 +379,7 @@ ADDRESS_MAP_END PORT_DIPSETTING( 0x00, DEF_STR( English ))\ PORT_DIPSETTING( 0x40, DEF_STR( German ))\ PORT_DIPSETTING( 0x80, DEF_STR( French ))\ - PORT_DIPSETTING( 0xc0, DEF_STR( Spanish )) + PORT_DIPSETTING( 0xc0, DEF_STR( Spanish )) #define BZONEDSW1\ PORT_START("DSW1")\ @@ -401,7 +401,7 @@ ADDRESS_MAP_END PORT_DIPSETTING( 0x20, "3 credits/2 coins" )\ PORT_DIPSETTING( 0x40, "5 credits/4 coins" )\ PORT_DIPSETTING( 0x60, "6 credits/4 coins" )\ - PORT_DIPSETTING( 0x80, "6 credits/5 coins" ) + PORT_DIPSETTING( 0x80, "6 credits/5 coins" ) #define BZONEADJ \ PORT_START("R11") \ @@ -413,9 +413,9 @@ static INPUT_PORTS_START( bzone ) BZONEDSW1 PORT_START("IN3") - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICKRIGHT_DOWN ) PORT_2WAY - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICKRIGHT_UP ) PORT_2WAY - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICKLEFT_DOWN ) PORT_2WAY + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICKRIGHT_DOWN ) PORT_2WAY + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICKRIGHT_UP ) PORT_2WAY + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICKLEFT_DOWN ) PORT_2WAY PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICKLEFT_UP ) PORT_2WAY PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_START1 ) diff --git a/src/mame/drivers/cabal.c b/src/mame/drivers/cabal.c index 662da46cbe4..577c5062b9c 100644 --- a/src/mame/drivers/cabal.c +++ b/src/mame/drivers/cabal.c @@ -319,9 +319,9 @@ static INPUT_PORTS_START( cabalt ) PORT_INCLUDE( common ) PORT_START("INPUTS") - PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) - PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) - PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) + PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) + PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) PORT_BIT( 0x0ff0, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_SERVICE1 ) @@ -357,9 +357,9 @@ static INPUT_PORTS_START( cabalj ) button */ PORT_START("INPUTS") - PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) - PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) - PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) + PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) + PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) PORT_BIT( 0x0ff0, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2) /* the 3rd button connects to the service switch */ @@ -386,7 +386,7 @@ static INPUT_PORTS_START( cabalj ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2) PORT_START("IN3") - PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN ) INPUT_PORTS_END static INPUT_PORTS_START( cabalbl ) diff --git a/src/mame/drivers/calchase.c b/src/mame/drivers/calchase.c index 9a5698dc8fd..7f65cc6a388 100644 --- a/src/mame/drivers/calchase.c +++ b/src/mame/drivers/calchase.c @@ -540,7 +540,7 @@ static INPUT_PORTS_START( calchase ) AT_KEYB_HELPER( 0x0200, "(MF2)Cursor Right", KEYCODE_RIGHT ) /* Right 6a ea */ AT_KEYB_HELPER( 0x0800, "(MF2)Cursor Down", KEYCODE_DOWN ) /* Down 6c ec */ AT_KEYB_HELPER( 0x1000, "(MF2)Page Down", KEYCODE_PGDN ) /* Page Down 6d ed */ - AT_KEYB_HELPER( 0x4000, "Del", KEYCODE_A ) /* Delete 6f ef */ + AT_KEYB_HELPER( 0x4000, "Del", KEYCODE_A ) /* Delete 6f ef */ PORT_START("pc_keyboard_7") INPUT_PORTS_END diff --git a/src/mame/drivers/capbowl.c b/src/mame/drivers/capbowl.c index a0a144f60ed..f83f14ca9b1 100644 --- a/src/mame/drivers/capbowl.c +++ b/src/mame/drivers/capbowl.c @@ -273,7 +273,7 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x0000, 0x07ff) AM_RAM AM_RANGE(0x1000, 0x1001) AM_DEVREADWRITE("ymsnd", ym2203_r, ym2203_w) - AM_RANGE(0x2000, 0x2000) AM_WRITENOP /* Not hooked up according to the schematics */ + AM_RANGE(0x2000, 0x2000) AM_WRITENOP /* Not hooked up according to the schematics */ AM_RANGE(0x6000, 0x6000) AM_DEVWRITE("dac", dac_w) AM_RANGE(0x7000, 0x7000) AM_READ(soundlatch_r) AM_RANGE(0x8000, 0xffff) AM_ROM diff --git a/src/mame/drivers/cbuster.c b/src/mame/drivers/cbuster.c index 0f1a9bc3553..eaf04942e43 100644 --- a/src/mame/drivers/cbuster.c +++ b/src/mame/drivers/cbuster.c @@ -330,10 +330,10 @@ MACHINE_DRIVER_END ROM_START( cbuster ) ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 code */ - ROM_LOAD16_BYTE( "fx01.rom", 0x00000, 0x20000, CRC(ddae6d83) SHA1(ce3fed1393b71821730fb8d87869a89c8e07c456) ) + ROM_LOAD16_BYTE( "fx01.rom", 0x00000, 0x20000, CRC(ddae6d83) SHA1(ce3fed1393b71821730fb8d87869a89c8e07c456) ) ROM_LOAD16_BYTE( "fx00.rom", 0x00001, 0x20000, CRC(5bc2c0de) SHA1(fa9c357ae4a5c814b7113df3b2f12982077f3e6b) ) - ROM_LOAD16_BYTE( "fx03.rom", 0x40000, 0x20000, CRC(c3d65bf9) SHA1(99dd650fd4b427bca25a0776fbd6221f93504106) ) - ROM_LOAD16_BYTE( "fx02.rom", 0x40001, 0x20000, CRC(b875266b) SHA1(a76f8e061392e17394a3f975584823ad39e0097e) ) + ROM_LOAD16_BYTE( "fx03.rom", 0x40000, 0x20000, CRC(c3d65bf9) SHA1(99dd650fd4b427bca25a0776fbd6221f93504106) ) + ROM_LOAD16_BYTE( "fx02.rom", 0x40001, 0x20000, CRC(b875266b) SHA1(a76f8e061392e17394a3f975584823ad39e0097e) ) ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */ ROM_LOAD( "fu11-.rom", 0x00000, 0x10000, CRC(65f20f10) SHA1(cf914893edd98a0f39bbf7068a469ed7d34bd90e) ) @@ -350,7 +350,7 @@ ROM_START( cbuster ) ROM_LOAD( "mab-02", 0x000000, 0x80000, CRC(58b7231d) SHA1(5b51a2fa42c67f23648be205295184a1fddc00f5) ) /* Sprites */ /* Space for extra sprites to be copied to (0x20000) */ ROM_LOAD( "mab-03", 0x0a0000, 0x80000, CRC(76053b9d) SHA1(093cd01a13509701ec9dd1a806132600a5bd1915) ) - /* Space for extra sprites to be copied to (0x20000) */ + /* Space for extra sprites to be copied to (0x20000) */ ROM_LOAD( "fu07-.rom", 0x140000, 0x10000, CRC(ca8d0bb3) SHA1(9262d6003cf0cb8c33d0f6c1d0ef35490b29f9b4) ) /* Extra sprites */ ROM_LOAD( "fu08-.rom", 0x150000, 0x10000, CRC(c6afc5c8) SHA1(feddd546f09884c51e4d1802477de4e152a51082) ) ROM_LOAD( "fu09-.rom", 0x160000, 0x10000, CRC(526809ca) SHA1(2cb9e7417211c1eb23d32e3fee71c5254d34a3ff) ) @@ -368,10 +368,10 @@ ROM_END ROM_START( cbusterw ) ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 code */ - ROM_LOAD16_BYTE( "fu01-.rom", 0x00000, 0x20000, CRC(0203e0f8) SHA1(7709636429f2cab43caba3422122dba970dfb50b) ) + ROM_LOAD16_BYTE( "fu01-.rom", 0x00000, 0x20000, CRC(0203e0f8) SHA1(7709636429f2cab43caba3422122dba970dfb50b) ) ROM_LOAD16_BYTE( "fu00-.rom", 0x00001, 0x20000, CRC(9c58626d) SHA1(6bc950929391221755972658258937a1ef96c244) ) - ROM_LOAD16_BYTE( "fu03-.rom", 0x40000, 0x20000, CRC(def46956) SHA1(e1f71a440430f8f9351ee9e1826ca2d0d5a372f8) ) - ROM_LOAD16_BYTE( "fu02-.rom", 0x40001, 0x20000, CRC(649c3338) SHA1(06373b364283706f0b00ab6d014c674e4b9818fa) ) + ROM_LOAD16_BYTE( "fu03-.rom", 0x40000, 0x20000, CRC(def46956) SHA1(e1f71a440430f8f9351ee9e1826ca2d0d5a372f8) ) + ROM_LOAD16_BYTE( "fu02-.rom", 0x40001, 0x20000, CRC(649c3338) SHA1(06373b364283706f0b00ab6d014c674e4b9818fa) ) ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */ ROM_LOAD( "fu11-.rom", 0x00000, 0x10000, CRC(65f20f10) SHA1(cf914893edd98a0f39bbf7068a469ed7d34bd90e) ) @@ -388,7 +388,7 @@ ROM_START( cbusterw ) ROM_LOAD( "mab-02", 0x000000, 0x80000, CRC(58b7231d) SHA1(5b51a2fa42c67f23648be205295184a1fddc00f5) ) /* Sprites */ /* Space for extra sprites to be copied to (0x20000) */ ROM_LOAD( "mab-03", 0x0a0000, 0x80000, CRC(76053b9d) SHA1(093cd01a13509701ec9dd1a806132600a5bd1915) ) - /* Space for extra sprites to be copied to (0x20000) */ + /* Space for extra sprites to be copied to (0x20000) */ ROM_LOAD( "fu07-.rom", 0x140000, 0x10000, CRC(ca8d0bb3) SHA1(9262d6003cf0cb8c33d0f6c1d0ef35490b29f9b4) ) /* Extra sprites */ ROM_LOAD( "fu08-.rom", 0x150000, 0x10000, CRC(c6afc5c8) SHA1(feddd546f09884c51e4d1802477de4e152a51082) ) ROM_LOAD( "fu09-.rom", 0x160000, 0x10000, CRC(526809ca) SHA1(2cb9e7417211c1eb23d32e3fee71c5254d34a3ff) ) @@ -406,10 +406,10 @@ ROM_END ROM_START( cbusterj ) ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 code */ - ROM_LOAD16_BYTE( "fr01-1", 0x00000, 0x20000, CRC(af3c014f) SHA1(a7724c48f73e52b19f3688a413e2ed013e226c6b) ) + ROM_LOAD16_BYTE( "fr01-1", 0x00000, 0x20000, CRC(af3c014f) SHA1(a7724c48f73e52b19f3688a413e2ed013e226c6b) ) ROM_LOAD16_BYTE( "fr00-1", 0x00001, 0x20000, CRC(f666ad52) SHA1(6f7325bc3bb79fd8112df677250c4bae572dfa43) ) - ROM_LOAD16_BYTE( "fr03", 0x40000, 0x20000, CRC(02c06118) SHA1(a251f936f80d8a9af033fe6d0d42e1e17ebbbf98) ) - ROM_LOAD16_BYTE( "fr02", 0x40001, 0x20000, CRC(b6c34332) SHA1(c1215c72a03b368655e20f4557475a2fc4c46c9e) ) + ROM_LOAD16_BYTE( "fr03", 0x40000, 0x20000, CRC(02c06118) SHA1(a251f936f80d8a9af033fe6d0d42e1e17ebbbf98) ) + ROM_LOAD16_BYTE( "fr02", 0x40001, 0x20000, CRC(b6c34332) SHA1(c1215c72a03b368655e20f4557475a2fc4c46c9e) ) ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */ ROM_LOAD( "fu11-.rom", 0x00000, 0x10000, CRC(65f20f10) SHA1(cf914893edd98a0f39bbf7068a469ed7d34bd90e) ) @@ -426,7 +426,7 @@ ROM_START( cbusterj ) ROM_LOAD( "mab-02", 0x000000, 0x80000, CRC(58b7231d) SHA1(5b51a2fa42c67f23648be205295184a1fddc00f5) ) /* Sprites */ /* Space for extra sprites to be copied to (0x20000) */ ROM_LOAD( "mab-03", 0x0a0000, 0x80000, CRC(76053b9d) SHA1(093cd01a13509701ec9dd1a806132600a5bd1915) ) - /* Space for extra sprites to be copied to (0x20000) */ + /* Space for extra sprites to be copied to (0x20000) */ ROM_LOAD( "fr07", 0x140000, 0x10000, CRC(52c85318) SHA1(74032dac7cb7e7d3028aab4c5f5b0a4e2a7caa03) ) /* Extra sprites */ ROM_LOAD( "fr08", 0x150000, 0x10000, CRC(ea25fbac) SHA1(d00dce24e94ffc212ab3880c00fcadb7b2116f01) ) ROM_LOAD( "fr09", 0x160000, 0x10000, CRC(f8363424) SHA1(6a6b143a3474965ef89f75e9d7b15946ae26d0d4) ) @@ -464,7 +464,7 @@ ROM_START( twocrude ) ROM_LOAD( "mab-02", 0x000000, 0x80000, CRC(58b7231d) SHA1(5b51a2fa42c67f23648be205295184a1fddc00f5) ) /* Sprites */ /* Space for extra sprites to be copied to (0x20000) */ ROM_LOAD( "mab-03", 0x0a0000, 0x80000, CRC(76053b9d) SHA1(093cd01a13509701ec9dd1a806132600a5bd1915) ) - /* Space for extra sprites to be copied to (0x20000) */ + /* Space for extra sprites to be copied to (0x20000) */ ROM_LOAD( "ft07", 0x140000, 0x10000, CRC(e3465c25) SHA1(5369a87847e6f881efc8460e6e8efcf8ff46e87f) ) ROM_LOAD( "ft08", 0x150000, 0x10000, CRC(c7f1d565) SHA1(d5dc55cf879f7feaff166a6708d60ef0bf31ddf5) ) ROM_LOAD( "ft09", 0x160000, 0x10000, CRC(6e3657b9) SHA1(7e6a140e33f9bc18e35c255680eebe152a5d8858) ) diff --git a/src/mame/drivers/cclimber.c b/src/mame/drivers/cclimber.c index 3eae9d94cec..041f8ef4279 100644 --- a/src/mame/drivers/cclimber.c +++ b/src/mame/drivers/cclimber.c @@ -638,7 +638,7 @@ static INPUT_PORTS_START( swimmer ) PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_8WAY PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON1 ) - PORT_BIT( 0xe0, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0xe0, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("P2") PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_COCKTAIL @@ -646,7 +646,7 @@ static INPUT_PORTS_START( swimmer ) PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_8WAY PORT_COCKTAIL PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_COCKTAIL PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_COCKTAIL - PORT_BIT( 0xe0, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0xe0, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("DSW1") PORT_DIPNAME( 0x03, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW A:!1,!2") @@ -668,7 +668,7 @@ static INPUT_PORTS_START( swimmer ) PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) PORT_DIPSETTING( 0x40, DEF_STR( 1C_2C ) ) PORT_DIPSETTING( 0x80, DEF_STR( 1C_3C ) ) - PORT_DIPSETTING( 0xc0, DEF_STR( 1C_6C ) ) + PORT_DIPSETTING( 0xc0, DEF_STR( 1C_6C ) ) PORT_START("DSW2") PORT_BIT( 0x03, IP_ACTIVE_HIGH, IPT_UNUSED ) diff --git a/src/mame/drivers/chaknpop.c b/src/mame/drivers/chaknpop.c index 000597ceb50..698abc156cb 100644 --- a/src/mame/drivers/chaknpop.c +++ b/src/mame/drivers/chaknpop.c @@ -53,8 +53,8 @@ static ADDRESS_MAP_START( chaknpop_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x880b, 0x880b) AM_READ_PORT("P2") AM_RANGE(0x880c, 0x880c) AM_READWRITE(chaknpop_gfxmode_r, chaknpop_gfxmode_w) AM_RANGE(0x880d, 0x880d) AM_WRITE(coinlock_w) // coin lock out - AM_RANGE(0x9000, 0x93ff) AM_RAM_WRITE(chaknpop_txram_w) AM_BASE_MEMBER(chaknpop_state, tx_ram) // TX tilemap - AM_RANGE(0x9800, 0x983f) AM_RAM_WRITE(chaknpop_attrram_w) AM_BASE_MEMBER(chaknpop_state, attr_ram) // Color attribute + AM_RANGE(0x9000, 0x93ff) AM_RAM_WRITE(chaknpop_txram_w) AM_BASE_MEMBER(chaknpop_state, tx_ram) // TX tilemap + AM_RANGE(0x9800, 0x983f) AM_RAM_WRITE(chaknpop_attrram_w) AM_BASE_MEMBER(chaknpop_state, attr_ram) // Color attribute AM_RANGE(0x9840, 0x98ff) AM_RAM AM_BASE_SIZE_MEMBER(chaknpop_state, spr_ram, spr_ram_size) // sprite AM_RANGE(0xa000, 0xbfff) AM_ROM AM_RANGE(0xc000, 0xffff) AM_RAMBANK("bank1") // bitmap plane 1-4 diff --git a/src/mame/drivers/chanbara.c b/src/mame/drivers/chanbara.c index 81e11156fd3..8172b0193da 100644 --- a/src/mame/drivers/chanbara.c +++ b/src/mame/drivers/chanbara.c @@ -201,10 +201,10 @@ static VIDEO_UPDATE( chanbara ) static ADDRESS_MAP_START( memmap, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x0000, 0x07ff) AM_RAM AM_RANGE(0x0800, 0x0bff) AM_RAM_WRITE(chanbara_videoram_w) AM_BASE_MEMBER(chanbara_state, videoram) - AM_RANGE(0x0c00, 0x0fff) AM_RAM_WRITE(chanbara_colorram_w) AM_BASE_MEMBER(chanbara_state, colorram) - AM_RANGE(0x1000, 0x10ff) AM_RAM AM_BASE_MEMBER(chanbara_state, spriteram) - AM_RANGE(0x1800, 0x19ff) AM_RAM_WRITE(chanbara_videoram2_w) AM_BASE_MEMBER(chanbara_state, videoram2) - AM_RANGE(0x1a00, 0x1bff) AM_RAM_WRITE(chanbara_colorram2_w) AM_BASE_MEMBER(chanbara_state, colorram2) + AM_RANGE(0x0c00, 0x0fff) AM_RAM_WRITE(chanbara_colorram_w) AM_BASE_MEMBER(chanbara_state, colorram) + AM_RANGE(0x1000, 0x10ff) AM_RAM AM_BASE_MEMBER(chanbara_state, spriteram) + AM_RANGE(0x1800, 0x19ff) AM_RAM_WRITE(chanbara_videoram2_w) AM_BASE_MEMBER(chanbara_state, videoram2) + AM_RANGE(0x1a00, 0x1bff) AM_RAM_WRITE(chanbara_colorram2_w) AM_BASE_MEMBER(chanbara_state, colorram2) AM_RANGE(0x2000, 0x2000) AM_READ_PORT("DSW0") AM_RANGE(0x2001, 0x2001) AM_READ_PORT("SYSTEM") AM_RANGE(0x2003, 0x2003) AM_READ_PORT("JOY") @@ -422,14 +422,14 @@ ROM_START( chanbara ) ROM_LOAD( "cp02.14c", 0x00000, 0x8000, CRC(c2b66cea) SHA1(f72f57add5f38313a72f5c521dce157edf49f70e) ) ROM_REGION( 0x02000, "gfx1", 0 ) // text layer - ROM_LOAD( "cp12.17h", 0x00000, 0x2000, CRC(b87b96de) SHA1(f8bb9f094917df305c4fed071edaa775071e40fd) ) + ROM_LOAD( "cp12.17h", 0x00000, 0x2000, CRC(b87b96de) SHA1(f8bb9f094917df305c4fed071edaa775071e40fd) ) ROM_REGION( 0x08000, "gfx3", 0 ) // bg layer - ROM_LOAD( "cp13.15h", 0x00000, 0x4000, CRC(2dc38c3d) SHA1(4bb1335b8285e91b51c28e74d8de11a8d6df0486) ) + ROM_LOAD( "cp13.15h", 0x00000, 0x4000, CRC(2dc38c3d) SHA1(4bb1335b8285e91b51c28e74d8de11a8d6df0486) ) /* rom cp14.13h is expanded at 0x4000 - 0x8000 */ ROM_REGION( 0x08000, "gfx4", 0 ) - ROM_LOAD( "cp14.13h", 0x00000, 0x2000, CRC(d31db368) SHA1(b62834137bfe4ac2013d2d16b0ead10bf2a2df83) ) + ROM_LOAD( "cp14.13h", 0x00000, 0x2000, CRC(d31db368) SHA1(b62834137bfe4ac2013d2d16b0ead10bf2a2df83) ) ROM_REGION( 0x24000, "gfx2", 0 ) ROM_LOAD( "cp03.12c", 0x08000, 0x4000, CRC(dea247fb) SHA1(d54fa30813613ef6c3b5f86b563e9ab618a9f627)) diff --git a/src/mame/drivers/chihiro.c b/src/mame/drivers/chihiro.c index 9786eccc47d..c361e2cd389 100644 --- a/src/mame/drivers/chihiro.c +++ b/src/mame/drivers/chihiro.c @@ -66,7 +66,7 @@ static MACHINE_DRIVER_START( chihiro_base ) MDRV_QUANTUM_TIME(HZ(6000)) - /* video hardware */ + /* video hardware */ MDRV_SCREEN_ADD("screen", RASTER) MDRV_SCREEN_REFRESH_RATE(60) MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32) diff --git a/src/mame/drivers/chinagat.c b/src/mame/drivers/chinagat.c index 4da4a881016..a958888edc3 100644 --- a/src/mame/drivers/chinagat.c +++ b/src/mame/drivers/chinagat.c @@ -377,7 +377,7 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( i8748_portmap, ADDRESS_SPACE_IO, 8 ) AM_RANGE(MCS48_PORT_BUS, MCS48_PORT_BUS) AM_READ(saiyugb1_mcu_command_r) - AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_DEVWRITE("adpcm", saiyugb1_m5205_clk_w) /* Drives the clock on the m5205 at 1/8 of this frequency */ + AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_DEVWRITE("adpcm", saiyugb1_m5205_clk_w) /* Drives the clock on the m5205 at 1/8 of this frequency */ AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(saiyugb1_m5205_irq_r) AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_WRITE(saiyugb1_adpcm_rom_addr_w) AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_DEVWRITE("adpcm", saiyugb1_adpcm_control_w) diff --git a/src/mame/drivers/cidelsa.c b/src/mame/drivers/cidelsa.c index fa464500516..ce5188e55d8 100644 --- a/src/mame/drivers/cidelsa.c +++ b/src/mame/drivers/cidelsa.c @@ -640,7 +640,7 @@ ROM_END /* Game Drivers */ -GAME( 1980, destryer, 0, destryer, destryer, 0, ROT90, "Cidelsa", "Destroyer (Cidelsa) (set 1)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) +GAME( 1980, destryer, 0, destryer, destryer, 0, ROT90, "Cidelsa", "Destroyer (Cidelsa) (set 1)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) GAME( 1980, destryea, destryer, destryea, destryer, 0, ROT90, "Cidelsa", "Destroyer (Cidelsa) (set 2)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) -GAME( 1981, altair, 0, altair, altair, 0, ROT90, "Cidelsa", "Altair", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) -GAME( 1981, draco, 0, draco, draco, 0, ROT90, "Cidelsa", "Draco", GAME_IMPERFECT_COLORS | GAME_SUPPORTS_SAVE ) +GAME( 1981, altair, 0, altair, altair, 0, ROT90, "Cidelsa", "Altair", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE ) +GAME( 1981, draco, 0, draco, draco, 0, ROT90, "Cidelsa", "Draco", GAME_IMPERFECT_COLORS | GAME_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/cinemat.c b/src/mame/drivers/cinemat.c index a721934f7d9..1ef73eb9684 100644 --- a/src/mame/drivers/cinemat.c +++ b/src/mame/drivers/cinemat.c @@ -363,8 +363,8 @@ static INPUT_PORTS_START( spacewar ) PORT_DIPNAME( 0x03, 0x00, "Time" ) PORT_DIPSETTING( 0x03, "0:45/coin" ) PORT_DIPSETTING( 0x00, "1:00/coin" ) - PORT_DIPSETTING( 0x01, "1:30/coin" ) - PORT_DIPSETTING( 0x02, "2:00/coin" ) + PORT_DIPSETTING( 0x01, "1:30/coin" ) + PORT_DIPSETTING( 0x02, "2:00/coin" ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) diff --git a/src/mame/drivers/cischeat.c b/src/mame/drivers/cischeat.c index c11696f8b73..b2f98f40885 100644 --- a/src/mame/drivers/cischeat.c +++ b/src/mame/drivers/cischeat.c @@ -288,16 +288,16 @@ static ADDRESS_MAP_START( cischeat_map, ADDRESS_SPACE_PROGRAM, 16 ) No mem access error from the other CPU's, though.. */ /* this is the right order of sharedram's */ - AM_RANGE(0x090000, 0x097fff) AM_READWRITE(sharedram2_r, sharedram2_w) AM_BASE(&sharedram2) // Sharedram with sub CPU#2 - AM_RANGE(0x098000, 0x09ffff) AM_READWRITE(sharedram1_r, sharedram1_w) AM_BASE(&sharedram1) // Sharedram with sub CPU#1 + AM_RANGE(0x090000, 0x097fff) AM_READWRITE(sharedram2_r, sharedram2_w) AM_BASE(&sharedram2) // Sharedram with sub CPU#2 + AM_RANGE(0x098000, 0x09ffff) AM_READWRITE(sharedram1_r, sharedram1_w) AM_BASE(&sharedram1) // Sharedram with sub CPU#1 /* Only writes to the first 0x40000 bytes affect the tilemaps: */ /* either these games support larger tilemaps or have more ram than needed */ - AM_RANGE(0x0a0000, 0x0a7fff) AM_RAM_WRITE(megasys1_scrollram_0_w) AM_BASE(&megasys1_scrollram[0]) // Scroll ram 0 - AM_RANGE(0x0a8000, 0x0affff) AM_RAM_WRITE(megasys1_scrollram_1_w) AM_BASE(&megasys1_scrollram[1]) // Scroll ram 1 - AM_RANGE(0x0b0000, 0x0b7fff) AM_RAM_WRITE(megasys1_scrollram_2_w) AM_BASE(&megasys1_scrollram[2]) // Scroll ram 2 + AM_RANGE(0x0a0000, 0x0a7fff) AM_RAM_WRITE(megasys1_scrollram_0_w) AM_BASE(&megasys1_scrollram[0]) // Scroll ram 0 + AM_RANGE(0x0a8000, 0x0affff) AM_RAM_WRITE(megasys1_scrollram_1_w) AM_BASE(&megasys1_scrollram[1]) // Scroll ram 1 + AM_RANGE(0x0b0000, 0x0b7fff) AM_RAM_WRITE(megasys1_scrollram_2_w) AM_BASE(&megasys1_scrollram[2]) // Scroll ram 2 - AM_RANGE(0x0b8000, 0x0bffff) AM_RAM_WRITE(cischeat_paletteram16_w) AM_BASE_GENERIC(paletteram) // Palettes + AM_RANGE(0x0b8000, 0x0bffff) AM_RAM_WRITE(cischeat_paletteram16_w) AM_BASE_GENERIC(paletteram) // Palettes AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE(&megasys1_ram) // RAM AM_RANGE(0x100000, 0x17ffff) AM_READ(rom_1_r) // ROM @@ -472,7 +472,7 @@ static WRITE16_HANDLER( scudhamm_leds_w ) { if (ACCESSING_BITS_8_15) { - set_led_status(space->machine, 0, data & 0x0100); // 3 buttons + set_led_status(space->machine, 0, data & 0x0100); // 3 buttons set_led_status(space->machine, 1, data & 0x0200); set_led_status(space->machine, 2, data & 0x0400); } @@ -510,7 +510,7 @@ static ADDRESS_MAP_START( scudhamm_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x0b0000, 0x0b3fff) AM_RAM_WRITE(megasys1_scrollram_2_w) AM_BASE(&megasys1_scrollram[2]) // Scroll RAM 2 AM_RANGE(0x0b8000, 0x0bffff) AM_RAM_WRITE(scudhamm_paletteram16_w) AM_BASE_GENERIC(paletteram) // Palette AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE(&megasys1_ram) // Work RAM + Spriteram - AM_RANGE(0x100000, 0x100001) AM_WRITE(scudhamm_oki_bank_w) // Sound + AM_RANGE(0x100000, 0x100001) AM_WRITE(scudhamm_oki_bank_w) // Sound AM_RANGE(0x100008, 0x100009) AM_READ_PORT("IN0") AM_WRITE(scudhamm_leds_w) // Buttons AM_RANGE(0x100014, 0x100015) AM_DEVREADWRITE8("oki1", okim6295_r, okim6295_w, 0x00ff) // Sound AM_RANGE(0x100018, 0x100019) AM_DEVREADWRITE8("oki2", okim6295_r, okim6295_w, 0x00ff) // @@ -573,7 +573,7 @@ static WRITE16_HANDLER( armchmp2_leds_w ) if (ACCESSING_BITS_8_15) { set_led_status(space->machine, 0, data & 0x0100); - set_led_status(space->machine, 1, data & 0x1000); + set_led_status(space->machine, 1, data & 0x1000); set_led_status(space->machine, 2, data & 0x2000); set_led_status(space->machine, 3, data & 0x4000); } @@ -804,7 +804,7 @@ ADDRESS_MAP_END // [4] DSW 1 & 2 [5] DSW 3 [6] Driving Wheel static INPUT_PORTS_START( bigrun ) - PORT_START("FAKE") // IN0 - Fake input port - Buttons status + PORT_START("FAKE") // IN0 - Fake input port - Buttons status PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_NAME("P1 Accelerator") PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_NAME("P1 Low Gear") PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_NAME("P1 High Gear") @@ -813,7 +813,7 @@ static INPUT_PORTS_START( bigrun ) PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 ) - PORT_SERVICE_NO_TOGGLE( 0x08, IP_ACTIVE_LOW ) // called "Test" + PORT_SERVICE_NO_TOGGLE( 0x08, IP_ACTIVE_LOW ) // called "Test" PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START1 ) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) @@ -945,7 +945,7 @@ static INPUT_PORTS_START( cischeat ) PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 ) - PORT_SERVICE_NO_TOGGLE( 0x08, IP_ACTIVE_LOW) // called "Test" + PORT_SERVICE_NO_TOGGLE( 0x08, IP_ACTIVE_LOW) // called "Test" PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START1 ) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) @@ -1546,7 +1546,7 @@ static INTERRUPT_GEN( cischeat_interrupt ) else { if (cpu_getiloops(device)%2) cpu_set_input_line(device, 2, HOLD_LINE); - else cpu_set_input_line(device, 1, HOLD_LINE); + else cpu_set_input_line(device, 1, HOLD_LINE); } } diff --git a/src/mame/drivers/cliffhgr.c b/src/mame/drivers/cliffhgr.c index d29bfda915b..6d8258f64e7 100644 --- a/src/mame/drivers/cliffhgr.c +++ b/src/mame/drivers/cliffhgr.c @@ -551,7 +551,7 @@ static INPUT_PORTS_START( goaltogo ) PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("E11:3") PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x02, "Single Coin Continue" ) PORT_DIPLOCATION("E11:2") + PORT_DIPNAME( 0x02, 0x02, "Single Coin Continue" ) PORT_DIPLOCATION("E11:2") PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) PORT_CONDITION("BANK1",0x01,PORTCOND_EQUALS,0x00) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_CONDITION("BANK1",0x01,PORTCOND_EQUALS,0x00) PORT_DIPNAME( 0x01, 0x01, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("E11:1") diff --git a/src/mame/drivers/cmmb.c b/src/mame/drivers/cmmb.c index 9428da94251..c2d24fc77a4 100644 --- a/src/mame/drivers/cmmb.c +++ b/src/mame/drivers/cmmb.c @@ -307,7 +307,7 @@ MACHINE_DRIVER_END ROM_START( cmmb162 ) ROM_REGION( 0x50000, "maincpu", 0 ) ROM_LOAD( "cmmb162.bin", 0x10000, 0x40000, CRC(71a5a75d) SHA1(0ad7b97580082cda98cb1e8aab8efcf491d0ed25) ) - ROM_COPY( "maincpu", 0x18000, 0x08000, 0x08000 ) + ROM_COPY( "maincpu", 0x18000, 0x08000, 0x08000 ) ROM_REGION( 0x1000, "gfx", ROMREGION_ERASE00 ) ROM_END diff --git a/src/mame/drivers/cninja.c b/src/mame/drivers/cninja.c index d32b4027759..f566ae74c87 100644 --- a/src/mame/drivers/cninja.c +++ b/src/mame/drivers/cninja.c @@ -136,7 +136,7 @@ static WRITE16_HANDLER( cninja_irq_w ) static READ16_HANDLER( robocop2_prot_r ) { - switch (offset<<1) { + switch (offset<<1) { case 0x41a: /* Player 1 & 2 input ports */ return input_port_read(space->machine, "IN0"); case 0x320: /* Coins */ @@ -174,8 +174,8 @@ static ADDRESS_MAP_START( cninja_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x1a4000, 0x1a47ff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram) /* Sprites */ AM_RANGE(0x1b4000, 0x1b4001) AM_WRITE(buffer_spriteram16_w) /* DMA flag */ - AM_RANGE(0x1bc000, 0x1bc0ff) AM_WRITE(deco16_104_cninja_prot_w) AM_BASE(&deco16_prot_ram) /* Protection writes */ - AM_RANGE(0x1bc000, 0x1bcfff) AM_READ(deco16_104_cninja_prot_r) AM_BASE(&deco16_prot_ram) /* Protection device */ + AM_RANGE(0x1bc000, 0x1bc0ff) AM_WRITE(deco16_104_cninja_prot_w) AM_BASE(&deco16_prot_ram) /* Protection writes */ + AM_RANGE(0x1bc000, 0x1bcfff) AM_READ(deco16_104_cninja_prot_r) AM_BASE(&deco16_prot_ram) /* Protection device */ AM_RANGE(0x308000, 0x308fff) AM_WRITENOP /* Bootleg only */ ADDRESS_MAP_END @@ -1272,10 +1272,10 @@ ROM_END ROM_START( edrandy ) /* World ver 3 */ ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 code */ - ROM_LOAD16_BYTE( "gg-00-2.k1", 0x00000, 0x20000, CRC(ce1ba964) SHA1(da21734721344eff41a64a7f2382d5c027a24782) ) + ROM_LOAD16_BYTE( "gg-00-2.k1", 0x00000, 0x20000, CRC(ce1ba964) SHA1(da21734721344eff41a64a7f2382d5c027a24782) ) ROM_LOAD16_BYTE( "gg-04-2.k3", 0x00001, 0x20000, CRC(24caed19) SHA1(bdca689dbb13685e71d3385a9ff7b356d2459d45) ) ROM_LOAD16_BYTE( "gg-01-2.j1", 0x40000, 0x20000, CRC(33677b80) SHA1(d16b926053a61723d321a50f5cabf3e5faebadcf) ) - ROM_LOAD16_BYTE( "gg-05-2.j3", 0x40001, 0x20000, CRC(79a68ca6) SHA1(b1ec168ffe7aace481055a8f38d88ed71994191d) ) + ROM_LOAD16_BYTE( "gg-05-2.j3", 0x40001, 0x20000, CRC(79a68ca6) SHA1(b1ec168ffe7aace481055a8f38d88ed71994191d) ) ROM_LOAD16_BYTE( "ge-02.h1", 0x80000, 0x20000, CRC(c2969fbb) SHA1(faa7da7f5271108dbbc95d111caa2c986e494933) ) ROM_LOAD16_BYTE( "ge-06.h3", 0x80001, 0x20000, CRC(5c2e6418) SHA1(b9ed769b27c37959fcba2acd6dba02ccd62149e7) ) ROM_LOAD16_BYTE( "ge-03.f1", 0xc0000, 0x20000, CRC(5e7b19a8) SHA1(637945e36c3665c74d31f4b14e600e93ed9be054) ) @@ -1285,7 +1285,7 @@ ROM_START( edrandy ) /* World ver 3 */ ROM_LOAD( "ge-09.k13", 0x00000, 0x10000, CRC(9f94c60b) SHA1(56edf63850189b2168c602e1f21492ef14662682) ) ROM_REGION( 0x020000, "gfx1", 0 ) - ROM_LOAD16_BYTE( "gg-10.y6", 0x000001, 0x10000, CRC(b96c6cbe) SHA1(1f3a18387f360705d2f2ab8f5780a270621e107f) ) + ROM_LOAD16_BYTE( "gg-10.y6", 0x000001, 0x10000, CRC(b96c6cbe) SHA1(1f3a18387f360705d2f2ab8f5780a270621e107f) ) ROM_LOAD16_BYTE( "gg-11.z6", 0x000000, 0x10000, CRC(ee567448) SHA1(40c673535b9edf7b8bbb4912235bbb09ef77e221) ) ROM_REGION( 0x100000, "gfx3", 0 ) @@ -1321,10 +1321,10 @@ ROM_END ROM_START( edrandy2 ) /* World ver 2 */ ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 code */ - ROM_LOAD16_BYTE( "gg00-1.k1", 0x00000, 0x20000, CRC(a029cc4a) SHA1(3801fd6df6d1299972eeadbdbba1b0b7acf89139) ) - ROM_LOAD16_BYTE( "gg04-1.k3", 0x00001, 0x20000, CRC(8b7928a4) SHA1(4075713a830c9d5e324bb790468ec555fa747106) ) + ROM_LOAD16_BYTE( "gg00-1.k1", 0x00000, 0x20000, CRC(a029cc4a) SHA1(3801fd6df6d1299972eeadbdbba1b0b7acf89139) ) + ROM_LOAD16_BYTE( "gg04-1.k3", 0x00001, 0x20000, CRC(8b7928a4) SHA1(4075713a830c9d5e324bb790468ec555fa747106) ) ROM_LOAD16_BYTE( "gg01-1.j1", 0x40000, 0x20000, CRC(84360123) SHA1(3e9241cf68839c15d7a1209fe735b51ed90a1de7) ) - ROM_LOAD16_BYTE( "gg05-1.j3", 0x40001, 0x20000, CRC(0bf85d9d) SHA1(7b7c1c32d3f0de7e675cea3d2ba4f28e9ce387a9) ) + ROM_LOAD16_BYTE( "gg05-1.j3", 0x40001, 0x20000, CRC(0bf85d9d) SHA1(7b7c1c32d3f0de7e675cea3d2ba4f28e9ce387a9) ) ROM_LOAD16_BYTE( "ge-02.h1", 0x80000, 0x20000, CRC(c2969fbb) SHA1(faa7da7f5271108dbbc95d111caa2c986e494933) ) ROM_LOAD16_BYTE( "ge-06.h3", 0x80001, 0x20000, CRC(5c2e6418) SHA1(b9ed769b27c37959fcba2acd6dba02ccd62149e7) ) ROM_LOAD16_BYTE( "ge-03.f1", 0xc0000, 0x20000, CRC(5e7b19a8) SHA1(637945e36c3665c74d31f4b14e600e93ed9be054) ) @@ -1334,7 +1334,7 @@ ROM_START( edrandy2 ) /* World ver 2 */ ROM_LOAD( "ge-09.k13", 0x00000, 0x10000, CRC(9f94c60b) SHA1(56edf63850189b2168c602e1f21492ef14662682) ) ROM_REGION( 0x020000, "gfx1", 0 ) - ROM_LOAD16_BYTE( "gg-10.y6", 0x000001, 0x10000, CRC(b96c6cbe) SHA1(1f3a18387f360705d2f2ab8f5780a270621e107f) ) + ROM_LOAD16_BYTE( "gg-10.y6", 0x000001, 0x10000, CRC(b96c6cbe) SHA1(1f3a18387f360705d2f2ab8f5780a270621e107f) ) ROM_LOAD16_BYTE( "gg-11.z6", 0x000000, 0x10000, CRC(ee567448) SHA1(40c673535b9edf7b8bbb4912235bbb09ef77e221) ) ROM_REGION( 0x100000, "gfx3", 0 ) @@ -1370,10 +1370,10 @@ ROM_END ROM_START( edrandy1 ) /* World ver 1 */ ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 code */ - ROM_LOAD16_BYTE( "1.k1", 0x00000, 0x20000, CRC(f184cdaa) SHA1(7d4a1e8acf6737a9d74d78eb414f32885ffa9846) ) /* roms were simply labeled 1 through 12 */ - ROM_LOAD16_BYTE( "5.k3", 0x00001, 0x20000, CRC(7e3a4b81) SHA1(e768dd710a8b38add9fd8d9bfc88ad3a3c353ba5) ) + ROM_LOAD16_BYTE( "1.k1", 0x00000, 0x20000, CRC(f184cdaa) SHA1(7d4a1e8acf6737a9d74d78eb414f32885ffa9846) ) /* roms were simply labeled 1 through 12 */ + ROM_LOAD16_BYTE( "5.k3", 0x00001, 0x20000, CRC(7e3a4b81) SHA1(e768dd710a8b38add9fd8d9bfc88ad3a3c353ba5) ) ROM_LOAD16_BYTE( "2.j1", 0x40000, 0x20000, CRC(212cd593) SHA1(2f4feeffa1c4a5f1345d78586a303a85fd365c23) ) - ROM_LOAD16_BYTE( "6.j3", 0x40001, 0x20000, CRC(4a96fb07) SHA1(5b7f46b2fa6ef947e0467f31ecca04877318ead4) ) + ROM_LOAD16_BYTE( "6.j3", 0x40001, 0x20000, CRC(4a96fb07) SHA1(5b7f46b2fa6ef947e0467f31ecca04877318ead4) ) ROM_LOAD16_BYTE( "ge-02.h1", 0x80000, 0x20000, CRC(c2969fbb) SHA1(faa7da7f5271108dbbc95d111caa2c986e494933) ) /* labeled as "3" */ ROM_LOAD16_BYTE( "ge-06.h3", 0x80001, 0x20000, CRC(5c2e6418) SHA1(b9ed769b27c37959fcba2acd6dba02ccd62149e7) ) /* labeled as "7" */ ROM_LOAD16_BYTE( "ge-03.f1", 0xc0000, 0x20000, CRC(5e7b19a8) SHA1(637945e36c3665c74d31f4b14e600e93ed9be054) ) /* labeled as "4" */ @@ -1384,7 +1384,7 @@ ROM_START( edrandy1 ) /* World ver 1 */ ROM_REGION( 0x020000, "gfx1", 0 ) /* Original graphics, later revised for the World sets above?? */ ROM_LOAD16_BYTE( "ge-10.y6", 0x000001, 0x10000, CRC(2528d795) SHA1(8081b5d13875287a75f868a0566a2d06e0e42949) ) /* labeled as "12" */ - ROM_LOAD16_BYTE( "ge-11.z6", 0x000000, 0x10000, CRC(e34a931e) SHA1(0e06359347e48d53ee96d6551d34685110b0f5fb) ) /* labeled as "11" */ + ROM_LOAD16_BYTE( "ge-11.z6", 0x000000, 0x10000, CRC(e34a931e) SHA1(0e06359347e48d53ee96d6551d34685110b0f5fb) ) /* labeled as "11" */ ROM_REGION( 0x100000, "gfx3", 0 ) ROM_LOAD( "mad-00", 0x000000, 0x40000, CRC(3735b22d) SHA1(fd9c3dc7a880592104c091730b9016641043987a) ) /* tiles 1 */ @@ -1419,10 +1419,10 @@ ROM_END ROM_START( edrandyj ) /* Japan ver 3 */ ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 code */ - ROM_LOAD16_BYTE( "ge-00-2.k1", 0x00000, 0x20000, CRC(b3d2403c) SHA1(9747dbe7905e1453e3e7764c874c523c54970e2e) ) - ROM_LOAD16_BYTE( "ge-04-2.k3", 0x00001, 0x20000, CRC(8a9624d6) SHA1(d5a9b56bc8a1d67fa28df95299cb205e9c965310) ) + ROM_LOAD16_BYTE( "ge-00-2.k1", 0x00000, 0x20000, CRC(b3d2403c) SHA1(9747dbe7905e1453e3e7764c874c523c54970e2e) ) + ROM_LOAD16_BYTE( "ge-04-2.k3", 0x00001, 0x20000, CRC(8a9624d6) SHA1(d5a9b56bc8a1d67fa28df95299cb205e9c965310) ) ROM_LOAD16_BYTE( "ge-01-2.j1", 0x40000, 0x20000, CRC(84360123) SHA1(3e9241cf68839c15d7a1209fe735b51ed90a1de7) ) - ROM_LOAD16_BYTE( "ge-05-2.j3", 0x40001, 0x20000, CRC(0bf85d9d) SHA1(7b7c1c32d3f0de7e675cea3d2ba4f28e9ce387a9) ) + ROM_LOAD16_BYTE( "ge-05-2.j3", 0x40001, 0x20000, CRC(0bf85d9d) SHA1(7b7c1c32d3f0de7e675cea3d2ba4f28e9ce387a9) ) ROM_LOAD16_BYTE( "ge-02.h1", 0x80000, 0x20000, CRC(c2969fbb) SHA1(faa7da7f5271108dbbc95d111caa2c986e494933) ) ROM_LOAD16_BYTE( "ge-06.h3", 0x80001, 0x20000, CRC(5c2e6418) SHA1(b9ed769b27c37959fcba2acd6dba02ccd62149e7) ) ROM_LOAD16_BYTE( "ge-03.f1", 0xc0000, 0x20000, CRC(5e7b19a8) SHA1(637945e36c3665c74d31f4b14e600e93ed9be054) ) @@ -1433,7 +1433,7 @@ ROM_START( edrandyj ) /* Japan ver 3 */ ROM_REGION( 0x020000, "gfx1", 0 ) ROM_LOAD16_BYTE( "ge-10.y6", 0x000001, 0x10000, CRC(2528d795) SHA1(8081b5d13875287a75f868a0566a2d06e0e42949) ) - ROM_LOAD16_BYTE( "ge-11.z6", 0x000000, 0x10000, CRC(e34a931e) SHA1(0e06359347e48d53ee96d6551d34685110b0f5fb) ) + ROM_LOAD16_BYTE( "ge-11.z6", 0x000000, 0x10000, CRC(e34a931e) SHA1(0e06359347e48d53ee96d6551d34685110b0f5fb) ) ROM_REGION( 0x100000, "gfx3", 0 ) ROM_LOAD( "mad-00", 0x000000, 0x40000, CRC(3735b22d) SHA1(fd9c3dc7a880592104c091730b9016641043987a) ) /* tiles 1 */ diff --git a/src/mame/drivers/cntsteer.c b/src/mame/drivers/cntsteer.c index 3d1bd5c5584..2920ad5a1f8 100644 --- a/src/mame/drivers/cntsteer.c +++ b/src/mame/drivers/cntsteer.c @@ -446,8 +446,8 @@ static WRITE8_HANDLER( gekitsui_sub_irq_ack ) static WRITE8_HANDLER( cntsteer_sound_w ) { cntsteer_state *state = (cntsteer_state *)space->machine->driver_data; - soundlatch_w(space, 0, data); - cpu_set_input_line(state->audiocpu, 0, HOLD_LINE); + soundlatch_w(space, 0, data); + cpu_set_input_line(state->audiocpu, 0, HOLD_LINE); } static WRITE8_HANDLER( zerotrgt_ctrl_w ) @@ -743,7 +743,7 @@ static const gfx_layout sprites = 16,16, RGN_FRAC(1,3), 3, - { RGN_FRAC(0,3), RGN_FRAC(1,3), RGN_FRAC(2,3) }, + { RGN_FRAC(0,3), RGN_FRAC(1,3), RGN_FRAC(2,3) }, { 16*8, 1+16*8, 2+16*8, 3+16*8, 4+16*8, 5+16*8, 6+16*8, 7+16*8, 0, 1, 2, 3, 4, 5, 6, 7 }, { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 ,8*8,9*8,10*8,11*8,12*8,13*8,14*8,15*8 }, @@ -758,9 +758,9 @@ static const gfx_layout tilelayout = { RGN_FRAC(4,8)+4, 0, 4 }, { 3, 2, 1, 0, 11, 10, 9 , 8, 19, 18, 17,16, 27, 26, 25, 24 }, { - RGN_FRAC(0,8)+0*8, RGN_FRAC(1,8)+0*8, RGN_FRAC(2,8)+0*8, RGN_FRAC(3,8)+0*8, - RGN_FRAC(0,8)+4*8, RGN_FRAC(1,8)+4*8, RGN_FRAC(2,8)+4*8, RGN_FRAC(3,8)+4*8, - RGN_FRAC(0,8)+8*8, RGN_FRAC(1,8)+8*8, RGN_FRAC(2,8)+8*8, RGN_FRAC(3,8)+8*8, + RGN_FRAC(0,8)+0*8, RGN_FRAC(1,8)+0*8, RGN_FRAC(2,8)+0*8, RGN_FRAC(3,8)+0*8, + RGN_FRAC(0,8)+4*8, RGN_FRAC(1,8)+4*8, RGN_FRAC(2,8)+4*8, RGN_FRAC(3,8)+4*8, + RGN_FRAC(0,8)+8*8, RGN_FRAC(1,8)+8*8, RGN_FRAC(2,8)+8*8, RGN_FRAC(3,8)+8*8, RGN_FRAC(0,8)+12*8, RGN_FRAC(1,8)+12*8,RGN_FRAC(2,8)+12*8,RGN_FRAC(3,8)+12*8 }, 8*16 @@ -776,7 +776,7 @@ GFXDECODE_END static GFXDECODE_START( zerotrgt ) GFXDECODE_ENTRY( "gfx1", 0x00000, zerotrgt_charlayout, 0, 256 ) /* Only 1 used so far :/ */ GFXDECODE_ENTRY( "gfx2", 0x00000, sprites, 0, 256 ) - GFXDECODE_ENTRY( "gfx3", 0x00000, tilelayout, 0, 256 ) + GFXDECODE_ENTRY( "gfx3", 0x00000, tilelayout, 0, 256 ) GFXDECODE_END /***************************************************************************/ diff --git a/src/mame/drivers/coinmstr.c b/src/mame/drivers/coinmstr.c index bef3a085d36..0bf7b319968 100644 --- a/src/mame/drivers/coinmstr.c +++ b/src/mame/drivers/coinmstr.c @@ -83,7 +83,7 @@ static WRITE8_HANDLER( quizmstr_attr1_w ) if(offset >= 0x0240) { // the later games also use attr3 for something.. - UINT32 paldata = (attr_ram1[offset] & 0x7f) | ((attr_ram2[offset] & 0x7f) << 7); + UINT32 paldata = (attr_ram1[offset] & 0x7f) | ((attr_ram2[offset] & 0x7f) << 7); tilemap_mark_tile_dirty(bg_tilemap, offset - 0x0240); coinmstr_set_pal(space->machine, paldata, offset - 0x240); @@ -98,7 +98,7 @@ static WRITE8_HANDLER( quizmstr_attr2_w ) if(offset >= 0x0240) { // the later games also use attr3 for something.. - UINT32 paldata = (attr_ram1[offset] & 0x7f) | ((attr_ram2[offset] & 0x7f) << 7); + UINT32 paldata = (attr_ram1[offset] & 0x7f) | ((attr_ram2[offset] & 0x7f) << 7); tilemap_mark_tile_dirty(bg_tilemap, offset - 0x0240); coinmstr_set_pal(space->machine, paldata, offset - 0x240); @@ -261,11 +261,11 @@ ADDRESS_MAP_END static INPUT_PORTS_START( quizmstr ) PORT_START("PIA0.A") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE1) PORT_NAME("Bookkeeping") PORT_TOGGLE /* Button 2 for second page, Button 3 erases data */ + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE1) PORT_NAME("Bookkeeping") PORT_TOGGLE /* Button 2 for second page, Button 3 erases data */ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN2 ) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE) PORT_TOGGLE + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE) PORT_TOGGLE PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON3 ) @@ -356,8 +356,8 @@ static INPUT_PORTS_START( quizmstr ) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) /* If 0x40 is HIGH the DIP Test Mode does work but bookkeeping shows always 0's */ /* If 0x40 is LOW Bookkeeping does work, but the second page (selected categories) is missing */ - PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN ) - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_START("PIA2.B") PORT_DIPNAME( 0x01, 0x01, "PIA2.B" ) diff --git a/src/mame/drivers/comebaby.c b/src/mame/drivers/comebaby.c index 9c2f668bb85..59391a75d80 100644 --- a/src/mame/drivers/comebaby.c +++ b/src/mame/drivers/comebaby.c @@ -81,7 +81,7 @@ static MACHINE_DRIVER_START( comebaby ) MDRV_CPU_ADD("maincpu", PENTIUM, 2000000000) /* Probably a Pentium .. ?? Mhz*/ MDRV_CPU_PROGRAM_MAP(comebaby_map) - /* video hardware */ + /* video hardware */ MDRV_SCREEN_ADD("screen", RASTER) MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16) MDRV_SCREEN_REFRESH_RATE(60) diff --git a/src/mame/drivers/compgolf.c b/src/mame/drivers/compgolf.c index ee914b458b9..205d2f98ca2 100644 --- a/src/mame/drivers/compgolf.c +++ b/src/mame/drivers/compgolf.c @@ -183,7 +183,7 @@ static const gfx_layout tilelayout8 = 8,8, RGN_FRAC(1,2), 3, - { RGN_FRAC(1,2)+4, 0, 4 }, + { RGN_FRAC(1,2)+4, 0, 4 }, { 0, 1, 2, 3, 8*8+0, 8*8+1, 8*8+2, 8*8+3 }, { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 }, 16*8 diff --git a/src/mame/drivers/contra.c b/src/mame/drivers/contra.c index c6b069375a6..0f88fb0650c 100644 --- a/src/mame/drivers/contra.c +++ b/src/mame/drivers/contra.c @@ -84,7 +84,7 @@ static ADDRESS_MAP_START( contra_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x4800, 0x5fff) AM_WRITEONLY AM_RANGE(0x6000, 0x7fff) AM_ROMBANK("bank1") - AM_RANGE(0x7000, 0x7000) AM_WRITE(contra_bankswitch_w) + AM_RANGE(0x7000, 0x7000) AM_WRITE(contra_bankswitch_w) AM_RANGE(0x8000, 0xffff) AM_ROM ADDRESS_MAP_END @@ -187,11 +187,11 @@ static MACHINE_DRIVER_START( contra ) MDRV_DRIVER_DATA(contra_state) /* basic machine hardware */ - MDRV_CPU_ADD("maincpu", M6809, XTAL_24MHz/16) /* 1500000? */ + MDRV_CPU_ADD("maincpu", M6809, XTAL_24MHz/16) /* 1500000? */ MDRV_CPU_PROGRAM_MAP(contra_map) MDRV_CPU_VBLANK_INT("screen", irq0_line_hold) - MDRV_CPU_ADD("audiocpu", M6809, XTAL_24MHz/12) /* 2000000? */ + MDRV_CPU_ADD("audiocpu", M6809, XTAL_24MHz/12) /* 2000000? */ MDRV_CPU_PROGRAM_MAP(sound_map) MDRV_QUANTUM_TIME(HZ(600)) /* 10 CPU slices per frame - enough for the sound CPU to read all commands */ diff --git a/src/mame/drivers/coolridr.c b/src/mame/drivers/coolridr.c index ddf8b1906f4..ba50a551275 100644 --- a/src/mame/drivers/coolridr.c +++ b/src/mame/drivers/coolridr.c @@ -1044,7 +1044,7 @@ static INTERRUPT_GEN( system_h1_sub ) { switch(cpu_getiloops(device)) { - case 0:cpu_set_input_line(device, 0xa, HOLD_LINE); break; + case 0:cpu_set_input_line(device, 0xa, HOLD_LINE); break; case 1:cpu_set_input_line(device, 0xc, HOLD_LINE); break; case 2:cpu_set_input_line(device, 0xe, HOLD_LINE); break; } diff --git a/src/mame/drivers/cosmic.c b/src/mame/drivers/cosmic.c index 1cb2ebd6969..5a3a994545b 100644 --- a/src/mame/drivers/cosmic.c +++ b/src/mame/drivers/cosmic.c @@ -66,9 +66,9 @@ static WRITE8_HANDLER( panic_sound_output_w ) { switch (offset) { - case 0: if (data) sample_start(state->samples, 0, 0, 0); break; /* Walk */ - case 1: if (data) sample_start(state->samples, 0, 5, 0); break; /* Enemy Die 1 */ - case 2: if (data) /* Drop 1 */ + case 0: if (data) sample_start(state->samples, 0, 0, 0); break; /* Walk */ + case 1: if (data) sample_start(state->samples, 0, 5, 0); break; /* Enemy Die 1 */ + case 2: if (data) /* Drop 1 */ { if (!sample_playing(state->samples, 1)) { @@ -90,7 +90,7 @@ static WRITE8_HANDLER( panic_sound_output_w ) sample_start(state->samples, 2, 2, 0); break; - case 7: if (data) /* Escape */ + case 7: if (data) /* Escape */ { sample_stop(state->samples, 2); sample_start(state->samples, 3, 4, 0); @@ -114,7 +114,7 @@ static WRITE8_HANDLER( panic_sound_output_w ) } #ifdef MAME_DEBUG - logerror("Sound output %x=%x\n", offset, data); + logerror("Sound output %x=%x\n", offset, data); #endif } @@ -152,7 +152,7 @@ static WRITE8_HANDLER( cosmicg_output_w ) case 4: state->march_select = (state->march_select & 0xfd) | (data << 1); break; case 5: state->march_select = (state->march_select & 0xfb) | (data << 2); break; - case 6: if (data) /* Killer Attack (crawly thing at bottom of screen) */ + case 6: if (data) /* Killer Attack (crawly thing at bottom of screen) */ sample_start(state->samples, 1, 8, 1); else sample_stop(state->samples, 1); @@ -182,7 +182,7 @@ static WRITE8_HANDLER( cosmicg_output_w ) } #ifdef MAME_DEBUG - if (offset != 11) logerror("Output %x=%x\n", offset, data); + if (offset != 11) logerror("Output %x=%x\n", offset, data); #endif } @@ -221,25 +221,25 @@ static WRITE8_HANDLER( cosmica_sound_output_w ) if (sample_playing(state->samples, 2)) { sample_stop(state->samples, 2); - sample_start(state->samples, 2, 3, 0); break; + sample_start(state->samples, 2, 3, 0); break; } else - sample_start(state->samples, 2, 3, 0); break; + sample_start(state->samples, 2, 3, 0); break; case 3: if (sample_playing(state->samples, 3)) { sample_stop(state->samples, 3); - sample_start(state->samples, 3, 4, 0); break; + sample_start(state->samples, 3, 4, 0); break; } else - sample_start(state->samples, 3, 4, 0); break; + sample_start(state->samples, 3, 4, 0); break; case 4: if (sample_playing(state->samples, 4)) { sample_stop(state->samples, 4); - sample_start(state->samples, 4, 5, 0); break; + sample_start(state->samples, 4, 5, 0); break; } else sample_start(state->samples, 4, 5, 0); break; @@ -248,28 +248,28 @@ static WRITE8_HANDLER( cosmica_sound_output_w ) if (sample_playing(state->samples, 5)) { sample_stop(state->samples, 5); - sample_start(state->samples, 5, 6, 0); break; + sample_start(state->samples, 5, 6, 0); break; } else - sample_start(state->samples, 5, 6, 0); break; + sample_start(state->samples, 5, 6, 0); break; case 6: if (sample_playing(state->samples, 6)) { sample_stop(state->samples, 6); - sample_start(state->samples, 6, 7, 0); break; + sample_start(state->samples, 6, 7, 0); break; } else - sample_start(state->samples, 6, 7, 0); break; + sample_start(state->samples, 6, 7, 0); break; case 7: if (sample_playing(state->samples, 7)) { sample_stop(state->samples, 7); - sample_start(state->samples, 7, 8, 0); break; + sample_start(state->samples, 7, 8, 0); break; } else - sample_start(state->samples, 7, 8, 0); break; + sample_start(state->samples, 7, 8, 0); break; } } @@ -314,7 +314,7 @@ static WRITE8_HANDLER( cosmica_sound_output_w ) } #ifdef MAME_DEBUG - logerror("Sound output %x=%x\n", offset, data); + logerror("Sound output %x=%x\n", offset, data); #endif } @@ -369,7 +369,7 @@ static INTERRUPT_GEN( magspot_interrupt ) { /* Coin 1 causes an IRQ, Coin 2 an NMI */ if (input_port_read(device->machine, "COINS") & 0x01) - cpu_set_input_line(device, 0, HOLD_LINE); + cpu_set_input_line(device, 0, HOLD_LINE); else if (input_port_read(device->machine, "COINS") & 0x02) cpu_set_input_line(device, INPUT_LINE_NMI, PULSE_LINE); } @@ -922,7 +922,7 @@ static const gfx_layout cosmic_spritelayout32 = { 0*32*8+0, 0*32*8+1, 0*32*8+2, 0*32*8+3, 0*32*8+4, 0*32*8+5, 0*32*8+6, 0*32*8+7, 1*32*8+0, 1*32*8+1, 1*32*8+2, 1*32*8+3, 1*32*8+4, 1*32*8+5, 1*32*8+6, 1*32*8+7, 2*32*8+0, 2*32*8+1, 2*32*8+2, 2*32*8+3, 2*32*8+4, 2*32*8+5, 2*32*8+6, 2*32*8+7, - 3*32*8+0, 3*32*8+1, 3*32*8+2, 3*32*8+3, 3*32*8+4, 3*32*8+5, 3*32*8+6, 3*32*8+7 }, + 3*32*8+0, 3*32*8+1, 3*32*8+2, 3*32*8+3, 3*32*8+4, 3*32*8+5, 3*32*8+6, 3*32*8+7 }, { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8, 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8, 16*8, 17*8, 18*8, 19*8, 20*8, 21*8, 22*8, 23*8, diff --git a/src/mame/drivers/cps2.c b/src/mame/drivers/cps2.c index 7c731e08090..53917af4d0f 100644 --- a/src/mame/drivers/cps2.c +++ b/src/mame/drivers/cps2.c @@ -723,7 +723,7 @@ static WRITE16_HANDLER( cps2_eeprom_port_w ) coin_counter_w(space->machine, 0, data & 0x0001); if ((strncmp(space->machine->gamedrv->name, "pzloop2", 8) == 0) || - (strncmp(space->machine->gamedrv->name, "pzloop2j", 8) == 0)) + (strncmp(space->machine->gamedrv->name, "pzloop2j", 8) == 0)) { // Puzz Loop 2 uses coin counter 2 input to switch between stick and paddle controls state->readpaddle = data & 0x0002; @@ -809,13 +809,13 @@ static READ16_HANDLER( joy_or_paddle_r ) static ADDRESS_MAP_START( cps2_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x000000, 0x3fffff) AM_ROM /* 68000 ROM */ AM_RANGE(0x400000, 0x40000b) AM_RAM AM_BASE_SIZE_MEMBER(cps_state, output, output_size) /* CPS2 object output */ - AM_RANGE(0x618000, 0x619fff) AM_READWRITE(qsound_sharedram1_r, qsound_sharedram1_w) /* Q RAM */ + AM_RANGE(0x618000, 0x619fff) AM_READWRITE(qsound_sharedram1_r, qsound_sharedram1_w) /* Q RAM */ AM_RANGE(0x662000, 0x662001) AM_RAM /* Network adapter related, accessed in SSF2TB */ AM_RANGE(0x662008, 0x662009) AM_RAM /* Network adapter related, accessed in SSF2TB */ AM_RANGE(0x662020, 0x662021) AM_RAM /* Network adapter related, accessed in SSF2TB */ AM_RANGE(0x660000, 0x663fff) AM_RAM /* When bit 14 of 0x804030 equals 0 this space is available. Many games store highscores and other info here if available. */ AM_RANGE(0x664000, 0x664001) AM_RAM /* Unknown - Only used if 0x660000-0x663fff available (could be RAM enable?) */ - AM_RANGE(0x700000, 0x701fff) AM_WRITE(cps2_objram1_w) AM_BASE_MEMBER(cps_state, objram1) /* Object RAM, no game seems to use it directly */ + AM_RANGE(0x700000, 0x701fff) AM_WRITE(cps2_objram1_w) AM_BASE_MEMBER(cps_state, objram1) /* Object RAM, no game seems to use it directly */ AM_RANGE(0x708000, 0x709fff) AM_READWRITE(cps2_objram2_r, cps2_objram2_w) AM_BASE_MEMBER(cps_state, objram2) /* Object RAM */ AM_RANGE(0x70a000, 0x70bfff) AM_READWRITE(cps2_objram2_r, cps2_objram2_w) AM_BASE_MEMBER(cps_state, objram2) /* mirror */ AM_RANGE(0x70c000, 0x70dfff) AM_READWRITE(cps2_objram2_r, cps2_objram2_w) AM_BASE_MEMBER(cps_state, objram2) /* mirror */ @@ -827,11 +827,11 @@ static ADDRESS_MAP_START( cps2_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x804020, 0x804021) AM_READ_PORT("IN2") /* IN2 + EEPROM */ AM_RANGE(0x804030, 0x804031) AM_READ(cps2_qsound_volume_r) /* Master volume. Also when bit 14=0 addon memory is present, when bit 15=0 network adapter present. */ AM_RANGE(0x804040, 0x804041) AM_WRITE(cps2_eeprom_port_w) /* EEPROM */ - AM_RANGE(0x8040a0, 0x8040a1) AM_WRITENOP /* Unknown (reset once on startup) */ + AM_RANGE(0x8040a0, 0x8040a1) AM_WRITENOP /* Unknown (reset once on startup) */ AM_RANGE(0x8040b0, 0x8040b3) AM_READ(kludge_r) /* unknown (xmcotaj hangs if this is 0) */ AM_RANGE(0x8040e0, 0x8040e1) AM_WRITE(cps2_objram_bank_w) /* bit 0 = Object ram bank swap */ AM_RANGE(0x804100, 0x80413f) AM_WRITE(cps1_cps_a_w) AM_BASE_MEMBER(cps_state, cps_a_regs) /* CPS-A custom */ - AM_RANGE(0x804140, 0x80417f) AM_READWRITE(cps1_cps_b_r, cps1_cps_b_w) /* CPS-B custom */ + AM_RANGE(0x804140, 0x80417f) AM_READWRITE(cps1_cps_b_r, cps1_cps_b_w) /* CPS-B custom */ AM_RANGE(0x900000, 0x92ffff) AM_RAM_WRITE(cps1_gfxram_w) AM_BASE_SIZE_MEMBER(cps_state, gfxram, gfxram_size) /* Video RAM */ AM_RANGE(0xff0000, 0xffffff) AM_RAM /* RAM */ ADDRESS_MAP_END @@ -840,13 +840,13 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( dead_cps2_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x000000, 0x3fffff) AM_ROM /* 68000 ROM */ AM_RANGE(0x400000, 0x40000b) AM_RAM AM_BASE_SIZE_MEMBER(cps_state, output, output_size) /* CPS2 object output */ - AM_RANGE(0x618000, 0x619fff) AM_READWRITE(qsound_sharedram1_r, qsound_sharedram1_w) /* Q RAM */ + AM_RANGE(0x618000, 0x619fff) AM_READWRITE(qsound_sharedram1_r, qsound_sharedram1_w) /* Q RAM */ AM_RANGE(0x662000, 0x662001) AM_RAM /* Network adapter related, accessed in SSF2TB */ AM_RANGE(0x662008, 0x662009) AM_RAM /* Network adapter related, accessed in SSF2TB */ AM_RANGE(0x662020, 0x662021) AM_RAM /* Network adapter related, accessed in SSF2TB */ AM_RANGE(0x660000, 0x663fff) AM_RAM /* When bit 14 of 0x804030 equals 0 this space is available. Many games store highscores and other info here if available. */ AM_RANGE(0x664000, 0x664001) AM_RAM /* Unknown - Only used if 0x660000-0x663fff available (could be RAM enable?) */ - AM_RANGE(0x700000, 0x701fff) AM_WRITE(cps2_objram1_w) AM_BASE_MEMBER(cps_state, objram1) /* Object RAM, no game seems to use it directly */ + AM_RANGE(0x700000, 0x701fff) AM_WRITE(cps2_objram1_w) AM_BASE_MEMBER(cps_state, objram1) /* Object RAM, no game seems to use it directly */ AM_RANGE(0x708000, 0x709fff) AM_READWRITE(cps2_objram2_r, cps2_objram2_w) AM_BASE_MEMBER(cps_state, objram2) /* Object RAM */ AM_RANGE(0x70a000, 0x70bfff) AM_READWRITE(cps2_objram2_r, cps2_objram2_w) AM_BASE_MEMBER(cps_state, objram2) /* mirror */ AM_RANGE(0x70c000, 0x70dfff) AM_READWRITE(cps2_objram2_r, cps2_objram2_w) AM_BASE_MEMBER(cps_state, objram2) /* mirror */ @@ -858,11 +858,11 @@ static ADDRESS_MAP_START( dead_cps2_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x804020, 0x804021) AM_READ_PORT("IN2") /* IN2 + EEPROM */ AM_RANGE(0x804030, 0x804031) AM_READ(cps2_qsound_volume_r) /* Master volume. Also when bit 14=0 addon memory is present, when bit 15=0 network adapter present. */ AM_RANGE(0x804040, 0x804041) AM_WRITE(cps2_eeprom_port_w) /* EEPROM */ - AM_RANGE(0x8040a0, 0x8040a1) AM_WRITENOP /* Unknown (reset once on startup) */ + AM_RANGE(0x8040a0, 0x8040a1) AM_WRITENOP /* Unknown (reset once on startup) */ AM_RANGE(0x8040b0, 0x8040b3) AM_READ(kludge_r) /* unknown (xmcotaj hangs if this is 0) */ AM_RANGE(0x8040e0, 0x8040e1) AM_WRITE(cps2_objram_bank_w) /* bit 0 = Object ram bank swap */ - AM_RANGE(0x804100, 0x80413f) AM_WRITE(cps1_cps_a_w) AM_BASE_MEMBER(cps_state, cps_a_regs) /* CPS-A custom */ - AM_RANGE(0x804140, 0x80417f) AM_READWRITE(cps1_cps_b_r, cps1_cps_b_w) /* CPS-B custom */ + AM_RANGE(0x804100, 0x80413f) AM_WRITE(cps1_cps_a_w) AM_BASE_MEMBER(cps_state, cps_a_regs) /* CPS-A custom */ + AM_RANGE(0x804140, 0x80417f) AM_READWRITE(cps1_cps_b_r, cps1_cps_b_w) /* CPS-B custom */ AM_RANGE(0x900000, 0x92ffff) AM_RAM_WRITE(cps1_gfxram_w) AM_BASE_SIZE_MEMBER(cps_state, gfxram, gfxram_size) /* Video RAM */ AM_RANGE(0xff0000, 0xffffef) AM_RAM /* RAM */ AM_RANGE(0xfffff0, 0xfffffb) AM_RAM AM_BASE_SIZE_MEMBER(cps_state, output, output_size) /* CPS2 output */ @@ -2250,7 +2250,7 @@ ROM_END ROM_START( ddtodur1 ) ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68000 code */ - ROM_LOAD16_WORD_SWAP( "dadu.03a", 0x000000, 0x80000, CRC(4413f177) SHA1(26c8d06adc83ffc5bec4abf05aa64e874e85d539) ) + ROM_LOAD16_WORD_SWAP( "dadu.03a", 0x000000, 0x80000, CRC(4413f177) SHA1(26c8d06adc83ffc5bec4abf05aa64e874e85d539) ) ROM_LOAD16_WORD_SWAP( "dadu.04a", 0x080000, 0x80000, CRC(168de230) SHA1(3f8af1625bb0d9097e538f8ba7cd23d95b0233aa) ) ROM_LOAD16_WORD_SWAP( "dadu.05a", 0x100000, 0x80000, CRC(03d39e91) SHA1(92461b87c55cb41bbe89bcb3e3f2e9b1ed521067) ) ROM_LOAD16_WORD_SWAP( "dad.06", 0x180000, 0x80000, CRC(13aa3e56) SHA1(ccd3cda528d625bbf4dc0e8c5ad629af6080d705) ) diff --git a/src/mame/drivers/cps3.c b/src/mame/drivers/cps3.c index bf355cdea06..e0b0bcb13d2 100644 --- a/src/mame/drivers/cps3.c +++ b/src/mame/drivers/cps3.c @@ -1003,9 +1003,9 @@ static VIDEO_UPDATE(cps3) for (j=0;j<(length)*4;j+=4) { - UINT32 value1 = (cps3_spriteram[start+j+0]); - UINT32 value2 = (cps3_spriteram[start+j+1]); - UINT32 value3 = (cps3_spriteram[start+j+2]); + UINT32 value1 = (cps3_spriteram[start+j+0]); + UINT32 value2 = (cps3_spriteram[start+j+1]); + UINT32 value3 = (cps3_spriteram[start+j+2]); //UINT8* srcdata = (UINT8*)cps3_char_ram; @@ -1926,33 +1926,33 @@ static unsigned short lastb2; static UINT32 ProcessByte8(running_machine *machine,UINT8 b,UINT32 dst_offset) { UINT8* destRAM = (UINT8*)cps3_char_ram; - int l=0; + int l=0; - if(lastb==lastb2) //rle - { + if(lastb==lastb2) //rle + { int i; - int rle=(b+1)&0xff; + int rle=(b+1)&0xff; - for(i=0;i<rle;++i) - { + for(i=0;i<rle;++i) + { destRAM[(dst_offset&0x7fffff)^3] = lastb; gfx_element_mark_dirty(machine->gfx[1], (dst_offset&0x7fffff)/0x100); dst_offset++; - ++l; - } - lastb2=0xffff; - - return l; - } - else - { - lastb2=lastb; - lastb=b; + ++l; + } + lastb2=0xffff; + + return l; + } + else + { + lastb2=lastb; + lastb=b; destRAM[(dst_offset&0x7fffff)^3] = b; gfx_element_mark_dirty(machine->gfx[1], (dst_offset&0x7fffff)/0x100); - return 1; - } + return 1; + } } static void cps3_do_alt_char_dma( running_machine *machine, UINT32 src, UINT32 real_dest, UINT32 real_length ) @@ -1968,7 +1968,7 @@ static void cps3_do_alt_char_dma( running_machine *machine, UINT32 src, UINT32 r { int i; UINT8 ctrl=px[DMA_XOR(src)]; - ++src; + ++src; for(i=0;i<8;++i) { @@ -1982,17 +1982,17 @@ static void cps3_do_alt_char_dma( running_machine *machine, UINT32 src, UINT32 r ds+=ProcessByte8(machine,real_byte,ds); real_byte = px[DMA_XOR((current_table_address+p*2+1))]; ds+=ProcessByte8(machine,real_byte,ds); - } - else - { - ds+=ProcessByte8(machine,p,ds); - } - ++src; - ctrl<<=1; + } + else + { + ds+=ProcessByte8(machine,p,ds); + } + ++src; + ctrl<<=1; if((ds-start)>=real_length) return; - } + } } } diff --git a/src/mame/drivers/crystal.c b/src/mame/drivers/crystal.c index d47825f9921..8a265c1629c 100644 --- a/src/mame/drivers/crystal.c +++ b/src/mame/drivers/crystal.c @@ -740,7 +740,7 @@ static const vr0_interface vr0_config = static MACHINE_DRIVER_START( crystal ) MDRV_CPU_ADD("maincpu", SE3208, 43000000) MDRV_CPU_PROGRAM_MAP(crystal_mem) - MDRV_CPU_VBLANK_INT("screen", crystal_interrupt) + MDRV_CPU_VBLANK_INT("screen", crystal_interrupt) MDRV_MACHINE_START(crystal) MDRV_MACHINE_RESET(crystal) diff --git a/src/mame/drivers/cvs.c b/src/mame/drivers/cvs.c index 357a51aa9bb..add7a519d9d 100644 --- a/src/mame/drivers/cvs.c +++ b/src/mame/drivers/cvs.c @@ -114,7 +114,7 @@ Todo & FIXME: READ8_HANDLER( cvs_video_or_color_ram_r ) { - cvs_state *state = (cvs_state *)space->machine->driver_data; + cvs_state *state = (cvs_state *)space->machine->driver_data; if (*state->fo_state) return state->video_ram[offset]; @@ -124,7 +124,7 @@ READ8_HANDLER( cvs_video_or_color_ram_r ) WRITE8_HANDLER( cvs_video_or_color_ram_w ) { - cvs_state *state = (cvs_state *)space->machine->driver_data; + cvs_state *state = (cvs_state *)space->machine->driver_data; if (*state->fo_state) state->video_ram[offset] = data; @@ -135,7 +135,7 @@ WRITE8_HANDLER( cvs_video_or_color_ram_w ) READ8_HANDLER( cvs_bullet_ram_or_palette_r ) { - cvs_state *state = (cvs_state *)space->machine->driver_data; + cvs_state *state = (cvs_state *)space->machine->driver_data; if (*state->fo_state) return state->palette_ram[offset & 0x0f]; @@ -145,7 +145,7 @@ READ8_HANDLER( cvs_bullet_ram_or_palette_r ) WRITE8_HANDLER( cvs_bullet_ram_or_palette_w ) { - cvs_state *state = (cvs_state *)space->machine->driver_data; + cvs_state *state = (cvs_state *)space->machine->driver_data; if (*state->fo_state) state->palette_ram[offset & 0x0f] = data; @@ -156,7 +156,7 @@ WRITE8_HANDLER( cvs_bullet_ram_or_palette_w ) READ8_HANDLER( cvs_s2636_0_or_character_ram_r ) { - cvs_state *state = (cvs_state *)space->machine->driver_data; + cvs_state *state = (cvs_state *)space->machine->driver_data; if (*state->fo_state) return state->character_ram[(0 * 0x800) | 0x400 | state->character_ram_page_start | offset]; @@ -166,7 +166,7 @@ READ8_HANDLER( cvs_s2636_0_or_character_ram_r ) WRITE8_HANDLER( cvs_s2636_0_or_character_ram_w ) { - cvs_state *state = (cvs_state *)space->machine->driver_data; + cvs_state *state = (cvs_state *)space->machine->driver_data; if (*state->fo_state) { @@ -181,7 +181,7 @@ WRITE8_HANDLER( cvs_s2636_0_or_character_ram_w ) READ8_HANDLER( cvs_s2636_1_or_character_ram_r ) { - cvs_state *state = (cvs_state *)space->machine->driver_data; + cvs_state *state = (cvs_state *)space->machine->driver_data; if (*state->fo_state) return state->character_ram[(1 * 0x800) | 0x400 | state->character_ram_page_start | offset]; @@ -191,7 +191,7 @@ READ8_HANDLER( cvs_s2636_1_or_character_ram_r ) WRITE8_HANDLER( cvs_s2636_1_or_character_ram_w ) { - cvs_state *state = (cvs_state *)space->machine->driver_data; + cvs_state *state = (cvs_state *)space->machine->driver_data; if (*state->fo_state) { @@ -206,7 +206,7 @@ WRITE8_HANDLER( cvs_s2636_1_or_character_ram_w ) READ8_HANDLER( cvs_s2636_2_or_character_ram_r ) { - cvs_state *state = (cvs_state *)space->machine->driver_data; + cvs_state *state = (cvs_state *)space->machine->driver_data; if (*state->fo_state) return state->character_ram[(2 * 0x800) | 0x400 | state->character_ram_page_start | offset]; @@ -216,7 +216,7 @@ READ8_HANDLER( cvs_s2636_2_or_character_ram_r ) WRITE8_HANDLER( cvs_s2636_2_or_character_ram_w ) { - cvs_state *state = (cvs_state *)space->machine->driver_data; + cvs_state *state = (cvs_state *)space->machine->driver_data; if (*state->fo_state) { @@ -262,7 +262,7 @@ static void cvs_slave_cpu_interrupt( const device_config *cpu, int state ) static READ8_HANDLER( cvs_input_r ) { - cvs_state *state = (cvs_state *)space->machine->driver_data; + cvs_state *state = (cvs_state *)space->machine->driver_data; UINT8 ret = 0; /* the upper 4 bits of the address is used to select the character banking attributes */ @@ -294,14 +294,14 @@ static READ8_HANDLER( cvs_input_r ) #if 0 static READ8_HANDLER( cvs_393hz_clock_r ) { - cvs_state *state = (cvs_state *)space->machine->driver_data; - return state->cvs_393hz_clock ? 0x80 : 0; + cvs_state *state = (cvs_state *)space->machine->driver_data; + return state->cvs_393hz_clock ? 0x80 : 0; } #endif static READ8_DEVICE_HANDLER( tms_clock_r ) { - return tms5110_romclk_r(device, 0) ? 0x80 : 0; + return tms5110_romclk_r(device, 0) ? 0x80 : 0; } static TIMER_CALLBACK( cvs_393hz_timer_cb ) diff --git a/src/mame/drivers/cybertnk.c b/src/mame/drivers/cybertnk.c index 1349e7823ce..faa3c30b8c3 100644 --- a/src/mame/drivers/cybertnk.c +++ b/src/mame/drivers/cybertnk.c @@ -506,7 +506,7 @@ static INPUT_PORTS_START( cybertnk ) PORT_DIPSETTING( 0x0080, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED ) INPUT_PORTS_END static const gfx_layout tile_8x8x4 = diff --git a/src/mame/drivers/cyclemb.c b/src/mame/drivers/cyclemb.c index d119778d67a..8368a9ddeb5 100644 --- a/src/mame/drivers/cyclemb.c +++ b/src/mame/drivers/cyclemb.c @@ -210,7 +210,7 @@ static WRITE8_HANDLER( cyclemb_bankswitch_w ) static WRITE8_HANDLER( sound_cmd_w ) { soundlatch_w(space, 0, data & 0xff); - cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE); + cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE); } #endif @@ -224,7 +224,7 @@ static READ8_HANDLER( mcu_status_r ) static WRITE8_HANDLER( sound_cmd_w ) //actually ciom { soundlatch_w(space, 0, data & 0xff); - cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE); + cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE); } #endif diff --git a/src/mame/drivers/dacholer.c b/src/mame/drivers/dacholer.c index aa76af5ce16..915c8ef0502 100644 --- a/src/mame/drivers/dacholer.c +++ b/src/mame/drivers/dacholer.c @@ -424,7 +424,7 @@ static void adpcm_int( const device_config *device ) static const msm5205_interface msm_interface = { adpcm_int, /* interrupt function */ - MSM5205_S96_4B /* 1 / 96 = 3906.25Hz playback - guess */ + MSM5205_S96_4B /* 1 / 96 = 3906.25Hz playback - guess */ }; diff --git a/src/mame/drivers/dambustr.c b/src/mame/drivers/dambustr.c index 7a49cef355d..5e1b76f79f5 100644 --- a/src/mame/drivers/dambustr.c +++ b/src/mame/drivers/dambustr.c @@ -222,7 +222,7 @@ ROM_START( dambustr ) ROM_LOAD( "db5a.pr5", 0x7000, 0x1000, CRC(75659ecc) SHA1(b61254fb12f3999607abd88d1cc649dcfbf0384c) ) ROM_REGION( 0x10000,"user1",0) - ROM_LOAD( "db11a.pr11", 0x0000, 0x1000, CRC(427bd3fb) SHA1(cdbaef4040fa2e0598a086e320d51ecb26a591dd) ) + ROM_LOAD( "db11a.pr11", 0x0000, 0x1000, CRC(427bd3fb) SHA1(cdbaef4040fa2e0598a086e320d51ecb26a591dd) ) ROM_LOAD( "db9a.pr9", 0x1000, 0x1000, CRC(57164563) SHA1(8471d0660f39511d0afa3cdd63a1e84b0ea80fd0) ) ROM_LOAD( "db10a.pr10", 0x2000, 0x1000, CRC(075b9c5e) SHA1(ff6ce873897004c0e796813725e260df85a520f9) ) ROM_LOAD( "db12a.pr12", 0x3000, 0x1000, CRC(ed01a68b) SHA1(9dd37c2a25865717a7acdd7e2a3bef26a4cef3d9) ) @@ -249,7 +249,7 @@ ROM_START( dambustra ) ROM_LOAD( "db5a.pr5", 0x7000, 0x1000, CRC(75659ecc) SHA1(b61254fb12f3999607abd88d1cc649dcfbf0384c) ) ROM_REGION( 0x10000,"user1",0) - ROM_LOAD( "db11.pr11", 0x0000, 0x1000, CRC(427bd3fb) SHA1(cdbaef4040fa2e0598a086e320d51ecb26a591dd) ) + ROM_LOAD( "db11.pr11", 0x0000, 0x1000, CRC(427bd3fb) SHA1(cdbaef4040fa2e0598a086e320d51ecb26a591dd) ) ROM_LOAD( "db9a.pr9", 0x1000, 0x1000, CRC(57164563) SHA1(8471d0660f39511d0afa3cdd63a1e84b0ea80fd0) ) ROM_LOAD( "db10a.pr10", 0x2000, 0x1000, CRC(075b9c5e) SHA1(ff6ce873897004c0e796813725e260df85a520f9) ) /* Had a hand drawn "PLUS" symbol on the rom label */ ROM_LOAD( "db12a.pr12", 0x3000, 0x1000, CRC(ed01a68b) SHA1(9dd37c2a25865717a7acdd7e2a3bef26a4cef3d9) ) @@ -276,7 +276,7 @@ ROM_START( dambustruk ) ROM_LOAD( "db5.pr5", 0x7000, 0x1000, CRC(75659ecc) SHA1(b61254fb12f3999607abd88d1cc649dcfbf0384c) ) ROM_REGION( 0x10000,"user1",0) - ROM_LOAD( "db11.bin", 0x0000, 0x1000, CRC(9e6b34fe) SHA1(5cf47f5a5280ac53490240df220edf6178e87f4f) ) + ROM_LOAD( "db11.bin", 0x0000, 0x1000, CRC(9e6b34fe) SHA1(5cf47f5a5280ac53490240df220edf6178e87f4f) ) ROM_LOAD( "db9.pr9", 0x1000, 0x1000, CRC(57164563) SHA1(8471d0660f39511d0afa3cdd63a1e84b0ea80fd0) ) ROM_LOAD( "db10p.bin", 0x2000, 0x1000, CRC(c129c57b) SHA1(c25abd7ee97b71941d9fa6acd0d92c116f1ff408) ) ROM_LOAD( "db12.bin", 0x3000, 0x1000, CRC(ea4c65f5) SHA1(cb761e0543cacd6b437c6e88615f97df83245a34) ) diff --git a/src/mame/drivers/darius.c b/src/mame/drivers/darius.c index ffeba7b33ea..0c248651181 100644 --- a/src/mame/drivers/darius.c +++ b/src/mame/drivers/darius.c @@ -944,7 +944,7 @@ ROM_START( darius ) ROM_LOAD16_BYTE( "a96_31.187", 0x40000, 0x10000, CRC(e9bb5d89) SHA1(a5d08129c32b97e2cce84496945766fd32b6506e) ) /* 2 data roms */ ROM_LOAD16_BYTE( "a96_30.154", 0x40001, 0x10000, CRC(9eb5e127) SHA1(50e2fe5ec7f79ecf1fb5107298da13ef5ab37162) ) - ROM_REGION( 0x30000, "audiocpu", 0 ) /* Z80 sound cpu */ + ROM_REGION( 0x30000, "audiocpu", 0 ) /* Z80 sound cpu */ ROM_LOAD( "a96_57.33", 0x00000, 0x10000, CRC(33ceb730) SHA1(05070ea503ac57ff8445145d6f97115f7aad90a5) ) ROM_REGION( 0x80000, "cpub", 0 ) /* 68000 code */ @@ -982,12 +982,12 @@ ROM_START( darius ) ROM_LOAD32_BYTE( "da-64.bin", 0x80002, 0x10000, CRC(814c676f) SHA1(a6a64e65a3c163ecfede14b48ea70c20050248c3) ) ROM_LOAD32_BYTE( "da-65.bin", 0x80003, 0x10000, CRC(14eee326) SHA1(41760fada2a5e34ee6c9250af927baf650d9cfc4) ) - ROM_REGION( 0x8000, "gfx3", 0 ) /* 8x8 SCR tiles */ + ROM_REGION( 0x8000, "gfx3", 0 ) /* 8x8 SCR tiles */ /* There's only one of each of these on a real board */ ROM_LOAD16_BYTE( "a96_54.143", 0x0000, 0x4000, CRC(51c02ae2) SHA1(27d2a6c649d047da1f22758569cb36531e3bf8bc) ) ROM_LOAD16_BYTE( "a96_55.144", 0x0001, 0x4000, CRC(771e4d98) SHA1(0e8ce5d569775883f4bc777b9bd49eb23ba7b42e) ) - ROM_REGION( 0x1000, "user1", 0 ) + ROM_REGION( 0x1000, "user1", 0 ) ROM_LOAD16_BYTE( "a96-24.163", 0x0000, 0x0400, CRC(0fa8be7f) SHA1(079686b5d65b4b966591090d8c0e13e66dc5beca) ) /* proms, currently unused */ ROM_LOAD16_BYTE( "a96-25.164", 0x0400, 0x0400, CRC(265508a6) SHA1(f8ee1c658b33ae76d8a457a4042d9b4b58247823) ) ROM_LOAD16_BYTE( "a96-26.165", 0x0800, 0x0400, CRC(4891b9c0) SHA1(1f550a9a4ad3ca379f88f5865ed1b281c7b87f31) ) @@ -1002,7 +1002,7 @@ ROM_START( dariusj ) ROM_LOAD16_BYTE( "a96_31.187", 0x40000, 0x10000, CRC(e9bb5d89) SHA1(a5d08129c32b97e2cce84496945766fd32b6506e) ) /* 2 data roms */ ROM_LOAD16_BYTE( "a96_30.154", 0x40001, 0x10000, CRC(9eb5e127) SHA1(50e2fe5ec7f79ecf1fb5107298da13ef5ab37162) ) - ROM_REGION( 0x30000, "audiocpu", 0 ) /* Z80 sound cpu */ + ROM_REGION( 0x30000, "audiocpu", 0 ) /* Z80 sound cpu */ ROM_LOAD( "a96_57.33", 0x00000, 0x10000, CRC(33ceb730) SHA1(05070ea503ac57ff8445145d6f97115f7aad90a5) ) ROM_REGION( 0x80000, "cpub", 0 ) /* 68000 code */ @@ -1038,11 +1038,11 @@ ROM_START( dariusj ) ROM_LOAD32_BYTE( "a96_38.176", 0x80002, 0x10000, CRC(e4f3e3a7) SHA1(0baa8a672516bcc4f17f40f429ac3d227de16625) ) ROM_LOAD32_BYTE( "a96_39.197", 0x80003, 0x10000, CRC(ea30920f) SHA1(91d47b10886d6c243bc676435e300cb3b5fcca33) ) - ROM_REGION( 0x8000, "gfx3", 0 ) /* 8x8 SCR tiles */ + ROM_REGION( 0x8000, "gfx3", 0 ) /* 8x8 SCR tiles */ ROM_LOAD16_BYTE( "a96_54.143", 0x0000, 0x4000, CRC(51c02ae2) SHA1(27d2a6c649d047da1f22758569cb36531e3bf8bc) ) ROM_LOAD16_BYTE( "a96_55.144", 0x0001, 0x4000, CRC(771e4d98) SHA1(0e8ce5d569775883f4bc777b9bd49eb23ba7b42e) ) - ROM_REGION( 0x1000, "user1", 0 ) + ROM_REGION( 0x1000, "user1", 0 ) ROM_LOAD16_BYTE( "a96-24.163", 0x0000, 0x0400, CRC(0fa8be7f) SHA1(079686b5d65b4b966591090d8c0e13e66dc5beca) ) /* proms, currently unused */ ROM_LOAD16_BYTE( "a96-25.164", 0x0400, 0x0400, CRC(265508a6) SHA1(f8ee1c658b33ae76d8a457a4042d9b4b58247823) ) ROM_LOAD16_BYTE( "a96-26.165", 0x0800, 0x0400, CRC(4891b9c0) SHA1(1f550a9a4ad3ca379f88f5865ed1b281c7b87f31) ) @@ -1057,7 +1057,7 @@ ROM_START( dariuso ) ROM_LOAD16_BYTE( "a96_31.187", 0x40000, 0x10000, CRC(e9bb5d89) SHA1(a5d08129c32b97e2cce84496945766fd32b6506e) ) /* 2 data roms */ ROM_LOAD16_BYTE( "a96_30.154", 0x40001, 0x10000, CRC(9eb5e127) SHA1(50e2fe5ec7f79ecf1fb5107298da13ef5ab37162) ) - ROM_REGION( 0x30000, "audiocpu", 0 ) /* Z80 sound cpu */ + ROM_REGION( 0x30000, "audiocpu", 0 ) /* Z80 sound cpu */ ROM_LOAD( "a96_57.33", 0x00000, 0x10000, CRC(33ceb730) SHA1(05070ea503ac57ff8445145d6f97115f7aad90a5) ) ROM_REGION( 0x80000, "cpub", 0 ) /* 68000 code */ @@ -1093,11 +1093,11 @@ ROM_START( dariuso ) ROM_LOAD32_BYTE( "a96_38.176", 0x80002, 0x10000, CRC(e4f3e3a7) SHA1(0baa8a672516bcc4f17f40f429ac3d227de16625) ) ROM_LOAD32_BYTE( "a96_39.197", 0x80003, 0x10000, CRC(ea30920f) SHA1(91d47b10886d6c243bc676435e300cb3b5fcca33) ) - ROM_REGION( 0x8000, "gfx3", 0 ) /* 8x8 SCR tiles */ + ROM_REGION( 0x8000, "gfx3", 0 ) /* 8x8 SCR tiles */ ROM_LOAD16_BYTE( "a96_54.143", 0x0000, 0x4000, CRC(51c02ae2) SHA1(27d2a6c649d047da1f22758569cb36531e3bf8bc) ) ROM_LOAD16_BYTE( "a96_55.144", 0x0001, 0x4000, CRC(771e4d98) SHA1(0e8ce5d569775883f4bc777b9bd49eb23ba7b42e) ) - ROM_REGION( 0x1000, "user1", 0 ) + ROM_REGION( 0x1000, "user1", 0 ) ROM_LOAD16_BYTE( "a96-24.163", 0x0000, 0x0400, CRC(0fa8be7f) SHA1(079686b5d65b4b966591090d8c0e13e66dc5beca) ) /* proms, currently unused */ ROM_LOAD16_BYTE( "a96-25.164", 0x0400, 0x0400, CRC(265508a6) SHA1(f8ee1c658b33ae76d8a457a4042d9b4b58247823) ) ROM_LOAD16_BYTE( "a96-26.165", 0x0800, 0x0400, CRC(4891b9c0) SHA1(1f550a9a4ad3ca379f88f5865ed1b281c7b87f31) ) @@ -1112,7 +1112,7 @@ ROM_START( dariuse ) ROM_LOAD16_BYTE( "dae-70.bin", 0x40000, 0x10000, CRC(54590b31) SHA1(2b89846f14a5cb19b58ab4999bc5ae11671bbb5a) ) /* 2 data roms */ ROM_LOAD16_BYTE( "a96_30.154", 0x40001, 0x10000, CRC(9eb5e127) SHA1(50e2fe5ec7f79ecf1fb5107298da13ef5ab37162) ) // dae-69.bin - ROM_REGION( 0x30000, "audiocpu", 0 ) /* Z80 sound cpu */ + ROM_REGION( 0x30000, "audiocpu", 0 ) /* Z80 sound cpu */ ROM_LOAD( "a96_57.33", 0x00000, 0x10000, CRC(33ceb730) SHA1(05070ea503ac57ff8445145d6f97115f7aad90a5) ) ROM_REGION( 0x80000, "cpub", 0 ) /* 68000 code */ @@ -1148,11 +1148,11 @@ ROM_START( dariuse ) ROM_LOAD32_BYTE( "a96_38.176", 0x80002, 0x10000, CRC(e4f3e3a7) SHA1(0baa8a672516bcc4f17f40f429ac3d227de16625) ) ROM_LOAD32_BYTE( "a96_39.197", 0x80003, 0x10000, CRC(ea30920f) SHA1(91d47b10886d6c243bc676435e300cb3b5fcca33) ) - ROM_REGION( 0x8000, "gfx3", 0 ) /* 8x8 SCR tiles */ + ROM_REGION( 0x8000, "gfx3", 0 ) /* 8x8 SCR tiles */ ROM_LOAD16_BYTE( "a96_54.143", 0x0000, 0x4000, CRC(51c02ae2) SHA1(27d2a6c649d047da1f22758569cb36531e3bf8bc) ) ROM_LOAD16_BYTE( "a96_55.144", 0x0001, 0x4000, CRC(771e4d98) SHA1(0e8ce5d569775883f4bc777b9bd49eb23ba7b42e) ) - ROM_REGION( 0x1000, "user1", 0 ) + ROM_REGION( 0x1000, "user1", 0 ) ROM_LOAD16_BYTE( "a96-24.163", 0x0000, 0x0400, CRC(0fa8be7f) SHA1(079686b5d65b4b966591090d8c0e13e66dc5beca) ) /* proms, currently unused */ ROM_LOAD16_BYTE( "a96-25.164", 0x0400, 0x0400, CRC(265508a6) SHA1(f8ee1c658b33ae76d8a457a4042d9b4b58247823) ) ROM_LOAD16_BYTE( "a96-26.165", 0x0800, 0x0400, CRC(4891b9c0) SHA1(1f550a9a4ad3ca379f88f5865ed1b281c7b87f31) ) diff --git a/src/mame/drivers/darkhors.c b/src/mame/drivers/darkhors.c index 6c84029fb20..cfe08f3408e 100644 --- a/src/mame/drivers/darkhors.c +++ b/src/mame/drivers/darkhors.c @@ -401,7 +401,7 @@ static INPUT_PORTS_START( darkhors ) PORT_BIT( 0x01000000, IP_ACTIVE_LOW, IPT_START1 ) // start PORT_BIT( 0x02000000, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("P1 Payout") PORT_CODE(KEYCODE_LCONTROL) // payout PORT_BIT( 0x04000000, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("P1 Cancel") PORT_CODE(KEYCODE_LALT) // cancel - PORT_BIT( 0x08000000, IP_ACTIVE_LOW, IPT_START2 ) // start p2 + PORT_BIT( 0x08000000, IP_ACTIVE_LOW, IPT_START2 ) // start p2 PORT_BIT( 0x10000000, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("P2 Payout") PORT_CODE(KEYCODE_RCONTROL) // payout p2 PORT_BIT( 0x20000000, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("P2 Cancel") PORT_CODE(KEYCODE_RALT) // cancel p2 PORT_BIT( 0x40000000, IP_ACTIVE_LOW, IPT_UNKNOWN ) @@ -654,7 +654,7 @@ MACHINE_DRIVER_END static VIDEO_START(jclub2) { - /* find first empty slot to decode gfx */ + /* find first empty slot to decode gfx */ for (jclub2_gfx_index = 0; jclub2_gfx_index < MAX_GFX_ELEMENTS; jclub2_gfx_index++) if (machine->gfx[jclub2_gfx_index] == 0) break; diff --git a/src/mame/drivers/darkseal.c b/src/mame/drivers/darkseal.c index e9b4767a364..30069b06fe6 100644 --- a/src/mame/drivers/darkseal.c +++ b/src/mame/drivers/darkseal.c @@ -47,7 +47,7 @@ static WRITE16_HANDLER( darkseal_control_w ) soundlatch_w(space, 0, data & 0xff); cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE); return; - case 0xa: /* IRQ Ack (VBL) */ + case 0xa: /* IRQ Ack (VBL) */ return; } } @@ -78,7 +78,7 @@ static ADDRESS_MAP_START( darkseal_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x140000, 0x140fff) AM_RAM_WRITE(darkseal_palette_24bit_rg_w) AM_BASE_GENERIC(paletteram) AM_RANGE(0x141000, 0x141fff) AM_RAM_WRITE(darkseal_palette_24bit_b_w) AM_BASE_GENERIC(paletteram2) AM_RANGE(0x180000, 0x18000f) AM_READWRITE(darkseal_control_r, darkseal_control_w) - AM_RANGE(0x200000, 0x200fff) AM_WRITE(darkseal_pf3b_data_w) /* 2nd half of pf3, only used on last level */ + AM_RANGE(0x200000, 0x200fff) AM_WRITE(darkseal_pf3b_data_w) /* 2nd half of pf3, only used on last level */ AM_RANGE(0x202000, 0x203fff) AM_WRITE(darkseal_pf3_data_w) AM_BASE(&darkseal_pf3_data) AM_RANGE(0x220000, 0x220fff) AM_RAM AM_BASE(&darkseal_pf12_row) AM_RANGE(0x222000, 0x222fff) AM_RAM AM_BASE(&darkseal_pf34_row) @@ -425,7 +425,7 @@ ROM_START( gatedoom1 ) ROM_LOAD( "fz-02.rom", 0x000000, 0x10000, CRC(3c9c3012) SHA1(086c2123725d4aa32838c0b6c82317d9c789c465) ) /* chars */ ROM_LOAD( "fz-03.rom", 0x010000, 0x10000, CRC(264b90ed) SHA1(0bb1557673107c2d732a9374d5601a6eaf229473) ) - /* the following four have not been verified on a real Gate of Doom */ + /* the following four have not been verified on a real Gate of Doom */ /* board - might be different from Dark Seal! */ ROM_REGION( 0x080000, "gfx2", 0 ) diff --git a/src/mame/drivers/dblewing.c b/src/mame/drivers/dblewing.c index f264660c6a0..30ec0b236a5 100644 --- a/src/mame/drivers/dblewing.c +++ b/src/mame/drivers/dblewing.c @@ -211,7 +211,7 @@ static READ16_HANDLER ( dlbewing_prot_r ) case 0x6d6: return boss_move; // boss 1 2nd pilot case 0x748: return boss_move; // boss 1 3rd pilot - case 0x566: return 0x0009; // boss BGM,might be a variable one (read->write to the sound latch) + case 0x566: return 0x0009; // boss BGM,might be a variable one (read->write to the sound latch) case 0x1ea: return boss_shoot_type; // boss 1 shoot type case 0x596: return boss_3_data; // boss 3 appearing case 0x692: return boss_4_data; @@ -320,7 +320,7 @@ static WRITE16_HANDLER( dblewing_prot_w ) case 0x380: // sound write soundlatch_w(space, 0, data & 0xff); dblewing_sound_irq |= 0x02; - cputag_set_input_line(space->machine, "audiocpu", 0, (dblewing_sound_irq != 0) ? ASSERT_LINE : CLEAR_LINE); + cputag_set_input_line(space->machine, "audiocpu", 0, (dblewing_sound_irq != 0) ? ASSERT_LINE : CLEAR_LINE); return; case 0x384: dblwings_384_data = data; @@ -422,11 +422,11 @@ static READ8_HANDLER(irq_latch_r) static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0x8000, 0x87ff) AM_RAM - AM_RANGE(0xa000, 0xa001) AM_DEVREADWRITE("ymsnd", ym2151_status_port_r,ym2151_w) + AM_RANGE(0xa000, 0xa001) AM_DEVREADWRITE("ymsnd", ym2151_status_port_r,ym2151_w) AM_RANGE(0xb000, 0xb000) AM_DEVREADWRITE("oki", okim6295_r,okim6295_w) AM_RANGE(0xc000, 0xc000) AM_READ(soundlatch_r) - AM_RANGE(0xd000, 0xd000) AM_READ(irq_latch_r) //timing? sound latch? - AM_RANGE(0xf000, 0xf000) AM_DEVREADWRITE("oki", okim6295_r,okim6295_w) + AM_RANGE(0xd000, 0xd000) AM_READ(irq_latch_r) //timing? sound latch? + AM_RANGE(0xf000, 0xf000) AM_DEVREADWRITE("oki", okim6295_r,okim6295_w) ADDRESS_MAP_END static ADDRESS_MAP_START( sound_io, ADDRESS_SPACE_IO, 8 ) diff --git a/src/mame/drivers/ddenlovr.c b/src/mame/drivers/ddenlovr.c index 7621947ca70..95e25d0493e 100644 --- a/src/mame/drivers/ddenlovr.c +++ b/src/mame/drivers/ddenlovr.c @@ -3890,65 +3890,65 @@ static INPUT_PORTS_START( rongrong ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SPECIAL ) // ? blitter irq flag ? PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SPECIAL ) // ? blitter busy flag ? - PORT_START("DSW1") - PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_A ) ) + PORT_START("DSW1") + PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_A ) ) PORT_DIPSETTING( 0x00, DEF_STR( 3C_1C ) ) PORT_DIPSETTING( 0x01, DEF_STR( 2C_1C ) ) - PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) ) + PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) ) PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) ) - PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coin_B ) ) - PORT_DIPSETTING( 0x00, DEF_STR( 3C_1C ) ) + PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coin_B ) ) + PORT_DIPSETTING( 0x00, DEF_STR( 3C_1C ) ) PORT_DIPSETTING( 0x04, DEF_STR( 2C_1C ) ) - PORT_DIPSETTING( 0x0c, DEF_STR( 1C_1C ) ) + PORT_DIPSETTING( 0x0c, DEF_STR( 1C_1C ) ) PORT_DIPSETTING( 0x08, DEF_STR( 1C_2C ) ) - PORT_DIPNAME( 0x10, 0x10, DEF_STR( Free_Play ) ) - PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x20, "Helps" ) - PORT_DIPSETTING( 0x00, "2" ) - PORT_DIPSETTING( 0x20, "3" ) - PORT_DIPNAME( 0x40, 0x40, DEF_STR( Demo_Sounds ) ) + PORT_DIPNAME( 0x10, 0x10, DEF_STR( Free_Play ) ) + PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x20, 0x20, "Helps" ) + PORT_DIPSETTING( 0x00, "2" ) + PORT_DIPSETTING( 0x20, "3" ) + PORT_DIPNAME( 0x40, 0x40, DEF_STR( Demo_Sounds ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x40, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - - PORT_START("DSW2") - PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) ) - PORT_DIPSETTING( 0x02, DEF_STR( Easy ) ) - PORT_DIPSETTING( 0x03, DEF_STR( Normal ) ) - PORT_DIPSETTING( 0x01, DEF_STR( Hard ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) ) - PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0c, "0" ) - PORT_DIPSETTING( 0x08, "1" ) - PORT_DIPSETTING( 0x04, "2" ) - PORT_DIPSETTING( 0x00, "3" ) - PORT_DIPNAME( 0x30, 0x30, "VS Rounds" ) - PORT_DIPSETTING( 0x30, "1" ) - PORT_DIPSETTING( 0x20, "2" ) - PORT_DIPSETTING( 0x10, "3" ) + PORT_DIPSETTING( 0x40, DEF_STR( On ) ) + PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + + PORT_START("DSW2") + PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) ) + PORT_DIPSETTING( 0x02, DEF_STR( Easy ) ) + PORT_DIPSETTING( 0x03, DEF_STR( Normal ) ) + PORT_DIPSETTING( 0x01, DEF_STR( Hard ) ) + PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) ) + PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0c, "0" ) + PORT_DIPSETTING( 0x08, "1" ) + PORT_DIPSETTING( 0x04, "2" ) + PORT_DIPSETTING( 0x00, "3" ) + PORT_DIPNAME( 0x30, 0x30, "VS Rounds" ) + PORT_DIPSETTING( 0x30, "1" ) + PORT_DIPSETTING( 0x20, "2" ) + PORT_DIPSETTING( 0x10, "3" ) // PORT_DIPSETTING( 0x00, "3" ) - PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - - PORT_START("DSW3") - PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) ) - PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_SERVICE( 0x02, IP_ACTIVE_LOW ) - PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x08, "Select Round" ) - PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + + PORT_START("DSW3") + PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) ) + PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_SERVICE( 0x02, IP_ACTIVE_LOW ) + PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x08, 0x08, "Select Round" ) + PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNKNOWN ) INPUT_PORTS_END static INPUT_PORTS_START( quizchq ) @@ -4492,7 +4492,7 @@ static INPUT_PORTS_START( hkagerou ) PORT_START("KEY2") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_C ) PORT_NAME("P2 3 (Hanafuda) / P2 C (Mahjong)") PORT_PLAYER(2) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) // P2 G (not used) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) // P2 K (not used) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) // P2 K (not used) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) // P2 Chi (not used) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) // P2 Ron (not used) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) diff --git a/src/mame/drivers/ddragon.c b/src/mame/drivers/ddragon.c index 271cf1e1776..52836bb8368 100644 --- a/src/mame/drivers/ddragon.c +++ b/src/mame/drivers/ddragon.c @@ -980,14 +980,14 @@ static MACHINE_DRIVER_START( ddragon ) MDRV_DRIVER_DATA(ddragon_state) /* basic machine hardware */ - MDRV_CPU_ADD("maincpu", HD6309, MAIN_CLOCK) /* 12 MHz / 4 internally */ + MDRV_CPU_ADD("maincpu", HD6309, MAIN_CLOCK) /* 12 MHz / 4 internally */ MDRV_CPU_PROGRAM_MAP(ddragon_map) MDRV_TIMER_ADD_SCANLINE("scantimer", ddragon_scanline, "screen", 0, 1) MDRV_CPU_ADD("sub", HD63701, MAIN_CLOCK / 2) /* 6 MHz / 4 internally */ MDRV_CPU_PROGRAM_MAP(sub_map) - MDRV_CPU_ADD("soundcpu", M6809, MAIN_CLOCK / 8) /* 1.5 MHz */ + MDRV_CPU_ADD("soundcpu", M6809, MAIN_CLOCK / 8) /* 1.5 MHz */ MDRV_CPU_PROGRAM_MAP(sound_map) MDRV_QUANTUM_TIME(HZ(60000)) /* heavy interleaving to sync up sprite<->main cpu's */ @@ -1037,7 +1037,7 @@ static MACHINE_DRIVER_START( ddragnba ) MDRV_IMPORT_FROM(ddragon) /* basic machine hardware */ - MDRV_CPU_REPLACE("sub", M6803, MAIN_CLOCK / 2) /* 6Mhz / 4 internally */ + MDRV_CPU_REPLACE("sub", M6803, MAIN_CLOCK / 2) /* 6Mhz / 4 internally */ MDRV_CPU_PROGRAM_MAP(ddragnba_sub_map) MDRV_CPU_IO_MAP(ddragnba_sub_portmap) MACHINE_DRIVER_END @@ -1049,14 +1049,14 @@ static MACHINE_DRIVER_START( ddgn6809 ) MDRV_DRIVER_DATA(ddragon_state) /* basic machine hardware */ - MDRV_CPU_ADD("maincpu", M6809, MAIN_CLOCK / 8) /* 1.5 MHz */ + MDRV_CPU_ADD("maincpu", M6809, MAIN_CLOCK / 8) /* 1.5 MHz */ MDRV_CPU_PROGRAM_MAP(ddragon_map) MDRV_TIMER_ADD_SCANLINE("scantimer", ddragon_scanline, "screen", 0, 1) MDRV_CPU_ADD("sub", M6809, MAIN_CLOCK / 8) /* 1.5 Mhz */ MDRV_CPU_PROGRAM_MAP(sub_map) - MDRV_CPU_ADD("soundcpu", M6809, MAIN_CLOCK / 8) /* 1.5 MHz */ + MDRV_CPU_ADD("soundcpu", M6809, MAIN_CLOCK / 8) /* 1.5 MHz */ MDRV_CPU_PROGRAM_MAP(sound_map) MDRV_QUANTUM_TIME(HZ(60000)) /* heavy interleaving to sync up sprite<->main cpu's */ @@ -1099,7 +1099,7 @@ static MACHINE_DRIVER_START( ddragon2 ) MDRV_DRIVER_DATA(ddragon_state) /* basic machine hardware */ - MDRV_CPU_ADD("maincpu", HD6309, MAIN_CLOCK) /* 12 MHz / 4 internally */ + MDRV_CPU_ADD("maincpu", HD6309, MAIN_CLOCK) /* 12 MHz / 4 internally */ MDRV_CPU_PROGRAM_MAP(dd2_map) MDRV_TIMER_ADD_SCANLINE("scantimer", ddragon_scanline, "screen", 0, 1) @@ -1722,7 +1722,7 @@ ROM_START( tstrike ) ROM_REGION( 0x08000, "gfx1", 0 ) ROM_LOAD( "alpha.rom", 0x00000, 0x08000, CRC(3a7c3185) SHA1(1ccaa6a1f46d66feda49fdea337b8eb32f14c7b5) ) /* chars */ - ROM_REGION( 0x80000, "gfx2", 0 ) /* sprites */ + ROM_REGION( 0x80000, "gfx2", 0 ) /* sprites */ ROM_LOAD( "tstrike.117", 0x00000, 0x10000, CRC(f7122c0d) SHA1(2b6b359585d9df966c1fc0041fb972aac9b1ab93) ) ROM_LOAD( "21j-b", 0x10000, 0x10000, CRC(40507a76) SHA1(74581a4b6f48100bddf20f319903af2fe36f39fa) ) /* from ddragon (116) */ ROM_LOAD( "tstrike.115", 0x20000, 0x10000, CRC(a13c7b62) SHA1(d929d8db7eb2b949cd3bd77238611ecc54b2e885) ) @@ -1732,7 +1732,7 @@ ROM_START( tstrike ) ROM_LOAD( "tstrike.111", 0x60000, 0x10000, CRC(7b9c87ad) SHA1(429049f84b2084bb074e380dca63b75150e7e69f) ) ROM_LOAD( "21j-h", 0x70000, 0x10000, CRC(65c7517d) SHA1(f177ba9c1c7cc75ff04d5591b9865ee364788f94) ) /* from ddragon (110) */ - ROM_REGION( 0x40000, "gfx3", 0 ) /* tiles */ + ROM_REGION( 0x40000, "gfx3", 0 ) /* tiles */ ROM_LOAD( "tstrike.78", 0x00000, 0x10000, CRC(88284aec) SHA1(f07bc5f84f2b2f976c911541c8f1ff2558f569ca) ) ROM_LOAD( "21j-9", 0x10000, 0x10000, CRC(c6640aed) SHA1(f156c337f48dfe4f7e9caee9a72c7ea3d53e3098) ) /* from ddragon (77) */ ROM_LOAD( "tstrike.109", 0x20000, 0x10000, CRC(8c2cd0bb) SHA1(364a708484c7750f38162d463104216bbd555b86) ) @@ -1766,7 +1766,7 @@ ROM_START( tstrikea ) ROM_REGION( 0x08000, "gfx1", 0 ) ROM_LOAD( "tstrike.20", 0x00000, 0x08000, CRC(b6b8bfa0) SHA1(ce50f8eb1a84873ef3df621d971a6b087473d6c2) ) /* chars */ - ROM_REGION( 0x80000, "gfx2", 0 ) /* sprites */ + ROM_REGION( 0x80000, "gfx2", 0 ) /* sprites */ ROM_LOAD( "tstrike.117", 0x00000, 0x10000, CRC(f7122c0d) SHA1(2b6b359585d9df966c1fc0041fb972aac9b1ab93) ) ROM_LOAD( "21j-b", 0x10000, 0x10000, CRC(40507a76) SHA1(74581a4b6f48100bddf20f319903af2fe36f39fa) ) /* from ddragon (116) */ ROM_LOAD( "tstrike.115", 0x20000, 0x10000, CRC(a13c7b62) SHA1(d929d8db7eb2b949cd3bd77238611ecc54b2e885) ) @@ -1776,7 +1776,7 @@ ROM_START( tstrikea ) ROM_LOAD( "tstrike.111", 0x60000, 0x10000, CRC(7b9c87ad) SHA1(429049f84b2084bb074e380dca63b75150e7e69f) ) ROM_LOAD( "21j-h", 0x70000, 0x10000, CRC(65c7517d) SHA1(f177ba9c1c7cc75ff04d5591b9865ee364788f94) ) /* from ddragon (110) */ - ROM_REGION( 0x40000, "gfx3", 0 ) /* tiles */ + ROM_REGION( 0x40000, "gfx3", 0 ) /* tiles */ ROM_LOAD( "tstrike.78", 0x00000, 0x10000, CRC(88284aec) SHA1(f07bc5f84f2b2f976c911541c8f1ff2558f569ca) ) ROM_LOAD( "21j-9", 0x10000, 0x10000, CRC(c6640aed) SHA1(f156c337f48dfe4f7e9caee9a72c7ea3d53e3098) ) /* from ddragon (77) */ ROM_LOAD( "tstrike.109", 0x20000, 0x10000, CRC(8c2cd0bb) SHA1(364a708484c7750f38162d463104216bbd555b86) ) diff --git a/src/mame/drivers/ddz.c b/src/mame/drivers/ddz.c index 91a88e5b52e..21b755769ce 100644 --- a/src/mame/drivers/ddz.c +++ b/src/mame/drivers/ddz.c @@ -54,7 +54,7 @@ static const vr0_interface vr0_config = static MACHINE_DRIVER_START( ddz ) MDRV_CPU_ADD("maincpu", SE3208, 43000000) MDRV_CPU_PROGRAM_MAP(ddz_mem) - MDRV_CPU_VBLANK_INT("screen", ddz_interrupt) + MDRV_CPU_VBLANK_INT("screen", ddz_interrupt) //MDRV_MACHINE_RESET(ddz) diff --git a/src/mame/drivers/deadang.c b/src/mame/drivers/deadang.c index 7176d7fc176..0f01d7600da 100644 --- a/src/mame/drivers/deadang.c +++ b/src/mame/drivers/deadang.c @@ -200,7 +200,7 @@ static const gfx_layout spritelayout = { 8,12,0,4}, { STEP4(3,-1), STEP4(19,-1), STEP4(512+3,-1), STEP4(512+19,-1) }, { STEP16(0,32) }, - 1024 + 1024 }; /* Graphics Decode Information */ diff --git a/src/mame/drivers/dec0.c b/src/mame/drivers/dec0.c index dadfad77e7a..60bb339da7f 100644 --- a/src/mame/drivers/dec0.c +++ b/src/mame/drivers/dec0.c @@ -90,7 +90,7 @@ static WRITE16_HANDLER( dec0_control_w ) break; case 0xa: /* Mix Psel(?). */ - logerror("CPU #0 PC %06x: warning - write %02x to unmapped memory address %06x\n",cpu_get_pc(space->cpu),data,0x30c010+(offset<<1)); + logerror("CPU #0 PC %06x: warning - write %02x to unmapped memory address %06x\n",cpu_get_pc(space->cpu),data,0x30c010+(offset<<1)); break; case 0xc: /* Cblk - coin blockout. Seems to be unused by the games */ @@ -98,7 +98,7 @@ static WRITE16_HANDLER( dec0_control_w ) case 0xe: /* Reset Intel 8751? - not sure, all the games write here at startup */ dec0_i8751_reset(); - logerror("CPU #0 PC %06x: warning - write %02x to unmapped memory address %06x\n",cpu_get_pc(space->cpu),data,0x30c010+(offset<<1)); + logerror("CPU #0 PC %06x: warning - write %02x to unmapped memory address %06x\n",cpu_get_pc(space->cpu),data,0x30c010+(offset<<1)); break; default: @@ -173,7 +173,7 @@ static ADDRESS_MAP_START( dec0_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x000000, 0x05ffff) AM_ROM AM_RANGE(0x240000, 0x240007) AM_WRITE(dec0_pf1_control_0_w) /* text layer */ AM_RANGE(0x240010, 0x240017) AM_WRITE(dec0_pf1_control_1_w) - AM_RANGE(0x242000, 0x24207f) AM_WRITEONLY AM_BASE(&dec0_pf1_colscroll) + AM_RANGE(0x242000, 0x24207f) AM_WRITEONLY AM_BASE(&dec0_pf1_colscroll) AM_RANGE(0x242400, 0x2427ff) AM_WRITEONLY AM_BASE(&dec0_pf1_rowscroll) AM_RANGE(0x242800, 0x243fff) AM_RAM /* Robocop only */ AM_RANGE(0x244000, 0x245fff) AM_RAM_WRITE(dec0_pf1_data_w) AM_BASE(&dec0_pf1_data) @@ -192,7 +192,7 @@ static ADDRESS_MAP_START( dec0_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x30c010, 0x30c01f) AM_WRITE(dec0_control_w) /* Priority, sound, etc. */ AM_RANGE(0x310000, 0x3107ff) AM_RAM_WRITE(dec0_paletteram_rg_w) AM_BASE_GENERIC(paletteram) AM_RANGE(0x314000, 0x3147ff) AM_RAM_WRITE(dec0_paletteram_b_w) AM_BASE_GENERIC(paletteram2) - AM_RANGE(0xff8000, 0xffbfff) AM_RAM AM_BASE(&dec0_ram) /* Main ram */ + AM_RANGE(0xff8000, 0xffbfff) AM_RAM AM_BASE(&dec0_ram) /* Main ram */ AM_RANGE(0xffc000, 0xffc7ff) AM_RAM AM_BASE_GENERIC(spriteram) /* Sprites */ ADDRESS_MAP_END @@ -243,7 +243,7 @@ static ADDRESS_MAP_START( slyspy_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x300c00, 0x300fff) AM_WRITEONLY AM_BASE(&dec0_pf3_rowscroll) AM_RANGE(0x301000, 0x3017ff) AM_WRITE(dec0_pf3_data_w) AM_BASE(&dec0_pf3_data) - AM_RANGE(0x304000, 0x307fff) AM_RAM AM_BASE(&dec0_ram) /* Sly spy main ram */ + AM_RANGE(0x304000, 0x307fff) AM_RAM AM_BASE(&dec0_ram) /* Sly spy main ram */ AM_RANGE(0x308000, 0x3087ff) AM_RAM AM_BASE_GENERIC(spriteram) /* Sprites */ AM_RANGE(0x310000, 0x3107ff) AM_RAM_WRITE(paletteram16_xxxxBBBBGGGGRRRR_word_w) AM_BASE_GENERIC(paletteram) AM_RANGE(0x314000, 0x314003) AM_WRITE(slyspy_control_w) @@ -371,9 +371,9 @@ static ADDRESS_MAP_START( automat_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x30c000, 0x30c01f) AM_WRITE(automat_control_w) /* Priority, sound, etc. */ AM_RANGE(0x310000, 0x3107ff) AM_RAM_WRITE(paletteram16_xxxxBBBBGGGGRRRR_word_w) AM_BASE_GENERIC(paletteram) AM_RANGE(0x314000, 0x3147ff) AM_RAM - AM_RANGE(0x400008, 0x400009) AM_WRITE(dec0_priority_w) // NEW - AM_RANGE(0xff8000, 0xffbfff) AM_RAM AM_BASE(&dec0_ram) /* Main ram */ - AM_RANGE(0xffc000, 0xffc7ff) AM_RAM AM_BASE_GENERIC(spriteram) /* Sprites */ + AM_RANGE(0x400008, 0x400009) AM_WRITE(dec0_priority_w) // NEW + AM_RANGE(0xff8000, 0xffbfff) AM_RAM AM_BASE(&dec0_ram) /* Main ram */ + AM_RANGE(0xffc000, 0xffc7ff) AM_RAM AM_BASE_GENERIC(spriteram) /* Sprites */ ADDRESS_MAP_END static WRITE8_HANDLER( automat_adpcm_w ) diff --git a/src/mame/drivers/dec8.c b/src/mame/drivers/dec8.c index 59967bb3b0d..aa3e1187af7 100644 --- a/src/mame/drivers/dec8.c +++ b/src/mame/drivers/dec8.c @@ -176,11 +176,11 @@ static WRITE8_HANDLER( srdarwin_i8751_w ) if (state->i8751_value == 0x3063) state->i8751_return = 0x9c; /* Protection - Japanese version */ if (state->i8751_value == 0x306b) state->i8751_return = 0x94; /* Protection - World version */ if ((state->i8751_value & 0xff00) == 0x4000) state->i8751_return = state->i8751_value; /* Coinage settings */ - if (state->i8751_value == 0x5000) state->i8751_return = ((state->coin1 / 10) << 4) | (state->coin1 % 10); /* Coin request */ - if (state->i8751_value == 0x6000) {state->i8751_value = -1; state->coin1--; } /* Coin clear */ + if (state->i8751_value == 0x5000) state->i8751_return = ((state->coin1 / 10) << 4) | (state->coin1 % 10); /* Coin request */ + if (state->i8751_value == 0x6000) {state->i8751_value = -1; state->coin1--; } /* Coin clear */ /* Nb: Command 0x4000 for setting coinage options is not supported */ - if ((input_port_read(space->machine, "FAKE") & 1) == 1) state->latch = 1; - if ((input_port_read(space->machine, "FAKE") & 1) != 1 && state->latch) {state->coin1++; state->latch = 0;} + if ((input_port_read(space->machine, "FAKE") & 1) == 1) state->latch = 1; + if ((input_port_read(space->machine, "FAKE") & 1) != 1 && state->latch) {state->coin1++; state->latch = 0;} /* This next value is the index to a series of tables, each table controls the end of level bad guy, wrong values crash the @@ -249,9 +249,9 @@ static WRITE8_HANDLER( gondo_i8751_w ) } /* Coins are controlled by the i8751 */ - if ((input_port_read(space->machine, "I8751") & 3) == 3) state->latch = 1; - if ((input_port_read(space->machine, "I8751") & 1) != 1 && state->latch) {state->coin1++; state->snd = 1; state->latch = 0;} - if ((input_port_read(space->machine, "I8751") & 2) != 2 && state->latch) {state->coin2++; state->snd = 1; state->latch = 0;} + if ((input_port_read(space->machine, "I8751") & 3) == 3) state->latch = 1; + if ((input_port_read(space->machine, "I8751") & 1) != 1 && state->latch) {state->coin1++; state->snd = 1; state->latch = 0;} + if ((input_port_read(space->machine, "I8751") & 2) != 2 && state->latch) {state->coin2++; state->snd = 1; state->latch = 0;} /* Work out return values */ if (state->i8751_value == 0x0000) {state->i8751_return = 0; state->coin1 = state->coin2 = state->snd = 0;} @@ -283,9 +283,9 @@ static WRITE8_HANDLER( shackled_i8751_w ) } /* Coins are controlled by the i8751 */ - if (/*(input_port_read(space->machine, "IN2") & 3) == 3*/!state->latch) {state->latch = 1; state->coin1 = state->coin2 = 0;} - if ((input_port_read(space->machine, "IN2") & 1) != 1 && state->latch) {state->coin1 = 1; state->latch = 0;} - if ((input_port_read(space->machine, "IN2") & 2) != 2 && state->latch) {state->coin2 = 1; state->latch = 0;} + if (/*(input_port_read(space->machine, "IN2") & 3) == 3*/!state->latch) {state->latch = 1; state->coin1 = state->coin2 = 0;} + if ((input_port_read(space->machine, "IN2") & 1) != 1 && state->latch) {state->coin1 = 1; state->latch = 0;} + if ((input_port_read(space->machine, "IN2") & 2) != 2 && state->latch) {state->coin2 = 1; state->latch = 0;} if (state->i8751_value == 0x0050) state->i8751_return = 0; /* Breywood ID */ if (state->i8751_value == 0x0051) state->i8751_return = 0; /* Shackled ID */ @@ -314,8 +314,8 @@ static WRITE8_HANDLER( lastmiss_i8751_w ) if (offset == 0) { /* Coins are controlled by the i8751 */ - if ((input_port_read(space->machine, "IN2") & 3) == 3 && !state->latch) state->latch = 1; - if ((input_port_read(space->machine, "IN2") & 3) != 3 && state->latch) {state->coin1++; state->latch = 0; state->snd = 0x400; state->i8751_return = 0x400; return;} + if ((input_port_read(space->machine, "IN2") & 3) == 3 && !state->latch) state->latch = 1; + if ((input_port_read(space->machine, "IN2") & 3) != 3 && state->latch) {state->coin1++; state->latch = 0; state->snd = 0x400; state->i8751_return = 0x400; return;} if (state->i8751_value == 0x007a) state->i8751_return = 0x0185; /* Japan ID code */ if (state->i8751_value == 0x007b) state->i8751_return = 0x0184; /* USA ID code */ if (state->i8751_value == 0x0001) {state->coin1 = state->snd = 0;}//??? @@ -346,8 +346,8 @@ static WRITE8_HANDLER( csilver_i8751_w ) if (offset == 0) { /* Coins are controlled by the i8751 */ - if ((input_port_read(space->machine, "IN2") & 3) == 3 && !state->latch) state->latch = 1; - if ((input_port_read(space->machine, "IN2") & 3) != 3 && state->latch) {state->coin1++; state->latch = 0; state->snd = 0x1200; state->i8751_return = 0x1200; return;} + if ((input_port_read(space->machine, "IN2") & 3) == 3 && !state->latch) state->latch = 1; + if ((input_port_read(space->machine, "IN2") & 3) != 3 && state->latch) {state->coin1++; state->latch = 0; state->snd = 0x1200; state->i8751_return = 0x1200; return;} if (state->i8751_value == 0x054a) {state->i8751_return = ~(0x4a); state->coin1 = 0; state->snd = 0;} /* Captain Silver (Japan) ID */ if (state->i8751_value == 0x054c) {state->i8751_return = ~(0x4c); state->coin1 = 0; state->snd = 0;} /* Captain Silver (World) ID */ @@ -373,9 +373,9 @@ static WRITE8_HANDLER( garyoret_i8751_w ) } /* Coins are controlled by the i8751 */ - if ((input_port_read(space->machine, "I8751") & 3) == 3) state->latch = 1; - if ((input_port_read(space->machine, "I8751") & 1) != 1 && state->latch) {state->coin1++; state->latch = 0;} - if ((input_port_read(space->machine, "I8751") & 2) != 2 && state->latch) {state->coin2++; state->latch = 0;} + if ((input_port_read(space->machine, "I8751") & 3) == 3) state->latch = 1; + if ((input_port_read(space->machine, "I8751") & 1) != 1 && state->latch) {state->coin1++; state->latch = 0;} + if ((input_port_read(space->machine, "I8751") & 2) != 2 && state->latch) {state->coin2++; state->latch = 0;} /* Work out return values */ if ((state->i8751_value >> 8) == 0x00) {state->i8751_return = 0; state->coin1 = state->coin2 = 0;} @@ -425,7 +425,7 @@ static WRITE8_HANDLER( csilver_control_w ) static WRITE8_HANDLER( dec8_sound_w ) { - dec8_state *state = (dec8_state *)space->machine->driver_data; + dec8_state *state = (dec8_state *)space->machine->driver_data; soundlatch_w(space, 0, data); cpu_set_input_line(state->audiocpu, INPUT_LINE_NMI, PULSE_LINE); } @@ -665,9 +665,9 @@ static ADDRESS_MAP_START( oscar_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x3c04, 0x3c04) AM_READ_PORT("DSW1") AM_RANGE(0x3c00, 0x3c1f) AM_WRITE(dec8_bac06_0_w) AM_RANGE(0x3c80, 0x3c80) AM_WRITE(buffer_spriteram_w) /* DMA */ - AM_RANGE(0x3d00, 0x3d00) AM_WRITE(dec8_bank_w) /* BNKS */ + AM_RANGE(0x3d00, 0x3d00) AM_WRITE(dec8_bank_w) /* BNKS */ AM_RANGE(0x3d80, 0x3d80) AM_WRITE(dec8_sound_w) /* SOUN */ - AM_RANGE(0x3e00, 0x3e00) AM_WRITENOP /* COINCL */ + AM_RANGE(0x3e00, 0x3e00) AM_WRITENOP /* COINCL */ AM_RANGE(0x3e80, 0x3e83) AM_WRITE(oscar_int_w) AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1") AM_RANGE(0x8000, 0xffff) AM_ROM @@ -1190,11 +1190,11 @@ static INPUT_PORTS_START( gondo ) PLAYER1_JOYSTICK /* Top 4 bits are rotary controller */ - PORT_START("IN1") + PORT_START("IN1") PLAYER2_JOYSTICK /* Top 4 bits are rotary controller */ - PORT_START("IN2") + PORT_START("IN2") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) @@ -1281,7 +1281,7 @@ static INPUT_PORTS_START( oscar ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 ) - PORT_START("IN1") + PORT_START("IN1") PLAYER2_JOYSTICK PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_COCKTAIL @@ -1354,7 +1354,7 @@ static INPUT_PORTS_START( oscaru ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 ) - PORT_START("IN1") + PORT_START("IN1") PLAYER2_JOYSTICK PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_COCKTAIL @@ -1427,7 +1427,7 @@ static INPUT_PORTS_START( lastmisn ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_START("IN1") + PORT_START("IN1") PLAYER2_JOYSTICK PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_COCKTAIL @@ -1501,7 +1501,7 @@ static INPUT_PORTS_START( lastmsnj ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_START("IN1") + PORT_START("IN1") PLAYER2_JOYSTICK PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_COCKTAIL @@ -1575,7 +1575,7 @@ static INPUT_PORTS_START( shackled ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_START("IN1") + PORT_START("IN1") PLAYER2_JOYSTICK PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) @@ -1654,7 +1654,7 @@ static INPUT_PORTS_START( csilver ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_START("IN1") + PORT_START("IN1") PLAYER2_JOYSTICK PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_COCKTAIL @@ -1728,7 +1728,7 @@ static INPUT_PORTS_START( garyoret ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 ) - PORT_START("IN1") + PORT_START("IN1") PLAYER2_JOYSTICK PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) @@ -1842,7 +1842,7 @@ static const gfx_layout sr_sprites = 16,16, 2048, 3, - { 0x10000*8,0x20000*8,0x00000*8 }, + { 0x10000*8,0x20000*8,0x00000*8 }, { 16*8, 1+(16*8), 2+(16*8), 3+(16*8), 4+(16*8), 5+(16*8), 6+(16*8), 7+(16*8), 0,1,2,3,4,5,6,7 }, { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 ,8*8,9*8,10*8,11*8,12*8,13*8,14*8,15*8 }, @@ -1867,7 +1867,7 @@ static const gfx_layout tiles = 16,16, 4096, 4, - { 0x60000*8,0x40000*8,0x20000*8,0x00000*8 }, + { 0x60000*8,0x40000*8,0x20000*8,0x00000*8 }, { 16*8, 1+(16*8), 2+(16*8), 3+(16*8), 4+(16*8), 5+(16*8), 6+(16*8), 7+(16*8), 0,1,2,3,4,5,6,7 }, { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 ,8*8,9*8,10*8,11*8,12*8,13*8,14*8,15*8}, @@ -1880,7 +1880,7 @@ static const gfx_layout tiles_r = 16,16, 2048, 4, - { 0x20000*8,0x00000*8,0x30000*8,0x10000*8 }, + { 0x20000*8,0x00000*8,0x30000*8,0x10000*8 }, { 7,6,5,4,3,2,1,0, 7+(16*8), 6+(16*8), 5+(16*8), 4+(16*8), 3+(16*8), 2+(16*8), 1+(16*8), 0+(16*8) }, { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 ,8*8,9*8,10*8,11*8,12*8,13*8,14*8,15*8}, @@ -1904,7 +1904,7 @@ static GFXDECODE_START( srdarwin ) GFXDECODE_ENTRY( "gfx1", 0x00000, charlayout_16k,128, 4 ) /* Only 1 used so far :/ */ GFXDECODE_ENTRY( "gfx2", 0x00000, sr_sprites, 64, 8 ) GFXDECODE_ENTRY( "gfx3", 0x00000, srdarwin_tiles, 0, 8 ) - GFXDECODE_ENTRY( "gfx3", 0x10000, srdarwin_tiles, 0, 8 ) + GFXDECODE_ENTRY( "gfx3", 0x10000, srdarwin_tiles, 0, 8 ) GFXDECODE_ENTRY( "gfx3", 0x20000, srdarwin_tiles, 0, 8 ) GFXDECODE_ENTRY( "gfx3", 0x30000, srdarwin_tiles, 0, 8 ) GFXDECODE_END diff --git a/src/mame/drivers/deco32.c b/src/mame/drivers/deco32.c index d64e64b58b0..f290c28c40e 100644 --- a/src/mame/drivers/deco32.c +++ b/src/mame/drivers/deco32.c @@ -849,8 +849,8 @@ static ADDRESS_MAP_START( tattass_map, ADDRESS_SPACE_PROGRAM, 32 ) AM_RANGE(0x0f8000, 0x0fffff) AM_ROM AM_WRITENOP AM_RANGE(0x100000, 0x11ffff) AM_RAM AM_BASE(&deco32_ram) AM_RANGE(0x120000, 0x120003) AM_NOP /* ACIA (unused) */ - AM_RANGE(0x130000, 0x130003) AM_WRITENOP /* Coin port (unused?) */ - AM_RANGE(0x140000, 0x140003) AM_WRITENOP /* Vblank ack */ + AM_RANGE(0x130000, 0x130003) AM_WRITENOP /* Coin port (unused?) */ + AM_RANGE(0x140000, 0x140003) AM_WRITENOP /* Vblank ack */ AM_RANGE(0x150000, 0x150003) AM_WRITE(tattass_control_w) /* Volume port/Eprom/Priority */ AM_RANGE(0x162000, 0x162fff) AM_RAM /* 'Jack' RAM!? */ @@ -892,8 +892,8 @@ static ADDRESS_MAP_START( nslasher_map, ADDRESS_SPACE_PROGRAM, 32 ) AM_RANGE(0x000000, 0x0fffff) AM_ROM AM_RANGE(0x100000, 0x11ffff) AM_RAM AM_BASE(&deco32_ram) AM_RANGE(0x120000, 0x1200ff) AM_NOP /* ACIA (unused) */ - AM_RANGE(0x140000, 0x140003) AM_WRITENOP /* Vblank ack */ - AM_RANGE(0x150000, 0x150003) AM_WRITE(nslasher_eeprom_w) /* Volume port/Eprom/Priority */ + AM_RANGE(0x140000, 0x140003) AM_WRITENOP /* Vblank ack */ + AM_RANGE(0x150000, 0x150003) AM_WRITE(nslasher_eeprom_w) /* Volume port/Eprom/Priority */ AM_RANGE(0x163000, 0x16309f) AM_RAM_WRITE(deco32_ace_ram_w) AM_BASE(&deco32_ace_ram) /* 'Ace' RAM!? */ AM_RANGE(0x164000, 0x164003) AM_WRITENOP /* Palette control BG2/3 ($1a constant) */ @@ -1991,25 +1991,25 @@ ROM_START( captaven ) ROM_REGION( 0x500000, "gfx2", 0 ) ROM_LOAD( "man-05.16a", 0x000000, 0x40000, CRC(d44d1995) SHA1(e88e1a59a4b24ad058f21538f6e9bbba94a166b4) ) /* Encrypted tiles */ - ROM_CONTINUE( 0x140000, 0x40000 ) - ROM_CONTINUE( 0x280000, 0x40000 ) - ROM_CONTINUE( 0x3c0000, 0x40000 ) + ROM_CONTINUE( 0x140000, 0x40000 ) + ROM_CONTINUE( 0x280000, 0x40000 ) + ROM_CONTINUE( 0x3c0000, 0x40000 ) ROM_LOAD( "man-04.14a", 0x040000, 0x40000, CRC(541492a1) SHA1(2e0ab12555fc46001a815e76e3a0cd21f385f82a) ) /* Encrypted tiles */ - ROM_CONTINUE( 0x180000, 0x40000 ) - ROM_CONTINUE( 0x2c0000, 0x40000 ) - ROM_CONTINUE( 0x400000, 0x40000 ) + ROM_CONTINUE( 0x180000, 0x40000 ) + ROM_CONTINUE( 0x2c0000, 0x40000 ) + ROM_CONTINUE( 0x400000, 0x40000 ) ROM_LOAD( "man-03.12a", 0x080000, 0x40000, CRC(2d9c52b2) SHA1(8f6f4fe4f1a63099f889068991b34f9432b04fd7) ) /* Encrypted tiles */ - ROM_CONTINUE( 0x1c0000, 0x40000 ) - ROM_CONTINUE( 0x300000, 0x40000 ) - ROM_CONTINUE( 0x440000, 0x40000 ) + ROM_CONTINUE( 0x1c0000, 0x40000 ) + ROM_CONTINUE( 0x300000, 0x40000 ) + ROM_CONTINUE( 0x440000, 0x40000 ) ROM_LOAD( "man-02.11a", 0x0c0000, 0x40000, CRC(07674c05) SHA1(08b33721d7eba4a1ff2e282f77eeb56535a52923) ) /* Encrypted tiles */ - ROM_CONTINUE( 0x200000, 0x40000 ) - ROM_CONTINUE( 0x340000, 0x40000 ) - ROM_CONTINUE( 0x480000, 0x40000 ) + ROM_CONTINUE( 0x200000, 0x40000 ) + ROM_CONTINUE( 0x340000, 0x40000 ) + ROM_CONTINUE( 0x480000, 0x40000 ) ROM_LOAD( "man-01.10a", 0x100000, 0x40000, CRC(ae714ada) SHA1(b4d5806265d422c8b837489afe93731f584e4adf) ) /* Encrypted tiles */ - ROM_CONTINUE( 0x240000, 0x40000 ) - ROM_CONTINUE( 0x380000, 0x40000 ) - ROM_CONTINUE( 0x4c0000, 0x40000 ) + ROM_CONTINUE( 0x240000, 0x40000 ) + ROM_CONTINUE( 0x380000, 0x40000 ) + ROM_CONTINUE( 0x4c0000, 0x40000 ) ROM_REGION( 0x400000, "gfx3", 0 ) /* Sprites */ ROM_LOAD16_BYTE( "man-06.17a", 0x000000, 0x100000, CRC(a9a64297) SHA1(e4cb441207b1907461c90c32c05a461c9bd30756) ) @@ -2043,25 +2043,25 @@ ROM_START( captavena ) ROM_REGION( 0x500000, "gfx2", 0 ) ROM_LOAD( "man-05.16a", 0x000000, 0x40000, CRC(d44d1995) SHA1(e88e1a59a4b24ad058f21538f6e9bbba94a166b4) ) /* Encrypted tiles */ - ROM_CONTINUE( 0x140000, 0x40000 ) - ROM_CONTINUE( 0x280000, 0x40000 ) - ROM_CONTINUE( 0x3c0000, 0x40000 ) + ROM_CONTINUE( 0x140000, 0x40000 ) + ROM_CONTINUE( 0x280000, 0x40000 ) + ROM_CONTINUE( 0x3c0000, 0x40000 ) ROM_LOAD( "man-04.14a", 0x040000, 0x40000, CRC(541492a1) SHA1(2e0ab12555fc46001a815e76e3a0cd21f385f82a) ) /* Encrypted tiles */ - ROM_CONTINUE( 0x180000, 0x40000 ) - ROM_CONTINUE( 0x2c0000, 0x40000 ) - ROM_CONTINUE( 0x400000, 0x40000 ) + ROM_CONTINUE( 0x180000, 0x40000 ) + ROM_CONTINUE( 0x2c0000, 0x40000 ) + ROM_CONTINUE( 0x400000, 0x40000 ) ROM_LOAD( "man-03.12a", 0x080000, 0x40000, CRC(2d9c52b2) SHA1(8f6f4fe4f1a63099f889068991b34f9432b04fd7) ) /* Encrypted tiles */ - ROM_CONTINUE( 0x1c0000, 0x40000 ) - ROM_CONTINUE( 0x300000, 0x40000 ) - ROM_CONTINUE( 0x440000, 0x40000 ) + ROM_CONTINUE( 0x1c0000, 0x40000 ) + ROM_CONTINUE( 0x300000, 0x40000 ) + ROM_CONTINUE( 0x440000, 0x40000 ) ROM_LOAD( "man-02.11a", 0x0c0000, 0x40000, CRC(07674c05) SHA1(08b33721d7eba4a1ff2e282f77eeb56535a52923) ) /* Encrypted tiles */ - ROM_CONTINUE( 0x200000, 0x40000 ) - ROM_CONTINUE( 0x340000, 0x40000 ) - ROM_CONTINUE( 0x480000, 0x40000 ) + ROM_CONTINUE( 0x200000, 0x40000 ) + ROM_CONTINUE( 0x340000, 0x40000 ) + ROM_CONTINUE( 0x480000, 0x40000 ) ROM_LOAD( "man-01.10a", 0x100000, 0x40000, CRC(ae714ada) SHA1(b4d5806265d422c8b837489afe93731f584e4adf) ) /* Encrypted tiles */ - ROM_CONTINUE( 0x240000, 0x40000 ) - ROM_CONTINUE( 0x380000, 0x40000 ) - ROM_CONTINUE( 0x4c0000, 0x40000 ) + ROM_CONTINUE( 0x240000, 0x40000 ) + ROM_CONTINUE( 0x380000, 0x40000 ) + ROM_CONTINUE( 0x4c0000, 0x40000 ) ROM_REGION( 0x400000, "gfx3", 0 ) /* Sprites */ ROM_LOAD16_BYTE( "man-06.17a", 0x000000, 0x100000, CRC(a9a64297) SHA1(e4cb441207b1907461c90c32c05a461c9bd30756) ) @@ -2095,25 +2095,25 @@ ROM_START( captavene ) ROM_REGION( 0x500000, "gfx2", 0 ) ROM_LOAD( "man-05.16a", 0x000000, 0x40000, CRC(d44d1995) SHA1(e88e1a59a4b24ad058f21538f6e9bbba94a166b4) ) /* Encrypted tiles */ - ROM_CONTINUE( 0x140000, 0x40000 ) - ROM_CONTINUE( 0x280000, 0x40000 ) - ROM_CONTINUE( 0x3c0000, 0x40000 ) + ROM_CONTINUE( 0x140000, 0x40000 ) + ROM_CONTINUE( 0x280000, 0x40000 ) + ROM_CONTINUE( 0x3c0000, 0x40000 ) ROM_LOAD( "man-04.14a", 0x040000, 0x40000, CRC(541492a1) SHA1(2e0ab12555fc46001a815e76e3a0cd21f385f82a) ) /* Encrypted tiles */ - ROM_CONTINUE( 0x180000, 0x40000 ) - ROM_CONTINUE( 0x2c0000, 0x40000 ) - ROM_CONTINUE( 0x400000, 0x40000 ) + ROM_CONTINUE( 0x180000, 0x40000 ) + ROM_CONTINUE( 0x2c0000, 0x40000 ) + ROM_CONTINUE( 0x400000, 0x40000 ) ROM_LOAD( "man-03.12a", 0x080000, 0x40000, CRC(2d9c52b2) SHA1(8f6f4fe4f1a63099f889068991b34f9432b04fd7) ) /* Encrypted tiles */ - ROM_CONTINUE( 0x1c0000, 0x40000 ) - ROM_CONTINUE( 0x300000, 0x40000 ) - ROM_CONTINUE( 0x440000, 0x40000 ) + ROM_CONTINUE( 0x1c0000, 0x40000 ) + ROM_CONTINUE( 0x300000, 0x40000 ) + ROM_CONTINUE( 0x440000, 0x40000 ) ROM_LOAD( "man-02.11a", 0x0c0000, 0x40000, CRC(07674c05) SHA1(08b33721d7eba4a1ff2e282f77eeb56535a52923) ) /* Encrypted tiles */ - ROM_CONTINUE( 0x200000, 0x40000 ) - ROM_CONTINUE( 0x340000, 0x40000 ) - ROM_CONTINUE( 0x480000, 0x40000 ) + ROM_CONTINUE( 0x200000, 0x40000 ) + ROM_CONTINUE( 0x340000, 0x40000 ) + ROM_CONTINUE( 0x480000, 0x40000 ) ROM_LOAD( "man-01.10a", 0x100000, 0x40000, CRC(ae714ada) SHA1(b4d5806265d422c8b837489afe93731f584e4adf) ) /* Encrypted tiles */ - ROM_CONTINUE( 0x240000, 0x40000 ) - ROM_CONTINUE( 0x380000, 0x40000 ) - ROM_CONTINUE( 0x4c0000, 0x40000 ) + ROM_CONTINUE( 0x240000, 0x40000 ) + ROM_CONTINUE( 0x380000, 0x40000 ) + ROM_CONTINUE( 0x4c0000, 0x40000 ) ROM_REGION( 0x400000, "gfx3", 0 ) /* Sprites */ ROM_LOAD16_BYTE( "man-06.17a", 0x000000, 0x100000, CRC(a9a64297) SHA1(e4cb441207b1907461c90c32c05a461c9bd30756) ) @@ -2153,25 +2153,25 @@ ROM_START( captavenu ) ROM_REGION( 0x500000, "gfx2", 0 ) ROM_LOAD( "man-05.16a", 0x000000, 0x40000, CRC(d44d1995) SHA1(e88e1a59a4b24ad058f21538f6e9bbba94a166b4) ) /* Encrypted tiles */ - ROM_CONTINUE( 0x140000, 0x40000 ) - ROM_CONTINUE( 0x280000, 0x40000 ) - ROM_CONTINUE( 0x3c0000, 0x40000 ) + ROM_CONTINUE( 0x140000, 0x40000 ) + ROM_CONTINUE( 0x280000, 0x40000 ) + ROM_CONTINUE( 0x3c0000, 0x40000 ) ROM_LOAD( "man-04.14a", 0x040000, 0x40000, CRC(541492a1) SHA1(2e0ab12555fc46001a815e76e3a0cd21f385f82a) ) /* Encrypted tiles */ - ROM_CONTINUE( 0x180000, 0x40000 ) - ROM_CONTINUE( 0x2c0000, 0x40000 ) - ROM_CONTINUE( 0x400000, 0x40000 ) + ROM_CONTINUE( 0x180000, 0x40000 ) + ROM_CONTINUE( 0x2c0000, 0x40000 ) + ROM_CONTINUE( 0x400000, 0x40000 ) ROM_LOAD( "man-03.12a", 0x080000, 0x40000, CRC(2d9c52b2) SHA1(8f6f4fe4f1a63099f889068991b34f9432b04fd7) ) /* Encrypted tiles */ - ROM_CONTINUE( 0x1c0000, 0x40000 ) - ROM_CONTINUE( 0x300000, 0x40000 ) - ROM_CONTINUE( 0x440000, 0x40000 ) + ROM_CONTINUE( 0x1c0000, 0x40000 ) + ROM_CONTINUE( 0x300000, 0x40000 ) + ROM_CONTINUE( 0x440000, 0x40000 ) ROM_LOAD( "man-02.11a", 0x0c0000, 0x40000, CRC(07674c05) SHA1(08b33721d7eba4a1ff2e282f77eeb56535a52923) ) /* Encrypted tiles */ - ROM_CONTINUE( 0x200000, 0x40000 ) - ROM_CONTINUE( 0x340000, 0x40000 ) - ROM_CONTINUE( 0x480000, 0x40000 ) + ROM_CONTINUE( 0x200000, 0x40000 ) + ROM_CONTINUE( 0x340000, 0x40000 ) + ROM_CONTINUE( 0x480000, 0x40000 ) ROM_LOAD( "man-01.10a", 0x100000, 0x40000, CRC(ae714ada) SHA1(b4d5806265d422c8b837489afe93731f584e4adf) ) /* Encrypted tiles */ - ROM_CONTINUE( 0x240000, 0x40000 ) - ROM_CONTINUE( 0x380000, 0x40000 ) - ROM_CONTINUE( 0x4c0000, 0x40000 ) + ROM_CONTINUE( 0x240000, 0x40000 ) + ROM_CONTINUE( 0x380000, 0x40000 ) + ROM_CONTINUE( 0x4c0000, 0x40000 ) ROM_REGION( 0x400000, "gfx3", 0 ) /* Sprites */ ROM_LOAD16_BYTE( "man-06.17a", 0x000000, 0x100000, CRC(a9a64297) SHA1(e4cb441207b1907461c90c32c05a461c9bd30756) ) @@ -2205,25 +2205,25 @@ ROM_START( captavenuu ) ROM_REGION( 0x500000, "gfx2", 0 ) ROM_LOAD( "man-05.16a", 0x000000, 0x40000, CRC(d44d1995) SHA1(e88e1a59a4b24ad058f21538f6e9bbba94a166b4) ) /* Encrypted tiles */ - ROM_CONTINUE( 0x140000, 0x40000 ) - ROM_CONTINUE( 0x280000, 0x40000 ) - ROM_CONTINUE( 0x3c0000, 0x40000 ) + ROM_CONTINUE( 0x140000, 0x40000 ) + ROM_CONTINUE( 0x280000, 0x40000 ) + ROM_CONTINUE( 0x3c0000, 0x40000 ) ROM_LOAD( "man-04.14a", 0x040000, 0x40000, CRC(541492a1) SHA1(2e0ab12555fc46001a815e76e3a0cd21f385f82a) ) /* Encrypted tiles */ - ROM_CONTINUE( 0x180000, 0x40000 ) - ROM_CONTINUE( 0x2c0000, 0x40000 ) - ROM_CONTINUE( 0x400000, 0x40000 ) + ROM_CONTINUE( 0x180000, 0x40000 ) + ROM_CONTINUE( 0x2c0000, 0x40000 ) + ROM_CONTINUE( 0x400000, 0x40000 ) ROM_LOAD( "man-03.12a", 0x080000, 0x40000, CRC(2d9c52b2) SHA1(8f6f4fe4f1a63099f889068991b34f9432b04fd7) ) /* Encrypted tiles */ - ROM_CONTINUE( 0x1c0000, 0x40000 ) - ROM_CONTINUE( 0x300000, 0x40000 ) - ROM_CONTINUE( 0x440000, 0x40000 ) + ROM_CONTINUE( 0x1c0000, 0x40000 ) + ROM_CONTINUE( 0x300000, 0x40000 ) + ROM_CONTINUE( 0x440000, 0x40000 ) ROM_LOAD( "man-02.11a", 0x0c0000, 0x40000, CRC(07674c05) SHA1(08b33721d7eba4a1ff2e282f77eeb56535a52923) ) /* Encrypted tiles */ - ROM_CONTINUE( 0x200000, 0x40000 ) - ROM_CONTINUE( 0x340000, 0x40000 ) - ROM_CONTINUE( 0x480000, 0x40000 ) + ROM_CONTINUE( 0x200000, 0x40000 ) + ROM_CONTINUE( 0x340000, 0x40000 ) + ROM_CONTINUE( 0x480000, 0x40000 ) ROM_LOAD( "man-01.10a", 0x100000, 0x40000, CRC(ae714ada) SHA1(b4d5806265d422c8b837489afe93731f584e4adf) ) /* Encrypted tiles */ - ROM_CONTINUE( 0x240000, 0x40000 ) - ROM_CONTINUE( 0x380000, 0x40000 ) - ROM_CONTINUE( 0x4c0000, 0x40000 ) + ROM_CONTINUE( 0x240000, 0x40000 ) + ROM_CONTINUE( 0x380000, 0x40000 ) + ROM_CONTINUE( 0x4c0000, 0x40000 ) ROM_REGION( 0x400000, "gfx3", 0 ) /* Sprites */ ROM_LOAD16_BYTE( "man-06.17a", 0x000000, 0x100000, CRC(a9a64297) SHA1(e4cb441207b1907461c90c32c05a461c9bd30756) ) @@ -2257,25 +2257,25 @@ ROM_START( captavenua ) ROM_REGION( 0x500000, "gfx2", 0 ) ROM_LOAD( "man-05.16a", 0x000000, 0x40000, CRC(d44d1995) SHA1(e88e1a59a4b24ad058f21538f6e9bbba94a166b4) ) /* Encrypted tiles */ - ROM_CONTINUE( 0x140000, 0x40000 ) - ROM_CONTINUE( 0x280000, 0x40000 ) - ROM_CONTINUE( 0x3c0000, 0x40000 ) + ROM_CONTINUE( 0x140000, 0x40000 ) + ROM_CONTINUE( 0x280000, 0x40000 ) + ROM_CONTINUE( 0x3c0000, 0x40000 ) ROM_LOAD( "man-04.14a", 0x040000, 0x40000, CRC(541492a1) SHA1(2e0ab12555fc46001a815e76e3a0cd21f385f82a) ) /* Encrypted tiles */ - ROM_CONTINUE( 0x180000, 0x40000 ) - ROM_CONTINUE( 0x2c0000, 0x40000 ) - ROM_CONTINUE( 0x400000, 0x40000 ) + ROM_CONTINUE( 0x180000, 0x40000 ) + ROM_CONTINUE( 0x2c0000, 0x40000 ) + ROM_CONTINUE( 0x400000, 0x40000 ) ROM_LOAD( "man-03.12a", 0x080000, 0x40000, CRC(2d9c52b2) SHA1(8f6f4fe4f1a63099f889068991b34f9432b04fd7) ) /* Encrypted tiles */ - ROM_CONTINUE( 0x1c0000, 0x40000 ) - ROM_CONTINUE( 0x300000, 0x40000 ) - ROM_CONTINUE( 0x440000, 0x40000 ) + ROM_CONTINUE( 0x1c0000, 0x40000 ) + ROM_CONTINUE( 0x300000, 0x40000 ) + ROM_CONTINUE( 0x440000, 0x40000 ) ROM_LOAD( "man-02.11a", 0x0c0000, 0x40000, CRC(07674c05) SHA1(08b33721d7eba4a1ff2e282f77eeb56535a52923) ) /* Encrypted tiles */ - ROM_CONTINUE( 0x200000, 0x40000 ) - ROM_CONTINUE( 0x340000, 0x40000 ) - ROM_CONTINUE( 0x480000, 0x40000 ) + ROM_CONTINUE( 0x200000, 0x40000 ) + ROM_CONTINUE( 0x340000, 0x40000 ) + ROM_CONTINUE( 0x480000, 0x40000 ) ROM_LOAD( "man-01.10a", 0x100000, 0x40000, CRC(ae714ada) SHA1(b4d5806265d422c8b837489afe93731f584e4adf) ) /* Encrypted tiles */ - ROM_CONTINUE( 0x240000, 0x40000 ) - ROM_CONTINUE( 0x380000, 0x40000 ) - ROM_CONTINUE( 0x4c0000, 0x40000 ) + ROM_CONTINUE( 0x240000, 0x40000 ) + ROM_CONTINUE( 0x380000, 0x40000 ) + ROM_CONTINUE( 0x4c0000, 0x40000 ) ROM_REGION( 0x400000, "gfx3", 0 ) /* Sprites */ ROM_LOAD16_BYTE( "man-06.17a", 0x000000, 0x100000, CRC(a9a64297) SHA1(e4cb441207b1907461c90c32c05a461c9bd30756) ) @@ -2309,25 +2309,25 @@ ROM_START( captavenj ) ROM_REGION( 0x500000, "gfx2", 0 ) ROM_LOAD( "man-05.16a", 0x000000, 0x40000, CRC(d44d1995) SHA1(e88e1a59a4b24ad058f21538f6e9bbba94a166b4) ) /* Encrypted tiles */ - ROM_CONTINUE( 0x140000, 0x40000 ) - ROM_CONTINUE( 0x280000, 0x40000 ) - ROM_CONTINUE( 0x3c0000, 0x40000 ) + ROM_CONTINUE( 0x140000, 0x40000 ) + ROM_CONTINUE( 0x280000, 0x40000 ) + ROM_CONTINUE( 0x3c0000, 0x40000 ) ROM_LOAD( "man-04.14a", 0x040000, 0x40000, CRC(541492a1) SHA1(2e0ab12555fc46001a815e76e3a0cd21f385f82a) ) /* Encrypted tiles */ - ROM_CONTINUE( 0x180000, 0x40000 ) - ROM_CONTINUE( 0x2c0000, 0x40000 ) - ROM_CONTINUE( 0x400000, 0x40000 ) + ROM_CONTINUE( 0x180000, 0x40000 ) + ROM_CONTINUE( 0x2c0000, 0x40000 ) + ROM_CONTINUE( 0x400000, 0x40000 ) ROM_LOAD( "man-03.12a", 0x080000, 0x40000, CRC(2d9c52b2) SHA1(8f6f4fe4f1a63099f889068991b34f9432b04fd7) ) /* Encrypted tiles */ - ROM_CONTINUE( 0x1c0000, 0x40000 ) - ROM_CONTINUE( 0x300000, 0x40000 ) - ROM_CONTINUE( 0x440000, 0x40000 ) + ROM_CONTINUE( 0x1c0000, 0x40000 ) + ROM_CONTINUE( 0x300000, 0x40000 ) + ROM_CONTINUE( 0x440000, 0x40000 ) ROM_LOAD( "man-02.11a", 0x0c0000, 0x40000, CRC(07674c05) SHA1(08b33721d7eba4a1ff2e282f77eeb56535a52923) ) /* Encrypted tiles */ - ROM_CONTINUE( 0x200000, 0x40000 ) - ROM_CONTINUE( 0x340000, 0x40000 ) - ROM_CONTINUE( 0x480000, 0x40000 ) + ROM_CONTINUE( 0x200000, 0x40000 ) + ROM_CONTINUE( 0x340000, 0x40000 ) + ROM_CONTINUE( 0x480000, 0x40000 ) ROM_LOAD( "man-01.10a", 0x100000, 0x40000, CRC(ae714ada) SHA1(b4d5806265d422c8b837489afe93731f584e4adf) ) /* Encrypted tiles */ - ROM_CONTINUE( 0x240000, 0x40000 ) - ROM_CONTINUE( 0x380000, 0x40000 ) - ROM_CONTINUE( 0x4c0000, 0x40000 ) + ROM_CONTINUE( 0x240000, 0x40000 ) + ROM_CONTINUE( 0x380000, 0x40000 ) + ROM_CONTINUE( 0x4c0000, 0x40000 ) ROM_REGION( 0x400000, "gfx3", 0 ) /* Sprites */ ROM_LOAD16_BYTE( "man-06.17a", 0x000000, 0x100000, CRC(a9a64297) SHA1(e4cb441207b1907461c90c32c05a461c9bd30756) ) diff --git a/src/mame/drivers/deco_ld.c b/src/mame/drivers/deco_ld.c index 3cb850a1707..6dbfe9f5964 100644 --- a/src/mame/drivers/deco_ld.c +++ b/src/mame/drivers/deco_ld.c @@ -75,8 +75,8 @@ static VIDEO_UPDATE( rblaster ) #if 0 static WRITE8_HANDLER( rblaster_sound_w ) { - soundlatch_w(space,0,data); - cpu_set_input_line(space->machine->cpu[1], 0, HOLD_LINE); + soundlatch_w(space,0,data); + cpu_set_input_line(space->machine->cpu[1], 0, HOLD_LINE); } #endif diff --git a/src/mame/drivers/decocass.c b/src/mame/drivers/decocass.c index 779bebdf296..da31b82c9d3 100644 --- a/src/mame/drivers/decocass.c +++ b/src/mame/drivers/decocass.c @@ -10,7 +10,7 @@ #include "machine/decocass.h" #include "sound/ay8910.h" -#define MASTER_CLOCK XTAL_12MHz +#define MASTER_CLOCK XTAL_12MHz #define HCLK (MASTER_CLOCK/2) #define HCLK1 (HCLK/2) #define HCLK2 (HCLK1/2) @@ -202,7 +202,7 @@ static INPUT_PORTS_START( decocass ) PORT_DIPSETTING( 0x0c, DEF_STR( 1C_1C ) ) PORT_DIPSETTING( 0x08, DEF_STR( 1C_2C ) ) PORT_DIPSETTING( 0x04, DEF_STR( 1C_3C ) ) - PORT_DIPNAME( 0x30, 0x30, "Type of Tape" ) PORT_DIPLOCATION("SW1:5,6") /* Used by the "bios" */ + PORT_DIPNAME( 0x30, 0x30, "Type of Tape" ) PORT_DIPLOCATION("SW1:5,6") /* Used by the "bios" */ PORT_DIPSETTING( 0x00, "MT (Big)" ) /* Was listed as "Board Type" with this being "OLD" */ PORT_DIPSETTING( 0x10, "invalid?" ) PORT_DIPSETTING( 0x20, "invalid?" ) @@ -565,7 +565,7 @@ static const gfx_layout objlayout = static GFXDECODE_START( decocass ) GFXDECODE_ENTRY( NULL, 0x6000, charlayout, 0, 4 ) /* char set #1 */ - GFXDECODE_ENTRY( NULL, 0x6000, spritelayout, 0, 4 ) /* sprites */ + GFXDECODE_ENTRY( NULL, 0x6000, spritelayout, 0, 4 ) /* sprites */ GFXDECODE_ENTRY( NULL, 0xd000, tilelayout, 32, 2 ) /* background tiles */ GFXDECODE_ENTRY( NULL, 0xd800, objlayout, 48, 4 ) /* object */ GFXDECODE_END diff --git a/src/mame/drivers/deshoros.c b/src/mame/drivers/deshoros.c index 305cc1143c4..7bacfb1fd78 100644 --- a/src/mame/drivers/deshoros.c +++ b/src/mame/drivers/deshoros.c @@ -82,7 +82,7 @@ static WRITE8_HANDLER( io_w ) case 0x00: /*Printer data*/ return; case 0x02: update_led_array(data); return; case 0x05: coin_lockout_w(space->machine, 0,io_ram[offset] & 1);return; - case 0x06: /*Printer IRQ enable*/ return; + case 0x06: /*Printer IRQ enable*/ return; // case 0x0a: "buzzer" 0 write // case 0x0b: "buzzer" 1 write case 0x0c: answer_bankswitch(space->machine,data&0x03); return; //data & 0x10 enabled too,dunno if it is worth to shift the data... diff --git a/src/mame/drivers/discoboy.c b/src/mame/drivers/discoboy.c index 78b1318bcda..80ca24c0151 100644 --- a/src/mame/drivers/discoboy.c +++ b/src/mame/drivers/discoboy.c @@ -204,7 +204,7 @@ static WRITE8_HANDLER( discoboy_port_01_w ) discoboy_state *state = (discoboy_state *)space->machine->driver_data; // 00 10 20 30 during gameplay 1,2,3 other times?? title screen bit 0x40 toggle - //printf("unk discoboy_port_01_w %02x\n",data); + //printf("unk discoboy_port_01_w %02x\n",data); // discoboy gfxbank state->gfxbank = data & 0xf0; diff --git a/src/mame/drivers/djboy.c b/src/mame/drivers/djboy.c index 12d4159c61c..e378bb5c519 100644 --- a/src/mame/drivers/djboy.c +++ b/src/mame/drivers/djboy.c @@ -840,7 +840,7 @@ static INTERRUPT_GEN( djboy_interrupt ) static const kaneko_pandora_interface djboy_pandora_config = { "screen", /* screen tag */ - 0, /* gfx_region */ + 0, /* gfx_region */ 0, 0 /* x_offs, y_offs */ }; diff --git a/src/mame/drivers/djmain.c b/src/mame/drivers/djmain.c index 27017d0ea6d..3fecf5ba6c3 100644 --- a/src/mame/drivers/djmain.c +++ b/src/mame/drivers/djmain.c @@ -109,7 +109,7 @@ static WRITE32_HANDLER( paletteram32_w ) COMBINE_DATA(&space->machine->generic.paletteram.u32[offset]); data = space->machine->generic.paletteram.u32[offset]; - r = (data >> 0) & 0xff; + r = (data >> 0) & 0xff; g = (data >> 8) & 0xff; b = (data >> 16) & 0xff; diff --git a/src/mame/drivers/dkong.c b/src/mame/drivers/dkong.c index 288ad4e784b..c0453ac77ca 100644 --- a/src/mame/drivers/dkong.c +++ b/src/mame/drivers/dkong.c @@ -767,14 +767,14 @@ static ADDRESS_MAP_START( dkong_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x7c80, 0x7c80) AM_READ_PORT("IN1") AM_WRITE(radarscp_grid_color_w)/* IN1 */ AM_RANGE(0x7d00, 0x7d00) AM_READ(dkong_in2_r) /* IN2 */ - AM_RANGE(0x7d00, 0x7d07) AM_DEVWRITE("ls259.6h", latch8_bit0_w) /* Sound signals */ + AM_RANGE(0x7d00, 0x7d07) AM_DEVWRITE("ls259.6h", latch8_bit0_w) /* Sound signals */ AM_RANGE(0x7d80, 0x7d80) AM_READ_PORT("DSW0") AM_WRITE(dkong_audio_irq_w) /* DSW0 */ AM_RANGE(0x7d81, 0x7d81) AM_WRITE(radarscp_grid_enable_w) AM_RANGE(0x7d82, 0x7d82) AM_WRITE(dkong_flipscreen_w) AM_RANGE(0x7d83, 0x7d83) AM_WRITE(dkong_spritebank_w) /* 2 PSL Signal */ AM_RANGE(0x7d84, 0x7d84) AM_WRITE(interrupt_enable_w) - AM_RANGE(0x7d85, 0x7d85) AM_DEVWRITE("dma8257", p8257_drq_w) /* P8257 ==> /DRQ0 /DRQ1 */ + AM_RANGE(0x7d85, 0x7d85) AM_DEVWRITE("dma8257", p8257_drq_w) /* P8257 ==> /DRQ0 /DRQ1 */ AM_RANGE(0x7d86, 0x7d87) AM_WRITE(dkong_palettebank_w) ADDRESS_MAP_END diff --git a/src/mame/drivers/dlair.c b/src/mame/drivers/dlair.c index 28d9eb0481d..b43fb2c1af9 100644 --- a/src/mame/drivers/dlair.c +++ b/src/mame/drivers/dlair.c @@ -107,7 +107,7 @@ static int serial_receive(const device_config *device, int channel) static Z80CTC_INTERFACE( ctc_intf ) { 0, /* timer disables */ - DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), /* interrupt handler */ + DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), /* interrupt handler */ DEVCB_NULL, /* ZC/TO0 callback */ DEVCB_NULL, /* ZC/TO1 callback */ DEVCB_NULL /* ZC/TO2 callback */ diff --git a/src/mame/drivers/dominob.c b/src/mame/drivers/dominob.c index dbb0c8a22b4..9b20a153f17 100644 --- a/src/mame/drivers/dominob.c +++ b/src/mame/drivers/dominob.c @@ -124,8 +124,8 @@ static VIDEO_UPDATE( dominob ) for (y = 0; y < 256 / 32; y++) { for (x = 0; x < 256 / 32; x++) - { - drawgfx_opaque(bitmap, + { + drawgfx_opaque(bitmap, cliprect, screen->machine->gfx[1], state->bgram[index] + 256 * (state->bgram[index + 1] & 0xf), @@ -133,21 +133,21 @@ static VIDEO_UPDATE( dominob ) 0, 0, x * 32, y * 32); index += 2; - } + } } for (y = 0; y < 32; y++) { - for (x = 0; x < 32; x++) - { - drawgfx_transpen( bitmap, + for (x = 0; x < 32; x++) + { + drawgfx_transpen( bitmap, cliprect, screen->machine->gfx[0], state->videoram[(y * 32 + x) * 2 + 1] + (state->videoram[(y * 32 + x) * 2] & 7) * 256, (state->videoram[(y * 32 + x) * 2] >> 3), 0, 0, x * 8, y * 8,0); - } + } } draw_sprites(screen->machine, bitmap, cliprect); diff --git a/src/mame/drivers/drgnmst.c b/src/mame/drivers/drgnmst.c index 034cf2147a7..533ae9494df 100644 --- a/src/mame/drivers/drgnmst.c +++ b/src/mame/drivers/drgnmst.c @@ -356,15 +356,15 @@ static const gfx_layout drgnmst_char32x32_layout = RGN_FRAC(1,2), 4, { 24,8, 16,0 }, - { RGN_FRAC(1,2)+0,RGN_FRAC(1,2)+1,RGN_FRAC(1,2)+2,RGN_FRAC(1,2)+3,RGN_FRAC(1,2)+4,RGN_FRAC(1,2)+5,RGN_FRAC(1,2)+6,RGN_FRAC(1,2)+7, + { RGN_FRAC(1,2)+0,RGN_FRAC(1,2)+1,RGN_FRAC(1,2)+2,RGN_FRAC(1,2)+3,RGN_FRAC(1,2)+4,RGN_FRAC(1,2)+5,RGN_FRAC(1,2)+6,RGN_FRAC(1,2)+7, 0,1,2,3,4,5,6,7, RGN_FRAC(1,2)+32,RGN_FRAC(1,2)+33,RGN_FRAC(1,2)+34,RGN_FRAC(1,2)+35,RGN_FRAC(1,2)+36,RGN_FRAC(1,2)+37,RGN_FRAC(1,2)+38,RGN_FRAC(1,2)+39, 32,33,34,35,36,37,38,39 }, { 0*64, 1*64, 2*64, 3*64, 4*64, 5*64, 6*64, 7*64, 8*64, 9*64,10*64,11*64,12*64,13*64,14*64,15*64, - 16*64,17*64,18*64,19*64,20*64,21*64,22*64,23*64, - 24*64,25*64,26*64,27*64,28*64,29*64,30*64,31*64 }, + 16*64,17*64,18*64,19*64,20*64,21*64,22*64,23*64, + 24*64,25*64,26*64,27*64,28*64,29*64,30*64,31*64 }, 32*64 }; diff --git a/src/mame/drivers/dynax.c b/src/mame/drivers/dynax.c index 8dfecdf070e..3c5a1ea0c6c 100644 --- a/src/mame/drivers/dynax.c +++ b/src/mame/drivers/dynax.c @@ -560,7 +560,7 @@ static ADDRESS_MAP_START( hnoridur_io_map, ADDRESS_SPACE_IO, 8 ) AM_RANGE( 0x24, 0x24 ) AM_READ_PORT ( "DSW1" ) // DSW2 AM_RANGE( 0x25, 0x25 ) AM_READ_PORT ( "DSW3" ) // DSW4 AM_RANGE( 0x26, 0x26 ) AM_READ_PORT ( "DSW2" ) // DSW3 - AM_RANGE( 0x30, 0x30 ) AM_DEVWRITE ( "msm", adpcm_reset_w ) // MSM5205 reset + AM_RANGE( 0x30, 0x30 ) AM_DEVWRITE ( "msm", adpcm_reset_w ) // MSM5205 reset AM_RANGE( 0x32, 0x32 ) AM_WRITE ( adpcm_data_w ) // MSM5205 data AM_RANGE( 0x34, 0x35 ) AM_DEVWRITE( "ymsnd", ym2413_w ) // AM_RANGE( 0x36, 0x36 ) AM_DEVREAD ( "aysnd", ay8910_r ) // AY8910, DSW1 @@ -643,7 +643,7 @@ static ADDRESS_MAP_START( hjingi_io_map, ADDRESS_SPACE_IO, 8 ) ADDRESS_MAP_GLOBA AM_RANGE( 0x25, 0x25 ) AM_READ_PORT ( "DSW3" ) // DSW3 AM_RANGE( 0x26, 0x26 ) AM_READ_PORT ( "DSW2" ) // DSW2 - AM_RANGE( 0x30, 0x30 ) AM_DEVWRITE ( "msm", adpcm_reset_w ) // MSM5205 reset + AM_RANGE( 0x30, 0x30 ) AM_DEVWRITE ( "msm", adpcm_reset_w ) // MSM5205 reset AM_RANGE( 0x32, 0x32 ) AM_WRITE ( adpcm_data_w ) // MSM5205 data AM_RANGE( 0x34, 0x35 ) AM_DEVWRITE( "ymsnd", ym2413_w ) // @@ -2679,7 +2679,7 @@ static INPUT_PORTS_START( yarunara ) PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) ) PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Difficulty ) ) PORT_DIPSETTING( 0x08, DEF_STR( Easy ) ) // 1,6 - PORT_DIPSETTING( 0x0c, DEF_STR( Normal ) ) // 3,4 + PORT_DIPSETTING( 0x0c, DEF_STR( Normal ) ) // 3,4 PORT_DIPSETTING( 0x04, DEF_STR( Hard ) ) // 5,2 PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) ) // 7,0 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Flip_Screen ) ) @@ -2741,7 +2741,7 @@ static INPUT_PORTS_START( hanayara ) PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) ) PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Difficulty ) ) PORT_DIPSETTING( 0x08, DEF_STR( Easy ) ) // 1,6 - PORT_DIPSETTING( 0x0c, DEF_STR( Normal ) ) // 3,4 + PORT_DIPSETTING( 0x0c, DEF_STR( Normal ) ) // 3,4 PORT_DIPSETTING( 0x04, DEF_STR( Hard ) ) // 5,2 PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) ) // 7,0 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Flip_Screen ) ) @@ -3141,7 +3141,7 @@ static INPUT_PORTS_START( jantouki ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_L ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_PON ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_START("KEY4") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) diff --git a/src/mame/drivers/enigma2.c b/src/mame/drivers/enigma2.c index c1d2c4d17a7..7c2b1bc7a55 100644 --- a/src/mame/drivers/enigma2.c +++ b/src/mame/drivers/enigma2.c @@ -666,8 +666,8 @@ ROM_START( enigma2 ) ROM_LOAD( "2.7d", 0x0800, 0x0800, CRC(173c1329) SHA1(3f1ad46d0e58ab236e4ff2b385d09fbf113627da) ) ROM_LOAD( "3.8d", 0x1000, 0x0800, CRC(c7d3e6b1) SHA1(43f7c3a02b46747998260d5469248f21714fe12b) ) ROM_LOAD( "4.10d", 0x1800, 0x0800, CRC(c6a7428c) SHA1(3503f09856655c5973fb89f60d1045fe41012aa9) ) - ROM_LOAD( "5.11d", 0x4000, 0x0800, CRC(098ac15b) SHA1(cce28a2540a9eabb473391fff92895129ae41751) ) - ROM_LOAD( "6.13d", 0x4800, 0x0800, CRC(240a9d4b) SHA1(ca1c69fafec0471141ce1254ddfaef54fecfcbf0) ) + ROM_LOAD( "5.11d", 0x4000, 0x0800, CRC(098ac15b) SHA1(cce28a2540a9eabb473391fff92895129ae41751) ) + ROM_LOAD( "6.13d", 0x4800, 0x0800, CRC(240a9d4b) SHA1(ca1c69fafec0471141ce1254ddfaef54fecfcbf0) ) ROM_REGION( 0x10000, "audiocpu", 0 ) ROM_LOAD( "enigma2.s", 0x0000, 0x1000, CRC(68fd8c54) SHA1(69996d5dfd996f0aacb26e397bef314204a2a88a) ) @@ -685,7 +685,7 @@ ROM_START( enigma2a ) ROM_LOAD( "34_en3.bin", 0x1000, 0x0800, CRC(43d06cf4) SHA1(495af05d54c0325efb67347f691e64d194645d85) ) ROM_LOAD( "33_en4.bin", 0x1800, 0x0800, CRC(8879a430) SHA1(c97f44bef3741eef74e137d2459e79f1b3a90457) ) ROM_LOAD( "5.11d", 0x4000, 0x0800, CRC(098ac15b) SHA1(cce28a2540a9eabb473391fff92895129ae41751) ) - ROM_LOAD( "6.13d", 0x4800, 0x0800, CRC(240a9d4b) SHA1(ca1c69fafec0471141ce1254ddfaef54fecfcbf0) ) + ROM_LOAD( "6.13d", 0x4800, 0x0800, CRC(240a9d4b) SHA1(ca1c69fafec0471141ce1254ddfaef54fecfcbf0) ) ROM_REGION( 0x10000, "audiocpu", 0 ) ROM_LOAD( "sound.bin", 0x0000, 0x0800, BAD_DUMP CRC(5f092d3c) SHA1(17c70f6af1b5560a45e6b1bdb330a98b27570fe9) ) diff --git a/src/mame/drivers/eolith.c b/src/mame/drivers/eolith.c index c137bf842c0..45c26436f6b 100644 --- a/src/mame/drivers/eolith.c +++ b/src/mame/drivers/eolith.c @@ -702,12 +702,12 @@ ROM_START( raccoon ) ROM_LOAD( "racoon-u.43", 0x00000, 0x80000, CRC(711ee026) SHA1(c55dfaa24cbaa7a613657cfb25e7f0085f1e4cbf) ) ROM_REGION32_BE( 0x2000000, "user1", ROMREGION_ERASE00 ) /* Game Data - banked ROM, swapping necessary */ - ROM_LOAD32_WORD_SWAP( "racoon.u10", 0x0000000, 0x200000, CRC(f702390e) SHA1(47520ba0e6d3f044136a517ebbec7426a66ce33d) ) + ROM_LOAD32_WORD_SWAP( "racoon.u10", 0x0000000, 0x200000, CRC(f702390e) SHA1(47520ba0e6d3f044136a517ebbec7426a66ce33d) ) ROM_LOAD32_WORD_SWAP( "racoon.u1", 0x0000002, 0x200000, CRC(49775125) SHA1(2b8ee9dd767465999c828d65bb02b8aaad94177c) ) - ROM_LOAD32_WORD_SWAP( "racoon.u11", 0x0400000, 0x200000, CRC(3f23f368) SHA1(eb1ea51def2cde5e7e4f334888294b794aa03dfc) ) - ROM_LOAD32_WORD_SWAP( "racoon.u2", 0x0400002, 0x200000, CRC(1eb00529) SHA1(d9af75e116f5237a3c6812538b77155b9c08dd5c) ) - ROM_LOAD32_WORD_SWAP( "racoon.u14", 0x0800000, 0x200000, CRC(870fe45e) SHA1(f8d800b92eb1ee9ef4663319fd3cb1f5e52d0e72) ) - ROM_LOAD32_WORD_SWAP( "racoon.u5", 0x0800002, 0x200000, CRC(5fbac174) SHA1(1d3e3f40a737d61ff688627891dec183af7fa19a) ) + ROM_LOAD32_WORD_SWAP( "racoon.u11", 0x0400000, 0x200000, CRC(3f23f368) SHA1(eb1ea51def2cde5e7e4f334888294b794aa03dfc) ) + ROM_LOAD32_WORD_SWAP( "racoon.u2", 0x0400002, 0x200000, CRC(1eb00529) SHA1(d9af75e116f5237a3c6812538b77155b9c08dd5c) ) + ROM_LOAD32_WORD_SWAP( "racoon.u14", 0x0800000, 0x200000, CRC(870fe45e) SHA1(f8d800b92eb1ee9ef4663319fd3cb1f5e52d0e72) ) + ROM_LOAD32_WORD_SWAP( "racoon.u5", 0x0800002, 0x200000, CRC(5fbac174) SHA1(1d3e3f40a737d61ff688627891dec183af7fa19a) ) // 0x0c00000 - 0x1ffffff empty ROM_REGION( 0x08000, "cpu1", 0 ) /* QDSP ('51) Code */ diff --git a/src/mame/drivers/equites.c b/src/mame/drivers/equites.c index 099a0c1282d..0508a59bc3b 100644 --- a/src/mame/drivers/equites.c +++ b/src/mame/drivers/equites.c @@ -1185,9 +1185,9 @@ static MACHINE_START( equites ) { equites_state *state = (equites_state *)machine->driver_data; - state->mcu = devtag_get_device(machine, "mcu"); - state->audio_cpu = devtag_get_device(machine, "audiocpu"); - state->msm = devtag_get_device(machine, "msm"); + state->mcu = devtag_get_device(machine, "mcu"); + state->audio_cpu = devtag_get_device(machine, "audiocpu"); + state->msm = devtag_get_device(machine, "msm"); state->dac_1 = devtag_get_device(machine, "dac1"); state->dac_2 = devtag_get_device(machine, "dac2"); diff --git a/src/mame/drivers/ertictac.c b/src/mame/drivers/ertictac.c index 76715409a2f..75a2b9dac0e 100644 --- a/src/mame/drivers/ertictac.c +++ b/src/mame/drivers/ertictac.c @@ -348,10 +348,10 @@ static VIDEO_START( ertictac ) for (color = 0; color < NUM_PENS; color++) { - UINT8 i = color & 0x03; - UINT8 r = ((color & 0x04) >> 0) | ((color & 0x10) >> 1) | i; - UINT8 g = ((color & 0x20) >> 3) | ((color & 0x40) >> 3) | i; - UINT8 b = ((color & 0x08) >> 1) | ((color & 0x80) >> 4) | i; + UINT8 i = color & 0x03; + UINT8 r = ((color & 0x04) >> 0) | ((color & 0x10) >> 1) | i; + UINT8 g = ((color & 0x20) >> 3) | ((color & 0x40) >> 3) | i; + UINT8 b = ((color & 0x08) >> 1) | ((color & 0x80) >> 4) | i; pens[color] = MAKE_RGB(pal4bit(r), pal4bit(g), pal4bit(b)); } diff --git a/src/mame/drivers/esd16.c b/src/mame/drivers/esd16.c index a97e6ecb16e..b568e3dc5c1 100644 --- a/src/mame/drivers/esd16.c +++ b/src/mame/drivers/esd16.c @@ -146,8 +146,8 @@ static ADDRESS_MAP_START( hedpanic_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0xb00004, 0xb00007) AM_WRITEONLY AM_BASE_MEMBER(esd16_state, scroll_1) // AM_RANGE(0xb00008, 0xb00009) AM_WRITEONLY AM_BASE_MEMBER(esd16_state, headpanic_platform_x) AM_RANGE(0xb0000a, 0xb0000b) AM_WRITEONLY AM_BASE_MEMBER(esd16_state, headpanic_platform_y) - AM_RANGE(0xb0000c, 0xb0000d) AM_WRITENOP // ?? - AM_RANGE(0xb0000e, 0xb0000f) AM_WRITEONLY AM_BASE_MEMBER(esd16_state, head_layersize) // ?? + AM_RANGE(0xb0000c, 0xb0000d) AM_WRITENOP // ?? + AM_RANGE(0xb0000e, 0xb0000f) AM_WRITEONLY AM_BASE_MEMBER(esd16_state, head_layersize) // ?? AM_RANGE(0xc00000, 0xc00001) AM_WRITENOP // IRQ Ack AM_RANGE(0xc00002, 0xc00003) AM_READ_PORT("P1_P2") AM_RANGE(0xc00004, 0xc00005) AM_READ_PORT("SYSTEM") @@ -182,9 +182,9 @@ static ADDRESS_MAP_START( mchampdx_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x700004, 0x700007) AM_WRITEONLY AM_BASE_MEMBER(esd16_state, scroll_1) // AM_RANGE(0x700008, 0x700009) AM_WRITEONLY AM_BASE_MEMBER(esd16_state, headpanic_platform_x) // not used in mchampdx? AM_RANGE(0x70000a, 0x70000b) AM_WRITEONLY AM_BASE_MEMBER(esd16_state, headpanic_platform_y) // not used in mchampdx? - AM_RANGE(0x70000c, 0x70000d) AM_WRITENOP // ?? - AM_RANGE(0x70000e, 0x70000f) AM_WRITEONLY AM_BASE_MEMBER(esd16_state, head_layersize) // ?? - AM_RANGE(0xd00008, 0xd00009) AM_WRITE(hedpanic_platform_w) // not used in mchampdx? + AM_RANGE(0x70000c, 0x70000d) AM_WRITENOP // ?? + AM_RANGE(0x70000e, 0x70000f) AM_WRITEONLY AM_BASE_MEMBER(esd16_state, head_layersize) // ?? + AM_RANGE(0xd00008, 0xd00009) AM_WRITE(hedpanic_platform_w) // not used in mchampdx? ADDRESS_MAP_END /* Tang Tang - like the others but again with different addresses */ @@ -201,7 +201,7 @@ static ADDRESS_MAP_START( tangtang_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x400004, 0x400007) AM_WRITEONLY AM_BASE_MEMBER(esd16_state, scroll_1) // AM_RANGE(0x400008, 0x400009) AM_WRITEONLY AM_BASE_MEMBER(esd16_state, headpanic_platform_x) // not used in mchampdx? AM_RANGE(0x40000a, 0x40000b) AM_WRITEONLY AM_BASE_MEMBER(esd16_state, headpanic_platform_y) // not used in mchampdx? - AM_RANGE(0x40000c, 0x40000d) AM_WRITENOP // ?? + AM_RANGE(0x40000c, 0x40000d) AM_WRITENOP // ?? AM_RANGE(0x40000e, 0x40000f) AM_WRITEONLY AM_BASE_MEMBER(esd16_state, head_layersize) // ?? AM_RANGE(0x500000, 0x500001) AM_WRITENOP // IRQ Ack AM_RANGE(0x500002, 0x500003) AM_READ_PORT("P1_P2") diff --git a/src/mame/drivers/exedexes.c b/src/mame/drivers/exedexes.c index 423ee78223f..df86c52f80c 100644 --- a/src/mame/drivers/exedexes.c +++ b/src/mame/drivers/exedexes.c @@ -35,7 +35,7 @@ static ADDRESS_MAP_START( exedexes_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0xc004, 0xc004) AM_READ_PORT("DSW1") AM_RANGE(0xc800, 0xc800) AM_WRITE(soundlatch_w) AM_RANGE(0xc804, 0xc804) AM_WRITE(exedexes_c804_w) /* coin counters + text layer enable */ - AM_RANGE(0xc806, 0xc806) AM_WRITENOP /* Watchdog ?? */ + AM_RANGE(0xc806, 0xc806) AM_WRITENOP /* Watchdog ?? */ AM_RANGE(0xd000, 0xd3ff) AM_RAM_WRITE(exedexes_videoram_w) AM_BASE_MEMBER(exedexes_state, videoram) /* Video RAM */ AM_RANGE(0xd400, 0xd7ff) AM_RAM_WRITE(exedexes_colorram_w) AM_BASE_MEMBER(exedexes_state, colorram) /* Color RAM */ AM_RANGE(0xd800, 0xd801) AM_WRITEONLY AM_BASE_MEMBER(exedexes_state, nbg_yscroll) diff --git a/src/mame/drivers/exidy440.c b/src/mame/drivers/exidy440.c index 1a064eb31ca..c3355fa4f03 100644 --- a/src/mame/drivers/exidy440.c +++ b/src/mame/drivers/exidy440.c @@ -534,7 +534,7 @@ static INPUT_PORTS_START( crossbow ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_CUSTOM(firq_beam_r, NULL) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_CUSTOM(firq_vblank_r, NULL) - PORT_START("IN1") /* audio board dips */ + PORT_START("IN1") /* audio board dips */ COINAGE PORT_BIT( 0x70, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_DIPNAME( 0x80, 0x80, DEF_STR( Free_Play ) ) @@ -616,7 +616,7 @@ static INPUT_PORTS_START( combat ) PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(firq_beam_r, NULL) PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(firq_vblank_r, NULL) - PORT_START("IN1") /* audio board dips */ + PORT_START("IN1") /* audio board dips */ COINAGE PORT_BIT( 0x70, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_DIPNAME( 0x80, 0x80, DEF_STR( Free_Play ) ) @@ -1204,11 +1204,11 @@ ROM_START( combat ) ROM_LOAD( "2l", 0x02000, 0x2000, CRC(6b733306) SHA1(a41cc2e646392d71642abe2ab8d72f2d56214c02) ) ROM_LOAD( "2m", 0x04000, 0x2000, CRC(dc074733) SHA1(29a036d4057b813f584373493cb5b69b711840ae) ) ROM_LOAD( "2n", 0x06000, 0x2000, CRC(7985867f) SHA1(8d86777b7afa8a6c1a36e598a83feeb28536f02e) ) - ROM_LOAD( "2p", 0x08000, 0x2000, CRC(88684dcf) SHA1(fa006db1d70d2b557ab867ad766e27374e252f8c) ) + ROM_LOAD( "2p", 0x08000, 0x2000, CRC(88684dcf) SHA1(fa006db1d70d2b557ab867ad766e27374e252f8c) ) ROM_LOAD( "2r", 0x0a000, 0x2000, CRC(5857321e) SHA1(9726ce74b0e0b3e7fa44002d42342c5f2be00c22) ) ROM_LOAD( "2s", 0x0c000, 0x2000, CRC(371e5235) SHA1(6cfa5ba2715a33c61fadc3d5b9347c26bb3279dd) ) - ROM_LOAD( "2t", 0x0e000, 0x2000, CRC(7ae65f05) SHA1(404bcfe629aecf1e0835d7feeaff8654829fd10f) ) - ROM_LOAD( "1k", 0x10000, 0x2000, CRC(f748ea87) SHA1(4d90f44edb01d65c28c9742c50b4cbe6e26aced3) ) + ROM_LOAD( "2t", 0x0e000, 0x2000, CRC(7ae65f05) SHA1(404bcfe629aecf1e0835d7feeaff8654829fd10f) ) + ROM_LOAD( "1k", 0x10000, 0x2000, CRC(f748ea87) SHA1(4d90f44edb01d65c28c9742c50b4cbe6e26aced3) ) ROM_LOAD( "xba-1.2s", 0x16000, 0x2000, CRC(14dd8993) SHA1(066e163fca6d8f696d98d78b41b54a8d06eaba47) ) /* from Crossbow */ ROM_LOAD( "xba-1.1n", 0x18000, 0x2000, CRC(2e855698) SHA1(fa4c3ec03fdd1c569c0ca2418899ffa81b5259ec) ) /* from Crossbow */ ROM_LOAD( "xba-1.1p", 0x1a000, 0x2000, CRC(788bfac6) SHA1(8cec8ea7a876939719e9901b00055fc90615f237) ) /* from Crossbow */ @@ -1265,11 +1265,11 @@ ROM_START( catch22 ) ROM_LOAD( "2l", 0x02000, 0x2000, CRC(6b733306) SHA1(a41cc2e646392d71642abe2ab8d72f2d56214c02) ) ROM_LOAD( "2m", 0x04000, 0x2000, CRC(dc074733) SHA1(29a036d4057b813f584373493cb5b69b711840ae) ) ROM_LOAD( "2n", 0x06000, 0x2000, CRC(7985867f) SHA1(8d86777b7afa8a6c1a36e598a83feeb28536f02e) ) - ROM_LOAD( "2p", 0x08000, 0x2000, CRC(88684dcf) SHA1(fa006db1d70d2b557ab867ad766e27374e252f8c) ) + ROM_LOAD( "2p", 0x08000, 0x2000, CRC(88684dcf) SHA1(fa006db1d70d2b557ab867ad766e27374e252f8c) ) ROM_LOAD( "2r", 0x0a000, 0x2000, CRC(5857321e) SHA1(9726ce74b0e0b3e7fa44002d42342c5f2be00c22) ) ROM_LOAD( "2s", 0x0c000, 0x2000, CRC(371e5235) SHA1(6cfa5ba2715a33c61fadc3d5b9347c26bb3279dd) ) - ROM_LOAD( "2t", 0x0e000, 0x2000, CRC(7ae65f05) SHA1(404bcfe629aecf1e0835d7feeaff8654829fd10f) ) - ROM_LOAD( "1k", 0x10000, 0x2000, CRC(f748ea87) SHA1(4d90f44edb01d65c28c9742c50b4cbe6e26aced3) ) + ROM_LOAD( "2t", 0x0e000, 0x2000, CRC(7ae65f05) SHA1(404bcfe629aecf1e0835d7feeaff8654829fd10f) ) + ROM_LOAD( "1k", 0x10000, 0x2000, CRC(f748ea87) SHA1(4d90f44edb01d65c28c9742c50b4cbe6e26aced3) ) ROM_LOAD( "xba-1.2s", 0x16000, 0x2000, CRC(14dd8993) SHA1(066e163fca6d8f696d98d78b41b54a8d06eaba47) ) /* from Crossbow */ ROM_LOAD( "xba-1.1n", 0x18000, 0x2000, CRC(2e855698) SHA1(fa4c3ec03fdd1c569c0ca2418899ffa81b5259ec) ) /* from Crossbow */ ROM_LOAD( "xba-1.1p", 0x1a000, 0x2000, CRC(788bfac6) SHA1(8cec8ea7a876939719e9901b00055fc90615f237) ) /* from Crossbow */ @@ -1375,7 +1375,7 @@ ROM_START( claypign ) ROM_LOAD( "claypige.n2", 0x06000, 0x2000, CRC(9e381cb5) SHA1(aeedb0030baa8a7f9396b917f0452a3edcd725c2) ) ROM_LOAD( "xba-1.2l", 0x08000, 0x2000, CRC(2c24cb35) SHA1(4ea16998f477d6429a92ca05ef74daa21315e695) ) /* from Crossbow */ ROM_LOAD( "xba-1.2k", 0x0a000, 0x2000, CRC(b6e57685) SHA1(ee690cb966af126bfb0bafa804e0ad5490cab1db) ) /* from Crossbow */ - ROM_LOAD( "xba-1.1m", 0x0c000, 0x2000, CRC(18d097ac) SHA1(c3546c5a21458e7117d36f2e477d3d5db7827487) ) /* from Crossbow */ + ROM_LOAD( "xba-1.1m", 0x0c000, 0x2000, CRC(18d097ac) SHA1(c3546c5a21458e7117d36f2e477d3d5db7827487) ) /* from Crossbow */ ROM_LOAD( "xba-1.1t", 0x0e000, 0x2000, CRC(5f41c282) SHA1(670b94534051ce5c6f0c8e0ff5ad7ab78c95be19) ) /* from Crossbow */ ROM_LOAD( "claypige.k1", 0x10000, 0x2000, CRC(07f12d18) SHA1(57041cd31abfd94f8c5ad172aeafef5302484973) ) ROM_LOAD( "claypige.l1", 0x12000, 0x2000, CRC(f448eb4f) SHA1(40e2116dcff76a58bc460c4725bfd463d4dda227) ) diff --git a/src/mame/drivers/f1gp.c b/src/mame/drivers/f1gp.c index 45e372c87a3..4b81cc7c0f7 100644 --- a/src/mame/drivers/f1gp.c +++ b/src/mame/drivers/f1gp.c @@ -95,9 +95,9 @@ static ADDRESS_MAP_START( f1gp_cpu1_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0xa00000, 0xbfffff) AM_READ(extrarom2_r) AM_RANGE(0xc00000, 0xc3ffff) AM_READWRITE(f1gp_zoomdata_r, f1gp_zoomdata_w) AM_RANGE(0xd00000, 0xd01fff) AM_READWRITE(f1gp_rozvideoram_r, f1gp_rozvideoram_w) AM_BASE_MEMBER(f1gp_state, rozvideoram) - AM_RANGE(0xd02000, 0xd03fff) AM_READWRITE(f1gp_rozvideoram_r, f1gp_rozvideoram_w) /* mirror */ - AM_RANGE(0xd04000, 0xd05fff) AM_READWRITE(f1gp_rozvideoram_r, f1gp_rozvideoram_w) /* mirror */ - AM_RANGE(0xd06000, 0xd07fff) AM_READWRITE(f1gp_rozvideoram_r, f1gp_rozvideoram_w) /* mirror */ + AM_RANGE(0xd02000, 0xd03fff) AM_READWRITE(f1gp_rozvideoram_r, f1gp_rozvideoram_w) /* mirror */ + AM_RANGE(0xd04000, 0xd05fff) AM_READWRITE(f1gp_rozvideoram_r, f1gp_rozvideoram_w) /* mirror */ + AM_RANGE(0xd06000, 0xd07fff) AM_READWRITE(f1gp_rozvideoram_r, f1gp_rozvideoram_w) /* mirror */ AM_RANGE(0xe00000, 0xe03fff) AM_RAM AM_BASE_SIZE_MEMBER(f1gp_state, spr1cgram, spr1cgram_size) // SPR-1 CG RAM AM_RANGE(0xe04000, 0xe07fff) AM_RAM AM_BASE_SIZE_MEMBER(f1gp_state, spr2cgram, spr2cgram_size) // SPR-2 CG RAM AM_RANGE(0xf00000, 0xf003ff) AM_RAM AM_BASE_MEMBER(f1gp_state, spr1vram) // SPR-1 VRAM diff --git a/src/mame/drivers/fantland.c b/src/mame/drivers/fantland.c index b9050f384b9..a22545310a1 100644 --- a/src/mame/drivers/fantland.c +++ b/src/mame/drivers/fantland.c @@ -544,7 +544,7 @@ static INPUT_PORTS_START( galaxygn ) PORT_DIPSETTING( 0x05, DEF_STR( 1C_3C ) ) PORT_DIPSETTING( 0x04, DEF_STR( 1C_4C ) ) PORT_DIPSETTING( 0x00, "Invulnerability" ) - PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) // Demo Sounds? doesn't work + PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) // Demo Sounds? doesn't work PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPSETTING( 0x08, DEF_STR( On ) ) PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) // Allow Continue? doesn't work diff --git a/src/mame/drivers/fastlane.c b/src/mame/drivers/fastlane.c index 946950ca863..5392ec1440b 100644 --- a/src/mame/drivers/fastlane.c +++ b/src/mame/drivers/fastlane.c @@ -90,8 +90,8 @@ static ADDRESS_MAP_START( fastlane_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x0f00, 0x0f1f) AM_DEVREADWRITE("k051733", k051733_r, k051733_w) /* 051733 (protection) */ AM_RANGE(0x1000, 0x17ff) AM_RAM AM_BASE_MEMBER(fastlane_state, paletteram) /* Palette RAM */ AM_RANGE(0x1800, 0x1fff) AM_RAM /* Work RAM */ - AM_RANGE(0x2000, 0x27ff) AM_RAM_WRITE(fastlane_vram1_w) AM_BASE_MEMBER(fastlane_state, videoram1) /* Video RAM (chip 1) */ - AM_RANGE(0x2800, 0x2fff) AM_RAM_WRITE(fastlane_vram2_w) AM_BASE_MEMBER(fastlane_state, videoram2) /* Video RAM (chip 2) */ + AM_RANGE(0x2000, 0x27ff) AM_RAM_WRITE(fastlane_vram1_w) AM_BASE_MEMBER(fastlane_state, videoram1) /* Video RAM (chip 1) */ + AM_RANGE(0x2800, 0x2fff) AM_RAM_WRITE(fastlane_vram2_w) AM_BASE_MEMBER(fastlane_state, videoram2) /* Video RAM (chip 2) */ AM_RANGE(0x3000, 0x3fff) AM_RAM AM_BASE_MEMBER(fastlane_state, spriteram) /* Sprite RAM */ AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1") /* banked ROM */ AM_RANGE(0x8000, 0xffff) AM_ROM /* ROM */ diff --git a/src/mame/drivers/fcrash.c b/src/mame/drivers/fcrash.c index 6b769934c6d..03b762fd515 100644 --- a/src/mame/drivers/fcrash.c +++ b/src/mame/drivers/fcrash.c @@ -225,7 +225,7 @@ static VIDEO_UPDATE( fcrash ) flip_screen_set(screen->machine, videocontrol & 0x8000); - layercontrol = state->cps_b_regs[0x20 / 2]; + layercontrol = state->cps_b_regs[0x20 / 2]; /* Get video memory base registers */ cps1_get_video_base(screen->machine); @@ -305,7 +305,7 @@ static VIDEO_UPDATE( kodb ) flip_screen_set(screen->machine, videocontrol & 0x8000); - layercontrol = state->cps_b_regs[0x20 / 2]; + layercontrol = state->cps_b_regs[0x20 / 2]; /* Get video memory base registers */ cps1_get_video_base(screen->machine); diff --git a/src/mame/drivers/firebeat.c b/src/mame/drivers/firebeat.c index 5bfd7727506..153653408fb 100644 --- a/src/mame/drivers/firebeat.c +++ b/src/mame/drivers/firebeat.c @@ -1108,7 +1108,7 @@ static void atapi_command_reg_w(running_machine *machine, int reg, UINT16 data) break; case 0xa0: /* ATAPI Packet */ - atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_BSY | ATAPI_STAT_DRQ; + atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_BSY | ATAPI_STAT_DRQ; atapi_regs[ATAPI_REG_INTREASON] = ATAPI_INTREASON_COMMAND; atapi_data_ptr = 0; @@ -1754,7 +1754,7 @@ static INPUT_PORTS_START(ppp) PORT_START("IN0") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) // Left PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) // Right - PORT_SERVICE_NO_TOGGLE( 0x04, IP_ACTIVE_LOW) // Test + PORT_SERVICE_NO_TOGGLE( 0x04, IP_ACTIVE_LOW) // Test PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Service") PORT_CODE(KEYCODE_7) // Service PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 ) // Coin PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1 ) // Start / Ok @@ -1787,7 +1787,7 @@ static INPUT_PORTS_START(kbm) PORT_START("IN0") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 ) // Start P1 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 ) // Start P2 - PORT_SERVICE_NO_TOGGLE( 0x04, IP_ACTIVE_LOW) // Test + PORT_SERVICE_NO_TOGGLE( 0x04, IP_ACTIVE_LOW) // Test PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Service") PORT_CODE(KEYCODE_7) // Service PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 ) // Coin PORT_BIT( 0xe0, IP_ACTIVE_LOW, IPT_UNUSED ) @@ -1925,7 +1925,7 @@ static MACHINE_DRIVER_START(firebeat) MDRV_RTC65271_ADD("rtc", NULL) - /* video hardware */ + /* video hardware */ MDRV_SCREEN_ADD("screen", RASTER) MDRV_SCREEN_REFRESH_RATE(60) MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */) @@ -1965,7 +1965,7 @@ static MACHINE_DRIVER_START(firebeat2) MDRV_RTC65271_ADD("rtc", NULL) - /* video hardware */ + /* video hardware */ MDRV_PALETTE_LENGTH(32768) MDRV_PALETTE_INIT(RRRRR_GGGGG_BBBBB) diff --git a/src/mame/drivers/flkatck.c b/src/mame/drivers/flkatck.c index 60d720d1672..483c59c4bcc 100644 --- a/src/mame/drivers/flkatck.c +++ b/src/mame/drivers/flkatck.c @@ -96,7 +96,7 @@ static WRITE8_HANDLER( multiply_w ) static ADDRESS_MAP_START( flkatck_map, ADDRESS_SPACE_PROGRAM, 8 ) - AM_RANGE(0x0000, 0x0007) AM_RAM_WRITE(flkatck_k007121_regs_w) /* 007121 registers */ + AM_RANGE(0x0000, 0x0007) AM_RAM_WRITE(flkatck_k007121_regs_w) /* 007121 registers */ AM_RANGE(0x0008, 0x03ff) AM_RAM /* RAM */ AM_RANGE(0x0400, 0x041f) AM_READWRITE(flkatck_ls138_r, flkatck_ls138_w) /* inputs, DIPS, bankswitch, counters, sound command */ AM_RANGE(0x0800, 0x0bff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_le_w) AM_BASE_GENERIC(paletteram) /* palette */ diff --git a/src/mame/drivers/fortecar.c b/src/mame/drivers/fortecar.c index da1fbb4444c..61362ec7af2 100644 --- a/src/mame/drivers/fortecar.c +++ b/src/mame/drivers/fortecar.c @@ -128,8 +128,8 @@ static ADDRESS_MAP_START( fortecar_ports, ADDRESS_SPACE_IO, 8 ) AM_RANGE(0x40, 0x41) AM_DEVWRITE("aysnd", ay8910_address_data_w) AM_RANGE(0x60, 0x63) AM_DEVREADWRITE("fcppi0", ppi8255_r, ppi8255_w)//M5L8255AP // AM_RANGE(0x80, 0x81) //8251A UART - AM_RANGE(0xa0, 0xa0) AM_READ_PORT("IN0") //written too,multiplexer? - AM_RANGE(0xa1, 0xa1) AM_READ_PORT("IN1") + AM_RANGE(0xa0, 0xa0) AM_READ_PORT("IN0") //written too,multiplexer? + AM_RANGE(0xa1, 0xa1) AM_READ_PORT("IN1") ADDRESS_MAP_END diff --git a/src/mame/drivers/fromanc2.c b/src/mame/drivers/fromanc2.c index b0e9d541db1..a2bc1172eb5 100644 --- a/src/mame/drivers/fromanc2.c +++ b/src/mame/drivers/fromanc2.c @@ -209,7 +209,7 @@ static ADDRESS_MAP_START( fromanc2_main_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0xd01000, 0xd01001) AM_WRITE(fromanc2_sndcmd_w) // SOUND REQ (1P/2P) AM_RANGE(0xd01100, 0xd01101) AM_READ_PORT("SYSTEM") AM_RANGE(0xd01200, 0xd01201) AM_WRITE(fromanc2_subcpu_w) // SUB CPU WRITE - AM_RANGE(0xd01300, 0xd01301) AM_READ(fromanc2_subcpu_r ) // SUB CPU READ + AM_RANGE(0xd01300, 0xd01301) AM_READ(fromanc2_subcpu_r ) // SUB CPU READ AM_RANGE(0xd01400, 0xd01401) AM_WRITE(fromanc2_gfxbank_0_w) // GFXBANK (1P) AM_RANGE(0xd01500, 0xd01501) AM_WRITE(fromanc2_gfxbank_1_w) // GFXBANK (2P) AM_RANGE(0xd01600, 0xd01601) AM_WRITE(fromanc2_eeprom_w) // EEPROM DATA diff --git a/src/mame/drivers/funkybee.c b/src/mame/drivers/funkybee.c index 541d223f7db..874af574abd 100644 --- a/src/mame/drivers/funkybee.c +++ b/src/mame/drivers/funkybee.c @@ -404,7 +404,7 @@ Notes: */ ROM_START( skylancr ) - ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "1sl.5a", 0x0000, 0x2000, CRC(e80b315e) SHA1(0c02aa9f0d4bdfc3482c400d0e4e38fd3912a512) ) ROM_LOAD( "2sl.5c", 0x2000, 0x2000, CRC(9d70567b) SHA1(05ff6f0c4b4d928e937556d9943a76f6cbc0f05f) ) ROM_LOAD( "3sl.5d", 0x4000, 0x2000, CRC(64c39457) SHA1(b54a57a8576c2f852b765350c4504ccc3f5a431c) ) diff --git a/src/mame/drivers/funkyjet.c b/src/mame/drivers/funkyjet.c index 6f185fcc68b..ac552fd2f67 100644 --- a/src/mame/drivers/funkyjet.c +++ b/src/mame/drivers/funkyjet.c @@ -184,7 +184,7 @@ static INPUT_PORTS_START( funkyjet ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) PORT_SERVICE( 0x0001, IP_ACTIVE_LOW ) - PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Demo_Sounds ) ) + PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Demo_Sounds ) ) PORT_DIPSETTING( 0x0000, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0100, DEF_STR( On ) ) PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Allow_Continue ) ) @@ -212,7 +212,7 @@ static INPUT_PORTS_START( funkyjej ) PORT_INCLUDE(funkyjet) PORT_MODIFY("DSW") - PORT_DIPNAME( 0x0100, 0x0000, DEF_STR( Demo_Sounds ) ) + PORT_DIPNAME( 0x0100, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPSETTING( 0x0100, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) INPUT_PORTS_END @@ -340,10 +340,10 @@ ROM_START( funkyjet ) ROM_REGION( 0x100000, "gfx2", 0 ) ROM_LOAD( "mat01", 0x000000, 0x80000, CRC(24093a8d) SHA1(71f76ddd8a4b6e05ceb2fff4e20b6edb5e011e79) ) /* sprites */ - ROM_LOAD( "mat00", 0x080000, 0x80000, CRC(fbda0228) SHA1(815d49898d02e699393e370209181f2ca8301949) ) + ROM_LOAD( "mat00", 0x080000, 0x80000, CRC(fbda0228) SHA1(815d49898d02e699393e370209181f2ca8301949) ) ROM_REGION( 0x40000, "oki", 0 ) /* ADPCM samples */ - ROM_LOAD( "jk03.15h", 0x00000, 0x20000, CRC(69a0eaf7) SHA1(05038e82ee03106625f05082fe9912e16be181ee) ) + ROM_LOAD( "jk03.15h", 0x00000, 0x20000, CRC(69a0eaf7) SHA1(05038e82ee03106625f05082fe9912e16be181ee) ) ROM_END ROM_START( funkyjetj ) @@ -359,10 +359,10 @@ ROM_START( funkyjetj ) ROM_REGION( 0x100000, "gfx2", 0 ) ROM_LOAD( "mat01", 0x000000, 0x80000, CRC(24093a8d) SHA1(71f76ddd8a4b6e05ceb2fff4e20b6edb5e011e79) ) /* sprites */ - ROM_LOAD( "mat00", 0x080000, 0x80000, CRC(fbda0228) SHA1(815d49898d02e699393e370209181f2ca8301949) ) + ROM_LOAD( "mat00", 0x080000, 0x80000, CRC(fbda0228) SHA1(815d49898d02e699393e370209181f2ca8301949) ) ROM_REGION( 0x40000, "oki", 0 ) /* ADPCM samples */ - ROM_LOAD( "jk03.15h", 0x00000, 0x20000, CRC(69a0eaf7) SHA1(05038e82ee03106625f05082fe9912e16be181ee) ) + ROM_LOAD( "jk03.15h", 0x00000, 0x20000, CRC(69a0eaf7) SHA1(05038e82ee03106625f05082fe9912e16be181ee) ) ROM_END ROM_START( sotsugyo ) @@ -378,10 +378,10 @@ ROM_START( sotsugyo ) ROM_REGION( 0x100000, "gfx2", 0 ) ROM_LOAD( "01.4a", 0x000000, 0x80000, CRC(fa10dd54) SHA1(5dfe66df0bbab5eb151bf65f7e767a2325a50b36) ) /* sprites */ - ROM_LOAD( "00.2a", 0x080000, 0x80000, CRC(d35a14ef) SHA1(b8d27766db7e183aee208c690364e4383f3c6882) ) + ROM_LOAD( "00.2a", 0x080000, 0x80000, CRC(d35a14ef) SHA1(b8d27766db7e183aee208c690364e4383f3c6882) ) ROM_REGION( 0x40000, "oki", 0 ) /* ADPCM samples */ - ROM_LOAD( "sb030.15h", 0x00000, 0x20000, CRC(1ea43f48) SHA1(74cc8c740f1c7fa94c2cb460ea4ee7aa0c490ed7) ) + ROM_LOAD( "sb030.15h", 0x00000, 0x20000, CRC(1ea43f48) SHA1(74cc8c740f1c7fa94c2cb460ea4ee7aa0c490ed7) ) ROM_END static DRIVER_INIT( funkyjet ) diff --git a/src/mame/drivers/fuukifg2.c b/src/mame/drivers/fuukifg2.c index 52bb8b42585..f56c5c38e6b 100644 --- a/src/mame/drivers/fuukifg2.c +++ b/src/mame/drivers/fuukifg2.c @@ -108,7 +108,7 @@ static WRITE8_HANDLER( fuuki16_sound_rombank_w ) if (data <= 2) memory_set_bank(space->machine, "bank1", data); else - logerror("CPU #1 - PC %04X: unknown bank bits: %02X\n", cpu_get_pc(space->cpu), data); + logerror("CPU #1 - PC %04X: unknown bank bits: %02X\n", cpu_get_pc(space->cpu), data); } static WRITE8_DEVICE_HANDLER( fuuki16_oki_banking_w ) diff --git a/src/mame/drivers/gaelco2.c b/src/mame/drivers/gaelco2.c index 4c3bb4f6352..a01765ecba8 100644 --- a/src/mame/drivers/gaelco2.c +++ b/src/mame/drivers/gaelco2.c @@ -151,7 +151,7 @@ INPUT_PORTS_END static const gaelcosnd_interface maniacsq_snd_interface = { - "gfx1", /* memory region */ + "gfx1", /* memory region */ { 0*0x0080000, 1*0x0080000, 0, 0 }, /* start of each ROM bank */ }; @@ -219,7 +219,7 @@ static ADDRESS_MAP_START( bang_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x202890, 0x2028ff) AM_DEVREADWRITE("gaelco", gaelcosnd_r, gaelcosnd_w) AM_BASE(&gaelco_sndregs) /* Sound Registers */ AM_RANGE(0x200000, 0x20ffff) AM_RAM_WRITE(gaelco2_vram_w) AM_BASE_SIZE_GENERIC(spriteram) /* Video RAM */ AM_RANGE(0x210000, 0x211fff) AM_RAM_WRITE(gaelco2_palette_w) AM_BASE_GENERIC(paletteram) /* Palette */ - AM_RANGE(0x218004, 0x218009) AM_READONLY /* Video Registers */ + AM_RANGE(0x218004, 0x218009) AM_READONLY /* Video Registers */ AM_RANGE(0x218004, 0x218007) AM_WRITEONLY AM_BASE(&gaelco2_vregs) /* Video Registers */ AM_RANGE(0x218008, 0x218009) AM_WRITENOP /* CLR INT Video */ AM_RANGE(0x300000, 0x300001) AM_READ_PORT("P1") @@ -270,7 +270,7 @@ INPUT_PORTS_END static const gaelcosnd_interface bang_snd_interface = { - "gfx1", /* memory region */ + "gfx1", /* memory region */ { 0*0x0200000, 1*0x0200000, 2*0x0200000, 3*0x0200000 } /* start of each ROM bank */ }; @@ -527,7 +527,7 @@ INPUT_PORTS_END static const gaelcosnd_interface alighunt_snd_interface = { - "gfx1", /* memory region */ + "gfx1", /* memory region */ { 0*0x0400000, 1*0x0400000, 2*0x0400000, 3*0x0400000 } /* start of each ROM bank */ }; @@ -770,7 +770,7 @@ INPUT_PORTS_END static const gaelcosnd_interface touchgo_snd_interface = { - "gfx1", /* memory region */ + "gfx1", /* memory region */ { 0*0x0400000, 1*0x0400000, 0, 0 } /* start of each ROM bank */ }; @@ -963,7 +963,7 @@ INPUT_PORTS_END static const gaelcosnd_interface snowboar_snd_interface = { - "gfx1", /* memory region */ + "gfx1", /* memory region */ { 0*0x0400000, 1*0x0400000, 0, 0 } /* start of each ROM bank */ }; @@ -1359,22 +1359,22 @@ ROM_START( wrally2 ) ROM_LOAD16_BYTE( "wr2.63", 0x000001, 0x080000, CRC(94887c9f) SHA1(ad09f1fbeff4c3ba47f72346d261b22fa6a51457) ) ROM_REGION( 0x0a00000, "gfx1", 0 ) /* GFX + Sound */ - ROM_LOAD( "wr2.16d", 0x0000000, 0x0080000, CRC(ad26086b) SHA1(487ffaaca57c9d030fc486b8cae6735ee40a0ac3) ) /* GFX only */ - ROM_LOAD( "wr2.17d", 0x0080000, 0x0080000, CRC(c1ec0745) SHA1(a6c3ce9c889e6a53f4155f54d6655825af34a35b) ) /* GFX only */ - ROM_LOAD( "wr2.18d", 0x0100000, 0x0080000, CRC(e3617814) SHA1(9f9514052bb07d7e243f33b11bae409a444b7d9f) ) /* Sound only */ - ROM_LOAD( "wr2.19d", 0x0180000, 0x0080000, CRC(2dae988c) SHA1(a585e10b0e1519b828738b0b90698f8600082250) ) /* Sound only */ - ROM_LOAD( "wr2.09d", 0x0200000, 0x0080000, CRC(372d70c8) SHA1(a6d8419765eab1fa20c6d3ddff9d026adaab5cd9) ) /* GFX only */ - ROM_LOAD( "wr2.10d", 0x0280000, 0x0080000, CRC(5db67eb3) SHA1(faa58dafa26befb3291e5185ee04c39ce3b45b3f) ) /* GFX only */ - ROM_LOAD( "wr2.11d", 0x0300000, 0x0080000, CRC(ae66b97c) SHA1(bd0eba0b1c77864e06a9e136cfd834b35f200683) ) /* Sound only */ - ROM_LOAD( "wr2.12d", 0x0380000, 0x0080000, CRC(6dbdaa95) SHA1(f23df65e3df92d79f7b1e99d611c067a79fc849a) ) /* Sound only */ - ROM_LOAD( "wr2.01d", 0x0400000, 0x0080000, CRC(753a138d) SHA1(b05348af6d25e95208fc39007eb2082b759384e8) ) /* GFX only */ - ROM_LOAD( "wr2.02d", 0x0480000, 0x0080000, CRC(9c2a723c) SHA1(5259c8fa1ad73518e89a8df6e76a565b8f8799e3) ) /* GFX only */ + ROM_LOAD( "wr2.16d", 0x0000000, 0x0080000, CRC(ad26086b) SHA1(487ffaaca57c9d030fc486b8cae6735ee40a0ac3) ) /* GFX only */ + ROM_LOAD( "wr2.17d", 0x0080000, 0x0080000, CRC(c1ec0745) SHA1(a6c3ce9c889e6a53f4155f54d6655825af34a35b) ) /* GFX only */ + ROM_LOAD( "wr2.18d", 0x0100000, 0x0080000, CRC(e3617814) SHA1(9f9514052bb07d7e243f33b11bae409a444b7d9f) ) /* Sound only */ + ROM_LOAD( "wr2.19d", 0x0180000, 0x0080000, CRC(2dae988c) SHA1(a585e10b0e1519b828738b0b90698f8600082250) ) /* Sound only */ + ROM_LOAD( "wr2.09d", 0x0200000, 0x0080000, CRC(372d70c8) SHA1(a6d8419765eab1fa20c6d3ddff9d026adaab5cd9) ) /* GFX only */ + ROM_LOAD( "wr2.10d", 0x0280000, 0x0080000, CRC(5db67eb3) SHA1(faa58dafa26befb3291e5185ee04c39ce3b45b3f) ) /* GFX only */ + ROM_LOAD( "wr2.11d", 0x0300000, 0x0080000, CRC(ae66b97c) SHA1(bd0eba0b1c77864e06a9e136cfd834b35f200683) ) /* Sound only */ + ROM_LOAD( "wr2.12d", 0x0380000, 0x0080000, CRC(6dbdaa95) SHA1(f23df65e3df92d79f7b1e99d611c067a79fc849a) ) /* Sound only */ + ROM_LOAD( "wr2.01d", 0x0400000, 0x0080000, CRC(753a138d) SHA1(b05348af6d25e95208fc39007eb2082b759384e8) ) /* GFX only */ + ROM_LOAD( "wr2.02d", 0x0480000, 0x0080000, CRC(9c2a723c) SHA1(5259c8fa1ad73518e89a8df6e76a565b8f8799e3) ) /* GFX only */ ROM_FILL( 0x0500000, 0x0100000, 0x0 ) /* Empty */ - ROM_LOAD( "wr2.20d", 0x0600000, 0x0080000, CRC(4f7ade84) SHA1(c8efcd4bcb1f2ad6ab8104ec0daea8324cefd3fd) ) /* GFX only */ - ROM_LOAD( "wr2.13d", 0x0680000, 0x0080000, CRC(a4cd32f8) SHA1(bc4cc73b7a58aecd735bf55bb5062baa6dd22f83) ) /* GFX only */ + ROM_LOAD( "wr2.20d", 0x0600000, 0x0080000, CRC(4f7ade84) SHA1(c8efcd4bcb1f2ad6ab8104ec0daea8324cefd3fd) ) /* GFX only */ + ROM_LOAD( "wr2.13d", 0x0680000, 0x0080000, CRC(a4cd32f8) SHA1(bc4cc73b7a58aecd735bf55bb5062baa6dd22f83) ) /* GFX only */ ROM_FILL( 0x0700000, 0x0100000, 0x0 ) /* Empty */ - ROM_LOAD( "wr2.21d", 0x0800000, 0x0080000, CRC(899b0583) SHA1(a313e679980cc4da22bc70f2c7c9685af4f3d6df) ) /* GFX only */ - ROM_LOAD( "wr2.14d", 0x0880000, 0x0080000, CRC(6eb781d5) SHA1(d5c13db88e6de606b34805391cef9f3fbf09fac4) ) /* GFX only */ + ROM_LOAD( "wr2.21d", 0x0800000, 0x0080000, CRC(899b0583) SHA1(a313e679980cc4da22bc70f2c7c9685af4f3d6df) ) /* GFX only */ + ROM_LOAD( "wr2.14d", 0x0880000, 0x0080000, CRC(6eb781d5) SHA1(d5c13db88e6de606b34805391cef9f3fbf09fac4) ) /* GFX only */ ROM_FILL( 0x0900000, 0x0100000, 0x0 ) /* Empty */ ROM_END diff --git a/src/mame/drivers/gaelco3d.c b/src/mame/drivers/gaelco3d.c index d7b0e5d431b..d32c220f299 100644 --- a/src/mame/drivers/gaelco3d.c +++ b/src/mame/drivers/gaelco3d.c @@ -642,7 +642,7 @@ static void adsp_tx_callback(const device_config *device, int port, INT32 data) /* now put it down to samples, so we know what the channel frequency has to be */ sample_period = attotime_mul(sample_period, 16 * SOUND_CHANNELS); - dmadac_set_frequency(&dmadac[0], SOUND_CHANNELS, ATTOSECONDS_TO_HZ(sample_period.attoseconds)); + dmadac_set_frequency(&dmadac[0], SOUND_CHANNELS, ATTOSECONDS_TO_HZ(sample_period.attoseconds)); dmadac_enable(&dmadac[0], SOUND_CHANNELS, 1); /* fire off a timer wich will hit every half-buffer */ diff --git a/src/mame/drivers/galaga.c b/src/mame/drivers/galaga.c index 65c13cd15c3..2cae290f647 100644 --- a/src/mame/drivers/galaga.c +++ b/src/mame/drivers/galaga.c @@ -1045,7 +1045,7 @@ static INPUT_PORTS_START( bosco ) PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:3") PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:4") + PORT_DIPNAME( 0x08, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:4") PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_DIPNAME( 0x10, 0x10, "Freeze" ) PORT_DIPLOCATION("SW1:5") diff --git a/src/mame/drivers/galastrm.c b/src/mame/drivers/galastrm.c index a0a7f7054fd..2be37b978fd 100644 --- a/src/mame/drivers/galastrm.c +++ b/src/mame/drivers/galastrm.c @@ -179,7 +179,7 @@ static WRITE32_HANDLER( galastrm_adstick_ctrl_w ) static ADDRESS_MAP_START( galastrm_map, ADDRESS_SPACE_PROGRAM, 32 ) AM_RANGE(0x000000, 0x0fffff) AM_ROM - AM_RANGE(0x200000, 0x21ffff) AM_RAM AM_BASE(&galastrm_ram) /* main CPUA ram */ + AM_RANGE(0x200000, 0x21ffff) AM_RAM AM_BASE(&galastrm_ram) /* main CPUA ram */ AM_RANGE(0x300000, 0x303fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram) AM_RANGE(0x400000, 0x400003) AM_READ_PORT("IN0") AM_RANGE(0x400004, 0x400007) AM_READ_PORT("IN1") diff --git a/src/mame/drivers/galaxian.c b/src/mame/drivers/galaxian.c index 8e972f56cbc..0ba099ae625 100644 --- a/src/mame/drivers/galaxian.c +++ b/src/mame/drivers/galaxian.c @@ -1112,7 +1112,7 @@ static const ppi8255_interface moonwar_ppi8255_0_intf = DEVCB_INPUT_PORT("IN2"), /* Port C read */ DEVCB_NULL, /* Port A write */ DEVCB_NULL, /* Port B write */ - DEVCB_HANDLER(moonwar_port_select_w) /* Port C write */ + DEVCB_HANDLER(moonwar_port_select_w) /* Port C write */ }; diff --git a/src/mame/drivers/galaxold.c b/src/mame/drivers/galaxold.c index 36defed7ce6..555c039a461 100644 --- a/src/mame/drivers/galaxold.c +++ b/src/mame/drivers/galaxold.c @@ -924,14 +924,14 @@ static INPUT_PORTS_START( scramb2 ) PORT_START("IN0") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_COCKTAIL PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN2 ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_START("IN1") PORT_DIPNAME( 0x03, 0x00, DEF_STR( Lives ) ) diff --git a/src/mame/drivers/galdrvr.c b/src/mame/drivers/galdrvr.c index 4d21f2069ac..871f0872390 100644 --- a/src/mame/drivers/galdrvr.c +++ b/src/mame/drivers/galdrvr.c @@ -1166,7 +1166,7 @@ static INPUT_PORTS_START( skybase ) PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_MODIFY("IN1") - PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Coinage ) ) + PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Coinage ) ) PORT_DIPSETTING( 0x80, "1C/1C (2 to start)" ) PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) PORT_DIPSETTING( 0x40, DEF_STR( 1C_2C ) ) @@ -1364,7 +1364,7 @@ static INPUT_PORTS_START( dingo ) PORT_DIPSETTING( 0x01, DEF_STR( Easy ) ) PORT_DIPSETTING( 0x02, DEF_STR( Hard ) ) PORT_DIPSETTING( 0x03, DEF_STR( Hardest ) ) - PORT_DIPNAME( 0x04, 0x00, DEF_STR( Lives ) ) + PORT_DIPNAME( 0x04, 0x00, DEF_STR( Lives ) ) PORT_DIPSETTING( 0x00, "3" ) PORT_DIPSETTING( 0x04, "4" ) PORT_DIPNAME( 0x08, 0x00, DEF_STR( Bonus_Life ) ) @@ -3204,9 +3204,9 @@ ROM_END ROM_START( gteikokb ) ROM_REGION( 0x4000, "maincpu", 0 ) ROM_LOAD( "1.bin", 0x0000, 0x0800, CRC(bf00252f) SHA1(a4ec48c6b9468f52bcf8b01d1bdb908dcf81d42d) ) - ROM_LOAD( "2.bin", 0x0800, 0x0800, CRC(f712b7d5) SHA1(c269db2e9984a3fbd33888bd426c53d319cad36f) ) + ROM_LOAD( "2.bin", 0x0800, 0x0800, CRC(f712b7d5) SHA1(c269db2e9984a3fbd33888bd426c53d319cad36f) ) ROM_LOAD( "k07_3a.bin", 0x1000, 0x0800, CRC(945f4160) SHA1(5fbe879f51e14c4c7ae551e5b3089f8e148770a4) ) - ROM_LOAD( "4.bin", 0x1800, 0x0800, CRC(808a39a8) SHA1(f3db5175d0c2d10e9e3ded400888f6541490597e) ) + ROM_LOAD( "4.bin", 0x1800, 0x0800, CRC(808a39a8) SHA1(f3db5175d0c2d10e9e3ded400888f6541490597e) ) ROM_LOAD( "5.bin", 0x2000, 0x0800, CRC(36fe6e67) SHA1(e54a19ad6611fefcdfcf74019a63cc6cea6cf433) ) ROM_LOAD( "6.bin", 0x2800, 0x0800, CRC(c5ea67e8) SHA1(0157eb2ef5ab56cd00e5f4fafd618271d2d4862b) ) ROM_LOAD( "m08p_7a.bin", 0x3000, 0x0800, CRC(c9245346) SHA1(239bad3fe64eaab2dfc3febd06d1124103a10504) ) @@ -3509,7 +3509,7 @@ ROM_END ROM_START( batman2 ) /* wasn't marked as artic multi-system, but it's basically the same as the above phoenixp2 */ ROM_REGION( 0x4000, "maincpu", 0 ) - ROM_LOAD( "01.bin", 0x0000, 0x0800, CRC(150fbca5) SHA1(a5dc104169eb3225c6200e7e07102f8a9bee6861) ) + ROM_LOAD( "01.bin", 0x0000, 0x0800, CRC(150fbca5) SHA1(a5dc104169eb3225c6200e7e07102f8a9bee6861) ) ROM_LOAD( "02.bin", 0x0800, 0x0800, CRC(b1624fd0) SHA1(ca4678cf7a8b935be2f68d6e342c1f961bf6f1a2) ) ROM_LOAD( "03.bin", 0x1000, 0x0800, CRC(93774188) SHA1(8bdd3290db43459c56b932b582f555d89df30bd1) ) ROM_LOAD( "04.bin", 0x1800, 0x0800, CRC(8a94ec6c) SHA1(dacadab9a05ddee2de188b368f795d74213e020d) ) @@ -3559,7 +3559,7 @@ ROM_START( tenspot ) ROM_LOAD( "svt2-a.a2", 0x1000, 0x1000, CRC(847c16d0) SHA1(7ac65e5f47153f7e1e70c701b16d537774f60982) ) ROM_LOAD( "svt3-a.a3", 0x2000, 0x1000, CRC(63a6990b) SHA1(901772e2ed8536c3031a66204889e1cac60011c5) ) - ROM_REGION( 0x2000, "game_0_temp", 0 ) + ROM_REGION( 0x2000, "game_0_temp", 0 ) ROM_LOAD( "syt5-a.a5", 0x0000, 0x1000, CRC(7f804605) SHA1(898f7de488ca79b5b29dbdb93233c63ed20df354) ) ROM_LOAD( "svt5-a.a6", 0x1000, 0x1000, CRC(fff07c86) SHA1(a37034fb7fcf60ee5f098d405ee3277616c8aceb) ) @@ -3573,7 +3573,7 @@ ROM_START( tenspot ) ROM_LOAD( "mct3-a.b3", 0x2000, 0x1000, CRC(6d19c439) SHA1(39a5d78c7d42981e1fa12bc6c794b915f738faf7) ) ROM_LOAD( "mct4-a.b4", 0x3000, 0x1000, CRC(dd029a6e) SHA1(e6035a6981e22565a2af3a3ecac16676cb3b3500) ) - ROM_REGION( 0x2000, "game_1_temp", 0 ) + ROM_REGION( 0x2000, "game_1_temp", 0 ) ROM_LOAD( "mct5-a.b5", 0x0000, 0x1000, CRC(ac1a6a62) SHA1(febfcdbf1afe9a5352d8d96b454a6c8fc7818ef0) ) ROM_LOAD( "mct6-a.b6", 0x1000, 0x1000, CRC(dc19ec73) SHA1(19a3295597a8eff2587ff838a3b8f7e3817f22f0) ) @@ -3586,7 +3586,7 @@ ROM_START( tenspot ) ROM_LOAD( "sct2-a.c2", 0x1000, 0x1000, CRC(96013308) SHA1(756ad5592acbe68c923a810eba2ff4eda4a9a51c) ) ROM_LOAD( "sct3-a.c3", 0x2000, 0x1000, CRC(3c6ef851) SHA1(a2c5dd8cca60b7340c9c3973137415621f5b1a11) ) - ROM_REGION( 0x2000, "game_2_temp", 0 ) + ROM_REGION( 0x2000, "game_2_temp", 0 ) ROM_LOAD( "sct5-a.c5", 0x0000, 0x1000, CRC(272a0037) SHA1(48dcb9da66db75721668c3708ed1a55a0ee65238) ) ROM_LOAD( "sct6-a.c6", 0x1000, 0x1000, CRC(d6b35f01) SHA1(e16a7400901e2b0ad4ce70dce8092741d85b6a43) ) @@ -3599,7 +3599,7 @@ ROM_START( tenspot ) ROM_LOAD( "mrt2-a.d2", 0x1000, 0x1000, CRC(e4ba463a) SHA1(b5370bc33275f6aa52c96304db4be086b5f6d18c) ) ROM_LOAD( "mrt3-a.d3", 0x2000, 0x1000, CRC(62d7b1ce) SHA1(5243d053ea53dcfe4110fdf04077e818237121c8) ) - ROM_REGION( 0x2000, "game_3_temp", 0 ) + ROM_REGION( 0x2000, "game_3_temp", 0 ) ROM_LOAD( "mrt5-a.d5", 0x0000, 0x1000, CRC(cc6bb4bc) SHA1(f81f671d2865a43849f10a48c0cc9f6c5bbe0f9e) ) ROM_LOAD( "mrt6-a.d6", 0x1000, 0x1000, CRC(4b4e6c62) SHA1(86ea8436d631a30461f0ba708c0b597f15ebdd47) ) @@ -3613,7 +3613,7 @@ ROM_START( tenspot ) ROM_LOAD( "uwt3-a.e3", 0x2000, 0x1000, CRC(9abd1570) SHA1(74f82ac2c3a1822f1e5575e7e72c017d24c43dc1) ) ROM_LOAD( "uwt4-b.e4", 0x3000, 0x1000, CRC(daea5232) SHA1(cdb2a1a14188e971e2c98c625e0b577f688a753a) ) - ROM_REGION( 0x2000, "game_4_temp", 0 ) + ROM_REGION( 0x2000, "game_4_temp", 0 ) ROM_LOAD( "uwt5-a.e5", 0x0000, 0x1000, CRC(49a1c892) SHA1(b6b1be0d8fa6909ed8e6f36d3f75dadd8f5cafbe) ) ROM_LOAD( "uwt6-a.e6", 0x1000, 0x1000, CRC(9d27e53d) SHA1(ef41c8b586545207a0e2021c8634df4ffe4b7b8a) ) @@ -3627,21 +3627,21 @@ ROM_START( tenspot ) ROM_LOAD( "bmt3-a.f3", 0x2000, 0x1000, CRC(34c0728d) SHA1(54f76368a387b42010258fa549465a430dd6ecf7) ) ROM_LOAD( "bmt4-a.f4", 0x3000, 0x1000, CRC(fc2e8de1) SHA1(683815035054669a845ce440d66c023cf54dbdcc) ) - ROM_REGION( 0x2000, "game_5_temp", 0 ) + ROM_REGION( 0x2000, "game_5_temp", 0 ) ROM_LOAD( "bmt5-a.f5", 0x0000, 0x1000, CRC(ee71a2de) SHA1(c41b8c705ec697ab2a37fbde0fc2bbcd3259ec98) ) ROM_LOAD( "bmt6-a.f6", 0x1000, 0x1000, CRC(ea538ab9) SHA1(310052358fca96bba5b69366f7bd47c446287783) ) - ROM_REGION( 0x0020, "game_5_prom", 0 ) + ROM_REGION( 0x0020, "game_5_prom", 0 ) ROM_LOAD( "clr1.f7", 0x0000, 0x0020, CRC(4e3caeab) SHA1(a25083c3e36d28afdefe4af6e6d4f3155e303625) ) /* Game H - Defend UFO */ - ROM_REGION( 0x4000, "game_6_cpu", 0 ) + ROM_REGION( 0x4000, "game_6_cpu", 0 ) ROM_LOAD( "rut1-a.h1", 0x0000, 0x1000, CRC(364b0689) SHA1(d39c1ca5774b21c9e045f2234c2256f56ff36a2a) ) ROM_LOAD( "rut2-a.h2", 0x1000, 0x1000, CRC(ed448821) SHA1(33c983b8cfa17299728363870f906477bce14dbf) ) ROM_LOAD( "rut3-a.h3", 0x2000, 0x1000, CRC(312d5d37) SHA1(772a5e7ea94dd6b9744f4eef7d7ac26cb58d58ab) ) ROM_LOAD( "rut4-a.h4", 0x3000, 0x1000, CRC(2281b279) SHA1(c6cfb14b6656de185f38a5c73cf042f2f8b4cc6e) ) - ROM_REGION( 0x2000, "game_6_temp", 0 ) + ROM_REGION( 0x2000, "game_6_temp", 0 ) ROM_LOAD( "rut5-a.h5", 0x0000, 0x1000, CRC(6fb16866) SHA1(e1a1ac17ef9c08ac2f4c7b15a13932f542aed95d) ) ROM_LOAD( "rut6-a.h6", 0x1000, 0x1000, CRC(5ae0dc50) SHA1(d4ec2179d5181b71171bac5098a6f7f1c96e63b3) ) @@ -3654,11 +3654,11 @@ ROM_START( tenspot ) ROM_LOAD( "kbt2-a.j2", 0x1000, 0x1000, CRC(3652c64b) SHA1(7cb2a51e1830d48d5d3a62d521dfef1779dd5222) ) ROM_LOAD( "kbt3-a.j3", 0x2000, 0x1000, CRC(946447c6) SHA1(0759f7d8b538d5e489a85bc6551cde76e6b3ed71) ) - ROM_REGION( 0x2000, "game_7_temp", 0 ) + ROM_REGION( 0x2000, "game_7_temp", 0 ) ROM_LOAD( "kbt5-a.j5", 0x0000, 0x1000, CRC(ea36f825) SHA1(20e26c97d780fb1fd15ad4c33c097a5b3539d43d) ) ROM_LOAD( "kbt6-a.j6", 0x1000, 0x1000, CRC(2b8b46bc) SHA1(48a7a65fc5c174d0cc654557b3a1166df7fea4da) ) - ROM_REGION( 0x0020, "game_7_prom", 0 ) + ROM_REGION( 0x0020, "game_7_prom", 0 ) ROM_LOAD( "clr1.j7", 0x0000, 0x0020, CRC(4e3caeab) SHA1(a25083c3e36d28afdefe4af6e6d4f3155e303625) ) /* Game K - Omega (The End) */ @@ -3667,11 +3667,11 @@ ROM_START( tenspot ) ROM_LOAD( "omt2-a.k2", 0x1000, 0x1000, CRC(a3073430) SHA1(200b15c572d7cff9be39439a247c9be742f17a61) ) ROM_LOAD( "omt3-a.k3", 0x2000, 0x1000, CRC(b0de1fa2) SHA1(71cf8303b7ddc5813d6b92a71bd53f83272f5f22) ) - ROM_REGION( 0x2000, "game_8_temp", 0 ) + ROM_REGION( 0x2000, "game_8_temp", 0 ) ROM_LOAD( "omt5-a.k5", 0x0000, 0x1000, CRC(5ab402c8) SHA1(c0640d9907d7dcd34cd7105d21b99fc15fcbac6e) ) ROM_LOAD( "omt6-a.k6", 0x1000, 0x1000, CRC(2552e470) SHA1(ba5fba8047e4bb23442b0c2d45c858ec9da63945) ) - ROM_REGION( 0x0020, "game_8_prom", 0 ) + ROM_REGION( 0x0020, "game_8_prom", 0 ) ROM_LOAD( "clr1.k7", 0x0000, 0x0020, CRC(4e3caeab) SHA1(a25083c3e36d28afdefe4af6e6d4f3155e303625) ) /* Game L - Battle of Atlantis */ @@ -3681,24 +3681,24 @@ ROM_START( tenspot ) ROM_LOAD( "bat3-a.l3", 0x2000, 0x1000, CRC(81270ace) SHA1(0385fedacbbda4ed750c5a64d51a60ed98c3ed65) ) ROM_LOAD( "bat4-a.l4", 0x3000, 0x1000, CRC(bd751ba9) SHA1(dbdc8972b0236755d5a8ea90e2de2d16585f5e02) ) - ROM_REGION( 0x2000, "game_9_temp", 0 ) + ROM_REGION( 0x2000, "game_9_temp", 0 ) ROM_LOAD( "bat5-a.l5", 0x0000, 0x1000, CRC(b9701513) SHA1(d8bc7b36a6d0b1e73aa7b6a5dab7b36ce111a04c) ) ROM_LOAD( "bat6-a.l6", 0x1000, 0x1000, CRC(54b423b7) SHA1(31eec49b4e9c8b56668b9037dd47e66659ce64cb) ) - ROM_REGION( 0x0020, "game_9_prom", 0 ) + ROM_REGION( 0x0020, "game_9_prom", 0 ) ROM_LOAD( "clr1.l7", 0x0000, 0x0020, CRC(4e3caeab) SHA1(a25083c3e36d28afdefe4af6e6d4f3155e303625) ) - ROM_REGION( 0x4000, "selectcpu", 0 ) // probably related to game selection + ROM_REGION( 0x4000, "selectcpu", 0 ) // probably related to game selection ROM_LOAD( "tenu2-d.u2", 0x0000, 0x800, CRC(58c7fe3b) SHA1(a4faa8e669a81fe01696d6df9c8ebd5c17be0f00) ) - ROM_REGION( 0x4000, "unknown", 0 ) // ?? no idea + ROM_REGION( 0x4000, "unknown", 0 ) // ?? no idea ROM_LOAD( "u1.u1", 0x0000, 0x100, CRC(f18006f7) SHA1(f9a3541cd7f2b75816227d8befc03d2e33eeebac) ) /* temporary - replace game_x with the game number you want to test. */ ROM_REGION( 0x4000, "maincpu", ROMREGION_ERASEFF ) - ROM_REGION( 0x2000, "gfx1", ROMREGION_ERASEFF ) + ROM_REGION( 0x2000, "gfx1", ROMREGION_ERASEFF ) ROM_REGION( 0x2000, "gfx2", ROMREGION_ERASEFF ) ROM_REGION( 0x0020, "proms", ROMREGION_ERASEFF ) ROM_END @@ -3737,7 +3737,7 @@ ROM_START( mooncrstu ) ROM_LOAD( "smc2f", 0x0800, 0x0800, CRC(410ab430) SHA1(d89abff6ac4afbf69377a1d63043d629a634aab7) ) ROM_LOAD( "smc3f", 0x1000, 0x0800, CRC(a6b4144b) SHA1(2b27ad54d716286c0dc9476d47df182ae01bcfd7) ) ROM_LOAD( "smc4f", 0x1800, 0x0800, CRC(4cc046fe) SHA1(465eaacd50967d768babadd09ab9cad35380f6bf) ) - ROM_LOAD( "e5", 0x2000, 0x0800, CRC(06d378a6) SHA1(99dbe9fc7f95f8fdce86eb5c32bd1ca1bea0ca3c) ) + ROM_LOAD( "e5", 0x2000, 0x0800, CRC(06d378a6) SHA1(99dbe9fc7f95f8fdce86eb5c32bd1ca1bea0ca3c) ) ROM_LOAD( "bepr199", 0x2800, 0x0800, CRC(6e84a927) SHA1(82e8e825d157c3c947a3a222bca059a735169c7d) ) ROM_LOAD( "e7", 0x3000, 0x0800, CRC(b45af1e8) SHA1(d7020774707234acdaef5c655f667d5ee9e54a13) ) ROM_LOAD( "smc8f", 0x3800, 0x0800, CRC(f42164c5) SHA1(e0d1680f193889568edf005786e2767d4fb086f4) ) @@ -4259,20 +4259,20 @@ ROM_END ROM_START( levers ) ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD( "g96059.a8", 0x0000, 0x1000, CRC(9550627a) SHA1(3da9a614622d5b880852fe2bb2e8e4a60afb2d34) ) - ROM_LOAD( "g96060.d8", 0x2000, 0x1000, CRC(5ac64646) SHA1(459755932a033095eff72d78d1e916932964c5cc) ) - ROM_LOAD( "g96061.e8", 0x3000, 0x1000, CRC(9db8e520) SHA1(1ff10e221e45cc4afb77571a171937f8501aa509) ) - ROM_LOAD( "g96062.h8", 0x8000, 0x1000, CRC(7c8e8b3a) SHA1(ad281f801e818ea529be8ec43096212e834f69ef) ) - ROM_LOAD( "g96063.j8", 0x9000, 0x1000, CRC(fa61e793) SHA1(7aad77f3de05a7bd3dcb0c9c97a3cccd1136f352) ) - ROM_LOAD( "g96064.l8", 0xa000, 0x1000, CRC(f797f389) SHA1(b961f0506defa9884ac47b2316884318e1e90bff) ) + ROM_LOAD( "g96059.a8", 0x0000, 0x1000, CRC(9550627a) SHA1(3da9a614622d5b880852fe2bb2e8e4a60afb2d34) ) + ROM_LOAD( "g96060.d8", 0x2000, 0x1000, CRC(5ac64646) SHA1(459755932a033095eff72d78d1e916932964c5cc) ) + ROM_LOAD( "g96061.e8", 0x3000, 0x1000, CRC(9db8e520) SHA1(1ff10e221e45cc4afb77571a171937f8501aa509) ) + ROM_LOAD( "g96062.h8", 0x8000, 0x1000, CRC(7c8e8b3a) SHA1(ad281f801e818ea529be8ec43096212e834f69ef) ) + ROM_LOAD( "g96063.j8", 0x9000, 0x1000, CRC(fa61e793) SHA1(7aad77f3de05a7bd3dcb0c9c97a3cccd1136f352) ) + ROM_LOAD( "g96064.l8", 0xa000, 0x1000, CRC(f797f389) SHA1(b961f0506defa9884ac47b2316884318e1e90bff) ) ROM_REGION( 0x3000, "gfx1", 0 ) - ROM_LOAD( "g95948.n1", 0x0000, 0x0800, CRC(d8a0c692) SHA1(dd64623f4072bcb8c528b5b7b95a7bd858b79d6c) ) + ROM_LOAD( "g95948.n1", 0x0000, 0x0800, CRC(d8a0c692) SHA1(dd64623f4072bcb8c528b5b7b95a7bd858b79d6c) ) /*0x0800- 0x0fff empty */ - ROM_LOAD( "g95949.s1", 0x1000, 0x0800, CRC(3660a552) SHA1(bebfd30f90da55d6d42945717b9b38d5b0c9623a) ) - ROM_LOAD( "g95946.j1", 0x1800, 0x0800, CRC(73b61b2d) SHA1(fdb75eea1778daa6f9c48243361e418044b471f8) ) + ROM_LOAD( "g95949.s1", 0x1000, 0x0800, CRC(3660a552) SHA1(bebfd30f90da55d6d42945717b9b38d5b0c9623a) ) + ROM_LOAD( "g95946.j1", 0x1800, 0x0800, CRC(73b61b2d) SHA1(fdb75eea1778daa6f9c48243361e418044b471f8) ) /*0x2000- 0x27ff empty */ - ROM_LOAD( "g95947.m1", 0x2800, 0x0800, CRC(72ff67e2) SHA1(dcc12f17a857271c253d06d5ac170b9d6bb6a2bd) ) + ROM_LOAD( "g95947.m1", 0x2800, 0x0800, CRC(72ff67e2) SHA1(dcc12f17a857271c253d06d5ac170b9d6bb6a2bd) ) ROM_REGION( 0x0020, "proms", 0 ) ROM_LOAD( "g960lev.clr", 0x0000, 0x0020, CRC(01febbbe) SHA1(11b1dab7983ba29e830ccb7f14eb1a99465c9e81) ) @@ -5483,7 +5483,7 @@ ROM_START( superbon ) ROM_LOAD( "2m.cpu", 0x6000, 0x1000, CRC(3ed0337e) SHA1(975b93aee851867e335614419aa6db16fbf8063f) ) ROM_REGION( 0x10000, "audiocpu", 0 ) - ROM_LOAD( "5c", 0x0000, 0x0800, CRC(b899be2a) SHA1(9b343a682531255104db61177a43ad933c3af34e) ) + ROM_LOAD( "5c", 0x0000, 0x0800, CRC(b899be2a) SHA1(9b343a682531255104db61177a43ad933c3af34e) ) ROM_LOAD( "5d.snd", 0x0800, 0x0800, CRC(80640a04) SHA1(83f2bafcfa5737441194d3058a76b2582317cfcb) ) ROM_REGION( 0x1000, "gfx1", 0 ) diff --git a/src/mame/drivers/galpani2.c b/src/mame/drivers/galpani2.c index 8e2d02ce6e6..a806a79c6d2 100644 --- a/src/mame/drivers/galpani2.c +++ b/src/mame/drivers/galpani2.c @@ -689,11 +689,11 @@ Custom ICs - 10x PQFPs ***************************************************************************/ ROM_START( galpani2 ) - ROM_REGION( 0x100000, "maincpu", 0 ) /* CPU#1 Code */ + ROM_REGION( 0x100000, "maincpu", 0 ) /* CPU#1 Code */ ROM_LOAD16_BYTE( "g000a2.u165-1", 0x000000, 0x080000, CRC(0c6dfe3f) SHA1(22b16eaa3fee7f8f8434c6775255b25c8d960620) ) ROM_LOAD16_BYTE( "g001a2.u164-1", 0x000001, 0x080000, CRC(b3a5951f) SHA1(78cf2d85a8b3cd46c5e30fd13b474af2ed2ee09b) ) - ROM_REGION( 0x40000, "sub", 0 ) /* CPU#2 Code */ + ROM_REGION( 0x40000, "sub", 0 ) /* CPU#2 Code */ ROM_LOAD16_BYTE( "g002a2.u64-1", 0x000000, 0x020000, CRC(c0b94eaf) SHA1(4f3a65b238b31ee8d256b7025253f01eaf6e55d5) ) ROM_LOAD16_BYTE( "g003a2.u63-1", 0x000001, 0x020000, CRC(0d30725d) SHA1(d4614f9ffb930c4ea36cb3fbacffe63060e92402) ) @@ -735,11 +735,11 @@ ROM_START( galpani2 ) ROM_END ROM_START( galpani2g ) - ROM_REGION( 0x100000, "maincpu", 0 ) /* CPU#1 Code */ + ROM_REGION( 0x100000, "maincpu", 0 ) /* CPU#1 Code */ ROM_LOAD16_BYTE( "g000g1.u133-0", 0x000000, 0x080000, CRC(5a9c4886) SHA1(6fbc443612e72bafc5cac30de78c72815db20c4c) ) ROM_LOAD16_BYTE( "g001g1.u134-0", 0x000001, 0x080000, CRC(c92937c3) SHA1(0c9e894c0e23e319bd2d01ec573f02ed510e3ed6) ) - ROM_REGION( 0x40000, "sub", 0 ) /* CPU#2 Code */ + ROM_REGION( 0x40000, "sub", 0 ) /* CPU#2 Code */ ROM_LOAD16_BYTE( "g002t1.125", 0x000000, 0x020000, CRC(a3034e1c) SHA1(493e4be36f2aea0083d5d37e16486ed66dab952e) ) ROM_LOAD16_BYTE( "g003t1.126", 0x000001, 0x020000, CRC(20d3a2ad) SHA1(93450e5a23456c242ebf1a3560013a17c6b05354) ) @@ -786,11 +786,11 @@ ROM_START( galpani2g ) ROM_END ROM_START( galpani2t ) - ROM_REGION( 0x100000, "maincpu", 0 ) /* CPU#1 Code */ + ROM_REGION( 0x100000, "maincpu", 0 ) /* CPU#1 Code */ ROM_LOAD16_BYTE( "g000t1.133", 0x000000, 0x080000, CRC(332048e7) SHA1(1a353d4b29f7a08158fc454309dc496df6b5b108) ) ROM_LOAD16_BYTE( "g001t1.134", 0x000001, 0x080000, CRC(c92937c3) SHA1(0c9e894c0e23e319bd2d01ec573f02ed510e3ed6) ) - ROM_REGION( 0x40000, "sub", 0 ) /* CPU#2 Code */ + ROM_REGION( 0x40000, "sub", 0 ) /* CPU#2 Code */ ROM_LOAD16_BYTE( "g002t1.125", 0x000000, 0x020000, CRC(a3034e1c) SHA1(493e4be36f2aea0083d5d37e16486ed66dab952e) ) ROM_LOAD16_BYTE( "g003t1.126", 0x000001, 0x020000, CRC(20d3a2ad) SHA1(93450e5a23456c242ebf1a3560013a17c6b05354) ) diff --git a/src/mame/drivers/galpanic.c b/src/mame/drivers/galpanic.c index 4dcd9deebb6..cfc5877491a 100644 --- a/src/mame/drivers/galpanic.c +++ b/src/mame/drivers/galpanic.c @@ -876,7 +876,7 @@ GFXDECODE_END static const kaneko_pandora_interface galpanic_pandora_config = { "screen", /* screen tag */ - 0, /* gfx_region */ + 0, /* gfx_region */ 0, -16 /* x_offs, y_offs */ }; diff --git a/src/mame/drivers/gamecstl.c b/src/mame/drivers/gamecstl.c index d7ccc796031..4ca85fe4161 100644 --- a/src/mame/drivers/gamecstl.c +++ b/src/mame/drivers/gamecstl.c @@ -576,7 +576,7 @@ static INPUT_PORTS_START(gamecstl) AT_KEYB_HELPER( 0x0200, "(MF2)Cursor Right", KEYCODE_RIGHT ) /* Right 6a ea */ AT_KEYB_HELPER( 0x0800, "(MF2)Cursor Down", KEYCODE_DOWN ) /* Down 6c ec */ AT_KEYB_HELPER( 0x1000, "(MF2)Page Down", KEYCODE_PGDN ) /* Page Down 6d ed */ - AT_KEYB_HELPER( 0x4000, "Del", KEYCODE_A ) /* Delete 6f ef */ + AT_KEYB_HELPER( 0x4000, "Del", KEYCODE_A ) /* Delete 6f ef */ PORT_START("pc_keyboard_7") INPUT_PORTS_END @@ -692,7 +692,7 @@ static MACHINE_DRIVER_START(gamecstl) MDRV_NVRAM_HANDLER( mc146818 ) - /* video hardware */ + /* video hardware */ MDRV_SCREEN_ADD("screen", RASTER) MDRV_SCREEN_REFRESH_RATE(60) MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) diff --git a/src/mame/drivers/gameplan.c b/src/mame/drivers/gameplan.c index ea61703b74c..797d8d8db29 100644 --- a/src/mame/drivers/gameplan.c +++ b/src/mame/drivers/gameplan.c @@ -1114,17 +1114,17 @@ ROM_END ROM_START( kaos ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "kaosab.g2", 0x9000, 0x0800, CRC(b23d858f) SHA1(e31fa657ace34130211a0b9fc0d115fd89bb20dd) ) - ROM_CONTINUE( 0xd000, 0x0800 ) + ROM_CONTINUE( 0xd000, 0x0800 ) ROM_LOAD( "kaosab.j2", 0x9800, 0x0800, CRC(4861e5dc) SHA1(96ca0b8625af3897bd4a50a45ea964715f9e4973) ) - ROM_CONTINUE( 0xd800, 0x0800 ) + ROM_CONTINUE( 0xd800, 0x0800 ) ROM_LOAD( "kaosab.j1", 0xa000, 0x0800, CRC(e055db3f) SHA1(099176629723c1a9bdc59f440339b2e8c38c3261) ) - ROM_CONTINUE( 0xe000, 0x0800 ) + ROM_CONTINUE( 0xe000, 0x0800 ) ROM_LOAD( "kaosab.g1", 0xa800, 0x0800, CRC(35d7c467) SHA1(6d5bfd29ff7b96fed4b24c899ddd380e47e52bc5) ) - ROM_CONTINUE( 0xe800, 0x0800 ) + ROM_CONTINUE( 0xe800, 0x0800 ) ROM_LOAD( "kaosab.f1", 0xb000, 0x0800, CRC(995b9260) SHA1(580896aa8b6f0618dc532a12d0795b0d03f7cadd) ) - ROM_CONTINUE( 0xf000, 0x0800 ) + ROM_CONTINUE( 0xf000, 0x0800 ) ROM_LOAD( "kaosab.e1", 0xb800, 0x0800, CRC(3da5202a) SHA1(6b5aaf44377415763aa0895c64765a4b82086f25) ) - ROM_CONTINUE( 0xf800, 0x0800 ) + ROM_CONTINUE( 0xf800, 0x0800 ) ROM_REGION( 0x10000, "audiocpu", 0 ) ROM_LOAD( "kaossnd.e1", 0xe000, 0x0800, CRC(ab23d52a) SHA1(505f3e4a56e78a3913010f5484891f01c9831480) ) diff --git a/src/mame/drivers/gaplus.c b/src/mame/drivers/gaplus.c index 3789318da84..df5840a4682 100644 --- a/src/mame/drivers/gaplus.c +++ b/src/mame/drivers/gaplus.c @@ -268,15 +268,15 @@ static INTERRUPT_GEN( gaplus_interrupt_1 ) static ADDRESS_MAP_START( cpu1_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x0000, 0x07ff) AM_READWRITE(gaplus_videoram_r, gaplus_videoram_w) AM_BASE(&gaplus_videoram) /* tilemap RAM (shared with CPU #2) */ AM_RANGE(0x0800, 0x1fff) AM_READWRITE(gaplus_spriteram_r, gaplus_spriteram_w) AM_BASE(&gaplus_spriteram) /* shared RAM with CPU #2 (includes sprite RAM) */ - AM_RANGE(0x6000, 0x63ff) AM_READ(gaplus_snd_sharedram_r) /* shared RAM with CPU #3 */ - AM_RANGE(0x6000, 0x63ff) AM_DEVWRITE("namco", gaplus_snd_sharedram_w) /* shared RAM with CPU #3 */ + AM_RANGE(0x6000, 0x63ff) AM_READ(gaplus_snd_sharedram_r) /* shared RAM with CPU #3 */ + AM_RANGE(0x6000, 0x63ff) AM_DEVWRITE("namco", gaplus_snd_sharedram_w) /* shared RAM with CPU #3 */ AM_RANGE(0x6800, 0x680f) AM_DEVREADWRITE("56xx", namcoio_r, namcoio_w) /* custom I/O chips interface */ AM_RANGE(0x6810, 0x681f) AM_DEVREADWRITE("58xx", namcoio_r, namcoio_w) /* custom I/O chips interface */ AM_RANGE(0x6820, 0x682f) AM_READWRITE(gaplus_customio_3_r, gaplus_customio_3_w) AM_BASE(&gaplus_customio_3) /* custom I/O chip #3 interface */ AM_RANGE(0x7000, 0x7fff) AM_WRITE(gaplus_irq_1_ctrl_w) /* main CPU irq control */ AM_RANGE(0x7800, 0x7fff) AM_READ(watchdog_reset_r) /* watchdog */ - AM_RANGE(0x8000, 0x8fff) AM_WRITE(gaplus_sreset_w) /* reset CPU #2 & #3, enable sound */ - AM_RANGE(0x9000, 0x9fff) AM_WRITE(gaplus_freset_w) /* reset I/O chips */ + AM_RANGE(0x8000, 0x8fff) AM_WRITE(gaplus_sreset_w) /* reset CPU #2 & #3, enable sound */ + AM_RANGE(0x9000, 0x9fff) AM_WRITE(gaplus_freset_w) /* reset I/O chips */ AM_RANGE(0xa000, 0xa7ff) AM_WRITE(gaplus_starfield_control_w) /* starfield control */ AM_RANGE(0xa000, 0xffff) AM_ROM /* ROM */ ADDRESS_MAP_END @@ -284,15 +284,15 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( gaplusa_cpu1_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x0000, 0x07ff) AM_READWRITE(gaplus_videoram_r, gaplus_videoram_w) AM_BASE(&gaplus_videoram) /* tilemap RAM (shared with CPU #2) */ AM_RANGE(0x0800, 0x1fff) AM_READWRITE(gaplus_spriteram_r, gaplus_spriteram_w) AM_BASE(&gaplus_spriteram) /* shared RAM with CPU #2 (includes sprite RAM) */ - AM_RANGE(0x6000, 0x63ff) AM_READ(gaplus_snd_sharedram_r) /* shared RAM with CPU #3 */ - AM_RANGE(0x6000, 0x63ff) AM_DEVWRITE("namco", gaplus_snd_sharedram_w) /* shared RAM with CPU #3 */ + AM_RANGE(0x6000, 0x63ff) AM_READ(gaplus_snd_sharedram_r) /* shared RAM with CPU #3 */ + AM_RANGE(0x6000, 0x63ff) AM_DEVWRITE("namco", gaplus_snd_sharedram_w) /* shared RAM with CPU #3 */ AM_RANGE(0x6800, 0x680f) AM_DEVREADWRITE("58xx", namcoio_r, namcoio_w) /* custom I/O chips interface */ AM_RANGE(0x6810, 0x681f) AM_DEVREADWRITE("56xx", namcoio_r, namcoio_w) /* custom I/O chips interface */ AM_RANGE(0x6820, 0x682f) AM_READWRITE(gaplus_customio_3_r, gaplus_customio_3_w) AM_BASE(&gaplus_customio_3) /* custom I/O chip #3 interface */ AM_RANGE(0x7000, 0x7fff) AM_WRITE(gaplus_irq_1_ctrl_w) /* main CPU irq control */ AM_RANGE(0x7800, 0x7fff) AM_READ(watchdog_reset_r) /* watchdog */ - AM_RANGE(0x8000, 0x8fff) AM_WRITE(gaplus_sreset_w) /* reset CPU #2 & #3, enable sound */ - AM_RANGE(0x9000, 0x9fff) AM_WRITE(gaplus_freset_w) /* reset I/O chips */ + AM_RANGE(0x8000, 0x8fff) AM_WRITE(gaplus_sreset_w) /* reset CPU #2 & #3, enable sound */ + AM_RANGE(0x9000, 0x9fff) AM_WRITE(gaplus_freset_w) /* reset I/O chips */ AM_RANGE(0xa000, 0xa7ff) AM_WRITE(gaplus_starfield_control_w) /* starfield control */ AM_RANGE(0xa000, 0xffff) AM_ROM /* ROM */ ADDRESS_MAP_END @@ -306,7 +306,7 @@ static ADDRESS_MAP_START( cpu2_map, ADDRESS_SPACE_PROGRAM, 8 ) ADDRESS_MAP_END static ADDRESS_MAP_START( cpu3_map, ADDRESS_SPACE_PROGRAM, 8 ) - AM_RANGE(0x0000, 0x03ff) AM_READ(gaplus_snd_sharedram_r) /* shared RAM with CPU #1 */ + AM_RANGE(0x0000, 0x03ff) AM_READ(gaplus_snd_sharedram_r) /* shared RAM with CPU #1 */ AM_RANGE(0x0000, 0x03ff) AM_DEVWRITE("namco", gaplus_snd_sharedram_w) AM_BASE(&namco_soundregs) /* shared RAM with the main CPU + sound registers */ AM_RANGE(0x2000, 0x3fff) AM_READWRITE(watchdog_reset_r, watchdog_reset_w) /* watchdog? */ AM_RANGE(0x4000, 0x7fff) AM_WRITE(gaplus_irq_3_ctrl_w) /* interrupt enable/disable */ @@ -475,7 +475,7 @@ GFXDECODE_END static const namco_interface namco_config = { - 8, /* number of voices */ + 8, /* number of voices */ 0 /* stereo */ }; diff --git a/src/mame/drivers/gijoe.c b/src/mame/drivers/gijoe.c index a82d72b441a..fd6a53b6a53 100644 --- a/src/mame/drivers/gijoe.c +++ b/src/mame/drivers/gijoe.c @@ -182,7 +182,7 @@ static ADDRESS_MAP_START( gijoe_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x110000, 0x110007) AM_DEVWRITE("k053246", k053246_word_w) AM_RANGE(0x120000, 0x121fff) AM_DEVREADWRITE("k056832", k056832_ram_word_r, k056832_ram_word_w) // Graphic planes AM_RANGE(0x122000, 0x123fff) AM_DEVREADWRITE("k056832", k056832_ram_word_r, k056832_ram_word_w) // Graphic planes mirror read - AM_RANGE(0x130000, 0x131fff) AM_DEVREAD("k056832", k056832_rom_word_r) // Passthrough to tile roms + AM_RANGE(0x130000, 0x131fff) AM_DEVREAD("k056832", k056832_rom_word_r) // Passthrough to tile roms AM_RANGE(0x160000, 0x160007) AM_DEVWRITE("k056832", k056832_b_word_w) // VSCCS (board dependent) AM_RANGE(0x170000, 0x170001) AM_WRITENOP // Watchdog AM_RANGE(0x180000, 0x18ffff) AM_RAM AM_BASE(&gijoe_workram) // Main RAM. Spec. 180000-1803ff, 180400-187fff diff --git a/src/mame/drivers/gladiatr.c b/src/mame/drivers/gladiatr.c index bd575663b96..c81eaaa452f 100644 --- a/src/mame/drivers/gladiatr.c +++ b/src/mame/drivers/gladiatr.c @@ -659,7 +659,7 @@ static const ym2203_interface gladiatr_ym2203_interface = AY8910_LEGACY_OUTPUT, AY8910_DEFAULT_LOADS, DEVCB_NULL, - DEVCB_INPUT_PORT("DSW3"), /* port B read */ + DEVCB_INPUT_PORT("DSW3"), /* port B read */ DEVCB_HANDLER(gladiator_int_control_w), /* port A write */ DEVCB_NULL, }, @@ -829,7 +829,7 @@ ROM_START( gladiatr ) ROM_CONTINUE( 0x18000, 0x4000 ) ROM_REGION( 0x10000, "sub", 0 ) /* Code for the 2nd CPU */ - ROM_LOAD( "qb0-17", 0x0000, 0x4000, CRC(e78be010) SHA1(157231d858d13a006b57a4ab419368168e64edb7) ) + ROM_LOAD( "qb0-17", 0x0000, 0x4000, CRC(e78be010) SHA1(157231d858d13a006b57a4ab419368168e64edb7) ) ROM_REGION( 0x28000, "audiocpu", 0 ) /* 6809 Code & ADPCM data */ ROM_LOAD( "qb0-20", 0x10000, 0x4000, CRC(15916eda) SHA1(6558bd2ae6f14d630ae93e66ce7d09be33870cce) ) @@ -840,22 +840,22 @@ ROM_START( gladiatr ) ROM_CONTINUE( 0x24000, 0x4000 ) ROM_REGION( 0x02000, "gfx1", 0 ) - ROM_LOAD( "qc0-15", 0x00000, 0x2000, CRC(a7efa340) SHA1(f87e061b8e4d8cd0834fab301779a8493549419b) ) /* (monochrome) */ + ROM_LOAD( "qc0-15", 0x00000, 0x2000, CRC(a7efa340) SHA1(f87e061b8e4d8cd0834fab301779a8493549419b) ) /* (monochrome) */ ROM_REGION( 0x20000, "gfx2", 0 ) /* tiles */ - ROM_LOAD( "qb0-12", 0x00000, 0x8000, CRC(0585d9ac) SHA1(e3cb07e9dc5ec2fcfa0c90294d32f0b751f67752) ) /* plane 3 */ + ROM_LOAD( "qb0-12", 0x00000, 0x8000, CRC(0585d9ac) SHA1(e3cb07e9dc5ec2fcfa0c90294d32f0b751f67752) ) /* plane 3 */ /* space to unpack plane 3 */ - ROM_LOAD( "qb0-13", 0x10000, 0x8000, CRC(a6bb797b) SHA1(852e9993270e5557c1a0350007d0beaec5ca6286) ) /* planes 1,2 */ - ROM_LOAD( "qb0-14", 0x18000, 0x8000, CRC(85b71211) SHA1(81545cd168da4a707e263fdf0ee9902e3a13ba93) ) /* planes 1,2 */ + ROM_LOAD( "qb0-13", 0x10000, 0x8000, CRC(a6bb797b) SHA1(852e9993270e5557c1a0350007d0beaec5ca6286) ) /* planes 1,2 */ + ROM_LOAD( "qb0-14", 0x18000, 0x8000, CRC(85b71211) SHA1(81545cd168da4a707e263fdf0ee9902e3a13ba93) ) /* planes 1,2 */ ROM_REGION( 0x30000, "gfx3", 0 ) /* sprites */ - ROM_LOAD( "qc1-6", 0x00000, 0x4000, CRC(651e6e44) SHA1(78ce576e6c29e43d590c42f0d4926cff82fd0268) ) /* plane 3 */ - ROM_LOAD( "qc2-7", 0x04000, 0x8000, CRC(c992c4f7) SHA1(3263973474af07c8b93c4ec97924568848cb7201) ) /* plane 3 */ + ROM_LOAD( "qc1-6", 0x00000, 0x4000, CRC(651e6e44) SHA1(78ce576e6c29e43d590c42f0d4926cff82fd0268) ) /* plane 3 */ + ROM_LOAD( "qc2-7", 0x04000, 0x8000, CRC(c992c4f7) SHA1(3263973474af07c8b93c4ec97924568848cb7201) ) /* plane 3 */ /* space to unpack plane 3 */ - ROM_LOAD( "qc0-8", 0x18000, 0x4000, CRC(1c7ffdad) SHA1(b224fd4cce078186f22e6393a38c7a2d84dc0066) ) /* planes 1,2 */ - ROM_LOAD( "qc1-9", 0x1c000, 0x4000, CRC(01043e03) SHA1(6a6dddc0a036873135dceaa989e757bdd2455ae7) ) /* planes 1,2 */ - ROM_LOAD( "qc1-10", 0x20000, 0x8000, CRC(364cdb58) SHA1(4d8548f9dfa9d105dd277c61cf3d56583a5ebbcb) ) /* planes 1,2 */ - ROM_LOAD( "qc2-11", 0x28000, 0x8000, CRC(c9fecfff) SHA1(7c13ace4293fbfab7fe924b7b24c498d8cefc7ac) ) /* planes 1,2 */ + ROM_LOAD( "qc0-8", 0x18000, 0x4000, CRC(1c7ffdad) SHA1(b224fd4cce078186f22e6393a38c7a2d84dc0066) ) /* planes 1,2 */ + ROM_LOAD( "qc1-9", 0x1c000, 0x4000, CRC(01043e03) SHA1(6a6dddc0a036873135dceaa989e757bdd2455ae7) ) /* planes 1,2 */ + ROM_LOAD( "qc1-10", 0x20000, 0x8000, CRC(364cdb58) SHA1(4d8548f9dfa9d105dd277c61cf3d56583a5ebbcb) ) /* planes 1,2 */ + ROM_LOAD( "qc2-11", 0x28000, 0x8000, CRC(c9fecfff) SHA1(7c13ace4293fbfab7fe924b7b24c498d8cefc7ac) ) /* planes 1,2 */ ROM_REGION( 0x00040, "proms", 0 ) /* unused */ ROM_LOAD( "q3.2b", 0x00000, 0x0020, CRC(6a7c3c60) SHA1(5125bfeb03752c8d76b140a4e74d5cac29dcdaa6) ) /* address decoding */ @@ -872,7 +872,7 @@ ROM_START( ogonsiro ) ROM_CONTINUE( 0x18000, 0x4000 ) ROM_REGION( 0x10000, "sub", 0 ) /* Code for the 2nd CPU */ - ROM_LOAD( "qb0-17", 0x0000, 0x4000, CRC(e78be010) SHA1(157231d858d13a006b57a4ab419368168e64edb7) ) + ROM_LOAD( "qb0-17", 0x0000, 0x4000, CRC(e78be010) SHA1(157231d858d13a006b57a4ab419368168e64edb7) ) ROM_REGION( 0x28000, "audiocpu", 0 ) /* 6809 Code & ADPCM data */ ROM_LOAD( "qb0-20", 0x10000, 0x4000, CRC(15916eda) SHA1(6558bd2ae6f14d630ae93e66ce7d09be33870cce) ) @@ -883,22 +883,22 @@ ROM_START( ogonsiro ) ROM_CONTINUE( 0x24000, 0x4000 ) ROM_REGION( 0x02000, "gfx1", 0 ) - ROM_LOAD( "qb0_15", 0x00000, 0x2000, CRC(5e1332b8) SHA1(fab6e2c7ea9bc94c1245bf759b4004a70c57d666) ) /* (monochrome) */ + ROM_LOAD( "qb0_15", 0x00000, 0x2000, CRC(5e1332b8) SHA1(fab6e2c7ea9bc94c1245bf759b4004a70c57d666) ) /* (monochrome) */ ROM_REGION( 0x20000, "gfx2", 0 ) /* tiles */ - ROM_LOAD( "qb0-12", 0x00000, 0x8000, CRC(0585d9ac) SHA1(e3cb07e9dc5ec2fcfa0c90294d32f0b751f67752) ) /* plane 3 */ + ROM_LOAD( "qb0-12", 0x00000, 0x8000, CRC(0585d9ac) SHA1(e3cb07e9dc5ec2fcfa0c90294d32f0b751f67752) ) /* plane 3 */ /* space to unpack plane 3 */ - ROM_LOAD( "qb0-13", 0x10000, 0x8000, CRC(a6bb797b) SHA1(852e9993270e5557c1a0350007d0beaec5ca6286) ) /* planes 1,2 */ - ROM_LOAD( "qb0-14", 0x18000, 0x8000, CRC(85b71211) SHA1(81545cd168da4a707e263fdf0ee9902e3a13ba93) ) /* planes 1,2 */ + ROM_LOAD( "qb0-13", 0x10000, 0x8000, CRC(a6bb797b) SHA1(852e9993270e5557c1a0350007d0beaec5ca6286) ) /* planes 1,2 */ + ROM_LOAD( "qb0-14", 0x18000, 0x8000, CRC(85b71211) SHA1(81545cd168da4a707e263fdf0ee9902e3a13ba93) ) /* planes 1,2 */ ROM_REGION( 0x30000, "gfx3", 0 ) /* sprites */ - ROM_LOAD( "qb0_6", 0x00000, 0x4000, CRC(1a2bc769) SHA1(498861f4d0cffeaff90609c8000c921a114756b6) ) /* plane 3 */ - ROM_LOAD( "qb0_7", 0x04000, 0x8000, CRC(4b677bd9) SHA1(3314ef58ff5307faf0ecd8f99950d43d571c91a6) ) /* plane 3 */ + ROM_LOAD( "qb0_6", 0x00000, 0x4000, CRC(1a2bc769) SHA1(498861f4d0cffeaff90609c8000c921a114756b6) ) /* plane 3 */ + ROM_LOAD( "qb0_7", 0x04000, 0x8000, CRC(4b677bd9) SHA1(3314ef58ff5307faf0ecd8f99950d43d571c91a6) ) /* plane 3 */ /* space to unpack plane 3 */ - ROM_LOAD( "qc0-8", 0x18000, 0x4000, CRC(1c7ffdad) SHA1(b224fd4cce078186f22e6393a38c7a2d84dc0066) ) /* planes 1,2 */ - ROM_LOAD( "qb0_9", 0x1c000, 0x4000, CRC(38f5152d) SHA1(fbb7b13a625999807d180a3212e6e12870629438) ) /* planes 1,2 */ - ROM_LOAD( "qb0_10", 0x20000, 0x8000, CRC(87ab6cc4) SHA1(50bc1108ff5609c0e7dad615e92e16eb72b7bc03) ) /* planes 1,2 */ - ROM_LOAD( "qb0_11", 0x28000, 0x8000, CRC(25eaa4ff) SHA1(3547fc600a617ba7fe5240a7830edb90230b6c51) ) /* planes 1,2 */ + ROM_LOAD( "qc0-8", 0x18000, 0x4000, CRC(1c7ffdad) SHA1(b224fd4cce078186f22e6393a38c7a2d84dc0066) ) /* planes 1,2 */ + ROM_LOAD( "qb0_9", 0x1c000, 0x4000, CRC(38f5152d) SHA1(fbb7b13a625999807d180a3212e6e12870629438) ) /* planes 1,2 */ + ROM_LOAD( "qb0_10", 0x20000, 0x8000, CRC(87ab6cc4) SHA1(50bc1108ff5609c0e7dad615e92e16eb72b7bc03) ) /* planes 1,2 */ + ROM_LOAD( "qb0_11", 0x28000, 0x8000, CRC(25eaa4ff) SHA1(3547fc600a617ba7fe5240a7830edb90230b6c51) ) /* planes 1,2 */ ROM_REGION( 0x00040, "proms", 0 ) /* unused */ ROM_LOAD( "q3.2b", 0x00000, 0x0020, CRC(6a7c3c60) SHA1(5125bfeb03752c8d76b140a4e74d5cac29dcdaa6) ) /* address decoding */ @@ -929,16 +929,16 @@ ROM_START( greatgur ) ROM_LOAD( "qb0_15", 0x00000, 0x2000, CRC(5e1332b8) SHA1(fab6e2c7ea9bc94c1245bf759b4004a70c57d666) ) /* (monochrome) */ ROM_REGION( 0x20000, "gfx2", 0 ) /* tiles */ - ROM_LOAD( "qb0-12", 0x00000, 0x8000, CRC(0585d9ac) SHA1(e3cb07e9dc5ec2fcfa0c90294d32f0b751f67752) ) /* plane 3 */ + ROM_LOAD( "qb0-12", 0x00000, 0x8000, CRC(0585d9ac) SHA1(e3cb07e9dc5ec2fcfa0c90294d32f0b751f67752) ) /* plane 3 */ /* space to unpack plane 3 */ - ROM_LOAD( "qb0-13", 0x10000, 0x8000, CRC(a6bb797b) SHA1(852e9993270e5557c1a0350007d0beaec5ca6286) ) /* planes 1,2 */ - ROM_LOAD( "qb0-14", 0x18000, 0x8000, CRC(85b71211) SHA1(81545cd168da4a707e263fdf0ee9902e3a13ba93) ) /* planes 1,2 */ + ROM_LOAD( "qb0-13", 0x10000, 0x8000, CRC(a6bb797b) SHA1(852e9993270e5557c1a0350007d0beaec5ca6286) ) /* planes 1,2 */ + ROM_LOAD( "qb0-14", 0x18000, 0x8000, CRC(85b71211) SHA1(81545cd168da4a707e263fdf0ee9902e3a13ba93) ) /* planes 1,2 */ ROM_REGION( 0x30000, "gfx3", 0 ) /* sprites */ ROM_LOAD( "qc0-06.bin", 0x00000, 0x4000, CRC(96b20201) SHA1(212270d3ba72974f22e96744c752860cc5ffba5b) ) /* plane 3 */ ROM_LOAD( "qc0-07.bin", 0x04000, 0x8000, CRC(9e89fa8f) SHA1(b133ae2ac62f43a7a51fa0d1a023a4f95fef2996) ) /* plane 3 */ /* space to unpack plane 3 */ - ROM_LOAD( "qc0-8", 0x18000, 0x4000, CRC(1c7ffdad) SHA1(b224fd4cce078186f22e6393a38c7a2d84dc0066) ) /* planes 1,2 */ + ROM_LOAD( "qc0-8", 0x18000, 0x4000, CRC(1c7ffdad) SHA1(b224fd4cce078186f22e6393a38c7a2d84dc0066) ) /* planes 1,2 */ ROM_LOAD( "qc0-09.bin", 0x1c000, 0x4000, CRC(204cd385) SHA1(e7a8720feeac8ced581d72190345daed5750379f) ) /* planes 1,2 */ ROM_LOAD( "qc1-10", 0x20000, 0x8000, CRC(364cdb58) SHA1(4d8548f9dfa9d105dd277c61cf3d56583a5ebbcb) ) /* planes 1,2 */ ROM_LOAD( "qc1-11.bin", 0x28000, 0x8000, CRC(b2aabbf5) SHA1(9eb4d80f38a30f6e45231a9bfd1aff7a124c6ee9) ) /* planes 1,2 */ diff --git a/src/mame/drivers/go2000.c b/src/mame/drivers/go2000.c index 7552eee8c35..5156f56bbda 100644 --- a/src/mame/drivers/go2000.c +++ b/src/mame/drivers/go2000.c @@ -218,8 +218,8 @@ static VIDEO_UPDATE(go2000) int bank = (x >> 12) & 0xf; srcpg = ((y & 0xf000) >> 12) + ((x & 0x0200) >> 5); // src page - srcx = ((y >> 8) & 0xf) * 2; // src col - srcy = ((dim >> 0) & 0xf) * 2; // src row + srcx = ((y >> 8) & 0xf) * 2; // src col + srcy = ((dim >> 0) & 0xf) * 2; // src row switch ((dim >> 4) & 0xc) { diff --git a/src/mame/drivers/goindol.c b/src/mame/drivers/goindol.c index 817b3bae77d..cb3c1197d69 100644 --- a/src/mame/drivers/goindol.c +++ b/src/mame/drivers/goindol.c @@ -164,7 +164,7 @@ static INPUT_PORTS_START( goindol ) PORT_DIPNAME( 0x20, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:6") PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On )) - PORT_DIPNAME( 0x40, 0x40, "Invulnerability (Cheat)") PORT_DIPLOCATION("SW1:7") + PORT_DIPNAME( 0x40, 0x40, "Invulnerability (Cheat)") PORT_DIPLOCATION("SW1:7") PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_SERVICE_DIPLOC( 0x80, IP_ACTIVE_LOW, "SW1:8" ) diff --git a/src/mame/drivers/goldnpkr.c b/src/mame/drivers/goldnpkr.c index be92e8f2334..a1311aa10b8 100644 --- a/src/mame/drivers/goldnpkr.c +++ b/src/mame/drivers/goldnpkr.c @@ -659,7 +659,7 @@ static TILE_GET_INFO( get_bg_tile_info ) int attr = colorram[tile_index]; int code = ((attr & 1) << 8) | videoram[tile_index]; int bank = (attr & 0x02) >> 1; /* bit 1 switch the gfx banks */ - int color = (attr & 0x3c) >> 2; /* bits 2-3-4-5 for color */ + int color = (attr & 0x3c) >> 2; /* bits 2-3-4-5 for color */ SET_TILE_INFO(bank, code, color, 0); } diff --git a/src/mame/drivers/goldstar.c b/src/mame/drivers/goldstar.c index ff4a88ad93f..9f769661ab8 100644 --- a/src/mame/drivers/goldstar.c +++ b/src/mame/drivers/goldstar.c @@ -494,11 +494,11 @@ static READ8_HANDLER( unkch_unk_r ) // scrolling is wrong / different static ADDRESS_MAP_START( unkch_map, ADDRESS_SPACE_PROGRAM, 8 ) - AM_RANGE(0x0000, 0x9fff) AM_ROM - AM_RANGE(0xc000, 0xc1ff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_split1_w) AM_BASE_GENERIC(paletteram) - AM_RANGE(0xc800, 0xc9ff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_split2_w) AM_BASE_GENERIC(paletteram2) + AM_RANGE(0x0000, 0x9fff) AM_ROM + AM_RANGE(0xc000, 0xc1ff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_split1_w) AM_BASE_GENERIC(paletteram) + AM_RANGE(0xc800, 0xc9ff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_split2_w) AM_BASE_GENERIC(paletteram2) - AM_RANGE(0xd000, 0xd7ff) AM_RAM AM_BASE(&nvram) AM_SIZE(&nvram_size) + AM_RANGE(0xd000, 0xd7ff) AM_RAM AM_BASE(&nvram) AM_SIZE(&nvram_size) AM_RANGE(0xd800, 0xdfff) AM_RAM @@ -7988,14 +7988,14 @@ static DRIVER_INIT( schery97 ) { UINT8 x = ROM[i]; switch(i & 0x12) - { - case 0x00: x = BITSWAP8(x^0x3e, 1,0,7,6,5,4,3,2); break; - case 0x02: x = BITSWAP8(x^0x4d, 0,7,6,5,4,3,2,1); break; - case 0x10: x = BITSWAP8(x^0x24, 2,1,0,7,6,5,4,3); break; - case 0x12: x = BITSWAP8(x^0xbb, 4,3,2,1,0,7,6,5); break; - } - - ROM[i] = x; + { + case 0x00: x = BITSWAP8(x^0x3e, 1,0,7,6,5,4,3,2); break; + case 0x02: x = BITSWAP8(x^0x4d, 0,7,6,5,4,3,2,1); break; + case 0x10: x = BITSWAP8(x^0x24, 2,1,0,7,6,5,4,3); break; + case 0x12: x = BITSWAP8(x^0xbb, 4,3,2,1,0,7,6,5); break; + } + + ROM[i] = x; } memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x1d, 0x1d, 0, 0, fixedvala8_r); diff --git a/src/mame/drivers/gottlieb.c b/src/mame/drivers/gottlieb.c index 03550020de1..902d7e3a254 100644 --- a/src/mame/drivers/gottlieb.c +++ b/src/mame/drivers/gottlieb.c @@ -486,7 +486,7 @@ static TIMER_CALLBACK( laserdisc_bit_callback ) attotime duration; /* assert the line and set a timer for deassertion */ - laserdisc_line_w(laserdisc, LASERDISC_LINE_CONTROL, ASSERT_LINE); + laserdisc_line_w(laserdisc, LASERDISC_LINE_CONTROL, ASSERT_LINE); timer_set(machine, attotime_mul(LASERDISC_CLOCK, 10), NULL, 0, laserdisc_bit_off_callback); /* determine how long for the next command; there is a 555 timer with a @@ -737,7 +737,7 @@ static ADDRESS_MAP_START( gottlieb_map, ADDRESS_SPACE_PROGRAM, 8 ) ADDRESS_MAP_GLOBAL_MASK(0xffff) AM_RANGE(0x0000, 0x0fff) AM_RAM AM_BASE_SIZE_GENERIC(nvram) AM_RANGE(0x1000, 0x1fff) AM_RAM AM_REGION("maincpu", 0x1000) /* or ROM */ - AM_RANGE(0x2000, 0x2fff) AM_RAM AM_REGION("maincpu", 0x2000) /* or ROM */ + AM_RANGE(0x2000, 0x2fff) AM_RAM AM_REGION("maincpu", 0x2000) /* or ROM */ AM_RANGE(0x3000, 0x30ff) AM_MIRROR(0x0700) AM_WRITEONLY AM_BASE_GENERIC(spriteram) /* FRSEL */ AM_RANGE(0x3800, 0x3bff) AM_MIRROR(0x0400) AM_RAM_WRITE(gottlieb_videoram_w) AM_BASE_GENERIC(videoram) /* BRSEL */ AM_RANGE(0x4000, 0x4fff) AM_RAM_WRITE(gottlieb_charram_w) AM_BASE(&gottlieb_charram) /* BOJRSEL1 */ @@ -1897,7 +1897,7 @@ static const char *const qbert_sample_names[] = static const samples_interface qbert_samples_interface = { - 1, /* one channel */ + 1, /* one channel */ qbert_sample_names }; diff --git a/src/mame/drivers/gpworld.c b/src/mame/drivers/gpworld.c index dc56b9b1e1c..16596ac96e9 100644 --- a/src/mame/drivers/gpworld.c +++ b/src/mame/drivers/gpworld.c @@ -231,9 +231,9 @@ static READ8_HANDLER( ldp_read ) static READ8_HANDLER( pedal_in ) { if (brake_gas) - return input_port_read(space->machine, "INACCEL"); + return input_port_read(space->machine, "INACCEL"); - return input_port_read(space->machine, "INBRAKE"); + return input_port_read(space->machine, "INBRAKE"); } diff --git a/src/mame/drivers/gstream.c b/src/mame/drivers/gstream.c index efcf60c417b..662b51ea895 100644 --- a/src/mame/drivers/gstream.c +++ b/src/mame/drivers/gstream.c @@ -313,7 +313,7 @@ static WRITE32_HANDLER( gstream_oki_banking_w ) /* some values are already used in the table, so we force them manually */ if ((data == 0x6f) || (data == 0x6e)) { - state->oki_bank_0 = 0; // level 3b-5a samples + state->oki_bank_0 = 0; // level 3b-5a samples state->oki_bank_1 = 6; // level 3b-5a music } @@ -341,11 +341,11 @@ static WRITE32_HANDLER( gstream_oki_4040_w ) static ADDRESS_MAP_START( gstream_io, ADDRESS_SPACE_IO, 32 ) AM_RANGE(0x4000, 0x4003) AM_READ_PORT("IN0") AM_RANGE(0x4010, 0x4013) AM_READ_PORT("IN1") - AM_RANGE(0x4020, 0x4023) AM_READ_PORT("IN2") // extra coin switches etc - AM_RANGE(0x4030, 0x4033) AM_WRITE(gstream_oki_banking_w) // oki banking - AM_RANGE(0x4040, 0x4043) AM_WRITE(gstream_oki_4040_w) // ?? - AM_RANGE(0x4050, 0x4053) AM_DEVREADWRITE8("oki2", okim6295_r, okim6295_w, 0x000000ff) // music and samples - AM_RANGE(0x4060, 0x4063) AM_DEVREADWRITE8("oki1", okim6295_r, okim6295_w, 0x000000ff) // music and samples + AM_RANGE(0x4020, 0x4023) AM_READ_PORT("IN2") // extra coin switches etc + AM_RANGE(0x4030, 0x4033) AM_WRITE(gstream_oki_banking_w) // oki banking + AM_RANGE(0x4040, 0x4043) AM_WRITE(gstream_oki_4040_w) // ?? + AM_RANGE(0x4050, 0x4053) AM_DEVREADWRITE8("oki2", okim6295_r, okim6295_w, 0x000000ff) // music and samples + AM_RANGE(0x4060, 0x4063) AM_DEVREADWRITE8("oki1", okim6295_r, okim6295_w, 0x000000ff) // music and samples ADDRESS_MAP_END static INPUT_PORTS_START( gstream ) @@ -417,8 +417,8 @@ static const gfx_layout layout32x32 = }; static GFXDECODE_START( gstream ) - GFXDECODE_ENTRY( "gfx2", 0, layout32x32, 0, 0x80 ) - GFXDECODE_ENTRY( "gfx1", 0, layout16x16, 0, 0x80 ) + GFXDECODE_ENTRY( "gfx2", 0, layout32x32, 0, 0x80 ) + GFXDECODE_ENTRY( "gfx1", 0, layout16x16, 0, 0x80 ) GFXDECODE_END diff --git a/src/mame/drivers/gticlub.c b/src/mame/drivers/gticlub.c index bb22f3e011e..4d995746ad2 100644 --- a/src/mame/drivers/gticlub.c +++ b/src/mame/drivers/gticlub.c @@ -495,7 +495,7 @@ ADDRESS_MAP_END static INPUT_PORTS_START( gticlub ) PORT_START("IN0") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) // View switch - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON2 ) // Shift Down + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON2 ) // Shift Down PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON3 ) // Shift Up PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON4 ) // AT/MT switch PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Service Button") PORT_CODE(KEYCODE_8) @@ -788,7 +788,7 @@ static MACHINE_DRIVER_START( gticlub ) MDRV_K056230_ADD("k056230", gticlub_k056230_intf) - /* video hardware */ + /* video hardware */ MDRV_SCREEN_ADD("screen", RASTER) MDRV_SCREEN_REFRESH_RATE(60) MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32) @@ -887,7 +887,7 @@ static MACHINE_DRIVER_START( hangplt ) MDRV_K033906_ADD("k033906_1", hangplt_k033906_intf_0) MDRV_K033906_ADD("k033906_2", hangplt_k033906_intf_1) - /* video hardware */ + /* video hardware */ MDRV_PALETTE_LENGTH(65536) MDRV_SCREEN_ADD("lscreen", RASTER) diff --git a/src/mame/drivers/gyruss.c b/src/mame/drivers/gyruss.c index 0d2953c601c..309a106e182 100644 --- a/src/mame/drivers/gyruss.c +++ b/src/mame/drivers/gyruss.c @@ -182,16 +182,16 @@ static ADDRESS_MAP_START( audio_cpu1_io_map, ADDRESS_SPACE_IO, 8 ) AM_RANGE(0x01, 0x01) AM_DEVREAD("ay1", ay8910_r) AM_RANGE(0x02, 0x02) AM_DEVWRITE("ay1", ay8910_data_w) AM_RANGE(0x04, 0x04) AM_DEVWRITE("ay2", ay8910_address_w) - AM_RANGE(0x05, 0x05) AM_DEVREAD("ay2", ay8910_r) + AM_RANGE(0x05, 0x05) AM_DEVREAD("ay2", ay8910_r) AM_RANGE(0x06, 0x06) AM_DEVWRITE("ay2", ay8910_data_w) AM_RANGE(0x08, 0x08) AM_DEVWRITE("ay3", ay8910_address_w) AM_RANGE(0x09, 0x09) AM_DEVREAD("ay3", ay8910_r) AM_RANGE(0x0a, 0x0a) AM_DEVWRITE("ay3", ay8910_data_w) AM_RANGE(0x0c, 0x0c) AM_DEVWRITE("ay4", ay8910_address_w) - AM_RANGE(0x0d, 0x0d) AM_DEVREAD("ay4", ay8910_r) + AM_RANGE(0x0d, 0x0d) AM_DEVREAD("ay4", ay8910_r) AM_RANGE(0x0e, 0x0e) AM_DEVWRITE("ay4", ay8910_data_w) AM_RANGE(0x10, 0x10) AM_DEVWRITE("ay5", ay8910_address_w) - AM_RANGE(0x11, 0x11) AM_DEVREAD("ay5", ay8910_r) + AM_RANGE(0x11, 0x11) AM_DEVREAD("ay5", ay8910_r) AM_RANGE(0x12, 0x12) AM_DEVWRITE("ay5", ay8910_data_w) AM_RANGE(0x14, 0x14) AM_WRITE(gyruss_i8039_irq_w) AM_RANGE(0x18, 0x18) AM_WRITE(soundlatch2_w) @@ -411,7 +411,7 @@ static const discrete_mixer_desc konami_right_mixer_desc = {0,0,0,0,0,0}, /* no node capacitors */ 0, 200, CAP_U(0.1), - CAP_U(1), /* DC - Removal, not in schematics */ + CAP_U(1), /* DC - Removal, not in schematics */ 0, 1}; static const discrete_mixer_desc konami_left_mixer_desc = @@ -421,7 +421,7 @@ static const discrete_mixer_desc konami_left_mixer_desc = {0,0,0,0,0,0}, /* no node capacitors */ 0, 200, CAP_U(0.1), - CAP_U(1), /* DC - Removal, not in schematics */ + CAP_U(1), /* DC - Removal, not in schematics */ 0, 1}; static DISCRETE_SOUND_START( gyruss_sound ) diff --git a/src/mame/drivers/hanaawas.c b/src/mame/drivers/hanaawas.c index b53f12f695e..41c82f3bde7 100644 --- a/src/mame/drivers/hanaawas.c +++ b/src/mame/drivers/hanaawas.c @@ -244,10 +244,10 @@ MACHINE_DRIVER_END ROM_START( hanaawas ) ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD( "1.1e", 0x0000, 0x2000, CRC(618dc1e3) SHA1(31817f256512352db0d27322998d9dcf95a993cf) ) - ROM_LOAD( "2.3e", 0x2000, 0x1000, CRC(5091b67f) SHA1(5a66740b8829b9b4d3aea274f9ff36e0b9e8c151) ) - ROM_LOAD( "3.4e", 0x4000, 0x1000, CRC(dcb65067) SHA1(37964ff4016bd927b9f13b4358b831bb667f993b) ) - ROM_LOAD( "4.6e", 0x6000, 0x1000, CRC(24bee0dc) SHA1(a4237ad3611c923b563923462e79b0b3f66cc721) ) + ROM_LOAD( "1.1e", 0x0000, 0x2000, CRC(618dc1e3) SHA1(31817f256512352db0d27322998d9dcf95a993cf) ) + ROM_LOAD( "2.3e", 0x2000, 0x1000, CRC(5091b67f) SHA1(5a66740b8829b9b4d3aea274f9ff36e0b9e8c151) ) + ROM_LOAD( "3.4e", 0x4000, 0x1000, CRC(dcb65067) SHA1(37964ff4016bd927b9f13b4358b831bb667f993b) ) + ROM_LOAD( "4.6e", 0x6000, 0x1000, CRC(24bee0dc) SHA1(a4237ad3611c923b563923462e79b0b3f66cc721) ) ROM_REGION( 0x4000, "gfx1", 0 ) ROM_LOAD( "5.9a", 0x0000, 0x1000, CRC(304ae219) SHA1(c1eac4973a6aec9fd8e848c206870667a8bb0922) ) diff --git a/src/mame/drivers/highvdeo.c b/src/mame/drivers/highvdeo.c index fca4fffa323..068acfbc799 100644 --- a/src/mame/drivers/highvdeo.c +++ b/src/mame/drivers/highvdeo.c @@ -263,12 +263,12 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( tv_vcf_io, ADDRESS_SPACE_IO, 16 ) AM_RANGE(0x0000, 0x0001) AM_WRITE( write1_w ) // lamps - AM_RANGE(0x0006, 0x0007) AM_DEVWRITE( "oki", tv_oki6395_w ) - AM_RANGE(0x0008, 0x0009) AM_READ( read1_r ) + AM_RANGE(0x0006, 0x0007) AM_DEVWRITE( "oki", tv_oki6395_w ) + AM_RANGE(0x0008, 0x0009) AM_READ( read1_r ) AM_RANGE(0x000a, 0x000b) AM_READ( read2_r ) AM_RANGE(0x000c, 0x000d) AM_READ( read3_r ) - AM_RANGE(0x0010, 0x0015) AM_WRITE( tv_vcf_paletteram_w ) - AM_RANGE(0x0030, 0x0031) AM_WRITE( tv_vcf_bankselect_w ) AM_DEVREAD8( "oki", okim6376_r, 0x00ff ) + AM_RANGE(0x0010, 0x0015) AM_WRITE( tv_vcf_paletteram_w ) + AM_RANGE(0x0030, 0x0031) AM_WRITE( tv_vcf_bankselect_w ) AM_DEVREAD8( "oki", okim6376_r, 0x00ff ) ADDRESS_MAP_END @@ -302,11 +302,11 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( tv_ncf_io, ADDRESS_SPACE_IO, 16 ) AM_RANGE(0x0000, 0x0001) AM_WRITE( write1_w ) // lamps - AM_RANGE(0x0008, 0x0009) AM_DEVWRITE( "oki", tv_ncf_oki6395_w ) - AM_RANGE(0x000c, 0x000d) AM_READ( read1_r ) + AM_RANGE(0x0008, 0x0009) AM_DEVWRITE( "oki", tv_ncf_oki6395_w ) + AM_RANGE(0x000c, 0x000d) AM_READ( read1_r ) AM_RANGE(0x0010, 0x0011) AM_READ( tv_ncf_read2_r ) AM_RANGE(0x0012, 0x0013) AM_READ( read3_r ) - AM_RANGE(0x0030, 0x0035) AM_WRITE( tv_vcf_paletteram_w ) + AM_RANGE(0x0030, 0x0035) AM_WRITE( tv_vcf_paletteram_w ) ADDRESS_MAP_END @@ -346,8 +346,8 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( tv_tcf_io, ADDRESS_SPACE_IO, 16 ) AM_RANGE(0x0000, 0x0001) AM_WRITE( write1_w ) // lamps - AM_RANGE(0x0006, 0x0007) AM_DEVWRITE( "oki", tv_oki6395_w ) - AM_RANGE(0x0008, 0x0009) AM_READ( read1_r ) + AM_RANGE(0x0006, 0x0007) AM_DEVWRITE( "oki", tv_oki6395_w ) + AM_RANGE(0x0008, 0x0009) AM_READ( read1_r ) AM_RANGE(0x000a, 0x000b) AM_READ( read2_r ) AM_RANGE(0x0030, 0x0031) AM_READ( read3_r ) AM_WRITE( tv_tcf_bankselect_w ) ADDRESS_MAP_END @@ -407,8 +407,8 @@ static ADDRESS_MAP_START( newmcard_io, ADDRESS_SPACE_IO, 16 ) AM_RANGE(0x0000, 0x0001) AM_WRITE( write1_w ) // lamps AM_RANGE(0x0002, 0x0003) AM_WRITE( write2_w ) // coin counter & coin lockout AM_RANGE(0x0004, 0x0005) AM_WRITE( newmcard_vblank_w ) - AM_RANGE(0x0006, 0x0007) AM_DEVWRITE( "oki", tv_oki6395_w ) - AM_RANGE(0x0008, 0x0009) AM_READ( read1_r ) + AM_RANGE(0x0006, 0x0007) AM_DEVWRITE( "oki", tv_oki6395_w ) + AM_RANGE(0x0008, 0x0009) AM_READ( read1_r ) AM_RANGE(0x000a, 0x000b) AM_READ( read2_r ) AM_RANGE(0x000c, 0x000d) AM_READ( newmcard_vblank_r ) AM_RANGE(0x000e, 0x000f) AM_READ( read3_r ) @@ -474,8 +474,8 @@ static ADDRESS_MAP_START( brasil_io, ADDRESS_SPACE_IO, 16 ) AM_RANGE(0x0030, 0x0031) AM_WRITE( brasil_status_w ) AM_RANGE(0x0000, 0x0001) AM_WRITE( write1_w ) // lamps AM_RANGE(0x0002, 0x0003) AM_WRITE( write2_w ) // coin counter & coin lockout - AM_RANGE(0x0006, 0x0007) AM_DEVWRITE( "oki", tv_oki6395_w ) - AM_RANGE(0x0008, 0x0009) AM_READ( read1_r ) + AM_RANGE(0x0006, 0x0007) AM_DEVWRITE( "oki", tv_oki6395_w ) + AM_RANGE(0x0008, 0x0009) AM_READ( read1_r ) AM_RANGE(0x000a, 0x000b) AM_READ( read2_r ) AM_RANGE(0x000e, 0x000f) AM_READ( read3_r ) // AM_RANGE(0x000e, 0x000f) AM_WRITE diff --git a/src/mame/drivers/hng64.c b/src/mame/drivers/hng64.c index 177927af309..be116b6d810 100644 --- a/src/mame/drivers/hng64.c +++ b/src/mame/drivers/hng64.c @@ -1110,7 +1110,7 @@ static ADDRESS_MAP_START( hng_map, ADDRESS_SPACE_PROGRAM, 32 ) AM_RANGE(0x20300218, 0x2030021b) AM_READ(unk_vreg_r) // 3d? - AM_RANGE(0x30000000, 0x3000002f) AM_RAM AM_BASE(&hng64_3dregs) + AM_RANGE(0x30000000, 0x3000002f) AM_RAM AM_BASE(&hng64_3dregs) AM_RANGE(0x30100000, 0x3015ffff) AM_READWRITE(hng64_3d_1_r,hng64_3d_2_w) AM_BASE(&hng64_3d_1) // 3D Display Buffer A AM_RANGE(0x30200000, 0x3025ffff) AM_READWRITE(hng64_3d_2_r,hng64_3d_2_w) AM_BASE(&hng64_3d_2) // 3D Display Buffer B @@ -1859,12 +1859,12 @@ static MACHINE_RESET(hyperneo) static MACHINE_DRIVER_START( hng64 ) /* basic machine hardware */ - MDRV_CPU_ADD("maincpu", VR4300BE, MASTER_CLOCK) // actually R4300 + MDRV_CPU_ADD("maincpu", VR4300BE, MASTER_CLOCK) // actually R4300 MDRV_CPU_CONFIG(config) MDRV_CPU_PROGRAM_MAP(hng_map) MDRV_CPU_VBLANK_INT_HACK(irq_start,4) - MDRV_CPU_ADD("audiocpu", V30,8000000) // v53, 16? mhz! + MDRV_CPU_ADD("audiocpu", V30,8000000) // v53, 16? mhz! MDRV_CPU_PROGRAM_MAP(hng_sound_map) MDRV_CPU_ADD("comm", Z80,MASTER_CLOCK/4) /* KL5C80A12CFP - binary compatible with Z80. */ diff --git a/src/mame/drivers/hornet.c b/src/mame/drivers/hornet.c index 551dc5b890e..4660a081c58 100644 --- a/src/mame/drivers/hornet.c +++ b/src/mame/drivers/hornet.c @@ -1138,7 +1138,7 @@ static MACHINE_DRIVER_START( hornet ) MDRV_K033906_ADD("k033906_1", hornet_k033906_intf_0) - /* video hardware */ + /* video hardware */ MDRV_SCREEN_ADD("screen", RASTER) MDRV_SCREEN_REFRESH_RATE(60) MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32) diff --git a/src/mame/drivers/hvyunit.c b/src/mame/drivers/hvyunit.c index df652a36073..fe77bb23718 100644 --- a/src/mame/drivers/hvyunit.c +++ b/src/mame/drivers/hvyunit.c @@ -290,7 +290,7 @@ static VIDEO_START(hvyunit) bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows, 16, 16, 32, 32); } -#define SX_POS 152 +#define SX_POS 152 #define SY_POS 258 static VIDEO_UPDATE(hvyunit) @@ -635,7 +635,7 @@ static INTERRUPT_GEN( hvyunit_interrupt ) static const kaneko_pandora_interface hvyunit_pandora_config = { "screen", /* screen tag */ - 0, /* gfx_region */ + 0, /* gfx_region */ 0, 0 /* x_offs, y_offs */ }; diff --git a/src/mame/drivers/hyperspt.c b/src/mame/drivers/hyperspt.c index 3cd1304bd25..3905b4b91a5 100644 --- a/src/mame/drivers/hyperspt.c +++ b/src/mame/drivers/hyperspt.c @@ -231,7 +231,7 @@ static const gfx_layout hyperspt_spritelayout = static GFXDECODE_START( hyperspt ) GFXDECODE_ENTRY( "gfx1", 0, hyperspt_spritelayout, 0, 16 ) - GFXDECODE_ENTRY( "gfx2", 0, hyperspt_charlayout, 16*16, 16 ) + GFXDECODE_ENTRY( "gfx2", 0, hyperspt_charlayout, 16*16, 16 ) GFXDECODE_END diff --git a/src/mame/drivers/igs011.c b/src/mame/drivers/igs011.c index 577768c5721..d22ce581513 100644 --- a/src/mame/drivers/igs011.c +++ b/src/mame/drivers/igs011.c @@ -389,7 +389,7 @@ static READ16_HANDLER( igs_##NUM##_dips_r ) \ ret = input_port_read(space->machine, dipnames[i]); \ \ /* 0x0100 is blitter busy */ \ - return (ret & 0xff) | 0x0000; \ + return (ret & 0xff) | 0x0000; \ } // Games have 3 to 5 dips @@ -549,7 +549,7 @@ static void lhb2_decrypt(running_machine *machine) UINT16 *src = (UINT16 *) (memory_region(machine, "maincpu")); UINT16 *result_data = alloc_array_or_die(UINT16, rom_size/2); - for (i=0; i<rom_size/2; i++) + for (i=0; i<rom_size/2; i++) { UINT16 x = src[i]; @@ -557,7 +557,7 @@ static void lhb2_decrypt(running_machine *machine) x ^= 0x0004; if ((i & 0x0204) == 0x0000) - x ^= 0x0008; + x ^= 0x0008; if ((i & 0x3080) != 0x3080 && (i & 0x3090) != 0x3010) x ^= 0x0020; @@ -590,7 +590,7 @@ static void nkishusp_decrypt(running_machine *machine) UINT16 *src = (UINT16 *) (memory_region(machine, "maincpu")); UINT16 *result_data = alloc_array_or_die(UINT16, rom_size/2); - for (i=0; i<rom_size/2; i++) + for (i=0; i<rom_size/2; i++) { UINT16 x = src[i]; @@ -751,7 +751,7 @@ static void drgnwrld_gfx_decrypt(running_machine *machine) UINT8 *src = (UINT8 *) (memory_region(machine, "blitter")); UINT8 *result_data = alloc_array_or_die(UINT8, rom_size); - for (i=0; i<rom_size; i++) + for (i=0; i<rom_size; i++) result_data[i] = src[BITSWAP24(i, 23,22,21,20,19,18,17,16,15, 12, 13, 14, 11,10,9,8,7,6,5,4,3,2,1,0)]; memcpy(src,result_data,rom_size); @@ -1470,7 +1470,7 @@ static INPUT_PORTS_START( drgnwrldc ) PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_START("DSW3") + PORT_START("DSW3") PORT_DIPUNKNOWN( 0x01, 0x01 ) PORT_DIPUNKNOWN( 0x02, 0x02 ) PORT_DIPUNKNOWN( 0x04, 0x04 ) @@ -1562,7 +1562,7 @@ static INPUT_PORTS_START( drgnwrld ) PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_START("DSW3") + PORT_START("DSW3") PORT_DIPUNKNOWN( 0x01, 0x01 ) PORT_DIPUNKNOWN( 0x02, 0x02 ) PORT_DIPUNKNOWN( 0x04, 0x04 ) @@ -1661,7 +1661,7 @@ static INPUT_PORTS_START( lhb2 ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPSETTING( 0x80, DEF_STR( On ) ) - PORT_START("DSW3") + PORT_START("DSW3") PORT_DIPNAME( 0x03, 0x03, DEF_STR( Unknown ) ) PORT_DIPSETTING( 0x03, "500" ) PORT_DIPSETTING( 0x02, "1000" ) @@ -1787,7 +1787,7 @@ static INPUT_PORTS_START( drgnwrldj ) PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_START("DSW3") + PORT_START("DSW3") PORT_DIPUNKNOWN( 0x01, 0x01 ) PORT_DIPUNKNOWN( 0x02, 0x02 ) PORT_DIPUNKNOWN( 0x04, 0x04 ) @@ -1868,7 +1868,7 @@ static INPUT_PORTS_START( wlcc ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_DIPUNKNOWN( 0x80, 0x80 ) - PORT_START("DSW3") + PORT_START("DSW3") PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coinage ) ) PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) ) PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) ) @@ -1978,7 +1978,7 @@ static INPUT_PORTS_START( lhb ) PORT_DIPSETTING( 0x80, "2" ) // PORT_DIPSETTING( 0x00, "2" ) - PORT_START("DSW3") + PORT_START("DSW3") PORT_DIPNAME( 0x03, 0x03, "Max Credit" ) PORT_DIPSETTING( 0x03, "1000" ) PORT_DIPSETTING( 0x02, "2000" ) @@ -2145,7 +2145,7 @@ static INPUT_PORTS_START( vbowl ) PORT_DIPUNKNOWN( 0x40, 0x40 ) PORT_DIPUNKNOWN( 0x80, 0x80 ) - PORT_START("DSW3") + PORT_START("DSW3") PORT_DIPNAME( 0x03, 0x03, "Cabinet ID" ) PORT_DIPSETTING( 0x03, "1" ) PORT_DIPSETTING( 0x02, "2" ) @@ -2251,7 +2251,7 @@ static INPUT_PORTS_START( vbowlj ) PORT_DIPUNKNOWN( 0x40, 0x40 ) PORT_DIPUNKNOWN( 0x80, 0x80 ) - PORT_START("DSW3") + PORT_START("DSW3") PORT_DIPNAME( 0x03, 0x03, "Cabinet ID" ) PORT_DIPSETTING( 0x03, "1" ) PORT_DIPSETTING( 0x02, "2" ) @@ -2355,7 +2355,7 @@ static INPUT_PORTS_START( xymg ) PORT_DIPUNKNOWN( 0x40, 0x40 ) PORT_DIPUNKNOWN( 0x80, 0x80 ) - PORT_START("DSW3") + PORT_START("DSW3") PORT_DIPUNKNOWN( 0x01, 0x01 ) PORT_DIPUNKNOWN( 0x02, 0x02 ) PORT_DIPUNKNOWN( 0x04, 0x04 ) diff --git a/src/mame/drivers/ilpag.c b/src/mame/drivers/ilpag.c index 6c9aa616777..4bf51c61bbe 100644 --- a/src/mame/drivers/ilpag.c +++ b/src/mame/drivers/ilpag.c @@ -278,7 +278,7 @@ static ADDRESS_MAP_START( steaser_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x100000, 0x1fffff) AM_ROM AM_REGION("blit_data", 0) AM_RANGE(0x200000, 0x20ffff) AM_RAM AM_BASE_SIZE_GENERIC(nvram) - AM_RANGE(0x800000, 0x800001) AM_READ(test_r) + AM_RANGE(0x800000, 0x800001) AM_READ(test_r) // AM_RANGE(0x840000, 0x840001) AM_WRITE(sound_write_w) AM_RANGE(0x880000, 0x880001) AM_READ(test_r) // AM_RANGE(0x8c0000, 0x8c0001) AM_WRITE(sound_write_w) diff --git a/src/mame/drivers/itech32.c b/src/mame/drivers/itech32.c index 5b48e37e14e..9f3e65f8fd4 100644 --- a/src/mame/drivers/itech32.c +++ b/src/mame/drivers/itech32.c @@ -392,7 +392,7 @@ static UINT32 *tms1_boot; static UINT8 tms_spinning[2]; #define START_TMS_SPINNING(n) do { cpu_spinuntil_trigger(space->cpu, 7351 + n); tms_spinning[n] = 1; } while (0) -#define STOP_TMS_SPINNING(machine, n) do { cpuexec_trigger(machine, 7351 + n); tms_spinning[n] = 0; } while (0) +#define STOP_TMS_SPINNING(machine, n) do { cpuexec_trigger(machine, 7351 + n); tms_spinning[n] = 0; } while (0) diff --git a/src/mame/drivers/jack.c b/src/mame/drivers/jack.c index 34b8d9288fc..c3521ced3a2 100644 --- a/src/mame/drivers/jack.c +++ b/src/mame/drivers/jack.c @@ -1155,22 +1155,22 @@ ROM_END ROM_START( sucasino ) ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD( "1", 0x0000, 0x1000, CRC(e116e979) SHA1(99b0c783ace93e643738a1a924cafb690d2c1127) ) + ROM_LOAD( "1", 0x0000, 0x1000, CRC(e116e979) SHA1(99b0c783ace93e643738a1a924cafb690d2c1127) ) ROM_LOAD( "2", 0x1000, 0x1000, CRC(2a2635f5) SHA1(e3b70942adc4eab81000287c8da67d3732ddda70) ) - ROM_LOAD( "3", 0x2000, 0x1000, CRC(69864d90) SHA1(244eaf4079b90f367c671e00e8081d885f26e26d) ) - ROM_LOAD( "4", 0x3000, 0x1000, CRC(174c9373) SHA1(070175bf1b7b14f34549d03a8288c8ff1f2f4eaa) ) - ROM_LOAD( "5", 0xc000, 0x1000, CRC(115bcb1e) SHA1(9b50e1dcb77db1b60ab5fd7d9843261e25580647) ) - ROM_LOAD( "6", 0xd000, 0x1000, CRC(434caa17) SHA1(2f537063db14cfdfb771dece2ea33841c874c708) ) - ROM_LOAD( "7", 0xe000, 0x1000, CRC(67c68b82) SHA1(b5d3977bf1f1337a96ae7bb60fe11e6ca9e87485) ) - ROM_LOAD( "8", 0xf000, 0x1000, CRC(f5b63006) SHA1(a069fb9b9b6d47ac3f0fbbd9b2c89da31d6b1202) ) + ROM_LOAD( "3", 0x2000, 0x1000, CRC(69864d90) SHA1(244eaf4079b90f367c671e00e8081d885f26e26d) ) + ROM_LOAD( "4", 0x3000, 0x1000, CRC(174c9373) SHA1(070175bf1b7b14f34549d03a8288c8ff1f2f4eaa) ) + ROM_LOAD( "5", 0xc000, 0x1000, CRC(115bcb1e) SHA1(9b50e1dcb77db1b60ab5fd7d9843261e25580647) ) + ROM_LOAD( "6", 0xd000, 0x1000, CRC(434caa17) SHA1(2f537063db14cfdfb771dece2ea33841c874c708) ) + ROM_LOAD( "7", 0xe000, 0x1000, CRC(67c68b82) SHA1(b5d3977bf1f1337a96ae7bb60fe11e6ca9e87485) ) + ROM_LOAD( "8", 0xf000, 0x1000, CRC(f5b63006) SHA1(a069fb9b9b6d47ac3f0fbbd9b2c89da31d6b1202) ) ROM_REGION( 0x10000, "audiocpu", 0 ) - ROM_LOAD( "9", 0x0000, 0x1000, CRC(67cf8aec) SHA1(95be671d5f7526610b175fc4121459e0ffc3649b) ) + ROM_LOAD( "9", 0x0000, 0x1000, CRC(67cf8aec) SHA1(95be671d5f7526610b175fc4121459e0ffc3649b) ) ROM_REGION( 0x4000, "gfx1", 0 ) - ROM_LOAD( "11", 0x0000, 0x1000, CRC(f92c4c5b) SHA1(a415c8f55d1792e79d05ece223ef423f8578f896) ) + ROM_LOAD( "11", 0x0000, 0x1000, CRC(f92c4c5b) SHA1(a415c8f55d1792e79d05ece223ef423f8578f896) ) /* 1000-1fff empty */ - ROM_LOAD( "10", 0x2000, 0x1000, CRC(3b0783ce) SHA1(880f258351a8b0d76abe433cc77d95b991ae1adc) ) + ROM_LOAD( "10", 0x2000, 0x1000, CRC(3b0783ce) SHA1(880f258351a8b0d76abe433cc77d95b991ae1adc) ) /* 3000-3fff empty */ ROM_END diff --git a/src/mame/drivers/jackal.c b/src/mame/drivers/jackal.c index 35f041f68ea..f64f0ede5bc 100644 --- a/src/mame/drivers/jackal.c +++ b/src/mame/drivers/jackal.c @@ -357,7 +357,7 @@ static MACHINE_RESET( jackal ) // at the beginning of the game. This fixes it. cpu_set_clockscale(cputag_get_cpu(machine, "slave"), 1.2f); - state->rambank = rgn; + state->rambank = rgn; state->spritebank = rgn; state->irq_enable = 0; diff --git a/src/mame/drivers/jackpool.c b/src/mame/drivers/jackpool.c index fc9b028d825..a97f04905cf 100644 --- a/src/mame/drivers/jackpool.c +++ b/src/mame/drivers/jackpool.c @@ -100,8 +100,8 @@ static READ16_HANDLER( jackpool_io_r ) case 0x1c: return input_port_read(space->machine,"BET"); case 0x1e: return 0xff; //ticket motor case 0x20: return 0xff; //hopper motor - case 0x2c: return eeprom_read_bit(devtag_get_device(space->machine,"eeprom")); - case 0x2e: return eeprom_read_bit(devtag_get_device(space->machine,"eeprom")); + case 0x2c: return eeprom_read_bit(devtag_get_device(space->machine,"eeprom")); + case 0x2e: return eeprom_read_bit(devtag_get_device(space->machine,"eeprom")); // default: printf("R %02x\n",offset*2); break; } diff --git a/src/mame/drivers/jalmah.c b/src/mame/drivers/jalmah.c index c754c3eb62c..30e0c847648 100644 --- a/src/mame/drivers/jalmah.c +++ b/src/mame/drivers/jalmah.c @@ -121,7 +121,7 @@ Video Hardware start static tilemap_t *sc3_tilemap_0,*sc3_tilemap_2,*sc3_tilemap_3, *sc0_tilemap_0,*sc0_tilemap_1,*sc0_tilemap_2,*sc0_tilemap_3, - *sc1_tilemap_0,*sc1_tilemap_1,*sc1_tilemap_2,*sc1_tilemap_3, + *sc1_tilemap_0,*sc1_tilemap_1,*sc1_tilemap_2,*sc1_tilemap_3, *sc2_tilemap_0,*sc2_tilemap_1,*sc2_tilemap_2,*sc2_tilemap_3; static UINT16 *sc3_vram,*sc0_vram,*sc1_vram,*sc2_vram; static UINT16 *jm_scrollram,*jm_vregs; @@ -414,7 +414,7 @@ static VIDEO_UPDATE( urashima ) bitmap_fill(bitmap, cliprect, screen->machine->pens[0x1ff]);//selectable by a ram address? if(jm_vregs[0] & 1) { tilemap_draw(bitmap,cliprect,sc0_tilemap_0,0,0); } - if(jm_vregs[3] & 1) { tilemap_draw(bitmap,cliprect,sc3_tilemap_0,0,0); } + if(jm_vregs[3] & 1) { tilemap_draw(bitmap,cliprect,sc3_tilemap_0,0,0); } return 0; } @@ -1426,7 +1426,7 @@ ROM_START( daireika ) ROM_LOAD( "mj12.bin", 0x20000, 0x20000, CRC(236f809f) SHA1(9e15dd8a810a9d4f7f75f084d6bd277ea7d0e40a) ) ROM_REGION( 0x10000, "gfx2", 0 ) /* BG1 */ - ROM_COPY( "gfx1", 0x10000, 0x00000, 0x10000 )/*mj12.bin*/ + ROM_COPY( "gfx1", 0x10000, 0x00000, 0x10000 )/*mj12.bin*/ ROM_REGION( 0x220, "user1", 0 ) /* Proms */ ROM_LOAD( "mj15.bpr", 0x000, 0x100, CRC(ebac41f9) SHA1(9d1629d977849663392cbf03a3ddf76665f88608) ) @@ -1453,7 +1453,7 @@ ROM_START( mjzoomin ) ROM_REGION( 0x140000, "oki", ROMREGION_ERASEFF ) /* Samples */ ROM_LOAD( "zoomin-3.bin", 0x40000, 0x80000, CRC(07d7b8cd) SHA1(e05ce80ffb945b04f93f8c49d0c840b0bff6310b) ) - ROM_COPY( "oki" , 0x40000, 0x00000, 0x40000 ) + ROM_COPY( "oki" , 0x40000, 0x00000, 0x40000 ) ROM_REGION( 0x20000, "gfx1", 0 ) /* BG0 */ ROM_LOAD( "zoomin14.bin", 0x00000, 0x20000, CRC(4e32aa45) SHA1(450a3449ca8b4f0dfe8b62cceaee9366eaf3dc3d) ) @@ -1530,7 +1530,7 @@ ROM_START( kakumei2 ) ROM_REGION( 0x140000, "oki", ROMREGION_ERASEFF ) /* Samples */ ROM_LOAD( "92000-01.3", 0x040000, 0x80000, CRC(4b0ed440) SHA1(11961d217a41f92b60d5083a5e346c245f7db620) ) - ROM_COPY( "oki" , 0x040000, 0x00000, 0x40000 ) + ROM_COPY( "oki" , 0x040000, 0x00000, 0x40000 ) ROM_REGION( 0x20000, "gfx1", 0 ) /* BG0 */ ROM_LOAD( "mj-8956.14", 0x00000, 0x20000, CRC(2b2fe999) SHA1(d9d601e2c008791f5bff6e7b1340f754dd094201) ) @@ -1786,78 +1786,78 @@ static WRITE16_HANDLER( urashima_mcu_w ) jm_mcu_code[0x1052/2] = 0x17E0; jm_mcu_code[0x1054/2] = 0x33C6; jm_mcu_code[0x1056/2] = 0x0010; - jm_mcu_code[0x1058/2] = 0x17B0; - jm_mcu_code[0x105a/2] = 0x3C39; - jm_mcu_code[0x105c/2] = 0x000F; - jm_mcu_code[0x105e/2] = 0x201A; - jm_mcu_code[0x1060/2] = 0x3A86; - jm_mcu_code[0x1062/2] = 0x6700; - jm_mcu_code[0x1064/2] = 0x0074; - jm_mcu_code[0x1066/2] = 0x33C2; - jm_mcu_code[0x1068/2] = 0x0010; - jm_mcu_code[0x106a/2] = 0x17FE; - jm_mcu_code[0x106c/2] = 0x33C1; - jm_mcu_code[0x106e/2] = 0x0010; - jm_mcu_code[0x1070/2] = 0x17FC; - jm_mcu_code[0x1072/2] = 0x23C8; - jm_mcu_code[0x1074/2] = 0x0010; - jm_mcu_code[0x1076/2] = 0x17F0; - jm_mcu_code[0x1078/2] = 0x23C9; - jm_mcu_code[0x107a/2] = 0x0010; - jm_mcu_code[0x107c/2] = 0x17D0; - jm_mcu_code[0x107e/2] = 0x41F9; - jm_mcu_code[0x1080/2] = 0x0002; - jm_mcu_code[0x1082/2] = 0xA2C0; - jm_mcu_code[0x1084/2] = 0x3c15; - jm_mcu_code[0x1086/2] = 0xd1fc; - jm_mcu_code[0x1088/2] = 0x0000; - jm_mcu_code[0x108a/2] = 0x0040; - jm_mcu_code[0x108c/2] = 0x5346; - jm_mcu_code[0x108e/2] = 0x6704; - jm_mcu_code[0x1090/2] = 0x4e71; - jm_mcu_code[0x1092/2] = 0x60F2; - jm_mcu_code[0x1094/2] = 0x23c8; - jm_mcu_code[0x1096/2] = 0x0010; - jm_mcu_code[0x1098/2] = 0x17a0;//store here the A0 reg,1017a0 - jm_mcu_code[0x109a/2] = 0xd3fc; - jm_mcu_code[0x109c/2] = 0x0000; - jm_mcu_code[0x109e/2] = 0x0200; - jm_mcu_code[0x10a0/2] = 0x720F; - jm_mcu_code[0x10a2/2] = 0x740F; - jm_mcu_code[0x10a4/2] = 0x2050; - jm_mcu_code[0x10a6/2] = 0x32D8; - jm_mcu_code[0x10a8/2] = 0x51CA; - jm_mcu_code[0x10aa/2] = 0xFFFC; - jm_mcu_code[0x10ac/2] = 0x2079;//1017a0,not 1017f0 - jm_mcu_code[0x10ae/2] = 0x0010; - jm_mcu_code[0x10b0/2] = 0x17a0; - jm_mcu_code[0x10b2/2] = 0xD0FC; - jm_mcu_code[0x10b4/2] = 0x0004; - jm_mcu_code[0x10b6/2] = 0x23c8; - jm_mcu_code[0x10b8/2] = 0x0010; - jm_mcu_code[0x10ba/2] = 0x17a0; - jm_mcu_code[0x10bc/2] = 0x51C9; - jm_mcu_code[0x10be/2] = 0xffe4; - jm_mcu_code[0x10c0/2] = 0x3439; - jm_mcu_code[0x10c2/2] = 0x0010; - jm_mcu_code[0x10c4/2] = 0x17FE; - jm_mcu_code[0x10c6/2] = 0x3239; - jm_mcu_code[0x10c8/2] = 0x0010; - jm_mcu_code[0x10ca/2] = 0x17FC; - jm_mcu_code[0x10cc/2] = 0x2079; - jm_mcu_code[0x10ce/2] = 0x0010; - jm_mcu_code[0x10d0/2] = 0x17F0; - jm_mcu_code[0x10d2/2] = 0x2279; - jm_mcu_code[0x10d4/2] = 0x0010; - jm_mcu_code[0x10d6/2] = 0x17D0; - jm_mcu_code[0x10d8/2] = 0x2A79; - jm_mcu_code[0x10da/2] = 0x0010; - jm_mcu_code[0x10dc/2] = 0x17c0; - jm_mcu_code[0x10de/2] = 0x3C39; - jm_mcu_code[0x10e0/2] = 0x0010; - jm_mcu_code[0x10e2/2] = 0x17B0; - jm_mcu_code[0x10e4/2] = 0x6000; - jm_mcu_code[0x10e6/2] = 0xFF26; + jm_mcu_code[0x1058/2] = 0x17B0; + jm_mcu_code[0x105a/2] = 0x3C39; + jm_mcu_code[0x105c/2] = 0x000F; + jm_mcu_code[0x105e/2] = 0x201A; + jm_mcu_code[0x1060/2] = 0x3A86; + jm_mcu_code[0x1062/2] = 0x6700; + jm_mcu_code[0x1064/2] = 0x0074; + jm_mcu_code[0x1066/2] = 0x33C2; + jm_mcu_code[0x1068/2] = 0x0010; + jm_mcu_code[0x106a/2] = 0x17FE; + jm_mcu_code[0x106c/2] = 0x33C1; + jm_mcu_code[0x106e/2] = 0x0010; + jm_mcu_code[0x1070/2] = 0x17FC; + jm_mcu_code[0x1072/2] = 0x23C8; + jm_mcu_code[0x1074/2] = 0x0010; + jm_mcu_code[0x1076/2] = 0x17F0; + jm_mcu_code[0x1078/2] = 0x23C9; + jm_mcu_code[0x107a/2] = 0x0010; + jm_mcu_code[0x107c/2] = 0x17D0; + jm_mcu_code[0x107e/2] = 0x41F9; + jm_mcu_code[0x1080/2] = 0x0002; + jm_mcu_code[0x1082/2] = 0xA2C0; + jm_mcu_code[0x1084/2] = 0x3c15; + jm_mcu_code[0x1086/2] = 0xd1fc; + jm_mcu_code[0x1088/2] = 0x0000; + jm_mcu_code[0x108a/2] = 0x0040; + jm_mcu_code[0x108c/2] = 0x5346; + jm_mcu_code[0x108e/2] = 0x6704; + jm_mcu_code[0x1090/2] = 0x4e71; + jm_mcu_code[0x1092/2] = 0x60F2; + jm_mcu_code[0x1094/2] = 0x23c8; + jm_mcu_code[0x1096/2] = 0x0010; + jm_mcu_code[0x1098/2] = 0x17a0;//store here the A0 reg,1017a0 + jm_mcu_code[0x109a/2] = 0xd3fc; + jm_mcu_code[0x109c/2] = 0x0000; + jm_mcu_code[0x109e/2] = 0x0200; + jm_mcu_code[0x10a0/2] = 0x720F; + jm_mcu_code[0x10a2/2] = 0x740F; + jm_mcu_code[0x10a4/2] = 0x2050; + jm_mcu_code[0x10a6/2] = 0x32D8; + jm_mcu_code[0x10a8/2] = 0x51CA; + jm_mcu_code[0x10aa/2] = 0xFFFC; + jm_mcu_code[0x10ac/2] = 0x2079;//1017a0,not 1017f0 + jm_mcu_code[0x10ae/2] = 0x0010; + jm_mcu_code[0x10b0/2] = 0x17a0; + jm_mcu_code[0x10b2/2] = 0xD0FC; + jm_mcu_code[0x10b4/2] = 0x0004; + jm_mcu_code[0x10b6/2] = 0x23c8; + jm_mcu_code[0x10b8/2] = 0x0010; + jm_mcu_code[0x10ba/2] = 0x17a0; + jm_mcu_code[0x10bc/2] = 0x51C9; + jm_mcu_code[0x10be/2] = 0xffe4; + jm_mcu_code[0x10c0/2] = 0x3439; + jm_mcu_code[0x10c2/2] = 0x0010; + jm_mcu_code[0x10c4/2] = 0x17FE; + jm_mcu_code[0x10c6/2] = 0x3239; + jm_mcu_code[0x10c8/2] = 0x0010; + jm_mcu_code[0x10ca/2] = 0x17FC; + jm_mcu_code[0x10cc/2] = 0x2079; + jm_mcu_code[0x10ce/2] = 0x0010; + jm_mcu_code[0x10d0/2] = 0x17F0; + jm_mcu_code[0x10d2/2] = 0x2279; + jm_mcu_code[0x10d4/2] = 0x0010; + jm_mcu_code[0x10d6/2] = 0x17D0; + jm_mcu_code[0x10d8/2] = 0x2A79; + jm_mcu_code[0x10da/2] = 0x0010; + jm_mcu_code[0x10dc/2] = 0x17c0; + jm_mcu_code[0x10de/2] = 0x3C39; + jm_mcu_code[0x10e0/2] = 0x0010; + jm_mcu_code[0x10e2/2] = 0x17B0; + jm_mcu_code[0x10e4/2] = 0x6000; + jm_mcu_code[0x10e6/2] = 0xFF26; } } @@ -1887,7 +1887,7 @@ static READ16_HANDLER( daireika_mcu_r ) data value is REQ under mjzoomin video test menu.It is related to the MCU? */ static const UINT16 dai_mcu_code[0x11] = { 0x33c5, 0x0010, 0x07fe, 0x3a39,0x000f,0x000c,0xda86,0x0245, - 0x003f, 0x33c5, 0x000f, 0x000c,0x3a39,0x0010,0x07fe,0x4e75 }; + 0x003f, 0x33c5, 0x000f, 0x000c,0x3a39,0x0010,0x07fe,0x4e75 }; static WRITE16_HANDLER( daireika_mcu_w ) { @@ -1946,7 +1946,7 @@ static WRITE16_HANDLER( daireika_mcu_w ) *******************************************************/ jm_shared_ram[0x00c6/2] = 0x6000; jm_shared_ram[0x00c8/2] = 0x0008;//bra +$8,needed because we have only two bytes here - //and we need three... + //and we need three... jm_shared_ram[0x00d0/2] = 0x4ef9; jm_shared_ram[0x00d2/2] = 0x0010; jm_shared_ram[0x00d4/2] = 0x0000;//jmp $100000 diff --git a/src/mame/drivers/jchan.c b/src/mame/drivers/jchan.c index 34f075c0c42..cdb5b15cb2d 100644 --- a/src/mame/drivers/jchan.c +++ b/src/mame/drivers/jchan.c @@ -230,7 +230,7 @@ static void jchan_mcu_run(running_machine *machine) } break; - case 0x03: // DSW + case 0x03: // DSW { mcu_ram[mcu_offset] = input_port_read(machine, "DSW"); logerror("%s : MCU executed command: %04X %04X (read DSW)\n",cpuexec_describe_context(machine),mcu_command,mcu_offset*2); diff --git a/src/mame/drivers/jokrwild.c b/src/mame/drivers/jokrwild.c index 9f387491888..513a3fd5444 100644 --- a/src/mame/drivers/jokrwild.c +++ b/src/mame/drivers/jokrwild.c @@ -126,7 +126,7 @@ static TILE_GET_INFO( get_bg_tile_info ) xx-- ---- bank select. ---- xxxx color code. */ - int attr = colorram[tile_index]; + int attr = colorram[tile_index]; int code = videoram[tile_index] | ((attr & 0xc0) << 2); int color = (attr & 0x0f); @@ -182,7 +182,7 @@ static ADDRESS_MAP_START( jokrwild_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x0400, 0x07ff) AM_RAM //FIXME: backup RAM AM_RANGE(0x2000, 0x23ff) AM_RAM_WRITE(jokrwild_colorram_w) AM_BASE(&colorram) AM_RANGE(0x2400, 0x27ff) AM_RAM //stack RAM - AM_RANGE(0x4004, 0x4007) AM_DEVREADWRITE("pia0", pia6821_r, pia6821_w) + AM_RANGE(0x4004, 0x4007) AM_DEVREADWRITE("pia0", pia6821_r, pia6821_w) AM_RANGE(0x4008, 0x400b) AM_DEVREADWRITE("pia1", pia6821_r, pia6821_w) //optical sensor is here // AM_RANGE(0x4010, 0x4010) AM_READNOP /* R ???? */ AM_RANGE(0x6000, 0x6000) AM_DEVWRITE("crtc", mc6845_address_w) diff --git a/src/mame/drivers/jpmimpct.c b/src/mame/drivers/jpmimpct.c index 23de54f10b2..f1fcd792809 100644 --- a/src/mame/drivers/jpmimpct.c +++ b/src/mame/drivers/jpmimpct.c @@ -848,7 +848,7 @@ static MACHINE_DRIVER_START( jpmimpct ) MDRV_CPU_ADD("maincpu", M68000, 8000000) MDRV_CPU_PROGRAM_MAP(m68k_program_map) - MDRV_CPU_ADD("dsp", TMS34010, 40000000) + MDRV_CPU_ADD("dsp", TMS34010, 40000000) MDRV_CPU_CONFIG(tms_config) MDRV_CPU_PROGRAM_MAP(tms_program_map) @@ -1058,7 +1058,7 @@ ROM_END GAME( 1995, cluedo, 0, jpmimpct, cluedo, 0, ROT0, "JPM", "Cluedo (prod. 2D)", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE ) GAME( 1995, cluedo2c, cluedo, jpmimpct, cluedo, 0, ROT0, "JPM", "Cluedo (prod. 2C)", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE ) -GAME( 1995, cluedo2, cluedo, jpmimpct, cluedo, 0, ROT0, "JPM", "Cluedo (prod. 2)", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE ) +GAME( 1995, cluedo2, cluedo, jpmimpct, cluedo, 0, ROT0, "JPM", "Cluedo (prod. 2)", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE ) GAME( 1996, trivialp, 0, jpmimpct, trivialp, 0, ROT0, "JPM", "Trivial Pursuit (prod. 1D)", GAME_SUPPORTS_SAVE ) GAME( 1997, scrabble, 0, jpmimpct, scrabble, 0, ROT0, "JPM", "Scrabble (rev. F)", GAME_SUPPORTS_SAVE ) GAME( 1998, hngmnjpm, 0, jpmimpct, hngmnjpm, 0, ROT0, "JPM", "Hangman (JPM)", GAME_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/kaneko16.c b/src/mame/drivers/kaneko16.c index 982750dea1f..c3557f721d2 100644 --- a/src/mame/drivers/kaneko16.c +++ b/src/mame/drivers/kaneko16.c @@ -2355,7 +2355,7 @@ Notes: ***************************************************************************/ ROM_START( explbrkr ) - ROM_REGION( 0x080000, "maincpu", 0 ) /* 68000 Code */ + ROM_REGION( 0x080000, "maincpu", 0 ) /* 68000 Code */ ROM_LOAD16_BYTE( "ts100e.u18", 0x000000, 0x040000, CRC(cc84a985) SHA1(1732a607cc1f894dd45cfc915dfe0407335f0073) ) ROM_LOAD16_BYTE( "ts101e.u19", 0x000001, 0x040000, CRC(88f4afb7) SHA1(08b8efd6bd935bc1b8cf9753d58b38ccf9a70b4d) ) @@ -2398,7 +2398,7 @@ ROM_START( explbrkr ) ROM_END ROM_START( bakubrkr ) - ROM_REGION( 0x080000, "maincpu", 0 ) /* 68000 Code */ + ROM_REGION( 0x080000, "maincpu", 0 ) /* 68000 Code */ ROM_LOAD16_BYTE( "ts100j.u18", 0x000000, 0x040000, CRC(8cc0a4fd) SHA1(e7e18b5ea236522a79ba9db8f573ac8f7ade504b) ) ROM_LOAD16_BYTE( "ts101j.u19", 0x000001, 0x040000, CRC(aea92195) SHA1(e89f964e7e936fd7774f21956eb4ff5c9104837b) ) @@ -2546,7 +2546,7 @@ berlwall and not berlwalt! */ ROM_START( berlwallt ) - ROM_REGION( 0x040000, "maincpu", 0 ) /* 68000 Code */ + ROM_REGION( 0x040000, "maincpu", 0 ) /* 68000 Code */ ROM_LOAD16_BYTE( "bw100a", 0x000000, 0x020000, CRC(e6bcb4eb) SHA1(220b8fddc79230b4f6a8cf33e1035355c485e8d1) ) ROM_LOAD16_BYTE( "bw101a", 0x000001, 0x020000, CRC(38056fb2) SHA1(48338b9a5ebea872286541a3c45016673c4af76b) ) @@ -2600,11 +2600,11 @@ CUSTOM: KANEKO VU-002 x2 ***************************************************************************/ ROM_START( blazeon ) - ROM_REGION( 0x080000, "maincpu", 0 ) /* 68000 Code */ + ROM_REGION( 0x080000, "maincpu", 0 ) /* 68000 Code */ ROM_LOAD16_BYTE( "bz_prg1.u80", 0x000000, 0x040000, CRC(8409e31d) SHA1(a9dfc299f4b457df190314401aef309adfaf9bae) ) ROM_LOAD16_BYTE( "bz_prg2.u81", 0x000001, 0x040000, CRC(b8a0a08b) SHA1(5f275b98d3e49a834850b45179d26e8c2f9fd604) ) - ROM_REGION( 0x020000, "audiocpu", 0 ) /* Z80 Code */ + ROM_REGION( 0x020000, "audiocpu", 0 ) /* Z80 Code */ ROM_LOAD( "3.u45", 0x000000, 0x020000, CRC(52fe4c94) SHA1(896230e4627503292575bbd84edc3cf9cb18b27e) ) // 1xxxxxxxxxxxxxxxx = 0xFF ROM_REGION( 0x200000, "gfx1", 0 ) /* Sprites */ @@ -2691,11 +2691,11 @@ of214e0220.u26 - 27C080 ***************************************************************************/ ROM_START( bloodwar ) - ROM_REGION( 0x100000, "gtmr", 0 ) /* 68000 Code */ + ROM_REGION( 0x100000, "gtmr", 0 ) /* 68000 Code */ ROM_LOAD16_BYTE( "pof3.514", 0x000000, 0x080000, CRC(0c93da15) SHA1(65b6b1b4acfc32c551ae4fbe6a13f7f2b8554dbf) ) ROM_LOAD16_BYTE( "p1f3.513", 0x000001, 0x080000, CRC(894ecbe5) SHA1(bf403d19e6315266114ac742a08cac903e7b54b5) ) - ROM_REGION( 0x020000, "mcudata", 0 ) /* MCU Code */ + ROM_REGION( 0x020000, "mcudata", 0 ) /* MCU Code */ ROM_LOAD16_WORD_SWAP( "dox3.124", 0x000000, 0x020000, CRC(399f2005) SHA1(ff0370724770c35963953fd9596d9f808ba87d8f) ) ROM_REGION( 0x1e00000, "gfx1", 0 ) /* Sprites */ @@ -2827,11 +2827,11 @@ f1: 10F6 master up= 94/07/18 15:12:35 */ ROM_START( gtmr ) - ROM_REGION( 0x100000, "gtmr", 0 ) /* 68000 Code */ + ROM_REGION( 0x100000, "gtmr", 0 ) /* 68000 Code */ ROM_LOAD16_BYTE( "u2.bin", 0x000000, 0x080000, CRC(031799f7) SHA1(a59a9635002d139247828e3b74f6cf2fbdd5e569) ) ROM_LOAD16_BYTE( "u1.bin", 0x000001, 0x080000, CRC(6238790a) SHA1(a137fd581138804534f3193068f117611a982004) ) - ROM_REGION( 0x020000, "mcudata", 0 ) /* MCU Code */ + ROM_REGION( 0x020000, "mcudata", 0 ) /* MCU Code */ ROM_LOAD16_WORD_SWAP( "mmd0x2.u124.bin", 0x000000, 0x020000, CRC(3d7cb329) SHA1(053106acde642a414fde0b01105fe6762b6a10f6) ) // from gtmra ROM_REGION( 0x840000, "gfx1", 0 ) /* Sprites */ @@ -2839,8 +2839,8 @@ ROM_START( gtmr ) ROM_LOAD( "mm-201-403-s1.bin", 0x200000, 0x200000, CRC(cf6b23dc) SHA1(ccfd0b17507e091e55c169361cd6a6b19641b717) ) ROM_LOAD( "mm-202-404-s2.bin", 0x400000, 0x200000, CRC(8f27f5d3) SHA1(219a86446ce2556682009d8aff837480f040a01e) ) ROM_LOAD( "mm-203-405-s3.bin", 0x600000, 0x080000, CRC(e9747c8c) SHA1(2507102ec34755c6f110eadb3444e6d3a3474051) ) - ROM_LOAD16_BYTE( "mms1x2.u30.bin", 0x800001, 0x020000, CRC(b42b426f) SHA1(6aee5759b5f0786c5ee074d9df3d2716919ea621) ) - ROM_LOAD16_BYTE( "mms0x2.u29.bin", 0x800000, 0x020000, CRC(bd22b7d2) SHA1(ef82d00d72439590c71aed33ecfabc6ee71a6ff9) ) + ROM_LOAD16_BYTE( "mms1x2.u30.bin", 0x800001, 0x020000, CRC(b42b426f) SHA1(6aee5759b5f0786c5ee074d9df3d2716919ea621) ) + ROM_LOAD16_BYTE( "mms0x2.u29.bin", 0x800000, 0x020000, CRC(bd22b7d2) SHA1(ef82d00d72439590c71aed33ecfabc6ee71a6ff9) ) ROM_REGION( 0x200000, "gfx2", 0 ) /* Tiles (scrambled) */ ROM_LOAD( "mm-300-406-a0.bin", 0x000000, 0x200000, CRC(b15f6b7f) SHA1(5e84919d788add53fc87f4d85f437df413b1dbc5) ) @@ -2856,11 +2856,11 @@ ROM_START( gtmr ) ROM_END ROM_START( gtmra ) - ROM_REGION( 0x100000, "gtmr", 0 ) /* 68000 Code */ + ROM_REGION( 0x100000, "gtmr", 0 ) /* 68000 Code */ ROM_LOAD16_BYTE( "mmp0x2.u514.bin", 0x000000, 0x080000, CRC(ba4a77c8) SHA1(efb6ae0e7aa71ab0c5f486f799bf31edcec24e2b) ) ROM_LOAD16_BYTE( "mmp1x2.u513.bin", 0x000001, 0x080000, CRC(a2b9034e) SHA1(466bcb1bf7124eb15d23b25c4e1307b9706474ec) ) - ROM_REGION( 0x020000, "mcudata", 0 ) /* MCU Code */ + ROM_REGION( 0x020000, "mcudata", 0 ) /* MCU Code */ ROM_LOAD16_WORD_SWAP( "mmd0x2.u124.bin", 0x000000, 0x020000, CRC(3d7cb329) SHA1(053106acde642a414fde0b01105fe6762b6a10f6) ) ROM_REGION( 0x840000, "gfx1", 0 ) /* Sprites */ @@ -2868,8 +2868,8 @@ ROM_START( gtmra ) ROM_LOAD( "mm-201-403-s1.bin", 0x200000, 0x200000, CRC(cf6b23dc) SHA1(ccfd0b17507e091e55c169361cd6a6b19641b717) ) ROM_LOAD( "mm-202-404-s2.bin", 0x400000, 0x200000, CRC(8f27f5d3) SHA1(219a86446ce2556682009d8aff837480f040a01e) ) ROM_LOAD( "mm-203-405-s3.bin", 0x600000, 0x080000, CRC(e9747c8c) SHA1(2507102ec34755c6f110eadb3444e6d3a3474051) ) - ROM_LOAD16_BYTE( "mms1x2.u30.bin", 0x800001, 0x020000, CRC(b42b426f) SHA1(6aee5759b5f0786c5ee074d9df3d2716919ea621) ) - ROM_LOAD16_BYTE( "mms0x2.u29.bin", 0x800000, 0x020000, CRC(bd22b7d2) SHA1(ef82d00d72439590c71aed33ecfabc6ee71a6ff9) ) + ROM_LOAD16_BYTE( "mms1x2.u30.bin", 0x800001, 0x020000, CRC(b42b426f) SHA1(6aee5759b5f0786c5ee074d9df3d2716919ea621) ) + ROM_LOAD16_BYTE( "mms0x2.u29.bin", 0x800000, 0x020000, CRC(bd22b7d2) SHA1(ef82d00d72439590c71aed33ecfabc6ee71a6ff9) ) ROM_REGION( 0x200000, "gfx2", 0 ) /* Tiles (scrambled) */ ROM_LOAD( "mm-300-406-a0.bin", 0x000000, 0x200000, CRC(b15f6b7f) SHA1(5e84919d788add53fc87f4d85f437df413b1dbc5) ) @@ -2892,11 +2892,11 @@ ROM_END master up= 94/09/06 14:49:19 */ ROM_START( gtmre ) - ROM_REGION( 0x100000, "gtmr", 0 ) /* 68000 Code */ + ROM_REGION( 0x100000, "gtmr", 0 ) /* 68000 Code */ ROM_LOAD16_BYTE( "gmmu2.bin", 0x000000, 0x080000, CRC(36dc4aa9) SHA1(0aea4dc169d7aad2ea957a1de698d1fa12c71556) ) ROM_LOAD16_BYTE( "gmmu1.bin", 0x000001, 0x080000, CRC(8653c144) SHA1(a253a01327a9443337a55a13c063ea5096444c4c) ) - ROM_REGION( 0x020000, "mcudata", 0 ) /* MCU Code */ + ROM_REGION( 0x020000, "mcudata", 0 ) /* MCU Code */ //ROM_LOAD16_WORD_SWAP( "mcu_code.u12", 0x000000, 0x020000, NO_DUMP ) // this rom has the right version string, so is probably correct ROM_LOAD16_WORD_SWAP( "gtmrusa.u12", 0x000000, 0x020000, CRC(2e1a06ff) SHA1(475a7555653eefac84307492a385895b839cab0d) ) @@ -2931,11 +2931,11 @@ ROM_END master up= 94/09/06 20:30:39 */ ROM_START( gtmrusa ) - ROM_REGION( 0x100000, "gtmr", 0 ) /* 68000 Code */ + ROM_REGION( 0x100000, "gtmr", 0 ) /* 68000 Code */ ROM_LOAD16_BYTE( "gtmrusa.u2", 0x000000, 0x080000, CRC(5be615c4) SHA1(c14d11a5bf6e025a65b932039165302ff407c4e1) ) ROM_LOAD16_BYTE( "gtmrusa.u1", 0x000001, 0x080000, CRC(ae853e4e) SHA1(31eaa73b0c5ddab1292f521ceec43b202653efe9) ) - ROM_REGION( 0x020000, "mcudata", 0 ) /* MCU Code? */ + ROM_REGION( 0x020000, "mcudata", 0 ) /* MCU Code? */ ROM_LOAD16_WORD_SWAP( "gtmrusa.u12", 0x000000, 0x020000, CRC(2e1a06ff) SHA1(475a7555653eefac84307492a385895b839cab0d) ) ROM_REGION( 0x800000, "gfx1", 0 ) /* Sprites */ @@ -3120,11 +3120,11 @@ Notes: ***************************************************************************/ ROM_START( gtmr2 ) - ROM_REGION( 0x100000, "gtmr", 0 ) /* 68000 Code */ + ROM_REGION( 0x100000, "gtmr", 0 ) /* 68000 Code */ ROM_LOAD16_BYTE( "m2p0x1a.u8", 0x000000, 0x080000, CRC(c29039fb) SHA1(a16e8863608353c2931e9d45359fbcec8f11ef9d) ) ROM_LOAD16_BYTE( "m2p1x1a.u7", 0x000001, 0x080000, CRC(8ef392c4) SHA1(06bd720d931911e32264183dd215ab70ad6d2961) ) - ROM_REGION( 0x020000, "mcudata", 0 ) /* MCU Code? */ + ROM_REGION( 0x020000, "mcudata", 0 ) /* MCU Code? */ ROM_LOAD16_WORD_SWAP( "m2d0x0.u31", 0x000000, 0x020000, CRC(2e1a06ff) SHA1(475a7555653eefac84307492a385895b839cab0d) ) ROM_REGION( 0x800000, "gfx1", 0 ) /* Sprites */ @@ -3151,11 +3151,11 @@ ROM_START( gtmr2 ) ROM_END ROM_START( gtmr2a ) - ROM_REGION( 0x100000, "gtmr", 0 ) /* 68000 Code */ + ROM_REGION( 0x100000, "gtmr", 0 ) /* 68000 Code */ ROM_LOAD16_BYTE( "m2p0x1.u8", 0x000000, 0x080000, CRC(525f6618) SHA1(da8008cc7768b4e8c0091aa3ea21752d0ca33691) ) ROM_LOAD16_BYTE( "m2p1x1.u7", 0x000001, 0x080000, CRC(914683e5) SHA1(dbb2140f7de86073647abc6e73ba739ea201dd30) ) - ROM_REGION( 0x020000, "mcudata", 0 ) /* MCU Code? */ + ROM_REGION( 0x020000, "mcudata", 0 ) /* MCU Code? */ ROM_LOAD16_WORD_SWAP( "m2d0x0.u31", 0x000000, 0x020000, CRC(2e1a06ff) SHA1(475a7555653eefac84307492a385895b839cab0d) ) ROM_REGION( 0x800000, "gfx1", 0 ) /* Sprites */ @@ -3182,11 +3182,11 @@ ROM_START( gtmr2a ) ROM_END ROM_START( gtmr2u ) - ROM_REGION( 0x100000, "gtmr", 0 ) /* 68000 Code */ + ROM_REGION( 0x100000, "gtmr", 0 ) /* 68000 Code */ ROM_LOAD16_BYTE( "m2p0a1.u8", 0x000000, 0x080000, CRC(813e1d5e) SHA1(602df02933dc7b77be311113af1d1edad2751cc9) ) ROM_LOAD16_BYTE( "m2p1a1.u7", 0x000001, 0x080000, CRC(bee63666) SHA1(07585a63f901f50f2a2314eb4dc4307e7028ded7) ) - ROM_REGION( 0x020000, "mcudata", 0 ) /* MCU Code? */ + ROM_REGION( 0x020000, "mcudata", 0 ) /* MCU Code? */ ROM_LOAD16_WORD_SWAP( "m2d0x0.u31", 0x000000, 0x020000, CRC(2e1a06ff) SHA1(475a7555653eefac84307492a385895b839cab0d) ) ROM_REGION( 0x800000, "gfx1", 0 ) /* Sprites */ @@ -3264,7 +3264,7 @@ Yes, one program rom actually is a 27C010 and the other one is a 27C020 ***************************************************************************/ ROM_START( mgcrystl ) /* Master Up: 92/01/10 14:21:30 */ - ROM_REGION( 0x040000*2, "maincpu", ROMREGION_ERASE ) /* 68000 Code */ + ROM_REGION( 0x040000*2, "maincpu", ROMREGION_ERASE ) /* 68000 Code */ ROM_LOAD16_BYTE( "mc100e02.u18", 0x000000, 0x020000, CRC(246a1335) SHA1(8333945a92e08a7bff425d2d6602557386016dc5) ) /* Labeled as MC100E/U18-02 */ ROM_LOAD16_BYTE( "mc101e02.u19", 0x000001, 0x040000, CRC(708ea1dc) SHA1(ae6eca6620729bc1e815f1bfbd8fe130f0ba943c) ) /* Labeled as MC101E/U19-02 */ @@ -3288,7 +3288,7 @@ ROM_START( mgcrystl ) /* Master Up: 92/01/10 14:21:30 */ ROM_END ROM_START( mgcrystlo ) /* Master Up: 91/12/10 01:56:06 */ - ROM_REGION( 0x040000*2, "maincpu", ROMREGION_ERASE ) /* 68000 Code */ + ROM_REGION( 0x040000*2, "maincpu", ROMREGION_ERASE ) /* 68000 Code */ ROM_LOAD16_BYTE( "mc100h00.u18", 0x000000, 0x020000, CRC(c7456ba7) SHA1(96c25c3432069373fa86d7af3e093e02e39aea34) ) /* Labeled as MC100H/U18-00 */ ROM_LOAD16_BYTE( "mc101h00.u19", 0x000001, 0x040000, CRC(ea8f9300) SHA1(0cd0d448805aa45986b63befca00b08fe066dbb2) ) /* Labeled as MC101H/U19-00 */ @@ -3312,7 +3312,7 @@ ROM_START( mgcrystlo ) /* Master Up: 91/12/10 01:56:06 */ ROM_END ROM_START( mgcrystlj ) /* Master Up: 92/01/13 14:44:20 */ - ROM_REGION( 0x040000*2, "maincpu", ROMREGION_ERASE ) /* 68000 Code */ + ROM_REGION( 0x040000*2, "maincpu", ROMREGION_ERASE ) /* 68000 Code */ ROM_LOAD16_BYTE( "mc100j02.u18", 0x000000, 0x020000, CRC(afe5882d) SHA1(176e6e12e3df63c08d7aff781f5e5a9bd83ec293) ) /* Labeled as MC100J/U18-02 */ ROM_LOAD16_BYTE( "mc101j02.u19", 0x000001, 0x040000, CRC(60da5492) SHA1(82b90a617d355825624ce9fb30bddf4714bd0d18) ) /* Labeled as MC101J/U19-02 */ @@ -3367,11 +3367,11 @@ KANEKO JAPAN 9203 T (44 PIN PQFP) = KANEKO JAPAN 9204 T (44 PIN PQFP) ***************************************************************************/ ROM_START( shogwarr ) - ROM_REGION( 0x040000, "maincpu", 0 ) /* 68000 Code */ + ROM_REGION( 0x040000, "maincpu", 0 ) /* 68000 Code */ ROM_LOAD16_BYTE( "fb030e.u61", 0x000000, 0x020000, CRC(32ce7909) SHA1(02d87342706ac9547eb611bd542f8498ba41e34a) ) ROM_LOAD16_BYTE( "fb031e.u62", 0x000001, 0x020000, CRC(228aeaf5) SHA1(5e080d7975bc5dcf6fccfbc286eafe939496d9bf) ) - ROM_REGION( 0x020000, "cpu1", 0 ) /* MCU Code */ + ROM_REGION( 0x020000, "cpu1", 0 ) /* MCU Code */ ROM_LOAD( "fb040e.u33", 0x000000, 0x020000, CRC(299d0746) SHA1(67fe3a47ab01fa02ce2bb5836c2041986c19d875) ) ROM_REGION( 0x1000000, "gfx1", ROMREGION_ERASEFF ) /* Sprites */ @@ -3442,11 +3442,11 @@ ROUTINES: // it appears to be an encoding artifact on the videos uploaded by this poster ROM_START( shogwarru ) - ROM_REGION( 0x040000, "maincpu", 0 ) /* 68000 Code */ + ROM_REGION( 0x040000, "maincpu", 0 ) /* 68000 Code */ ROM_LOAD16_BYTE( "fb030a.u61", 0x000000, 0x020000, CRC(a04106c6) SHA1(95ab084f2e709be7cec2964cb09bcf5a8d3aacdf) ) ROM_LOAD16_BYTE( "fb031a.u62", 0x000001, 0x020000, CRC(d1def5e2) SHA1(f442de4433547e52b483549aca5786e4597a7122) ) - ROM_REGION( 0x020000, "cpu1", 0 ) /* MCU Code */ + ROM_REGION( 0x020000, "cpu1", 0 ) /* MCU Code */ ROM_LOAD( "fb040a.u33", 0x000000, 0x020000, CRC(4b62c4d9) SHA1(35c943dde70438a411714070e42a84366db5ef83) ) ROM_REGION( 0x1000000, "gfx1", ROMREGION_ERASEFF ) /* Sprites */ @@ -3510,11 +3510,11 @@ NOTE: U67 & U68 are empty on this Original board. ***************************************************************************/ ROM_START( fjbuster ) // Fujiyama Buster - Japan version of Shogun Warriors - ROM_REGION( 0x040000, "maincpu", 0 ) /* 68000 Code */ + ROM_REGION( 0x040000, "maincpu", 0 ) /* 68000 Code */ ROM_LOAD16_BYTE( "fb030j.u61", 0x000000, 0x020000, CRC(32ce7909) SHA1(02d87342706ac9547eb611bd542f8498ba41e34a) ) ROM_LOAD16_BYTE( "fb031j.u62", 0x000001, 0x020000, CRC(000c8c08) SHA1(439daac1541c34557b5a4308ed69dfebb93abe13) ) - ROM_REGION( 0x020000, "cpu1", 0 ) /* MCU Code */ + ROM_REGION( 0x020000, "cpu1", 0 ) /* MCU Code */ ROM_LOAD( "fb040j.u33", 0x000000, 0x020000, CRC(299d0746) SHA1(67fe3a47ab01fa02ce2bb5836c2041986c19d875) ) ROM_REGION( 0x1000000, "gfx1", ROMREGION_ERASEFF ) /* Sprites */ @@ -3656,11 +3656,11 @@ Game can be ROM Swapped onto a Shogun Warriors board and works ROM_START( brapboys ) /* Single PCB, fully populated, no rom sub board */ - ROM_REGION( 0x040000, "maincpu", 0 ) /* 68000 Code */ + ROM_REGION( 0x040000, "maincpu", 0 ) /* 68000 Code */ ROM_LOAD16_BYTE( "rb-030.u61", 0x000000, 0x020000, CRC(ccbe9a53) SHA1(b96baf0ecbf6550bfaf8e512d9275c53a3928bee) ) ROM_LOAD16_BYTE( "rb-031.u62", 0x000001, 0x020000, CRC(c72b8dda) SHA1(450e1fb8acb140fa0ab23630daad82924f7ce72b) ) - ROM_REGION( 0x020000, "cpu1", 0 ) /* MCU Code */ + ROM_REGION( 0x020000, "cpu1", 0 ) /* MCU Code */ ROM_LOAD( "rb-040.u33", 0x000000, 0x020000, CRC(757c6e19) SHA1(0f1c37b1b1eb6b230c593e4648c4302f413a61f5) ) ROM_REGION( 0x800000, "gfx1", 0 ) /* Sprites */ @@ -3688,11 +3688,11 @@ ROM_END ROM_START( brapboysj ) /* The Japanese version has an extra rom??? and used a rom sub board */ - ROM_REGION( 0x040000, "maincpu", 0 ) /* 68000 Code */ + ROM_REGION( 0x040000, "maincpu", 0 ) /* 68000 Code */ ROM_LOAD16_BYTE( "rb-004.u61", 0x000000, 0x020000, CRC(5432442c) SHA1(f0f7328ece96ef25e6d4fd1958d734f64a9ef371) ) ROM_LOAD16_BYTE( "rb-005.u62", 0x000001, 0x020000, CRC(118b3cfb) SHA1(1690ecf5c629879bd97131ff77029e152919e45d) ) - ROM_REGION( 0x020000, "cpu1", 0 ) /* MCU Code */ + ROM_REGION( 0x020000, "cpu1", 0 ) /* MCU Code */ ROM_LOAD( "rb-006.u33", 0x000000, 0x020000, CRC(f1d76b20) SHA1(c571b5f28e529589ee2d7697ef5d4b60ccb66e7a) ) ROM_REGION( 0x1000000, "gfx1", 0 ) /* Sprites */ diff --git a/src/mame/drivers/karnov.c b/src/mame/drivers/karnov.c index b1b4e10ad60..59d94688c4d 100644 --- a/src/mame/drivers/karnov.c +++ b/src/mame/drivers/karnov.c @@ -186,7 +186,7 @@ static void chelnov_i8751_w( running_machine *machine, int data ) state->i8751_return = 1; /* patched */ if ((data & 0xf000) == 0x1000) state->i8751_level = 1; /* Level 1 */ - if ((data & 0xf000) == 0x2000) state->i8751_level++; /* Level Increment */ + if ((data & 0xf000) == 0x2000) state->i8751_level++; /* Level Increment */ if ((data & 0xf000) == 0x3000) { @@ -681,9 +681,9 @@ static const gfx_layout sprites = 16,16, 4096, 4, - { 0x60000*8,0x00000*8,0x20000*8,0x40000*8 }, + { 0x60000*8,0x00000*8,0x20000*8,0x40000*8 }, { 16*8, 1+(16*8), 2+(16*8), 3+(16*8), 4+(16*8), 5+(16*8), 6+(16*8), 7+(16*8), - 0,1,2,3,4,5,6,7 }, + 0,1,2,3,4,5,6,7 }, { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 ,8*8,9*8,10*8,11*8,12*8,13*8,14*8,15*8}, 16*16 }; @@ -695,9 +695,9 @@ static const gfx_layout tiles = 16,16, 2048, 4, - { 0x30000*8,0x00000*8,0x10000*8,0x20000*8 }, + { 0x30000*8,0x00000*8,0x10000*8,0x20000*8 }, { 16*8, 1+(16*8), 2+(16*8), 3+(16*8), 4+(16*8), 5+(16*8), 6+(16*8), 7+(16*8), - 0,1,2,3,4,5,6,7 }, + 0,1,2,3,4,5,6,7 }, { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 ,8*8,9*8,10*8,11*8,12*8,13*8,14*8,15*8}, 16*16 }; diff --git a/src/mame/drivers/kingobox.c b/src/mame/drivers/kingobox.c index a60fde76e75..2f2919136f9 100644 --- a/src/mame/drivers/kingobox.c +++ b/src/mame/drivers/kingobox.c @@ -336,7 +336,7 @@ static const gfx_layout charlayout = static const gfx_layout spritelayout = { 16,16, /* 16*16 chars */ - 1024, /* 1024 characters */ + 1024, /* 1024 characters */ 3, /* bits per pixel */ { 2*0x4000*8, 1*0x4000*8, 0*0x4000*8 }, { 3*0x4000*8+0,3*0x4000*8+1,3*0x4000*8+2,3*0x4000*8+3, @@ -394,7 +394,7 @@ static const gfx_layout rk_charlayout2 = static const gfx_layout rk_spritelayout = { 16,16, /* 16*16 chars */ - 1024, /* 1024 characters */ + 1024, /* 1024 characters */ 3, /* bits per pixel */ { 0*0x8000*8, 1*0x8000*8, 2*0x8000*8 }, { 7, 6, 5, 4, 3, 2, 1, 0, @@ -407,7 +407,7 @@ static const gfx_layout rk_spritelayout = static const gfx_layout rk_tilelayout = { 16,16, /* 16*16 chars */ - 512, /* 1024 characters */ + 512, /* 1024 characters */ 3, /* bits per pixel */ { 0*0x4000*8, 1*0x4000*8, 2*0x4000*8 }, { 7, 6, 5, 4, 3, 2, 1, 0, @@ -420,7 +420,7 @@ static const gfx_layout rk_tilelayout = static const gfx_layout rk_bglayout = { 16,16, /* 16*16 chars */ - 256, /* 1024 characters */ + 256, /* 1024 characters */ 3, /* bits per pixel */ { 0x4000*8+4, 0, 4 }, { 16*8+3, 16*8+2, 16*8+1, 16*8+0, 0x2000*8+3, 0x2000*8+2, 0x2000*8+1, 0x2000*8+0, diff --git a/src/mame/drivers/koftball.c b/src/mame/drivers/koftball.c index bf440a29d0d..c84fbd023e3 100644 --- a/src/mame/drivers/koftball.c +++ b/src/mame/drivers/koftball.c @@ -108,7 +108,7 @@ static READ16_HANDLER(prot_r) case 0x8000: return 0x0f0f; } - logerror("unk prot r %x %x\n",prot_data, cpu_get_previouspc(space->cpu)); + logerror("unk prot r %x %x\n",prot_data, cpu_get_previouspc(space->cpu)); return mame_rand(space->machine); } diff --git a/src/mame/drivers/koikoi.c b/src/mame/drivers/koikoi.c index 9149ff05382..deeae8ec34c 100644 --- a/src/mame/drivers/koikoi.c +++ b/src/mame/drivers/koikoi.c @@ -318,7 +318,7 @@ static const ay8910_interface ay8910_config = { AY8910_LEGACY_OUTPUT, AY8910_DEFAULT_LOADS, - DEVCB_NULL, DEVCB_HANDLER(input_r), + DEVCB_NULL, DEVCB_HANDLER(input_r), DEVCB_HANDLER(unknown_w), DEVCB_NULL }; diff --git a/src/mame/drivers/konamigx.c b/src/mame/drivers/konamigx.c index 032160bdea1..ac102ff2b54 100644 --- a/src/mame/drivers/konamigx.c +++ b/src/mame/drivers/konamigx.c @@ -1168,7 +1168,7 @@ static ADDRESS_MAP_START( gx_type1_map, ADDRESS_SPACE_PROGRAM, 32 ) AM_RANGE(0xe00000, 0xe0001f) AM_RAM AM_BASE((UINT32**)&K053936_0_ctrl) AM_RANGE(0xe20000, 0xe2000f) AM_WRITENOP AM_RANGE(0xe40000, 0xe40003) AM_WRITENOP - AM_RANGE(0xe80000, 0xe81fff) AM_RAM AM_BASE((UINT32**)&K053936_0_linectrl) // chips 21L+19L / S + AM_RANGE(0xe80000, 0xe81fff) AM_RAM AM_BASE((UINT32**)&K053936_0_linectrl) // chips 21L+19L / S AM_RANGE(0xec0000, 0xedffff) AM_RAM_WRITE(konamigx_t1_psacmap_w) AM_BASE(&gx_psacram) // chips 20J+23J+18J / S AM_RANGE(0xf00000, 0xf3ffff) AM_READ(type1_roz_r1) // ROM readback AM_RANGE(0xf40000, 0xf7ffff) AM_READ(type1_roz_r2) // ROM readback @@ -1205,7 +1205,7 @@ static ADDRESS_MAP_START( gx_type4_map, ADDRESS_SPACE_PROGRAM, 32 ) AM_RANGE(0xe40000, 0xe40003) AM_WRITENOP AM_RANGE(0xe60000, 0xe60fff) AM_RAM AM_BASE((UINT32**)&K053936_0_linectrl) // 29C & 29G (PSAC2 line control) AM_RANGE(0xe80000, 0xe87fff) AM_RAM AM_BASE_GENERIC(paletteram) // 11G/13G/15G (main screen palette RAM) - AM_RANGE(0xea0000, 0xea7fff) AM_RAM AM_BASE(&gx_subpaletteram32) // 5G/7G/9G (sub screen palette RAM) + AM_RANGE(0xea0000, 0xea7fff) AM_RAM AM_BASE(&gx_subpaletteram32) // 5G/7G/9G (sub screen palette RAM) AM_RANGE(0xec0000, 0xec0003) AM_READ(type3_sync_r) // type 4 polls this too AM_RANGE(0xf00000, 0xf07fff) AM_RAM_WRITE(konamigx_t4_psacmap_w) AM_BASE(&gx_psacram) // PSAC2 tilemap // AM_RANGE(0xf00000, 0xf07fff) AM_RAM @@ -1664,8 +1664,8 @@ static const gfx_layout bglayout_8bpp = 8, { 0, 1, 2, 3, 4, 5, 6, 7 }, { 0*128, 1*128, 2*128, 3*128, 4*128, 5*128, 6*128, 7*128, 8*128, 9*128, 10*128, 11*128, 12*128, 13*128, 14*128, 15*128 }, - { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8, 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 }, - 16*128 + { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8, 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 }, + 16*128 }; // for scanrows on tilemap @@ -2276,7 +2276,7 @@ ROM_START( rushhero ) /* data roms */ ROM_LOAD32_WORD_SWAP( "605a05.29r", 0x400000, 1024*1024, CRC(9bca4297) SHA1(c20be1ffcee8bd56f69d4fcc19d0035b3f74b8f2)) - ROM_LOAD32_WORD_SWAP( "605a04.31r", 0x400002, 1024*1024, CRC(f6788154) SHA1(093c145d5348b4f10193acc258f5539bd59138a1)) + ROM_LOAD32_WORD_SWAP( "605a04.31r", 0x400002, 1024*1024, CRC(f6788154) SHA1(093c145d5348b4f10193acc258f5539bd59138a1)) /* sound program */ ROM_REGION( 0x40000, "soundcpu", 0 ) @@ -2608,10 +2608,10 @@ ROM_START( soccerss ) ROM_LOAD( "427a18.145", 0x000000, 0x100000, CRC(bb6e6ec6) SHA1(aa1365a4318866d9e7e74461a6e6c113f83b6771) ) /* PSAC2 map data */ - ROM_REGION( 0x080000, "gfx4", ROMREGION_ERASE00 ) + ROM_REGION( 0x080000, "gfx4", ROMREGION_ERASE00 ) // 4 banks of 0x20000? (only the first 2 seem valid tho) // maybe this is CPU addressable and the 'garbage' is sprite related? - ROM_LOAD( "427a17.24c", 0x000000, 0x080000, CRC(fb6eb01f) SHA1(28cdb30ff70ee5fc7624e18fe048dd85dfa49ace) ) + ROM_LOAD( "427a17.24c", 0x000000, 0x080000, CRC(fb6eb01f) SHA1(28cdb30ff70ee5fc7624e18fe048dd85dfa49ace) ) /* 0x00000-0x1ffff pitch+crowd */ /* 0x20000-0x2ffff attract screens */ diff --git a/src/mame/drivers/konamim2.c b/src/mame/drivers/konamim2.c index 28f45034948..ef57db33c0b 100644 --- a/src/mame/drivers/konamim2.c +++ b/src/mame/drivers/konamim2.c @@ -1142,7 +1142,7 @@ static MACHINE_DRIVER_START( m2 ) MDRV_CPU_CONFIG(ppc602_config) MDRV_CPU_PROGRAM_MAP(m2_main) - /* video hardware */ + /* video hardware */ MDRV_SCREEN_ADD("screen", RASTER) MDRV_SCREEN_REFRESH_RATE(60) MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) diff --git a/src/mame/drivers/ksayakyu.c b/src/mame/drivers/ksayakyu.c index 3501164f198..b41f7b5ccf4 100644 --- a/src/mame/drivers/ksayakyu.c +++ b/src/mame/drivers/ksayakyu.c @@ -158,7 +158,7 @@ static INPUT_PORTS_START( ksayakyu ) PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) ) PORT_DIPSETTING( 0x02, DEF_STR( 1C_3C ) ) - PORT_DIPNAME( 0x04, 0x00, DEF_STR( Flip_Screen ) ) + PORT_DIPNAME( 0x04, 0x00, DEF_STR( Flip_Screen ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPSETTING( 0x04, DEF_STR( On ) ) PORT_DIPNAME( 0x08, 0x08, DEF_STR( Cabinet ) ) diff --git a/src/mame/drivers/ksys573.c b/src/mame/drivers/ksys573.c index 33dceaa290c..1adbbc8c593 100644 --- a/src/mame/drivers/ksys573.c +++ b/src/mame/drivers/ksys573.c @@ -886,7 +886,7 @@ static WRITE32_HANDLER( atapi_w ) switch (data) { case 0xa0: // PACKET - atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_DRQ; + atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_DRQ; atapi_regs[ATAPI_REG_INTREASON] = ATAPI_INTREASON_COMMAND; atapi_data_ptr = 0; @@ -900,7 +900,7 @@ static WRITE32_HANDLER( atapi_w ) break; case 0xa1: // IDENTIFY PACKET DEVICE - atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_DRQ; + atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_DRQ; atapi_data_ptr = 0; atapi_data_len = 512; @@ -947,7 +947,7 @@ static WRITE32_HANDLER( atapi_w ) break; case 0xef: // SET FEATURES - atapi_regs[ATAPI_REG_CMDSTATUS] = 0; + atapi_regs[ATAPI_REG_CMDSTATUS] = 0; atapi_data_ptr = 0; atapi_data_len = 0; @@ -1374,7 +1374,7 @@ static ADDRESS_MAP_START( konami573_map, ADDRESS_SPACE_PROGRAM, 32 ) AM_RANGE(0x1f480000, 0x1f48000f) AM_READWRITE( atapi_r, atapi_w ) // IDE controller, used mostly in ATAPI mode (only 3 pure IDE commands seen so far) AM_RANGE(0x1f500000, 0x1f500003) AM_READWRITE( control_r, control_w ) // Konami can't make a game without a "control" register. AM_RANGE(0x1f560000, 0x1f560003) AM_WRITE( atapi_reset_w ) - AM_RANGE(0x1f5c0000, 0x1f5c0003) AM_WRITENOP // watchdog? + AM_RANGE(0x1f5c0000, 0x1f5c0003) AM_WRITENOP // watchdog? AM_RANGE(0x1f620000, 0x1f623fff) AM_DEVREADWRITE8("m48t58", timekeeper_r, timekeeper_w, 0x00ff00ff) AM_RANGE(0x1f680000, 0x1f68001f) AM_READWRITE(mb89371_r, mb89371_w) AM_RANGE(0x1f6a0000, 0x1f6a0003) AM_READWRITE( security_r, security_w ) diff --git a/src/mame/drivers/kungfur.c b/src/mame/drivers/kungfur.c index ded82f72a56..e84abe86707 100644 --- a/src/mame/drivers/kungfur.c +++ b/src/mame/drivers/kungfur.c @@ -321,7 +321,7 @@ static const msm5205_interface msm5205_config_2 = static MACHINE_RESET( kungfur ) { - adpcm_pos[0] = adpcm_pos[1] = 0; + adpcm_pos[0] = adpcm_pos[1] = 0; adpcm_idle[0] = adpcm_idle[1] = 1; } diff --git a/src/mame/drivers/ladybug.c b/src/mame/drivers/ladybug.c index 6fdd8ff0696..1971efa49a3 100644 --- a/src/mame/drivers/ladybug.c +++ b/src/mame/drivers/ladybug.c @@ -176,7 +176,7 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( sraider_cpu2_io_map, ADDRESS_SPACE_IO, 8 ) - ADDRESS_MAP_GLOBAL_MASK(0xff) + ADDRESS_MAP_GLOBAL_MASK(0xff) AM_RANGE(0x00, 0x00) AM_DEVWRITE("sn1", sn76496_w) AM_RANGE(0x08, 0x08) AM_DEVWRITE("sn2", sn76496_w) AM_RANGE(0x10, 0x10) AM_DEVWRITE("sn3", sn76496_w) diff --git a/src/mame/drivers/laserbas.c b/src/mame/drivers/laserbas.c index 2c5e5afc245..91afeb05017 100644 --- a/src/mame/drivers/laserbas.c +++ b/src/mame/drivers/laserbas.c @@ -49,7 +49,7 @@ static VIDEO_UPDATE(laserbas) laserbas_state *state = (laserbas_state *)screen->machine->driver_data; int x, y; - for (y = 0; y < 256; y++) + for (y = 0; y < 256; y++) for(x = 0; x < 128; x++) { if (state->vram2[y * 128 + x] & 0xf) @@ -269,7 +269,7 @@ as a 2716 (FF.9), a 2532 like the others (FF.9A) and a 2732 (FF.9B). ROM_START( futflash ) ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD( "ff.1", 0x0000, 0x1000, CRC(bcd6b998) SHA1(4a210c40ce6015e2b921558b7571b7f2a27e1815) ) + ROM_LOAD( "ff.1", 0x0000, 0x1000, CRC(bcd6b998) SHA1(4a210c40ce6015e2b921558b7571b7f2a27e1815) ) ROM_LOAD( "ff.2", 0x1000, 0x1000, CRC(1b1f6953) SHA1(8cd7b7e2236700ce63c60b4d2286099c8091bdbd) ) ROM_LOAD( "ff.3", 0x2000, 0x1000, CRC(30008f04) SHA1(e03b2dbcb6d2615650cdd47ecf1d587906ce149b) ) ROM_LOAD( "ff.4", 0x3000, 0x1000, CRC(e559aa12) SHA1(0fecfb60b0147e8060c640f684f69503478200ff) ) diff --git a/src/mame/drivers/laserbat.c b/src/mame/drivers/laserbat.c index 2f9aa26dd27..1ce0290a0ae 100644 --- a/src/mame/drivers/laserbat.c +++ b/src/mame/drivers/laserbat.c @@ -557,7 +557,7 @@ static VIDEO_UPDATE( laserbat ) static const sn76477_interface laserbat_sn76477_interface = { - RES_K(47), /* 4 noise_res R21 47K */ + RES_K(47), /* 4 noise_res R21 47K */ 0, /* 5 filter_res (variable) */ CAP_P(1000), /* 6 filter_cap C21 1000 pF */ 0, /* 7 decay_res */ diff --git a/src/mame/drivers/lazercmd.c b/src/mame/drivers/lazercmd.c index ee5c16cfa9e..09dbe1f0e59 100644 --- a/src/mame/drivers/lazercmd.c +++ b/src/mame/drivers/lazercmd.c @@ -589,13 +589,13 @@ GFXDECODE_END static PALETTE_INIT( lazercmd ) { - palette_set_color(machine, 0, MAKE_RGB(0xb0, 0xb0, 0xb0)); /* white */ - palette_set_color(machine, 1, MAKE_RGB(0x00, 0x00, 0x00)); /* black */ + palette_set_color(machine, 0, MAKE_RGB(0xb0, 0xb0, 0xb0)); /* white */ + palette_set_color(machine, 1, MAKE_RGB(0x00, 0x00, 0x00)); /* black */ - palette_set_color(machine, 2, MAKE_RGB(0x00, 0x00, 0x00)); /* black */ - palette_set_color(machine, 3, MAKE_RGB(0xb0, 0xb0, 0xb0)); /* white */ + palette_set_color(machine, 2, MAKE_RGB(0x00, 0x00, 0x00)); /* black */ + palette_set_color(machine, 3, MAKE_RGB(0xb0, 0xb0, 0xb0)); /* white */ - palette_set_color(machine, 4, MAKE_RGB(0xff, 0xff, 0xff)); /* bright white */ + palette_set_color(machine, 4, MAKE_RGB(0xff, 0xff, 0xff)); /* bright white */ } @@ -637,7 +637,7 @@ static MACHINE_DRIVER_START( lazercmd ) thus requiring an extra loading of approx 3-5 */ MDRV_CPU_PROGRAM_MAP(lazercmd_map) MDRV_CPU_IO_MAP(lazercmd_portmap) - MDRV_CPU_VBLANK_INT_HACK(lazercmd_timer, 128) /* 7680 Hz */ + MDRV_CPU_VBLANK_INT_HACK(lazercmd_timer, 128) /* 7680 Hz */ MDRV_MACHINE_START(lazercmd) MDRV_MACHINE_RESET(lazercmd) @@ -678,7 +678,7 @@ static MACHINE_DRIVER_START( medlanes ) thus requiring an extra loading of approx 3-5 */ MDRV_CPU_PROGRAM_MAP(medlanes_map) MDRV_CPU_IO_MAP(lazercmd_portmap) - MDRV_CPU_VBLANK_INT_HACK(lazercmd_timer, 128) /* 7680 Hz */ + MDRV_CPU_VBLANK_INT_HACK(lazercmd_timer, 128) /* 7680 Hz */ MDRV_MACHINE_START(lazercmd) MDRV_MACHINE_RESET(lazercmd) @@ -719,7 +719,7 @@ static MACHINE_DRIVER_START( bbonk ) thus requiring an extra loading of approx 3-5 */ MDRV_CPU_PROGRAM_MAP(bbonk_map) MDRV_CPU_IO_MAP(lazercmd_portmap) - MDRV_CPU_VBLANK_INT_HACK(bbonk_timer, 128) /* 7680 Hz */ + MDRV_CPU_VBLANK_INT_HACK(bbonk_timer, 128) /* 7680 Hz */ MDRV_MACHINE_START(lazercmd) MDRV_MACHINE_RESET(lazercmd) diff --git a/src/mame/drivers/legionna.c b/src/mame/drivers/legionna.c index 68ce03fbdbc..10314b18c17 100644 --- a/src/mame/drivers/legionna.c +++ b/src/mame/drivers/legionna.c @@ -1042,7 +1042,7 @@ GFXDECODE_END static MACHINE_DRIVER_START( legionna ) /* basic machine hardware */ - MDRV_CPU_ADD("maincpu", M68000,20000000/2) /* ??? */ + MDRV_CPU_ADD("maincpu", M68000,20000000/2) /* ??? */ MDRV_CPU_PROGRAM_MAP(legionna_map) MDRV_CPU_VBLANK_INT("screen", irq4_line_hold)/* VBL */ @@ -1074,7 +1074,7 @@ MACHINE_DRIVER_END static MACHINE_DRIVER_START( heatbrl ) /* basic machine hardware */ - MDRV_CPU_ADD("maincpu", M68000,20000000/2) /* ??? */ + MDRV_CPU_ADD("maincpu", M68000,20000000/2) /* ??? */ MDRV_CPU_PROGRAM_MAP(heatbrl_map) MDRV_CPU_VBLANK_INT("screen", irq4_line_hold)/* VBL */ @@ -2116,7 +2116,7 @@ GAME( 1992, heatbrlo, heatbrl, heatbrl, heatbrl, 0, ROT0, "Tad", "Heated Ba GAME( 1992, heatbrlu, heatbrl, heatbrl, heatbrl, 0, ROT0, "Tad", "Heated Barrel (US)", GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING ) GAME( 1993, godzilla, 0, godzilla, godzilla, 0, ROT0, "Banpresto", "Godzilla", GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING ) -GAME( 1993, grainbow, 0, grainbow, grainbow, 0, ROT0, "Banpresto", "SD Gundam Sangokushi Rainbow Tairiku Senki", GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING ) +GAME( 1993, grainbow, 0, grainbow, grainbow, 0, ROT0, "Banpresto", "SD Gundam Sangokushi Rainbow Tairiku Senki", GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING ) GAME( 1993, denjinmk, 0, denjinmk, denjinmk, denjinmk, ROT0, "Banpresto", "Denjin Makai", GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING ) GAME( 1992, cupsoc, 0, cupsoc, cupsoc, 0, ROT0, "Seibu", "Seibu Cup Soccer (set 1)", GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING ) diff --git a/src/mame/drivers/leland.c b/src/mame/drivers/leland.c index 112a58274c8..a86d234a17a 100644 --- a/src/mame/drivers/leland.c +++ b/src/mame/drivers/leland.c @@ -123,7 +123,7 @@ ADDRESS_MAP_END *************************************/ /* Helps document the input ports. */ -#define IPT_SLAVEHALT IPT_SPECIAL +#define IPT_SLAVEHALT IPT_SPECIAL static INPUT_PORTS_START( cerberus ) /* complete, verified from code */ diff --git a/src/mame/drivers/lemmings.c b/src/mame/drivers/lemmings.c index 06b46c49f81..cd622850885 100644 --- a/src/mame/drivers/lemmings.c +++ b/src/mame/drivers/lemmings.c @@ -47,7 +47,7 @@ static READ16_HANDLER( lemmings_trackball_r ) /* Same as Robocop 2 protection chip */ static READ16_HANDLER( lemmings_prot_r ) { - switch (offset << 1) + switch (offset << 1) { case 0x41a: return input_port_read(space->machine, "BUTTONS"); @@ -325,19 +325,19 @@ ROM_START( lemmings ) ROM_LOAD( "lemmings.15", 0x00000, 0x10000, CRC(f0b24a35) SHA1(1aaeb1e6faee04d2e433161fd7aa965b58e3b8a7) ) ROM_REGION( 0x40000, "gfx1", 0 ) - ROM_LOAD( "lemmings.9", 0x000000, 0x10000, CRC(e06442f5) SHA1(d9c8b681cce1d0257a0446bc820c7d679e2a1168) ) + ROM_LOAD( "lemmings.9", 0x000000, 0x10000, CRC(e06442f5) SHA1(d9c8b681cce1d0257a0446bc820c7d679e2a1168) ) ROM_LOAD( "lemmings.10", 0x010000, 0x10000, CRC(36398848) SHA1(6c6956607f889c35367e6df4a32359042fad695e) ) - ROM_LOAD( "lemmings.11", 0x020000, 0x10000, CRC(b46a54e5) SHA1(53b053346f80357aecff4ab888a8562f99cb318f) ) + ROM_LOAD( "lemmings.11", 0x020000, 0x10000, CRC(b46a54e5) SHA1(53b053346f80357aecff4ab888a8562f99cb318f) ) ROM_FILL( 0x030000, 0x10000, 0 ) /* 3bpp data but sprite chip expects 4 */ ROM_REGION( 0x40000, "gfx2", 0 ) - ROM_LOAD( "lemmings.12", 0x000000, 0x10000, CRC(dc9047ff) SHA1(1bbe573fa51127a9e8b970a353f3cceab00f486a) ) - ROM_LOAD( "lemmings.13", 0x010000, 0x10000, CRC(7cc15491) SHA1(73c1c11b2738f6679c70cae8ac4c55cdc9b8fc27) ) + ROM_LOAD( "lemmings.12", 0x000000, 0x10000, CRC(dc9047ff) SHA1(1bbe573fa51127a9e8b970a353f3cceab00f486a) ) + ROM_LOAD( "lemmings.13", 0x010000, 0x10000, CRC(7cc15491) SHA1(73c1c11b2738f6679c70cae8ac4c55cdc9b8fc27) ) ROM_LOAD( "lemmings.14", 0x020000, 0x10000, CRC(c162788f) SHA1(e1f669efa59699cd1b7da71b112701ee79240c18) ) ROM_FILL( 0x030000, 0x10000, 0 ) /* 3bpp data but sprite chip expects 4 */ ROM_REGION( 0x40000, "oki", 0 ) /* ADPCM samples */ - ROM_LOAD( "lemmings.16", 0x00000, 0x20000, CRC(f747847c) SHA1(00880fa6dff979e5d15daea61938bd18c768c92f) ) + ROM_LOAD( "lemmings.16", 0x00000, 0x20000, CRC(f747847c) SHA1(00880fa6dff979e5d15daea61938bd18c768c92f) ) ROM_END /******************************************************************************/ diff --git a/src/mame/drivers/lethalj.c b/src/mame/drivers/lethalj.c index df162741f79..3c46d0d7207 100644 --- a/src/mame/drivers/lethalj.c +++ b/src/mame/drivers/lethalj.c @@ -493,9 +493,9 @@ static INPUT_PORTS_START( cfarm ) PORT_START("IN1") PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("ticket", ticket_dispenser_line_r) PORT_BIT( 0x0006, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1) - PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) - PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) + PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1) + PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) + PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) PORT_BIT( 0xffc0, IP_ACTIVE_LOW, IPT_UNUSED ) INPUT_PORTS_END @@ -544,11 +544,11 @@ static INPUT_PORTS_START( cclownz ) PORT_BIT( 0x0f0f, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(cclownz_paddle, NULL) PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_READ_LINE_DEVICE("ticket", ticket_dispenser_line_r) PORT_BIT( 0x0060, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_START1 ) + PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_START1 ) PORT_BIT( 0xf000, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_START("PADDLE") - PORT_BIT( 0x00ff, 0x0000, IPT_PADDLE ) PORT_PLAYER(1) PORT_SENSITIVITY(50) PORT_KEYDELTA(8) PORT_CENTERDELTA(0) PORT_REVERSE + PORT_BIT( 0x00ff, 0x0000, IPT_PADDLE ) PORT_PLAYER(1) PORT_SENSITIVITY(50) PORT_KEYDELTA(8) PORT_CENTERDELTA(0) PORT_REVERSE INPUT_PORTS_END diff --git a/src/mame/drivers/liberate.c b/src/mame/drivers/liberate.c index 76e74d3cdec..86fff9a00bb 100644 --- a/src/mame/drivers/liberate.c +++ b/src/mame/drivers/liberate.c @@ -248,7 +248,7 @@ static ADDRESS_MAP_START( prosport_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x0000, 0x03ff) AM_MIRROR(0x2000) AM_RAM AM_RANGE(0x0400, 0x07ff) AM_RAM_WRITE(prosport_bg_vram_w) AM_BASE(&prosport_bg_vram) AM_RANGE(0x0800, 0x1fff) AM_READWRITE(prosport_charram_r,prosport_charram_w) //0x1e00-0x1fff isn't charram! - AM_RANGE(0x2400, 0x2fff) AM_RAM + AM_RANGE(0x2400, 0x2fff) AM_RAM AM_RANGE(0x3000, 0x33ff) AM_RAM_WRITE(liberate_colorram_w) AM_BASE(&liberate_colorram) AM_RANGE(0x3400, 0x37ff) AM_RAM_WRITE(liberate_videoram_w) AM_BASE(&liberate_videoram) AM_RANGE(0x3800, 0x3fff) AM_RAM AM_BASE_GENERIC(spriteram) @@ -661,7 +661,7 @@ static const gfx_layout charlayout = 8,8, RGN_FRAC(1,3), 3, - { RGN_FRAC(2,3), RGN_FRAC(1,3), RGN_FRAC(0,3) }, + { RGN_FRAC(2,3), RGN_FRAC(1,3), RGN_FRAC(0,3) }, { 0,1,2,3,4,5,6,7 }, { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 }, 8*8 @@ -672,7 +672,7 @@ static const gfx_layout sprites = 16,16, RGN_FRAC(1,3), 3, - { RGN_FRAC(2,3), RGN_FRAC(1,3), RGN_FRAC(0,3) }, + { RGN_FRAC(2,3), RGN_FRAC(1,3), RGN_FRAC(0,3) }, { 16*8, 1+(16*8), 2+(16*8), 3+(16*8), 4+(16*8), 5+(16*8), 6+(16*8), 7+(16*8), 0,1,2,3,4,5,6,7 }, { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 ,8*8,9*8,10*8,11*8,12*8,13*8,14*8,15*8 }, @@ -728,7 +728,7 @@ static const gfx_layout pro_tiles = 16,16, RGN_FRAC(1,2), 3, - { 4,0, RGN_FRAC(1,2)+4 }, + { 4,0, RGN_FRAC(1,2)+4 }, { 384+0, 384+1, 384+2, 384+3, 256+0, 256+1, 256+2, 256+3, 128+0, 128+1, 128+2, 128+3, @@ -1233,9 +1233,9 @@ ROM_END ROM_START( liberate ) ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD( "bt12-2.bin", 0x8000, 0x4000, CRC(a0079ffd) SHA1(340398352500a33f01dca07dd9c86ad3a78f227e) ) + ROM_LOAD( "bt12-2.bin", 0x8000, 0x4000, CRC(a0079ffd) SHA1(340398352500a33f01dca07dd9c86ad3a78f227e) ) ROM_RELOAD( 0x0000, 0x4000 ) - ROM_LOAD( "bt13-2.bin", 0xc000, 0x4000, CRC(19f8485c) SHA1(1e2a68e4cf6b96c53832f7d020f14a45de19967d) ) + ROM_LOAD( "bt13-2.bin", 0xc000, 0x4000, CRC(19f8485c) SHA1(1e2a68e4cf6b96c53832f7d020f14a45de19967d) ) ROM_REGION( 0x10000, "audiocpu", 0 ) ROM_LOAD( "bt11.bin", 0xe000, 0x2000, CRC(b549ccaa) SHA1(e4c8350fea61ed85d21037cbd4c3c50f9a9de09f) ) @@ -1249,8 +1249,8 @@ ROM_START( liberate ) ROM_LOAD( "bt07.bin", 0x10000, 0x2000, CRC(f919e8e2) SHA1(e9eafa10f024aa522947f6098480bddf1fbe960f) ) ROM_REGION( 0x8000, "gfx2", 0 ) - ROM_LOAD( "bt02.bin", 0x0000, 0x4000, CRC(7169f7bb) SHA1(06e45a15d7e878d0a6063c2fab55d065334935b2) ) - ROM_LOAD( "bt00.bin", 0x4000, 0x2000, CRC(b744454d) SHA1(664619c3907c538f353d8ac04d66086dcfbd53d4) ) + ROM_LOAD( "bt02.bin", 0x0000, 0x4000, CRC(7169f7bb) SHA1(06e45a15d7e878d0a6063c2fab55d065334935b2) ) + ROM_LOAD( "bt00.bin", 0x4000, 0x2000, CRC(b744454d) SHA1(664619c3907c538f353d8ac04d66086dcfbd53d4) ) /* On early revision bt02 is split as BT01-A (0x2000) BT02-A (0x2000) */ ROM_REGION(0x4000, "user1", 0 ) @@ -1270,7 +1270,7 @@ ROM_START( dualaslt ) ROM_LOAD( "bt11.bin", 0xe000, 0x2000, CRC(b549ccaa) SHA1(e4c8350fea61ed85d21037cbd4c3c50f9a9de09f) ) ROM_REGION( 0x12000, "gfx1", 0 ) - ROM_LOAD( "bt04-5", 0x00000, 0x4000, CRC(159a3e85) SHA1(e916ee7e96c7c64d9ef05ff410d0cbba4d1b8ad0) ) /* Chars/Sprites */ + ROM_LOAD( "bt04-5", 0x00000, 0x4000, CRC(159a3e85) SHA1(e916ee7e96c7c64d9ef05ff410d0cbba4d1b8ad0) ) /* Chars/Sprites */ ROM_LOAD( "bt03.bin", 0x04000, 0x2000, CRC(29ad1b59) SHA1(4d5a385ccad4cdebe87300ef08e1220bc9303673) ) ROM_LOAD( "bt06-5", 0x06000, 0x4000, CRC(3b5a80c8) SHA1(8b55b18ab46a64381fc135e84ab82fc451ee722d) ) ROM_LOAD( "bt05.bin", 0x0a000, 0x2000, CRC(a8896c20) SHA1(c21412c8a6b10719d324ce7ecb01ec4e9d803932) ) @@ -1280,7 +1280,7 @@ ROM_START( dualaslt ) ROM_REGION( 0x8000, "gfx2", 0 ) ROM_LOAD( "bt01", 0x0000, 0x2000, CRC(c0ddbeb5) SHA1(043c3ef2aa62a0e8b650d4daddb944e694078e01) ) ROM_LOAD( "bt02a", 0x2000, 0x2000, CRC(846d9d24) SHA1(d0c395876601cf666dcf40a0f95e461095a98df4) ) - ROM_LOAD( "bt00.bin", 0x4000, 0x2000, CRC(b744454d) SHA1(664619c3907c538f353d8ac04d66086dcfbd53d4) ) + ROM_LOAD( "bt00.bin", 0x4000, 0x2000, CRC(b744454d) SHA1(664619c3907c538f353d8ac04d66086dcfbd53d4) ) ROM_REGION(0x4000, "user1", 0 ) ROM_LOAD( "bt09", 0x0000, 0x2000, CRC(2ea31472) SHA1(2e3125b53755260a036dfc2940970eeb4c5c058b) ) @@ -1297,7 +1297,7 @@ ROM_START( liberateb ) ROM_LOAD( "liber4.c18", 0xa000, 0x2000, CRC(0e8db1ce) SHA1(bb7b77c31b3bb2c0d523f5cad4ef46d42a9dc857) ) ROM_RELOAD( 0x2000, 0x2000) ROM_LOAD( "liber3.c20", 0xc000, 0x2000, CRC(16c423f3) SHA1(0cf3c46c9fc13eb0f61a3945d3db6ca2f9ab76fe) ) - ROM_LOAD( "liber5.c19", 0xe000, 0x2000, CRC(7738c194) SHA1(54fb094150481640f40d8a2066e43dc647980cda) ) + ROM_LOAD( "liber5.c19", 0xe000, 0x2000, CRC(7738c194) SHA1(54fb094150481640f40d8a2066e43dc647980cda) ) ROM_REGION( 0x10000, "audiocpu", 0 ) ROM_LOAD( "bt11.bin", 0xe000, 0x2000, CRC(b549ccaa) SHA1(e4c8350fea61ed85d21037cbd4c3c50f9a9de09f) ) @@ -1311,8 +1311,8 @@ ROM_START( liberateb ) ROM_LOAD( "bt07.bin", 0x10000, 0x2000, CRC(f919e8e2) SHA1(e9eafa10f024aa522947f6098480bddf1fbe960f) ) ROM_REGION( 0x8000, "gfx2", 0 ) - ROM_LOAD( "bt02.bin", 0x0000, 0x4000, CRC(7169f7bb) SHA1(06e45a15d7e878d0a6063c2fab55d065334935b2) ) - ROM_LOAD( "bt00.bin", 0x4000, 0x2000, CRC(b744454d) SHA1(664619c3907c538f353d8ac04d66086dcfbd53d4) ) + ROM_LOAD( "bt02.bin", 0x0000, 0x4000, CRC(7169f7bb) SHA1(06e45a15d7e878d0a6063c2fab55d065334935b2) ) + ROM_LOAD( "bt00.bin", 0x4000, 0x2000, CRC(b744454d) SHA1(664619c3907c538f353d8ac04d66086dcfbd53d4) ) ROM_REGION(0x4000, "user1", 0 ) ROM_LOAD( "bt10.bin", 0x0000, 0x4000, CRC(ee335397) SHA1(2d54f93d330357033b8ebc4bc052383c25156311) ) diff --git a/src/mame/drivers/liberatr.c b/src/mame/drivers/liberatr.c index 0b13c33b8db..1da6d4f9c8a 100644 --- a/src/mame/drivers/liberatr.c +++ b/src/mame/drivers/liberatr.c @@ -212,7 +212,7 @@ static ADDRESS_MAP_START( liberatr_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x0000, 0x0000) AM_RAM AM_BASE(&liberatr_x) AM_RANGE(0x0001, 0x0001) AM_RAM AM_BASE(&liberatr_y) AM_RANGE(0x0002, 0x0002) AM_READWRITE(liberatr_bitmap_xy_r, liberatr_bitmap_xy_w) - AM_RANGE(0x0000, 0x3fff) AM_RAM_WRITE(liberatr_bitmap_w) AM_BASE(&liberatr_bitmapram) /* overlapping for my convenience */ + AM_RANGE(0x0000, 0x3fff) AM_RAM_WRITE(liberatr_bitmap_w) AM_BASE(&liberatr_bitmapram) /* overlapping for my convenience */ AM_RANGE(0x4000, 0x403f) AM_DEVREAD("earom", atari_vg_earom_r) AM_RANGE(0x5000, 0x5000) AM_READ(liberatr_input_port_0_r) AM_RANGE(0x5001, 0x5001) AM_READ_PORT("IN1") @@ -245,7 +245,7 @@ static ADDRESS_MAP_START( liberat2_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x0000, 0x0000) AM_RAM AM_BASE(&liberatr_x) AM_RANGE(0x0001, 0x0001) AM_RAM AM_BASE(&liberatr_y) AM_RANGE(0x0002, 0x0002) AM_READWRITE(liberatr_bitmap_xy_r, liberatr_bitmap_xy_w) - AM_RANGE(0x0000, 0x3fff) AM_RAM_WRITE(liberatr_bitmap_w) AM_BASE(&liberatr_bitmapram) /* overlapping for my convenience */ + AM_RANGE(0x0000, 0x3fff) AM_RAM_WRITE(liberatr_bitmap_w) AM_BASE(&liberatr_bitmapram) /* overlapping for my convenience */ AM_RANGE(0x4000, 0x4000) AM_READ(liberatr_input_port_0_r) AM_RANGE(0x4001, 0x4001) AM_READ_PORT("IN1") AM_RANGE(0x4000, 0x400f) AM_WRITEONLY AM_BASE(&liberatr_base_ram) @@ -455,7 +455,7 @@ ROM_START( liberatr ) ROM_LOAD_NIB_HIGH( "136012.126", 0x0000, 0x0100, CRC(2e670aa6) SHA1(a6bcc49d0948d2dfe497c5e3ad4a834fa78f779a) ) ROM_REGION( 0x200, "proms", 0 ) - ROM_LOAD( "136012.021", 0x0000, 0x0100, CRC(ffdcd7bc) SHA1(2ce733203d628e299ec4fb93db8be1598b49142c) ) /* write protect PROM */ + ROM_LOAD( "136012.021", 0x0000, 0x0100, CRC(ffdcd7bc) SHA1(2ce733203d628e299ec4fb93db8be1598b49142c) ) /* write protect PROM */ ROM_LOAD( "136012.022", 0x0100, 0x0100, CRC(3353edce) SHA1(915308b11096fc1d02acf9b4af806a2a935dd748) ) /* sync PROM */ ROM_END @@ -485,7 +485,7 @@ ROM_START( liberatr2 ) ROM_LOAD_NIB_HIGH( "136012.126", 0x0000, 0x0100, CRC(2e670aa6) SHA1(a6bcc49d0948d2dfe497c5e3ad4a834fa78f779a) ) ROM_REGION( 0x200, "proms", 0 ) - ROM_LOAD( "136012.021", 0x0000, 0x0100, CRC(ffdcd7bc) SHA1(2ce733203d628e299ec4fb93db8be1598b49142c) ) /* write protect PROM */ + ROM_LOAD( "136012.021", 0x0000, 0x0100, CRC(ffdcd7bc) SHA1(2ce733203d628e299ec4fb93db8be1598b49142c) ) /* write protect PROM */ ROM_LOAD( "136012.022", 0x0100, 0x0100, CRC(3353edce) SHA1(915308b11096fc1d02acf9b4af806a2a935dd748) ) /* sync PROM */ ROM_END diff --git a/src/mame/drivers/lockon.c b/src/mame/drivers/lockon.c index e19a0d298e6..4d5d8049987 100644 --- a/src/mame/drivers/lockon.c +++ b/src/mame/drivers/lockon.c @@ -257,15 +257,15 @@ static INPUT_PORTS_START( lockon ) PORT_DIPSETTING( 0x0500, DEF_STR( 1C_6C ) ) PORT_DIPSETTING( 0x0700, DEF_STR( Free_Play ) ) - PORT_DIPNAME( 0x3800, 0x0000, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW2:4,5,6") - PORT_DIPSETTING( 0x3000, DEF_STR( 4C_1C ) ) - PORT_DIPSETTING( 0x0800, DEF_STR( 2C_1C ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) ) - PORT_DIPSETTING( 0x1000, DEF_STR( 1C_2C ) ) - PORT_DIPSETTING( 0x2000, DEF_STR( 1C_3C ) ) - PORT_DIPSETTING( 0x2800, DEF_STR( 1C_4C ) ) - PORT_DIPSETTING( 0x1800, DEF_STR( 1C_5C ) ) - PORT_DIPSETTING( 0x3800, DEF_STR( 1C_6C ) ) + PORT_DIPNAME( 0x3800, 0x0000, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW2:4,5,6") + PORT_DIPSETTING( 0x3000, DEF_STR( 4C_1C ) ) + PORT_DIPSETTING( 0x0800, DEF_STR( 2C_1C ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) ) + PORT_DIPSETTING( 0x1000, DEF_STR( 1C_2C ) ) + PORT_DIPSETTING( 0x2000, DEF_STR( 1C_3C ) ) + PORT_DIPSETTING( 0x2800, DEF_STR( 1C_4C ) ) + PORT_DIPSETTING( 0x1800, DEF_STR( 1C_5C ) ) + PORT_DIPSETTING( 0x3800, DEF_STR( 1C_6C ) ) /* Wire jumper beside the dipswitches on PCB TF011. @@ -318,15 +318,15 @@ static INPUT_PORTS_START( lockone ) PORT_DIPSETTING( 0x0400, DEF_STR( 1C_2C ) ) PORT_DIPSETTING( 0x0500, DEF_STR( 1C_3C ) ) - PORT_DIPNAME( 0x0800, 0x0000, "Buy-In" ) - PORT_DIPSETTING( 0x0800, DEF_STR( 2C_1C ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) ) + PORT_DIPNAME( 0x0800, 0x0000, "Buy-In" ) + PORT_DIPSETTING( 0x0800, DEF_STR( 2C_1C ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) ) PORT_DIPNAME( 0x1000, 0x0000, DEF_STR( Unused ) ) PORT_DIPSETTING( 0x1000, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) PORT_DIPNAME( 0x2000, 0x0000, DEF_STR( Unused ) ) - PORT_DIPSETTING( 0x2000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x2000, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) INPUT_PORTS_END diff --git a/src/mame/drivers/lvcards.c b/src/mame/drivers/lvcards.c index a1be10e5823..9670ff7595c 100644 --- a/src/mame/drivers/lvcards.c +++ b/src/mame/drivers/lvcards.c @@ -279,7 +279,7 @@ static INPUT_PORTS_START( lvcards ) INPUT_PORTS_END static INPUT_PORTS_START( lvpoker ) - PORT_START("IN0") + PORT_START("IN0") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Analyzer") PORT_TOGGLE PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_MINUS) PORT_NAME("Memory Reset") @@ -329,7 +329,7 @@ static INPUT_PORTS_START( lvpoker ) PORT_DIPSETTING( 0x00, "Credit In/Coin Out") PORT_DIPSETTING( 0x20, "Credit In/Credit Out") PORT_DIPSETTING( 0x40, "Coin In/Coin Out") - //PORT_DIPSETTING( 0x60, "Credit In/Coin Out") Again, clearly no Coin in, Credit out + //PORT_DIPSETTING( 0x60, "Credit In/Coin Out") Again, clearly no Coin in, Credit out PORT_DIPNAME( 0x80, 0x80, "Memory Reset Switch" ) PORT_DIPSETTING( 0x80, "Disabled" ) PORT_DIPSETTING( 0x00, "Enabled" ) @@ -407,7 +407,7 @@ static INPUT_PORTS_START( ponttehk ) PORT_DIPSETTING( 0x00, "Credit In/Coin Out" ) PORT_DIPSETTING( 0x20, "Coin In/Coin Out" ) PORT_DIPSETTING( 0x40, "Credit In/Credit Out" ) - //PORT_DIPSETTING( 0x60, "Credit In/Coin Out" ) Again, clearly no Coin in, Credit out + //PORT_DIPSETTING( 0x60, "Credit In/Coin Out" ) Again, clearly no Coin in, Credit out PORT_DIPNAME( 0x80, 0x80, "Reset All Switch" ) PORT_DIPSETTING( 0x80, "Disabled" ) PORT_DIPSETTING( 0x00, "Enabled" ) @@ -472,7 +472,7 @@ static const ay8910_interface lcay8910_interface = static MACHINE_DRIVER_START( lvcards ) // basic machine hardware - MDRV_CPU_ADD("maincpu",Z80, 18432000/6) // 3.072 MHz ? + MDRV_CPU_ADD("maincpu",Z80, 18432000/6) // 3.072 MHz ? MDRV_CPU_PROGRAM_MAP(lvcards_map) MDRV_CPU_IO_MAP(lvcards_io_map) @@ -507,7 +507,7 @@ static MACHINE_DRIVER_START( lvpoker ) // basic machine hardware MDRV_NVRAM_HANDLER(generic_1fill) - MDRV_CPU_MODIFY("maincpu") + MDRV_CPU_MODIFY("maincpu") MDRV_CPU_PROGRAM_MAP(lvpoker_map) MDRV_MACHINE_START(lvpoker) MDRV_MACHINE_RESET(lvpoker) @@ -518,7 +518,7 @@ static MACHINE_DRIVER_START( ponttehk ) // basic machine hardware MDRV_NVRAM_HANDLER(generic_1fill) - MDRV_CPU_MODIFY("maincpu") + MDRV_CPU_MODIFY("maincpu") MDRV_CPU_PROGRAM_MAP(ponttehk_map) MDRV_MACHINE_RESET(lvpoker) @@ -587,6 +587,6 @@ ROM_START( ponttehk ) ROM_LOAD( "pon24s10.001", 0x0200, 0x0100, CRC(c64ecee8) SHA1(80c9ec21e135235f7f2d41ce7900cf3904123823) ) /* blue component */ ROM_END -GAME( 1985, lvcards, 0, lvcards, lvcards, 0, ROT0, "Tehkan", "Lovely Cards", 0 ) +GAME( 1985, lvcards, 0, lvcards, lvcards, 0, ROT0, "Tehkan", "Lovely Cards", 0 ) GAME( 1985, lvpoker, lvcards, lvpoker, lvpoker, 0, ROT0, "Tehkan", "Lovely Poker [BET]", 0 ) GAME( 1985, ponttehk, 0, ponttehk, ponttehk, 0, ROT0, "Tehkan", "Pontoon (Tehkan)", 0 ) diff --git a/src/mame/drivers/m10.c b/src/mame/drivers/m10.c index 3da2a40e9cd..eabe4854c80 100644 --- a/src/mame/drivers/m10.c +++ b/src/mame/drivers/m10.c @@ -481,8 +481,8 @@ static WRITE8_HANDLER( m15_a100_w ) static READ8_HANDLER( m10_a700_r ) { - m10_state *state = (m10_state *)space->machine->driver_data; - //LOG(("rd:%d\n",video_screen_get_vpos(space->machine->primary_screen))); + m10_state *state = (m10_state *)space->machine->driver_data; + //LOG(("rd:%d\n",video_screen_get_vpos(space->machine->primary_screen))); LOG(("clear\n")); ttl74123_clear_w(state->ic8j1, 0, 0); ttl74123_clear_w(state->ic8j1, 0, 1); @@ -492,7 +492,7 @@ static READ8_HANDLER( m10_a700_r ) static READ8_HANDLER( m11_a700_r ) { m10_state *state = (m10_state *)space->machine->driver_data; - //LOG(("rd:%d\n",video_screen_get_vpos(space->machine->primary_screen))); + //LOG(("rd:%d\n",video_screen_get_vpos(space->machine->primary_screen))); //cpu_set_input_line(state->maincpu, 0, CLEAR_LINE); LOG(("clear\n")); ttl74123_clear_w(state->ic8j1, 0, 0); @@ -548,7 +548,7 @@ static INTERRUPT_GEN( m10_interrupt ) static INTERRUPT_GEN( m15_interrupt ) { cpu_set_input_line(device, 0, ASSERT_LINE); - timer_set(device->machine, video_screen_get_time_until_pos(device->machine->primary_screen, IREMM10_VBSTART + 1, 80), NULL, -1, interrupt_callback); + timer_set(device->machine, video_screen_get_time_until_pos(device->machine->primary_screen, IREMM10_VBSTART + 1, 80), NULL, -1, interrupt_callback); } /************************************* diff --git a/src/mame/drivers/m72.c b/src/mame/drivers/m72.c index 60b234ecd9a..a024b8c34b7 100644 --- a/src/mame/drivers/m72.c +++ b/src/mame/drivers/m72.c @@ -616,7 +616,7 @@ static const UINT8 loht_code[CODE_LEN] = 0xc6,0x06,0x00,0x0b,0x49^0xff, // mov [0b00h], byte 049h 0x68,0x00,0xd0, // push 0d000h // Japan set only - 0x1f, // pop ds // Japan set only + 0x1f, // pop ds // Japan set only 0xc6,0x06,0x70,0x16,0x57, // mov [1670h], byte 057h // Japan set only - checks this (W) of WARNING 0xea,0x5d,0x01,0x40,0x00 // jmp 0040:$015d @@ -826,7 +826,7 @@ static READ16_HANDLER( poundfor_trackball_r ) } -#define CPU1_MEMORY(NAME,ROMSIZE,WORKRAM) \ +#define CPU1_MEMORY(NAME,ROMSIZE,WORKRAM) \ static ADDRESS_MAP_START( NAME##_map, ADDRESS_SPACE_PROGRAM, 16 ) \ AM_RANGE(0x00000, ROMSIZE-1) AM_ROM \ AM_RANGE(WORKRAM, WORKRAM+0x3fff) AM_RAM /* work RAM */ \ diff --git a/src/mame/drivers/m79amb.c b/src/mame/drivers/m79amb.c index 77d8005d454..b2e780b1469 100644 --- a/src/mame/drivers/m79amb.c +++ b/src/mame/drivers/m79amb.c @@ -224,7 +224,7 @@ static DRIVER_INIT( m79amb ) int i,j; /* PROM data is active low */ - for (i = 0;i < 0x2000;i++) + for (i = 0;i < 0x2000;i++) rom[i] = ~rom[i]; /* gun positions */ diff --git a/src/mame/drivers/m90.c b/src/mame/drivers/m90.c index 69cf140ea94..17efa0bfe5d 100644 --- a/src/mame/drivers/m90.c +++ b/src/mame/drivers/m90.c @@ -747,7 +747,7 @@ static MACHINE_DRIVER_START( hasamu ) MDRV_CPU_CONFIG(hasamu_config) MACHINE_DRIVER_END -static const nec_config quizf1_config ={ lethalth_decryption_table, }; +static const nec_config quizf1_config ={ lethalth_decryption_table, }; static MACHINE_DRIVER_START( quizf1 ) MDRV_IMPORT_FROM( m90 ) MDRV_CPU_MODIFY("maincpu") @@ -756,7 +756,7 @@ static MACHINE_DRIVER_START( quizf1 ) MDRV_SCREEN_VISIBLE_AREA(6*8, 54*8-1, 17*8-8, 47*8-1+8) MACHINE_DRIVER_END -static const nec_config matchit2_config ={ matchit2_decryption_table, }; +static const nec_config matchit2_config ={ matchit2_decryption_table, }; static MACHINE_DRIVER_START( matchit2 ) MDRV_IMPORT_FROM( m90 ) MDRV_CPU_MODIFY("maincpu") @@ -766,7 +766,7 @@ static MACHINE_DRIVER_START( matchit2 ) MACHINE_DRIVER_END -static const nec_config riskchal_config ={ gussun_decryption_table, }; +static const nec_config riskchal_config ={ gussun_decryption_table, }; static MACHINE_DRIVER_START( riskchal ) MDRV_IMPORT_FROM( m90 ) MDRV_CPU_MODIFY("maincpu") @@ -820,7 +820,7 @@ static MACHINE_DRIVER_START( bombrman ) MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.10) MACHINE_DRIVER_END -static const nec_config dynablaster_config ={ dynablaster_decryption_table, }; +static const nec_config dynablaster_config ={ dynablaster_decryption_table, }; static MACHINE_DRIVER_START( bbmanw ) diff --git a/src/mame/drivers/m92.c b/src/mame/drivers/m92.c index 3b158b57a4b..03793e159fd 100644 --- a/src/mame/drivers/m92.c +++ b/src/mame/drivers/m92.c @@ -959,7 +959,7 @@ static MACHINE_DRIVER_START( m92 ) MACHINE_DRIVER_END -static const nec_config gunforce_config ={ gunforce_decryption_table, }; +static const nec_config gunforce_config ={ gunforce_decryption_table, }; static MACHINE_DRIVER_START( gunforce ) MDRV_IMPORT_FROM( m92 ) MDRV_CPU_MODIFY("soundcpu") diff --git a/src/mame/drivers/macrossp.c b/src/mame/drivers/macrossp.c index 473199324b5..dc21fec9725 100644 --- a/src/mame/drivers/macrossp.c +++ b/src/mame/drivers/macrossp.c @@ -382,7 +382,7 @@ static void update_colors(running_machine *machine) else { b-=fade_effect; } g = ((machine->generic.paletteram.u32[i] & 0x00ff0000) >>16); if(fade_effect > g) { g = 0; } - else { g-=fade_effect; } + else { g-=fade_effect; } r = ((machine->generic.paletteram.u32[i] & 0xff000000) >>24); if(fade_effect > r) { r = 0; } else { r-=fade_effect; } @@ -431,7 +431,7 @@ static ADDRESS_MAP_START( macrossp_map, ADDRESS_SPACE_PROGRAM, 32 ) AM_RANGE(0xb00008, 0xb0000b) AM_WRITENOP // irq related? AM_RANGE(0xb0000c, 0xb0000f) AM_READ_PORT("DSW") AM_WRITENOP AM_RANGE(0xb00010, 0xb00013) AM_WRITE(macrossp_palette_fade_w) // macrossp palette fade - AM_RANGE(0xb00020, 0xb00023) AM_WRITENOP + AM_RANGE(0xb00020, 0xb00023) AM_WRITENOP AM_RANGE(0xc00000, 0xc00003) AM_WRITE(macrossp_soundcmd_w) diff --git a/src/mame/drivers/macs.c b/src/mame/drivers/macs.c index 5eb7fb013f4..3f0abcb8e62 100644 --- a/src/mame/drivers/macs.c +++ b/src/mame/drivers/macs.c @@ -112,7 +112,7 @@ static READ8_HANDLER( macs_input_r ) case 5: return input_port_read(space->machine, "DSW3"); case 6: return input_port_read(space->machine, "DSW4"); case 7: return input_port_read(space->machine, "SYS1"); - default: popmessage("Unmapped I/O read at PC = %06x offset = %02x",cpu_get_pc(space->cpu),offset+0xc0); + default: popmessage("Unmapped I/O read at PC = %06x offset = %02x",cpu_get_pc(space->cpu),offset+0xc0); } return 0xff; @@ -603,7 +603,7 @@ static MACHINE_RESET(macs) memcpy(macs_ram1 + 0x0800, memory_region(machine, "user1")+0x73fa, 0x507); memcpy(macs_ram1 + 0x1800, memory_region(machine, "user1")+0x73fa, 0x507); -#define MAKEJMP(n,m) macs_ram2[(n) - 0xe800 + 0]=0xc3;\ +#define MAKEJMP(n,m) macs_ram2[(n) - 0xe800 + 0]=0xc3;\ macs_ram2[(n) - 0xe800 + 1]=(m)&0xff;\ macs_ram2[(n) - 0xe800 + 2]=((m)>>8)&0xff; diff --git a/src/mame/drivers/magicard.c b/src/mame/drivers/magicard.c index 1368f395f02..3ffb4ba226f 100644 --- a/src/mame/drivers/magicard.c +++ b/src/mame/drivers/magicard.c @@ -626,7 +626,7 @@ static INTERRUPT_GEN( magicard_irq ) static MACHINE_DRIVER_START( magicard ) MDRV_CPU_ADD("maincpu", SCC68070, CLOCK_A/2) /* SCC-68070 CCA84 datasheet */ MDRV_CPU_PROGRAM_MAP(magicard_mem) - MDRV_CPU_VBLANK_INT("screen", magicard_irq) /* no interrupts? (it erases the vectors..) */ + MDRV_CPU_VBLANK_INT("screen", magicard_irq) /* no interrupts? (it erases the vectors..) */ MDRV_SCREEN_ADD("screen", RASTER) MDRV_SCREEN_REFRESH_RATE(60) diff --git a/src/mame/drivers/mainevt.c b/src/mame/drivers/mainevt.c index 7b1319317c8..432033df651 100644 --- a/src/mame/drivers/mainevt.c +++ b/src/mame/drivers/mainevt.c @@ -297,7 +297,7 @@ static INPUT_PORTS_START( mainevt ) PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "SW1:7" ) /* Listed as "Unused" */ PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW1:8" ) /* Listed as "Unused" */ - PORT_START("DSW2") + PORT_START("DSW2") PORT_DIPUNUSED_DIPLOC( 0x01, 0x01, "SW2:1" ) /* Listed as "Unused" */ PORT_DIPUNUSED_DIPLOC( 0x02, 0x02, "SW2:2" ) /* Listed as "Unused" */ PORT_DIPUNUSED_DIPLOC( 0x04, 0x04, "SW2:3" ) /* Listed as "Unused" */ @@ -392,7 +392,7 @@ INPUT_PORTS_END static INPUT_PORTS_START( devstor2 ) PORT_INCLUDE( devstors ) - PORT_MODIFY("DSW2") + PORT_MODIFY("DSW2") PORT_DIPNAME( 0x04, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW2:3") PORT_DIPSETTING( 0x00, DEF_STR( Upright ) ) PORT_DIPSETTING( 0x04, DEF_STR( Cocktail ) ) @@ -681,7 +681,7 @@ ROM_START( devstors ) ROM_LOAD( "63s141n.k14", 0x0000, 0x0100, CRC(d3620106) SHA1(528a0a34754902d0f262a9619c6105da6de99354) ) /* priority encoder (not used) */ ROM_REGION( 0x80000, "konami", 0 ) /* 512k for 007232 samples */ - ROM_LOAD( "890f03.d4", 0x00000, 0x80000, CRC(19065031) SHA1(12c47fbe28f85fa2f901fe52601188a5e9633f22) ) + ROM_LOAD( "890f03.d4", 0x00000, 0x80000, CRC(19065031) SHA1(12c47fbe28f85fa2f901fe52601188a5e9633f22) ) ROM_END ROM_START( devstors2 ) @@ -706,7 +706,7 @@ ROM_START( devstors2 ) ROM_LOAD( "63s141n.k14", 0x0000, 0x0100, CRC(d3620106) SHA1(528a0a34754902d0f262a9619c6105da6de99354) ) /* priority encoder (not used) */ ROM_REGION( 0x80000, "konami", 0 ) /* 512k for 007232 samples */ - ROM_LOAD( "890f03.d4", 0x00000, 0x80000, CRC(19065031) SHA1(12c47fbe28f85fa2f901fe52601188a5e9633f22) ) + ROM_LOAD( "890f03.d4", 0x00000, 0x80000, CRC(19065031) SHA1(12c47fbe28f85fa2f901fe52601188a5e9633f22) ) ROM_END ROM_START( devstors3 ) @@ -731,7 +731,7 @@ ROM_START( devstors3 ) ROM_LOAD( "63s141n.k14", 0x0000, 0x0100, CRC(d3620106) SHA1(528a0a34754902d0f262a9619c6105da6de99354) ) /* priority encoder (not used) */ ROM_REGION( 0x80000, "konami", 0 ) /* 512k for 007232 samples */ - ROM_LOAD( "890f03.d4", 0x00000, 0x80000, CRC(19065031) SHA1(12c47fbe28f85fa2f901fe52601188a5e9633f22) ) + ROM_LOAD( "890f03.d4", 0x00000, 0x80000, CRC(19065031) SHA1(12c47fbe28f85fa2f901fe52601188a5e9633f22) ) ROM_END ROM_START( garuka ) @@ -756,7 +756,7 @@ ROM_START( garuka ) ROM_LOAD( "63s141n.k14", 0x0000, 0x0100, CRC(d3620106) SHA1(528a0a34754902d0f262a9619c6105da6de99354) ) /* priority encoder (not used) */ ROM_REGION( 0x80000, "konami", 0 ) /* 512k for 007232 samples */ - ROM_LOAD( "890f03.d4", 0x00000, 0x80000, CRC(19065031) SHA1(12c47fbe28f85fa2f901fe52601188a5e9633f22) ) + ROM_LOAD( "890f03.d4", 0x00000, 0x80000, CRC(19065031) SHA1(12c47fbe28f85fa2f901fe52601188a5e9633f22) ) ROM_END diff --git a/src/mame/drivers/mainsnk.c b/src/mame/drivers/mainsnk.c index 1bee9c10a4f..9826daba5a5 100644 --- a/src/mame/drivers/mainsnk.c +++ b/src/mame/drivers/mainsnk.c @@ -400,8 +400,8 @@ static MACHINE_DRIVER_START( mainsnk ) MDRV_CPU_VBLANK_INT("screen", irq0_line_hold) MDRV_CPU_ADD("audiocpu", Z80,4000000) - MDRV_CPU_PROGRAM_MAP(sound_map) - MDRV_CPU_IO_MAP(sound_portmap) + MDRV_CPU_PROGRAM_MAP(sound_map) + MDRV_CPU_IO_MAP(sound_portmap) MDRV_CPU_PERIODIC_INT(irq0_line_hold, 244) /* video hardware */ diff --git a/src/mame/drivers/malzak.c b/src/mame/drivers/malzak.c index 69302242bc9..49c0bb97b59 100644 --- a/src/mame/drivers/malzak.c +++ b/src/mame/drivers/malzak.c @@ -362,7 +362,7 @@ static const saa5050_interface malzac_saa5050_intf = "screen", 1, /* starting gfxnum */ 42, 24, 64, /* x, y, size */ - 1 /* rev y order */ + 1 /* rev y order */ }; diff --git a/src/mame/drivers/mappy.c b/src/mame/drivers/mappy.c index 7ef89efea19..621ecb9f704 100644 --- a/src/mame/drivers/mappy.c +++ b/src/mame/drivers/mappy.c @@ -899,7 +899,7 @@ static ADDRESS_MAP_START( phozon_cpu1_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x4800, 0x480f) AM_DEVREADWRITE("namcoio_1", namcoio_r, namcoio_w) /* custom I/O chips interface */ AM_RANGE(0x4810, 0x481f) AM_DEVREADWRITE("namcoio_2", namcoio_r, namcoio_w) /* custom I/O chips interface */ AM_RANGE(0x5000, 0x500f) AM_WRITE(phozon_latch_w) /* various control bits */ - AM_RANGE(0x7000, 0x7000) AM_WRITE(watchdog_reset_w) /* watchdog reset */ + AM_RANGE(0x7000, 0x7000) AM_WRITE(watchdog_reset_w) /* watchdog reset */ AM_RANGE(0x8000, 0xffff) AM_ROM /* ROM */ ADDRESS_MAP_END @@ -937,7 +937,7 @@ ADDRESS_MAP_END /* extra CPU only present in Phozon */ static ADDRESS_MAP_START( phozon_cpu3_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x0000, 0x07ff) AM_RAM_WRITE(superpac_videoram_w) AM_SHARE("share2") /* video RAM */ - AM_RANGE(0x0800, 0x1fff) AM_RAM AM_SHARE("share3") /* shared RAM with CPU #2/sprite RAM*/ + AM_RANGE(0x0800, 0x1fff) AM_RAM AM_SHARE("share3") /* shared RAM with CPU #2/sprite RAM*/ AM_RANGE(0x4000, 0x43ff) AM_RAM_DEVWRITE("namco", mappy_snd_sharedram_w) AM_SHARE("share1") /* shared RAM with CPU #2 */ AM_RANGE(0xa000, 0xa7ff) AM_RAM /* RAM */ AM_RANGE(0xe000, 0xffff) AM_ROM /* ROM */ diff --git a/src/mame/drivers/mario.c b/src/mame/drivers/mario.c index df1de5db6ae..1906ce0fc08 100644 --- a/src/mame/drivers/mario.c +++ b/src/mame/drivers/mario.c @@ -304,7 +304,7 @@ static const gfx_layout spritelayout = static GFXDECODE_START( mario ) GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0, 16 ) - GFXDECODE_ENTRY( "gfx2", 0, spritelayout, 0, 32 ) + GFXDECODE_ENTRY( "gfx2", 0, spritelayout, 0, 32 ) GFXDECODE_END diff --git a/src/mame/drivers/maygay1b.c b/src/mame/drivers/maygay1b.c index 7ed2209a0dd..a2ecf91df55 100644 --- a/src/mame/drivers/maygay1b.c +++ b/src/mame/drivers/maygay1b.c @@ -55,12 +55,12 @@ struct _i8279_state UINT8 inhibit; UINT8 clear; UINT8 ram[16]; - UINT8 read_sensor; - UINT8 write_display; - UINT8 sense_address; - UINT8 sense_auto_inc; - UINT8 disp_address; - UINT8 disp_auto_inc; + UINT8 read_sensor; + UINT8 write_display; + UINT8 sense_address; + UINT8 sense_auto_inc; + UINT8 disp_address; + UINT8 disp_auto_inc; }; static i8279_state i8279[2]; @@ -155,7 +155,7 @@ static READ8_HANDLER( m1_8279_r ) { result = input_port_read(space->machine,portnames[chip->sense_address]); // break - } + } if ( chip->sense_auto_inc ) { chip->sense_address = (chip->sense_address + 1 ) & 7; @@ -239,7 +239,7 @@ static WRITE8_HANDLER( m1_8279_w ) /* command 2: read FIFO/sensor RAM */ case 0x40: chip->sense_address = data & 0x07; - chip->sense_auto_inc = data & 0x10; + chip->sense_auto_inc = data & 0x10; chip->read_sensor = 1; break; /* command 3: read display RAM */ @@ -285,7 +285,7 @@ static WRITE8_HANDLER( m1_8279_w ) chip->ram[chip->disp_address] = data; if ( chip->disp_auto_inc ) chip->disp_address ++; - } + } } static READ8_HANDLER( m1_8279_2_r ) @@ -397,7 +397,7 @@ static WRITE8_HANDLER( m1_8279_2_w ) /* command 2: read FIFO/sensor RAM */ case 0x40: chip->sense_address = data & 0x07; - chip->sense_auto_inc = data & 0x10; + chip->sense_auto_inc = data & 0x10; chip->read_sensor = 1; break; /* command 3: read display RAM */ @@ -435,7 +435,7 @@ static WRITE8_HANDLER( m1_8279_2_w ) chip->ram[chip->disp_address] = data; if ( chip->disp_auto_inc ) chip->disp_address ++; - } + } } diff --git a/src/mame/drivers/mcr68.c b/src/mame/drivers/mcr68.c index c0e6ea1e278..df22cae3e49 100644 --- a/src/mame/drivers/mcr68.c +++ b/src/mame/drivers/mcr68.c @@ -468,7 +468,7 @@ static INPUT_PORTS_START( xenophob ) PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_BIT( 0x0018, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_TILT ) - PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_SERVICE1 ) + PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_SERVICE( 0x0080, IP_ACTIVE_LOW ) PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1) PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1) diff --git a/src/mame/drivers/meadows.c b/src/mame/drivers/meadows.c index 780fd5d6b6d..d88691878e3 100644 --- a/src/mame/drivers/meadows.c +++ b/src/mame/drivers/meadows.c @@ -636,7 +636,7 @@ static const samples_interface meadows_samples_interface = static const samples_interface bowl3d_samples_interface = { - 1, + 1, bowl3d_sample_names }; @@ -651,9 +651,9 @@ static const samples_interface bowl3d_samples_interface = static MACHINE_DRIVER_START( meadows ) /* basic machine hardware */ - MDRV_CPU_ADD("maincpu", S2650, MASTER_CLOCK/8) /* 5MHz / 8 = 625 kHz */ + MDRV_CPU_ADD("maincpu", S2650, MASTER_CLOCK/8) /* 5MHz / 8 = 625 kHz */ MDRV_CPU_PROGRAM_MAP(meadows_main_map) - MDRV_CPU_VBLANK_INT("screen", meadows_interrupt) /* one interrupt per frame!? */ + MDRV_CPU_VBLANK_INT("screen", meadows_interrupt) /* one interrupt per frame!? */ MDRV_CPU_ADD("audiocpu", S2650, MASTER_CLOCK/8) /* 5MHz / 8 = 625 kHz */ MDRV_CPU_PROGRAM_MAP(audio_map) @@ -715,9 +715,9 @@ MACHINE_DRIVER_END static MACHINE_DRIVER_START( bowl3d ) /* basic machine hardware */ - MDRV_CPU_ADD("maincpu", S2650, MASTER_CLOCK/8) /* 5MHz / 8 = 625 kHz */ + MDRV_CPU_ADD("maincpu", S2650, MASTER_CLOCK/8) /* 5MHz / 8 = 625 kHz */ MDRV_CPU_PROGRAM_MAP(bowl3d_main_map) - MDRV_CPU_VBLANK_INT("screen", meadows_interrupt) /* one interrupt per frame!? */ + MDRV_CPU_VBLANK_INT("screen", meadows_interrupt) /* one interrupt per frame!? */ MDRV_CPU_ADD("audiocpu", S2650, MASTER_CLOCK/8) /* 5MHz / 8 = 625 kHz */ MDRV_CPU_PROGRAM_MAP(audio_map) @@ -749,7 +749,7 @@ static MACHINE_DRIVER_START( bowl3d ) MDRV_SOUND_CONFIG(meadows_samples_interface) MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) - /* audio hardware */ + /* audio hardware */ MDRV_SOUND_ADD("samples2", SAMPLES, 0) MDRV_SOUND_CONFIG(bowl3d_samples_interface) MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) @@ -801,7 +801,7 @@ ROM_START( bowl3d ) // h13 empty /* Universal Game Logic according to schematics */ - ROM_REGION( 0x08000, "audiocpu", 0 ) /* 2650 CPU at j8 */ + ROM_REGION( 0x08000, "audiocpu", 0 ) /* 2650 CPU at j8 */ ROM_LOAD( "82s115.a6", 0x0000, 0x0001, NO_DUMP ) /* 82s115 eprom */ ROM_LOAD( "82s115.c6", 0x0000, 0x0001, NO_DUMP ) /* 82s115 eprom */ diff --git a/src/mame/drivers/mediagx.c b/src/mame/drivers/mediagx.c index a6f0bb7628d..1ece6d412ba 100644 --- a/src/mame/drivers/mediagx.c +++ b/src/mame/drivers/mediagx.c @@ -1072,7 +1072,7 @@ static MACHINE_DRIVER_START(mediagx) MDRV_NVRAM_HANDLER( mc146818 ) - /* video hardware */ + /* video hardware */ MDRV_SCREEN_ADD("screen", RASTER) MDRV_SCREEN_REFRESH_RATE(60) MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32) diff --git a/src/mame/drivers/megadriv.c b/src/mame/drivers/megadriv.c index 254bee99eea..c60290bc40d 100644 --- a/src/mame/drivers/megadriv.c +++ b/src/mame/drivers/megadriv.c @@ -436,7 +436,7 @@ static void write_cram_value(running_machine *machine, int offset, int data) if (genvdp_use_cram) { int r,g,b; - r = ((data >> 1)&0x07); + r = ((data >> 1)&0x07); g = ((data >> 5)&0x07); b = ((data >> 9)&0x07); palette_set_color_rgb(machine,offset,pal3bit(r),pal3bit(g),pal3bit(b)); @@ -518,8 +518,8 @@ static void megadriv_vdp_data_port_w(running_machine *machine, int data) else { - switch (megadrive_vdp_code & 0x000f) - { + switch (megadrive_vdp_code & 0x000f) + { case 0x0000: logerror("Attempting to WRITE to DATA PORT in VRAM READ MODE\n"); break; @@ -1016,8 +1016,8 @@ static UINT16 megadriv_vdp_data_port_r(running_machine *machine) megadrive_vdp_command_pending = 0; - switch (megadrive_vdp_code & 0x000f) - { + switch (megadrive_vdp_code & 0x000f) + { case 0x0000: retdata = vdp_vram_r(); megadrive_vdp_address+=MEGADRIVE_REG0F_AUTO_INC; diff --git a/src/mame/drivers/megaplay.c b/src/mame/drivers/megaplay.c index 07a2ed4787d..740630b9686 100644 --- a/src/mame/drivers/megaplay.c +++ b/src/mame/drivers/megaplay.c @@ -133,7 +133,7 @@ static INPUT_PORTS_START ( megaplay ) PORT_SERVICE_NO_TOGGLE( 0x80, IP_ACTIVE_LOW ) PORT_START("COIN") - PORT_BIT ( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) + PORT_BIT ( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_BIT ( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_BIT ( 0x04, IP_ACTIVE_HIGH, IPT_UNKNOWN ) PORT_BIT ( 0x08, IP_ACTIVE_HIGH, IPT_UNKNOWN ) @@ -763,11 +763,11 @@ ROM_START( mp_twc ) /* Tecmo World Cup */ ROM_LOAD16_BYTE( "ep15182.ic1", 0x000001, 0x040000, CRC(eb8325c3) SHA1(bb21ac926c353e14184dd476222bc6a8714606e5) ) /* Game Instruction rom copied to 0x300000 - 0x310000 (odd / even bytes equal) */ - ROM_REGION( 0x8000, "user1", 0 ) /* Game Instructions */ + ROM_REGION( 0x8000, "user1", 0 ) /* Game Instructions */ ROM_LOAD( "ep15175-04.ic3", 0x000000, 0x08000, CRC(faf7c030) SHA1(16ef405335b4d3ecb0b7d97b088dafc4278d4726) ) - ROM_REGION( 0x28000, "mtbios", 0 ) /* Bios */ - MEGAPLAY_BIOS + ROM_REGION( 0x28000, "mtbios", 0 ) /* Bios */ + MEGAPLAY_BIOS ROM_END ROM_START( mp_sor2 ) /* Streets of Rage 2 */ diff --git a/src/mame/drivers/megasys1.c b/src/mame/drivers/megasys1.c index 2d11506c891..b6730d3341d 100644 --- a/src/mame/drivers/megasys1.c +++ b/src/mame/drivers/megasys1.c @@ -3519,7 +3519,7 @@ void phantasm_rom_decode(running_machine *machine, const char *region) else if (i < 0x10000/2) { y = BITSWAP_2; } else if (i < 0x18000/2) { if ( (i | (0x248/2)) != i ) {y = BITSWAP_0;} else {y = BITSWAP_1;} } else if (i < 0x20000/2) { y = BITSWAP_1; } - else { y = BITSWAP_2; } + else { y = BITSWAP_2; } #undef BITSWAP_0 #undef BITSWAP_1 @@ -3554,7 +3554,7 @@ void astyanax_rom_decode(running_machine *machine, const char *region) else if (i < 0x10000/2) { y = BITSWAP_2; } else if (i < 0x18000/2) { if ( (i | (0x248/2)) != i ) {y = BITSWAP_0;} else {y = BITSWAP_1;} } else if (i < 0x20000/2) { y = BITSWAP_1; } - else { y = BITSWAP_2; } + else { y = BITSWAP_2; } #undef BITSWAP_0 #undef BITSWAP_1 @@ -3587,7 +3587,7 @@ void rodland_rom_decode(running_machine *machine, const char *region) else if (i < 0x10000/2) { if ( (i | (0x248/2)) != i ) {y = BITSWAP_2;} else {y = BITSWAP_3;} } else if (i < 0x18000/2) { if ( (i | (0x248/2)) != i ) {y = BITSWAP_0;} else {y = BITSWAP_1;} } else if (i < 0x20000/2) { y = BITSWAP_1; } - else { y = BITSWAP_3; } + else { y = BITSWAP_3; } #undef BITSWAP_0 #undef BITSWAP_1 diff --git a/src/mame/drivers/megatech.c b/src/mame/drivers/megatech.c index d161a1d78e2..c346214279f 100644 --- a/src/mame/drivers/megatech.c +++ b/src/mame/drivers/megatech.c @@ -424,8 +424,8 @@ static WRITE8_HANDLER( megatech_banked_ram_w ) static ADDRESS_MAP_START( megatech_bios_map, ADDRESS_SPACE_PROGRAM, 8 ) - AM_RANGE(0x0000, 0x2fff) AM_ROM // from bios rom (0x0000-0x2fff populated in ROM) - AM_RANGE(0x3000, 0x3fff) AM_READWRITE(megatech_banked_ram_r, megatech_banked_ram_w) // copies instruction data here at startup, must be banked + AM_RANGE(0x0000, 0x2fff) AM_ROM // from bios rom (0x0000-0x2fff populated in ROM) + AM_RANGE(0x3000, 0x3fff) AM_READWRITE(megatech_banked_ram_r, megatech_banked_ram_w) // copies instruction data here at startup, must be banked AM_RANGE(0x4000, 0x5fff) AM_RAM // plain ram? AM_RANGE(0x6000, 0x6000) AM_WRITE( mt_z80_bank_w ) AM_RANGE(0x6400, 0x6400) AM_READ_PORT("BIOS_DSW0") @@ -435,7 +435,7 @@ static ADDRESS_MAP_START( megatech_bios_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x6801, 0x6801) AM_READ_PORT("BIOS_IN1") AM_RANGE(0x6802, 0x6807) AM_READWRITE(bios_ctrl_r, bios_ctrl_w) // AM_RANGE(0x6805, 0x6805) AM_READ_PORT("???") - AM_RANGE(0x7000, 0x77ff) AM_ROM // from bios rom (0x7000-0x77ff populated in ROM) + AM_RANGE(0x7000, 0x77ff) AM_ROM // from bios rom (0x7000-0x77ff populated in ROM) //AM_RANGE(0x7800, 0x7fff) AM_RAM // ? AM_RANGE(0x8000, 0x9fff) AM_READ(megatech_instr_r) // window into 68k address space, reads instr rom and writes to reset banks on z80 carts? ADDRESS_MAP_END diff --git a/src/mame/drivers/megazone.c b/src/mame/drivers/megazone.c index eadd075ccdb..8389da4f032 100644 --- a/src/mame/drivers/megazone.c +++ b/src/mame/drivers/megazone.c @@ -114,9 +114,9 @@ static ADDRESS_MAP_START( megazone_sound_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x0000, 0x1fff) AM_ROM AM_RANGE(0x2000, 0x2000) AM_WRITE(megazone_i8039_irq_w) /* START line. Interrupts 8039 */ AM_RANGE(0x4000, 0x4000) AM_WRITE(soundlatch_w) /* CODE line. Command Interrupts 8039 */ - AM_RANGE(0x6000, 0x6000) AM_READ_PORT("IN0") /* IO Coin */ - AM_RANGE(0x6001, 0x6001) AM_READ_PORT("IN1") /* P1 IO */ - AM_RANGE(0x6002, 0x6002) AM_READ_PORT("IN2") /* P2 IO */ + AM_RANGE(0x6000, 0x6000) AM_READ_PORT("IN0") /* IO Coin */ + AM_RANGE(0x6001, 0x6001) AM_READ_PORT("IN1") /* P1 IO */ + AM_RANGE(0x6002, 0x6002) AM_READ_PORT("IN2") /* P2 IO */ AM_RANGE(0x8000, 0x8000) AM_READ_PORT("DSW1") AM_RANGE(0x8001, 0x8001) AM_READ_PORT("DSW2") AM_RANGE(0xa000, 0xa000) AM_WRITENOP /* INTMAIN - Interrupts main CPU (unused) */ diff --git a/src/mame/drivers/merit.c b/src/mame/drivers/merit.c index 3f6264d6e43..660556a0b5d 100644 --- a/src/mame/drivers/merit.c +++ b/src/mame/drivers/merit.c @@ -1309,14 +1309,14 @@ ROM_START( pitbossa ) ROM_END ROM_START( pitbossb ) - ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD( "m4a1.u5", 0x0000, 0x2000, CRC(f5284472) SHA1(9170b90d06caa382be29feb2f6e80993bba1e07e) ) /* Games included in this set are: */ - ROM_LOAD( "m4a1.u6", 0x2000, 0x2000, CRC(dd8df5fe) SHA1(dab8c1077058263729b2589dd9bf9989ad53be1c) ) /* Draw Poker, Blackjack, Acey Deucey & The Dice Game */ - ROM_LOAD( "m4a1.u7", 0x4000, 0x2000, CRC(5fa5d436) SHA1(9f3fd81eae7f378268f3b4af8fd299ffb97d7fb6) ) - - ROM_REGION( 0x6000, "gfx1", 0 ) - ROM_LOAD( "chr2.u39", 0x0000, 0x2000, CRC(f9613e7b) SHA1(1e8cafe142a235d65b43c7e46a79ed4f6272b61c) ) /* Shows: */ - ROM_LOAD( "chr2.u38", 0x2000, 0x2000, CRC(7af28902) SHA1(04f685389958d581aaf2c86940d1b8b8cec05d7a) ) /* (c) 1983 Merit industries Phila. PA. */ + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "m4a1.u5", 0x0000, 0x2000, CRC(f5284472) SHA1(9170b90d06caa382be29feb2f6e80993bba1e07e) ) /* Games included in this set are: */ + ROM_LOAD( "m4a1.u6", 0x2000, 0x2000, CRC(dd8df5fe) SHA1(dab8c1077058263729b2589dd9bf9989ad53be1c) ) /* Draw Poker, Blackjack, Acey Deucey & The Dice Game */ + ROM_LOAD( "m4a1.u7", 0x4000, 0x2000, CRC(5fa5d436) SHA1(9f3fd81eae7f378268f3b4af8fd299ffb97d7fb6) ) + + ROM_REGION( 0x6000, "gfx1", 0 ) + ROM_LOAD( "chr2.u39", 0x0000, 0x2000, CRC(f9613e7b) SHA1(1e8cafe142a235d65b43c7e46a79ed4f6272b61c) ) /* Shows: */ + ROM_LOAD( "chr2.u38", 0x2000, 0x2000, CRC(7af28902) SHA1(04f685389958d581aaf2c86940d1b8b8cec05d7a) ) /* (c) 1983 Merit industries Phila. PA. */ ROM_LOAD( "chr2.u37", 0x4000, 0x2000, CRC(ea6f0c59) SHA1(f2c0ff99518c2cec3eb1b4042fa3754a702c0e34) ) /* All Rights Reserverd */ ROM_REGION( 0x2000, "gfx2", 0 ) @@ -1324,13 +1324,13 @@ ROM_START( pitbossb ) ROM_END ROM_START( pitbossc ) /* Program roms on a CTR-202 daughter card */ - ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD( "2214-04.u5-0", 0x0000, 0x2000, CRC(10b782e7) SHA1(158819898ad81506c47b76ffe2a949ee7208740f) ) /* Games included in this set are: */ - ROM_LOAD( "2214-04.u6-0", 0x2000, 0x2000, CRC(c3fd6510) SHA1(8c89fd2cbcb6f12fa6427883700971f7c39f6ccf) ) /* Joker Poker, Blackjack, Foto Finish & The Dice Game */ + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "2214-04.u5-0", 0x0000, 0x2000, CRC(10b782e7) SHA1(158819898ad81506c47b76ffe2a949ee7208740f) ) /* Games included in this set are: */ + ROM_LOAD( "2214-04.u6-0", 0x2000, 0x2000, CRC(c3fd6510) SHA1(8c89fd2cbcb6f12fa6427883700971f7c39f6ccf) ) /* Joker Poker, Blackjack, Foto Finish & The Dice Game */ ROM_RELOAD( 0x4000, 0x2000 ) - ROM_LOAD( "2214-04.u7-0", 0x6000, 0x4000, CRC(c5cf7060) SHA1(4a3209ad24ae649348b0e0470fc446d37b667975) ) /* 27128 eprom */ + ROM_LOAD( "2214-04.u7-0", 0x6000, 0x4000, CRC(c5cf7060) SHA1(4a3209ad24ae649348b0e0470fc446d37b667975) ) /* 27128 eprom */ - ROM_REGION( 0x6000, "gfx1", 0 ) + ROM_REGION( 0x6000, "gfx1", 0 ) ROM_LOAD( "chr7.u39", 0x0000, 0x2000, CRC(6662f607) SHA1(6b423f8de011d196700839af0be37effbf87383f) ) /* Shows: */ ROM_LOAD( "chr7.u38", 0x2000, 0x2000, CRC(a014b44f) SHA1(906d426b1de75f26030c19dcd599b6570909f510) ) /* (c) 1983 Merit industries */ ROM_LOAD( "chr7.u37", 0x4000, 0x2000, CRC(cb12e139) SHA1(06fe91281faae5d0c0ae4b3cd8ad103bd3995c38) ) diff --git a/src/mame/drivers/meritm.c b/src/mame/drivers/meritm.c index 7a2f30bf6ef..c1c71523242 100644 --- a/src/mame/drivers/meritm.c +++ b/src/mame/drivers/meritm.c @@ -977,7 +977,7 @@ static MACHINE_DRIVER_START(meritm_crt250) MDRV_CPU_PROGRAM_MAP(meritm_crt250_map) MDRV_CPU_IO_MAP(meritm_crt250_io_map) MDRV_CPU_CONFIG(meritm_daisy_chain) - MDRV_CPU_VBLANK_INT_HACK(meritm_interrupt,262) + MDRV_CPU_VBLANK_INT_HACK(meritm_interrupt,262) MDRV_MACHINE_START(meritm_crt250) @@ -990,7 +990,7 @@ static MACHINE_DRIVER_START(meritm_crt250) MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK) - MDRV_SCREEN_ADD("screen",RASTER) + MDRV_SCREEN_ADD("screen",RASTER) MDRV_SCREEN_REFRESH_RATE(60) MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) diff --git a/src/mame/drivers/mermaid.c b/src/mame/drivers/mermaid.c index c5931e0bfa0..704b3c0cb49 100644 --- a/src/mame/drivers/mermaid.c +++ b/src/mame/drivers/mermaid.c @@ -406,8 +406,8 @@ ROM_START( mermaid ) ROM_LOAD( "g960_43.26", 0x0000, 0x1000, CRC(6f077417) SHA1(f2c20e03427a2f5a113c6a4cf95875b77a0ec418) ) ROM_REGION( 0x40, "proms", 0 ) - ROM_LOAD( "col_a.96", 0x0000, 0x0020, CRC(ef87bcd6) SHA1(00a5888ad028fabeb7369eed33be5cd49b6b7bb0) ) - ROM_LOAD( "col_b.95", 0x0020, 0x0020, CRC(ca48abdd) SHA1(a864612c2c33acddfa9993ed10a1d63d2e3f145d) ) + ROM_LOAD( "col_a.96", 0x0000, 0x0020, CRC(ef87bcd6) SHA1(00a5888ad028fabeb7369eed33be5cd49b6b7bb0) ) + ROM_LOAD( "col_b.95", 0x0020, 0x0020, CRC(ca48abdd) SHA1(a864612c2c33acddfa9993ed10a1d63d2e3f145d) ) ROM_REGION( 0x1000, "user1", 0 ) // unknown ROM_LOAD( "g960_42.39", 0x0000, 0x1000, CRC(287840bb) SHA1(9a1836f39f328b0c9672976d95a9ece45bb9e89f) ) @@ -476,8 +476,8 @@ ROM_START( yachtmn ) ROM_LOAD( "g960_43.26", 0x0000, 0x1000, CRC(6f077417) SHA1(f2c20e03427a2f5a113c6a4cf95875b77a0ec418) ) // merv_2.26 ROM_REGION( 0x40, "proms", 0 ) - ROM_LOAD( "col_a.96", 0x0000, 0x0020, CRC(ef87bcd6) SHA1(00a5888ad028fabeb7369eed33be5cd49b6b7bb0) ) // col_a.96 - ROM_LOAD( "col_b.95", 0x0020, 0x0020, CRC(ca48abdd) SHA1(a864612c2c33acddfa9993ed10a1d63d2e3f145d) ) // col_b.95 + ROM_LOAD( "col_a.96", 0x0000, 0x0020, CRC(ef87bcd6) SHA1(00a5888ad028fabeb7369eed33be5cd49b6b7bb0) ) // col_a.96 + ROM_LOAD( "col_b.95", 0x0020, 0x0020, CRC(ca48abdd) SHA1(a864612c2c33acddfa9993ed10a1d63d2e3f145d) ) // col_b.95 ROM_REGION( 0x1000, "user1", 0 ) // unknown ROM_LOAD( "g960_42.39", 0x0000, 0x1000, CRC(287840bb) SHA1(9a1836f39f328b0c9672976d95a9ece45bb9e89f) ) // mervce.39 diff --git a/src/mame/drivers/metro.c b/src/mame/drivers/metro.c index 0b87b940d3f..4882cabad2b 100644 --- a/src/mame/drivers/metro.c +++ b/src/mame/drivers/metro.c @@ -957,7 +957,7 @@ static ADDRESS_MAP_START( bangball_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0xe78860, 0xe7886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window) // Tilemap Window AM_RANGE(0xe78870, 0xe7887b) AM_WRITEONLY AM_BASE(&metro_scroll) // Scroll AM_RANGE(0xe78880, 0xe78881) AM_WRITENOP // ? increasing - AM_RANGE(0xe78890, 0xe78891) AM_WRITENOP // ? increasing + AM_RANGE(0xe78890, 0xe78891) AM_WRITENOP // ? increasing AM_RANGE(0xe788a2, 0xe788a3) AM_READWRITE(metro_irq_cause_r,metro_irq_cause_w) // IRQ Cause / IRQ Acknowledge AM_RANGE(0xe788a4, 0xe788a5) AM_WRITEONLY AM_BASE(&metro_irq_enable) // IRQ Enable AM_RANGE(0xe788aa, 0xe788ab) AM_WRITEONLY AM_BASE(&metro_rombank) // Rom Bank @@ -1026,7 +1026,7 @@ static ADDRESS_MAP_START( daitorid_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x4788aa, 0x4788ab) AM_WRITEONLY AM_BASE(&metro_rombank) // Rom Bank AM_RANGE(0x4788ac, 0x4788ad) AM_WRITEONLY AM_BASE(&metro_screenctrl) // Screen Control AM_RANGE(0x479700, 0x479713) AM_WRITEONLY AM_BASE(&metro_videoregs) // Video Registers - AM_RANGE(0xc00000, 0xc00001) AM_READ_PORT("IN0") AM_WRITE(metro_soundstatus_w) // To Sound CPU + AM_RANGE(0xc00000, 0xc00001) AM_READ_PORT("IN0") AM_WRITE(metro_soundstatus_w) // To Sound CPU AM_RANGE(0xc00002, 0xc00003) AM_READ_PORT("IN1") AM_RANGE(0xc00004, 0xc00005) AM_READ_PORT("DSW0") AM_RANGE(0xc00006, 0xc00007) AM_READ_PORT("IN2") @@ -1486,7 +1486,7 @@ static ADDRESS_MAP_START( pangpoms_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x478840, 0x47884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs) // Tiles Blitter AM_RANGE(0x478860, 0x47886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window) // Tilemap Window AM_RANGE(0x478870, 0x47887b) AM_WRITEONLY AM_BASE(&metro_scroll) // Scroll Regs - AM_RANGE(0x478880, 0x478881) AM_WRITENOP // ? increasing + AM_RANGE(0x478880, 0x478881) AM_WRITENOP // ? increasing AM_RANGE(0x478890, 0x478891) AM_WRITENOP // ? increasing AM_RANGE(0x4788a2, 0x4788a3) AM_READWRITE(metro_irq_cause_r,metro_irq_cause_w) // IRQ Cause / IRQ Acknowledge AM_RANGE(0x4788a4, 0x4788a5) AM_WRITEONLY AM_BASE(&metro_irq_enable) // IRQ Enable @@ -1798,7 +1798,7 @@ static ADDRESS_MAP_START( puzzlet_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE( 0x778840, 0x77884f ) AM_WRITE( metro_blitter_w ) AM_BASE( &metro_blitter_regs ) // Tiles Blitter AM_RANGE( 0x778860, 0x77886b ) AM_WRITE( metro_window_w ) AM_BASE( &metro_window ) // Tilemap Window AM_RANGE( 0x778870, 0x77887b ) AM_WRITEONLY AM_BASE( &metro_scroll ) // Scroll - AM_RANGE( 0x778890, 0x778891 ) AM_WRITENOP // ? increasing + AM_RANGE( 0x778890, 0x778891 ) AM_WRITENOP // ? increasing AM_RANGE( 0x7788a2, 0x7788a3 ) AM_WRITE( metro_irq_cause_w ) // IRQ Cause AM_RANGE( 0x7788a4, 0x7788a5 ) AM_WRITE( puzzlet_irq_enable_w ) AM_BASE( &metro_irq_enable ) // IRQ Enable diff --git a/src/mame/drivers/mexico86.c b/src/mame/drivers/mexico86.c index 437f5a08451..d5f649dc786 100644 --- a/src/mame/drivers/mexico86.c +++ b/src/mame/drivers/mexico86.c @@ -69,14 +69,14 @@ static READ8_DEVICE_HANDLER( kiki_ym2203_r ) static ADDRESS_MAP_START( mexico86_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x0000, 0x7fff) AM_ROM - AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1") /* banked roms */ + AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1") /* banked roms */ AM_RANGE(0xc000, 0xe7ff) AM_RAM AM_SHARE("share1") /* shared with sound cpu */ AM_RANGE(0xd500, 0xd7ff) AM_RAM AM_BASE(&mexico86_objectram) AM_SIZE(&mexico86_objectram_size) AM_RANGE(0xe800, 0xe8ff) AM_RAM AM_BASE(&mexico86_protection_ram) /* shared with mcu */ AM_RANGE(0xe900, 0xefff) AM_RAM AM_RANGE(0xc000, 0xd4ff) AM_RAM AM_BASE(&mexico86_videoram) //AT: corrected size - AM_RANGE(0xf000, 0xf000) AM_WRITE(mexico86_bankswitch_w) /* program and gfx ROM banks */ - AM_RANGE(0xf008, 0xf008) AM_WRITE(mexico86_f008_w) /* cpu reset lines + other unknown stuff */ + AM_RANGE(0xf000, 0xf000) AM_WRITE(mexico86_bankswitch_w) /* program and gfx ROM banks */ + AM_RANGE(0xf008, 0xf008) AM_WRITE(mexico86_f008_w) /* cpu reset lines + other unknown stuff */ AM_RANGE(0xf010, 0xf010) AM_READ_PORT("IN3") AM_RANGE(0xf018, 0xf018) AM_WRITENOP /* watchdog? */ AM_RANGE(0xf800, 0xffff) AM_RAM AM_SHARE("share2") /* communication ram - to connect 4 players's subboard */ diff --git a/src/mame/drivers/micro3d.c b/src/mame/drivers/micro3d.c index 5ae2c96400d..6eae3c18ecc 100644 --- a/src/mame/drivers/micro3d.c +++ b/src/mame/drivers/micro3d.c @@ -651,7 +651,7 @@ static MACHINE_DRIVER_START( micro3d ) MDRV_CPU_PROGRAM_MAP(hostmem) MDRV_CPU_VBLANK_INT("screen", micro3d_vblank) - MDRV_CPU_ADD("vgb", TMS34010, XTAL_40MHz) + MDRV_CPU_ADD("vgb", TMS34010, XTAL_40MHz) MDRV_CPU_CONFIG(vgb_config) MDRV_CPU_PROGRAM_MAP(vgbmem) diff --git a/src/mame/drivers/midtunit.c b/src/mame/drivers/midtunit.c index f627acd9e7a..d35d5e1c826 100644 --- a/src/mame/drivers/midtunit.c +++ b/src/mame/drivers/midtunit.c @@ -646,7 +646,7 @@ MACHINE_DRIVER_END *************************************/ ROM_START( mk ) - ROM_REGION( 0x50000, "adpcm", 0 ) /* sound CPU */ + ROM_REGION( 0x50000, "adpcm", 0 ) /* sound CPU */ ROM_LOAD( "mks-u3.rom", 0x10000, 0x40000, CRC(c615844c) SHA1(5732f9053a5f73b0cc3b0166d7dc4430829d5bc7) ) ROM_REGION( 0x200000, "oki", 0 ) /* ADPCM */ @@ -679,7 +679,7 @@ ROM_END ROM_START( mkr4 ) - ROM_REGION( 0x50000, "adpcm", 0 ) /* sound CPU */ + ROM_REGION( 0x50000, "adpcm", 0 ) /* sound CPU */ ROM_LOAD( "mks-u3.rom", 0x10000, 0x40000, CRC(c615844c) SHA1(5732f9053a5f73b0cc3b0166d7dc4430829d5bc7) ) ROM_REGION( 0x200000, "oki", 0 ) /* ADPCM */ @@ -712,7 +712,7 @@ ROM_END ROM_START( mktturbo ) - ROM_REGION( 0x50000, "adpcm", 0 ) /* sound CPU */ + ROM_REGION( 0x50000, "adpcm", 0 ) /* sound CPU */ ROM_LOAD( "mks-u3.rom", 0x10000, 0x40000, CRC(c615844c) SHA1(5732f9053a5f73b0cc3b0166d7dc4430829d5bc7) ) ROM_REGION( 0x200000, "oki", 0 ) /* ADPCM */ diff --git a/src/mame/drivers/midyunit.c b/src/mame/drivers/midyunit.c index 0520dc886e4..852cdb6cfd0 100644 --- a/src/mame/drivers/midyunit.c +++ b/src/mame/drivers/midyunit.c @@ -1472,7 +1472,7 @@ ROM_START( trog ) ROM_LOAD ( "trogu113.bin", 0x040000, 0x20000, CRC(77f50cbb) SHA1(5f2df3aedd90871ac02bca07c66387f6cda0dfdf) ) ROM_LOAD ( "trogu106.bin", 0x080000, 0x20000, CRC(af2eb0d8) SHA1(3767e6f3853b092b40664c2b6c6a838f0243514b) ) - ROM_LOAD ( "trogu107.bin", 0x0a0000, 0x20000, CRC(88a7b3f6) SHA1(ba55f66929841a915d7b96aabf4b11e50ba6cfbd) ) + ROM_LOAD ( "trogu107.bin", 0x0a0000, 0x20000, CRC(88a7b3f6) SHA1(ba55f66929841a915d7b96aabf4b11e50ba6cfbd) ) ROM_LOAD ( "trogu95.bin", 0x200000, 0x20000, CRC(f3ba2838) SHA1(2bee6c783c84a9f3f9309d802f42983857190ece) ) ROM_LOAD ( "trogu96.bin", 0x220000, 0x20000, CRC(cfed2e77) SHA1(7fc0f52ac844c9efcbcc3004c40f9f4fc7e1c346) ) @@ -1502,7 +1502,7 @@ ROM_START( trog4 ) ROM_LOAD ( "trogu113.bin", 0x040000, 0x20000, CRC(77f50cbb) SHA1(5f2df3aedd90871ac02bca07c66387f6cda0dfdf) ) ROM_LOAD ( "trogu106.bin", 0x080000, 0x20000, CRC(af2eb0d8) SHA1(3767e6f3853b092b40664c2b6c6a838f0243514b) ) - ROM_LOAD ( "trogu107.bin", 0x0a0000, 0x20000, CRC(88a7b3f6) SHA1(ba55f66929841a915d7b96aabf4b11e50ba6cfbd) ) + ROM_LOAD ( "trogu107.bin", 0x0a0000, 0x20000, CRC(88a7b3f6) SHA1(ba55f66929841a915d7b96aabf4b11e50ba6cfbd) ) ROM_LOAD ( "trogu95.bin", 0x200000, 0x20000, CRC(f3ba2838) SHA1(2bee6c783c84a9f3f9309d802f42983857190ece) ) ROM_LOAD ( "trogu96.bin", 0x220000, 0x20000, CRC(cfed2e77) SHA1(7fc0f52ac844c9efcbcc3004c40f9f4fc7e1c346) ) @@ -1532,7 +1532,7 @@ ROM_START( trog3 ) ROM_LOAD ( "trogu113.bin", 0x040000, 0x20000, CRC(77f50cbb) SHA1(5f2df3aedd90871ac02bca07c66387f6cda0dfdf) ) ROM_LOAD ( "trogu106.bin", 0x080000, 0x20000, CRC(af2eb0d8) SHA1(3767e6f3853b092b40664c2b6c6a838f0243514b) ) - ROM_LOAD ( "trogu107.bin", 0x0a0000, 0x20000, CRC(88a7b3f6) SHA1(ba55f66929841a915d7b96aabf4b11e50ba6cfbd) ) + ROM_LOAD ( "trogu107.bin", 0x0a0000, 0x20000, CRC(88a7b3f6) SHA1(ba55f66929841a915d7b96aabf4b11e50ba6cfbd) ) ROM_LOAD ( "trogu95.bin", 0x200000, 0x20000, CRC(f3ba2838) SHA1(2bee6c783c84a9f3f9309d802f42983857190ece) ) ROM_LOAD ( "trogu96.bin", 0x220000, 0x20000, CRC(cfed2e77) SHA1(7fc0f52ac844c9efcbcc3004c40f9f4fc7e1c346) ) @@ -1566,7 +1566,7 @@ ROM_START( trogpa6 ) ROM_LOAD ( "trog_pa6.97", 0x240000, 0x20000, CRC(354b1cb3) SHA1(88400e39f0476d32a0798c50855a8ff9dc0a6617) ) ROM_LOAD ( "trogu106.bin", 0x080000, 0x20000, CRC(af2eb0d8) SHA1(3767e6f3853b092b40664c2b6c6a838f0243514b) ) - ROM_LOAD ( "trogu107.bin", 0x0a0000, 0x20000, CRC(88a7b3f6) SHA1(ba55f66929841a915d7b96aabf4b11e50ba6cfbd) ) + ROM_LOAD ( "trogu107.bin", 0x0a0000, 0x20000, CRC(88a7b3f6) SHA1(ba55f66929841a915d7b96aabf4b11e50ba6cfbd) ) ROM_LOAD ( "trogu90.bin", 0x280000, 0x20000, CRC(16e06753) SHA1(62ec2b18e6b965ea0792d655d7878b4225da3aca) ) ROM_LOAD ( "trogu91.bin", 0x2a0000, 0x20000, CRC(880a02c7) SHA1(ab1b2d24be4571a183b230d267c6c8167d4a42a4) ) @@ -1592,7 +1592,7 @@ ROM_START( trogp ) ROM_LOAD ( "trog113.dat", 0x040000, 0x20000, CRC(2980a56f) SHA1(1e6ab16be6071d6568149e9ba56e146e3431b5f2) ) ROM_LOAD ( "trogu106.bin", 0x080000, 0x20000, CRC(af2eb0d8) SHA1(3767e6f3853b092b40664c2b6c6a838f0243514b) ) - ROM_LOAD ( "trogu107.bin", 0x0a0000, 0x20000, CRC(88a7b3f6) SHA1(ba55f66929841a915d7b96aabf4b11e50ba6cfbd) ) + ROM_LOAD ( "trogu107.bin", 0x0a0000, 0x20000, CRC(88a7b3f6) SHA1(ba55f66929841a915d7b96aabf4b11e50ba6cfbd) ) ROM_LOAD ( "trogu95.bin", 0x200000, 0x20000, CRC(f3ba2838) SHA1(2bee6c783c84a9f3f9309d802f42983857190ece) ) ROM_LOAD ( "trogu96.bin", 0x220000, 0x20000, CRC(cfed2e77) SHA1(7fc0f52ac844c9efcbcc3004c40f9f4fc7e1c346) ) @@ -1625,9 +1625,9 @@ ROM_START( smashtv ) ROM_LOAD ( "la1.u96", 0x220000, 0x20000, CRC(15555ea7) SHA1(4fefc059736ca424dc05a08cb55b9acf9e31228b) ) ROM_LOAD ( "la1.u97", 0x240000, 0x20000, CRC(ccac9d9e) SHA1(a43d70d1a0bbd377f0fc539c2e8b725f7079f463) ) - ROM_LOAD ( "la1.u106", 0x400000, 0x20000, CRC(5c718361) SHA1(6178b1d53411f24d5a5a01559727e300cd27d587) ) - ROM_LOAD ( "la1.u107", 0x420000, 0x20000, CRC(0fba1e36) SHA1(17038cf35a72678bba149a632f1ad1b80cc3a38c) ) - ROM_LOAD ( "la1.u108", 0x440000, 0x20000, CRC(cb0a092f) SHA1(33cbb87b4be1eadb1f3624ef5e218e65109fa3eb) ) + ROM_LOAD ( "la1.u106", 0x400000, 0x20000, CRC(5c718361) SHA1(6178b1d53411f24d5a5a01559727e300cd27d587) ) + ROM_LOAD ( "la1.u107", 0x420000, 0x20000, CRC(0fba1e36) SHA1(17038cf35a72678bba149a632f1ad1b80cc3a38c) ) + ROM_LOAD ( "la1.u108", 0x440000, 0x20000, CRC(cb0a092f) SHA1(33cbb87b4be1eadb1f3624ef5e218e65109fa3eb) ) ROM_END @@ -1653,9 +1653,9 @@ ROM_START( smashtv6 ) ROM_LOAD ( "la1.u96", 0x220000, 0x20000, CRC(15555ea7) SHA1(4fefc059736ca424dc05a08cb55b9acf9e31228b) ) ROM_LOAD ( "la1.u97", 0x240000, 0x20000, CRC(ccac9d9e) SHA1(a43d70d1a0bbd377f0fc539c2e8b725f7079f463) ) - ROM_LOAD ( "la1.u106", 0x400000, 0x20000, CRC(5c718361) SHA1(6178b1d53411f24d5a5a01559727e300cd27d587) ) - ROM_LOAD ( "la1.u107", 0x420000, 0x20000, CRC(0fba1e36) SHA1(17038cf35a72678bba149a632f1ad1b80cc3a38c) ) - ROM_LOAD ( "la1.u108", 0x440000, 0x20000, CRC(cb0a092f) SHA1(33cbb87b4be1eadb1f3624ef5e218e65109fa3eb) ) + ROM_LOAD ( "la1.u106", 0x400000, 0x20000, CRC(5c718361) SHA1(6178b1d53411f24d5a5a01559727e300cd27d587) ) + ROM_LOAD ( "la1.u107", 0x420000, 0x20000, CRC(0fba1e36) SHA1(17038cf35a72678bba149a632f1ad1b80cc3a38c) ) + ROM_LOAD ( "la1.u108", 0x440000, 0x20000, CRC(cb0a092f) SHA1(33cbb87b4be1eadb1f3624ef5e218e65109fa3eb) ) ROM_END @@ -1681,9 +1681,9 @@ ROM_START( smashtv5 ) ROM_LOAD ( "la1.u96", 0x220000, 0x20000, CRC(15555ea7) SHA1(4fefc059736ca424dc05a08cb55b9acf9e31228b) ) ROM_LOAD ( "la1.u97", 0x240000, 0x20000, CRC(ccac9d9e) SHA1(a43d70d1a0bbd377f0fc539c2e8b725f7079f463) ) - ROM_LOAD ( "la1.u106", 0x400000, 0x20000, CRC(5c718361) SHA1(6178b1d53411f24d5a5a01559727e300cd27d587) ) - ROM_LOAD ( "la1.u107", 0x420000, 0x20000, CRC(0fba1e36) SHA1(17038cf35a72678bba149a632f1ad1b80cc3a38c) ) - ROM_LOAD ( "la1.u108", 0x440000, 0x20000, CRC(cb0a092f) SHA1(33cbb87b4be1eadb1f3624ef5e218e65109fa3eb) ) + ROM_LOAD ( "la1.u106", 0x400000, 0x20000, CRC(5c718361) SHA1(6178b1d53411f24d5a5a01559727e300cd27d587) ) + ROM_LOAD ( "la1.u107", 0x420000, 0x20000, CRC(0fba1e36) SHA1(17038cf35a72678bba149a632f1ad1b80cc3a38c) ) + ROM_LOAD ( "la1.u108", 0x440000, 0x20000, CRC(cb0a092f) SHA1(33cbb87b4be1eadb1f3624ef5e218e65109fa3eb) ) ROM_END @@ -1709,9 +1709,9 @@ ROM_START( smashtv4 ) ROM_LOAD ( "la1.u96", 0x220000, 0x20000, CRC(15555ea7) SHA1(4fefc059736ca424dc05a08cb55b9acf9e31228b) ) ROM_LOAD ( "la1.u97", 0x240000, 0x20000, CRC(ccac9d9e) SHA1(a43d70d1a0bbd377f0fc539c2e8b725f7079f463) ) - ROM_LOAD ( "la1.u106", 0x400000, 0x20000, CRC(5c718361) SHA1(6178b1d53411f24d5a5a01559727e300cd27d587) ) - ROM_LOAD ( "la1.u107", 0x420000, 0x20000, CRC(0fba1e36) SHA1(17038cf35a72678bba149a632f1ad1b80cc3a38c) ) - ROM_LOAD ( "la1.u108", 0x440000, 0x20000, CRC(cb0a092f) SHA1(33cbb87b4be1eadb1f3624ef5e218e65109fa3eb) ) + ROM_LOAD ( "la1.u106", 0x400000, 0x20000, CRC(5c718361) SHA1(6178b1d53411f24d5a5a01559727e300cd27d587) ) + ROM_LOAD ( "la1.u107", 0x420000, 0x20000, CRC(0fba1e36) SHA1(17038cf35a72678bba149a632f1ad1b80cc3a38c) ) + ROM_LOAD ( "la1.u108", 0x440000, 0x20000, CRC(cb0a092f) SHA1(33cbb87b4be1eadb1f3624ef5e218e65109fa3eb) ) ROM_END @@ -1736,7 +1736,7 @@ ROM_START( hiimpact ) ROM_LOAD ( "la1u97.bin", 0x240000, 0x20000, CRC(908ea575) SHA1(79802d8df4e016d178be98333d2b1d047a27eccc) ) ROM_LOAD ( "la1u98.bin", 0x260000, 0x20000, CRC(6dcbab11) SHA1(7432172810fd4b922b61769c68d86f24769a42cf) ) - ROM_LOAD ( "la1u106.bin", 0x400000, 0x20000, CRC(7d0ead0d) SHA1(1e65b6e7e629021d70603df37db5fa89cfe93175) ) + ROM_LOAD ( "la1u106.bin", 0x400000, 0x20000, CRC(7d0ead0d) SHA1(1e65b6e7e629021d70603df37db5fa89cfe93175) ) ROM_LOAD ( "la1u107.bin", 0x420000, 0x20000, CRC(ef48e8fa) SHA1(538de37cd8342085ec27f67292a7eeb1007e3b1f) ) ROM_LOAD ( "la1u108.bin", 0x440000, 0x20000, CRC(5f363e12) SHA1(da398c0204f785aad4c52007d2f25031ecc1c63f) ) ROM_LOAD ( "la1u109.bin", 0x460000, 0x20000, CRC(3689fbbc) SHA1(d95c0a2e3abf977ba7a899e419c22d004020c560) ) @@ -1771,7 +1771,7 @@ ROM_START( hiimpact4 ) ROM_LOAD ( "la1u97.bin", 0x240000, 0x20000, CRC(908ea575) SHA1(79802d8df4e016d178be98333d2b1d047a27eccc) ) ROM_LOAD ( "la1u98.bin", 0x260000, 0x20000, CRC(6dcbab11) SHA1(7432172810fd4b922b61769c68d86f24769a42cf) ) - ROM_LOAD ( "la1u106.bin", 0x400000, 0x20000, CRC(7d0ead0d) SHA1(1e65b6e7e629021d70603df37db5fa89cfe93175) ) + ROM_LOAD ( "la1u106.bin", 0x400000, 0x20000, CRC(7d0ead0d) SHA1(1e65b6e7e629021d70603df37db5fa89cfe93175) ) ROM_LOAD ( "la1u107.bin", 0x420000, 0x20000, CRC(ef48e8fa) SHA1(538de37cd8342085ec27f67292a7eeb1007e3b1f) ) ROM_LOAD ( "la1u108.bin", 0x440000, 0x20000, CRC(5f363e12) SHA1(da398c0204f785aad4c52007d2f25031ecc1c63f) ) ROM_LOAD ( "la1u109.bin", 0x460000, 0x20000, CRC(3689fbbc) SHA1(d95c0a2e3abf977ba7a899e419c22d004020c560) ) @@ -1806,7 +1806,7 @@ ROM_START( hiimpact3 ) ROM_LOAD ( "la1u97.bin", 0x240000, 0x20000, CRC(908ea575) SHA1(79802d8df4e016d178be98333d2b1d047a27eccc) ) ROM_LOAD ( "la1u98.bin", 0x260000, 0x20000, CRC(6dcbab11) SHA1(7432172810fd4b922b61769c68d86f24769a42cf) ) - ROM_LOAD ( "la1u106.bin", 0x400000, 0x20000, CRC(7d0ead0d) SHA1(1e65b6e7e629021d70603df37db5fa89cfe93175) ) + ROM_LOAD ( "la1u106.bin", 0x400000, 0x20000, CRC(7d0ead0d) SHA1(1e65b6e7e629021d70603df37db5fa89cfe93175) ) ROM_LOAD ( "la1u107.bin", 0x420000, 0x20000, CRC(ef48e8fa) SHA1(538de37cd8342085ec27f67292a7eeb1007e3b1f) ) ROM_LOAD ( "la1u108.bin", 0x440000, 0x20000, CRC(5f363e12) SHA1(da398c0204f785aad4c52007d2f25031ecc1c63f) ) ROM_LOAD ( "la1u109.bin", 0x460000, 0x20000, CRC(3689fbbc) SHA1(d95c0a2e3abf977ba7a899e419c22d004020c560) ) @@ -1841,7 +1841,7 @@ ROM_START( hiimpact1 ) ROM_LOAD ( "la1u97.bin", 0x240000, 0x20000, CRC(908ea575) SHA1(79802d8df4e016d178be98333d2b1d047a27eccc) ) ROM_LOAD ( "la1u98.bin", 0x260000, 0x20000, CRC(6dcbab11) SHA1(7432172810fd4b922b61769c68d86f24769a42cf) ) - ROM_LOAD ( "la1u106.bin", 0x400000, 0x20000, CRC(7d0ead0d) SHA1(1e65b6e7e629021d70603df37db5fa89cfe93175) ) + ROM_LOAD ( "la1u106.bin", 0x400000, 0x20000, CRC(7d0ead0d) SHA1(1e65b6e7e629021d70603df37db5fa89cfe93175) ) ROM_LOAD ( "la1u107.bin", 0x420000, 0x20000, CRC(ef48e8fa) SHA1(538de37cd8342085ec27f67292a7eeb1007e3b1f) ) ROM_LOAD ( "la1u108.bin", 0x440000, 0x20000, CRC(5f363e12) SHA1(da398c0204f785aad4c52007d2f25031ecc1c63f) ) ROM_LOAD ( "la1u109.bin", 0x460000, 0x20000, CRC(3689fbbc) SHA1(d95c0a2e3abf977ba7a899e419c22d004020c560) ) @@ -1876,7 +1876,7 @@ ROM_START( hiimpactp ) ROM_LOAD ( "la1u97.bin", 0x240000, 0x20000, CRC(908ea575) SHA1(79802d8df4e016d178be98333d2b1d047a27eccc) ) ROM_LOAD ( "la1u98.bin", 0x260000, 0x20000, CRC(6dcbab11) SHA1(7432172810fd4b922b61769c68d86f24769a42cf) ) - ROM_LOAD ( "la1u106.bin", 0x400000, 0x20000, CRC(7d0ead0d) SHA1(1e65b6e7e629021d70603df37db5fa89cfe93175) ) + ROM_LOAD ( "la1u106.bin", 0x400000, 0x20000, CRC(7d0ead0d) SHA1(1e65b6e7e629021d70603df37db5fa89cfe93175) ) ROM_LOAD ( "la1u107.bin", 0x420000, 0x20000, CRC(ef48e8fa) SHA1(538de37cd8342085ec27f67292a7eeb1007e3b1f) ) ROM_LOAD ( "la1u108.bin", 0x440000, 0x20000, CRC(5f363e12) SHA1(da398c0204f785aad4c52007d2f25031ecc1c63f) ) ROM_LOAD ( "la1u109.bin", 0x460000, 0x20000, CRC(3689fbbc) SHA1(d95c0a2e3abf977ba7a899e419c22d004020c560) ) @@ -2021,8 +2021,8 @@ ROM_START( strkforc ) ROM_LOAD ( "sfu113.bin", 0x040000, 0x20000, CRC(9565a79b) SHA1(ebb90132ed8acbbed09bbcdff435cdf60a3ef8ab) ) ROM_LOAD ( "sfu114.bin", 0x060000, 0x20000, CRC(b71152da) SHA1(784e229a5ae51776a3e984f22d1d73b2286cfc68) ) - ROM_LOAD ( "sfu106.bin", 0x080000, 0x20000, CRC(a394d4cf) SHA1(d08c5994b08dafd233a270d24b4c851bcedf5cbe) ) - ROM_LOAD ( "sfu107.bin", 0x0a0000, 0x20000, CRC(edef1419) SHA1(cda8de55355eabf8146a243f917f6d27babe5ce3) ) + ROM_LOAD ( "sfu106.bin", 0x080000, 0x20000, CRC(a394d4cf) SHA1(d08c5994b08dafd233a270d24b4c851bcedf5cbe) ) + ROM_LOAD ( "sfu107.bin", 0x0a0000, 0x20000, CRC(edef1419) SHA1(cda8de55355eabf8146a243f917f6d27babe5ce3) ) ROM_LOAD ( "sfu95.bin", 0x200000, 0x20000, CRC(519cb2b4) SHA1(9059d2ca2705bd297c066a9470b756aecb395431) ) ROM_LOAD ( "sfu96.bin", 0x220000, 0x20000, CRC(61214796) SHA1(bad32ef909f714289ee7cf2a5179a3b96678a72a) ) @@ -2054,15 +2054,15 @@ ROM_START( mkprot8 ) ROM_LOAD ( "mkg-u113.rom", 0x100000, 0x80000, CRC(6fb91ede) SHA1(a3735b49f93b08c44fbc97e2b5aad394628fbe90) ) ROM_LOAD ( "mkg-u114.rom", 0x180000, 0x80000, CRC(ed1ff88a) SHA1(6b090b658ee6148af953bd0c9216f37162b6460f) ) - ROM_LOAD ( "mkg-u95.rom", 0x200000, 0x80000, CRC(a002a155) SHA1(3cf7909e92bcd428063596fc5b9953e0000d6eca) ) - ROM_LOAD ( "mkg-u96.rom", 0x280000, 0x80000, CRC(dcee8492) SHA1(a912b74d3b26ebd1b1613cc631080f83ececeaf8) ) + ROM_LOAD ( "mkg-u95.rom", 0x200000, 0x80000, CRC(a002a155) SHA1(3cf7909e92bcd428063596fc5b9953e0000d6eca) ) + ROM_LOAD ( "mkg-u96.rom", 0x280000, 0x80000, CRC(dcee8492) SHA1(a912b74d3b26ebd1b1613cc631080f83ececeaf8) ) ROM_LOAD ( "mkg-u97.rom", 0x300000, 0x80000, CRC(de88caef) SHA1(a7927b504dc56ca5c9048373977fe5743b0a3f0b) ) ROM_LOAD ( "mkg-u98.rom", 0x380000, 0x80000, CRC(37eb01b4) SHA1(06092460bd137e08d0f8df8560942ed877d40e09) ) ROM_LOAD ( "mkg-u106.rom", 0x400000, 0x80000, CRC(45acaf21) SHA1(5edd36c55f4e5d3c74fb85171728ec0a58284b12) ) - ROM_LOAD ( "mkg-u107.rom", 0x480000, 0x80000, CRC(2a6c10a0) SHA1(cc90923c44f2961b945a0fd0f85ecc2ba04af2cb) ) - ROM_LOAD ( "mkg-u108.rom", 0x500000, 0x80000, CRC(23308979) SHA1(0b36788624a1cf0d3f4c895be5ba967b8dfcf85e) ) - ROM_LOAD ( "mkg-u109.rom", 0x580000, 0x80000, CRC(cafc47bb) SHA1(8610af6e52f7089ff4acd850c53ab8b4119e4445) ) + ROM_LOAD ( "mkg-u107.rom", 0x480000, 0x80000, CRC(2a6c10a0) SHA1(cc90923c44f2961b945a0fd0f85ecc2ba04af2cb) ) + ROM_LOAD ( "mkg-u108.rom", 0x500000, 0x80000, CRC(23308979) SHA1(0b36788624a1cf0d3f4c895be5ba967b8dfcf85e) ) + ROM_LOAD ( "mkg-u109.rom", 0x580000, 0x80000, CRC(cafc47bb) SHA1(8610af6e52f7089ff4acd850c53ab8b4119e4445) ) ROM_END @@ -2086,15 +2086,15 @@ ROM_START( mkprot9 ) ROM_LOAD ( "mkg-u113.rom", 0x100000, 0x80000, CRC(6fb91ede) SHA1(a3735b49f93b08c44fbc97e2b5aad394628fbe90) ) ROM_LOAD ( "mkg-u114.rom", 0x180000, 0x80000, CRC(ed1ff88a) SHA1(6b090b658ee6148af953bd0c9216f37162b6460f) ) - ROM_LOAD ( "mkg-u95.rom", 0x200000, 0x80000, CRC(a002a155) SHA1(3cf7909e92bcd428063596fc5b9953e0000d6eca) ) - ROM_LOAD ( "mkg-u96.rom", 0x280000, 0x80000, CRC(dcee8492) SHA1(a912b74d3b26ebd1b1613cc631080f83ececeaf8) ) + ROM_LOAD ( "mkg-u95.rom", 0x200000, 0x80000, CRC(a002a155) SHA1(3cf7909e92bcd428063596fc5b9953e0000d6eca) ) + ROM_LOAD ( "mkg-u96.rom", 0x280000, 0x80000, CRC(dcee8492) SHA1(a912b74d3b26ebd1b1613cc631080f83ececeaf8) ) ROM_LOAD ( "mkg-u97.rom", 0x300000, 0x80000, CRC(de88caef) SHA1(a7927b504dc56ca5c9048373977fe5743b0a3f0b) ) ROM_LOAD ( "mkg-u98.rom", 0x380000, 0x80000, CRC(37eb01b4) SHA1(06092460bd137e08d0f8df8560942ed877d40e09) ) ROM_LOAD ( "mkg-u106.rom", 0x400000, 0x80000, CRC(45acaf21) SHA1(5edd36c55f4e5d3c74fb85171728ec0a58284b12) ) - ROM_LOAD ( "mkg-u107.rom", 0x480000, 0x80000, CRC(2a6c10a0) SHA1(cc90923c44f2961b945a0fd0f85ecc2ba04af2cb) ) - ROM_LOAD ( "mkg-u108.rom", 0x500000, 0x80000, CRC(23308979) SHA1(0b36788624a1cf0d3f4c895be5ba967b8dfcf85e) ) - ROM_LOAD ( "mkg-u109.rom", 0x580000, 0x80000, CRC(cafc47bb) SHA1(8610af6e52f7089ff4acd850c53ab8b4119e4445) ) + ROM_LOAD ( "mkg-u107.rom", 0x480000, 0x80000, CRC(2a6c10a0) SHA1(cc90923c44f2961b945a0fd0f85ecc2ba04af2cb) ) + ROM_LOAD ( "mkg-u108.rom", 0x500000, 0x80000, CRC(23308979) SHA1(0b36788624a1cf0d3f4c895be5ba967b8dfcf85e) ) + ROM_LOAD ( "mkg-u109.rom", 0x580000, 0x80000, CRC(cafc47bb) SHA1(8610af6e52f7089ff4acd850c53ab8b4119e4445) ) ROM_END @@ -2118,15 +2118,15 @@ ROM_START( mkla1 ) ROM_LOAD ( "mkg-u113.rom", 0x100000, 0x80000, CRC(6fb91ede) SHA1(a3735b49f93b08c44fbc97e2b5aad394628fbe90) ) ROM_LOAD ( "mkg-u114.rom", 0x180000, 0x80000, CRC(ed1ff88a) SHA1(6b090b658ee6148af953bd0c9216f37162b6460f) ) - ROM_LOAD ( "mkg-u95.rom", 0x200000, 0x80000, CRC(a002a155) SHA1(3cf7909e92bcd428063596fc5b9953e0000d6eca) ) - ROM_LOAD ( "mkg-u96.rom", 0x280000, 0x80000, CRC(dcee8492) SHA1(a912b74d3b26ebd1b1613cc631080f83ececeaf8) ) + ROM_LOAD ( "mkg-u95.rom", 0x200000, 0x80000, CRC(a002a155) SHA1(3cf7909e92bcd428063596fc5b9953e0000d6eca) ) + ROM_LOAD ( "mkg-u96.rom", 0x280000, 0x80000, CRC(dcee8492) SHA1(a912b74d3b26ebd1b1613cc631080f83ececeaf8) ) ROM_LOAD ( "mkg-u97.rom", 0x300000, 0x80000, CRC(de88caef) SHA1(a7927b504dc56ca5c9048373977fe5743b0a3f0b) ) ROM_LOAD ( "mkg-u98.rom", 0x380000, 0x80000, CRC(37eb01b4) SHA1(06092460bd137e08d0f8df8560942ed877d40e09) ) ROM_LOAD ( "mkg-u106.rom", 0x400000, 0x80000, CRC(45acaf21) SHA1(5edd36c55f4e5d3c74fb85171728ec0a58284b12) ) - ROM_LOAD ( "mkg-u107.rom", 0x480000, 0x80000, CRC(2a6c10a0) SHA1(cc90923c44f2961b945a0fd0f85ecc2ba04af2cb) ) - ROM_LOAD ( "mkg-u108.rom", 0x500000, 0x80000, CRC(23308979) SHA1(0b36788624a1cf0d3f4c895be5ba967b8dfcf85e) ) - ROM_LOAD ( "mkg-u109.rom", 0x580000, 0x80000, CRC(cafc47bb) SHA1(8610af6e52f7089ff4acd850c53ab8b4119e4445) ) + ROM_LOAD ( "mkg-u107.rom", 0x480000, 0x80000, CRC(2a6c10a0) SHA1(cc90923c44f2961b945a0fd0f85ecc2ba04af2cb) ) + ROM_LOAD ( "mkg-u108.rom", 0x500000, 0x80000, CRC(23308979) SHA1(0b36788624a1cf0d3f4c895be5ba967b8dfcf85e) ) + ROM_LOAD ( "mkg-u109.rom", 0x580000, 0x80000, CRC(cafc47bb) SHA1(8610af6e52f7089ff4acd850c53ab8b4119e4445) ) ROM_END @@ -2150,15 +2150,15 @@ ROM_START( mkla2 ) ROM_LOAD ( "mkg-u113.rom", 0x100000, 0x80000, CRC(6fb91ede) SHA1(a3735b49f93b08c44fbc97e2b5aad394628fbe90) ) ROM_LOAD ( "mkg-u114.rom", 0x180000, 0x80000, CRC(ed1ff88a) SHA1(6b090b658ee6148af953bd0c9216f37162b6460f) ) - ROM_LOAD ( "mkg-u95.rom", 0x200000, 0x80000, CRC(a002a155) SHA1(3cf7909e92bcd428063596fc5b9953e0000d6eca) ) - ROM_LOAD ( "mkg-u96.rom", 0x280000, 0x80000, CRC(dcee8492) SHA1(a912b74d3b26ebd1b1613cc631080f83ececeaf8) ) + ROM_LOAD ( "mkg-u95.rom", 0x200000, 0x80000, CRC(a002a155) SHA1(3cf7909e92bcd428063596fc5b9953e0000d6eca) ) + ROM_LOAD ( "mkg-u96.rom", 0x280000, 0x80000, CRC(dcee8492) SHA1(a912b74d3b26ebd1b1613cc631080f83ececeaf8) ) ROM_LOAD ( "mkg-u97.rom", 0x300000, 0x80000, CRC(de88caef) SHA1(a7927b504dc56ca5c9048373977fe5743b0a3f0b) ) ROM_LOAD ( "mkg-u98.rom", 0x380000, 0x80000, CRC(37eb01b4) SHA1(06092460bd137e08d0f8df8560942ed877d40e09) ) ROM_LOAD ( "mkg-u106.rom", 0x400000, 0x80000, CRC(45acaf21) SHA1(5edd36c55f4e5d3c74fb85171728ec0a58284b12) ) - ROM_LOAD ( "mkg-u107.rom", 0x480000, 0x80000, CRC(2a6c10a0) SHA1(cc90923c44f2961b945a0fd0f85ecc2ba04af2cb) ) - ROM_LOAD ( "mkg-u108.rom", 0x500000, 0x80000, CRC(23308979) SHA1(0b36788624a1cf0d3f4c895be5ba967b8dfcf85e) ) - ROM_LOAD ( "mkg-u109.rom", 0x580000, 0x80000, CRC(cafc47bb) SHA1(8610af6e52f7089ff4acd850c53ab8b4119e4445) ) + ROM_LOAD ( "mkg-u107.rom", 0x480000, 0x80000, CRC(2a6c10a0) SHA1(cc90923c44f2961b945a0fd0f85ecc2ba04af2cb) ) + ROM_LOAD ( "mkg-u108.rom", 0x500000, 0x80000, CRC(23308979) SHA1(0b36788624a1cf0d3f4c895be5ba967b8dfcf85e) ) + ROM_LOAD ( "mkg-u109.rom", 0x580000, 0x80000, CRC(cafc47bb) SHA1(8610af6e52f7089ff4acd850c53ab8b4119e4445) ) ROM_END @@ -2182,15 +2182,15 @@ ROM_START( mkla3 ) ROM_LOAD ( "mkg-u113.rom", 0x100000, 0x80000, CRC(6fb91ede) SHA1(a3735b49f93b08c44fbc97e2b5aad394628fbe90) ) ROM_LOAD ( "mkg-u114.rom", 0x180000, 0x80000, CRC(ed1ff88a) SHA1(6b090b658ee6148af953bd0c9216f37162b6460f) ) - ROM_LOAD ( "mkg-u95.rom", 0x200000, 0x80000, CRC(a002a155) SHA1(3cf7909e92bcd428063596fc5b9953e0000d6eca) ) - ROM_LOAD ( "mkg-u96.rom", 0x280000, 0x80000, CRC(dcee8492) SHA1(a912b74d3b26ebd1b1613cc631080f83ececeaf8) ) + ROM_LOAD ( "mkg-u95.rom", 0x200000, 0x80000, CRC(a002a155) SHA1(3cf7909e92bcd428063596fc5b9953e0000d6eca) ) + ROM_LOAD ( "mkg-u96.rom", 0x280000, 0x80000, CRC(dcee8492) SHA1(a912b74d3b26ebd1b1613cc631080f83ececeaf8) ) ROM_LOAD ( "mkg-u97.rom", 0x300000, 0x80000, CRC(de88caef) SHA1(a7927b504dc56ca5c9048373977fe5743b0a3f0b) ) ROM_LOAD ( "mkg-u98.rom", 0x380000, 0x80000, CRC(37eb01b4) SHA1(06092460bd137e08d0f8df8560942ed877d40e09) ) ROM_LOAD ( "mkg-u106.rom", 0x400000, 0x80000, CRC(45acaf21) SHA1(5edd36c55f4e5d3c74fb85171728ec0a58284b12) ) - ROM_LOAD ( "mkg-u107.rom", 0x480000, 0x80000, CRC(2a6c10a0) SHA1(cc90923c44f2961b945a0fd0f85ecc2ba04af2cb) ) - ROM_LOAD ( "mkg-u108.rom", 0x500000, 0x80000, CRC(23308979) SHA1(0b36788624a1cf0d3f4c895be5ba967b8dfcf85e) ) - ROM_LOAD ( "mkg-u109.rom", 0x580000, 0x80000, CRC(cafc47bb) SHA1(8610af6e52f7089ff4acd850c53ab8b4119e4445) ) + ROM_LOAD ( "mkg-u107.rom", 0x480000, 0x80000, CRC(2a6c10a0) SHA1(cc90923c44f2961b945a0fd0f85ecc2ba04af2cb) ) + ROM_LOAD ( "mkg-u108.rom", 0x500000, 0x80000, CRC(23308979) SHA1(0b36788624a1cf0d3f4c895be5ba967b8dfcf85e) ) + ROM_LOAD ( "mkg-u109.rom", 0x580000, 0x80000, CRC(cafc47bb) SHA1(8610af6e52f7089ff4acd850c53ab8b4119e4445) ) ROM_END @@ -2214,15 +2214,15 @@ ROM_START( mkla4 ) ROM_LOAD ( "mkg-u113.rom", 0x100000, 0x80000, CRC(6fb91ede) SHA1(a3735b49f93b08c44fbc97e2b5aad394628fbe90) ) ROM_LOAD ( "mkg-u114.rom", 0x180000, 0x80000, CRC(ed1ff88a) SHA1(6b090b658ee6148af953bd0c9216f37162b6460f) ) - ROM_LOAD ( "mkg-u95.rom", 0x200000, 0x80000, CRC(a002a155) SHA1(3cf7909e92bcd428063596fc5b9953e0000d6eca) ) - ROM_LOAD ( "mkg-u96.rom", 0x280000, 0x80000, CRC(dcee8492) SHA1(a912b74d3b26ebd1b1613cc631080f83ececeaf8) ) + ROM_LOAD ( "mkg-u95.rom", 0x200000, 0x80000, CRC(a002a155) SHA1(3cf7909e92bcd428063596fc5b9953e0000d6eca) ) + ROM_LOAD ( "mkg-u96.rom", 0x280000, 0x80000, CRC(dcee8492) SHA1(a912b74d3b26ebd1b1613cc631080f83ececeaf8) ) ROM_LOAD ( "mkg-u97.rom", 0x300000, 0x80000, CRC(de88caef) SHA1(a7927b504dc56ca5c9048373977fe5743b0a3f0b) ) ROM_LOAD ( "mkg-u98.rom", 0x380000, 0x80000, CRC(37eb01b4) SHA1(06092460bd137e08d0f8df8560942ed877d40e09) ) ROM_LOAD ( "mkg-u106.rom", 0x400000, 0x80000, CRC(45acaf21) SHA1(5edd36c55f4e5d3c74fb85171728ec0a58284b12) ) - ROM_LOAD ( "mkg-u107.rom", 0x480000, 0x80000, CRC(2a6c10a0) SHA1(cc90923c44f2961b945a0fd0f85ecc2ba04af2cb) ) - ROM_LOAD ( "mkg-u108.rom", 0x500000, 0x80000, CRC(23308979) SHA1(0b36788624a1cf0d3f4c895be5ba967b8dfcf85e) ) - ROM_LOAD ( "mkg-u109.rom", 0x580000, 0x80000, CRC(cafc47bb) SHA1(8610af6e52f7089ff4acd850c53ab8b4119e4445) ) + ROM_LOAD ( "mkg-u107.rom", 0x480000, 0x80000, CRC(2a6c10a0) SHA1(cc90923c44f2961b945a0fd0f85ecc2ba04af2cb) ) + ROM_LOAD ( "mkg-u108.rom", 0x500000, 0x80000, CRC(23308979) SHA1(0b36788624a1cf0d3f4c895be5ba967b8dfcf85e) ) + ROM_LOAD ( "mkg-u109.rom", 0x580000, 0x80000, CRC(cafc47bb) SHA1(8610af6e52f7089ff4acd850c53ab8b4119e4445) ) ROM_END @@ -2247,15 +2247,15 @@ ROM_START( mkyturbo ) ROM_LOAD ( "mkg-u113.rom", 0x100000, 0x80000, CRC(6fb91ede) SHA1(a3735b49f93b08c44fbc97e2b5aad394628fbe90) ) ROM_LOAD ( "mkg-u114.rom", 0x180000, 0x80000, CRC(ed1ff88a) SHA1(6b090b658ee6148af953bd0c9216f37162b6460f) ) - ROM_LOAD ( "mkg-u95.rom", 0x200000, 0x80000, CRC(a002a155) SHA1(3cf7909e92bcd428063596fc5b9953e0000d6eca) ) - ROM_LOAD ( "mkg-u96.rom", 0x280000, 0x80000, CRC(dcee8492) SHA1(a912b74d3b26ebd1b1613cc631080f83ececeaf8) ) + ROM_LOAD ( "mkg-u95.rom", 0x200000, 0x80000, CRC(a002a155) SHA1(3cf7909e92bcd428063596fc5b9953e0000d6eca) ) + ROM_LOAD ( "mkg-u96.rom", 0x280000, 0x80000, CRC(dcee8492) SHA1(a912b74d3b26ebd1b1613cc631080f83ececeaf8) ) ROM_LOAD ( "mkg-u97.rom", 0x300000, 0x80000, CRC(de88caef) SHA1(a7927b504dc56ca5c9048373977fe5743b0a3f0b) ) ROM_LOAD ( "mkg-u98.rom", 0x380000, 0x80000, CRC(37eb01b4) SHA1(06092460bd137e08d0f8df8560942ed877d40e09) ) ROM_LOAD ( "mkg-u106.rom", 0x400000, 0x80000, CRC(45acaf21) SHA1(5edd36c55f4e5d3c74fb85171728ec0a58284b12) ) - ROM_LOAD ( "mkg-u107.rom", 0x480000, 0x80000, CRC(2a6c10a0) SHA1(cc90923c44f2961b945a0fd0f85ecc2ba04af2cb) ) - ROM_LOAD ( "mkg-u108.rom", 0x500000, 0x80000, CRC(23308979) SHA1(0b36788624a1cf0d3f4c895be5ba967b8dfcf85e) ) - ROM_LOAD ( "mkg-u109.rom", 0x580000, 0x80000, CRC(cafc47bb) SHA1(8610af6e52f7089ff4acd850c53ab8b4119e4445) ) + ROM_LOAD ( "mkg-u107.rom", 0x480000, 0x80000, CRC(2a6c10a0) SHA1(cc90923c44f2961b945a0fd0f85ecc2ba04af2cb) ) + ROM_LOAD ( "mkg-u108.rom", 0x500000, 0x80000, CRC(23308979) SHA1(0b36788624a1cf0d3f4c895be5ba967b8dfcf85e) ) + ROM_LOAD ( "mkg-u109.rom", 0x580000, 0x80000, CRC(cafc47bb) SHA1(8610af6e52f7089ff4acd850c53ab8b4119e4445) ) ROM_END @@ -2283,15 +2283,15 @@ ROM_START( mkyawdim ) ROM_LOAD ( "mkg-u113.rom", 0x100000, 0x80000, CRC(6fb91ede) SHA1(a3735b49f93b08c44fbc97e2b5aad394628fbe90) ) ROM_LOAD ( "mkg-u114.rom", 0x180000, 0x80000, CRC(ed1ff88a) SHA1(6b090b658ee6148af953bd0c9216f37162b6460f) ) - ROM_LOAD ( "mkg-u95.rom", 0x200000, 0x80000, CRC(a002a155) SHA1(3cf7909e92bcd428063596fc5b9953e0000d6eca) ) - ROM_LOAD ( "mkg-u96.rom", 0x280000, 0x80000, CRC(dcee8492) SHA1(a912b74d3b26ebd1b1613cc631080f83ececeaf8) ) + ROM_LOAD ( "mkg-u95.rom", 0x200000, 0x80000, CRC(a002a155) SHA1(3cf7909e92bcd428063596fc5b9953e0000d6eca) ) + ROM_LOAD ( "mkg-u96.rom", 0x280000, 0x80000, CRC(dcee8492) SHA1(a912b74d3b26ebd1b1613cc631080f83ececeaf8) ) ROM_LOAD ( "mkg-u97.rom", 0x300000, 0x80000, CRC(de88caef) SHA1(a7927b504dc56ca5c9048373977fe5743b0a3f0b) ) ROM_LOAD ( "mkg-u98.rom", 0x380000, 0x80000, CRC(37eb01b4) SHA1(06092460bd137e08d0f8df8560942ed877d40e09) ) ROM_LOAD ( "mkg-u106.rom", 0x400000, 0x80000, CRC(45acaf21) SHA1(5edd36c55f4e5d3c74fb85171728ec0a58284b12) ) - ROM_LOAD ( "mkg-u107.rom", 0x480000, 0x80000, CRC(2a6c10a0) SHA1(cc90923c44f2961b945a0fd0f85ecc2ba04af2cb) ) - ROM_LOAD ( "mkg-u108.rom", 0x500000, 0x80000, CRC(23308979) SHA1(0b36788624a1cf0d3f4c895be5ba967b8dfcf85e) ) - ROM_LOAD ( "mkg-u109.rom", 0x580000, 0x80000, CRC(cafc47bb) SHA1(8610af6e52f7089ff4acd850c53ab8b4119e4445) ) + ROM_LOAD ( "mkg-u107.rom", 0x480000, 0x80000, CRC(2a6c10a0) SHA1(cc90923c44f2961b945a0fd0f85ecc2ba04af2cb) ) + ROM_LOAD ( "mkg-u108.rom", 0x500000, 0x80000, CRC(23308979) SHA1(0b36788624a1cf0d3f4c895be5ba967b8dfcf85e) ) + ROM_LOAD ( "mkg-u109.rom", 0x580000, 0x80000, CRC(cafc47bb) SHA1(8610af6e52f7089ff4acd850c53ab8b4119e4445) ) ROM_END @@ -2322,9 +2322,9 @@ ROM_START( term2 ) ROM_LOAD ( "t2.98", 0x380000, 0x80000, CRC(1a20ce29) SHA1(9089b7f77da5d67ad46ed249d72de8b8e0e5d807) ) ROM_LOAD ( "t2.106", 0x400000, 0x80000, CRC(f08a9536) SHA1(fbac314bd52f23c7a704acd3c707e75cdf204c07) ) - ROM_LOAD ( "t2.107", 0x480000, 0x80000, CRC(268d4035) SHA1(89a310830be9fbc91794fcccc57053d0933c42a3) ) - ROM_LOAD ( "t2.108", 0x500000, 0x80000, CRC(379fdaed) SHA1(408df6702c8ea8d3dce0b231955c6a60f3f5f22b) ) - ROM_LOAD ( "t2.109", 0x580000, 0x80000, CRC(306a9366) SHA1(b94c23c033221f7f7fddd2911b8cec9549929768) ) + ROM_LOAD ( "t2.107", 0x480000, 0x80000, CRC(268d4035) SHA1(89a310830be9fbc91794fcccc57053d0933c42a3) ) + ROM_LOAD ( "t2.108", 0x500000, 0x80000, CRC(379fdaed) SHA1(408df6702c8ea8d3dce0b231955c6a60f3f5f22b) ) + ROM_LOAD ( "t2.109", 0x580000, 0x80000, CRC(306a9366) SHA1(b94c23c033221f7f7fddd2911b8cec9549929768) ) ROM_END @@ -2355,9 +2355,9 @@ ROM_START( term2la2 ) ROM_LOAD ( "t2.98", 0x380000, 0x80000, CRC(1a20ce29) SHA1(9089b7f77da5d67ad46ed249d72de8b8e0e5d807) ) ROM_LOAD ( "t2.106", 0x400000, 0x80000, CRC(f08a9536) SHA1(fbac314bd52f23c7a704acd3c707e75cdf204c07) ) - ROM_LOAD ( "t2.107", 0x480000, 0x80000, CRC(268d4035) SHA1(89a310830be9fbc91794fcccc57053d0933c42a3) ) - ROM_LOAD ( "t2.108", 0x500000, 0x80000, CRC(379fdaed) SHA1(408df6702c8ea8d3dce0b231955c6a60f3f5f22b) ) - ROM_LOAD ( "t2.109", 0x580000, 0x80000, CRC(306a9366) SHA1(b94c23c033221f7f7fddd2911b8cec9549929768) ) + ROM_LOAD ( "t2.107", 0x480000, 0x80000, CRC(268d4035) SHA1(89a310830be9fbc91794fcccc57053d0933c42a3) ) + ROM_LOAD ( "t2.108", 0x500000, 0x80000, CRC(379fdaed) SHA1(408df6702c8ea8d3dce0b231955c6a60f3f5f22b) ) + ROM_LOAD ( "t2.109", 0x580000, 0x80000, CRC(306a9366) SHA1(b94c23c033221f7f7fddd2911b8cec9549929768) ) ROM_END @@ -2421,9 +2421,9 @@ ROM_START( totcarn ) ROM_LOAD ( "tcu98.bin", 0x2c0000, 0x40000, CRC(ab06c885) SHA1(09163060269fed2ebd697b71602166e906c95317) ) ROM_LOAD ( "tcu106.bin", 0x400000, 0x40000, CRC(146e3863) SHA1(1933e62a060eb667889b1edd5002c30a37ae00a7) ) - ROM_LOAD ( "tcu107.bin", 0x440000, 0x40000, CRC(95323320) SHA1(5296206f3d84c21374968ffcacfe59eb3215ca46) ) - ROM_LOAD ( "tcu108.bin", 0x480000, 0x40000, CRC(ed152acc) SHA1(372dbc4fdb581ac00a7eb5669cc1ac7afd6033f8) ) - ROM_LOAD ( "tcu109.bin", 0x4c0000, 0x40000, CRC(80715252) SHA1(4586a259780963837ce362b526f161122d2e3cb4) ) + ROM_LOAD ( "tcu107.bin", 0x440000, 0x40000, CRC(95323320) SHA1(5296206f3d84c21374968ffcacfe59eb3215ca46) ) + ROM_LOAD ( "tcu108.bin", 0x480000, 0x40000, CRC(ed152acc) SHA1(372dbc4fdb581ac00a7eb5669cc1ac7afd6033f8) ) + ROM_LOAD ( "tcu109.bin", 0x4c0000, 0x40000, CRC(80715252) SHA1(4586a259780963837ce362b526f161122d2e3cb4) ) ROM_END @@ -2454,9 +2454,9 @@ ROM_START( totcarnp ) ROM_LOAD ( "tcu98.bin", 0x2c0000, 0x40000, CRC(ab06c885) SHA1(09163060269fed2ebd697b71602166e906c95317) ) ROM_LOAD ( "tcu106.bin", 0x400000, 0x40000, CRC(146e3863) SHA1(1933e62a060eb667889b1edd5002c30a37ae00a7) ) - ROM_LOAD ( "tcu107.bin", 0x440000, 0x40000, CRC(95323320) SHA1(5296206f3d84c21374968ffcacfe59eb3215ca46) ) - ROM_LOAD ( "tcu108.bin", 0x480000, 0x40000, CRC(ed152acc) SHA1(372dbc4fdb581ac00a7eb5669cc1ac7afd6033f8) ) - ROM_LOAD ( "tcu109.bin", 0x4c0000, 0x40000, CRC(80715252) SHA1(4586a259780963837ce362b526f161122d2e3cb4) ) + ROM_LOAD ( "tcu107.bin", 0x440000, 0x40000, CRC(95323320) SHA1(5296206f3d84c21374968ffcacfe59eb3215ca46) ) + ROM_LOAD ( "tcu108.bin", 0x480000, 0x40000, CRC(ed152acc) SHA1(372dbc4fdb581ac00a7eb5669cc1ac7afd6033f8) ) + ROM_LOAD ( "tcu109.bin", 0x4c0000, 0x40000, CRC(80715252) SHA1(4586a259780963837ce362b526f161122d2e3cb4) ) ROM_END diff --git a/src/mame/drivers/midzeus.c b/src/mame/drivers/midzeus.c index e10c09e55f1..6990a675e8c 100644 --- a/src/mame/drivers/midzeus.c +++ b/src/mame/drivers/midzeus.c @@ -42,10 +42,10 @@ The Grid v1.2 10/18/2000 #define BEAM_DX 3 #define BEAM_XOFFS 40 /* table in the code indicates an offset of 20 with a beam height of 7 */ -static UINT32 gun_control; -static UINT8 gun_irq_state; +static UINT32 gun_control; +static UINT8 gun_irq_state; static emu_timer * gun_timer[2]; -static INT32 gun_x[2], gun_y[2]; +static INT32 gun_x[2], gun_y[2]; static UINT8 crusnexo_leds_select; static UINT8 keypad_select; @@ -686,21 +686,21 @@ static INPUT_PORTS_START( mk4 ) PORT_DIPNAME( 0x0080, 0x0080, "Test Switch" ) PORT_DIPSETTING( 0x0080, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0100, 0x0100, "Fatalities" ) + PORT_DIPNAME( 0x0100, 0x0100, "Fatalities" ) PORT_DIPSETTING( 0x0000, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0100, DEF_STR( On ) ) - PORT_DIPNAME( 0x0200, 0x0200, "Blood" ) + PORT_DIPNAME( 0x0200, 0x0200, "Blood" ) PORT_DIPSETTING( 0x0000, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0200, DEF_STR( On ) ) - PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) ) /* Manual states that switches 3-7 are Unused */ + PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) ) /* Manual states that switches 3-7 are Unused */ PORT_DIPSETTING( 0x0400, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) ) + PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) ) PORT_DIPSETTING( 0x0800, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x1000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x1000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) ) PORT_DIPSETTING( 0x2000, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) @@ -860,58 +860,58 @@ INPUT_PORTS_END static INPUT_PORTS_START( crusnexo ) PORT_START("DIPS") /* DS1 */ - PORT_DIPNAME( 0x001f, 0x001f, "Country Code" ) - PORT_DIPSETTING( 0x001f, DEF_STR( USA ) ) - PORT_DIPSETTING( 0x001e, "Germany" ) - PORT_DIPSETTING( 0x001d, "France" ) - PORT_DIPSETTING( 0x001c, "Canada" ) - PORT_DIPSETTING( 0x001b, "Switzerland" ) - PORT_DIPSETTING( 0x001a, "Italy" ) - PORT_DIPSETTING( 0x0019, "UK" ) - PORT_DIPSETTING( 0x0018, "Spain" ) - PORT_DIPSETTING( 0x0017, "Austrilia" ) - PORT_DIPSETTING( 0x0016, DEF_STR( Japan ) ) - PORT_DIPSETTING( 0x0015, "Taiwan" ) - PORT_DIPSETTING( 0x0014, "Austria" ) - PORT_DIPSETTING( 0x0013, "Belgium" ) - PORT_DIPSETTING( 0x000f, "Sweden" ) - PORT_DIPSETTING( 0x000e, "Findland" ) + PORT_DIPNAME( 0x001f, 0x001f, "Country Code" ) + PORT_DIPSETTING( 0x001f, DEF_STR( USA ) ) + PORT_DIPSETTING( 0x001e, "Germany" ) + PORT_DIPSETTING( 0x001d, "France" ) + PORT_DIPSETTING( 0x001c, "Canada" ) + PORT_DIPSETTING( 0x001b, "Switzerland" ) + PORT_DIPSETTING( 0x001a, "Italy" ) + PORT_DIPSETTING( 0x0019, "UK" ) + PORT_DIPSETTING( 0x0018, "Spain" ) + PORT_DIPSETTING( 0x0017, "Austrilia" ) + PORT_DIPSETTING( 0x0016, DEF_STR( Japan ) ) + PORT_DIPSETTING( 0x0015, "Taiwan" ) + PORT_DIPSETTING( 0x0014, "Austria" ) + PORT_DIPSETTING( 0x0013, "Belgium" ) + PORT_DIPSETTING( 0x000f, "Sweden" ) + PORT_DIPSETTING( 0x000e, "Findland" ) PORT_DIPSETTING( 0x000d, "Netherlands" ) - PORT_DIPSETTING( 0x000c, "Norway" ) - PORT_DIPSETTING( 0x000b, "Denmark" ) - PORT_DIPSETTING( 0x000a, "Hungary" ) - PORT_DIPSETTING( 0x0008, "General" ) - PORT_DIPNAME( 0x0060, 0x0060, "Coin Mode" ) - PORT_DIPSETTING( 0x0060, "Mode 1" ) /* USA1/GER1/FRA1/SPN1/AUSTRIA1/GEN1/CAN1/SWI1/ITL1/JPN1/TWN1/BLGN1/NTHRLND1/FNLD1/NRWY1/DNMK1/HUN1 */ - PORT_DIPSETTING( 0x0040, "Mode 2" ) /* USA3/GER1/FRA1/SPN1/AUSTRIA1/GEN3/CAN2/SWI2/ITL2/JPN2/TWN2/BLGN2/NTHRLND2 */ - PORT_DIPSETTING( 0x0020, "Mode 3" ) /* USA7/GER1/FRA1/SPN1/AUSTRIA1/GEN5/CAN3/SWI3/ITL3/JPN3/TWN3/BLGN3 */ - PORT_DIPSETTING( 0x0000, "Mode 4" ) /* USA8/GER1/FRA1/SPN1/AUSTRIA1/GEN7 */ + PORT_DIPSETTING( 0x000c, "Norway" ) + PORT_DIPSETTING( 0x000b, "Denmark" ) + PORT_DIPSETTING( 0x000a, "Hungary" ) + PORT_DIPSETTING( 0x0008, "General" ) + PORT_DIPNAME( 0x0060, 0x0060, "Coin Mode" ) + PORT_DIPSETTING( 0x0060, "Mode 1" ) /* USA1/GER1/FRA1/SPN1/AUSTRIA1/GEN1/CAN1/SWI1/ITL1/JPN1/TWN1/BLGN1/NTHRLND1/FNLD1/NRWY1/DNMK1/HUN1 */ + PORT_DIPSETTING( 0x0040, "Mode 2" ) /* USA3/GER1/FRA1/SPN1/AUSTRIA1/GEN3/CAN2/SWI2/ITL2/JPN2/TWN2/BLGN2/NTHRLND2 */ + PORT_DIPSETTING( 0x0020, "Mode 3" ) /* USA7/GER1/FRA1/SPN1/AUSTRIA1/GEN5/CAN3/SWI3/ITL3/JPN3/TWN3/BLGN3 */ + PORT_DIPSETTING( 0x0000, "Mode 4" ) /* USA8/GER1/FRA1/SPN1/AUSTRIA1/GEN7 */ PORT_DIPNAME( 0x0080, 0x0080, "Test Switch" ) PORT_DIPSETTING( 0x0080, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0100, 0x0100, "Game Type" ) /* Manual states "*DIP 1, Switch 1 MUST be set */ - PORT_DIPSETTING( 0x0100, "Dedicated" ) /* to OFF position for proper operation" */ - PORT_DIPSETTING( 0x0000, "Kit" ) - PORT_DIPNAME( 0x0200, 0x0200, "Seat Motion" ) /* For dedicated Sit Down models with Motion Seat */ - PORT_DIPSETTING( 0x0200, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Cabinet ) ) - PORT_DIPSETTING( 0x0400, "Stand Up" ) - PORT_DIPSETTING( 0x0000, "Sit Down" ) - PORT_DIPNAME( 0x0800, 0x0800, "Wheel Invert" ) - PORT_DIPSETTING( 0x0800, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x1000, 0x1000, "ROM Configuration" ) /* Manual lists this dip as Unused */ - PORT_DIPSETTING( 0x1000, "32M ROM Normal" ) - PORT_DIPSETTING( 0x0000, "16M ROM Split Active" ) - PORT_DIPNAME( 0x2000, 0x2000, "Link" ) - PORT_DIPSETTING( 0x2000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0xc000, 0xc000, "Linking I.D.") - PORT_DIPSETTING( 0xc000, "Master #1" ) - PORT_DIPSETTING( 0x8000, "Slave #2" ) - PORT_DIPSETTING( 0x4000, "Slave #3" ) - PORT_DIPSETTING( 0x0000, "Slave #4" ) + PORT_DIPNAME( 0x0100, 0x0100, "Game Type" ) /* Manual states "*DIP 1, Switch 1 MUST be set */ + PORT_DIPSETTING( 0x0100, "Dedicated" ) /* to OFF position for proper operation" */ + PORT_DIPSETTING( 0x0000, "Kit" ) + PORT_DIPNAME( 0x0200, 0x0200, "Seat Motion" ) /* For dedicated Sit Down models with Motion Seat */ + PORT_DIPSETTING( 0x0200, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Cabinet ) ) + PORT_DIPSETTING( 0x0400, "Stand Up" ) + PORT_DIPSETTING( 0x0000, "Sit Down" ) + PORT_DIPNAME( 0x0800, 0x0800, "Wheel Invert" ) + PORT_DIPSETTING( 0x0800, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x1000, 0x1000, "ROM Configuration" ) /* Manual lists this dip as Unused */ + PORT_DIPSETTING( 0x1000, "32M ROM Normal" ) + PORT_DIPSETTING( 0x0000, "16M ROM Split Active" ) + PORT_DIPNAME( 0x2000, 0x2000, "Link" ) + PORT_DIPSETTING( 0x2000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0xc000, 0xc000, "Linking I.D.") + PORT_DIPSETTING( 0xc000, "Master #1" ) + PORT_DIPSETTING( 0x8000, "Slave #2" ) + PORT_DIPSETTING( 0x4000, "Slave #3" ) + PORT_DIPSETTING( 0x0000, "Slave #4" ) PORT_START("SYSTEM") PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 ) @@ -940,9 +940,9 @@ static INPUT_PORTS_START( crusnexo ) PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON9 ) PORT_NAME("View 3") /* View 3 */ PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_BUTTON10 ) PORT_NAME("View 4") /* View 4 */ PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("1st Gear") /* Gear 1 */ - PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("2nd Gear") /* Gear 2 */ - PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("3rd Gear") /* Gear 3 */ - PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("4th Gear") /* Gear 4 */ + PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("2nd Gear") /* Gear 2 */ + PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("3rd Gear") /* Gear 3 */ + PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("4th Gear") /* Gear 4 */ PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* Not Used */ PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* Not Used */ PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* Not Used */ @@ -982,21 +982,21 @@ INPUT_PORTS_END static INPUT_PORTS_START( thegrid ) PORT_START("DIPS") /* DS1 */ - PORT_DIPNAME( 0x0001, 0x0001, "Show Blood" ) + PORT_DIPNAME( 0x0001, 0x0001, "Show Blood" ) PORT_DIPSETTING( 0x0001, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) ) /* Manual states that switches 2-7 are Unused */ + PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) ) /* Manual states that switches 2-7 are Unused */ PORT_DIPSETTING( 0x0002, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) ) PORT_DIPSETTING( 0x0004, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) ) + PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) ) PORT_DIPSETTING( 0x0000, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0008, DEF_STR( On ) ) - PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x0010, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x0010, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) ) PORT_DIPSETTING( 0x0020, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) @@ -1347,7 +1347,7 @@ ROM_START( thegrid ) /* Version 1.2 Program roms */ ROM_LOAD( "the_grid.u4", 0x800000, 0x400000, CRC(7a15c203) SHA1(a0a49dd08bba92402640ed2d1fb4fee112c4ab5f) ) ROM_REGION32_LE( 0x0800000, "user1", 0 ) - ROM_LOAD32_WORD( "thegrid-12.u10", 0x0000000, 0x100000, CRC(eb6c2d54) SHA1(ddd32757a9be011988b7add3c091e93292a0867c) ) + ROM_LOAD32_WORD( "thegrid-12.u10", 0x0000000, 0x100000, CRC(eb6c2d54) SHA1(ddd32757a9be011988b7add3c091e93292a0867c) ) ROM_LOAD32_WORD( "thegrid-12.u11", 0x0000002, 0x100000, CRC(b9b5f92b) SHA1(36e16f109af9a5172869344f09b337b67e0b3e11) ) ROM_LOAD32_WORD( "thegrid-12.u12", 0x0200000, 0x100000, CRC(2810c207) SHA1(d244eaf85473ed49442a906d437af1a9f91a2f9d) ) ROM_LOAD32_WORD( "thegrid-12.u13", 0x0200002, 0x100000, CRC(8b721848) SHA1(d82f39045437ada2061587176e24f558a5e203fe) ) @@ -1369,7 +1369,7 @@ ROM_START( thegrida ) /* Version 1.1 Program roms */ ROM_LOAD( "the_grid.u4", 0x800000, 0x400000, CRC(7a15c203) SHA1(a0a49dd08bba92402640ed2d1fb4fee112c4ab5f) ) ROM_REGION32_LE( 0x0800000, "user1", 0 ) - ROM_LOAD32_WORD( "thegrid-11.u10", 0x0000000, 0x100000, CRC(87ea0e9e) SHA1(618de2ca87b7a3e0225d1f7e65f8fc1356de1421) ) + ROM_LOAD32_WORD( "thegrid-11.u10", 0x0000000, 0x100000, CRC(87ea0e9e) SHA1(618de2ca87b7a3e0225d1f7e65f8fc1356de1421) ) ROM_LOAD32_WORD( "thegrid-11.u11", 0x0000002, 0x100000, CRC(73d84b1a) SHA1(8dcfcab5ff64f46f8486e6439a10d91ad26fd48a) ) ROM_LOAD32_WORD( "thegrid-11.u12", 0x0200000, 0x100000, CRC(78d16ca1) SHA1(7b893ec8af2f44d8bc293861fd8622d68d41ccbe) ) ROM_LOAD32_WORD( "thegrid-11.u13", 0x0200002, 0x100000, CRC(8e00b400) SHA1(96581c5da62afc19e6d69b2352b3166665cb9918) ) diff --git a/src/mame/drivers/mirage.c b/src/mame/drivers/mirage.c index de11132c4f0..80a94b32b38 100644 --- a/src/mame/drivers/mirage.c +++ b/src/mame/drivers/mirage.c @@ -359,7 +359,7 @@ ROM_START( mirage ) ROM_LOAD( "mbl-00.7a", 0x000000, 0x100000, CRC(2e258b7b) SHA1(2dbd7d16a1eda97ae3de149b67e80e511aa9d0ba) ) ROM_REGION( 0x400000, "gfx2", 0 ) /* Sprites */ - ROM_LOAD16_BYTE( "mbl-01.11a", 0x000001, 0x200000, CRC(895be69a) SHA1(541d8f37fb4cf99312b80a0eb0d729fbbeab5f4f) ) + ROM_LOAD16_BYTE( "mbl-01.11a", 0x000001, 0x200000, CRC(895be69a) SHA1(541d8f37fb4cf99312b80a0eb0d729fbbeab5f4f) ) ROM_LOAD16_BYTE( "mbl-02.12a", 0x000000, 0x200000, CRC(474f6104) SHA1(ff81b32b90192c3d5f27c436a9246aa6caaeeeee) ) ROM_REGION( 0x200000, "oki_bgm_data", 0 ) diff --git a/src/mame/drivers/missb2.c b/src/mame/drivers/missb2.c index 24233f40aea..041a1db730d 100644 --- a/src/mame/drivers/missb2.c +++ b/src/mame/drivers/missb2.c @@ -299,7 +299,7 @@ static const UINT32 bglayout_xoffset[256] = 1030*8, 1031*8, 3078*8, 3079*8, 1038*8, 1039*8, 3086*8, 3087*8, 1282*8, 1283*8, 3330*8, 3331*8, 1290*8, 1291*8, 3338*8, 3339*8, 1286*8, 1287*8, 3334*8, 3335*8, 1294*8, 1295*8, 3342*8, 3343*8, - 514*8, 515*8, 2562*8, 2563*8, 522*8, 523*8, 2570*8, 2571*8, + 514*8, 515*8, 2562*8, 2563*8, 522*8, 523*8, 2570*8, 2571*8, 518*8, 519*8, 2566*8, 2567*8, 526*8, 527*8, 2574*8, 2575*8, 770*8, 771*8, 2818*8, 2819*8, 778*8, 779*8, 2826*8, 2827*8, 774*8, 775*8, 2822*8, 2823*8, 782*8, 783*8, 2830*8, 2831*8, diff --git a/src/mame/drivers/missile.c b/src/mame/drivers/missile.c index 3a584a14d88..964a4d199f7 100644 --- a/src/mame/drivers/missile.c +++ b/src/mame/drivers/missile.c @@ -541,7 +541,7 @@ INLINE offs_t get_bit3_addr(offs_t pixaddr) /* the 3rd bit of video RAM is scattered about various areas we take a 16-bit pixel address here and convert it into a video RAM address based on logic in the schematics */ - return (( pixaddr & 0x0800) >> 1) | + return (( pixaddr & 0x0800) >> 1) | ((~pixaddr & 0x0800) >> 2) | (( pixaddr & 0x07f8) >> 2) | (( pixaddr & 0x1000) >> 12); @@ -746,9 +746,9 @@ static READ8_HANDLER( missile_r ) if (ctrld) /* trackball */ { if (!flipscreen) - result = ((input_port_read(space->machine, "TRACK0_Y") << 4) & 0xf0) | (input_port_read(space->machine, "TRACK0_X") & 0x0f); + result = ((input_port_read(space->machine, "TRACK0_Y") << 4) & 0xf0) | (input_port_read(space->machine, "TRACK0_X") & 0x0f); else - result = ((input_port_read(space->machine, "TRACK1_Y") << 4) & 0xf0) | (input_port_read(space->machine, "TRACK1_X") & 0x0f); + result = ((input_port_read(space->machine, "TRACK1_Y") << 4) & 0xf0) | (input_port_read(space->machine, "TRACK1_X") & 0x0f); } else /* buttons */ result = input_port_read(space->machine, "IN0"); diff --git a/src/mame/drivers/model2.c b/src/mame/drivers/model2.c index 4e0c2be4078..090f998c35b 100644 --- a/src/mame/drivers/model2.c +++ b/src/mame/drivers/model2.c @@ -1714,7 +1714,7 @@ static WRITE16_HANDLER( model2snd_ctrl ) UINT8 *snd = memory_region(space->machine, "scsp"); if (data & 0x20) { - memory_set_bankptr(space->machine, "bank4", snd + 0x200000); + memory_set_bankptr(space->machine, "bank4", snd + 0x200000); memory_set_bankptr(space->machine, "bank5", snd + 0x600000); } else @@ -1831,7 +1831,7 @@ static const mb86233_cpu_core tgp_config = static MACHINE_DRIVER_START( model2o ) MDRV_CPU_ADD("maincpu", I960, 25000000) MDRV_CPU_PROGRAM_MAP(model2o_mem) - MDRV_CPU_VBLANK_INT_HACK(model2_interrupt,2) + MDRV_CPU_VBLANK_INT_HACK(model2_interrupt,2) MDRV_CPU_ADD("audiocpu", M68000, 10000000) MDRV_CPU_PROGRAM_MAP(model1_snd) @@ -1887,7 +1887,7 @@ MACHINE_DRIVER_END static MACHINE_DRIVER_START( model2a ) MDRV_CPU_ADD("maincpu", I960, 25000000) MDRV_CPU_PROGRAM_MAP(model2a_crx_mem) - MDRV_CPU_VBLANK_INT_HACK(model2_interrupt,2) + MDRV_CPU_VBLANK_INT_HACK(model2_interrupt,2) MDRV_CPU_ADD("audiocpu", M68000, 12000000) MDRV_CPU_PROGRAM_MAP(model2_snd) @@ -1942,7 +1942,7 @@ static const sharc_config sharc_cfg = static MACHINE_DRIVER_START( model2b ) MDRV_CPU_ADD("maincpu", I960, 25000000) MDRV_CPU_PROGRAM_MAP(model2b_crx_mem) - MDRV_CPU_VBLANK_INT_HACK(model2_interrupt,2) + MDRV_CPU_VBLANK_INT_HACK(model2_interrupt,2) MDRV_CPU_ADD("audiocpu", M68000, 12000000) MDRV_CPU_PROGRAM_MAP(model2_snd) @@ -1997,7 +1997,7 @@ MACHINE_DRIVER_END static MACHINE_DRIVER_START( model2c ) MDRV_CPU_ADD("maincpu", I960, 25000000) MDRV_CPU_PROGRAM_MAP(model2c_crx_mem) - MDRV_CPU_VBLANK_INT_HACK(model2c_interrupt,3) + MDRV_CPU_VBLANK_INT_HACK(model2c_interrupt,3) MDRV_CPU_ADD("audiocpu", M68000, 12000000) MDRV_CPU_PROGRAM_MAP(model2_snd) diff --git a/src/mame/drivers/model3.c b/src/mame/drivers/model3.c index cc98da894eb..18bb5ac81a0 100644 --- a/src/mame/drivers/model3.c +++ b/src/mame/drivers/model3.c @@ -4617,7 +4617,7 @@ static WRITE16_HANDLER( model3snd_ctrl ) UINT8 *snd = memory_region(space->machine, "scsp2"); if (data & 0x20) { - memory_set_bankptr(space->machine, "bank4", snd + 0x200000); + memory_set_bankptr(space->machine, "bank4", snd + 0x200000); memory_set_bankptr(space->machine, "bank5", snd + 0x600000); } else @@ -4644,7 +4644,7 @@ static int scsp_last_line = 0; static void scsp_irq(const device_config *device, int irq) { - if (irq > 0) + if (irq > 0) { scsp_last_line = irq; cputag_set_input_line(device->machine, "audiocpu", irq, ASSERT_LINE); @@ -4711,12 +4711,12 @@ static MACHINE_DRIVER_START( model3_10 ) MDRV_CPU_ADD("maincpu", PPC603E, 66000000) MDRV_CPU_CONFIG(model3_10) MDRV_CPU_PROGRAM_MAP(model3_mem) - MDRV_CPU_VBLANK_INT_HACK(model3_interrupt,2) + MDRV_CPU_VBLANK_INT_HACK(model3_interrupt,2) MDRV_CPU_ADD("audiocpu", M68000, 12000000) MDRV_CPU_PROGRAM_MAP(model3_snd) - MDRV_QUANTUM_TIME(HZ(600)) + MDRV_QUANTUM_TIME(HZ(600)) MDRV_MACHINE_START(model3_10) MDRV_MACHINE_RESET(model3_10) @@ -4753,7 +4753,7 @@ static MACHINE_DRIVER_START( model3_15 ) MDRV_CPU_ADD("maincpu", PPC603E, 100000000) MDRV_CPU_CONFIG(model3_15) MDRV_CPU_PROGRAM_MAP(model3_mem) - MDRV_CPU_VBLANK_INT_HACK(model3_interrupt,2) + MDRV_CPU_VBLANK_INT_HACK(model3_interrupt,2) MDRV_CPU_ADD("audiocpu", M68000, 12000000) MDRV_CPU_PROGRAM_MAP(model3_snd) @@ -4793,7 +4793,7 @@ static MACHINE_DRIVER_START( model3_20 ) MDRV_CPU_ADD("maincpu", PPC603R, 166000000) MDRV_CPU_CONFIG(model3_2x) MDRV_CPU_PROGRAM_MAP(model3_mem) - MDRV_CPU_VBLANK_INT_HACK(model3_interrupt,2) + MDRV_CPU_VBLANK_INT_HACK(model3_interrupt,2) MDRV_CPU_ADD("audiocpu", M68000, 12000000) MDRV_CPU_PROGRAM_MAP(model3_snd) @@ -4833,7 +4833,7 @@ static MACHINE_DRIVER_START( model3_21 ) MDRV_CPU_ADD("maincpu", PPC603R, 166000000) MDRV_CPU_CONFIG(model3_2x) MDRV_CPU_PROGRAM_MAP(model3_mem) - MDRV_CPU_VBLANK_INT_HACK(model3_interrupt,2) + MDRV_CPU_VBLANK_INT_HACK(model3_interrupt,2) MDRV_CPU_ADD("audiocpu", M68000, 12000000) MDRV_CPU_PROGRAM_MAP(model3_snd) diff --git a/src/mame/drivers/moo.c b/src/mame/drivers/moo.c index 0ee229b6c06..6ee8ccca8a4 100644 --- a/src/mame/drivers/moo.c +++ b/src/mame/drivers/moo.c @@ -322,7 +322,7 @@ static ADDRESS_MAP_START( moobl_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x0de000, 0x0de001) AM_READWRITE(control2_r, control2_w) AM_RANGE(0x100000, 0x17ffff) AM_ROM AM_RANGE(0x180000, 0x18ffff) AM_RAM AM_BASE(&workram) /* Work RAM */ - AM_RANGE(0x190000, 0x19ffff) AM_RAM AM_BASE_GENERIC(spriteram) /* Sprite RAM */ + AM_RANGE(0x190000, 0x19ffff) AM_RAM AM_BASE_GENERIC(spriteram) /* Sprite RAM */ AM_RANGE(0x1a0000, 0x1a1fff) AM_DEVREADWRITE("k056832", k056832_ram_word_r, k056832_ram_word_w) /* Graphic planes */ AM_RANGE(0x1a2000, 0x1a3fff) AM_DEVREADWRITE("k056832", k056832_ram_word_r, k056832_ram_word_w) /* Graphic planes mirror */ AM_RANGE(0x1b0000, 0x1b1fff) AM_DEVREAD("k056832", k056832_rom_word_r) /* Passthrough to tile roms */ diff --git a/src/mame/drivers/mpu4.c b/src/mame/drivers/mpu4.c index bef3903ef1b..69f512166d4 100644 --- a/src/mame/drivers/mpu4.c +++ b/src/mame/drivers/mpu4.c @@ -708,8 +708,8 @@ static READ8_DEVICE_HANDLER( pia_ic4_portb_r ) if ( optic_pattern & 0x08 ) ic4_input_b |= 0x08; /* reel D tab */ else ic4_input_b &= ~0x08; - if ( signal_50hz ) ic4_input_b |= 0x04; /* 50 Hz */ - else ic4_input_b &= ~0x04; + if ( signal_50hz ) ic4_input_b |= 0x04; /* 50 Hz */ + else ic4_input_b &= ~0x04; #ifdef UNUSED_FUNCTION if ( lamp_overcurrent ) ic4_input_b |= 0x02; @@ -803,26 +803,26 @@ static void update_ay(const device_config *device) { switch (ay8913_address) { - case 0x00: + case 0x00: { /* Inactive */ break; } - case 0x01: + case 0x01: { /* CA2 = 1 CB2 = 0? : Read from selected PSG register and make the register data available to Port A */ const device_config *pia_ic6 = devtag_get_device(device->machine, "pia_ic6"); LOG(("AY8913 address = %d \n",pia6821_get_output_a(pia_ic6)&0x0f)); break; - } - case 0x02: + } + case 0x02: {/* CA2 = 0 CB2 = 1? : Write to selected PSG register and write data to Port A */ const device_config *pia_ic6 = devtag_get_device(device->machine, "pia_ic6"); const device_config *ay = devtag_get_device(device->machine, "ay8913"); - ay8910_data_w(ay, 0, pia6821_get_output_a(pia_ic6)); + ay8910_data_w(ay, 0, pia6821_get_output_a(pia_ic6)); LOG(("AY Chip Write \n")); break; - } - case 0x03: + } + case 0x03: {/* CA2 = 1 CB2 = 1? : The register will now be selected and the user can read from or write to it. The register will remain selected until another is chosen.*/ const device_config *pia_ic6 = devtag_get_device(device->machine, "pia_ic6"); @@ -830,7 +830,7 @@ static void update_ay(const device_config *device) ay8910_address_w(ay, 0, pia6821_get_output_a(pia_ic6)); LOG(("AY Chip Select \n")); break; - } + } default: { LOG(("AY Chip error \n")); @@ -888,7 +888,7 @@ static WRITE8_DEVICE_HANDLER( pia_ic6_porta_w ) LOG(("%s: IC6 PIA Write A %2x\n", cpuexec_describe_context(device->machine),data)); if (mod_number <4) { - ay_data = data; + ay_data = data; update_ay(device); } } @@ -1192,7 +1192,7 @@ static INPUT_PORTS_START( mpu4 ) PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_BUTTON2) PORT_NAME("Lo") PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("18") PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("19") - PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("20") + PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("20") PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_SERVICE) PORT_NAME("Test Button") PORT_CODE(KEYCODE_W) PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_SERVICE) PORT_NAME("Refill Key") PORT_CODE(KEYCODE_R) PORT_TOGGLE PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_INTERLOCK) PORT_NAME("Cashbox Door") PORT_CODE(KEYCODE_Q) PORT_TOGGLE @@ -1384,8 +1384,8 @@ static INPUT_PORTS_START( connect4 ) PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("6") PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("7") - PORT_START("AUX2") - PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_SPECIAL) + PORT_START("AUX2") + PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_SPECIAL) PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_SPECIAL) PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_SPECIAL) PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_SPECIAL) @@ -1757,9 +1757,9 @@ static ADDRESS_MAP_START( mod2_memmap, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x0900, 0x0907) AM_DEVREADWRITE("6840ptm", ptm6840_read, ptm6840_write) /* 6840PTM */ - AM_RANGE(0x0a00, 0x0a03) AM_DEVREADWRITE("pia_ic3", pia6821_r, pia6821_w) /* PIA6821 IC3 */ - AM_RANGE(0x0b00, 0x0b03) AM_DEVREADWRITE("pia_ic4", pia6821_r, pia6821_w) /* PIA6821 IC4 */ - AM_RANGE(0x0c00, 0x0c03) AM_DEVREADWRITE("pia_ic5", pia6821_r, pia6821_w) /* PIA6821 IC5 */ + AM_RANGE(0x0a00, 0x0a03) AM_DEVREADWRITE("pia_ic3", pia6821_r, pia6821_w) /* PIA6821 IC3 */ + AM_RANGE(0x0b00, 0x0b03) AM_DEVREADWRITE("pia_ic4", pia6821_r, pia6821_w) /* PIA6821 IC4 */ + AM_RANGE(0x0c00, 0x0c03) AM_DEVREADWRITE("pia_ic5", pia6821_r, pia6821_w) /* PIA6821 IC5 */ AM_RANGE(0x0d00, 0x0d03) AM_DEVREADWRITE("pia_ic6", pia6821_r, pia6821_w) /* PIA6821 IC6 */ AM_RANGE(0x0e00, 0x0e03) AM_DEVREADWRITE("pia_ic7", pia6821_r, pia6821_w) /* PIA6821 IC7 */ AM_RANGE(0x0f00, 0x0f03) AM_DEVREADWRITE("pia_ic8", pia6821_r, pia6821_w) /* PIA6821 IC8 */ @@ -1780,9 +1780,9 @@ static ADDRESS_MAP_START( mod4_yam_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x0900, 0x0907) AM_DEVREADWRITE("6840ptm", ptm6840_read, ptm6840_write) /* 6840PTM */ - AM_RANGE(0x0a00, 0x0a03) AM_DEVREADWRITE("pia_ic3", pia6821_r, pia6821_w) /* PIA6821 IC3 */ - AM_RANGE(0x0b00, 0x0b03) AM_DEVREADWRITE("pia_ic4", pia6821_r, pia6821_w) /* PIA6821 IC4 */ - AM_RANGE(0x0c00, 0x0c03) AM_DEVREADWRITE("pia_ic5", pia6821_r, pia6821_w) /* PIA6821 IC5 */ + AM_RANGE(0x0a00, 0x0a03) AM_DEVREADWRITE("pia_ic3", pia6821_r, pia6821_w) /* PIA6821 IC3 */ + AM_RANGE(0x0b00, 0x0b03) AM_DEVREADWRITE("pia_ic4", pia6821_r, pia6821_w) /* PIA6821 IC4 */ + AM_RANGE(0x0c00, 0x0c03) AM_DEVREADWRITE("pia_ic5", pia6821_r, pia6821_w) /* PIA6821 IC5 */ AM_RANGE(0x0d00, 0x0d03) AM_DEVREADWRITE("pia_ic6", pia6821_r, pia6821_w) /* PIA6821 IC6 */ AM_RANGE(0x0e00, 0x0e03) AM_DEVREADWRITE("pia_ic7", pia6821_r, pia6821_w) /* PIA6821 IC7 */ AM_RANGE(0x0f00, 0x0f03) AM_DEVREADWRITE("pia_ic8", pia6821_r, pia6821_w) /* PIA6821 IC8 */ @@ -1805,9 +1805,9 @@ static ADDRESS_MAP_START( mod4_oki_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x0900, 0x0907) AM_DEVREADWRITE("6840ptm", ptm6840_read, ptm6840_write) /* 6840PTM */ - AM_RANGE(0x0a00, 0x0a03) AM_DEVREADWRITE("pia_ic3", pia6821_r, pia6821_w) /* PIA6821 IC3 */ - AM_RANGE(0x0b00, 0x0b03) AM_DEVREADWRITE("pia_ic4", pia6821_r, pia6821_w) /* PIA6821 IC4 */ - AM_RANGE(0x0c00, 0x0c03) AM_DEVREADWRITE("pia_ic5", pia6821_r, pia6821_w) /* PIA6821 IC5 */ + AM_RANGE(0x0a00, 0x0a03) AM_DEVREADWRITE("pia_ic3", pia6821_r, pia6821_w) /* PIA6821 IC3 */ + AM_RANGE(0x0b00, 0x0b03) AM_DEVREADWRITE("pia_ic4", pia6821_r, pia6821_w) /* PIA6821 IC4 */ + AM_RANGE(0x0c00, 0x0c03) AM_DEVREADWRITE("pia_ic5", pia6821_r, pia6821_w) /* PIA6821 IC5 */ AM_RANGE(0x0d00, 0x0d03) AM_DEVREADWRITE("pia_ic6", pia6821_r, pia6821_w) /* PIA6821 IC6 */ AM_RANGE(0x0e00, 0x0e03) AM_DEVREADWRITE("pia_ic7", pia6821_r, pia6821_w) /* PIA6821 IC7 */ AM_RANGE(0x0f00, 0x0f03) AM_DEVREADWRITE("pia_ic8", pia6821_r, pia6821_w) /* PIA6821 IC8 */ @@ -1832,9 +1832,9 @@ static ADDRESS_MAP_START( dutch_memmap, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x0900, 0x0907) AM_DEVREADWRITE("6840ptm", ptm6840_read, ptm6840_write) /* 6840PTM */ - AM_RANGE(0x0a00, 0x0a03) AM_DEVREADWRITE("pia_ic3", pia6821_r, pia6821_w) /* PIA6821 IC3 */ - AM_RANGE(0x0b00, 0x0b03) AM_DEVREADWRITE("pia_ic4", pia6821_r, pia6821_w) /* PIA6821 IC4 */ - AM_RANGE(0x0c00, 0x0c03) AM_DEVREADWRITE("pia_ic5", pia6821_r, pia6821_w) /* PIA6821 IC5 */ + AM_RANGE(0x0a00, 0x0a03) AM_DEVREADWRITE("pia_ic3", pia6821_r, pia6821_w) /* PIA6821 IC3 */ + AM_RANGE(0x0b00, 0x0b03) AM_DEVREADWRITE("pia_ic4", pia6821_r, pia6821_w) /* PIA6821 IC4 */ + AM_RANGE(0x0c00, 0x0c03) AM_DEVREADWRITE("pia_ic5", pia6821_r, pia6821_w) /* PIA6821 IC5 */ AM_RANGE(0x0d00, 0x0d03) AM_DEVREADWRITE("pia_ic6", pia6821_r, pia6821_w) /* PIA6821 IC6 */ AM_RANGE(0x0e00, 0x0e03) AM_DEVREADWRITE("pia_ic7", pia6821_r, pia6821_w) /* PIA6821 IC7 */ AM_RANGE(0x0f00, 0x0f03) AM_DEVREADWRITE("pia_ic8", pia6821_r, pia6821_w) /* PIA6821 IC8 */ @@ -1912,7 +1912,7 @@ MACHINE_DRIVER_END static MACHINE_DRIVER_START( mpu4dutch ) MDRV_IMPORT_FROM( mod4oki ) MDRV_CPU_MODIFY("maincpu") - MDRV_CPU_PROGRAM_MAP(dutch_memmap) // setup read and write memorymap + MDRV_CPU_PROGRAM_MAP(dutch_memmap) // setup read and write memorymap MDRV_MACHINE_START(mpu4dutch) // main mpu4 board initialisation MACHINE_DRIVER_END @@ -1932,8 +1932,8 @@ ROM_START( m_gmball ) ROM_END // year, name, parent, machine, input, init, monitor, company, fullname, flags -GAME( 198?, m_oldtmr,0, mpu4dutch,mpu4, 0, ROT0, "Barcrest", "Old Timer", GAME_NOT_WORKING|GAME_NO_SOUND|GAME_REQUIRES_ARTWORK ) -GAME( 198?, m_ccelbr,0, mpu4mod2, mpu4, m_ccelbr, ROT0, "Barcrest", "Club Celebration", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK ) +GAME( 198?, m_oldtmr,0, mpu4dutch,mpu4, 0, ROT0, "Barcrest", "Old Timer", GAME_NOT_WORKING|GAME_NO_SOUND|GAME_REQUIRES_ARTWORK ) +GAME( 198?, m_ccelbr,0, mpu4mod2, mpu4, m_ccelbr, ROT0, "Barcrest", "Club Celebration", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK ) GAMEL(198?, m_gmball,0, mod4yam, gamball, m_gmball, ROT0, "Barcrest", "Gamball", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK,layout_gamball ) #include "drivers/mpu4drvr.c" diff --git a/src/mame/drivers/mpu4drvr.c b/src/mame/drivers/mpu4drvr.c index be8fbe4f321..d09bb453747 100644 --- a/src/mame/drivers/mpu4drvr.c +++ b/src/mame/drivers/mpu4drvr.c @@ -599,17 +599,17 @@ static void scn2674_write_init_regs(UINT8 data) IR0_scn2674_sync_select = (data&0x04)>>2; IR0_scn2674_buffer_mode_select = (data&0x03); - LOGSTUFF(("IR0 - Double Ht Wd %02x\n",IR0_scn2674_double_ht_wd)); - LOGSTUFF(("IR0 - Scanlines per Character Row %02x\n",IR0_scn2674_scanline_per_char_row)); - LOGSTUFF(("IR0 - Sync Select %02x\n",IR0_scn2674_sync_select)); - LOGSTUFF(("IR0 - Buffer Mode Select %02x\n",IR0_scn2674_buffer_mode_select)); + LOGSTUFF(("IR0 - Double Ht Wd %02x\n",IR0_scn2674_double_ht_wd)); + LOGSTUFF(("IR0 - Scanlines per Character Row %02x\n",IR0_scn2674_scanline_per_char_row)); + LOGSTUFF(("IR0 - Sync Select %02x\n",IR0_scn2674_sync_select)); + LOGSTUFF(("IR0 - Buffer Mode Select %02x\n",IR0_scn2674_buffer_mode_select)); break; case 1: IR1_scn2674_interlace_enable = (data&0x80)>>7; IR1_scn2674_equalizing_constant = (data&0x7f); - LOGSTUFF(("IR1 - Interlace Enable %02x\n",IR1_scn2674_interlace_enable)); + LOGSTUFF(("IR1 - Interlace Enable %02x\n",IR1_scn2674_interlace_enable)); LOGSTUFF(("IR1 - Equalizing Constant %02x\n",IR1_scn2674_equalizing_constant)); break; @@ -618,7 +618,7 @@ static void scn2674_write_init_regs(UINT8 data) IR2_scn2674_horz_sync_width = (data&0x78)>>3; IR2_scn2674_horz_back_porch = (data&0x07); - LOGSTUFF(("IR2 - Row Table %02x\n",IR2_scn2674_row_table)); + LOGSTUFF(("IR2 - Row Table %02x\n",IR2_scn2674_row_table)); LOGSTUFF(("IR2 - Horizontal Sync Width %02x\n",IR2_scn2674_horz_sync_width)); LOGSTUFF(("IR2 - Horizontal Back Porch %02x\n",IR2_scn2674_horz_back_porch)); break; @@ -627,24 +627,24 @@ static void scn2674_write_init_regs(UINT8 data) IR3_scn2674_vert_front_porch = (data&0xe0)>>5; IR3_scn2674_vert_back_porch = (data&0x1f)>>0; - LOGSTUFF(("IR3 - Vertical Front Porch %02x\n",IR3_scn2674_vert_front_porch)); - LOGSTUFF(("IR3 - Vertical Back Porch %02x\n",IR3_scn2674_vert_back_porch)); + LOGSTUFF(("IR3 - Vertical Front Porch %02x\n",IR3_scn2674_vert_front_porch)); + LOGSTUFF(("IR3 - Vertical Back Porch %02x\n",IR3_scn2674_vert_back_porch)); break; case 4: - IR4_scn2674_rows_per_screen = data&0x7f; + IR4_scn2674_rows_per_screen = data&0x7f; IR4_scn2674_character_blink_rate = (data & 0x80)>>7; - LOGSTUFF(("IR4 - Rows Per Screen %02x\n",IR4_scn2674_rows_per_screen)); - LOGSTUFF(("IR4 - Character Blink Rate %02x\n",IR4_scn2674_character_blink_rate)); + LOGSTUFF(("IR4 - Rows Per Screen %02x\n",IR4_scn2674_rows_per_screen)); + LOGSTUFF(("IR4 - Character Blink Rate %02x\n",IR4_scn2674_character_blink_rate)); break; case 5: /* IR5 - Active Characters Per Row cccc cccc c = Characters Per Row */ - IR5_scn2674_character_per_row = data; - LOGSTUFF(("IR5 - Active Characters Per Row %02x\n",IR5_scn2674_character_per_row)); + IR5_scn2674_character_per_row = data; + LOGSTUFF(("IR5 - Active Characters Per Row %02x\n",IR5_scn2674_character_per_row)); break; case 6: @@ -655,38 +655,38 @@ static void scn2674_write_init_regs(UINT8 data) case 8: IR8_scn2674_display_buffer_first_address_LSB = data; - LOGSTUFF(("IR8 - Display Buffer First Address LSB %02x\n",IR8_scn2674_display_buffer_first_address_LSB)); + LOGSTUFF(("IR8 - Display Buffer First Address LSB %02x\n",IR8_scn2674_display_buffer_first_address_LSB)); break; case 9: IR9_scn2674_display_buffer_first_address_MSB = data & 0x0f; IR9_scn2674_display_buffer_last_address = (data & 0xf0)>>4; - LOGSTUFF(("IR9 - Display Buffer First Address MSB %02x\n",IR9_scn2674_display_buffer_first_address_MSB)); - LOGSTUFF(("IR9 - Display Buffer Last Address %02x\n",IR9_scn2674_display_buffer_last_address)); + LOGSTUFF(("IR9 - Display Buffer First Address MSB %02x\n",IR9_scn2674_display_buffer_first_address_MSB)); + LOGSTUFF(("IR9 - Display Buffer Last Address %02x\n",IR9_scn2674_display_buffer_last_address)); break; case 10: IR10_scn2674_display_pointer_address_lower = data; - LOGSTUFF(("IR10 - Display Pointer Address Lower %02x\n",IR10_scn2674_display_pointer_address_lower)); + LOGSTUFF(("IR10 - Display Pointer Address Lower %02x\n",IR10_scn2674_display_pointer_address_lower)); break; case 11: IR11_scn2674_display_pointer_address_upper= data&0x3f; - LOGSTUFF(("IR11 - Display Pointer Address Lower %02x\n",IR11_scn2674_display_pointer_address_upper)); + LOGSTUFF(("IR11 - Display Pointer Address Lower %02x\n",IR11_scn2674_display_pointer_address_upper)); break; case 12: IR12_scn2674_scroll_start = (data & 0x80)>>7; IR12_scn2674_split_register_1 = (data & 0x7f); - LOGSTUFF(("IR12 - Scroll Start %02x\n",IR12_scn2674_scroll_start)); - LOGSTUFF(("IR12 - Split Register 1 %02x\n",IR12_scn2674_split_register_1)); + LOGSTUFF(("IR12 - Scroll Start %02x\n",IR12_scn2674_scroll_start)); + LOGSTUFF(("IR12 - Split Register 1 %02x\n",IR12_scn2674_split_register_1)); break; case 13: IR13_scn2674_scroll_end = (data & 0x80)>>7; IR13_scn2674_split_register_2 = (data & 0x7f); - LOGSTUFF(("IR13 - Scroll End %02x\n",IR13_scn2674_scroll_end)); - LOGSTUFF(("IR13 - Split Register 2 %02x\n",IR13_scn2674_split_register_2)); + LOGSTUFF(("IR13 - Scroll End %02x\n",IR13_scn2674_scroll_end)); + LOGSTUFF(("IR13 - Split Register 2 %02x\n",IR13_scn2674_split_register_2)); break; case 14: @@ -1024,7 +1024,7 @@ static VIDEO_START( mpu4_vid ) memset(mpu4_vid_vidram,0,0x20000); - /* find first empty slot to decode gfx */ + /* find first empty slot to decode gfx */ for (mpu4_gfx_index = 0; mpu4_gfx_index < MAX_GFX_ELEMENTS; mpu4_gfx_index++) if (machine->gfx[mpu4_gfx_index] == 0) break; @@ -1483,9 +1483,9 @@ static ADDRESS_MAP_START( mpu4_6809_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x0900, 0x0907) AM_DEVREADWRITE("6840ptm", ptm6840_read, ptm6840_write) /* 6840PTM */ - AM_RANGE(0x0a00, 0x0a03) AM_DEVREADWRITE("pia_ic3", pia6821_r, pia6821_w) /* PIA6821 IC3 */ - AM_RANGE(0x0b00, 0x0b03) AM_DEVREADWRITE("pia_ic4", pia6821_r, pia6821_w) /* PIA6821 IC4 */ - AM_RANGE(0x0c00, 0x0c03) AM_DEVREADWRITE("pia_ic5", pia6821_r, pia6821_w) /* PIA6821 IC5 */ + AM_RANGE(0x0a00, 0x0a03) AM_DEVREADWRITE("pia_ic3", pia6821_r, pia6821_w) /* PIA6821 IC3 */ + AM_RANGE(0x0b00, 0x0b03) AM_DEVREADWRITE("pia_ic4", pia6821_r, pia6821_w) /* PIA6821 IC4 */ + AM_RANGE(0x0c00, 0x0c03) AM_DEVREADWRITE("pia_ic5", pia6821_r, pia6821_w) /* PIA6821 IC5 */ AM_RANGE(0x0d00, 0x0d03) AM_DEVREADWRITE("pia_ic6", pia6821_r, pia6821_w) /* PIA6821 IC6 */ AM_RANGE(0x0e00, 0x0e03) AM_DEVREADWRITE("pia_ic7", pia6821_r, pia6821_w) /* PIA6821 IC7 */ AM_RANGE(0x0f00, 0x0f03) AM_DEVREADWRITE("pia_ic8", pia6821_r, pia6821_w) /* PIA6821 IC8 */ @@ -1669,9 +1669,9 @@ static ADDRESS_MAP_START( dealem_memmap, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x0900, 0x0907) AM_DEVREADWRITE("6840ptm", ptm6840_read, ptm6840_write) /* 6840PTM */ - AM_RANGE(0x0a00, 0x0a03) AM_DEVREADWRITE("pia_ic3", pia6821_r, pia6821_w) /* PIA6821 IC3 */ - AM_RANGE(0x0b00, 0x0b03) AM_DEVREADWRITE("pia_ic4", pia6821_r, pia6821_w) /* PIA6821 IC4 */ - AM_RANGE(0x0c00, 0x0c03) AM_DEVREADWRITE("pia_ic5", pia6821_r, pia6821_w) /* PIA6821 IC5 */ + AM_RANGE(0x0a00, 0x0a03) AM_DEVREADWRITE("pia_ic3", pia6821_r, pia6821_w) /* PIA6821 IC3 */ + AM_RANGE(0x0b00, 0x0b03) AM_DEVREADWRITE("pia_ic4", pia6821_r, pia6821_w) /* PIA6821 IC4 */ + AM_RANGE(0x0c00, 0x0c03) AM_DEVREADWRITE("pia_ic5", pia6821_r, pia6821_w) /* PIA6821 IC5 */ AM_RANGE(0x0d00, 0x0d03) AM_DEVREADWRITE("pia_ic6", pia6821_r, pia6821_w) /* PIA6821 IC6 */ AM_RANGE(0x0e00, 0x0e03) AM_DEVREADWRITE("pia_ic7", pia6821_r, pia6821_w) /* PIA6821 IC7 */ AM_RANGE(0x0f00, 0x0f03) AM_DEVREADWRITE("pia_ic8", pia6821_r, pia6821_w) /* PIA6821 IC8 */ @@ -1790,7 +1790,7 @@ static DRIVER_INIT (crmaze) { int x; static const UINT8 chr_table[72]={0x00,0x84,0x94,0x3C,0xEC,0x5C,0xEC,0x50, - 0x2C,0x68,0x60,0xAC,0x74,0x00,0xAC,0x58, + 0x2C,0x68,0x60,0xAC,0x74,0x00,0xAC,0x58, 0xEC,0x7C,0xEC,0x58,0xE0,0x90,0x18,0xEC, 0x54,0x28,0x68,0x44,0x84,0xB4,0x10,0x20, 0x84,0xBC,0xE8,0x70,0x24,0x84,0xB8,0xE0, @@ -2065,21 +2065,21 @@ and reel assembly with this kit and a supplied monitor. The real Deal 'Em ran on Summit Coin hardware, and was made by someone else. A further different release was made in 2000, running on the Barcrest MPU4 Video, rather than this one. */ -GAME( 1987, dealem, 0, dealem, dealem, 0, ROT0, "Zenitone", "Deal 'Em (MPU4 Conversion Kit, v7.0)", GAME_IMPERFECT_GRAPHICS ) +GAME( 1987, dealem, 0, dealem, dealem, 0, ROT0, "Zenitone", "Deal 'Em (MPU4 Conversion Kit, v7.0)", GAME_IMPERFECT_GRAPHICS ) -GAME( 199?, bctvidbs,0, mpu4mod2, mpu4, 0, ROT0, "Barcrest", "MPU4 Video Firmware", GAME_IS_BIOS_ROOT ) +GAME( 199?, bctvidbs,0, mpu4mod2, mpu4, 0, ROT0, "Barcrest", "MPU4 Video Firmware", GAME_IS_BIOS_ROOT ) -GAME( 1994?,crmaze, bctvidbs,mpu4_vid, crmaze, crmaze,ROT0, "Barcrest", "The Crystal Maze Team Challenge (SWP)", GAME_NOT_WORKING|GAME_NO_SOUND ) -GAME( 1992?,crmazea, crmaze, mpu4_vid, crmaze, crmaze,ROT0, "Barcrest", "The Crystal Maze (AMLD Version)", GAME_NOT_WORKING|GAME_NO_SOUND ) -GAME( 1993?,crmazeb, crmaze, mpu4_vid, crmaze, 0, ROT0, "Barcrest", "The New Crystal Maze Featuring Ocean Zone (AMLD Version)", GAME_NOT_WORKING|GAME_NO_SOUND ) /* unprotected? */ -GAME( 1990, turnover,bctvidbs,mpu4_vid, mpu4, 0, ROT0, "Barcrest", "Turnover", GAME_NOT_WORKING|GAME_NO_SOUND ) /* unprotected? */ -GAME( 1992, skiltrek,bctvidbs,mpu4_vid, mpu4, 0, ROT0, "Barcrest", "Skill Trek", GAME_NOT_WORKING|GAME_NO_SOUND ) /* unprotected? */ -GAME( 1990, timemchn,bctvidbs,mpu4_vid, mpu4, 0, ROT0, "Barcrest", "Time Machine (v2.0)", GAME_NOT_WORKING|GAME_NO_SOUND ) /* unprotected? */ -GAME( 199?, mating, bctvidbs,mpu4_vid, mpu4, mating,ROT0, "Barcrest", "The Mating Game (Datapak)", GAME_NOT_WORKING|GAME_NO_SOUND ) -GAME( 199?, matinga, mating, mpu4_vid, mpu4, mating,ROT0, "Barcrest", "The Mating Game (Standard)", GAME_NOT_WORKING|GAME_NO_SOUND ) +GAME( 1994?,crmaze, bctvidbs,mpu4_vid, crmaze, crmaze,ROT0, "Barcrest", "The Crystal Maze Team Challenge (SWP)", GAME_NOT_WORKING|GAME_NO_SOUND ) +GAME( 1992?,crmazea, crmaze, mpu4_vid, crmaze, crmaze,ROT0, "Barcrest", "The Crystal Maze (AMLD Version)", GAME_NOT_WORKING|GAME_NO_SOUND ) +GAME( 1993?,crmazeb, crmaze, mpu4_vid, crmaze, 0, ROT0, "Barcrest", "The New Crystal Maze Featuring Ocean Zone (AMLD Version)", GAME_NOT_WORKING|GAME_NO_SOUND ) /* unprotected? */ +GAME( 1990, turnover,bctvidbs,mpu4_vid, mpu4, 0, ROT0, "Barcrest", "Turnover", GAME_NOT_WORKING|GAME_NO_SOUND ) /* unprotected? */ +GAME( 1992, skiltrek,bctvidbs,mpu4_vid, mpu4, 0, ROT0, "Barcrest", "Skill Trek", GAME_NOT_WORKING|GAME_NO_SOUND ) /* unprotected? */ +GAME( 1990, timemchn,bctvidbs,mpu4_vid, mpu4, 0, ROT0, "Barcrest", "Time Machine (v2.0)", GAME_NOT_WORKING|GAME_NO_SOUND ) /* unprotected? */ +GAME( 199?, mating, bctvidbs,mpu4_vid, mpu4, mating,ROT0, "Barcrest", "The Mating Game (Datapak)", GAME_NOT_WORKING|GAME_NO_SOUND ) +GAME( 199?, matinga, mating, mpu4_vid, mpu4, mating,ROT0, "Barcrest", "The Mating Game (Standard)", GAME_NOT_WORKING|GAME_NO_SOUND ) GAME( 199?, vgpoker, 0, vgpoker, mpu4, 0, ROT0, "BwB", "Vegas Poker (Prototype)", GAME_NOT_WORKING|GAME_NO_SOUND ) GAMEL(1989?,connect4,0, mpu4mod2, connect4, connect4, ROT0,"Dolbeck Systems", "Connect 4", GAME_IMPERFECT_GRAPHICS|GAME_REQUIRES_ARTWORK,layout_connect4 ) -GAME( 198?, mpu4utst,0, mpu4mod2, mpu4, 0, ROT0,"Barcrest", "MPU4 Unit Test (Program 4)", 0 ) -GAME( 198?, mpu4tst2,0, mpu4mod2, mpu4, 0, ROT0,"Barcrest", "MPU4 Unit Test (Program 2)", 0 ) -GAME( 198?, mpu4met0,0, mpu4mod2, mpu4, 0, ROT0,"Barcrest", "MPU4 Meter Clear ROM", 0 ) +GAME( 198?, mpu4utst,0, mpu4mod2, mpu4, 0, ROT0,"Barcrest", "MPU4 Unit Test (Program 4)", 0 ) +GAME( 198?, mpu4tst2,0, mpu4mod2, mpu4, 0, ROT0,"Barcrest", "MPU4 Unit Test (Program 2)", 0 ) +GAME( 198?, mpu4met0,0, mpu4mod2, mpu4, 0, ROT0,"Barcrest", "MPU4 Meter Clear ROM", 0 ) diff --git a/src/mame/drivers/ms32.c b/src/mame/drivers/ms32.c index 25a56a79d62..b2e5c0cc2f8 100644 --- a/src/mame/drivers/ms32.c +++ b/src/mame/drivers/ms32.c @@ -342,12 +342,12 @@ static ADDRESS_MAP_START( f1superb_map, ADDRESS_SPACE_PROGRAM, 32 ) AM_RANGE(0xfd0f0000, 0xfd0f0003) AM_WRITE(ms32_irq2_guess_w) AM_RANGE(0xfd100000, 0xfd103fff) AM_RAM // used when you start enabling fpu ints - AM_RANGE(0xfd104000, 0xfd105fff) AM_RAM // uploads data here + AM_RANGE(0xfd104000, 0xfd105fff) AM_RAM // uploads data here AM_RANGE(0xfd140000, 0xfd143fff) AM_RAM // used when you start enabling fpu ints AM_RANGE(0xfd144000, 0xfd145fff) AM_RAM // same data here - AM_RANGE(0xfdc00000, 0xfdc007ff) AM_READWRITE16(ms32_extra_r16, ms32_extra_w16, 0x0000ffff) // definitely line ram + AM_RANGE(0xfdc00000, 0xfdc007ff) AM_READWRITE16(ms32_extra_r16, ms32_extra_w16, 0x0000ffff) // definitely line ram AM_RANGE(0xfde00000, 0xfde01fff) AM_RAM // scroll info for lineram? AM_IMPORT_FROM(ms32_map) @@ -1365,7 +1365,7 @@ MACHINE_DRIVER_END ROM_START( bbbxing ) ROM_REGION( 0x200000, "maincpu", 0 ) /* V70 code */ - ROM_LOAD32_BYTE( "bbbx25.bin", 0x000003, 0x80000, CRC(b526b41e) SHA1(44945931b159646468a954d5acdd2c6c61daf098) ) + ROM_LOAD32_BYTE( "bbbx25.bin", 0x000003, 0x80000, CRC(b526b41e) SHA1(44945931b159646468a954d5acdd2c6c61daf098) ) ROM_LOAD32_BYTE( "bbbx27.bin", 0x000002, 0x80000, CRC(45b27ad8) SHA1(0af415b17400aabecdcb6d1d069f28b64780017f) ) ROM_LOAD32_BYTE( "bbbx29.bin", 0x000001, 0x80000, CRC(85bbbe79) SHA1(bc5ebb96491762e6a0d202ddf7faeb57c66211b4) ) ROM_LOAD32_BYTE( "bbbx31.bin", 0x000000, 0x80000, CRC(e0c865ed) SHA1(f21e8dc174c50d7afdd3f82c1c66dfcc002bdd07) ) @@ -1481,7 +1481,7 @@ ROM_END ROM_START( desertwr ) ROM_REGION( 0x200000, "maincpu", 0 ) /* V70 code */ - ROM_LOAD32_BYTE( "93166-26.37", 0x000003, 0x80000, CRC(582b9584) SHA1(027a987cde7e9e1b24aef6a3086eba61679ad0b6) ) + ROM_LOAD32_BYTE( "93166-26.37", 0x000003, 0x80000, CRC(582b9584) SHA1(027a987cde7e9e1b24aef6a3086eba61679ad0b6) ) ROM_LOAD32_BYTE( "93166-27.38", 0x000002, 0x80000, CRC(cb60dda3) SHA1(0499b8ab19abdf8db8c18d778b3f9f6e0d277ff0) ) ROM_LOAD32_BYTE( "93166-28.39", 0x000001, 0x80000, CRC(0de40efb) SHA1(c49c3b27939e428dec1f642b7fdb9a1ff760289a) ) ROM_LOAD32_BYTE( "93166-29.40", 0x000000, 0x80000, CRC(fc25eae2) SHA1(a4d47fcb4d4c3285cf67d77d8a21478f344b98ca) ) @@ -1521,7 +1521,7 @@ ROM_END ROM_START( f1superb ) ROM_REGION( 0x200000, "maincpu", 0 ) /* V70 code */ - ROM_LOAD32_BYTE( "f1sb26.bin", 0x000003, 0x80000, CRC(042fccd5) SHA1(4a69de3aef51adad502d54987468170b9e7bb8ac) ) + ROM_LOAD32_BYTE( "f1sb26.bin", 0x000003, 0x80000, CRC(042fccd5) SHA1(4a69de3aef51adad502d54987468170b9e7bb8ac) ) ROM_LOAD32_BYTE( "f1sb27.bin", 0x000002, 0x80000, CRC(5f96cf32) SHA1(c9c64576a8bb81a8e8bbe30b054ed33afd760b93) ) ROM_LOAD32_BYTE( "f1sb28.bin", 0x000001, 0x80000, CRC(cfda8003) SHA1(460146556f606bf213d7e2ab29d2eb8827131bd0) ) ROM_LOAD32_BYTE( "f1sb29.bin", 0x000000, 0x80000, CRC(f21f1481) SHA1(97a97ff3b9a71b1a024d8f2cfe57a1d02cec5ea4) ) @@ -1576,7 +1576,7 @@ ROM_END ROM_START( gratia ) ROM_REGION( 0x200000, "maincpu", 0 ) /* V70 code */ - ROM_LOAD32_BYTE( "94019.026", 0x000003, 0x80000, CRC(f398cba5) SHA1(11e06abebfdfc8a99b5c56e9f6ed389f645b6c72) ) + ROM_LOAD32_BYTE( "94019.026", 0x000003, 0x80000, CRC(f398cba5) SHA1(11e06abebfdfc8a99b5c56e9f6ed389f645b6c72) ) ROM_LOAD32_BYTE( "94019.027", 0x000002, 0x80000, CRC(ba3318c5) SHA1(9b100988b998c39b586b51fe9fee874dbf711610) ) ROM_LOAD32_BYTE( "94019.028", 0x000001, 0x80000, CRC(e0762e89) SHA1(a567c347e7f73f1ef1c753d14ac4f58311380fac) ) ROM_LOAD32_BYTE( "94019.029", 0x000000, 0x80000, CRC(8059800b) SHA1(7548d01b6ea15e962353b3585db6515e5819e5ce) ) @@ -1613,7 +1613,7 @@ ROM_END ROM_START( gratiaa ) ROM_REGION( 0x200000, "maincpu", 0 ) /* V70 code */ - ROM_LOAD32_BYTE( "94019.026", 0x000003, 0x80000, CRC(f398cba5) SHA1(11e06abebfdfc8a99b5c56e9f6ed389f645b6c72) ) + ROM_LOAD32_BYTE( "94019.026", 0x000003, 0x80000, CRC(f398cba5) SHA1(11e06abebfdfc8a99b5c56e9f6ed389f645b6c72) ) ROM_LOAD32_BYTE( "94019.027", 0x000002, 0x80000, CRC(ba3318c5) SHA1(9b100988b998c39b586b51fe9fee874dbf711610) ) ROM_LOAD32_BYTE( "94019.028", 0x000001, 0x80000, CRC(e0762e89) SHA1(a567c347e7f73f1ef1c753d14ac4f58311380fac) ) ROM_LOAD32_BYTE( "94019.029", 0x000000, 0x80000, CRC(8059800b) SHA1(7548d01b6ea15e962353b3585db6515e5819e5ce) ) @@ -1650,7 +1650,7 @@ ROM_END ROM_START( gametngk ) ROM_REGION( 0x200000, "maincpu", 0 ) /* V70 code */ - ROM_LOAD32_BYTE( "mr94041.26", 0x000003, 0x80000, CRC(e622e774) SHA1(203c2a3563a337af4cec92a66e0fa410d901b01f) ) + ROM_LOAD32_BYTE( "mr94041.26", 0x000003, 0x80000, CRC(e622e774) SHA1(203c2a3563a337af4cec92a66e0fa410d901b01f) ) ROM_LOAD32_BYTE( "mr94041.27", 0x000002, 0x80000, CRC(da862b9c) SHA1(17dc6da08d7f5551c8f4bc4d9c416dbfc82d8397) ) ROM_LOAD32_BYTE( "mr94041.28", 0x000001, 0x80000, CRC(b3738934) SHA1(cd07572e55e83807e76179cfc6b97e0410067911) ) ROM_LOAD32_BYTE( "mr94041.29", 0x000000, 0x80000, CRC(45154a45) SHA1(4c7c2c6738fdfe54ebe41a0ac6222cbfce5d7757) ) @@ -1690,7 +1690,7 @@ ROM_END ROM_START( hayaosi2 ) ROM_REGION( 0x200000, "maincpu", 0 ) /* V70 code */ - ROM_LOAD32_BYTE( "mb93138a.25", 0x000003, 0x80000, CRC(563c6f2f) SHA1(bc2a61fd2e0adf58256feeef8491b67af6d6eacf) ) + ROM_LOAD32_BYTE( "mb93138a.25", 0x000003, 0x80000, CRC(563c6f2f) SHA1(bc2a61fd2e0adf58256feeef8491b67af6d6eacf) ) ROM_LOAD32_BYTE( "mb93138a.27", 0x000002, 0x80000, CRC(fe8e283a) SHA1(fc6c06ae296110b1f5794187d5208b17541614cb) ) ROM_LOAD32_BYTE( "mb93138a.29", 0x000001, 0x80000, CRC(e6fe3d0d) SHA1(9a0caab82b160991b4f2ac993e7e4b4c5d3bb15e) ) ROM_LOAD32_BYTE( "mb93138a.31", 0x000000, 0x80000, CRC(d944bf8c) SHA1(ce93b5d2ebe886b38dc42b1e554b17dc951a51b4) ) @@ -1793,7 +1793,7 @@ Lithium battery + LH5168D-10L(SRAM) ROM_START( hayaosi3 ) ROM_REGION( 0x200000, "maincpu", 0 ) /* V70 code */ - ROM_LOAD32_BYTE( "mb93138.25", 0x000003, 0x80000, CRC(ba8cec03) SHA1(edaa52e0b07307bb21168205ee0d5d6ff8168de9) ) + ROM_LOAD32_BYTE( "mb93138.25", 0x000003, 0x80000, CRC(ba8cec03) SHA1(edaa52e0b07307bb21168205ee0d5d6ff8168de9) ) ROM_LOAD32_BYTE( "mb93138.27", 0x000002, 0x80000, CRC(571725df) SHA1(66575ec1a29d6fc1b50ae5a5ce8025bb1043deaf)) ROM_LOAD32_BYTE( "mb93138.29", 0x000001, 0x80000, CRC(da891976) SHA1(27e8c395e92ca01b47bffdf766bc95a6c2150815) ) ROM_LOAD32_BYTE( "mb93138.31", 0x000000, 0x80000, CRC(2d17bb06) SHA1(623b603c4002734427c882424a1e0dc889cf7e02) ) @@ -1831,7 +1831,7 @@ ROM_END ROM_START( kirarast ) ROM_REGION( 0x200000, "maincpu", 0 ) /* V70 code */ - ROM_LOAD32_BYTE( "mr95025.26", 0x000003, 0x80000, CRC(eb7faf5f) SHA1(5b79ff3043db5ef2622ae1665145462d949c9bb8) ) + ROM_LOAD32_BYTE( "mr95025.26", 0x000003, 0x80000, CRC(eb7faf5f) SHA1(5b79ff3043db5ef2622ae1665145462d949c9bb8) ) ROM_LOAD32_BYTE( "mr95025.27", 0x000002, 0x80000, CRC(80644d05) SHA1(6da8bf8aeb1477112f9022c0c5f472cbcd27df8e) ) ROM_LOAD32_BYTE( "mr95025.28", 0x000001, 0x80000, CRC(6df8c384) SHA1(3ad01d3d51cfc1f48029c16ee1cc74fc59d7603c) ) ROM_LOAD32_BYTE( "mr95025.29", 0x000000, 0x80000, CRC(3b6e681b) SHA1(148fa10631db53a4ad1dcdfb60b4f0654e077396) ) @@ -1870,7 +1870,7 @@ ROM_END ROM_START( akiss ) ROM_REGION( 0x200000, "maincpu", 0 ) /* V70 code */ - ROM_LOAD32_BYTE( "93166.26", 0x000003, 0x80000, CRC(5bdd01ee) SHA1(21b8e07bb7ef6b437a43719b02deeba970330900) ) + ROM_LOAD32_BYTE( "93166.26", 0x000003, 0x80000, CRC(5bdd01ee) SHA1(21b8e07bb7ef6b437a43719b02deeba970330900) ) ROM_LOAD32_BYTE( "93166.27", 0x000002, 0x80000, CRC(bb11b2c9) SHA1(86ba06d28bc8f560ac3d05515d061e05c90d1628) ) ROM_LOAD32_BYTE( "93166.28", 0x000001, 0x80000, CRC(20565478) SHA1(d532ab55be287f45d8d81317bb844c675eb1292c) ) ROM_LOAD32_BYTE( "93166.29", 0x000000, 0x80000, CRC(ff454f0d) SHA1(db81aaaf4160eb62badbe08fc01543463470ac97) ) @@ -1908,9 +1908,9 @@ ROM_END ROM_START( p47aces ) ROM_REGION( 0x200000, "maincpu", 0 ) /* V70 code */ - ROM_LOAD32_BYTE( "p47-26.bin", 0x000003, 0x80000, CRC(e017b819) SHA1(942fb48e8bb3a263534a0351a1a9979d786bc475) ) + ROM_LOAD32_BYTE( "p47-26.bin", 0x000003, 0x80000, CRC(e017b819) SHA1(942fb48e8bb3a263534a0351a1a9979d786bc475) ) ROM_LOAD32_BYTE( "p47-27.bin", 0x000002, 0x80000, CRC(bd1b81e0) SHA1(b15f157fe3a30295f999a4c285da2d6f22d7fba6) ) - ROM_LOAD32_BYTE( "p47-28.bin", 0x000001, 0x80000, CRC(4742a5f7) SHA1(cd297aa150082c545647c9a755cf2cdbdc98c988) ) + ROM_LOAD32_BYTE( "p47-28.bin", 0x000001, 0x80000, CRC(4742a5f7) SHA1(cd297aa150082c545647c9a755cf2cdbdc98c988) ) ROM_LOAD32_BYTE( "p47-29.bin", 0x000000, 0x80000, CRC(86e17d8b) SHA1(73004f243c6dfb86ce4cc61475dc7caaf452750e) ) ROM_REGION( 0xe00000, "gfx1", 0 ) /* sprites, don't dispose since we use GFX_RAW */ @@ -1948,7 +1948,7 @@ ROM_END ROM_START( tetrisp ) ROM_REGION( 0x200000, "maincpu", 0 ) /* V70 code */ - ROM_LOAD32_BYTE( "mr95024.26", 0x000003, 0x80000, CRC(d318a9ba) SHA1(cae86d86518fdfeb736e7b2040277c76cc3b4017) ) + ROM_LOAD32_BYTE( "mr95024.26", 0x000003, 0x80000, CRC(d318a9ba) SHA1(cae86d86518fdfeb736e7b2040277c76cc3b4017) ) ROM_LOAD32_BYTE( "mr95024.27", 0x000002, 0x80000, CRC(2d69b6d3) SHA1(f0a513f449aa25808672fb27e3691ccabfba48a1) ) ROM_LOAD32_BYTE( "mr95024.28", 0x000001, 0x80000, CRC(87522e16) SHA1(4f0d8abec046884d89c559e3a4a5ac9e0e47a0dc) ) ROM_LOAD32_BYTE( "mr95024.29", 0x000000, 0x80000, CRC(43a61941) SHA1(a097c88c45d8486eb6ffdd13904b6eb2a3fa45b9) ) @@ -2013,7 +2013,7 @@ ROM_END ROM_START( bnstars ) /* ver 1.1 */ ROM_REGION( 0x200000, "maincpu", 0 ) /* V70 code */ - ROM_LOAD32_BYTE( "vsjanshi26.37", 0x000003, 0x80000, CRC(75eeec8f) SHA1(26315381baa0abb470203dc565ad98c52fe17b20) ) + ROM_LOAD32_BYTE( "vsjanshi26.37", 0x000003, 0x80000, CRC(75eeec8f) SHA1(26315381baa0abb470203dc565ad98c52fe17b20) ) ROM_LOAD32_BYTE( "vsjanshi27.38", 0x000002, 0x80000, CRC(69f24ab9) SHA1(e019a444111e4ed7f9a378d6e2d13ddb9324bc49) ) ROM_LOAD32_BYTE( "vsjanshi28.39", 0x000001, 0x80000, CRC(d075cfb6) SHA1(f70741e9f536d5c7604126d36c7aa8ed8f25c329) ) ROM_LOAD32_BYTE( "vsjanshi29.40", 0x000000, 0x80000, CRC(bc395b50) SHA1(84d7cc492a11a5a9402e929f0bd138ad63e3d079) ) diff --git a/src/mame/drivers/msisaac.c b/src/mame/drivers/msisaac.c index 32dc2756f41..c01f5fb6458 100644 --- a/src/mame/drivers/msisaac.c +++ b/src/mame/drivers/msisaac.c @@ -104,53 +104,53 @@ MCU simulation TODO: * incremented properly).*/ case 0x40: case 0x41: - case 0x42: - return 0; - - /*With this command the MCU controls body direction */ - case 0x02: - { - //direction: - //0-left - //1-leftup - //2-up - //3-rigtup - //4-right - //5-rightdwn - //6-down - //7-leftdwn - - UINT8 val= (input_port_read(space->machine, "IN1") >> 2) & 0x0f; - /* bit0 = left + case 0x42: + return 0; + + /*With this command the MCU controls body direction */ + case 0x02: + { + //direction: + //0-left + //1-leftup + //2-up + //3-rigtup + //4-right + //5-rightdwn + //6-down + //7-leftdwn + + UINT8 val= (input_port_read(space->machine, "IN1") >> 2) & 0x0f; + /* bit0 = left bit1 = right bit2 = down bit3 = up */ - /* direction is encoded as: + /* direction is encoded as: 4 3 5 2 6 1 7 0 */ - /* 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 */ - /* nochange left right nochange down downlft dwnrght down up upleft uprgt up nochnge left right nochange */ + /* 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 */ + /* nochange left right nochange down downlft dwnrght down up upleft uprgt up nochnge left right nochange */ - static const INT8 table[16] = { -1, 2, 6, -1, 0, 1, 7, 0, 4, 3, 5, 4, -1, 2, 6, -1 }; + static const INT8 table[16] = { -1, 2, 6, -1, 0, 1, 7, 0, 4, 3, 5, 4, -1, 2, 6, -1 }; - if (table[val] >= 0) - state->direction = table[val]; + if (table[val] >= 0) + state->direction = table[val]; - return state->direction; - } + return state->direction; + } /*This controls the arms when they return to the player. */ - case 0x07: - return 0x45; + case 0x07: + return 0x45; - default: - logerror("CPU#0 read from MCU pc=%4x, mcu_val=%2x\n", cpu_get_pc(space->cpu), state->mcu_val); - return state->mcu_val; + default: + logerror("CPU#0 read from MCU pc=%4x, mcu_val=%2x\n", cpu_get_pc(space->cpu), state->mcu_val); + return state->mcu_val; } #endif } @@ -181,8 +181,8 @@ static ADDRESS_MAP_START( msisaac_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(paletteram_xxxxRRRRGGGGBBBB_le_w) AM_BASE_GENERIC(paletteram) AM_RANGE(0xf000, 0xf000) AM_WRITE(msisaac_bg2_textbank_w) - AM_RANGE(0xf001, 0xf001) AM_WRITENOP //??? - AM_RANGE(0xf002, 0xf002) AM_WRITENOP //??? + AM_RANGE(0xf001, 0xf001) AM_WRITENOP //??? + AM_RANGE(0xf002, 0xf002) AM_WRITENOP //??? AM_RANGE(0xf060, 0xf060) AM_WRITE(sound_command_w) //sound command AM_RANGE(0xf061, 0xf061) AM_WRITENOP /*sound_reset*/ //???? diff --git a/src/mame/drivers/mugsmash.c b/src/mame/drivers/mugsmash.c index 8ee080819d8..3926c913ac7 100644 --- a/src/mame/drivers/mugsmash.c +++ b/src/mame/drivers/mugsmash.c @@ -183,7 +183,7 @@ static ADDRESS_MAP_START( mugsmash_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x000000, 0x07ffff) AM_ROM AM_RANGE(0x080000, 0x080fff) AM_RAM_WRITE(mugsmash_videoram1_w) AM_BASE(&mugsmash_videoram1) AM_RANGE(0x082000, 0x082fff) AM_RAM_WRITE(mugsmash_videoram2_w) AM_BASE(&mugsmash_videoram2) - AM_RANGE(0x0c0000, 0x0c0007) AM_WRITE(mugsmash_reg_w) AM_BASE(&mugsmash_regs1) /* video registers*/ + AM_RANGE(0x0c0000, 0x0c0007) AM_WRITE(mugsmash_reg_w) AM_BASE(&mugsmash_regs1) /* video registers*/ AM_RANGE(0x100000, 0x1005ff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE_GENERIC(paletteram) AM_RANGE(0x140000, 0x140007) AM_WRITE(mugsmash_reg2_w) AM_BASE(&mugsmash_regs2) /* sound + ? */ AM_RANGE(0x1c0000, 0x1c3fff) AM_RAM /* main ram? */ @@ -385,7 +385,7 @@ static const gfx_layout mugsmash2_layout = 16,16, RGN_FRAC(1,4), 4, - { 0x080000*3*8, 0x080000*2*8, 0x080000*1*8, 0x080000*0*8 }, + { 0x080000*3*8, 0x080000*2*8, 0x080000*1*8, 0x080000*0*8 }, { 0, 1, 2, 3, 4, 5, 6, 7, 16*8+0,16*8+1,16*8+2,16*8+3,16*8+4,16*8+5,16*8+6,16*8+7 }, { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8, 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 }, 32*8 diff --git a/src/mame/drivers/munchmo.c b/src/mame/drivers/munchmo.c index 6cfaaa2bd26..c0006bc46d9 100644 --- a/src/mame/drivers/munchmo.c +++ b/src/mame/drivers/munchmo.c @@ -72,7 +72,7 @@ static WRITE8_HANDLER( sound_nmi_ack_w ) static ADDRESS_MAP_START( mnchmobl_map, ADDRESS_SPACE_PROGRAM, 8 ) - AM_RANGE(0x0000, 0x3fff) AM_ROM + AM_RANGE(0x0000, 0x3fff) AM_ROM AM_RANGE(0x8000, 0x83ff) AM_RAM AM_RANGE(0xa000, 0xa3ff) AM_MIRROR(0x0400) AM_RAM AM_BASE(&mnchmobl_sprite_xpos) AM_RANGE(0xa800, 0xabff) AM_MIRROR(0x0400) AM_RAM AM_BASE(&mnchmobl_sprite_tile) diff --git a/src/mame/drivers/murogmbl.c b/src/mame/drivers/murogmbl.c index b4fe04a9ce7..ebf3586bb22 100644 --- a/src/mame/drivers/murogmbl.c +++ b/src/mame/drivers/murogmbl.c @@ -151,15 +151,15 @@ INPUT_PORTS_END static const gfx_layout layout8x8x2 = { - 8,8, - RGN_FRAC(1,2), - 2, - { + 8,8, + RGN_FRAC(1,2), + 2, + { RGN_FRAC(0,2),RGN_FRAC(1,2) - }, - { STEP8(0,1) }, - { STEP8(0,8) }, - 8*8 + }, + { STEP8(0,1) }, + { STEP8(0,8) }, + 8*8 }; static GFXDECODE_START( murogmbl ) @@ -175,7 +175,7 @@ static MACHINE_DRIVER_START( murogmbl ) MDRV_PALETTE_INIT(murogmbl) - /* video hardware */ + /* video hardware */ MDRV_SCREEN_ADD("screen", RASTER) MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16) MDRV_SCREEN_REFRESH_RATE(60) diff --git a/src/mame/drivers/mw8080bw.c b/src/mame/drivers/mw8080bw.c index 849caf94c2a..4930844c19f 100644 --- a/src/mame/drivers/mw8080bw.c +++ b/src/mame/drivers/mw8080bw.c @@ -2151,7 +2151,7 @@ MACHINE_DRIVER_END *************************************/ #define SPCENCTR_STROBE_FREQ (9.00) /* Hz - calculated from the 555 timer */ -#define SPCENCTR_STROBE_DUTY_CYCLE (95) /* % */ +#define SPCENCTR_STROBE_DUTY_CYCLE (95) /* % */ static TIMER_DEVICE_CALLBACK( spcenctr_strobe_timer_callback ) diff --git a/src/mame/drivers/mystwarr.c b/src/mame/drivers/mystwarr.c index 0b23ef4a055..162677a0b95 100644 --- a/src/mame/drivers/mystwarr.c +++ b/src/mame/drivers/mystwarr.c @@ -320,7 +320,7 @@ static ADDRESS_MAP_START( metamrph_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x240000, 0x240007) AM_WRITE(K053246_word_w) AM_RANGE(0x244000, 0x24400f) AM_READ(K055673_rom_word_r) AM_RANGE(0x244010, 0x24401f) AM_WRITE(K053247_reg_word_w) - AM_RANGE(0x24c000, 0x24ffff) AM_READWRITE(K053250_0_ram_r,K053250_0_ram_w) // "LVC RAM" (53250_ram) + AM_RANGE(0x24c000, 0x24ffff) AM_READWRITE(K053250_0_ram_r,K053250_0_ram_w) // "LVC RAM" (53250_ram) AM_RANGE(0x250000, 0x25000f) AM_READWRITE(K053250_0_r,K053250_0_w) AM_RANGE(0x254000, 0x25401f) AM_WRITE(K054338_word_w) AM_RANGE(0x258000, 0x2580ff) AM_WRITE(K055555_word_w) @@ -363,7 +363,7 @@ static ADDRESS_MAP_START( viostorm_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x240000, 0x240007) AM_WRITE(K053246_word_w) AM_RANGE(0x244000, 0x24400f) AM_READ(K055673_rom_word_r) AM_RANGE(0x244010, 0x24401f) AM_WRITE(K053247_reg_word_w) - AM_RANGE(0x24c000, 0x24ffff) AM_RAM // K053250_0_ram_r / K053250_0_ram_w + AM_RANGE(0x24c000, 0x24ffff) AM_RAM // K053250_0_ram_r / K053250_0_ram_w AM_RANGE(0x250000, 0x25000f) AM_RAM // K053250_0_r / K053250_0_w AM_RANGE(0x254000, 0x25401f) AM_WRITE(K054338_word_w) AM_RANGE(0x258000, 0x2580ff) AM_WRITE(K055555_word_w) @@ -459,7 +459,7 @@ static ADDRESS_MAP_START( martchmp_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x404000, 0x404007) AM_WRITE(K053246_word_w) // OBJSET1 AM_RANGE(0x40a000, 0x40a01f) AM_WRITE(K054338_word_w) // CLTC AM_RANGE(0x40c000, 0x40c03f) AM_WRITE(K056832_word_w) // VACSET - AM_RANGE(0x40e000, 0x40e03f) AM_WRITE(K053990_martchmp_word_w) // protection + AM_RANGE(0x40e000, 0x40e03f) AM_WRITE(K053990_martchmp_word_w) // protection AM_RANGE(0x410000, 0x410001) AM_WRITE(mweeprom_w) AM_RANGE(0x412000, 0x412001) AM_READWRITE(mccontrol_r,mccontrol_w) AM_RANGE(0x414000, 0x414001) AM_READ_PORT("P1_P2") @@ -494,7 +494,7 @@ static ADDRESS_MAP_START( dadandrn_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x000000, 0x1fffff) AM_ROM // main program and data ROM AM_RANGE(0x400000, 0x40ffff) AM_READWRITE(K053247_scattered_word_r,K053247_scattered_word_w) AM_BASE_GENERIC(spriteram) AM_RANGE(0x410000, 0x411fff) AM_READWRITE(K056832_ram_word_r,K056832_ram_word_w) // tilemap RAM - AM_RANGE(0x412000, 0x413fff) AM_READWRITE(K056832_ram_word_r,K056832_ram_word_w) // tilemap RAM mirror read/write (essential) + AM_RANGE(0x412000, 0x413fff) AM_READWRITE(K056832_ram_word_r,K056832_ram_word_w) // tilemap RAM mirror read/write (essential) AM_RANGE(0x420000, 0x421fff) AM_RAM_WRITE(paletteram16_xrgb_word_be_w) AM_BASE_GENERIC(paletteram) AM_RANGE(0x430000, 0x430007) AM_WRITE(K053246_word_w) AM_RANGE(0x440000, 0x443fff) AM_READ(K056832_mw_rom_word_r) @@ -542,7 +542,7 @@ static ADDRESS_MAP_START( gaiapols_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x000000, 0x2fffff) AM_ROM // main program AM_RANGE(0x400000, 0x40ffff) AM_READWRITE(K053247_scattered_word_r,K053247_scattered_word_w) AM_BASE_GENERIC(spriteram) AM_RANGE(0x410000, 0x411fff) AM_READWRITE(K056832_ram_word_r,K056832_ram_word_w) // tilemap RAM - AM_RANGE(0x412000, 0x413fff) AM_READWRITE(K056832_ram_word_r,K056832_ram_word_w) // tilemap RAM mirror read / write (essential) + AM_RANGE(0x412000, 0x413fff) AM_READWRITE(K056832_ram_word_r,K056832_ram_word_w) // tilemap RAM mirror read / write (essential) AM_RANGE(0x420000, 0x421fff) AM_RAM_WRITE(paletteram16_xrgb_word_be_w) AM_BASE_GENERIC(paletteram) AM_RANGE(0x430000, 0x430007) AM_WRITE(K053246_word_w) AM_RANGE(0x440000, 0x441fff) AM_READ(K056832_mw_rom_word_r) @@ -568,9 +568,9 @@ static ADDRESS_MAP_START( gaiapols_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x6c0000, 0x6c0001) AM_WRITE(ddd_053936_enable_w) AM_RANGE(0x6e0000, 0x6e0001) AM_WRITE(sound_irq_w) AM_RANGE(0x800000, 0x87ffff) AM_READ(gai_053936_tilerom_0_r) // 256k tilemap readback - AM_RANGE(0xa00000, 0xa7ffff) AM_READ(ddd_053936_tilerom_1_r) // 128k tilemap readback + AM_RANGE(0xa00000, 0xa7ffff) AM_READ(ddd_053936_tilerom_1_r) // 128k tilemap readback AM_RANGE(0xc00000, 0xdfffff) AM_READ(gai_053936_tilerom_2_r) // tile character readback - AM_RANGE(0xe00000, 0xe00001) AM_WRITENOP // watchdog + AM_RANGE(0xe00000, 0xe00001) AM_WRITENOP // watchdog #if MW_DEBUG AM_RANGE(0x430000, 0x430007) AM_READ(K053246_reg_word_r) AM_RANGE(0x450010, 0x45001f) AM_READ(K053247_reg_word_r) diff --git a/src/mame/drivers/namcona1.c b/src/mame/drivers/namcona1.c index 6b2358206f6..bdd6f072dad 100644 --- a/src/mame/drivers/namcona1.c +++ b/src/mame/drivers/namcona1.c @@ -177,7 +177,7 @@ static const UINT8 ExvaniaDefaultNvMem[] = * the game software automatically writes these values there, but then jumps * to an unmapped (bogus) address, causing MAME to crash. */ - 0x30,0x32,0x4f,0x63,0x74,0x39,0x32,0x52,0x45,0x56,0x49,0x53,0x49,0x4f,0x4e,0x35, + 0x30,0x32,0x4f,0x63,0x74,0x39,0x32,0x52,0x45,0x56,0x49,0x53,0x49,0x4f,0x4e,0x35, 0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x00,0x00,0x01, 0x00,0x01,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x02 }; /* ExvaniaDefaultNvMem */ @@ -888,7 +888,7 @@ static READ8_HANDLER( port7_r ) case 0x40: return input_port_read(space->machine, "P1"); - case 0x60: + case 0x60: return input_port_read(space->machine, "P2"); case 0x20: @@ -990,7 +990,7 @@ static INTERRUPT_GEN( mcu_interrupt ) { if (cpu_getiloops(device) == 0) { - cpu_set_input_line(device, M37710_LINE_IRQ1, HOLD_LINE); + cpu_set_input_line(device, M37710_LINE_IRQ1, HOLD_LINE); } else if (cpu_getiloops(device) == 1) { diff --git a/src/mame/drivers/namconb1.c b/src/mame/drivers/namconb1.c index 2ce1e626afe..a16b91d9210 100644 --- a/src/mame/drivers/namconb1.c +++ b/src/mame/drivers/namconb1.c @@ -364,7 +364,7 @@ static INTERRUPT_GEN( mcu_interrupt ) } else { - cpu_set_input_line(device, M37710_LINE_ADC, HOLD_LINE); + cpu_set_input_line(device, M37710_LINE_ADC, HOLD_LINE); } } diff --git a/src/mame/drivers/namcond1.c b/src/mame/drivers/namcond1.c index ec497efd3bb..905acf5377f 100644 --- a/src/mame/drivers/namcond1.c +++ b/src/mame/drivers/namcond1.c @@ -336,7 +336,7 @@ ROM_START( ncv1 ) ROM_REGION( 0x200000,"gfx1", 0 ) /* 2MB character generator */ ROM_LOAD( "nc1cg0.10c", 0x000000, 0x200000, CRC(355e7f29) SHA1(47d92c4e28c3610a620d3c9b3be558199477f6d8) ) - ROM_REGION( 0x200000,"c352", 0 ) /* 2MB sound data */ + ROM_REGION( 0x200000,"c352", 0 ) /* 2MB sound data */ ROM_LOAD( "nc1voice.7b", 0x000000, 0x200000, CRC(91c85bd6) SHA1(c2af8b1518b2b601f2b14c3f327e7e3eae9e29fc) ) ROM_END @@ -351,7 +351,7 @@ ROM_START( ncv1j ) ROM_REGION( 0x200000,"gfx1", 0 ) /* 2MB character generator */ ROM_LOAD( "nc1cg0.10c", 0x000000, 0x200000, CRC(355e7f29) SHA1(47d92c4e28c3610a620d3c9b3be558199477f6d8) ) - ROM_REGION( 0x200000,"c352", 0 ) /* 2MB sound data */ + ROM_REGION( 0x200000,"c352", 0 ) /* 2MB sound data */ ROM_LOAD( "nc1voice.7b", 0x000000, 0x200000, CRC(91c85bd6) SHA1(c2af8b1518b2b601f2b14c3f327e7e3eae9e29fc) ) ROM_END @@ -366,7 +366,7 @@ ROM_START( ncv1j2 ) ROM_REGION( 0x200000,"gfx1", 0 ) /* 2MB character generator */ ROM_LOAD( "nc1cg0.10c", 0x000000, 0x200000, CRC(355e7f29) SHA1(47d92c4e28c3610a620d3c9b3be558199477f6d8) ) - ROM_REGION( 0x200000,"c352", 0 ) /* 2MB sound data */ + ROM_REGION( 0x200000,"c352", 0 ) /* 2MB sound data */ ROM_LOAD( "nc1voice.7b", 0x000000, 0x200000, CRC(91c85bd6) SHA1(c2af8b1518b2b601f2b14c3f327e7e3eae9e29fc) ) ROM_END @@ -382,7 +382,7 @@ ROM_START( ncv2 ) ROM_LOAD( "ncs1cg0.10e", 0x000000, 0x200000, CRC(fdd24dbe) SHA1(4dceaae3d853075f58a7408be879afc91d80292e) ) ROM_LOAD( "ncs1cg1.10e", 0x200000, 0x200000, CRC(007b19de) SHA1(d3c093543511ec1dd2f8be6db45f33820123cabc) ) - ROM_REGION( 0x200000,"c352", 0 ) /* 2MB sound data */ + ROM_REGION( 0x200000,"c352", 0 ) /* 2MB sound data */ ROM_LOAD( "ncs1voic.7c", 0x000000, 0x200000, CRC(ed05fd88) SHA1(ad88632c89a9946708fc6b4c9247e1bae9b2944b) ) ROM_END @@ -398,7 +398,7 @@ ROM_START( ncv2j ) ROM_LOAD( "ncs1cg0.10e", 0x000000, 0x200000, CRC(fdd24dbe) SHA1(4dceaae3d853075f58a7408be879afc91d80292e) ) ROM_LOAD( "ncs1cg1.10e", 0x200000, 0x200000, CRC(007b19de) SHA1(d3c093543511ec1dd2f8be6db45f33820123cabc) ) - ROM_REGION( 0x200000,"c352", 0 ) /* 2MB sound data */ + ROM_REGION( 0x200000,"c352", 0 ) /* 2MB sound data */ ROM_LOAD( "ncs1voic.7c", 0x000000, 0x200000, CRC(ed05fd88) SHA1(ad88632c89a9946708fc6b4c9247e1bae9b2944b) ) ROM_END diff --git a/src/mame/drivers/namcops2.c b/src/mame/drivers/namcops2.c index 14ab86f2549..8de376bad82 100644 --- a/src/mame/drivers/namcops2.c +++ b/src/mame/drivers/namcops2.c @@ -53,7 +53,7 @@ static MACHINE_DRIVER_START( system246 ) MDRV_CPU_PROGRAM_MAP(ps2_map) MDRV_CPU_CONFIG(config) - /* video hardware */ + /* video hardware */ MDRV_SCREEN_ADD("screen", RASTER) MDRV_SCREEN_REFRESH_RATE(60) MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32) diff --git a/src/mame/drivers/namcos11.c b/src/mame/drivers/namcos11.c index 5035997dc9f..0cfc1700be1 100644 --- a/src/mame/drivers/namcos11.c +++ b/src/mame/drivers/namcos11.c @@ -604,7 +604,7 @@ static INTERRUPT_GEN( namcos11_vblank ) m_n_oldcoin = ~n_coin; if( strcmp( device->machine->gamedrv->name, "pocketrc" ) == 0 ) - { + { if( g_p_n_psxram[ 0x12c74 / 4 ] == 0x1440fff9 ) { g_p_n_psxram[ 0x12c74 / 4 ] = 0; diff --git a/src/mame/drivers/namcos2.c b/src/mame/drivers/namcos2.c index b3f7362e508..e50263a273c 100644 --- a/src/mame/drivers/namcos2.c +++ b/src/mame/drivers/namcos2.c @@ -1937,7 +1937,7 @@ MACHINE_DRIVER_END #define NAMCOS2_DATA_LOAD_O_256K(romname,start,chksum)\ ROM_LOAD16_BYTE( romname, (start + 0x000001), 0x040000, chksum )\ - ROM_RELOAD( (start + 0x080001), 0x040000 ) + ROM_RELOAD( (start + 0x080001), 0x040000 ) #define NAMCOS2_DATA_LOAD_E_512K(romname,start,chksum)\ ROM_LOAD16_BYTE(romname , (start + 0x000000), 0x080000, chksum ) @@ -2542,7 +2542,7 @@ ROM_START( finallapd ) NAMCOS2_GFXROM_LOAD_128K( "fl1-c5", 0x280000, CRC(ab89da77) SHA1(5cbead4289269a832c0d44d0ded79b58fcc4cc17) ) NAMCOS2_GFXROM_LOAD_128K( "fl2-c6", 0x300000, CRC(239bd9a0) SHA1(729abe89bea31b4e21161c69579df775b1cba6fe) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_128K( "fl2-sha", 0x000000, CRC(5fda0b6d) SHA1(92c0410e159977ea73a8e8c0cb1321c3056f6c2f) ) ROM_REGION16_BE( 0x200000, "user1", ROMREGION_ERASEFF ) /* Shared data roms */ @@ -2577,7 +2577,7 @@ ROM_START( finallapc ) ROM_CONTINUE( 0x010000, 0x01c000 ) ROM_RELOAD( 0x010000, 0x020000 ) - ROM_REGION( 0x010000, "mcu", 0 ) /* I/O MCU */ + ROM_REGION( 0x010000, "mcu", 0 ) /* I/O MCU */ ROM_LOAD( "sys2mcpu.bin", 0x000000, 0x002000, CRC(a342a97e) SHA1(2c420d34dba21e409bf78ddca710fc7de65a6642) ) ROM_LOAD( "sys2c65c.bin", 0x008000, 0x008000, BAD_DUMP CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) @@ -4332,20 +4332,20 @@ ROM_END /* suzuk8h2 */ /* LEGEND OF THE VALKYRIE */ ROM_START( valkyrie ) - ROM_REGION( 0x040000, "maincpu", 0 ) /* Master CPU */ + ROM_REGION( 0x040000, "maincpu", 0 ) /* Master CPU */ ROM_LOAD16_BYTE( "wd1mpr0.bin", 0x000000, 0x020000, CRC(94111a2e) SHA1(bd0dfe362fc98c1e94422a898b4daf6a08ef7982) ) ROM_LOAD16_BYTE( "wd1mpr1.bin", 0x000001, 0x020000, CRC(57b5051c) SHA1(de399381823251e2ee45f51c96be3e93ed763f94) ) - ROM_REGION( 0x040000, "slave", 0 ) /* Slave CPU */ + ROM_REGION( 0x040000, "slave", 0 ) /* Slave CPU */ ROM_LOAD16_BYTE( "wd1spr0.bin", 0x000000, 0x010000, CRC(b2398321) SHA1(13b76d8756a5e47d7469f72ef5fd2837b3e24b3e) ) ROM_LOAD16_BYTE( "wd1spr1.bin", 0x000001, 0x010000, CRC(38dba897) SHA1(22254186906b1accfb043172e6d0129d23d83b02) ) - ROM_REGION( 0x030000, "audiocpu", 0 ) /* Sound CPU (Banked) */ + ROM_REGION( 0x030000, "audiocpu", 0 ) /* Sound CPU (Banked) */ ROM_LOAD( "wd1snd0.bin", 0x00c000, 0x004000, CRC(d0fbf58b) SHA1(bc149eefcf5566a8e37ae60a62f5037a6e0f10bd) ) ROM_CONTINUE( 0x010000, 0x01c000 ) ROM_RELOAD( 0x010000, 0x020000 ) - ROM_REGION( 0x010000, "mcu", 0 ) /* I/O MCU */ + ROM_REGION( 0x010000, "mcu", 0 ) /* I/O MCU */ ROM_LOAD( "sys2mcpu.bin", 0x000000, 0x002000, CRC(a342a97e) SHA1(2c420d34dba21e409bf78ddca710fc7de65a6642) ) ROM_LOAD( "sys2c65c.bin", 0x008000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) @@ -4367,13 +4367,13 @@ ROM_START( valkyrie ) NAMCOS2_GFXROM_LOAD_128K( "wdchr4.bin", 0x200000, CRC(2f73d05e) SHA1(76341fd8c5e4216430eb09ded38ac554b5777ee5) ) NAMCOS2_GFXROM_LOAD_128K( "wdchr5.bin", 0x280000, CRC(b632b2ec) SHA1(914cb9a0dd42067b93e47c8cf847d588f361854f) ) - ROM_REGION( 0x400000, "gfx3", 0 ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "gfx3", 0 ) /* ROZ Tiles */ NAMCOS2_GFXROM_LOAD_128K( "wdroz0.bin", 0x000000, CRC(f776bf66) SHA1(2b134d5f9ede1205260a2109fdcd0d5c47b397ba) ) NAMCOS2_GFXROM_LOAD_128K( "wdroz1.bin", 0x080000, CRC(c1a345c3) SHA1(3d8c2ab457b81485014a83b4d9e8a80fe487ddef) ) NAMCOS2_GFXROM_LOAD_128K( "wdroz2.bin", 0x100000, CRC(28ffb44a) SHA1(207343e76dd02cbfe7575edd9b18074f68bb6768) ) NAMCOS2_GFXROM_LOAD_128K( "wdroz3.bin", 0x180000, CRC(7e77b46d) SHA1(db0ba244fb878120a4f06af4666ddc4cc430c97a) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_128K( "wdshape.bin", 0x000000, CRC(3b5e0249) SHA1(259bbabf57a8ad739c646c56aad6d0b92e10adcd) ) ROM_REGION16_BE( 0x200000, "user1", 0 ) /* Shared data roms */ @@ -4391,20 +4391,20 @@ ROM_END /* KYUUKAI DOUCHUUKI */ ROM_START( kyukaidk ) - ROM_REGION( 0x040000, "maincpu", 0 ) /* Master CPU */ + ROM_REGION( 0x040000, "maincpu", 0 ) /* Master CPU */ ROM_LOAD16_BYTE( "ky1_mp0b.bin", 0x000000, 0x010000, CRC(d1c992c8) SHA1(f3d49159ca3cbec7b905e6d877b8b76d023dd621) ) ROM_LOAD16_BYTE( "ky1_mp1b.bin", 0x000001, 0x010000, CRC(723553af) SHA1(ae611c699c276521a064b79c74fcc0ecd76a22cf) ) - ROM_REGION( 0x040000, "slave", 0 ) /* Slave CPU */ + ROM_REGION( 0x040000, "slave", 0 ) /* Slave CPU */ ROM_LOAD16_BYTE( "ky1_sp0.bin", 0x000000, 0x010000, CRC(4b4d2385) SHA1(e67e97108c63f1236e80045474a45ede386170f8) ) ROM_LOAD16_BYTE( "ky1_sp1.bin", 0x000001, 0x010000, CRC(bd3368cd) SHA1(4fc9d3f5182fd7db7e6003c15cdec1dbcdff5384) ) - ROM_REGION( 0x030000, "audiocpu", 0 ) /* Sound CPU (Banked) */ + ROM_REGION( 0x030000, "audiocpu", 0 ) /* Sound CPU (Banked) */ ROM_LOAD( "ky1_s0.bin", 0x00c000, 0x004000, CRC(27aea3e9) SHA1(c9ee7eaef1885fd8642595fa46833e1b473e66b5) ) ROM_CONTINUE( 0x010000, 0x01c000 ) ROM_RELOAD( 0x010000, 0x020000 ) - ROM_REGION( 0x010000, "mcu", 0 ) /* I/O MCU */ + ROM_REGION( 0x010000, "mcu", 0 ) /* I/O MCU */ ROM_LOAD( "sys2mcpu.bin", 0x000000, 0x002000, CRC(a342a97e) SHA1(2c420d34dba21e409bf78ddca710fc7de65a6642) ) ROM_LOAD( "sys2c65c.bin", 0x008000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) @@ -4420,13 +4420,13 @@ ROM_START( kyukaidk ) NAMCOS2_GFXROM_LOAD_128K( "ky1_c2.bin", 0x100000, CRC(e84b3dfd) SHA1(742c88c187c14301afaabd0d2d8eba11185aaef1) ) NAMCOS2_GFXROM_LOAD_128K( "ky1_c3.bin", 0x180000, CRC(69e67c86) SHA1(c835ad3e6908acd96b299826c2caa61255958f8c) ) - ROM_REGION( 0x400000, "gfx3", 0 ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "gfx3", 0 ) /* ROZ Tiles */ NAMCOS2_GFXROM_LOAD_256K( "ky1_r0.bin", 0x000000, CRC(9213e8c4) SHA1(178ea4db500adbc945bab0b6f1a014e89c077d77) ) NAMCOS2_GFXROM_LOAD_256K( "ky1_r1.bin", 0x080000, CRC(97d1a641) SHA1(d1708dcc668ad126ee34f7f84cbac9a56a617d7b) ) NAMCOS2_GFXROM_LOAD_256K( "ky1_r2.bin", 0x100000, CRC(39b58792) SHA1(1c30a04a370f56d2b548bf19c551acc95316693b) ) NAMCOS2_GFXROM_LOAD_256K( "ky1_r3.bin", 0x180000, CRC(90c60d92) SHA1(b581d5f4d6c353604e0c9bcb27252a44b1b4e91c) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_128K( "ky1_sha.bin", 0x000000, CRC(380a20d7) SHA1(9627d2e0192779d50bfb25d5c19976275818c310) ) ROM_REGION16_BE( 0x200000, "user1", 0 ) /* Shared data roms */ @@ -4441,20 +4441,20 @@ ROM_END /* KYUUKAI DOUCHUUKI (OLD) */ ROM_START( kyukaidko ) - ROM_REGION( 0x040000, "maincpu", 0 ) /* Master CPU */ + ROM_REGION( 0x040000, "maincpu", 0 ) /* Master CPU */ ROM_LOAD16_BYTE( "ky1_mp0.bin", 0x000000, 0x010000, CRC(01978a19) SHA1(dac40f6629ee025733ac160d83523488c99794c7) ) ROM_LOAD16_BYTE( "ky1_mp1.bin", 0x000001, 0x010000, CRC(b40717a7) SHA1(10a0e4eaa2502f51f34949007e6cc9d3bf031554) ) - ROM_REGION( 0x040000, "slave", 0 ) /* Slave CPU */ + ROM_REGION( 0x040000, "slave", 0 ) /* Slave CPU */ ROM_LOAD16_BYTE( "ky1_sp0.bin", 0x000000, 0x010000, CRC(4b4d2385) SHA1(e67e97108c63f1236e80045474a45ede386170f8) ) ROM_LOAD16_BYTE( "ky1_sp1.bin", 0x000001, 0x010000, CRC(bd3368cd) SHA1(4fc9d3f5182fd7db7e6003c15cdec1dbcdff5384) ) - ROM_REGION( 0x030000, "audiocpu", 0 ) /* Sound CPU (Banked) */ + ROM_REGION( 0x030000, "audiocpu", 0 ) /* Sound CPU (Banked) */ ROM_LOAD( "ky1_s0.bin", 0x00c000, 0x004000, CRC(27aea3e9) SHA1(c9ee7eaef1885fd8642595fa46833e1b473e66b5) ) ROM_CONTINUE( 0x010000, 0x01c000 ) ROM_RELOAD( 0x010000, 0x020000 ) - ROM_REGION( 0x010000, "mcu", 0 ) /* I/O MCU */ + ROM_REGION( 0x010000, "mcu", 0 ) /* I/O MCU */ ROM_LOAD( "sys2mcpu.bin", 0x000000, 0x002000, CRC(a342a97e) SHA1(2c420d34dba21e409bf78ddca710fc7de65a6642) ) ROM_LOAD( "sys2c65c.bin", 0x008000, 0x008000, CRC(a5b2a4ff) SHA1(068bdfcc71a5e83706e8b23330691973c1c214dc) ) @@ -4470,13 +4470,13 @@ ROM_START( kyukaidko ) NAMCOS2_GFXROM_LOAD_128K( "ky1_c2.bin", 0x100000, CRC(e84b3dfd) SHA1(742c88c187c14301afaabd0d2d8eba11185aaef1) ) NAMCOS2_GFXROM_LOAD_128K( "ky1_c3.bin", 0x180000, CRC(69e67c86) SHA1(c835ad3e6908acd96b299826c2caa61255958f8c) ) - ROM_REGION( 0x400000, "gfx3", 0 ) /* ROZ Tiles */ + ROM_REGION( 0x400000, "gfx3", 0 ) /* ROZ Tiles */ NAMCOS2_GFXROM_LOAD_256K( "ky1_r0.bin", 0x000000, CRC(9213e8c4) SHA1(178ea4db500adbc945bab0b6f1a014e89c077d77) ) NAMCOS2_GFXROM_LOAD_256K( "ky1_r1.bin", 0x080000, CRC(97d1a641) SHA1(d1708dcc668ad126ee34f7f84cbac9a56a617d7b) ) NAMCOS2_GFXROM_LOAD_256K( "ky1_r2.bin", 0x100000, CRC(39b58792) SHA1(1c30a04a370f56d2b548bf19c551acc95316693b) ) NAMCOS2_GFXROM_LOAD_256K( "ky1_r3.bin", 0x180000, CRC(90c60d92) SHA1(b581d5f4d6c353604e0c9bcb27252a44b1b4e91c) ) - ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ + ROM_REGION( 0x080000, "gfx4", 0 ) /* Mask shape */ NAMCOS2_GFXROM_LOAD_128K( "ky1_sha.bin", 0x000000, CRC(380a20d7) SHA1(9627d2e0192779d50bfb25d5c19976275818c310) ) ROM_REGION16_BE( 0x200000, "user1", 0 ) /* Shared data roms */ @@ -4737,7 +4737,7 @@ ROM_START( luckywld ) ROM_LOAD( "lw1sha0.7n", 0x000000, 0x80000, CRC(e3a65196) SHA1(c983a6d16dc10f0acd5f4ef5e148271f46ffbf28) ) ROM_REGION( 0x80000, "gfx5", 0 ) /* 16x16 shape */ - ROM_LOAD( "lw1rzs0.20z", 0x000000, 0x80000, CRC(a1071537) SHA1(bb8a97b82066d7838471e258d1c3c716ede7572c) ) + ROM_LOAD( "lw1rzs0.20z", 0x000000, 0x80000, CRC(a1071537) SHA1(bb8a97b82066d7838471e258d1c3c716ede7572c) ) ROM_REGION16_BE( 0x200000, "user1", 0 ) /* Shared data roms */ ROM_LOAD16_BYTE( "lw1dat0.13s", 0x000000, 0x80000, CRC(5d387d47) SHA1(e40ef52d1403fa630294d736f35a6924fa4e762e) ) @@ -4800,7 +4800,7 @@ ROM_START( luckywldj ) ROM_LOAD( "lw1sha0.7n", 0x000000, 0x80000, CRC(e3a65196) SHA1(c983a6d16dc10f0acd5f4ef5e148271f46ffbf28) ) ROM_REGION( 0x80000, "gfx5", 0 ) /* 16x16 shape */ - ROM_LOAD( "lw1rzs0.20z", 0x000000, 0x80000, CRC(a1071537) SHA1(bb8a97b82066d7838471e258d1c3c716ede7572c) ) + ROM_LOAD( "lw1rzs0.20z", 0x000000, 0x80000, CRC(a1071537) SHA1(bb8a97b82066d7838471e258d1c3c716ede7572c) ) ROM_REGION16_BE( 0x200000, "user1", 0 ) /* Shared data roms */ ROM_LOAD16_BYTE( "lw1dat0.13s", 0x000000, 0x80000, CRC(5d387d47) SHA1(e40ef52d1403fa630294d736f35a6924fa4e762e) ) diff --git a/src/mame/drivers/namcos22.c b/src/mame/drivers/namcos22.c index 9289bf90dc2..e4d13bf5cee 100644 --- a/src/mame/drivers/namcos22.c +++ b/src/mame/drivers/namcos22.c @@ -2785,7 +2785,7 @@ static READ8_HANDLER( aquajet_mcu_adc_r ) return ddy & 0xff; case 5: - return (ddy>>8); + return (ddy>>8); default: return 0; @@ -2846,7 +2846,7 @@ static INTERRUPT_GEN( mcu_interrupt ) { if (cpu_getiloops(device) == 0) { - cpu_set_input_line(device, M37710_LINE_IRQ0, HOLD_LINE); + cpu_set_input_line(device, M37710_LINE_IRQ0, HOLD_LINE); } else if (cpu_getiloops(device) == 1) { @@ -5196,7 +5196,7 @@ static INPUT_PORTS_START( timecris ) PORT_START( "LIGHTY" ) PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_Y ) PORT_CROSSHAIR(Y, 1.0, 0.0, 0) PORT_SENSITIVITY(50) PORT_KEYDELTA(4) - PORT_START("MCUP5A") + PORT_START("MCUP5A") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_UNKNOWN ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 ) diff --git a/src/mame/drivers/naomi.c b/src/mame/drivers/naomi.c index 603b60a2680..ddc405dfec0 100644 --- a/src/mame/drivers/naomi.c +++ b/src/mame/drivers/naomi.c @@ -1143,7 +1143,7 @@ static NVRAM_HANDLER( naomi_eeproms ) /* JVS 'eeprom' */ mame_fread(file,maple0x86data1,0x80); } - else + else { const UINT8* jvseeprom_default = NULL; int i; @@ -1259,7 +1259,7 @@ static WRITE64_DEVICE_HANDLER( eeprom_93c46a_w ) // SB_LMMODE1 static WRITE64_HANDLER( ta_texture_directpath1_w ) { - int mode = pvrctrl_regs[SB_LMMODE1]&1; + int mode = pvrctrl_regs[SB_LMMODE1]&1; if (mode&1) { printf("ta_texture_directpath0_w 32-bit access!\n"); @@ -1382,7 +1382,7 @@ INLINE int decode_reg32_64(running_machine *machine, UINT32 offset, UINT64 mem_m { reg++; *shift = 32; - } + } return reg; } @@ -2854,7 +2854,7 @@ ROM_START( f355 ) ROM_LOAD("mpr-21899.ic19",0x9800000, 0x0800000, CRC(14a4b87d) SHA1(33177dea88c6aec31e2c16c8d0d3f29c7ea772c5) ) ROM_LOAD("mpr-21900.ic20",0xa000000, 0x0800000, CRC(81901130) SHA1(1573b5c4360e29ba1a4b4901af49d5399fa1e635) ) ROM_LOAD("mpr-21901.ic21",0xa800000, 0x0800000, BAD_DUMP CRC(55dcbd6d) SHA1(9fec353f9e58016090e177f899a799e2e8fc7c9f) ) // returns bad in Naomi test mode -ROM_END // ROM reads different each time and fails test mode on real h/w, need a new cart +ROM_END // ROM reads different each time and fails test mode on real h/w, need a new cart ROM_START( f355twin ) ROM_REGION( 0x200000, "maincpu", 0) @@ -4556,8 +4556,8 @@ GAME( 1998, naomi, 0, naomi, naomi, naomi, ROT0, "Sega", /* 00??C */ GAME( 1999, smlg99, naomi, naomi, naomi, naomi, ROT0, "Sega", "Super Major League '99", GAME_UNEMULATED_PROTECTION|GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING ) /* 0020C */ GAME( 1999, samba, naomi, naomi, naomi, naomi, ROT0, "Sega", "Samba De Amigo (JPN)", GAME_UNEMULATED_PROTECTION|GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING ) /* 0083C */ GAME( 1999, derbyoc2, naomi, naomi, naomi, naomi, ROT0, "Sega", "Derby Owners Club II (JPN, USA, EXP, KOR, AUS)", GAME_UNEMULATED_PROTECTION|GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING ) -/* ????? */ GAME( 1999, crzytaxi, naomi, naomi, naomi, naomi, ROT0, "Sega", "Crazy Taxi (JPN, USA, EXP, KOR, AUS)", GAME_UNEMULATED_PROTECTION|GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING ) -/* ????? */ GAME( 1999, jambo, naomi, naomi, naomi, naomi, ROT0, "Sega", "Jambo! Safari (JPN, USA, EXP, KOR, AUS)", GAME_UNEMULATED_PROTECTION|GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING ) +/* ????? */ GAME( 1999, crzytaxi, naomi, naomi, naomi, naomi, ROT0, "Sega", "Crazy Taxi (JPN, USA, EXP, KOR, AUS)", GAME_UNEMULATED_PROTECTION|GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING ) +/* ????? */ GAME( 1999, jambo, naomi, naomi, naomi, naomi, ROT0, "Sega", "Jambo! Safari (JPN, USA, EXP, KOR, AUS)", GAME_UNEMULATED_PROTECTION|GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING ) /* 0021C */ GAME( 2000, virnba, naomi, naomi, naomi, naomi, ROT0, "Sega", "Virtua NBA (JPN, USA, EXP, KOR, AUS)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING ) /* 0021C */ GAME( 2000, virnbao, virnba, naomi, naomi, naomi, ROT0, "Sega", "Virtua NBA (JPN, USA, EXP, KOR, AUS) (original)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING ) /* 0026C */ GAME( 2000, totd, naomi, naomi, naomi, naomi, ROT0, "Sega", "The Typing of the Dead (JPN, USA, EXP, KOR, AUS)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING ) @@ -6129,7 +6129,7 @@ static DRIVER_INIT( atomiswave ) #define AW_DRIVER_INIT(DRIVER) \ static DRIVER_INIT(DRIVER) \ { \ - int i; \ + int i; \ UINT16 *src = (UINT16 *)(memory_region(machine, "user1")); \ int rom_size = memory_region_length(machine, "user1"); \ for(i=0; i<rom_size/2; i++) \ @@ -6371,8 +6371,8 @@ GAME( 2003, ggisuka, awbios, aw, aw, ggisuka, ROT0, "Sammy / Arc Syste GAME( 2004, rumblef, awbios, aw, aw, rumblef, ROT0, "Sammy / Dimps", "The Rumble Fish", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND ) GAME( 2004, rangrmsn, awbios, aw, aw, rangrmsn, ROT0, "Sammy", "Ranger Mission", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING ) GAME( 2004, salmankt, awbios, aw, aw, salmankt, ROT0, "Sammy", "Salary Man Kintarou", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING ) -GAME( 2004, kov7sprt, awbios, aw, aw, kov7sprt, ROT0, "Sammy / IGS", "Knights of Valour - The Seven Spirits", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND ) -GAME( 2005, vfurlong, awbios, aw, aw, vfurlong, ROT0, "Sammy", "Net Select Keiba Victory Furlong", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING ) +GAME( 2004, kov7sprt, awbios, aw, aw, kov7sprt, ROT0, "Sammy / IGS", "Knights of Valour - The Seven Spirits", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND ) +GAME( 2005, vfurlong, awbios, aw, aw, vfurlong, ROT0, "Sammy", "Net Select Keiba Victory Furlong", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING ) GAME( 2005, ngbc, awbios, aw, aw, ngbc, ROT0, "Sammy / SNK Playmore", "Neo-Geo Battle Coliseum", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING ) GAME( 2005, fotns, awbios, aw, aw, fotns, ROT0, "Sega / Arc System Works", "Fist Of The North Star", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING ) GAME( 2005, kofnw, awbios, aw, aw, kofnw, ROT0, "Sammy / SNK Playmore", "The King of Fighters Neowave", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING ) diff --git a/src/mame/drivers/naughtyb.c b/src/mame/drivers/naughtyb.c index bc19d036ebe..52d35bd2827 100644 --- a/src/mame/drivers/naughtyb.c +++ b/src/mame/drivers/naughtyb.c @@ -129,7 +129,7 @@ static READ8_HANDLER( dsw0_port_r ) // vblank replaces the cabinet dip return ( ( input_port_read(space->machine, "DSW0") & 0x7F ) | // dsw0 - ( input_port_read(space->machine, "FAKE") & 0x80 ) ); // vblank + ( input_port_read(space->machine, "FAKE") & 0x80 ) ); // vblank } /* Pop Flamer diff --git a/src/mame/drivers/nbmj8688.c b/src/mame/drivers/nbmj8688.c index 8d42d84952d..fe70508ce61 100644 --- a/src/mame/drivers/nbmj8688.c +++ b/src/mame/drivers/nbmj8688.c @@ -342,7 +342,7 @@ static ADDRESS_MAP_START( barline_io_map, ADDRESS_SPACE_IO, 8 ) AM_RANGE(0xd0, 0xd0) AM_READ(ff_r) // irq ack? watchdog? // AM_RANGE(0xd0, 0xd0) AM_DEVWRITE("dac", DAC_WRITE) //not used AM_RANGE(0xe0, 0xe0) AM_WRITE(secolove_romsel_w) - AM_RANGE(0xf0, 0xf0) AM_READ(nb1413m3_dipsw1_r) AM_WRITE(mjsikaku_scrolly_w) + AM_RANGE(0xf0, 0xf0) AM_READ(nb1413m3_dipsw1_r) AM_WRITE(mjsikaku_scrolly_w) AM_RANGE(0xf1, 0xf1) AM_READ(nb1413m3_dipsw2_r) ADDRESS_MAP_END @@ -4075,19 +4075,19 @@ GAME( 1986, apparel, 0, apparel, apparel, apparel, ROT0, "Cent GAME( 1986, citylove, 0, mbmj_h12bit, citylove, citylove, ROT0, "Nichibutsu", "City Love (Japan 860908)", 0 ) GAME( 1986, mcitylov, citylove, mbmj_h12bit, mcitylov, mcitylov, ROT0, "Nichibutsu", "City Love [BET] (Japan 860904)", 0 ) GAME( 1986, secolove, 0, mbmj_h12bit, secolove, secolove, ROT0, "Nichibutsu", "Second Love (Japan 861201)", 0 ) -GAME( 1986?,barline, 0, barline, barline, barline, ROT180, "Nichibutsu", "Barline (Japan?)", GAME_IMPERFECT_SOUND ) +GAME( 1986?,barline, 0, barline, barline, barline, ROT180, "Nichibutsu", "Barline (Japan?)", GAME_IMPERFECT_SOUND ) /* hybrid 16-bit palette */ -GAME( 1987, seiha, 0, seiha, seiha, seiha, ROT0, "Nichibutsu", "Seiha (Japan 870725)", 0 ) -GAME( 1987, seiham, seiha, seiha, seiham, seiham, ROT0, "Nichibutsu", "Seiha [BET] (Japan 870723)", 0 ) +GAME( 1987, seiha, 0, seiha, seiha, seiha, ROT0, "Nichibutsu", "Seiha (Japan 870725)", 0 ) +GAME( 1987, seiham, seiha, seiha, seiham, seiham, ROT0, "Nichibutsu", "Seiha [BET] (Japan 870723)", 0 ) GAME( 1987, mjgaiden, 0, mjgaiden, ojousan, ojousan, ROT0, "Central Denshi", "Mahjong Gaiden [BET] (Japan 870803)", 0 ) -GAME( 1987, iemoto, 0, iemoto, iemoto, iemoto, ROT0, "Nichibutsu", "Iemoto (Japan 871020)", 0 ) -GAME( 1987, iemotom, iemoto, ojousan, iemotom, iemotom, ROT0, "Nichibutsu", "Iemoto [BET] (Japan 871118)", 0 ) +GAME( 1987, iemoto, 0, iemoto, iemoto, iemoto, ROT0, "Nichibutsu", "Iemoto (Japan 871020)", 0 ) +GAME( 1987, iemotom, iemoto, ojousan, iemotom, iemotom, ROT0, "Nichibutsu", "Iemoto [BET] (Japan 871118)", 0 ) GAME( 1987, ryuuha, iemoto, ojousan, ryuuha, ryuuha, ROT0, "Central Denshi", "Ryuuha [BET] (Japan 871027)", 0 ) -GAME( 1987, ojousan, 0, ojousan, ojousan, ojousan, ROT0, "Nichibutsu", "Ojousan (Japan 871204)", 0 ) -GAME( 1987, ojousanm, ojousan, ojousan, ojousanm, ojousanm, ROT0, "Nichibutsu", "Ojousan [BET] (Japan 870108)", 0 ) -GAME( 1988, korinai, 0, ojousan, korinai, korinai, ROT0, "Nichibutsu", "Mahjong-zukino Korinai Menmen (Japan 880425)", 0 ) -GAME( 1988, korinaim, korinai, ojousan, korinaim, korinaim, ROT0, "Nichibutsu", "Mahjong-zukino Korinai Menmen [BET] (Japan 880920)", 0 ) +GAME( 1987, ojousan, 0, ojousan, ojousan, ojousan, ROT0, "Nichibutsu", "Ojousan (Japan 871204)", 0 ) +GAME( 1987, ojousanm, ojousan, ojousan, ojousanm, ojousanm, ROT0, "Nichibutsu", "Ojousan [BET] (Japan 870108)", 0 ) +GAME( 1988, korinai, 0, ojousan, korinai, korinai, ROT0, "Nichibutsu", "Mahjong-zukino Korinai Menmen (Japan 880425)", 0 ) +GAME( 1988, korinaim, korinai, ojousan, korinaim, korinaim, ROT0, "Nichibutsu", "Mahjong-zukino Korinai Menmen [BET] (Japan 880920)", 0 ) /* pure 16-bit palette (+ LCD in some) */ GAME( 1987, housemnq, 0, mbmj_p16bit_LCD, housemnq, housemnq, ROT0, "Nichibutsu", "House Mannequin (Japan 870217)", 0 ) diff --git a/src/mame/drivers/nbmj8891.c b/src/mame/drivers/nbmj8891.c index b4d6bd54251..e9ba10c99bb 100644 --- a/src/mame/drivers/nbmj8891.c +++ b/src/mame/drivers/nbmj8891.c @@ -2382,7 +2382,7 @@ static INPUT_PORTS_START( pairsnb ) PORT_START("DSWA") PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) ) PORT_DIPSETTING( 0x03, DEF_STR( Easy ) ) // Hearts : 10 - Time : 60/60 - PORT_DIPSETTING( 0x02, DEF_STR( Medium ) ) // Hearts : 7 - Time : 44/60 + PORT_DIPSETTING( 0x02, DEF_STR( Medium ) ) // Hearts : 7 - Time : 44/60 PORT_DIPSETTING( 0x01, DEF_STR( Hard ) ) // Hearts : 5 - Time : 32/60 PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) ) // Hearts : 3 - Time : 24/60 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Coinage ) ) @@ -3806,7 +3806,7 @@ ROM_START( hnxmasev ) ROM_LOAD( "b.3f", 0x00000, 0x10000, CRC(45e34624) SHA1(db7f880a8b2f36d5bed939bd0b2694f27e29141b) ) ROM_REGION( 0x20000, "voice", 0 ) /* voice */ - ROM_LOAD( "a.3c", 0x00000, 0x20000, CRC(713b3f8f) SHA1(460e9dcfc4a31f8e6d3f40ba77d6639257d9762f) ) //same as maiko + ROM_LOAD( "a.3c", 0x00000, 0x20000, CRC(713b3f8f) SHA1(460e9dcfc4a31f8e6d3f40ba77d6639257d9762f) ) //same as maiko ROM_REGION( 0x80000, "gfx1", 0 ) /* gfx */ ROM_LOAD( "c.10a", 0x000000, 0x10000, CRC(e46a1baa) SHA1(95ccf45a3c542391b67bd7993b5f7828ab525ebc) ) @@ -3860,7 +3860,7 @@ ROM_START( hnageman ) ROM_LOAD( "2.3f", 0x00000, 0x10000, CRC(155ed09a) SHA1(254f199063fe525c574032ae69d4d21b0debb4c5) ) ROM_REGION( 0x20000, "voice", 0 ) /* voice */ - ROM_LOAD( "1.3c", 0x00000, 0x20000, CRC(713b3f8f) SHA1(460e9dcfc4a31f8e6d3f40ba77d6639257d9762f) ) //same as maiko + ROM_LOAD( "1.3c", 0x00000, 0x20000, CRC(713b3f8f) SHA1(460e9dcfc4a31f8e6d3f40ba77d6639257d9762f) ) //same as maiko ROM_REGION( 0xd0000, "gfx1", 0 ) /* gfx */ ROM_LOAD( "3.10a", 0x000000, 0x20000, CRC(080e0daa) SHA1(331137392c46fededdc55bd731c3a0bee88e59e3) ) diff --git a/src/mame/drivers/nemesis.c b/src/mame/drivers/nemesis.c index 5f673b25647..28d60bf1d74 100644 --- a/src/mame/drivers/nemesis.c +++ b/src/mame/drivers/nemesis.c @@ -512,7 +512,7 @@ static ADDRESS_MAP_START( citybomb_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x0f0008, 0x0f0009) AM_READ_PORT("DSW0") AM_RANGE(0x0f0010, 0x0f0011) AM_WRITE(nemesis_soundlatch_word_w) AM_RANGE(0x0f0018, 0x0f0019) AM_WRITE(watchdog_reset16_w) /* probably */ - AM_RANGE(0x0f0020, 0x0f0021) AM_READ(selected_ip_word_r) AM_WRITENOP /* WEC Le Mans 24 control? */ + AM_RANGE(0x0f0020, 0x0f0021) AM_READ(selected_ip_word_r) AM_WRITENOP /* WEC Le Mans 24 control? */ AM_RANGE(0x0f8000, 0x0f8001) AM_WRITE(salamand_control_port_word_w) /* irq enable, flipscreen, etc. */ AM_RANGE(0x100000, 0x1bffff) AM_ROM AM_RANGE(0x200000, 0x20ffff) AM_RAM_WRITE(nemesis_characterram_word_w) AM_BASE(&nemesis_characterram) AM_SIZE(&nemesis_characterram_size) @@ -612,7 +612,7 @@ static ADDRESS_MAP_START( hcrash_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x0c2802, 0x0c2803) AM_WRITE(gx400_irq2_enable_word_w) // or at 0x0c2804 ? AM_RANGE(0x0c2804, 0x0c2805) AM_WRITENOP AM_RANGE(0x0c4000, 0x0c4001) AM_READ_PORT("IN1") AM_WRITE(selected_ip_word_w) - AM_RANGE(0x0c4002, 0x0c4003) AM_READ(selected_ip_word_r) AM_WRITENOP /* WEC Le Mans 24 control. latches the value read previously */ + AM_RANGE(0x0c4002, 0x0c4003) AM_READ(selected_ip_word_r) AM_WRITENOP /* WEC Le Mans 24 control. latches the value read previously */ AM_RANGE(0x100000, 0x100fff) AM_RAM_WRITE(nemesis_videoram2_word_w) AM_BASE(&nemesis_videoram2) /* VRAM */ AM_RANGE(0x101000, 0x101fff) AM_RAM_WRITE(nemesis_videoram1_word_w) AM_BASE(&nemesis_videoram1) AM_RANGE(0x102000, 0x102fff) AM_RAM_WRITE(nemesis_colorram2_word_w) AM_BASE(&nemesis_colorram2) diff --git a/src/mame/drivers/neodrvr.c b/src/mame/drivers/neodrvr.c index d7d91713605..a39825d5fd0 100644 --- a/src/mame/drivers/neodrvr.c +++ b/src/mame/drivers/neodrvr.c @@ -325,7 +325,7 @@ INPUT_PORTS_END ROMX_LOAD(name, offset, length, hash, ROM_GROUPWORD | ROM_REVERSE | ROM_BIOS(bios+1)) /* Note '+1' */ #define NEOGEO_BIOS \ - ROM_REGION16_BE( 0x80000, "mainbios", 0 ) \ + ROM_REGION16_BE( 0x80000, "mainbios", 0 ) \ ROM_SYSTEM_BIOS( 0, "euro", "Europe MVS (Ver. 2)" ) \ ROM_LOAD16_WORD_SWAP_BIOS( 0, "sp-s2.sp1", 0x00000, 0x020000, CRC(9036d879) SHA1(4f5ed7105b7128794654ce82b51723e16e389543) ) /* Europe, 1 Slot, has also been found on 2 Slot and 4 Slot (the old hacks were designed for this one) */ \ ROM_SYSTEM_BIOS( 1, "euro-s1", "Europe MVS (Ver. 1)" ) \ @@ -388,7 +388,7 @@ INPUT_PORTS_END ******************************************************************************/ -#define NEO_BIOS_AUDIO_64K(name, hash) \ +#define NEO_BIOS_AUDIO_64K(name, hash) \ NEOGEO_BIOS \ \ ROM_REGION( 0x20000, "audiobios", 0 ) \ @@ -459,31 +459,31 @@ INPUT_PORTS_END #define NO_DELTAT_REGION -#define NEO_SFIX_32K(name, hash) \ - ROM_REGION( 0x20000, "fixed", 0 ) \ +#define NEO_SFIX_32K(name, hash) \ + ROM_REGION( 0x20000, "fixed", 0 ) \ ROM_LOAD( name, 0x000000, 0x08000, hash ) \ \ - ROM_REGION( 0x20000, "fixedbios", 0 ) \ + ROM_REGION( 0x20000, "fixedbios", 0 ) \ ROM_LOAD( "sfix.sfix", 0x000000, 0x20000, CRC(c2ea0cfd) SHA1(fd4a618cdcdbf849374f0a50dd8efe9dbab706c3) ) \ \ ROM_Y_ZOOM -#define NEO_SFIX_64K(name, hash) \ - ROM_REGION( 0x20000, "fixed", 0 ) \ +#define NEO_SFIX_64K(name, hash) \ + ROM_REGION( 0x20000, "fixed", 0 ) \ ROM_LOAD( name, 0x000000, 0x10000, hash ) \ \ - ROM_REGION( 0x20000, "fixedbios", 0 ) \ + ROM_REGION( 0x20000, "fixedbios", 0 ) \ ROM_LOAD( "sfix.sfix", 0x000000, 0x20000, CRC(c2ea0cfd) SHA1(fd4a618cdcdbf849374f0a50dd8efe9dbab706c3) ) \ \ ROM_Y_ZOOM -#define NEO_SFIX_128K(name, hash) \ - ROM_REGION( 0x20000, "fixed", 0 ) \ +#define NEO_SFIX_128K(name, hash) \ + ROM_REGION( 0x20000, "fixed", 0 ) \ ROM_LOAD( name, 0x000000, 0x20000, hash ) \ \ - ROM_REGION( 0x20000, "fixedbios", 0 ) \ + ROM_REGION( 0x20000, "fixedbios", 0 ) \ ROM_LOAD( "sfix.sfix", 0x000000, 0x20000, CRC(c2ea0cfd) SHA1(fd4a618cdcdbf849374f0a50dd8efe9dbab706c3) ) \ \ ROM_Y_ZOOM @@ -7021,7 +7021,7 @@ ROM_END ROM_START( kf2k3bl ) ROM_REGION( 0x800000, "maincpu", 0 ) - ROM_LOAD16_WORD_SWAP( "2k3-p1.bin", 0x100000, 0x400000, CRC(92ed6ee3) SHA1(5e7e21eb40dfcc453ba73808760d5ddedd49c58a) ) + ROM_LOAD16_WORD_SWAP( "2k3-p1.bin", 0x100000, 0x400000, CRC(92ed6ee3) SHA1(5e7e21eb40dfcc453ba73808760d5ddedd49c58a) ) ROM_LOAD16_WORD_SWAP( "2k3-p2.bin", 0x500000, 0x200000, CRC(5d3d8bb3) SHA1(7f2341f14ca12ff5721eb038b3496228a1f34b60) ) ROM_CONTINUE( 0x000000, 0x100000 ) ROM_CONTINUE( 0x000000, 0x100000 ) @@ -7203,7 +7203,7 @@ ROM_START( 98best44 ) /* no S1 rom */ ROM_REGION( 0x30000, "audiocpu", 0 ) - ROM_LOAD( "pt004-m1", 0x00000, 0x20000, CRC(6d77cdaa) SHA1(f88a93b3085b18b6663b4e51fccaa41958aafae1) ) + ROM_LOAD( "pt004-m1", 0x00000, 0x20000, CRC(6d77cdaa) SHA1(f88a93b3085b18b6663b4e51fccaa41958aafae1) ) ROM_RELOAD( 0x10000, 0x20000 ) ROM_REGION( 0x200000, "ymsnd", 0 ) diff --git a/src/mame/drivers/neogeo.c b/src/mame/drivers/neogeo.c index e9f1210e95e..387892e9fd5 100644 --- a/src/mame/drivers/neogeo.c +++ b/src/mame/drivers/neogeo.c @@ -281,7 +281,7 @@ void neogeo_set_display_counter_lsb( const address_space *space, UINT16 data ) if (state->display_position_interrupt_control & IRQ2CTRL_LOAD_RELATIVE) { if (LOG_VIDEO_SYSTEM) logerror("AUTOLOAD_RELATIVE "); - adjust_display_position_interrupt_timer(space->machine); + adjust_display_position_interrupt_timer(space->machine); } } @@ -867,7 +867,7 @@ static void audio_cpu_banking_init( running_machine *machine ) UINT32 address_mask; /* audio bios/cartridge selection */ - if (memory_region(machine, "audiobios")) + if (memory_region(machine, "audiobios")) memory_configure_bank(machine, NEOGEO_BANK_AUDIO_CPU_MAIN_BANK, 0, 1, memory_region(machine, "audiobios"), 0); memory_configure_bank(machine, NEOGEO_BANK_AUDIO_CPU_MAIN_BANK, 1, 1, memory_region(machine, "audiocpu"), 0); @@ -1022,7 +1022,7 @@ static void set_output_latch( running_machine *machine, UINT8 data ) if (falling_bits & 0x20) state->led2_value = ~state->output_data; - if (falling_bits & 0xc7) + if (falling_bits & 0xc7) logerror("%s Unmaped LED write. Data: %x\n", cpuexec_describe_context(machine), falling_bits); state->output_latch = data; @@ -1299,7 +1299,7 @@ static const ym2610_interface ym2610_config = PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SERVICE1 ) \ PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* having this ACTIVE_HIGH causes you to start with 2 credits using USA bios roms */ \ PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* having this ACTIVE_HIGH causes you to start with 2 credits using USA bios roms */ \ - PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_SPECIAL ) /* what is this? */ \ + PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_SPECIAL ) /* what is this? */ \ PORT_BIT( 0x00c0, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(get_calendar_status, NULL) \ PORT_BIT( 0xff00, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(get_audio_result, NULL) diff --git a/src/mame/drivers/nightgal.c b/src/mame/drivers/nightgal.c index d6d0350b7e0..502a32f9c44 100644 --- a/src/mame/drivers/nightgal.c +++ b/src/mame/drivers/nightgal.c @@ -730,7 +730,7 @@ MACHINE_DRIVER_END static MACHINE_DRIVER_START( sexygal ) /* basic machine hardware */ MDRV_IMPORT_FROM( nightgal ) - MDRV_CPU_MODIFY("maincpu") + MDRV_CPU_MODIFY("maincpu") MDRV_CPU_PROGRAM_MAP(sexygal_map) MDRV_CPU_IO_MAP(sexygal_io) MDRV_CPU_PERIODIC_INT(nmi_line_pulse,244)//??? diff --git a/src/mame/drivers/ninjakd2.c b/src/mame/drivers/ninjakd2.c index d39e349d25f..9ed6b0925e1 100644 --- a/src/mame/drivers/ninjakd2.c +++ b/src/mame/drivers/ninjakd2.c @@ -1063,7 +1063,7 @@ ROM_START( ninjakd2a ) ROM_REGION( 2*0x10000, "soundcpu", 0 ) ROM_LOAD( "nk2_06.bin", 0x10000, 0x8000, CRC(7bfe6c9e) SHA1(aef8cbeb0024939bf65f77113a5cf777f6613722) ) // decrypted opcodes - ROM_CONTINUE( 0x00000, 0x8000 ) // decrypted data + ROM_CONTINUE( 0x00000, 0x8000 ) // decrypted data ROM_REGION( 0x08000, "gfx1", 0 ) // fg tiles (need lineswapping) ROM_LOAD( "nk2_12.rom", 0x00000, 0x08000, CRC(db5657a9) SHA1(abbb033edb9a5a0c66ee5981d1e4df1ab334a82d) ) @@ -1090,7 +1090,7 @@ ROM_START( ninjakd2b ) ROM_REGION( 2*0x10000, "soundcpu", 0 ) ROM_LOAD( "nk2_06.bin", 0x10000, 0x8000, CRC(7bfe6c9e) SHA1(aef8cbeb0024939bf65f77113a5cf777f6613722) ) // 6.3g decrypted opcodes - ROM_CONTINUE( 0x00000, 0x8000 ) // decrypted data + ROM_CONTINUE( 0x00000, 0x8000 ) // decrypted data ROM_REGION( 0x08000, "gfx1", 0 ) // fg tiles (need lineswapping) ROM_LOAD( "nk2_12.rom", 0x00000, 0x08000, CRC(db5657a9) SHA1(abbb033edb9a5a0c66ee5981d1e4df1ab334a82d) ) // 12.5m @@ -1189,7 +1189,7 @@ ROM_END ROM_START( robokid ) ROM_REGION( 0x48000, "maincpu", 0 ) ROM_LOAD( "robokid1.18j", 0x00000, 0x08000, CRC(378c21fc) SHA1(58163bd6fbfa8385b1bd648cfde3d75bf81ac07d) ) - ROM_CONTINUE( 0x10000, 0x08000 ) // banked at 8000-bfff + ROM_CONTINUE( 0x10000, 0x08000 ) // banked at 8000-bfff ROM_LOAD( "robokid2.18k", 0x18000, 0x10000, CRC(ddef8c5a) SHA1(a1dd2f51205863c3d5d3527991d538ca8adf7587) ) ROM_LOAD( "robokid3.15k", 0x28000, 0x10000, CRC(05295ec3) SHA1(33dd0853a2064cb4301cfbdc7856def81f6e1223) ) ROM_LOAD( "robokid4.12k", 0x38000, 0x10000, CRC(3bc3977f) SHA1(da394e12d197b0e109b03c854da06b1267bd9d59) ) @@ -1237,7 +1237,7 @@ ROM_END ROM_START( robokidj ) ROM_REGION( 0x48000, "maincpu", 0 ) ROM_LOAD( "1.29", 0x00000, 0x08000, CRC(59a1e2ec) SHA1(71f9d28dd8d2cf77a27fab163ce9562e3e75a540) ) - ROM_CONTINUE( 0x10000, 0x08000 ) // banked at 8000-bfff + ROM_CONTINUE( 0x10000, 0x08000 ) // banked at 8000-bfff ROM_LOAD( "2.30", 0x18000, 0x10000, CRC(e3f73476) SHA1(bd1c8946d637df21432bd52ae9324255251570b9) ) ROM_LOAD( "robokid3.15k", 0x28000, 0x10000, CRC(05295ec3) SHA1(33dd0853a2064cb4301cfbdc7856def81f6e1223) ) ROM_LOAD( "robokid4.12k", 0x38000, 0x10000, CRC(3bc3977f) SHA1(da394e12d197b0e109b03c854da06b1267bd9d59) ) @@ -1285,7 +1285,7 @@ ROM_END ROM_START( robokidj2 ) ROM_REGION( 0x48000, "maincpu", 0 ) ROM_LOAD( "1_rom29.18j", 0x00000, 0x08000, CRC(969fb951) SHA1(aa32f0cb33ba2ccbb933dab5444a7e0dbbb84b3d) ) - ROM_CONTINUE( 0x10000, 0x08000 ) // banked at 8000-bfff + ROM_CONTINUE( 0x10000, 0x08000 ) // banked at 8000-bfff ROM_LOAD( "2_rom30.18k", 0x18000, 0x10000, CRC(c0228b63) SHA1(8f7e3a29a35723abc8b10bf511fc8611e31a2961) ) ROM_LOAD( "robokid3.15k", 0x28000, 0x10000, CRC(05295ec3) SHA1(33dd0853a2064cb4301cfbdc7856def81f6e1223) ) ROM_LOAD( "robokid4.12k", 0x38000, 0x10000, CRC(3bc3977f) SHA1(da394e12d197b0e109b03c854da06b1267bd9d59) ) @@ -1333,7 +1333,7 @@ ROM_END ROM_START( omegaf ) ROM_REGION( 0x48000, "maincpu", 0 ) ROM_LOAD( "1.5", 0x00000, 0x08000, CRC(57a7fd96) SHA1(65ca290b48f8579fcce00db5b3b3f8694667a136) ) - ROM_CONTINUE( 0x10000, 0x18000 ) // banked at 8000-bfff + ROM_CONTINUE( 0x10000, 0x18000 ) // banked at 8000-bfff ROM_LOAD( "6.4l", 0x28000, 0x20000, CRC(6277735c) SHA1(b0f91f0cc51d424a1a7834c126736f24c2e23c17) ) ROM_REGION( 0x10000, "soundcpu", 0 ) @@ -1358,7 +1358,7 @@ ROM_END ROM_START( omegafs ) ROM_REGION( 0x48000, "maincpu", 0 ) ROM_LOAD( "5.3l", 0x00000, 0x08000, CRC(503a3e63) SHA1(73420aecb653cd4fd3b6afe67d6f5726f01411dd) ) - ROM_CONTINUE( 0x10000, 0x18000 ) // banked at 8000-bfff + ROM_CONTINUE( 0x10000, 0x18000 ) // banked at 8000-bfff ROM_LOAD( "6.4l", 0x28000, 0x20000, CRC(6277735c) SHA1(b0f91f0cc51d424a1a7834c126736f24c2e23c17) ) ROM_REGION( 0x10000, "soundcpu", 0 ) diff --git a/src/mame/drivers/niyanpai.c b/src/mame/drivers/niyanpai.c index 0e9c99839a9..3f99cc37be0 100644 --- a/src/mame/drivers/niyanpai.c +++ b/src/mame/drivers/niyanpai.c @@ -418,7 +418,7 @@ static INPUT_PORTS_START( niyanpai ) PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_SERVICE2 ) // ANALYZER PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_START1 ) // START1 PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN ) // ? - PORT_SERVICE( 0x8000, IP_ACTIVE_LOW ) // TEST + PORT_SERVICE( 0x8000, IP_ACTIVE_LOW ) // TEST PORT_START("P1_P2") PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) @@ -621,7 +621,7 @@ static INPUT_PORTS_START( musobana ) // I don't have manual for this game. PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_SERVICE2 ) // ANALYZER PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(musobana_outcoin_flag_r, NULL) // OUT COIN PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_SERVICE( 0x8000, IP_ACTIVE_LOW ) // TEST + PORT_SERVICE( 0x8000, IP_ACTIVE_LOW ) // TEST PORT_INCLUDE( nbmjctrl_16 ) INPUT_PORTS_END @@ -687,7 +687,7 @@ static INPUT_PORTS_START( 4psimasy ) // I don't have manual for this game. PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_SERVICE2 ) // ANALYZER PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(musobana_outcoin_flag_r, NULL) // OUT COIN PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_SERVICE( 0x8000, IP_ACTIVE_LOW ) // TEST + PORT_SERVICE( 0x8000, IP_ACTIVE_LOW ) // TEST PORT_INCLUDE( nbmjctrl_16 ) INPUT_PORTS_END @@ -753,7 +753,7 @@ static INPUT_PORTS_START( mhhonban ) // I don't have manual for this game. PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_SERVICE2 ) // ANALYZER PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(musobana_outcoin_flag_r, NULL) // OUT COIN PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_SERVICE( 0x8000, IP_ACTIVE_LOW ) // TEST + PORT_SERVICE( 0x8000, IP_ACTIVE_LOW ) // TEST PORT_INCLUDE( nbmjctrl_16 ) INPUT_PORTS_END diff --git a/src/mame/drivers/nmk16.c b/src/mame/drivers/nmk16.c index af2fa8a9420..2c59c094499 100644 --- a/src/mame/drivers/nmk16.c +++ b/src/mame/drivers/nmk16.c @@ -175,18 +175,18 @@ static WRITE16_HANDLER( nmk16_mainram_strange_w ) { UINT16* dstram; - dstram = nmk16_mainram; + dstram = nmk16_mainram; if (!ACCESSING_BITS_8_15) { dstram[offset] = (data & 0x00ff) | ((data & 0x00ff)<<8); - } + } else if (!ACCESSING_BITS_0_7) { dstram[offset] = (data & 0xff00) | ((data & 0xff00)>>8); } else - { + { dstram[offset] = data; } } @@ -626,7 +626,7 @@ static WRITE16_HANDLER( hachamf_mainram_w ) case 0xe15e/2: PROT_JSR(0xe15e,0x803c,0xb59e);//b59e - OK PROT_JSR(0xe15e,0x8035,0x8d0c); break; case 0xe16e/2: PROT_JSR(0xe16e,0x801d,0x9ac2);//9ac2 - OK - PROT_JSR(0xe16e,0x8026,0x8c36); break; + PROT_JSR(0xe16e,0x8026,0x8c36); break; case 0xe17e/2: PROT_JSR(0xe17e,0x802e,0xc366);//c366 - OK PROT_JSR(0xe17e,0x8017,0x870a); break; case 0xe18e/2: PROT_JSR(0xe18e,0x8004,0xd620); //unused @@ -703,7 +703,7 @@ static WRITE16_HANDLER( tdragon_mainram_w ) case 0xe75e/2: PROT_JSR(0xe75e,0x803c,0xbb4c); PROT_JSR(0xe75e,0x8035,0xa154); break; case 0xe76e/2: PROT_JSR(0xe76e,0x801d,0xafa6); - PROT_JSR(0xe76e,0x8026,0xa57a); break; + PROT_JSR(0xe76e,0x8026,0xa57a); break; case 0xe77e/2: PROT_JSR(0xe77e,0x802e,0xc6a4); PROT_JSR(0xe77e,0x8017,0x9e22); break; case 0xe78e/2: PROT_JSR(0xe78e,0x8004,0xaa0a); @@ -2489,7 +2489,7 @@ static INPUT_PORTS_START( gunnail ) PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:8") PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW1:7") /* The manual states this dip is "Unused" */ + PORT_DIPNAME( 0x02, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW1:7") /* The manual states this dip is "Unused" */ PORT_DIPSETTING( 0x02, DEF_STR( Japanese ) ) /* Will add "Distributed by TECMO" to the title screen */ PORT_DIPSETTING( 0x00, DEF_STR( English ) ) PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:6,5") @@ -3266,7 +3266,7 @@ INPUT_PORTS_END static INPUT_PORTS_START( firehawk ) PORT_INCLUDE( afega_common ) - PORT_START("DSW1") // $080004.w + PORT_START("DSW1") // $080004.w PORT_SERVICE_DIPLOC( 0x01, IP_ACTIVE_LOW, "SW1:8" ) PORT_DIPNAME( 0x000e, 0x000e, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:7,6,5") PORT_DIPSETTING( 0x0006, DEF_STR( Very_Easy) ) @@ -3321,7 +3321,7 @@ INPUT_PORTS_END static INPUT_PORTS_START( spec2k ) PORT_INCLUDE( afega_common ) - PORT_START("DSW1") // $080004.w + PORT_START("DSW1") // $080004.w PORT_SERVICE_DIPLOC( 0x01, IP_ACTIVE_LOW, "SW1:8" ) PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:7") PORT_DIPSETTING( 0x0000, DEF_STR( Off ) ) @@ -4715,10 +4715,10 @@ static WRITE16_HANDLER( twinactn_flipscreen_w ) ***************************************************************************/ static WRITE8_DEVICE_HANDLER( spec2k_oki1_banking_w ) { - if(data == 0xfe) - okim6295_set_bank_base(device, 0); - else if(data == 0xff) - okim6295_set_bank_base(device, 0x40000); + if(data == 0xfe) + okim6295_set_bank_base(device, 0); + else if(data == 0xff) + okim6295_set_bank_base(device, 0x40000); } static ADDRESS_MAP_START( afega_sound_cpu, ADDRESS_SPACE_PROGRAM, 8 ) diff --git a/src/mame/drivers/norautp.c b/src/mame/drivers/norautp.c index 6009684af06..96dd1bb1c09 100644 --- a/src/mame/drivers/norautp.c +++ b/src/mame/drivers/norautp.c @@ -597,7 +597,7 @@ static PALETTE_INIT( norautp ) { /* 1st gfx bank */ palette_set_color(machine, 0, MAKE_RGB(0x00, 0x00, 0xff)); /* blue */ - palette_set_color(machine, 1, MAKE_RGB(0xff, 0xff, 0x00)); /* yellow */ + palette_set_color(machine, 1, MAKE_RGB(0xff, 0xff, 0x00)); /* yellow */ palette_set_color(machine, 2, MAKE_RGB(0x00, 0x00, 0xff)); /* blue */ palette_set_color(machine, 3, MAKE_RGB(0xff, 0xff, 0xff)); /* white */ palette_set_color(machine, 4, MAKE_RGB(0xff, 0xff, 0xff)); /* white */ @@ -1753,7 +1753,7 @@ ROM_START( norautjp ) ROM_REGION( 0x1000, "gfx", 0 ) ROM_FILL( 0x0000, 0x0800, 0xff ) - ROM_LOAD( "2732-1char.bin", 0x0800, 0x0800, CRC(d94be899) SHA1(b7212162324fa2d67383a475052e3b351bb1af5f) ) /* first half 0xff filled */ + ROM_LOAD( "2732-1char.bin", 0x0800, 0x0800, CRC(d94be899) SHA1(b7212162324fa2d67383a475052e3b351bb1af5f) ) /* first half 0xff filled */ ROM_CONTINUE( 0x0800, 0x0800 ) ROM_REGION( 0x400, "nvram", 0 ) diff --git a/src/mame/drivers/nwk-tr.c b/src/mame/drivers/nwk-tr.c index 5955802d5f0..e5b9cc6eb3b 100644 --- a/src/mame/drivers/nwk-tr.c +++ b/src/mame/drivers/nwk-tr.c @@ -1079,7 +1079,7 @@ static MACHINE_DRIVER_START( nwktr ) MDRV_K033906_ADD("k033906_1", nwktr_k033906_interface) - /* video hardware */ + /* video hardware */ MDRV_SCREEN_ADD("screen", RASTER) MDRV_SCREEN_REFRESH_RATE(60) MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32) @@ -1135,7 +1135,7 @@ ROM_START(racingj) ROM_REGION(0x80000, "audiocpu", 0) /* 68k program roms */ ROM_LOAD16_WORD_SWAP( "676gna08.7s", 0x000000, 0x080000, CRC(8973f6f2) SHA1(f5648a7e0205f7e979ccacbb52936809ce14a184) ) - ROM_REGION(0x1000000, "rfsnd", 0) /* other roms (textures?) */ + ROM_REGION(0x1000000, "rfsnd", 0) /* other roms (textures?) */ ROM_LOAD( "676a09.16p", 0x000000, 0x400000, CRC(f85c8dc6) SHA1(8b302c80be309b5cc68b75945fcd7b87a56a4c9b) ) ROM_LOAD( "676a10.14p", 0x400000, 0x400000, CRC(7b5b7828) SHA1(aec224d62e4b1e8fdb929d7947ce70d84ba676cf) ) @@ -1159,7 +1159,7 @@ ROM_START(racingj2) ROM_REGION(0x80000, "audiocpu", 0) /* 68k program roms */ ROM_LOAD16_WORD_SWAP( "888a08.7s", 0x000000, 0x080000, CRC(55fbea65) SHA1(ad953f758181731efccadcabc4326e6634c359e8) ) - ROM_REGION(0x1000000, "rfsnd", 0) /* PCM sample roms */ + ROM_REGION(0x1000000, "rfsnd", 0) /* PCM sample roms */ ROM_LOAD( "888a09.16p", 0x000000, 0x400000, CRC(11e2fed2) SHA1(24b8a367b59fedb62c56f066342f2fa87b135fc5) ) ROM_LOAD( "888a10.14p", 0x400000, 0x400000, CRC(328ce610) SHA1(dbbc779a1890c53298c0db129d496df048929496) ) @@ -1182,7 +1182,7 @@ ROM_START(thrilld) ROM_REGION(0x80000, "audiocpu", 0) /* 68k program roms */ ROM_LOAD16_WORD_SWAP( "713a08.7s", 0x000000, 0x080000, CRC(6a72a825) SHA1(abeac99c5343efacabcb0cdff6d34f9f967024db) ) - ROM_REGION(0x1000000, "rfsnd", 0) /* PCM sample roms */ + ROM_REGION(0x1000000, "rfsnd", 0) /* PCM sample roms */ ROM_LOAD( "713a09.16p", 0x000000, 0x400000, CRC(058f250a) SHA1(63b8e60004ec49009633e86b4992c00083def9a8) ) ROM_LOAD( "713a10.14p", 0x400000, 0x400000, CRC(27f9833e) SHA1(1540f00d2571ecb81b914c553682b67fca94bbbd) ) diff --git a/src/mame/drivers/nycaptor.c b/src/mame/drivers/nycaptor.c index c43b4bb8df8..d4f5a0fbe49 100644 --- a/src/mame/drivers/nycaptor.c +++ b/src/mame/drivers/nycaptor.c @@ -469,8 +469,8 @@ static ADDRESS_MAP_START( bronx_master_map, ADDRESS_SPACE_PROGRAM, 8 ) ADDRESS_MAP_END static ADDRESS_MAP_START( bronx_slave_map, ADDRESS_SPACE_PROGRAM, 8 ) - AM_RANGE(0x0000, 0x7fff) AM_ROM - AM_RANGE(0xc000, 0xcfff) AM_READ(nycaptor_videoram_r) AM_WRITE(nycaptor_videoram_w) AM_BASE_GENERIC(videoram) AM_SIZE_GENERIC(videoram) + AM_RANGE(0x0000, 0x7fff) AM_ROM + AM_RANGE(0xc000, 0xcfff) AM_READ(nycaptor_videoram_r) AM_WRITE(nycaptor_videoram_w) AM_BASE_GENERIC(videoram) AM_SIZE_GENERIC(videoram) AM_RANGE(0xd800, 0xd800) AM_READ_PORT("DSW0") AM_RANGE(0xd801, 0xd801) AM_READ_PORT("DSW1") AM_RANGE(0xd802, 0xd802) AM_READ_PORT("DSW2") @@ -485,11 +485,11 @@ static ADDRESS_MAP_START( bronx_slave_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0xdf01, 0xdf01) AM_READ(nycaptor_by_r) AM_RANGE(0xdf02, 0xdf02) AM_READ(nycaptor_b_r) AM_RANGE(0xdf03, 0xdf03) AM_READ(nycaptor_gfxctrl_r) AM_WRITE(nycaptor_gfxctrl_w) - AM_RANGE(0xe000, 0xffff) AM_READ(nycaptor_sharedram_r) AM_WRITE(nycaptor_sharedram_w) + AM_RANGE(0xe000, 0xffff) AM_READ(nycaptor_sharedram_r) AM_WRITE(nycaptor_sharedram_w) ADDRESS_MAP_END static ADDRESS_MAP_START( bronx_slave_io_map, ADDRESS_SPACE_IO, 8 ) - AM_RANGE(0x0000, 0x7fff) AM_ROM AM_REGION("user1", 0) + AM_RANGE(0x0000, 0x7fff) AM_ROM AM_REGION("user1", 0) ADDRESS_MAP_END @@ -499,42 +499,42 @@ static INPUT_PORTS_START( cyclshtg ) PORT_START("DSW0") PORT_DIPNAME( 0x04, 0x04, "Test Mode" ) PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) ) - PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) ) - PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) ) - PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) ) - PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) ) + PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) ) + PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) ) + PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) ) + PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) ) - PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) ) - PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) ) - PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) ) - PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) ) - PORT_DIPSETTING( 0x80, DEF_STR( 1C_2C ) ) + PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) ) + PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) ) + PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) ) + PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) ) + PORT_DIPSETTING( 0x80, DEF_STR( 1C_2C ) ) - PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x08, DEF_STR( On ) ) + PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) ) + PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x08, DEF_STR( On ) ) - PORT_START("DSW1") + PORT_START("DSW1") PORT_START("DSW2") - PORT_START("IN0") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 ) + PORT_START("IN0") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 )//? PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 ) - PORT_DIPNAME( 0x08, 0x08, DEF_STR( Tilt ) ) - PORT_DIPSETTING( 0x08, DEF_STR( No ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Yes ) ) - PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_COIN1 ) + PORT_DIPNAME( 0x08, 0x08, DEF_STR( Tilt ) ) + PORT_DIPSETTING( 0x08, DEF_STR( No ) ) + PORT_DIPSETTING( 0x00, DEF_STR( Yes ) ) + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_START("IN1") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) + PORT_START("IN1") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_START("LIGHTX") PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_Y ) PORT_CROSSHAIR(X, 1.0, 0.0, 0) PORT_SENSITIVITY(25) PORT_KEYDELTA(15) PORT_PLAYER(1) @@ -547,88 +547,88 @@ INPUT_PORTS_END static INPUT_PORTS_START( nycaptor ) PORT_START("DSW0") PORT_DIPNAME( 0x03, 0x03, DEF_STR( Bonus_Life ) ) - PORT_DIPSETTING( 0x02, "20k, 80k then every 80k" ) - PORT_DIPSETTING( 0x03, "50k, 150k then every 200k" ) - PORT_DIPSETTING( 0x01, "100k, 300k then every 300k" ) - PORT_DIPSETTING( 0x00, "150k, 300k then every 300k" ) + PORT_DIPSETTING( 0x02, "20k, 80k then every 80k" ) + PORT_DIPSETTING( 0x03, "50k, 150k then every 200k" ) + PORT_DIPSETTING( 0x01, "100k, 300k then every 300k" ) + PORT_DIPSETTING( 0x00, "150k, 300k then every 300k" ) PORT_DIPNAME( 0x04, 0x04, "Infinite Bullets (Cheat)") - PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_DIPNAME( 0x18, 0x18, DEF_STR( Lives ) ) - PORT_DIPSETTING( 0x08, "1" ) - PORT_DIPSETTING( 0x00, "2" ) - PORT_DIPSETTING( 0x18, "3" ) - PORT_DIPSETTING( 0x10, "5" ) + PORT_DIPSETTING( 0x08, "1" ) + PORT_DIPSETTING( 0x00, "2" ) + PORT_DIPSETTING( 0x18, "3" ) + PORT_DIPSETTING( 0x10, "5" ) PORT_DIPNAME( 0x20, 0x20, DEF_STR( Free_Play ) ) - PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_DIPNAME( 0x40, 0x00, DEF_STR( Allow_Continue ) ) - PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_DIPNAME( 0x80, 0x80, DEF_STR( Demo_Sounds ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x80, DEF_STR( On ) ) + PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x80, DEF_STR( On ) ) PORT_START("DSW1") PORT_DIPNAME( 0x0f, 0x00, DEF_STR( Coin_A ) ) - PORT_DIPSETTING( 0x0f, DEF_STR( 9C_1C ) ) - PORT_DIPSETTING( 0x0e, DEF_STR( 8C_1C ) ) - PORT_DIPSETTING( 0x0d, DEF_STR( 7C_1C ) ) - PORT_DIPSETTING( 0x0c, DEF_STR( 6C_1C ) ) - PORT_DIPSETTING( 0x0b, DEF_STR( 5C_1C ) ) - PORT_DIPSETTING( 0x0a, DEF_STR( 4C_1C ) ) - PORT_DIPSETTING( 0x09, DEF_STR( 3C_1C ) ) - PORT_DIPSETTING( 0x08, DEF_STR( 2C_1C ) ) - PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) - PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) ) - PORT_DIPSETTING( 0x02, DEF_STR( 1C_3C ) ) - PORT_DIPSETTING( 0x03, DEF_STR( 1C_4C ) ) - PORT_DIPSETTING( 0x04, DEF_STR( 1C_5C ) ) - PORT_DIPSETTING( 0x05, DEF_STR( 1C_6C ) ) - PORT_DIPSETTING( 0x06, DEF_STR( 1C_7C ) ) - PORT_DIPSETTING( 0x07, DEF_STR( 1C_8C ) ) + PORT_DIPSETTING( 0x0f, DEF_STR( 9C_1C ) ) + PORT_DIPSETTING( 0x0e, DEF_STR( 8C_1C ) ) + PORT_DIPSETTING( 0x0d, DEF_STR( 7C_1C ) ) + PORT_DIPSETTING( 0x0c, DEF_STR( 6C_1C ) ) + PORT_DIPSETTING( 0x0b, DEF_STR( 5C_1C ) ) + PORT_DIPSETTING( 0x0a, DEF_STR( 4C_1C ) ) + PORT_DIPSETTING( 0x09, DEF_STR( 3C_1C ) ) + PORT_DIPSETTING( 0x08, DEF_STR( 2C_1C ) ) + PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) + PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) ) + PORT_DIPSETTING( 0x02, DEF_STR( 1C_3C ) ) + PORT_DIPSETTING( 0x03, DEF_STR( 1C_4C ) ) + PORT_DIPSETTING( 0x04, DEF_STR( 1C_5C ) ) + PORT_DIPSETTING( 0x05, DEF_STR( 1C_6C ) ) + PORT_DIPSETTING( 0x06, DEF_STR( 1C_7C ) ) + PORT_DIPSETTING( 0x07, DEF_STR( 1C_8C ) ) PORT_DIPNAME( 0xf0, 0x00, DEF_STR( Coin_B ) ) - PORT_DIPSETTING( 0xf0, DEF_STR( 9C_1C ) ) - PORT_DIPSETTING( 0xe0, DEF_STR( 8C_1C ) ) - PORT_DIPSETTING( 0xd0, DEF_STR( 7C_1C ) ) - PORT_DIPSETTING( 0xc0, DEF_STR( 6C_1C ) ) - PORT_DIPSETTING( 0xb0, DEF_STR( 5C_1C ) ) - PORT_DIPSETTING( 0xa0, DEF_STR( 4C_1C ) ) - PORT_DIPSETTING( 0x90, DEF_STR( 3C_1C ) ) - PORT_DIPSETTING( 0x80, DEF_STR( 2C_1C ) ) - PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) - PORT_DIPSETTING( 0x10, DEF_STR( 1C_2C ) ) - PORT_DIPSETTING( 0x20, DEF_STR( 1C_3C ) ) - PORT_DIPSETTING( 0x30, DEF_STR( 1C_4C ) ) - PORT_DIPSETTING( 0x40, DEF_STR( 1C_5C ) ) - PORT_DIPSETTING( 0x50, DEF_STR( 1C_6C ) ) - PORT_DIPSETTING( 0x60, DEF_STR( 1C_7C ) ) - PORT_DIPSETTING( 0x70, DEF_STR( 1C_8C ) ) + PORT_DIPSETTING( 0xf0, DEF_STR( 9C_1C ) ) + PORT_DIPSETTING( 0xe0, DEF_STR( 8C_1C ) ) + PORT_DIPSETTING( 0xd0, DEF_STR( 7C_1C ) ) + PORT_DIPSETTING( 0xc0, DEF_STR( 6C_1C ) ) + PORT_DIPSETTING( 0xb0, DEF_STR( 5C_1C ) ) + PORT_DIPSETTING( 0xa0, DEF_STR( 4C_1C ) ) + PORT_DIPSETTING( 0x90, DEF_STR( 3C_1C ) ) + PORT_DIPSETTING( 0x80, DEF_STR( 2C_1C ) ) + PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) + PORT_DIPSETTING( 0x10, DEF_STR( 1C_2C ) ) + PORT_DIPSETTING( 0x20, DEF_STR( 1C_3C ) ) + PORT_DIPSETTING( 0x30, DEF_STR( 1C_4C ) ) + PORT_DIPSETTING( 0x40, DEF_STR( 1C_5C ) ) + PORT_DIPSETTING( 0x50, DEF_STR( 1C_6C ) ) + PORT_DIPSETTING( 0x60, DEF_STR( 1C_7C ) ) + PORT_DIPSETTING( 0x70, DEF_STR( 1C_8C ) ) PORT_START("DSW2") PORT_DIPNAME( 0x01, 0x01, "Freeze" ) - PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_DIPNAME( 0x02, 0x02, "Training Spot" ) - PORT_DIPSETTING( 0x00, DEF_STR( No ) ) - PORT_DIPSETTING( 0x02, DEF_STR( Yes ) ) + PORT_DIPSETTING( 0x00, DEF_STR( No ) ) + PORT_DIPSETTING( 0x02, DEF_STR( Yes ) ) PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Difficulty ) ) - PORT_DIPSETTING( 0x0c, DEF_STR( Easy ) ) - PORT_DIPSETTING( 0x04, DEF_STR( Normal ) ) - PORT_DIPSETTING( 0x08, DEF_STR( Hard ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) ) + PORT_DIPSETTING( 0x0c, DEF_STR( Easy ) ) + PORT_DIPSETTING( 0x04, DEF_STR( Normal ) ) + PORT_DIPSETTING( 0x08, DEF_STR( Hard ) ) + PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) ) PORT_DIPNAME( 0x10, 0x10, "Coinage Display" ) - PORT_DIPSETTING( 0x00, DEF_STR( No ) ) - PORT_DIPSETTING( 0x10, DEF_STR( Yes ) ) + PORT_DIPSETTING( 0x00, DEF_STR( No ) ) + PORT_DIPSETTING( 0x10, DEF_STR( Yes ) ) PORT_DIPNAME( 0x20, 0x20, "Reset Damage" ) - PORT_DIPSETTING( 0x20, "Every Stage" ) - PORT_DIPSETTING( 0x00, "Every 4 Stages" ) + PORT_DIPSETTING( 0x20, "Every Stage" ) + PORT_DIPSETTING( 0x00, "Every 4 Stages" ) PORT_DIPNAME( 0x40, 0x40, "No Hit (Cheat)") - PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_DIPNAME( 0x80, 0x80, "Coin Slots" ) - PORT_DIPSETTING( 0x00, "1" ) - PORT_DIPSETTING( 0x80, "2" ) + PORT_DIPSETTING( 0x00, "1" ) + PORT_DIPSETTING( 0x80, "2" ) PORT_START("IN0") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 ) @@ -1048,7 +1048,7 @@ ROM_START( bronx ) ROM_LOAD( "a80_11.u11", 0x00000, 0x4000, CRC(29e1293b) SHA1(106204ec46fae5d3b5e4a4d423bc0e886a637c61) ) ROM_LOAD( "a80_10.u10", 0x04000, 0x4000, CRC(345f576c) SHA1(fee5b2167bcd0fdc21c0a7b22ffdf7506a24baee) ) ROM_LOAD( "a80_09.u9", 0x08000, 0x4000, CRC(3ef06dff) SHA1(99bbd32ae89a6becac9e1bb8a34a834d81890444) ) - ROM_LOAD( "8.bin", 0x0c000, 0x4000, CRC(2b778d24) SHA1(caca7a18743a4bb657a7c5691d93de0ccb867003) ) + ROM_LOAD( "8.bin", 0x0c000, 0x4000, CRC(2b778d24) SHA1(caca7a18743a4bb657a7c5691d93de0ccb867003) ) ROM_LOAD( "a80_15.u39", 0x10000, 0x4000, CRC(2cefb47d) SHA1(3bef20c9c0c4f9237a327da3cbc9a7bbf63771ea) ) ROM_LOAD( "a80_14.u34", 0x14000, 0x4000, CRC(91642de8) SHA1(531974fc147d25e9feada89bc82d5df62ec9d446) ) diff --git a/src/mame/drivers/nyny.c b/src/mame/drivers/nyny.c index a2be17c4549..d2a1ce28327 100644 --- a/src/mame/drivers/nyny.c +++ b/src/mame/drivers/nyny.c @@ -306,9 +306,9 @@ static MC6845_UPDATE_ROW( update_row ) /* the memory is hooked up to the MA, RA lines this way */ offs_t offs = ((ma << 5) & 0x8000) | - ((ma << 3) & 0x1f00) | - ((ra << 5) & 0x00e0) | - ((ma << 0) & 0x001f); + ((ma << 3) & 0x1f00) | + ((ra << 5) & 0x00e0) | + ((ma << 0) & 0x001f); if (flipscreen) offs = offs ^ 0x9fff; diff --git a/src/mame/drivers/onetwo.c b/src/mame/drivers/onetwo.c index b372dea2126..f66856aa217 100644 --- a/src/mame/drivers/onetwo.c +++ b/src/mame/drivers/onetwo.c @@ -171,7 +171,7 @@ static INPUT_PORTS_START( onetwo ) PORT_DIPSETTING( 0x60, DEF_STR( 1C_5C ) ) PORT_DIPSETTING( 0x50, DEF_STR( 1C_6C ) ) PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) ) - PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) ) PORT_CONDITION("DSW2",0x04,PORTCOND_NOTEQUALS,0x04) PORT_DIPLOCATION("SW1:5,6") + PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) ) PORT_CONDITION("DSW2",0x04,PORTCOND_NOTEQUALS,0x04) PORT_DIPLOCATION("SW1:5,6") PORT_DIPSETTING( 0x00, DEF_STR( 5C_1C ) ) PORT_DIPSETTING( 0x10, DEF_STR( 3C_1C ) ) PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) ) diff --git a/src/mame/drivers/othunder.c b/src/mame/drivers/othunder.c index 73fa195bc1e..4ed720fd34b 100644 --- a/src/mame/drivers/othunder.c +++ b/src/mame/drivers/othunder.c @@ -308,7 +308,7 @@ static const eeprom_interface eeprom_intf = "0101", /* write command */ "0111", /* erase command */ "0100000000", /* lock command */ - "0100111111" /* unlock command */ + "0100111111" /* unlock command */ }; static WRITE16_HANDLER( othunder_tc0220ioc_w ) diff --git a/src/mame/drivers/overdriv.c b/src/mame/drivers/overdriv.c index 318c60ca06e..4e96b86b5ec 100644 --- a/src/mame/drivers/overdriv.c +++ b/src/mame/drivers/overdriv.c @@ -201,7 +201,7 @@ static ADDRESS_MAP_START( overdriv_slave_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x108000, 0x10800f) AM_NOP // K053250 #1 AM_RANGE(0x118000, 0x118fff) AM_DEVREADWRITE("k053246", k053247_word_r, k053247_word_w) AM_RANGE(0x120000, 0x120001) AM_DEVREAD("k053246", k053246_word_r) - AM_RANGE(0x128000, 0x128001) AM_READWRITE(cpuB_ctrl_r,cpuB_ctrl_w) /* enable K053247 ROM reading, plus something else */ + AM_RANGE(0x128000, 0x128001) AM_READWRITE(cpuB_ctrl_r,cpuB_ctrl_w) /* enable K053247 ROM reading, plus something else */ AM_RANGE(0x130000, 0x130007) AM_DEVWRITE("k053246", k053246_word_w) AM_RANGE(0x200000, 0x203fff) AM_RAM AM_SHARE("share1") AM_RANGE(0x208000, 0x20bfff) AM_RAM diff --git a/src/mame/drivers/pacman.c b/src/mame/drivers/pacman.c index 1c3ff07e191..efc1a0a49e8 100644 --- a/src/mame/drivers/pacman.c +++ b/src/mame/drivers/pacman.c @@ -527,7 +527,7 @@ static WRITE8_HANDLER( alibaba_sound_w ) { /* since the sound region in Ali Baba is not contiguous, translate the offset into the 0-0x1f range */ - if (offset < 0x10) + if (offset < 0x10) pacman_sound_w(devtag_get_device(space->machine, "namco"), offset, data); else if (offset < 0x20) space->machine->generic.spriteram2.u8[offset - 0x10] = data; @@ -1598,7 +1598,7 @@ static INPUT_PORTS_START( maketrax ) PORT_DIPNAME( 0x20, 0x20, "Teleport Holes" ) PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_BIT( 0xc0, IP_ACTIVE_HIGH, IPT_UNUSED ) /* Protection */ + PORT_BIT( 0xc0, IP_ACTIVE_HIGH, IPT_UNUSED ) /* Protection */ PORT_START("DSW2") PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_UNUSED ) @@ -1651,7 +1651,7 @@ static INPUT_PORTS_START( korosuke ) PORT_DIPNAME( 0x20, 0x20, "Teleport Holes" ) PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_BIT( 0xc0, IP_ACTIVE_HIGH, IPT_UNUSED ) /* Protection */ + PORT_BIT( 0xc0, IP_ACTIVE_HIGH, IPT_UNUSED ) /* Protection */ PORT_START("DSW2") PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_UNUSED ) @@ -3121,13 +3121,13 @@ static const gfx_layout crush4_spritelayout = { 16,16, /* 16*16 sprites */ RGN_FRAC(1,4), - 2, /* 2 bits per pixel */ + 2, /* 2 bits per pixel */ { RGN_FRAC(1,2), RGN_FRAC(0,2)+4 }, { 8*8, 8*8+1, 8*8+2, 8*8+3, 16*8+0, 16*8+1, 16*8+2, 16*8+3, 24*8+0, 24*8+1, 24*8+2, 24*8+3, 0, 1, 2, 3 }, { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8, 32*8, 33*8, 34*8, 35*8, 36*8, 37*8, 38*8, 39*8 }, - 64*8 /* every sprite takes 64 bytes */ + 64*8 /* every sprite takes 64 bytes */ }; @@ -3664,8 +3664,8 @@ ROM_START( hangly3 ) ROM_REGION( 0x2000, "gfx1", 0 ) ROM_LOAD( "hm9.5e", 0x0000, 0x0800, CRC(5f4be3cc) SHA1(eeb0e1e44549b99eab481d9ac016b4359e19fe30) ) ROM_LOAD( "hm11.5h", 0x0800, 0x0800, CRC(3591b89d) SHA1(79bb456be6c39c1ccd7d077fbe181523131fb300) ) - ROM_LOAD( "hm10.5f", 0x1000, 0x0800, CRC(9e39323a) SHA1(be933e691df4dbe7d12123913c3b7b7b585b7a35) ) - ROM_LOAD( "hm12.5j", 0x1800, 0x0800, CRC(1b1d9096) SHA1(53771c573051db43e7185b1d188533056290a620) ) + ROM_LOAD( "hm10.5f", 0x1000, 0x0800, CRC(9e39323a) SHA1(be933e691df4dbe7d12123913c3b7b7b585b7a35) ) + ROM_LOAD( "hm12.5j", 0x1800, 0x0800, CRC(1b1d9096) SHA1(53771c573051db43e7185b1d188533056290a620) ) ROM_REGION( 0x0120, "proms", 0 ) ROM_LOAD( "82s123.7f", 0x0000, 0x0020, CRC(2fc650bd) SHA1(8d0268dee78e47c712202b0ec4f1f51109b1f2a5) ) @@ -3688,10 +3688,10 @@ ROM_START( popeyeman ) ROM_LOAD( "8.6p", 0x3800, 0x0800, CRC(931770d7) SHA1(78fcf88e07ec5126c12c3297b62ca388809e947c) ) ROM_REGION( 0x2000, "gfx1", 0 ) - ROM_LOAD( "9.5e", 0x0000, 0x0800, CRC(b569c4c1) SHA1(34a09bcb6eb08375cd5e9ce0aa66b23d60489f92) ) + ROM_LOAD( "9.5e", 0x0000, 0x0800, CRC(b569c4c1) SHA1(34a09bcb6eb08375cd5e9ce0aa66b23d60489f92) ) ROM_LOAD( "11.5h", 0x0800, 0x0800, CRC(3591b89d) SHA1(79bb456be6c39c1ccd7d077fbe181523131fb300) ) - ROM_LOAD( "10.5f", 0x1000, 0x0800, CRC(014fb5a4) SHA1(7779f0f0d11027adf3b9175af26d53f1e3a54f29) ) - ROM_LOAD( "12.5j", 0x1800, 0x0800, CRC(21b91c64) SHA1(4818194ecc18b5df159f3799ea93c911fd4b9556) ) + ROM_LOAD( "10.5f", 0x1000, 0x0800, CRC(014fb5a4) SHA1(7779f0f0d11027adf3b9175af26d53f1e3a54f29) ) + ROM_LOAD( "12.5j", 0x1800, 0x0800, CRC(21b91c64) SHA1(4818194ecc18b5df159f3799ea93c911fd4b9556) ) ROM_REGION( 0x0120, "proms", 0 ) ROM_LOAD( "82s123.7f", 0x0000, 0x0020, CRC(2fc650bd) SHA1(8d0268dee78e47c712202b0ec4f1f51109b1f2a5) ) @@ -4575,7 +4575,7 @@ ROM_START( gorkans ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "gorkans8.rom", 0x0000, 0x0800, CRC(55100b18) SHA1(8f657c1b2865987b60d95960c5297a82bb1cc6e0) ) ROM_LOAD( "gorkans4.rom", 0x0800, 0x0800, CRC(b5c604bf) SHA1(0f3608d630fba9d4734a3ef30199a5d1a067cdff) ) - ROM_LOAD( "gorkans7.rom", 0x1000, 0x0800, CRC(b8c6def4) SHA1(58ac78fc5b3559ef771ca708a79089b7a00cf6b8) ) + ROM_LOAD( "gorkans7.rom", 0x1000, 0x0800, CRC(b8c6def4) SHA1(58ac78fc5b3559ef771ca708a79089b7a00cf6b8) ) ROM_LOAD( "gorkans3.rom", 0x1800, 0x0800, CRC(4602c840) SHA1(c77de0e991c44c2ee8a4537e264ac8fbb1b4b7db) ) ROM_LOAD( "gorkans6.rom", 0x2000, 0x0800, CRC(21412a62) SHA1(ece44c3204cf182db23b594ebdc051b51340ba2b) ) ROM_LOAD( "gorkans2.rom", 0x2800, 0x0800, CRC(a013310b) SHA1(847ba7ca033eaf49245bef49d6513619edec3472) ) @@ -5299,7 +5299,7 @@ ROM_START( cannonbp ) ROM_LOAD( "n1-6e", 0x0000, 0x0800, CRC(c68878c7) SHA1(4ab69f820e861a33fa7555286459e5953c126d33) ) ROM_LOAD( "n2-6k", 0x0800, 0x0800, CRC(ff3951a5) SHA1(8c06526903f2ce3e0ac29ba0138e8c270732150a) ) ROM_LOAD( "n3-6f", 0x1000, 0x0800, CRC(2329079d) SHA1(461d1258a03ea35ba33f4094c05f8ffda8cdfc47) ) - ROM_LOAD( "n4-6m", 0x1800, 0x0800, CRC(fcc57ecb) SHA1(9efafbb7f3d44652aded860e734332f47354e299) ) + ROM_LOAD( "n4-6m", 0x1800, 0x0800, CRC(fcc57ecb) SHA1(9efafbb7f3d44652aded860e734332f47354e299) ) ROM_LOAD( "n5-6h", 0x2000, 0x0800, CRC(52846c9d) SHA1(4a479ff8961c8865aea12976355d0201a8cb1b48) ) ROM_LOAD( "n6-6n", 0x2800, 0x0800, CRC(59e890dd) SHA1(c148b71d71fb49a138ef1afe771be70bec21ad2b) ) /* 3000 - 3fff = epoxy protection block */ diff --git a/src/mame/drivers/pandoras.c b/src/mame/drivers/pandoras.c index 999b899d9f3..e6f08492798 100644 --- a/src/mame/drivers/pandoras.c +++ b/src/mame/drivers/pandoras.c @@ -135,7 +135,7 @@ static WRITE8_HANDLER( pandoras_z80_irqtrigger_w ) static ADDRESS_MAP_START( pandoras_master_map, ADDRESS_SPACE_PROGRAM, 8 ) - AM_RANGE(0x0000, 0x0fff) AM_RAM AM_SHARE("share1") AM_BASE_MEMBER(pandoras_state, spriteram) /* Work RAM (Shared with CPU B) */ + AM_RANGE(0x0000, 0x0fff) AM_RAM AM_SHARE("share1") AM_BASE_MEMBER(pandoras_state, spriteram) /* Work RAM (Shared with CPU B) */ AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(pandoras_cram_w) AM_SHARE("share2") AM_BASE_MEMBER(pandoras_state, colorram) /* Color RAM (shared with CPU B) */ AM_RANGE(0x1400, 0x17ff) AM_RAM_WRITE(pandoras_vram_w) AM_SHARE("share3") AM_BASE_MEMBER(pandoras_state, videoram) /* Video RAM (shared with CPU B) */ AM_RANGE(0x1800, 0x1807) AM_WRITE(pandoras_int_control_w) /* INT control */ @@ -145,14 +145,14 @@ static ADDRESS_MAP_START( pandoras_master_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x2000, 0x2000) AM_WRITE(pandoras_cpub_irqtrigger_w) /* cause FIRQ on CPU B */ AM_RANGE(0x2001, 0x2001) AM_WRITE(watchdog_reset_w) /* watchdog reset */ AM_RANGE(0x4000, 0x5fff) AM_ROM /* space for diagnostic ROM */ - AM_RANGE(0x6000, 0x67ff) AM_RAM AM_SHARE("share4") /* Shared RAM with CPU B */ + AM_RANGE(0x6000, 0x67ff) AM_RAM AM_SHARE("share4") /* Shared RAM with CPU B */ AM_RANGE(0x8000, 0xffff) AM_ROM /* ROM */ ADDRESS_MAP_END static ADDRESS_MAP_START( pandoras_slave_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x0000, 0x0fff) AM_RAM AM_SHARE("share1") /* Work RAM (Shared with CPU A) */ - AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(pandoras_cram_w) AM_SHARE("share2") /* Color RAM (shared with CPU A) */ - AM_RANGE(0x1400, 0x17ff) AM_RAM_WRITE(pandoras_vram_w) AM_SHARE("share3") /* Video RAM (shared with CPU A) */ + AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(pandoras_cram_w) AM_SHARE("share2") /* Color RAM (shared with CPU A) */ + AM_RANGE(0x1400, 0x17ff) AM_RAM_WRITE(pandoras_vram_w) AM_SHARE("share3") /* Video RAM (shared with CPU A) */ AM_RANGE(0x1800, 0x1800) AM_READ_PORT("DSW1") AM_RANGE(0x1800, 0x1807) AM_WRITE(pandoras_int_control_w) /* INT control */ AM_RANGE(0x1a00, 0x1a00) AM_READ_PORT("SYSTEM") diff --git a/src/mame/drivers/pangofun.c b/src/mame/drivers/pangofun.c index 5e8f808c395..3277b473469 100644 --- a/src/mame/drivers/pangofun.c +++ b/src/mame/drivers/pangofun.c @@ -115,7 +115,7 @@ static MACHINE_DRIVER_START( pangofun ) MDRV_CPU_ADD("maincpu", I486, 14318180*2) /* I486 ?? Mhz */ MDRV_CPU_PROGRAM_MAP(pangofun_map) - /* video hardware */ + /* video hardware */ MDRV_SCREEN_ADD("screen", RASTER) MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16) MDRV_SCREEN_REFRESH_RATE(60) diff --git a/src/mame/drivers/panicr.c b/src/mame/drivers/panicr.c index d9d5c191208..6da7617c706 100644 --- a/src/mame/drivers/panicr.c +++ b/src/mame/drivers/panicr.c @@ -289,7 +289,7 @@ static INPUT_PORTS_START( panicr ) PORT_START("DSW2") PORT_DIPNAME( 0x01, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:8") - PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_DIPNAME( 0x06, 0x04, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:7,6") PORT_DIPSETTING( 0x06, DEF_STR( Easy ) ) diff --git a/src/mame/drivers/pastelg.c b/src/mame/drivers/pastelg.c index 950901ebcce..483a2b2d6c2 100644 --- a/src/mame/drivers/pastelg.c +++ b/src/mame/drivers/pastelg.c @@ -316,7 +316,7 @@ static INPUT_PORTS_START( threeds ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_BET ) PORT_NAME("1P Bet") PORT_CODE(KEYCODE_S) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("1P Hold 5") PORT_CODE(KEYCODE_B) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("1P Hold 3") PORT_CODE(KEYCODE_C) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("1P Hold 1") PORT_CODE(KEYCODE_Z) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("1P Hold 1") PORT_CODE(KEYCODE_Z) PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_START("KEY2_PL1") @@ -352,7 +352,7 @@ static INPUT_PORTS_START( threeds ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_BET ) PORT_NAME("2P Bet") PORT_PLAYER(2) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("2P Hold 5") PORT_PLAYER(2) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("2P Hold 3") PORT_PLAYER(2) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("2P Hold 1") PORT_PLAYER(2) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("2P Hold 1") PORT_PLAYER(2) PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_START("KEY2_PL2") diff --git a/src/mame/drivers/pcat_dyn.c b/src/mame/drivers/pcat_dyn.c index 2b4f472b7a5..71b0074c18e 100644 --- a/src/mame/drivers/pcat_dyn.c +++ b/src/mame/drivers/pcat_dyn.c @@ -419,7 +419,7 @@ static INPUT_PORTS_START( pcat_dyn ) AT_KEYB_HELPER( 0x0200, "(MF2)Cursor Right", KEYCODE_RIGHT ) /* Right 6a ea */ AT_KEYB_HELPER( 0x0800, "(MF2)Cursor Down", KEYCODE_DOWN ) /* Down 6c ec */ AT_KEYB_HELPER( 0x1000, "(MF2)Page Down", KEYCODE_PGDN ) /* Page Down 6d ed */ - AT_KEYB_HELPER( 0x4000, "Del", KEYCODE_A ) /* Delete 6f ef */ + AT_KEYB_HELPER( 0x4000, "Del", KEYCODE_A ) /* Delete 6f ef */ PORT_START("pc_keyboard_7") INPUT_PORTS_END @@ -514,7 +514,7 @@ static MACHINE_DRIVER_START( pcat_dyn ) MDRV_CPU_PROGRAM_MAP(pcat_map) MDRV_CPU_IO_MAP(pcat_io) - /* video hardware */ + /* video hardware */ MDRV_SCREEN_ADD("screen", RASTER) MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32) MDRV_SCREEN_REFRESH_RATE(60) diff --git a/src/mame/drivers/pcat_nit.c b/src/mame/drivers/pcat_nit.c index 4bcd21395b4..8a2414835f1 100644 --- a/src/mame/drivers/pcat_nit.c +++ b/src/mame/drivers/pcat_nit.c @@ -479,7 +479,7 @@ static INPUT_PORTS_START( pcat_nit ) AT_KEYB_HELPER( 0x0200, "(MF2)Cursor Right", KEYCODE_RIGHT ) /* Right 6a ea */ AT_KEYB_HELPER( 0x0800, "(MF2)Cursor Down", KEYCODE_DOWN ) /* Down 6c ec */ AT_KEYB_HELPER( 0x1000, "(MF2)Page Down", KEYCODE_PGDN ) /* Page Down 6d ed */ - AT_KEYB_HELPER( 0x4000, "Del", KEYCODE_A ) /* Delete 6f ef */ + AT_KEYB_HELPER( 0x4000, "Del", KEYCODE_A ) /* Delete 6f ef */ PORT_START("pc_keyboard_7") INPUT_PORTS_END @@ -579,7 +579,7 @@ static MACHINE_DRIVER_START( pcat_nit ) MDRV_CPU_PROGRAM_MAP(pcat_map) MDRV_CPU_IO_MAP(pcat_io) - /* video hardware */ + /* video hardware */ MDRV_SCREEN_ADD("screen", RASTER) MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32) MDRV_SCREEN_REFRESH_RATE(60) diff --git a/src/mame/drivers/pcktgal.c b/src/mame/drivers/pcktgal.c index 9fdf309d863..450737e5295 100644 --- a/src/mame/drivers/pcktgal.c +++ b/src/mame/drivers/pcktgal.c @@ -135,16 +135,16 @@ static INPUT_PORTS_START( pcktgal ) PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) ) PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) ) PORT_DIPSETTING( 0x01, DEF_STR( 1C_3C ) ) - PORT_DIPNAME( 0x04, 0x04, DEF_STR( Flip_Screen ) ) + PORT_DIPNAME( 0x04, 0x04, DEF_STR( Flip_Screen ) ) PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x08, "Allow 2 Players Game" ) + PORT_DIPNAME( 0x08, 0x08, "Allow 2 Players Game" ) PORT_DIPSETTING( 0x00, DEF_STR( No ) ) PORT_DIPSETTING( 0x08, DEF_STR( Yes ) ) - PORT_DIPNAME( 0x10, 0x10, DEF_STR( Demo_Sounds ) ) + PORT_DIPNAME( 0x10, 0x10, DEF_STR( Demo_Sounds ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPSETTING( 0x10, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x20, "Time" ) + PORT_DIPNAME( 0x20, 0x20, "Time" ) PORT_DIPSETTING( 0x00, "100" ) PORT_DIPSETTING( 0x20, "120" ) PORT_DIPNAME( 0x40, 0x00, DEF_STR( Lives ) ) diff --git a/src/mame/drivers/pcxt.c b/src/mame/drivers/pcxt.c index 37e31c08622..ba206648e15 100644 --- a/src/mame/drivers/pcxt.c +++ b/src/mame/drivers/pcxt.c @@ -487,9 +487,9 @@ static const ppi8255_interface filetto_ppi8255_intf[2] = { DEVCB_HANDLER(port_a_r), /* Port A read */ DEVCB_HANDLER(port_b_r), /* Port B read */ - DEVCB_HANDLER(port_c_r), /* Port C read */ - DEVCB_NULL, /* Port A write */ - DEVCB_HANDLER(port_b_w), /* Port B write */ + DEVCB_HANDLER(port_c_r), /* Port C read */ + DEVCB_NULL, /* Port A write */ + DEVCB_HANDLER(port_b_w), /* Port B write */ DEVCB_NULL /* Port C write */ }, { @@ -720,7 +720,7 @@ static ADDRESS_MAP_START( tetriskr_io, ADDRESS_SPACE_IO, 8 ) AM_RANGE(0x0070, 0x007f) AM_READWRITE(mc146818_port_r,mc146818_port_w) AM_RANGE(0x0080, 0x0087) AM_READWRITE(dma_page_select_r,dma_page_select_w) AM_RANGE(0x00a0, 0x00af) AM_DEVREADWRITE("pic8259_2", pic8259_r, pic8259_w ) - AM_RANGE(0x0200, 0x020f) AM_RAM //game port + AM_RANGE(0x0200, 0x020f) AM_RAM //game port // AM_RANGE(0x0201, 0x0201) AM_READ_PORT("IN1") //game port AM_RANGE(0x0278, 0x027f) AM_RAM //printer (parallel) port latch AM_RANGE(0x02f8, 0x02ff) AM_RAM //Modem port diff --git a/src/mame/drivers/peplus.c b/src/mame/drivers/peplus.c index b630af46c27..05fe50ccd2a 100644 --- a/src/mame/drivers/peplus.c +++ b/src/mame/drivers/peplus.c @@ -173,7 +173,7 @@ Stephh's log (2007.11.28) : #include "pe_keno.lh" #include "pe_slots.lh" -#define MASTER_CLOCK XTAL_20MHz +#define MASTER_CLOCK XTAL_20MHz #define CPU_CLOCK ((MASTER_CLOCK)/2) /* divided by 2 - 7474 */ #define MC6845_CLOCK ((MASTER_CLOCK)/8/3) #define SOUND_CLOCK ((MASTER_CLOCK)/12) diff --git a/src/mame/drivers/pgm.c b/src/mame/drivers/pgm.c index 5c0003c89e0..1bb1f46e291 100644 --- a/src/mame/drivers/pgm.c +++ b/src/mame/drivers/pgm.c @@ -3728,8 +3728,8 @@ static void kovsh_latch_init( running_machine *machine ) static DRIVER_INIT( kov ) { pgm_basic_init(machine); - pgm_kov_decrypt(machine); - kovsh_latch_init(machine); + pgm_kov_decrypt(machine); + kovsh_latch_init(machine); } static DRIVER_INIT( pstar ) @@ -3738,7 +3738,7 @@ static DRIVER_INIT( pstar ) pgm_basic_init(machine); pgm_pstar_decrypt(machine); - kovsh_latch_init(machine); + kovsh_latch_init(machine); state->pstars_key = 0; state->pstars_int[0] = 0; @@ -3766,28 +3766,28 @@ static DRIVER_INIT( djlzz ) { pgm_basic_init(machine); pgm_djlzz_decrypt(machine); - kovsh_latch_init(machine); + kovsh_latch_init(machine); } static DRIVER_INIT( kovsh ) { pgm_basic_init(machine); pgm_kovsh_decrypt(machine); - kovsh_latch_init(machine); + kovsh_latch_init(machine); } static DRIVER_INIT( kovshp ) { pgm_basic_init(machine); pgm_kovshp_decrypt(machine); - kovsh_latch_init(machine); + kovsh_latch_init(machine); } static DRIVER_INIT( oldsplus ) { pgm_basic_init(machine); pgm_oldsplus_decrypt(machine); - kovsh_latch_init(machine); + kovsh_latch_init(machine); } static void kov2_latch_init( running_machine *machine ) @@ -3805,28 +3805,28 @@ static DRIVER_INIT( kov2 ) { pgm_basic_init(machine); pgm_kov2_decrypt(machine); - kov2_latch_init(machine); + kov2_latch_init(machine); } static DRIVER_INIT( kov2p ) { pgm_basic_init(machine); pgm_kov2p_decrypt(machine); - kov2_latch_init(machine); + kov2_latch_init(machine); } static DRIVER_INIT( martmast ) { pgm_basic_init(machine); pgm_mm_decrypt(machine); - kov2_latch_init(machine); + kov2_latch_init(machine); } static DRIVER_INIT( ddp2 ) { pgm_basic_init(machine); pgm_ddp2_decrypt(machine); - kov2_latch_init(machine); + kov2_latch_init(machine); } static void svg_basic_init(running_machine *machine) @@ -3847,28 +3847,28 @@ static DRIVER_INIT( theglad ) { svg_basic_init(machine); pgm_theglad_decrypt(machine); - kov2_latch_init(machine); + kov2_latch_init(machine); } static DRIVER_INIT( svg ) { svg_basic_init(machine); pgm_svg_decrypt(machine); - kov2_latch_init(machine); + kov2_latch_init(machine); } static DRIVER_INIT( killbldp ) { svg_basic_init(machine); pgm_killbldp_decrypt(machine); - kov2_latch_init(machine); + kov2_latch_init(machine); } static DRIVER_INIT( dmnfrnt ) { svg_basic_init(machine); pgm_dfront_decrypt(machine); - kov2_latch_init(machine); + kov2_latch_init(machine); } static DRIVER_INIT( dw3 ) @@ -3877,7 +3877,7 @@ static DRIVER_INIT( dw3 ) // memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xda0000, 0xdaffff, 0, 0, dw3_prot_r, dw3_prot_w); - pgm_dw3_decrypt(machine); + pgm_dw3_decrypt(machine); } /* Killing Blade uses some kind of DMA protection device which can copy data from a data rom. The @@ -4091,7 +4091,7 @@ static DRIVER_INIT( killbld ) UINT16 *mem16 = (UINT16 *)memory_region(machine, "maincpu"); pgm_basic_init(machine); - pgm_killbld_decrypt(machine); + pgm_killbld_decrypt(machine); /* this isn't a hack.. doing a rom dump while the game is running shows the rom space to look like this.. there may be more overlays / enables tho */ @@ -4137,7 +4137,7 @@ static DRIVER_INIT( puzzli2 ) UINT16 *mem16 = (UINT16 *)memory_region(machine, "maincpu"); pgm_basic_init(machine); - kovsh_latch_init(machine); + kovsh_latch_init(machine); memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x500000, 0x500003, 0, 0, asic28_r, asic28_w); @@ -4145,7 +4145,7 @@ static DRIVER_INIT( puzzli2 ) the protection device provides the region code */ memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4f0000, 0x4fffff, 0, 0, sango_protram_r); - pgm_puzzli2_decrypt(machine); + pgm_puzzli2_decrypt(machine); /* protection related? */ mem16[0x1548ec / 2] = 0x4e71; diff --git a/src/mame/drivers/phoenix.c b/src/mame/drivers/phoenix.c index 6643bd0bff9..2800fa7cce9 100644 --- a/src/mame/drivers/phoenix.c +++ b/src/mame/drivers/phoenix.c @@ -44,8 +44,8 @@ static ADDRESS_MAP_START( phoenix_memory_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x5800, 0x5bff) AM_WRITE(phoenix_scroll_w) AM_RANGE(0x6000, 0x63ff) AM_DEVWRITE("discrete", phoenix_sound_control_a_w) AM_RANGE(0x6800, 0x6bff) AM_DEVWRITE("discrete", phoenix_sound_control_b_w) - AM_RANGE(0x7000, 0x73ff) AM_READ_PORT("IN0") /* IN0 or IN1 */ - AM_RANGE(0x7800, 0x7bff) AM_READ_PORT("DSW0") /* DSW */ + AM_RANGE(0x7000, 0x73ff) AM_READ_PORT("IN0") /* IN0 or IN1 */ + AM_RANGE(0x7800, 0x7bff) AM_READ_PORT("DSW0") /* DSW */ ADDRESS_MAP_END static ADDRESS_MAP_START( pleiads_memory_map, ADDRESS_SPACE_PROGRAM, 8 ) @@ -55,8 +55,8 @@ static ADDRESS_MAP_START( pleiads_memory_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x5800, 0x5bff) AM_WRITE(phoenix_scroll_w) AM_RANGE(0x6000, 0x63ff) AM_WRITE(pleiads_sound_control_a_w) AM_RANGE(0x6800, 0x6bff) AM_WRITE(pleiads_sound_control_b_w) - AM_RANGE(0x7000, 0x73ff) AM_READ_PORT("IN0") /* IN0 or IN1 + protection */ - AM_RANGE(0x7800, 0x7bff) AM_READ_PORT("DSW0") /* DSW */ + AM_RANGE(0x7000, 0x73ff) AM_READ_PORT("IN0") /* IN0 or IN1 + protection */ + AM_RANGE(0x7800, 0x7bff) AM_READ_PORT("DSW0") /* DSW */ ADDRESS_MAP_END static ADDRESS_MAP_START( survival_memory_map, ADDRESS_SPACE_PROGRAM, 8 ) @@ -67,7 +67,7 @@ static ADDRESS_MAP_START( survival_memory_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x6800, 0x68ff) AM_DEVWRITE("aysnd", ay8910_address_w) AM_RANGE(0x6900, 0x69ff) AM_DEVREADWRITE("aysnd", ay8910_r, ay8910_data_w) AM_RANGE(0x7000, 0x73ff) AM_READ(survival_input_port_0_r) /* IN0 or IN1 */ - AM_RANGE(0x7800, 0x7bff) AM_READ_PORT("DSW0") /* DSW */ + AM_RANGE(0x7800, 0x7bff) AM_READ_PORT("DSW0") /* DSW */ ADDRESS_MAP_END diff --git a/src/mame/drivers/photoply.c b/src/mame/drivers/photoply.c index a212d210212..690e738cb0b 100644 --- a/src/mame/drivers/photoply.c +++ b/src/mame/drivers/photoply.c @@ -405,7 +405,7 @@ static INPUT_PORTS_START( photoply ) AT_KEYB_HELPER( 0x0200, "(MF2)Cursor Right", KEYCODE_RIGHT ) /* Right 6a ea */ AT_KEYB_HELPER( 0x0800, "(MF2)Cursor Down", KEYCODE_DOWN ) /* Down 6c ec */ AT_KEYB_HELPER( 0x1000, "(MF2)Page Down", KEYCODE_PGDN ) /* Page Down 6d ed */ - AT_KEYB_HELPER( 0x4000, "Del", KEYCODE_A ) /* Delete 6f ef */ + AT_KEYB_HELPER( 0x4000, "Del", KEYCODE_A ) /* Delete 6f ef */ PORT_START("pc_keyboard_7") INPUT_PORTS_END @@ -501,7 +501,7 @@ static MACHINE_DRIVER_START( photoply ) MDRV_CPU_PROGRAM_MAP(photoply_map) MDRV_CPU_IO_MAP(photoply_io) - /* video hardware */ + /* video hardware */ MDRV_SCREEN_ADD("screen", RASTER) MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16) MDRV_SCREEN_REFRESH_RATE(60) diff --git a/src/mame/drivers/pipeline.c b/src/mame/drivers/pipeline.c index 308c650ef0d..9308f66a5bc 100644 --- a/src/mame/drivers/pipeline.c +++ b/src/mame/drivers/pipeline.c @@ -186,8 +186,8 @@ static WRITE8_HANDLER(vram2_w) palram[offset]=data; if(offset<0x300) { - offset&=0xff; - palette_set_color_rgb(space->machine, offset, pal6bit(palram[offset]), pal6bit(palram[offset+0x100]), pal6bit(palram[offset+0x200])); + offset&=0xff; + palette_set_color_rgb(space->machine, offset, pal6bit(palram[offset]), pal6bit(palram[offset+0x100]), pal6bit(palram[offset+0x200])); } } } diff --git a/src/mame/drivers/pitnrun.c b/src/mame/drivers/pitnrun.c index 8ff0ceb1fbf..424fe0be536 100644 --- a/src/mame/drivers/pitnrun.c +++ b/src/mame/drivers/pitnrun.c @@ -110,7 +110,7 @@ static ADDRESS_MAP_START( pitnrun_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0xc802, 0xc802) AM_WRITENOP/* VP(VF?)MCV - not used ?*/ AM_RANGE(0xc804, 0xc804) AM_WRITE(pitnrun_mcu_data_w) AM_RANGE(0xc805, 0xc805) AM_WRITE(pitnrun_h_heed_w) - AM_RANGE(0xc806, 0xc806) AM_WRITE(pitnrun_v_heed_w) + AM_RANGE(0xc806, 0xc806) AM_WRITE(pitnrun_v_heed_w) AM_RANGE(0xc807, 0xc807) AM_WRITE(pitnrun_ha_w) AM_RANGE(0xd800, 0xd800) AM_READ(pitnrun_mcu_status_r) AM_RANGE(0xd000, 0xd000) AM_READ(pitnrun_mcu_data_r) diff --git a/src/mame/drivers/playch10.c b/src/mame/drivers/playch10.c index 5b1386e3278..8e0cd5b5601 100644 --- a/src/mame/drivers/playch10.c +++ b/src/mame/drivers/playch10.c @@ -818,7 +818,7 @@ ROM_START( pc_1942 ) /* 1942 */ BIOS_GFX ROM_REGION( 0x10000, "cart", 0 ) - ROM_LOAD( "u1", 0x08000, 0x8000, CRC(c4e8c04a) SHA1(d608f769333b13da9c67f07599e405944893a950) ) + ROM_LOAD( "u1", 0x08000, 0x8000, CRC(c4e8c04a) SHA1(d608f769333b13da9c67f07599e405944893a950) ) ROM_REGION( 0x02000, "gfx2", 0 ) /* cart gfx */ ROM_LOAD( "u2", 0x00000, 0x2000, CRC(03379b76) SHA1(d2a6ca1cdd8935525f59f1d38806b2296cb12a12) ) diff --git a/src/mame/drivers/plygonet.c b/src/mame/drivers/plygonet.c index d0f7746d559..906bb5edce7 100644 --- a/src/mame/drivers/plygonet.c +++ b/src/mame/drivers/plygonet.c @@ -311,7 +311,7 @@ static WRITE32_HANDLER( plygonet_palette_w ) COMBINE_DATA(&space->machine->generic.paletteram.u32[offset]); - r = (space->machine->generic.paletteram.u32[offset] >>16) & 0xff; + r = (space->machine->generic.paletteram.u32[offset] >>16) & 0xff; g = (space->machine->generic.paletteram.u32[offset] >> 8) & 0xff; b = (space->machine->generic.paletteram.u32[offset] >> 0) & 0xff; @@ -606,7 +606,7 @@ static const gfx_layout bglayout = 4, { 0, 1, 2, 3 }, { 0*64, 1*64, 2*64, 3*64, 4*64, 5*64, 6*64, 7*64, - 8*64, 9*64, 10*64, 11*64, 12*64, 13*64, 14*64, 15*64 }, + 8*64, 9*64, 10*64, 11*64, 12*64, 13*64, 14*64, 15*64 }, { 0*4, 1*4, 2*4, 3*4, 4*4, 5*4, 6*4, 7*4, 8*4, 9*4, 10*4, 11*4, 12*4, 13*4, 14*4, 15*4 }, @@ -789,7 +789,7 @@ ROM_START( plygonet ) ROM_LOAD( "305b06.18g", 0x000000, 0x20000, CRC(decd6e42) SHA1(4c23dcb1d68132d3381007096e014ee4b6007086) ) /* '936 tiles */ - ROM_REGION( 0x40000, "gfx2", 0 ) + ROM_REGION( 0x40000, "gfx2", 0 ) ROM_LOAD( "305b07.20d", 0x000000, 0x40000, CRC(e4320bc3) SHA1(b0bb2dac40d42f97da94516d4ebe29b1c3d77c37) ) /* sound data */ @@ -815,7 +815,7 @@ ROM_START( polynetw ) ROM_LOAD( "305a06.18g", 0x000000, 0x020000, CRC(4b9b7e9c) SHA1(8c3c0f1ec7e26fd9552f6da1e6bdd7ff4453ba57) ) /* '936 tiles */ - ROM_REGION( 0x40000, "gfx2", 0 ) + ROM_REGION( 0x40000, "gfx2", 0 ) ROM_LOAD( "305a07.20d", 0x000000, 0x020000, CRC(0959283b) SHA1(482caf96e8e430b87810508b1a1420cd3b58f203) ) /* sound data */ diff --git a/src/mame/drivers/pntnpuzl.c b/src/mame/drivers/pntnpuzl.c index daee699b078..445d0ca3b9f 100644 --- a/src/mame/drivers/pntnpuzl.c +++ b/src/mame/drivers/pntnpuzl.c @@ -133,7 +133,7 @@ static const eeprom_interface eeprom_intf = "*101", /* write command */ NULL, /* erase command */ "*10000xxxx", /* lock command */ - "*10011xxxx" /* unlock command */ + "*10011xxxx" /* unlock command */ }; static UINT16 pntnpuzl_eeprom; diff --git a/src/mame/drivers/pokechmp.c b/src/mame/drivers/pokechmp.c index 6612da5d7cb..31639d3b121 100644 --- a/src/mame/drivers/pokechmp.c +++ b/src/mame/drivers/pokechmp.c @@ -176,16 +176,16 @@ static INPUT_PORTS_START( pokechmp ) PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) ) PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) ) PORT_DIPSETTING( 0x01, DEF_STR( 1C_3C ) ) - PORT_DIPNAME( 0x04, 0x04, DEF_STR( Flip_Screen ) ) + PORT_DIPNAME( 0x04, 0x04, DEF_STR( Flip_Screen ) ) PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x08, "Allow 2 Players Game" ) + PORT_DIPNAME( 0x08, 0x08, "Allow 2 Players Game" ) PORT_DIPSETTING( 0x00, DEF_STR( No ) ) PORT_DIPSETTING( 0x08, DEF_STR( Yes ) ) - PORT_DIPNAME( 0x10, 0x10, DEF_STR( Demo_Sounds ) ) + PORT_DIPNAME( 0x10, 0x10, DEF_STR( Demo_Sounds ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPSETTING( 0x10, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x20, "Time" ) + PORT_DIPNAME( 0x20, 0x20, "Time" ) PORT_DIPSETTING( 0x00, "100" ) PORT_DIPSETTING( 0x20, "120" ) PORT_DIPNAME( 0x40, 0x00, DEF_STR( Lives ) ) diff --git a/src/mame/drivers/polepos.c b/src/mame/drivers/polepos.c index 7269b0203c4..9a494e44ce5 100644 --- a/src/mame/drivers/polepos.c +++ b/src/mame/drivers/polepos.c @@ -482,9 +482,9 @@ static ADDRESS_MAP_START( z80_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x0000, 0x2fff) AM_ROM AM_RANGE(0x3000, 0x37ff) AM_MIRROR(0x0800) AM_RAM AM_BASE_SIZE_GENERIC(nvram) /* Battery Backup */ AM_RANGE(0x4000, 0x47ff) AM_READWRITE(polepos_sprite_r, polepos_sprite_w) /* Motion Object */ - AM_RANGE(0x4800, 0x4bff) AM_READWRITE(polepos_road_r, polepos_road_w) /* Road Memory */ + AM_RANGE(0x4800, 0x4bff) AM_READWRITE(polepos_road_r, polepos_road_w) /* Road Memory */ AM_RANGE(0x4c00, 0x4fff) AM_READWRITE(polepos_alpha_r, polepos_alpha_w) /* Alphanumeric (char ram) */ - AM_RANGE(0x5000, 0x57ff) AM_READWRITE(polepos_view_r, polepos_view_w) /* Background Memory */ + AM_RANGE(0x5000, 0x57ff) AM_READWRITE(polepos_view_r, polepos_view_w) /* Background Memory */ AM_RANGE(0x8000, 0x83ff) AM_MIRROR(0x0c00) AM_READONLY /* Sound Memory */ AM_RANGE(0x8000, 0x83bf) AM_MIRROR(0x0c00) AM_WRITEONLY /* Sound Memory */ @@ -511,7 +511,7 @@ static ADDRESS_MAP_START( z8002_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x6000, 0x6001) AM_MIRROR(0x1ffe) AM_WRITE(polepos_z8002_nvi_enable_w) /* NVI enable - *NOT* shared by the two CPUs */ AM_RANGE(0x8000, 0x8fff) AM_READWRITE(polepos_sprite16_r, polepos_sprite16_w) AM_BASE(&polepos_sprite16_memory) /* Motion Object */ AM_RANGE(0x9000, 0x97ff) AM_READWRITE(polepos_road16_r, polepos_road16_w) AM_BASE(&polepos_road16_memory) /* Road Memory */ - AM_RANGE(0x9800, 0x9fff) AM_READWRITE(polepos_alpha16_r, polepos_alpha16_w) AM_BASE(&polepos_alpha16_memory) /* Alphanumeric (char ram) */ + AM_RANGE(0x9800, 0x9fff) AM_READWRITE(polepos_alpha16_r, polepos_alpha16_w) AM_BASE(&polepos_alpha16_memory) /* Alphanumeric (char ram) */ AM_RANGE(0xa000, 0xafff) AM_READWRITE(polepos_view16_r, polepos_view16_w) AM_BASE(&polepos_view16_memory) /* Background memory */ AM_RANGE(0xc000, 0xc001) AM_MIRROR(0x38fe) AM_WRITE(polepos_view16_hscroll_w) /* Background horz scroll position */ AM_RANGE(0xc100, 0xc101) AM_MIRROR(0x38fe) AM_WRITE(polepos_road16_vscroll_w) /* Road vertical position */ @@ -1103,17 +1103,17 @@ ROM_START( polepos ) ROM_LOAD16_BYTE( "pp1_6b.4l", 0x0000, 0x2000, CRC(81696272) SHA1(27041a7c24297a6f317537c44922b51d2b2278a6) ) /* graphics data */ - ROM_REGION( 0x01000, "gfx1", 0 ) /* 2bpp alpha layer */ + ROM_REGION( 0x01000, "gfx1", 0 ) /* 2bpp alpha layer */ ROM_LOAD( "pp1_28.1f", 0x0000, 0x1000, CRC(5b277daf) SHA1(0b1feeb2c0c63a5db5ba9b0115aa1b2388636a70) ) - ROM_REGION( 0x01000, "gfx2", 0 ) /* 2bpp view layer */ + ROM_REGION( 0x01000, "gfx2", 0 ) /* 2bpp view layer */ ROM_LOAD( "pp1_29.1e", 0x0000, 0x1000, CRC(706e888a) SHA1(af1aa2199fcf73a3afbe760857ff117865350954) ) - ROM_REGION( 0x04000, "gfx3", 0 ) /* 4bpp 16x16 sprites */ + ROM_REGION( 0x04000, "gfx3", 0 ) /* 4bpp 16x16 sprites */ ROM_LOAD( "pp1_25.1n", 0x0000, 0x2000, CRC(ac8e28c1) SHA1(13bc2bf4be28d9ae987f79034f9532272b3a2543) ) /* 4bpp sm sprites, planes 0+1 */ ROM_LOAD( "pp1_26.1m", 0x2000, 0x2000, CRC(94443079) SHA1(413d7b762c8dff541675e96874be6ee0251d3581) ) /* 4bpp sm sprites, planes 2+3 */ - ROM_REGION( 0x10000, "gfx4", 0 ) /* 4bpp 32x32 sprites */ + ROM_REGION( 0x10000, "gfx4", 0 ) /* 4bpp 32x32 sprites */ ROM_LOAD( "136014.150", 0x0000, 0x2000, CRC(2e134b46) SHA1(0938f5f9f5cc6d7c1096c569449db78dbc42da01) ) /* 4bpp lg sprites, planes 0+1 */ ROM_LOAD( "pp1_19.4n", 0x2000, 0x2000, CRC(43ff83e1) SHA1(8f830549a629b019125e59801e5027e4e4b3c0f2) ) ROM_LOAD( "pp1_21.3n", 0x4000, 0x2000, CRC(5f958eb4) SHA1(b56d84e5e5e0ddeb0e71851ba66e5fa1b1409551) ) @@ -1187,17 +1187,17 @@ ROM_START( poleposa ) ROM_LOAD16_BYTE( "136014.204", 0x0000, 0x2000, CRC(c52c98ed) SHA1(2e33c487deaf8afb941e07e511a9828d2d8f6b31) ) /* graphics data */ - ROM_REGION( 0x01000, "gfx1", 0 ) /* 2bpp alpha layer */ + ROM_REGION( 0x01000, "gfx1", 0 ) /* 2bpp alpha layer */ ROM_LOAD( "136014.132", 0x0000, 0x1000, CRC(a949aa85) SHA1(2d6414196b6071101001128418233e585279ffb9) ) ROM_REGION( 0x01000, "gfx2", 0 ) ROM_LOAD( "136014.133", 0x0000, 0x1000, CRC(3f0eb551) SHA1(39516d0f72f4e3b03df9451d2dbe081d6c71a508) ) /* 2bpp view layer */ - ROM_REGION( 0x04000, "gfx3", 0 ) /* 4bpp 16x16 sprites */ + ROM_REGION( 0x04000, "gfx3", 0 ) /* 4bpp 16x16 sprites */ ROM_LOAD( "136014.156", 0x0000, 0x2000, CRC(e7a09c93) SHA1(47cc5c6776333bba8454a3df9e2f6e7de4a465e1) ) /* 4bpp sm sprites, planes 0+1 */ ROM_LOAD( "136014.157", 0x2000, 0x2000, CRC(dee7d687) SHA1(ea34b51c91f6915b74a4a7b53ddb4ff36b72bf66) ) /* 4bpp sm sprites, planes 2+3 */ - ROM_REGION( 0x10000, "gfx4", 0 ) /* 4bpp 32x32 sprites */ + ROM_REGION( 0x10000, "gfx4", 0 ) /* 4bpp 32x32 sprites */ ROM_LOAD( "136014.150", 0x0000, 0x2000, CRC(2e134b46) SHA1(0938f5f9f5cc6d7c1096c569449db78dbc42da01) ) /* 4bpp lg sprites, planes 0+1 */ ROM_LOAD( "136014.152", 0x2000, 0x2000, CRC(a7e3a1c6) SHA1(b7340318afaa4b5f416fe4444899579242cd36c2) ) ROM_LOAD( "136014.154", 0x4000, 0x2000, CRC(8992d381) SHA1(3bf2544dbe88132137acec2c064a104a74139ec7) ) @@ -1266,17 +1266,17 @@ ROM_START( polepos1 ) ROM_LOAD16_BYTE( "136014.104", 0x0000, 0x2000, CRC(ba0045f3) SHA1(aedb8d8c56407963aa4ffb66243288c8fd6d845a) ) /* graphics data */ - ROM_REGION( 0x01000, "gfx1", 0 ) /* 2bpp alpha layer */ + ROM_REGION( 0x01000, "gfx1", 0 ) /* 2bpp alpha layer */ ROM_LOAD( "136014.132", 0x0000, 0x1000, CRC(a949aa85) SHA1(2d6414196b6071101001128418233e585279ffb9) ) - ROM_REGION( 0x01000, "gfx2", 0 ) /* 2bpp view layer */ + ROM_REGION( 0x01000, "gfx2", 0 ) /* 2bpp view layer */ ROM_LOAD( "136014.133", 0x0000, 0x1000, CRC(3f0eb551) SHA1(39516d0f72f4e3b03df9451d2dbe081d6c71a508) ) - ROM_REGION( 0x04000, "gfx3", 0 ) /* 4bpp 16x16 sprites */ + ROM_REGION( 0x04000, "gfx3", 0 ) /* 4bpp 16x16 sprites */ ROM_LOAD( "136014.156", 0x0000, 0x2000, CRC(e7a09c93) SHA1(47cc5c6776333bba8454a3df9e2f6e7de4a465e1) ) /* 4bpp sm sprites, planes 0+1 */ ROM_LOAD( "136014.157", 0x2000, 0x2000, CRC(dee7d687) SHA1(ea34b51c91f6915b74a4a7b53ddb4ff36b72bf66) ) /* 4bpp sm sprites, planes 2+3 */ - ROM_REGION( 0x10000, "gfx4", 0 ) /* 4bpp 32x32 sprites */ + ROM_REGION( 0x10000, "gfx4", 0 ) /* 4bpp 32x32 sprites */ ROM_LOAD( "136014.150", 0x0000, 0x2000, CRC(2e134b46) SHA1(0938f5f9f5cc6d7c1096c569449db78dbc42da01) ) /* 4bpp lg sprites, planes 0+1 */ ROM_LOAD( "136014.152", 0x2000, 0x2000, CRC(a7e3a1c6) SHA1(b7340318afaa4b5f416fe4444899579242cd36c2) ) ROM_LOAD( "136014.154", 0x4000, 0x2000, CRC(8992d381) SHA1(3bf2544dbe88132137acec2c064a104a74139ec7) ) @@ -1442,17 +1442,17 @@ ROM_START( topracer ) ROM_LOAD16_BYTE( "tr6b.bin", 0x0000, 0x2000, CRC(9d038ada) SHA1(7a9496c3fb93fd1945393656f8510a0c6421a9ab) ) /* graphics data */ - ROM_REGION( 0x01000, "gfx1", 0 ) /* 2bpp alpha layer */ + ROM_REGION( 0x01000, "gfx1", 0 ) /* 2bpp alpha layer */ ROM_LOAD( "tr28.bin", 0x0000, 0x1000, CRC(b8217c96) SHA1(aba311bc3c4b118ba322a00e33e2d5cbe7bc6e4a) ) - ROM_REGION( 0x01000, "gfx2", 0 ) /* 2bpp view layer */ + ROM_REGION( 0x01000, "gfx2", 0 ) /* 2bpp view layer */ ROM_LOAD( "tr29.bin", 0x0000, 0x1000, CRC(c6e15c21) SHA1(e2a70b3f7ce51a003068eb75d9fe82548f0206d7) ) - ROM_REGION( 0x04000, "gfx3", 0 ) /* 4bpp 16x16 sprites */ + ROM_REGION( 0x04000, "gfx3", 0 ) /* 4bpp 16x16 sprites */ ROM_LOAD( "trus25.bin", 0x0000, 0x2000, CRC(9e1a9c3b) SHA1(deca026c39093119985d1486ed61abc3e6e5705c) ) /* 4bpp sm sprites, planes 0+1 */ ROM_LOAD( "trus26.bin", 0x2000, 0x2000, CRC(3b39a176) SHA1(d04c9c2c9129c8dd7d7eab24c43502b67162407c) ) /* 4bpp sm sprites, planes 2+3 */ - ROM_REGION( 0x10000, "gfx4", 0 ) /* 4bpp 32x32 sprites */ + ROM_REGION( 0x10000, "gfx4", 0 ) /* 4bpp 32x32 sprites */ ROM_LOAD( "pp17.bin", 0x0000, 0x2000, CRC(613ab0df) SHA1(88aa4500275aae010fc9783c1d8d843feab89afa) ) /* 4bpp lg sprites, planes 0+1 */ ROM_LOAD( "tr19.bin", 0x2000, 0x2000, CRC(f8e7f551) SHA1(faa23c55bc43325e6f71936be970f2ca144697d8) ) ROM_LOAD( "tr21.bin", 0x4000, 0x2000, CRC(17c798b0) SHA1(ae2047bc0e4e8c85e1de09c39c200ea8f7c6a72e) ) @@ -1516,17 +1516,17 @@ ROM_START( topracera ) ROM_LOAD16_BYTE( "tr6b.f5", 0x0000, 0x2000, CRC(b3641d0c) SHA1(38ce172b2e38895749cbd3cc1c0e2c0fe8be744a) ) /* graphics data */ - ROM_REGION( 0x01000, "gfx1", 0 ) /* 2bpp alpha layer */ + ROM_REGION( 0x01000, "gfx1", 0 ) /* 2bpp alpha layer */ ROM_LOAD( "tr28.j9", 0x0000, 0x1000, CRC(b8217c96) SHA1(aba311bc3c4b118ba322a00e33e2d5cbe7bc6e4a) ) - ROM_REGION( 0x01000, "gfx2", 0 ) /* 2bpp view layer */ + ROM_REGION( 0x01000, "gfx2", 0 ) /* 2bpp view layer */ ROM_LOAD( "tr29.k9", 0x0000, 0x1000, CRC(c6e15c21) SHA1(e2a70b3f7ce51a003068eb75d9fe82548f0206d7) ) - ROM_REGION( 0x04000, "gfx3", 0 ) /* 4bpp 16x16 sprites */ + ROM_REGION( 0x04000, "gfx3", 0 ) /* 4bpp 16x16 sprites */ ROM_LOAD( "tr25.d5", 0x0000, 0x2000, CRC(9e1a9c3b) SHA1(deca026c39093119985d1486ed61abc3e6e5705c) ) /* 4bpp sm sprites, planes 0+1 */ ROM_LOAD( "tr26.d8", 0x2000, 0x2000, CRC(3b39a176) SHA1(d04c9c2c9129c8dd7d7eab24c43502b67162407c) ) /* 4bpp sm sprites, planes 2+3 */ - ROM_REGION( 0x10000, "gfx4", 0 ) /* 4bpp 32x32 sprites */ + ROM_REGION( 0x10000, "gfx4", 0 ) /* 4bpp 32x32 sprites */ ROM_LOAD( "tr17.a5", 0x0000, 0x2000, CRC(613ab0df) SHA1(88aa4500275aae010fc9783c1d8d843feab89afa) ) /* 4bpp lg sprites, planes 0+1 */ ROM_LOAD( "tr19.b5", 0x2000, 0x2000, CRC(f8e7f551) SHA1(faa23c55bc43325e6f71936be970f2ca144697d8) ) ROM_LOAD( "tr21.c5", 0x4000, 0x2000, CRC(17c798b0) SHA1(ae2047bc0e4e8c85e1de09c39c200ea8f7c6a72e) ) @@ -1624,17 +1624,17 @@ ROM_START( topracern ) ROM_LOAD16_BYTE( "pole-d", 0x0000, 0x2000, CRC(932bb5a7) SHA1(8045fe1f9b4b1973ec0d6705adf3ba3891bddaa1) ) /* the other set had this one, what's the difference? */ /* graphics data */ - ROM_REGION( 0x01000, "gfx1", 0 ) /* 2bpp alpha layer */ + ROM_REGION( 0x01000, "gfx1", 0 ) /* 2bpp alpha layer */ ROM_LOAD( "13.bin", 0x0000, 0x1000, CRC(b8217c96) SHA1(aba311bc3c4b118ba322a00e33e2d5cbe7bc6e4a) ) - ROM_REGION( 0x01000, "gfx2", 0 ) /* 2bpp view layer */ + ROM_REGION( 0x01000, "gfx2", 0 ) /* 2bpp view layer */ ROM_LOAD( "12.bin", 0x0000, 0x1000, CRC(c6e15c21) SHA1(e2a70b3f7ce51a003068eb75d9fe82548f0206d7) ) - ROM_REGION( 0x04000, "gfx3", 0 ) /* 4bpp 16x16 sprites */ + ROM_REGION( 0x04000, "gfx3", 0 ) /* 4bpp 16x16 sprites */ ROM_LOAD( "5.bin", 0x0000, 0x2000, CRC(301117d2) SHA1(0d8be9e50da4601963a8392aa3e0f3414e721fa1) ) /* 4bpp sm sprites, planes 0+1 */ ROM_LOAD( "6.bin", 0x2000, 0x2000, CRC(3c9db014) SHA1(c26098dd78803e699845fefa92bf034c38259cea) ) /* 4bpp sm sprites, planes 2+3 */ - ROM_REGION( 0x10000, "gfx4", 0 ) /* 4bpp 32x32 sprites */ + ROM_REGION( 0x10000, "gfx4", 0 ) /* 4bpp 32x32 sprites */ ROM_LOAD( "1.bin", 0x0000, 0x2000, CRC(613ab0df) SHA1(88aa4500275aae010fc9783c1d8d843feab89afa) ) /* 4bpp lg sprites, planes 0+1 */ ROM_LOAD( "2.bin", 0x2000, 0x2000, CRC(f8e7f551) SHA1(faa23c55bc43325e6f71936be970f2ca144697d8) ) //ROM_LOAD( "3.bin", 0x4000, 0x2000, CRC(94d0b00c) SHA1(24e4004d1091292afda76bdfb007f08c13778675) ) // this one has more corrupt lines in one of the flags @@ -1703,17 +1703,17 @@ ROM_START( polepos2 ) ROM_LOAD16_BYTE( "pp4_8.3l", 0x4000, 0x1000, CRC(ef25a2ee) SHA1(45959355cad1a48f19ae14193374e03d4f9965c7) ) /* graphics data */ - ROM_REGION( 0x02000, "gfx1", 0 ) /* 2bpp alpha layer */ + ROM_REGION( 0x02000, "gfx1", 0 ) /* 2bpp alpha layer */ ROM_LOAD( "pp4_28.1f", 0x0000, 0x2000, CRC(280dde7d) SHA1(b7c7fb3a5076aa4d0e0cf3256ece9a6194315626) ) - ROM_REGION( 0x02000, "gfx2", 0 ) /* 2bpp view layer */ + ROM_REGION( 0x02000, "gfx2", 0 ) /* 2bpp view layer */ ROM_LOAD( "136014.173", 0x0000, 0x2000, CRC(ec3ec6e6) SHA1(ae905d0ae802d1010b2c1f1a13e88a1f0dbe57da) ) - ROM_REGION( 0x04000, "gfx3", 0 ) /* 4bpp 16x16 sprites */ + ROM_REGION( 0x04000, "gfx3", 0 ) /* 4bpp 16x16 sprites */ ROM_LOAD( "pp4_25.1n", 0x0000, 0x2000, CRC(fd098e65) SHA1(2c497f1d278ba6730752706a0d1b5a5a0fec3d5b) ) /* 4bpp sm sprites, planes 0+1 */ ROM_LOAD( "pp4_26.1m", 0x2000, 0x2000, CRC(35ac62b3) SHA1(21038a78eb73d520e3e1ae8e1c0047d06b94cdab) ) /* 4bpp sm sprites, planes 2+3 */ - ROM_REGION( 0x10000, "gfx4", 0 ) /* 4bpp 32x32 sprites */ + ROM_REGION( 0x10000, "gfx4", 0 ) /* 4bpp 32x32 sprites */ ROM_LOAD( "136014.119", 0x0000, 0x2000, CRC(2e134b46) SHA1(0938f5f9f5cc6d7c1096c569449db78dbc42da01) ) /* 4bpp lg sprites, planes 0+1 */ ROM_LOAD( "pp1_19.4n", 0x2000, 0x2000, CRC(43ff83e1) SHA1(8f830549a629b019125e59801e5027e4e4b3c0f2) ) ROM_LOAD( "pp1_21.3n", 0x4000, 0x2000, CRC(5f958eb4) SHA1(b56d84e5e5e0ddeb0e71851ba66e5fa1b1409551) ) @@ -1795,17 +1795,17 @@ ROM_START( polepos2a ) ROM_LOAD16_BYTE( "136014.185", 0x4000, 0x2000, CRC(899de75e) SHA1(4a16535115e37a3d342b2cb53f610a87c0d0abe1) ) /* graphics data */ - ROM_REGION( 0x02000, "gfx1", 0 ) /* 2bpp alpha layer */ + ROM_REGION( 0x02000, "gfx1", 0 ) /* 2bpp alpha layer */ ROM_LOAD( "136014.172", 0x0000, 0x2000, CRC(fbe5e72f) SHA1(07965d6e98ac1332ac6192b5e9cc927dd9eb706f) ) - ROM_REGION( 0x02000, "gfx2", 0 ) /* 2bpp view layer */ + ROM_REGION( 0x02000, "gfx2", 0 ) /* 2bpp view layer */ ROM_LOAD( "136014.173", 0x0000, 0x2000, CRC(ec3ec6e6) SHA1(ae905d0ae802d1010b2c1f1a13e88a1f0dbe57da) ) - ROM_REGION( 0x04000, "gfx3", 0 ) /* 4bpp 16x16 sprites */ + ROM_REGION( 0x04000, "gfx3", 0 ) /* 4bpp 16x16 sprites */ ROM_LOAD( "136014.170", 0x0000, 0x2000, CRC(455d79a0) SHA1(03ef7c58f3145d9a6a461ef1aea3b5a49e653f80) ) /* 4bpp sm sprites, planes 0+1 */ ROM_LOAD( "136014.171", 0x2000, 0x2000, CRC(78372b81) SHA1(5defaf2074c1ab4d13dc36a190c658ddf7f7931b) ) /* 4bpp sm sprites, planes 2+3 */ - ROM_REGION( 0x10000, "gfx4", 0 ) /* 4bpp 32x32 sprites */ + ROM_REGION( 0x10000, "gfx4", 0 ) /* 4bpp 32x32 sprites */ ROM_LOAD( "136014.119", 0x0000, 0x2000, CRC(2e134b46) SHA1(0938f5f9f5cc6d7c1096c569449db78dbc42da01) ) /* 4bpp lg sprites, planes 0+1 */ ROM_LOAD( "136014.166", 0x2000, 0x2000, CRC(2b0517bd) SHA1(ebe447ba3dcd8a3b56f47d707483074f61953fec) ) ROM_LOAD( "136014.168", 0x4000, 0x2000, CRC(4d7916d9) SHA1(052745f252f51bfdd456e54cf7b8d22ab3aace27) ) @@ -1879,17 +1879,17 @@ ROM_START( polepos2b ) ROM_LOAD16_BYTE( "136014.185", 0x4000, 0x2000, CRC(899de75e) SHA1(4a16535115e37a3d342b2cb53f610a87c0d0abe1) ) /* graphics data */ - ROM_REGION( 0x02000, "gfx1", 0 ) /* 2bpp alpha layer */ + ROM_REGION( 0x02000, "gfx1", 0 ) /* 2bpp alpha layer */ ROM_LOAD( "136014.172", 0x0000, 0x2000, CRC(fbe5e72f) SHA1(07965d6e98ac1332ac6192b5e9cc927dd9eb706f) ) - ROM_REGION( 0x02000, "gfx2", 0 ) /* 2bpp view layer */ + ROM_REGION( 0x02000, "gfx2", 0 ) /* 2bpp view layer */ ROM_LOAD( "136014.173", 0x0000, 0x2000, CRC(ec3ec6e6) SHA1(ae905d0ae802d1010b2c1f1a13e88a1f0dbe57da) ) - ROM_REGION( 0x04000, "gfx3", 0 ) /* 4bpp 16x16 sprites */ + ROM_REGION( 0x04000, "gfx3", 0 ) /* 4bpp 16x16 sprites */ ROM_LOAD( "136014.170", 0x0000, 0x2000, CRC(455d79a0) SHA1(03ef7c58f3145d9a6a461ef1aea3b5a49e653f80) ) /* 4bpp sm sprites, planes 0+1 */ ROM_LOAD( "136014.171", 0x2000, 0x2000, CRC(78372b81) SHA1(5defaf2074c1ab4d13dc36a190c658ddf7f7931b) ) /* 4bpp sm sprites, planes 2+3 */ - ROM_REGION( 0x10000, "gfx4", 0 ) /* 4bpp 32x32 sprites */ + ROM_REGION( 0x10000, "gfx4", 0 ) /* 4bpp 32x32 sprites */ ROM_LOAD( "136014.119", 0x0000, 0x2000, CRC(2e134b46) SHA1(0938f5f9f5cc6d7c1096c569449db78dbc42da01) ) /* 4bpp lg sprites, planes 0+1 */ ROM_LOAD( "136014.166", 0x2000, 0x2000, CRC(2b0517bd) SHA1(ebe447ba3dcd8a3b56f47d707483074f61953fec) ) ROM_LOAD( "136014.168", 0x4000, 0x2000, CRC(4d7916d9) SHA1(052745f252f51bfdd456e54cf7b8d22ab3aace27) ) @@ -1956,17 +1956,17 @@ ROM_START( polepos2bi ) ROM_LOAD16_BYTE( "4.bin", 0x0000, 0x4000, CRC(fe9baeb6) SHA1(9a8ad2d8a69b4005f7abed278093fd57b9242bca) ) /* graphics data */ - ROM_REGION( 0x02000, "gfx1", 0 ) /* 2bpp alpha layer */ + ROM_REGION( 0x02000, "gfx1", 0 ) /* 2bpp alpha layer */ ROM_LOAD( "05.bin", 0x0000, 0x2000, CRC(55bec6f3) SHA1(8b405c74473abb7debaa9114991e7b134d06fe42) ) - ROM_REGION( 0x02000, "gfx2", 0 ) /* 2bpp view layer */ + ROM_REGION( 0x02000, "gfx2", 0 ) /* 2bpp view layer */ ROM_LOAD( "04.bin", 0x0000, 0x2000, CRC(ec3ec6e6) SHA1(ae905d0ae802d1010b2c1f1a13e88a1f0dbe57da) ) - ROM_REGION( 0x04000, "gfx3", 0 ) /* 4bpp 16x16 sprites */ + ROM_REGION( 0x04000, "gfx3", 0 ) /* 4bpp 16x16 sprites */ ROM_LOAD( "12.bin", 0x0000, 0x2000, CRC(1c72041a) SHA1(b65b09c4251ee61d247f359615e7adc7c80bc8d5) ) /* 4bpp sm sprites, planes 0+1 */ ROM_LOAD( "11.bin", 0x2000, 0x2000, CRC(1b38b257) SHA1(c7eec0692a31e1c8285bd1cba3ebd17ab253d2c9) ) /* 4bpp sm sprites, planes 2+3 */ - ROM_REGION( 0x10000, "gfx4", 0 ) /* 4bpp 32x32 sprites */ + ROM_REGION( 0x10000, "gfx4", 0 ) /* 4bpp 32x32 sprites */ ROM_LOAD( "16.bin", 0x0000, 0x2000, CRC(613ab0df) SHA1(88aa4500275aae010fc9783c1d8d843feab89afa) ) /* 4bpp lg sprites, planes 0+1 */ ROM_LOAD( "15.bin", 0x2000, 0x2000, CRC(f8e7f551) SHA1(faa23c55bc43325e6f71936be970f2ca144697d8) ) ROM_LOAD( "14.bin", 0x4000, 0x2000, CRC(17c798b0) SHA1(ae2047bc0e4e8c85e1de09c39c200ea8f7c6a72e) ) diff --git a/src/mame/drivers/prehisle.c b/src/mame/drivers/prehisle.c index 8ecad925573..d9e58cf96be 100644 --- a/src/mame/drivers/prehisle.c +++ b/src/mame/drivers/prehisle.c @@ -215,7 +215,7 @@ static const ym3812_interface ym3812_config = static MACHINE_DRIVER_START( prehisle ) /* basic machine hardware */ - MDRV_CPU_ADD("maincpu", M68000, XTAL_18MHz/2) /* verified on pcb */ + MDRV_CPU_ADD("maincpu", M68000, XTAL_18MHz/2) /* verified on pcb */ MDRV_CPU_PROGRAM_MAP(prehisle_map) MDRV_CPU_VBLANK_INT("screen", irq4_line_hold) diff --git a/src/mame/drivers/progolf.c b/src/mame/drivers/progolf.c index b19d7e8f857..66612f89ab0 100644 --- a/src/mame/drivers/progolf.c +++ b/src/mame/drivers/progolf.c @@ -429,9 +429,9 @@ static MACHINE_DRIVER_START( progolf ) /* basic machine hardware */ MDRV_CPU_ADD("maincpu", M6502, 3000000/2) /* guess, 3 Mhz makes the game to behave worse? */ MDRV_CPU_PROGRAM_MAP(main_cpu) - MDRV_CPU_VBLANK_INT("screen", progolf_interrupt) + MDRV_CPU_VBLANK_INT("screen", progolf_interrupt) - MDRV_CPU_ADD("audiocpu", M6502, 500000) + MDRV_CPU_ADD("audiocpu", M6502, 500000) MDRV_CPU_PROGRAM_MAP(sound_cpu) MDRV_QUANTUM_PERFECT_CPU("maincpu") diff --git a/src/mame/drivers/psattack.c b/src/mame/drivers/psattack.c index 15f2c5d732b..94efe0a992e 100644 --- a/src/mame/drivers/psattack.c +++ b/src/mame/drivers/psattack.c @@ -160,7 +160,7 @@ static const vr0_interface vr0_config = static MACHINE_DRIVER_START( psattack ) MDRV_CPU_ADD("maincpu", SE3208, 43000000) MDRV_CPU_PROGRAM_MAP(psattack_mem) - MDRV_CPU_VBLANK_INT("screen", psattack_interrupt) + MDRV_CPU_VBLANK_INT("screen", psattack_interrupt) MDRV_MACHINE_START(psattack) MDRV_MACHINE_RESET(psattack) diff --git a/src/mame/drivers/psychic5.c b/src/mame/drivers/psychic5.c index 2d7e95cf518..9eb0b65cdeb 100644 --- a/src/mame/drivers/psychic5.c +++ b/src/mame/drivers/psychic5.c @@ -580,7 +580,7 @@ static INPUT_PORTS_START( bombsa ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) - PORT_START("P1") /* player 1 control */ + PORT_START("P1") /* player 1 control */ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY @@ -634,7 +634,7 @@ static const gfx_layout charlayout = { 0, 1, 2, 3 }, /* the four bitplanes for pixel are packed into one nibble */ { 0, 4, 8, 12, 16, 20, 24, 28 }, { 0*8, 4*8, 8*8, 12*8, 16*8, 20*8, 24*8, 28*8 }, - 32*8 /* every char takes 32 consecutive bytes */ + 32*8 /* every char takes 32 consecutive bytes */ }; static const gfx_layout spritelayout = @@ -784,7 +784,7 @@ ROM_START( psychic5 ) ROM_LOAD( "p5d", 0x00000, 0x08000, CRC(90259249) SHA1(ac2d8dd95f6c04b6ad726136931e37dcd537e977) ) ROM_LOAD( "p5e", 0x10000, 0x10000, CRC(72298f34) SHA1(725be2fbf5f3622f646c0fb8e6677cbddf0b1fc2) ) - ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */ + ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */ ROM_LOAD( "p5a", 0x00000, 0x08000, CRC(50060ecd) SHA1(e6051fb4a1fa9429cfb6084e8a5dfe994a08280b) ) ROM_REGION( 0x20000, "gfx1", 0 ) /* sprite tiles */ @@ -808,7 +808,7 @@ ROM_START( psychic5a ) ROM_LOAD( "myp5d", 0x00000, 0x08000, CRC(1d40a8c7) SHA1(79b36e690ea334c066b55b1e39ceb5fe0688cd7b) ) ROM_LOAD( "myp5e", 0x10000, 0x10000, CRC(2fa7e8c0) SHA1(d5096ebec58329346a3292ad2da1be3742fad093) ) - ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */ + ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */ ROM_LOAD( "myp5a", 0x00000, 0x10000, CRC(6efee094) SHA1(ae2b5bf6199121520bf8428b8b160b987f5b474f) ) ROM_REGION( 0x20000, "gfx1", 0 ) /* sprite tiles */ diff --git a/src/mame/drivers/pturn.c b/src/mame/drivers/pturn.c index 55f1489a5cf..32bdb69225d 100644 --- a/src/mame/drivers/pturn.c +++ b/src/mame/drivers/pturn.c @@ -507,7 +507,7 @@ ROM_START( pturn ) ROM_LOAD( "prom16.16p", 0x004000, 0x02000, CRC(94814c5d) SHA1(e4ab6c0ae94184d5270cadb887f56e3550b6d9f2) ) ROM_REGION( 0x0300, "proms", 0 ) - ROM_LOAD( "prom_red.3p", 0x0000, 0x0100, CRC(505fd8c2) SHA1(f2660fe512c76412a7b9f4be21fe549dd59fbda0) ) + ROM_LOAD( "prom_red.3p", 0x0000, 0x0100, CRC(505fd8c2) SHA1(f2660fe512c76412a7b9f4be21fe549dd59fbda0) ) ROM_LOAD( "prom_grn.4p", 0x0100, 0x0100, CRC(6a00199d) SHA1(ff0ac7ae83d970778a756f7445afed3785fc1150) ) ROM_LOAD( "prom_blu.4r", 0x0200, 0x0100, CRC(7b4c5788) SHA1(ca02b12c19be7981daa070533455bd4d227d56cd) ) diff --git a/src/mame/drivers/qdrmfgp.c b/src/mame/drivers/qdrmfgp.c index 22eb3e2e85a..1ac1d2b3322 100644 --- a/src/mame/drivers/qdrmfgp.c +++ b/src/mame/drivers/qdrmfgp.c @@ -342,7 +342,7 @@ static void gp2_ide_interrupt(const device_config *device, int state) static ADDRESS_MAP_START( qdrmfgp_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x000000, 0x0fffff) AM_ROM - AM_RANGE(0x100000, 0x10ffff) AM_RAM AM_BASE(&workram) /* work ram */ + AM_RANGE(0x100000, 0x10ffff) AM_RAM AM_BASE(&workram) /* work ram */ AM_RANGE(0x180000, 0x183fff) AM_RAM AM_BASE_SIZE_GENERIC(nvram) /* backup ram */ AM_RANGE(0x280000, 0x280fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE_GENERIC(paletteram) AM_RANGE(0x300000, 0x30003f) AM_DEVWRITE("k056832", k056832_word_w) /* video reg */ diff --git a/src/mame/drivers/quakeat.c b/src/mame/drivers/quakeat.c index bf0bab1b715..6fae73c0fd1 100644 --- a/src/mame/drivers/quakeat.c +++ b/src/mame/drivers/quakeat.c @@ -164,7 +164,7 @@ static MACHINE_DRIVER_START( quake ) MDRV_PIC8259_ADD( "pic8259_1", quakeat_pic8259_1_config ) MDRV_PIC8259_ADD( "pic8259_2", quakeat_pic8259_2_config ) - /* video hardware */ + /* video hardware */ MDRV_SCREEN_ADD("screen", RASTER) MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16) MDRV_SCREEN_REFRESH_RATE(60) diff --git a/src/mame/drivers/quasar.c b/src/mame/drivers/quasar.c index d8d5d60c506..b8683a04760 100644 --- a/src/mame/drivers/quasar.c +++ b/src/mame/drivers/quasar.c @@ -76,19 +76,19 @@ Sound Board 1b11107 static WRITE8_HANDLER( video_page_select_w ) { - cvs_state *state = (cvs_state *)space->machine->driver_data; + cvs_state *state = (cvs_state *)space->machine->driver_data; state->page = offset & 0x03; } static WRITE8_HANDLER( io_page_select_w ) { - cvs_state *state = (cvs_state *)space->machine->driver_data; + cvs_state *state = (cvs_state *)space->machine->driver_data; state->io_page = offset & 0x03; } static WRITE8_HANDLER( quasar_video_w ) { - cvs_state *state = (cvs_state *)space->machine->driver_data; + cvs_state *state = (cvs_state *)space->machine->driver_data; switch (state->page) { @@ -101,7 +101,7 @@ static WRITE8_HANDLER( quasar_video_w ) static READ8_HANDLER( quasar_IO_r ) { - cvs_state *state = (cvs_state *)space->machine->driver_data; + cvs_state *state = (cvs_state *)space->machine->driver_data; UINT8 ans = 0; switch (state->io_page) @@ -117,7 +117,7 @@ static READ8_HANDLER( quasar_IO_r ) static WRITE8_HANDLER( quasar_bullet_w ) { - cvs_state *state = (cvs_state *)space->machine->driver_data; + cvs_state *state = (cvs_state *)space->machine->driver_data; state->bullet_ram[offset] = (data ^ 0xff); } @@ -180,7 +180,7 @@ static ADDRESS_MAP_START( sound_portmap, ADDRESS_SPACE_IO, 8 ) AM_RANGE(0x00, 0x7f) AM_RAM AM_RANGE(0x80, 0x80) AM_READ(quasar_sh_command_r) AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ(audio_t1_r) - AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_DEVWRITE("dac", dac_signed_w) + AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_DEVWRITE("dac", dac_signed_w) ADDRESS_MAP_END /************************************************************************ diff --git a/src/mame/drivers/raiden2.c b/src/mame/drivers/raiden2.c index c4bc8b78829..3157f991506 100644 --- a/src/mame/drivers/raiden2.c +++ b/src/mame/drivers/raiden2.c @@ -2034,20 +2034,20 @@ ROM_START( xsedae ) ROM_REGION( 0x020000, "gfx1", 0 ) /* chars */ ROM_LOAD16_BYTE( "5.u077", 0x000000, 0x010000, CRC(478deced) SHA1(88cd72cb76bbc1c4255c3dfae4b9a10af9b050b2) ) - ROM_LOAD16_BYTE( "6.u072", 0x000001, 0x010000, CRC(a788402d) SHA1(8a1ac4760cf75cd2e32c1d15f36ad15cce3d411b) ) + ROM_LOAD16_BYTE( "6.u072", 0x000001, 0x010000, CRC(a788402d) SHA1(8a1ac4760cf75cd2e32c1d15f36ad15cce3d411b) ) - ROM_REGION( 0x400000, "gfx2", 0 ) /* background gfx */ - ROM_LOAD( "bg-1.u075", 0x000000, 0x100000, CRC(ac087560) SHA1(b6473b20c55ec090961cfc46a024b3c5b707ec25) ) - ROM_LOAD( "7.u0714", 0x100000, 0x080000, CRC(296105dc) SHA1(c2b80d681646f504b03c2dde13e37b1d820f82d2) ) + ROM_REGION( 0x400000, "gfx2", 0 ) /* background gfx */ + ROM_LOAD( "bg-1.u075", 0x000000, 0x100000, CRC(ac087560) SHA1(b6473b20c55ec090961cfc46a024b3c5b707ec25) ) + ROM_LOAD( "7.u0714", 0x100000, 0x080000, CRC(296105dc) SHA1(c2b80d681646f504b03c2dde13e37b1d820f82d2) ) - ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (not encrypted) */ - ROM_LOAD32_WORD( "obj-1.u0811", 0x000000, 0x100000, CRC(e65f1b4e) SHA1(b04be9af41ce868e64071715252c4ff228891cf0) ) - ROM_LOAD32_WORD( "obj-2.u082", 0x000002, 0x100000, CRC(e753e7ad) SHA1(643ab39ac1b7df686a16b1ed6fdcb686720ca8e8) ) + ROM_REGION( 0x800000, "gfx3", 0 ) /* sprite gfx (not encrypted) */ + ROM_LOAD32_WORD( "obj-1.u0811", 0x000000, 0x100000, CRC(e65f1b4e) SHA1(b04be9af41ce868e64071715252c4ff228891cf0) ) + ROM_LOAD32_WORD( "obj-2.u082", 0x000002, 0x100000, CRC(e753e7ad) SHA1(643ab39ac1b7df686a16b1ed6fdcb686720ca8e8) ) - ROM_REGION( 0x100000, "oki1", 0 ) /* ADPCM samples */ - ROM_LOAD( "9.u105", 0x00000, 0x40000, CRC(a7a0c5f9) SHA1(7882681ac152642aa4f859071f195842068b214b) ) + ROM_REGION( 0x100000, "oki1", 0 ) /* ADPCM samples */ + ROM_LOAD( "9.u105", 0x00000, 0x40000, CRC(a7a0c5f9) SHA1(7882681ac152642aa4f859071f195842068b214b) ) - ROM_REGION( 0x100000, "oki2", ROMREGION_ERASEFF ) /* ADPCM samples */ + ROM_REGION( 0x100000, "oki2", ROMREGION_ERASEFF ) /* ADPCM samples */ ROM_END static DRIVER_INIT (raiden2) @@ -2175,7 +2175,7 @@ static INPUT_PORTS_START( rdx_v33 ) PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) ) PORT_DIPSETTING( 0x0080, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2) + PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2) PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2) PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2) PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2) @@ -2215,7 +2215,7 @@ static INPUT_PORTS_START( nzerotea ) PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) ) PORT_DIPSETTING( 0x0080, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2) + PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2) PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2) PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2) PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2) diff --git a/src/mame/drivers/rainbow.c b/src/mame/drivers/rainbow.c index a94a1499fb0..093101e71c7 100644 --- a/src/mame/drivers/rainbow.c +++ b/src/mame/drivers/rainbow.c @@ -765,7 +765,7 @@ ROM_START( rainbowo ) ROM_LOAD( "b22-01.2", 0x00000, 0x80000, CRC(b76c9168) SHA1(e924be0c8294b930488bb04583784254a840a52e) ) /* tiles */ ROM_REGION( 0xa0000, "gfx2", 0 ) - ROM_LOAD( "b22-02.5", 0x00000, 0x80000, CRC(1b87ecf0) SHA1(37a463184f4064fe0565367236e289d57639614c) ) /* sprites */ + ROM_LOAD( "b22-02.5", 0x00000, 0x80000, CRC(1b87ecf0) SHA1(37a463184f4064fe0565367236e289d57639614c) ) /* sprites */ ROM_LOAD16_BYTE( "b22-12.7", 0x80000, 0x10000, CRC(67a76dc6) SHA1(626ee684eb3ea859c695ffe03344ccaa442da4af) ) ROM_LOAD16_BYTE( "b22-13.6", 0x80001, 0x10000, CRC(2fda099f) SHA1(a1e27a4497f6733608be924d69d965b19f725b99) ) ROM_END @@ -787,7 +787,7 @@ ROM_START( rainbowe ) ROM_LOAD( "b22-01.2", 0x00000, 0x80000, CRC(b76c9168) SHA1(e924be0c8294b930488bb04583784254a840a52e) ) /* tiles */ ROM_REGION( 0xa0000, "gfx2", 0 ) - ROM_LOAD( "b22-02.5", 0x00000, 0x80000, CRC(1b87ecf0) SHA1(37a463184f4064fe0565367236e289d57639614c) ) /* sprites */ + ROM_LOAD( "b22-02.5", 0x00000, 0x80000, CRC(1b87ecf0) SHA1(37a463184f4064fe0565367236e289d57639614c) ) /* sprites */ ROM_LOAD16_BYTE( "b22-12.7", 0x80000, 0x10000, CRC(67a76dc6) SHA1(626ee684eb3ea859c695ffe03344ccaa442da4af) ) ROM_LOAD16_BYTE( "b22-13.6", 0x80001, 0x10000, CRC(2fda099f) SHA1(a1e27a4497f6733608be924d69d965b19f725b99) ) ROM_END diff --git a/src/mame/drivers/realbrk.c b/src/mame/drivers/realbrk.c index 3ae898adfff..8503d809732 100644 --- a/src/mame/drivers/realbrk.c +++ b/src/mame/drivers/realbrk.c @@ -162,10 +162,10 @@ static ADDRESS_MAP_START( base_mem, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x600000, 0x601fff) AM_RAM_WRITE(realbrk_vram_0_w) AM_BASE(&realbrk_vram_0 ) // Background (0) AM_RANGE(0x602000, 0x603fff) AM_RAM_WRITE(realbrk_vram_1_w) AM_BASE(&realbrk_vram_1 ) // Background (1) AM_RANGE(0x604000, 0x604fff) AM_RAM_WRITE(realbrk_vram_2_w) AM_BASE(&realbrk_vram_2 ) // Text (2) - AM_RANGE(0x606000, 0x60600f) AM_RAM_WRITE(realbrk_vregs_w) AM_BASE(&realbrk_vregs ) // Scroll + Video Regs - AM_RANGE(0x605000, 0x61ffff) AM_RAM // + AM_RANGE(0x606000, 0x60600f) AM_RAM_WRITE(realbrk_vregs_w) AM_BASE(&realbrk_vregs ) // Scroll + Video Regs + AM_RANGE(0x605000, 0x61ffff) AM_RAM // AM_RANGE(0x800000, 0x800003) AM_DEVREADWRITE8("ymz", ymz280b_r, ymz280b_w, 0xff00) // YMZ280 - AM_RANGE(0xfe0000, 0xfeffff) AM_RAM // RAM + AM_RANGE(0xfe0000, 0xfeffff) AM_RAM // RAM AM_RANGE(0xfffc00, 0xffffff) AM_RAM_WRITE(tmp68301_regs_w) AM_BASE(&tmp68301_regs ) // TMP68301 Registers ADDRESS_MAP_END diff --git a/src/mame/drivers/redalert.c b/src/mame/drivers/redalert.c index 2fa6388f856..b7fb498929f 100644 --- a/src/mame/drivers/redalert.c +++ b/src/mame/drivers/redalert.c @@ -263,7 +263,7 @@ static INPUT_PORTS_START( redalert ) PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED ) /* pin 34 - N.C. */ PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_COCKTAIL PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_COCKTAIL - PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* Meter */ + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* Meter */ PORT_START("COIN") PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(1) diff --git a/src/mame/drivers/redclash.c b/src/mame/drivers/redclash.c index e8541b2e2d6..e35e5f47c49 100644 --- a/src/mame/drivers/redclash.c +++ b/src/mame/drivers/redclash.c @@ -209,7 +209,7 @@ static INPUT_PORTS_START( zerohour ) PORT_BIT( 0xc0, 0x40, IPT_VBLANK ) PORT_START("DSW1") - PORT_DIPUNUSED_DIPLOC( 0x01, 0x01, "SW1:8" ) /* Switches 6-8 are not used */ + PORT_DIPUNUSED_DIPLOC( 0x01, 0x01, "SW1:8" ) /* Switches 6-8 are not used */ PORT_DIPUNUSED_DIPLOC( 0x02, 0x02, "SW1:7" ) PORT_DIPUNUSED_DIPLOC( 0x04, 0x04, "SW1:6" ) PORT_DIPNAME( 0x08, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:5") @@ -232,7 +232,7 @@ static INPUT_PORTS_START( zerohour ) PORT_DIPSETTING( 0x08, DEF_STR( 3C_1C ) ) PORT_DIPSETTING( 0x0a, DEF_STR( 2C_1C ) ) PORT_DIPSETTING( 0x07, DEF_STR( 3C_2C ) ) - PORT_DIPSETTING( 0x0f, DEF_STR( 1C_1C ) ) /* all other combinations give 1C_1C */ + PORT_DIPSETTING( 0x0f, DEF_STR( 1C_1C ) ) /* all other combinations give 1C_1C */ PORT_DIPSETTING( 0x09, DEF_STR( 2C_3C ) ) PORT_DIPSETTING( 0x0e, DEF_STR( 1C_2C ) ) PORT_DIPSETTING( 0x0d, DEF_STR( 1C_3C ) ) diff --git a/src/mame/drivers/retofinv.c b/src/mame/drivers/retofinv.c index 5145f456f93..b3d0920b2b8 100644 --- a/src/mame/drivers/retofinv.c +++ b/src/mame/drivers/retofinv.c @@ -145,7 +145,7 @@ static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x6000, 0x6000) AM_WRITE(cpu2_m6000_w) AM_RANGE(0x8000, 0x8000) AM_DEVWRITE("sn1", sn76496_w) AM_RANGE(0xa000, 0xa000) AM_DEVWRITE("sn2", sn76496_w) - AM_RANGE(0xe000, 0xffff) AM_ROM /* space for diagnostic ROM */ + AM_RANGE(0xe000, 0xffff) AM_ROM /* space for diagnostic ROM */ ADDRESS_MAP_END static ADDRESS_MAP_START( mcu_map, ADDRESS_SPACE_PROGRAM, 8 ) @@ -325,7 +325,7 @@ static const gfx_layout spritelayout = 24*8+0, 24*8+1, 24*8+2, 24*8+3 }, { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8, 32*8, 33*8, 34*8, 35*8, 36*8, 37*8, 38*8, 39*8 }, - 64*8 + 64*8 }; static GFXDECODE_START( retofinv ) diff --git a/src/mame/drivers/rollrace.c b/src/mame/drivers/rollrace.c index 34ee1b66352..b06926108dd 100644 --- a/src/mame/drivers/rollrace.c +++ b/src/mame/drivers/rollrace.c @@ -109,53 +109,53 @@ static INPUT_PORTS_START( rollrace ) PORT_START("DSW1") PORT_DIPNAME( 0x07, 0x00, DEF_STR( Coin_A ) ) - PORT_DIPSETTING( 0x07, DEF_STR( 6C_1C ) ) - PORT_DIPSETTING( 0x06, DEF_STR( 3C_1C ) ) - PORT_DIPSETTING( 0x04, DEF_STR( 2C_1C ) ) - PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) - PORT_DIPSETTING( 0x05, DEF_STR( 2C_3C ) ) - PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) ) - PORT_DIPSETTING( 0x02, DEF_STR( 1C_3C ) ) - PORT_DIPSETTING( 0x03, DEF_STR( 1C_6C ) ) + PORT_DIPSETTING( 0x07, DEF_STR( 6C_1C ) ) + PORT_DIPSETTING( 0x06, DEF_STR( 3C_1C ) ) + PORT_DIPSETTING( 0x04, DEF_STR( 2C_1C ) ) + PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) + PORT_DIPSETTING( 0x05, DEF_STR( 2C_3C ) ) + PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) ) + PORT_DIPSETTING( 0x02, DEF_STR( 1C_3C ) ) + PORT_DIPSETTING( 0x03, DEF_STR( 1C_6C ) ) PORT_DIPNAME( 0x38, 0x00, DEF_STR( Coin_B ) ) - PORT_DIPSETTING( 0x38, DEF_STR( 6C_1C ) ) - PORT_DIPSETTING( 0x30, DEF_STR( 3C_1C ) ) - PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) ) - PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) - PORT_DIPSETTING( 0x28, DEF_STR( 2C_3C ) ) - PORT_DIPSETTING( 0x08, DEF_STR( 1C_2C ) ) - PORT_DIPSETTING( 0x10, DEF_STR( 1C_3C ) ) - PORT_DIPSETTING( 0x18, DEF_STR( 1C_6C ) ) + PORT_DIPSETTING( 0x38, DEF_STR( 6C_1C ) ) + PORT_DIPSETTING( 0x30, DEF_STR( 3C_1C ) ) + PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) ) + PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) + PORT_DIPSETTING( 0x28, DEF_STR( 2C_3C ) ) + PORT_DIPSETTING( 0x08, DEF_STR( 1C_2C ) ) + PORT_DIPSETTING( 0x10, DEF_STR( 1C_3C ) ) + PORT_DIPSETTING( 0x18, DEF_STR( 1C_6C ) ) /* PORT_BIT( 0x40, IP_ACTIVE_HIGH , IPT_VBLANK ) freezes frame, could be vblank ?*/ PORT_DIPNAME( 0x40, 0x00, "Freeze" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x40, DEF_STR( On ) ) + PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x40, DEF_STR( On ) ) /* PORT_DIPNAME( 0x80, 0x00, "Free Run" ) */ PORT_DIPNAME( 0x80, 0x00, "Invulnerability (Cheat)" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) /* test mode, you are invulnerable */ - PORT_DIPSETTING( 0x80, DEF_STR( On ) ) /* to 'static' objects */ + PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) /* test mode, you are invulnerable */ + PORT_DIPSETTING( 0x80, DEF_STR( On ) ) /* to 'static' objects */ PORT_START("DSW2") PORT_DIPNAME( 0x03, 0x01, DEF_STR( Lives ) ) - PORT_DIPSETTING( 0x00, "2" ) - PORT_DIPSETTING( 0x01, "3" ) - PORT_DIPSETTING( 0x02, "5" ) - PORT_DIPSETTING( 0x03, "7" ) + PORT_DIPSETTING( 0x00, "2" ) + PORT_DIPSETTING( 0x01, "3" ) + PORT_DIPSETTING( 0x02, "5" ) + PORT_DIPSETTING( 0x03, "7" ) PORT_DIPNAME( 0x0c, 0x00, DEF_STR( Bonus_Life ) ) - PORT_DIPSETTING( 0x04, "20000" ) - PORT_DIPSETTING( 0x08, "50000" ) - PORT_DIPSETTING( 0x0c, "100000" ) - PORT_DIPSETTING( 0x00, DEF_STR( None ) ) + PORT_DIPSETTING( 0x04, "20000" ) + PORT_DIPSETTING( 0x08, "50000" ) + PORT_DIPSETTING( 0x0c, "100000" ) + PORT_DIPSETTING( 0x00, DEF_STR( None ) ) PORT_DIPNAME( 0x30, 0x00, DEF_STR( Difficulty ) ) - PORT_DIPSETTING( 0x00, "A" ) - PORT_DIPSETTING( 0x10, "B" ) - PORT_DIPSETTING( 0x20, "C" ) - PORT_DIPSETTING( 0x30, "D" ) + PORT_DIPSETTING( 0x00, "A" ) + PORT_DIPSETTING( 0x10, "B" ) + PORT_DIPSETTING( 0x20, "C" ) + PORT_DIPSETTING( 0x30, "D" ) PORT_DIPNAME( 0x40, 0x00, DEF_STR(Cabinet) ) - PORT_DIPSETTING( 0x00, DEF_STR( Upright ) ) - PORT_DIPSETTING( 0x40, DEF_STR( Cocktail ) ) + PORT_DIPSETTING( 0x00, DEF_STR( Upright ) ) + PORT_DIPSETTING( 0x40, DEF_STR( Cocktail ) ) PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPSETTING( 0x80, DEF_STR( On ) ) @@ -203,8 +203,8 @@ static GFXDECODE_START( rollrace ) GFXDECODE_ENTRY( "gfx1", 0x0800, charlayout, 0, 32 ) GFXDECODE_ENTRY( "gfx1", 0x1000, charlayout, 0, 32 ) GFXDECODE_ENTRY( "gfx1", 0x1800, charlayout, 0, 32 ) - GFXDECODE_ENTRY( "gfx2", 0x0000, charlayout2, 0, 32 ) /* for the road */ - GFXDECODE_ENTRY( "gfx3", 0x0000, spritelayout, 0, 32 ) /* sprites */ + GFXDECODE_ENTRY( "gfx2", 0x0000, charlayout2, 0, 32 ) /* for the road */ + GFXDECODE_ENTRY( "gfx3", 0x0000, spritelayout, 0, 32 ) /* sprites */ GFXDECODE_ENTRY( "gfx4", 0x0000, spritelayout, 0, 32 ) GFXDECODE_ENTRY( "gfx5", 0x0000, spritelayout, 0, 32 ) GFXDECODE_END @@ -280,12 +280,12 @@ ROM_START( fightrol ) ROM_LOAD ( "7.18k", 0x2000, 0x2000, CRC(27843afa) SHA1(81d3031a2c06086461110696a0ee11d32992ecac) ) ROM_LOAD ( "5.20f", 0x4000, 0x2000, CRC(51dd0108) SHA1(138c0aba6c952204e794216193def17b390c4ba2) ) - ROM_REGION( 0x6000, "gfx3",0 ) /* sprite bank 0*/ + ROM_REGION( 0x6000, "gfx3",0 ) /* sprite bank 0*/ ROM_LOAD ( "8.17m", 0x0000, 0x2000, CRC(08ad783e) SHA1(fea91e41916cfc7b29c5f9a578e2c82a54f66829) ) ROM_LOAD ( "9.17r", 0x2000, 0x2000, CRC(69b23461) SHA1(73eca5e721425f37df311454bd5b4e632b096eba) ) ROM_LOAD ( "10.17t", 0x4000, 0x2000, CRC(ba6ccd8c) SHA1(29a13e3161aba4db080434685869f8b79ad7997c) ) - ROM_REGION( 0x6000, "gfx4",0 ) /* sprite bank 1*/ + ROM_REGION( 0x6000, "gfx4",0 ) /* sprite bank 1*/ ROM_LOAD ( "11.18m", 0x0000, 0x2000, CRC(06a5d849) SHA1(b9f604edf4fdc053b738041493aef91dd730fe6b) ) ROM_LOAD ( "12.18r", 0x2000, 0x2000, CRC(569815ef) SHA1(db261799892f60b2274b73fb25cde58219bb44db) ) ROM_LOAD ( "13.18t", 0x4000, 0x2000, CRC(4f8af872) SHA1(6c07ff0733b8d8440309c9ae0db0876587b740a6) ) @@ -327,12 +327,12 @@ ROM_START( rollace ) ROM_LOAD ( "7.18k", 0x2000, 0x2000, CRC(27843afa) SHA1(81d3031a2c06086461110696a0ee11d32992ecac) ) ROM_LOAD ( "5.20f", 0x4000, 0x2000, CRC(51dd0108) SHA1(138c0aba6c952204e794216193def17b390c4ba2) ) - ROM_REGION( 0x6000, "gfx3",0 ) /* sprite bank 0*/ + ROM_REGION( 0x6000, "gfx3",0 ) /* sprite bank 0*/ ROM_LOAD ( "w8.17m", 0x0000, 0x2000, CRC(e2afe3a3) SHA1(a83a12c0c6c62e45add916a6993f0ad06840c4d9) ) ROM_LOAD ( "w9.17p", 0x2000, 0x2000, CRC(8a8e6b62) SHA1(6e7d4a84b7c78e009bce0641e357f74c8ac9e5ac) ) ROM_LOAD ( "w10.17t", 0x4000, 0x2000, CRC(70bf7b23) SHA1(6774eceb0bfea66156ecd837f9d0adbdf8dec8ee) ) - ROM_REGION( 0x6000, "gfx4",0 ) /* sprite bank 1*/ + ROM_REGION( 0x6000, "gfx4",0 ) /* sprite bank 1*/ ROM_LOAD ( "11.18m", 0x0000, 0x2000, CRC(06a5d849) SHA1(b9f604edf4fdc053b738041493aef91dd730fe6b) ) ROM_LOAD ( "12.18r", 0x2000, 0x2000, CRC(569815ef) SHA1(db261799892f60b2274b73fb25cde58219bb44db) ) ROM_LOAD ( "13.18t", 0x4000, 0x2000, CRC(4f8af872) SHA1(6c07ff0733b8d8440309c9ae0db0876587b740a6) ) @@ -375,12 +375,12 @@ ROM_START( rollace2 ) ROM_LOAD ( "7.18k", 0x2000, 0x2000, CRC(27843afa) SHA1(81d3031a2c06086461110696a0ee11d32992ecac) ) ROM_LOAD ( "5.20f", 0x4000, 0x2000, CRC(51dd0108) SHA1(138c0aba6c952204e794216193def17b390c4ba2) ) - ROM_REGION( 0x6000, "gfx3",0 ) /* sprite bank 0*/ + ROM_REGION( 0x6000, "gfx3",0 ) /* sprite bank 0*/ ROM_LOAD ( "17n.764",0x0000, 0x2000, CRC(3365703c) SHA1(7cf374ba25f4fd163a66c0aea74ddfd3003c7992) ) ROM_LOAD ( "9.17r", 0x2000, 0x2000, CRC(69b23461) SHA1(73eca5e721425f37df311454bd5b4e632b096eba) ) ROM_LOAD ( "17t.764",0x4000, 0x2000, CRC(5e84cc9b) SHA1(33cdf7b756ade8c0dd1dcdad583af4de02cd51eb) ) - ROM_REGION( 0x6000, "gfx4",0 ) /* sprite bank 1*/ + ROM_REGION( 0x6000, "gfx4",0 ) /* sprite bank 1*/ ROM_LOAD ( "11.18m", 0x0000, 0x2000, CRC(06a5d849) SHA1(b9f604edf4fdc053b738041493aef91dd730fe6b) ) ROM_LOAD ( "12.18r", 0x2000, 0x2000, CRC(569815ef) SHA1(db261799892f60b2274b73fb25cde58219bb44db) ) ROM_LOAD ( "13.18t", 0x4000, 0x2000, CRC(4f8af872) SHA1(6c07ff0733b8d8440309c9ae0db0876587b740a6) ) diff --git a/src/mame/drivers/roul.c b/src/mame/drivers/roul.c index 03b3e02118f..8945d1b88cb 100644 --- a/src/mame/drivers/roul.c +++ b/src/mame/drivers/roul.c @@ -138,8 +138,8 @@ static WRITE8_HANDLER( blitter_cmd_w ) static WRITE8_HANDLER( sound_latch_w ) { - soundlatch_w(space, 0, data & 0xff); - cputag_set_input_line(space->machine, "soundcpu", 0, HOLD_LINE); + soundlatch_w(space, 0, data & 0xff); + cputag_set_input_line(space->machine, "soundcpu", 0, HOLD_LINE); } static WRITE8_HANDLER( ball_w ) @@ -255,7 +255,7 @@ static MACHINE_DRIVER_START( roul ) MDRV_PALETTE_INIT(roul) - /* video hardware */ + /* video hardware */ MDRV_SCREEN_ADD("screen", RASTER) MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16) MDRV_SCREEN_REFRESH_RATE(60) diff --git a/src/mame/drivers/route16.c b/src/mame/drivers/route16.c index 8b178aa94a4..e0dd0892de5 100644 --- a/src/mame/drivers/route16.c +++ b/src/mame/drivers/route16.c @@ -242,7 +242,7 @@ static ADDRESS_MAP_START( routex_cpu1_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x4800, 0x4800) AM_READ_PORT("DSW") AM_WRITE(route16_out0_w) AM_RANGE(0x5000, 0x5000) AM_READ_PORT("P1") AM_WRITE(route16_out1_w) AM_RANGE(0x5800, 0x5800) AM_READ_PORT("P2") - AM_RANGE(0x6400, 0x6400) AM_READ(routex_prot_read) + AM_RANGE(0x6400, 0x6400) AM_READ(routex_prot_read) AM_RANGE(0x8000, 0xbfff) AM_RAM AM_BASE(&route16_videoram1) AM_SIZE(&route16_videoram_size) ADDRESS_MAP_END diff --git a/src/mame/drivers/royalmah.c b/src/mame/drivers/royalmah.c index fe8be3f9489..6a0a9cf6346 100644 --- a/src/mame/drivers/royalmah.c +++ b/src/mame/drivers/royalmah.c @@ -3386,14 +3386,14 @@ ROM_END ROM_START( janputer ) ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF ) - ROM_LOAD( "1.bin", 0x0000, 0x2000, CRC(f36f4222) SHA1(ce18c273a59f86cb17ea6ba8a3daefc3d750df1e) ) - ROM_LOAD( "2.bin", 0x2000, 0x2000, CRC(7d57cb48) SHA1(38b97c5d02e3ab6187e5e0f86c06b8a3747b51a8) ) - ROM_LOAD( "3.bin", 0x4000, 0x2000, CRC(fb481d9a) SHA1(122e2b0d11fe1fe8cf219da9c8f96fe5a1016bb6) ) - ROM_LOAD( "7.bin", 0x6000, 0x1000, CRC(bb00fb9e) SHA1(4d2965a0339328d1700b39c166a5a92a96b05e67) ) - - ROM_REGION( 0x20, "proms", 0 ) - /* taken from Royal Mahjong, might or might not be the same. */ - ROM_LOAD( "82s123.prm", 0x00, 0x20, BAD_DUMP CRC(d3007282) SHA1(e4d863ab193e49208ed0f59dcddb1da0492314f6) ) + ROM_LOAD( "1.bin", 0x0000, 0x2000, CRC(f36f4222) SHA1(ce18c273a59f86cb17ea6ba8a3daefc3d750df1e) ) + ROM_LOAD( "2.bin", 0x2000, 0x2000, CRC(7d57cb48) SHA1(38b97c5d02e3ab6187e5e0f86c06b8a3747b51a8) ) + ROM_LOAD( "3.bin", 0x4000, 0x2000, CRC(fb481d9a) SHA1(122e2b0d11fe1fe8cf219da9c8f96fe5a1016bb6) ) + ROM_LOAD( "7.bin", 0x6000, 0x1000, CRC(bb00fb9e) SHA1(4d2965a0339328d1700b39c166a5a92a96b05e67) ) + + ROM_REGION( 0x20, "proms", 0 ) + /* taken from Royal Mahjong, might or might not be the same. */ + ROM_LOAD( "82s123.prm", 0x00, 0x20, BAD_DUMP CRC(d3007282) SHA1(e4d863ab193e49208ed0f59dcddb1da0492314f6) ) ROM_END /*************************************************************************** @@ -3506,13 +3506,13 @@ ROM_END ROM_START( tontonb ) ROM_REGION( 0x90000, "maincpu", 0 ) - ROM_LOAD( "091.5e", 0x00000, 0x10000, CRC(d8d67b59) SHA1(7e7a85df738f80fc031cda8a104ac9c7b3e24785) ) + ROM_LOAD( "091.5e", 0x00000, 0x10000, CRC(d8d67b59) SHA1(7e7a85df738f80fc031cda8a104ac9c7b3e24785) ) /* bank switched ROMs follow */ ROM_RELOAD( 0x10000, 0x10000 ) // 0,1 /**/ // 2,3 unused - ROM_LOAD( "093.5b", 0x30000, 0x10000, CRC(24b6be55) SHA1(11390d6ed55d7d0b7b84c6d36d4ac5330a06abba) ) // 4,5 + ROM_LOAD( "093.5b", 0x30000, 0x10000, CRC(24b6be55) SHA1(11390d6ed55d7d0b7b84c6d36d4ac5330a06abba) ) // 4,5 /**/ // 6,7 unused - ROM_LOAD( "092.5c", 0x50000, 0x10000, CRC(7ff2738b) SHA1(89a49f89705f499439dc024fc70c87141a84780b) ) // 8,9 + ROM_LOAD( "092.5c", 0x50000, 0x10000, CRC(7ff2738b) SHA1(89a49f89705f499439dc024fc70c87141a84780b) ) // 8,9 ROM_REGION( 0x0020, "proms", 0 ) ROM_LOAD( "ic6k.bin", 0x0000, 0x0020, CRC(97e1defe) SHA1(b5002218b2292f7623dd9a205ce183dedeec03f1) ) @@ -4526,7 +4526,7 @@ ROM_START( mjyarou ) ROM_LOAD( "7", 0x0000, 0x1000, CRC(dd144b90) SHA1(56b2c4472aaec49d9fddc99d8aa718b17655812c) ) ROM_REGION( 0x0040, "proms", 0 ) - ROM_LOAD( "4.6k", 0x0000, 0x0020, CRC(41bd4d69) SHA1(4d2da761b338b62b2ea151c201063a24d6e4cc97) ) + ROM_LOAD( "4.6k", 0x0000, 0x0020, CRC(41bd4d69) SHA1(4d2da761b338b62b2ea151c201063a24d6e4cc97) ) ROM_LOAD( "82s123n.ic7", 0x0020, 0x0020, CRC(46014727) SHA1(eec451f292ee319fa6bfbbf223aaa12b231692c1) ) ROM_REGION( 0x0200, "user1", 0 ) //? diff --git a/src/mame/drivers/safarir.c b/src/mame/drivers/safarir.c index 8780258f9c6..3fd97aa8ca2 100644 --- a/src/mame/drivers/safarir.c +++ b/src/mame/drivers/safarir.c @@ -321,7 +321,7 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x2800, 0x2800) AM_MIRROR(0x03ff) AM_READNOP AM_WRITE(ram_bank_w) AM_RANGE(0x2c00, 0x2cff) AM_MIRROR(0x03ff) AM_READNOP AM_WRITEONLY AM_BASE(&bg_scroll) AM_RANGE(0x3000, 0x30ff) AM_MIRROR(0x03ff) AM_WRITE(safarir_audio_w) /* goes to SN76477 */ - AM_RANGE(0x3400, 0x3400) AM_MIRROR(0x03ff) AM_WRITENOP /* cleared at the beginning */ + AM_RANGE(0x3400, 0x3400) AM_MIRROR(0x03ff) AM_WRITENOP /* cleared at the beginning */ AM_RANGE(0x3800, 0x38ff) AM_MIRROR(0x03ff) AM_READ_PORT("INPUTS") AM_WRITENOP AM_RANGE(0x3c00, 0x3cff) AM_MIRROR(0x03ff) AM_READ_PORT("DSW") AM_WRITENOP ADDRESS_MAP_END @@ -377,7 +377,7 @@ INPUT_PORTS_END static MACHINE_DRIVER_START( safarir ) - /* basic machine hardware */ + /* basic machine hardware */ MDRV_CPU_ADD("maincpu", 8085A, 18000000/8) /* 2.25 MHz ? */ MDRV_CPU_PROGRAM_MAP(main_map) diff --git a/src/mame/drivers/sandscrp.c b/src/mame/drivers/sandscrp.c index 0bab00f1a97..d62bea5e4b7 100644 --- a/src/mame/drivers/sandscrp.c +++ b/src/mame/drivers/sandscrp.c @@ -130,7 +130,7 @@ static VIDEO_EOF( sandscrp ) /* Reads the cause of the interrupt */ static READ16_HANDLER( sandscrp_irq_cause_r ) { - return ( sprite_irq ? 0x08 : 0 ) | + return ( sprite_irq ? 0x08 : 0 ) | ( unknown_irq ? 0x10 : 0 ) | ( vblank_irq ? 0x20 : 0 ) ; } @@ -434,7 +434,7 @@ static const ym2203_interface ym2203_intf_sandscrp = static const kaneko_pandora_interface sandscrp_pandora_config = { "screen", /* screen tag */ - 0, /* gfx_region */ + 0, /* gfx_region */ 0, 0 /* x_offs, y_offs */ }; diff --git a/src/mame/drivers/sbrkout.c b/src/mame/drivers/sbrkout.c index 19bbd3d6bbc..f279e876569 100644 --- a/src/mame/drivers/sbrkout.c +++ b/src/mame/drivers/sbrkout.c @@ -478,7 +478,7 @@ GFXDECODE_END static MACHINE_DRIVER_START( sbrkout ) /* basic machine hardware */ - MDRV_CPU_ADD("maincpu", M6502,MAIN_CLOCK/16) /* 375 KHz? Should be 750KHz? */ + MDRV_CPU_ADD("maincpu", M6502,MAIN_CLOCK/16) /* 375 KHz? Should be 750KHz? */ MDRV_CPU_PROGRAM_MAP(main_map) MDRV_MACHINE_START(sbrkout) diff --git a/src/mame/drivers/seattle.c b/src/mame/drivers/seattle.c index 7b68aa20ba7..156a71a6d47 100644 --- a/src/mame/drivers/seattle.c +++ b/src/mame/drivers/seattle.c @@ -395,7 +395,7 @@ struct _galileo_data UINT32 reg[0x1000/4]; /* timer info */ - galileo_timer timer[4]; + galileo_timer timer[4]; /* DMA info */ INT8 dma_active; diff --git a/src/mame/drivers/segac2.c b/src/mame/drivers/segac2.c index 1c0e4c2526f..63f39bea723 100644 --- a/src/mame/drivers/segac2.c +++ b/src/mame/drivers/segac2.c @@ -92,11 +92,11 @@ static int segac2_enable_display; ******************************************************************************/ /* internal states */ -static UINT8 misc_io_data[0x10]; /* holds values written to the I/O chip */ +static UINT8 misc_io_data[0x10]; /* holds values written to the I/O chip */ /* protection-related tracking */ static int (*prot_func)(int in); /* emulation of protection chip */ -static UINT8 prot_write_buf; /* remembers what was written */ +static UINT8 prot_write_buf; /* remembers what was written */ static UINT8 prot_read_buf; /* remembers what was returned */ /* palette-related variables */ @@ -246,7 +246,7 @@ static WRITE16_HANDLER( palette_w ) megadrive_vdp_palette_lookup_shadow[offset] = (tmpb) | (tmpg<<5) | (tmpr<<10); // how is it calculated on c2? - tmpr = tmpr|0x10; tmpg = tmpg|0x10; tmpb = tmpb|0x10; + tmpr = tmpr|0x10; tmpg = tmpg|0x10; tmpb = tmpb|0x10; megadrive_vdp_palette_lookup_highlight[offset] = (tmpb) | (tmpg<<5) | (tmpr<<10); } @@ -1173,14 +1173,14 @@ static INPUT_PORTS_START( pclub ) PORT_INCLUDE( systemc_generic ) PORT_MODIFY("P1") - PORT_BIT( 0x0f, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* Probably Unused */ + PORT_BIT( 0x0f, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* Probably Unused */ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Ok") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Cancel") PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_2WAY PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_2WAY PORT_MODIFY("P2") - PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* Probably Unused */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* Probably Unused */ PORT_MODIFY("SERVICE") PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* Probably Unused */ @@ -1243,14 +1243,14 @@ static INPUT_PORTS_START( pclubjv2 ) PORT_INCLUDE( systemc_generic ) PORT_MODIFY("P1") - PORT_BIT( 0x0f, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* Probably Unused */ + PORT_BIT( 0x0f, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* Probably Unused */ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Ok") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Cancel") PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_2WAY PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_2WAY PORT_MODIFY("P2") - PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* Probably Unused */ + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* Probably Unused */ PORT_MODIFY("SERVICE") PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* Probably Unused */ diff --git a/src/mame/drivers/segald.c b/src/mame/drivers/segald.c index 9a9190a774a..665ef57df77 100644 --- a/src/mame/drivers/segald.c +++ b/src/mame/drivers/segald.c @@ -312,13 +312,13 @@ static INPUT_PORTS_START( astron ) PORT_START("IN1") PORT_BIT ( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) /* SW8 = nonJAMMA pin 9 = right */ - PORT_BIT ( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) /* SW9 = nonJAMMA pin 10 = left */ - PORT_BIT ( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) /* SW10 = nonJAMMA pin 11 = up */ - PORT_BIT ( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) /* SW11 = nonJAMMA pin 12 = down */ - PORT_BIT ( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) /* SW12 = nonJAMMA pin 13 = fire */ - PORT_BIT ( 0x20, IP_ACTIVE_LOW, IPT_UNUSED ) /* SW13 = nonJAMMA pin 14 = unused? */ - PORT_BIT ( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* SW14 = nonJAMMA pin V = unused? */ - PORT_BIT ( 0x80, IP_ACTIVE_LOW, IPT_UNUSED ) /* SW15 = nonJAMMA pin W = unused? */ + PORT_BIT ( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) /* SW9 = nonJAMMA pin 10 = left */ + PORT_BIT ( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) /* SW10 = nonJAMMA pin 11 = up */ + PORT_BIT ( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) /* SW11 = nonJAMMA pin 12 = down */ + PORT_BIT ( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) /* SW12 = nonJAMMA pin 13 = fire */ + PORT_BIT ( 0x20, IP_ACTIVE_LOW, IPT_UNUSED ) /* SW13 = nonJAMMA pin 14 = unused? */ + PORT_BIT ( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* SW14 = nonJAMMA pin V = unused? */ + PORT_BIT ( 0x80, IP_ACTIVE_LOW, IPT_UNUSED ) /* SW15 = nonJAMMA pin W = unused? */ INPUT_PORTS_END static GFXDECODE_START( segald ) @@ -385,7 +385,7 @@ ROM_START( astron ) ROM_LOAD( "5279", 0x000, 0x200, CRC(8716aeb5) SHA1(9a8bf599d025d039b12bc616850386f280b4df11) ) /* Currently unused PROMs */ - ROM_REGION( 0x1000, "user1", 0 ) + ROM_REGION( 0x1000, "user1", 0 ) ROM_LOAD( "pr-5278.bin", 0x000, 0x100, CRC(e81613da) SHA1(fc32141f7c0c8c0c1ed623636af3862a4ef0e940) ) ROM_LOAD( "pr-5277.bin", 0x100, 0x100, CRC(bf2c33ab) SHA1(4a83b3e9b74b900621e8f42edf94cc04b791cdd0) ) ROM_LOAD( "pr-5276.bin", 0x200, 0x20, CRC(91267e8a) SHA1(ae5bd8efea5322c4d9986d06680a781392f9a642) ) @@ -418,7 +418,7 @@ ROM_START( astronp ) ROM_LOAD( "5279", 0x000, 0x200, CRC(8716aeb5) SHA1(9a8bf599d025d039b12bc616850386f280b4df11) ) /* Currently unused PROMs */ - ROM_REGION( 0x1000, "user1", 0 ) + ROM_REGION( 0x1000, "user1", 0 ) ROM_LOAD( "pr-5278.bin", 0x000, 0x100, CRC(e81613da) SHA1(fc32141f7c0c8c0c1ed623636af3862a4ef0e940) ) ROM_LOAD( "pr-5277.bin", 0x100, 0x100, CRC(bf2c33ab) SHA1(4a83b3e9b74b900621e8f42edf94cc04b791cdd0) ) ROM_LOAD( "pr-5276.bin", 0x200, 0x20, CRC(91267e8a) SHA1(ae5bd8efea5322c4d9986d06680a781392f9a642) ) @@ -453,7 +453,7 @@ ROM_START( galaxyr ) ROM_LOAD( "5279", 0x000, 0x200, CRC(8716aeb5) SHA1(9a8bf599d025d039b12bc616850386f280b4df11) ) /* Currently unused PROMs */ - ROM_REGION( 0x1000, "user1", 0 ) + ROM_REGION( 0x1000, "user1", 0 ) ROM_LOAD( "pr-5278.bin", 0x000, 0x100, CRC(e81613da) SHA1(fc32141f7c0c8c0c1ed623636af3862a4ef0e940) ) ROM_LOAD( "pr-5277.bin", 0x100, 0x100, CRC(bf2c33ab) SHA1(4a83b3e9b74b900621e8f42edf94cc04b791cdd0) ) ROM_LOAD( "pr-5276.bin", 0x200, 0x20, CRC(91267e8a) SHA1(ae5bd8efea5322c4d9986d06680a781392f9a642) ) @@ -488,7 +488,7 @@ ROM_START( galaxyrp ) ROM_LOAD( "5279", 0x000, 0x200, CRC(8716aeb5) SHA1(9a8bf599d025d039b12bc616850386f280b4df11) ) /* Currently unused PROMs */ - ROM_REGION( 0x1000, "user1", 0 ) + ROM_REGION( 0x1000, "user1", 0 ) ROM_LOAD( "pr-5278.bin", 0x000, 0x100, CRC(e81613da) SHA1(fc32141f7c0c8c0c1ed623636af3862a4ef0e940) ) ROM_LOAD( "pr-5277.bin", 0x100, 0x100, CRC(bf2c33ab) SHA1(4a83b3e9b74b900621e8f42edf94cc04b791cdd0) ) ROM_LOAD( "pr-5276.bin", 0x200, 0x20, CRC(91267e8a) SHA1(ae5bd8efea5322c4d9986d06680a781392f9a642) ) @@ -523,7 +523,7 @@ ROM_START( sblazerp ) ROM_LOAD( "5279", 0x000, 0x200, CRC(8716aeb5) SHA1(9a8bf599d025d039b12bc616850386f280b4df11) ) /* Currently unused PROMs */ - ROM_REGION( 0x1000, "user1", 0 ) + ROM_REGION( 0x1000, "user1", 0 ) ROM_LOAD( "pr-5278.bin", 0x000, 0x100, CRC(e81613da) SHA1(fc32141f7c0c8c0c1ed623636af3862a4ef0e940) ) ROM_LOAD( "pr-5277.bin", 0x100, 0x100, CRC(bf2c33ab) SHA1(4a83b3e9b74b900621e8f42edf94cc04b791cdd0) ) ROM_LOAD( "pr-5276.bin", 0x200, 0x20, CRC(91267e8a) SHA1(ae5bd8efea5322c4d9986d06680a781392f9a642) ) @@ -554,7 +554,7 @@ ROM_START( cobraseg ) ROM_LOAD( "ic-13.bin", 0x000, 0x200, CRC(3547a14c) SHA1(5b8e3ddac0f6fda940b69343fdce7d5caead7a35) ) /* Currently unused PROMs */ - ROM_REGION( 0x1000, "user1", 0 ) + ROM_REGION( 0x1000, "user1", 0 ) ROM_LOAD( "pr-5278.bin", 0x000, 0x100, CRC(e81613da) SHA1(fc32141f7c0c8c0c1ed623636af3862a4ef0e940) ) ROM_LOAD( "pr-5277.bin", 0x100, 0x100, CRC(bf2c33ab) SHA1(4a83b3e9b74b900621e8f42edf94cc04b791cdd0) ) ROM_LOAD( "pr-5276.bin", 0x200, 0x20, CRC(91267e8a) SHA1(ae5bd8efea5322c4d9986d06680a781392f9a642) ) diff --git a/src/mame/drivers/segamsys.c b/src/mame/drivers/segamsys.c index 7ef18519362..caac7daee2f 100644 --- a/src/mame/drivers/segamsys.c +++ b/src/mame/drivers/segamsys.c @@ -554,7 +554,7 @@ static UINT8 vdp_ctrl_r(const address_space *space, struct sms_vdp *chip) UINT8 retvalue; retvalue = (chip->frame_irq_pending<<7) | - (chip->sprite_overflow<<6) | + (chip->sprite_overflow<<6) | (chip->sprite_collision<<5); chip->cmd_pend = 0; diff --git a/src/mame/drivers/segaorun.c b/src/mame/drivers/segaorun.c index 514adb91f95..1f49a94859d 100644 --- a/src/mame/drivers/segaorun.c +++ b/src/mame/drivers/segaorun.c @@ -281,8 +281,8 @@ Notes: #include "outrun.lh" -#define MASTER_CLOCK (XTAL_40MHz) -#define SOUND_CLOCK (XTAL_16MHz) +#define MASTER_CLOCK (XTAL_40MHz) +#define SOUND_CLOCK (XTAL_16MHz) #define MASTER_CLOCK_25MHz (XTAL_25_1748MHz) @@ -1489,18 +1489,18 @@ ROM_START( outrunb ) ROM_LOAD( "a-16.bin", 0x20000, 0x10000, CRC(98dd4d15) SHA1(914ebcb330455ab35968b4add4d94be123a185a5) ) ROM_REGION32_LE( 0x100000, "gfx2", 0 ) /* sprites */ - ROM_LOAD32_BYTE( "a-18.bin", 0x00000, 0x10000, CRC(77377e00) SHA1(4f376b05692f33d529f4c058dac989136c808ca1) ) - ROM_LOAD32_BYTE( "a-20.bin", 0x00001, 0x10000, CRC(69ecc975) SHA1(3560e9a31fc71e263a6ff61224b8db2b17836075) ) - ROM_LOAD32_BYTE( "a-22.bin", 0x00002, 0x10000, CRC(b6a8d0e2) SHA1(6184700dbe2c8c9c91f220e246501b7a865e4a05) ) - ROM_LOAD32_BYTE( "a-24.bin", 0x00003, 0x10000, CRC(d632d8a2) SHA1(27ca6faaa073bd01b2be959dba0359f93e8c1ec1) ) + ROM_LOAD32_BYTE( "a-18.bin", 0x00000, 0x10000, CRC(77377e00) SHA1(4f376b05692f33d529f4c058dac989136c808ca1) ) + ROM_LOAD32_BYTE( "a-20.bin", 0x00001, 0x10000, CRC(69ecc975) SHA1(3560e9a31fc71e263a6ff61224b8db2b17836075) ) + ROM_LOAD32_BYTE( "a-22.bin", 0x00002, 0x10000, CRC(b6a8d0e2) SHA1(6184700dbe2c8c9c91f220e246501b7a865e4a05) ) + ROM_LOAD32_BYTE( "a-24.bin", 0x00003, 0x10000, CRC(d632d8a2) SHA1(27ca6faaa073bd01b2be959dba0359f93e8c1ec1) ) ROM_LOAD32_BYTE( "a-26.bin", 0x40000, 0x10000, CRC(4f784236) SHA1(1fb610fd29d3ddd8c5d4892ae215386b18552e6f) ) ROM_LOAD32_BYTE( "a-28.bin", 0x40001, 0x10000, CRC(ee4f7154) SHA1(3a84c1b19d9dfcd5310e9cee90c0d4562a4a7786) ) ROM_LOAD32_BYTE( "a-30.bin", 0x40002, 0x10000, CRC(e9880aa3) SHA1(cc47f631e758bd856bbc6d010fe230f9b1ed29de) ) ROM_LOAD32_BYTE( "a-32.bin", 0x40003, 0x10000, CRC(dc286dc2) SHA1(eaa245b81f8a324988f617467fc3134a39b59c65) ) - ROM_LOAD32_BYTE( "a-19.bin", 0x80000, 0x10000, CRC(2c0e7277) SHA1(cf14d1ca1fba2e2687998c04ad2ab8c629917412) ) - ROM_LOAD32_BYTE( "a-21.bin", 0x80001, 0x10000, CRC(54761e57) SHA1(dc0fc645eb998675ab9fe683d63d4ee57ae23693) ) - ROM_LOAD32_BYTE( "a-23.bin", 0x80002, 0x10000, CRC(a00d0676) SHA1(c2ab29a7489c6f774ce26ef023758215ea3f7050) ) - ROM_LOAD32_BYTE( "a-25.bin", 0x80003, 0x10000, CRC(da398368) SHA1(115b2881d2d5ddeda2ce82bb209a2c0b4acfcae4) ) + ROM_LOAD32_BYTE( "a-19.bin", 0x80000, 0x10000, CRC(2c0e7277) SHA1(cf14d1ca1fba2e2687998c04ad2ab8c629917412) ) + ROM_LOAD32_BYTE( "a-21.bin", 0x80001, 0x10000, CRC(54761e57) SHA1(dc0fc645eb998675ab9fe683d63d4ee57ae23693) ) + ROM_LOAD32_BYTE( "a-23.bin", 0x80002, 0x10000, CRC(a00d0676) SHA1(c2ab29a7489c6f774ce26ef023758215ea3f7050) ) + ROM_LOAD32_BYTE( "a-25.bin", 0x80003, 0x10000, CRC(da398368) SHA1(115b2881d2d5ddeda2ce82bb209a2c0b4acfcae4) ) ROM_LOAD32_BYTE( "a-27.bin", 0xc0000, 0x10000, CRC(8d459356) SHA1(143914b1ac074708fed1d89072f915424aeb841e) ) ROM_LOAD32_BYTE( "a-29.bin", 0xc0001, 0x10000, CRC(a8245727) SHA1(13c1d417078d91b8c97e35d632e1ac4bc9bd64e3) ) ROM_LOAD32_BYTE( "a-31.bin", 0xc0002, 0x10000, CRC(ef7d06fe) SHA1(541b5ba45f4140e2cc29a9da2592b476d414af5d) ) diff --git a/src/mame/drivers/segas16b.c b/src/mame/drivers/segas16b.c index de79ecfb84f..ea921e905ea 100644 --- a/src/mame/drivers/segas16b.c +++ b/src/mame/drivers/segas16b.c @@ -4196,7 +4196,7 @@ ROM_END ROM Board: 171-5704 */ ROM_START( cottonu ) - ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 code */ + ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 code */ ROM_LOAD16_BYTE( "cotton.a7", 0x000000, 0x20000, CRC(e7ef7d10) SHA1(de70ebf04d78e938bf568df158a47b377ddb3dc5) ) ROM_LOAD16_BYTE( "cotton.a5", 0x000001, 0x20000, CRC(abe4f83e) SHA1(128f1815ecb27ee2a93e9d0708fdf6733dd1ab46) ) /* empty 0x40000 - 0x80000 */ diff --git a/src/mame/drivers/segas18.c b/src/mame/drivers/segas18.c index 06bcf462fd8..d0eba185250 100644 --- a/src/mame/drivers/segas18.c +++ b/src/mame/drivers/segas18.c @@ -845,7 +845,7 @@ static INPUT_PORTS_START( bloxeed ) PORT_DIPSETTING( 0x00, "D" ) /* 2 Start / 1 Continue | 2 Start / 2 Continue */ PORT_DIPNAME( 0x08, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SWB:4") PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_DIPNAME( 0x30, 0x30, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SWB:5,6") PORT_DIPSETTING( 0x20, DEF_STR( Easy ) ) PORT_DIPSETTING( 0x30, DEF_STR( Normal ) ) @@ -1061,8 +1061,8 @@ static INPUT_PORTS_START( lghost ) PORT_DIPNAME( 0x1c, 0x1c, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SWB:3,4,5") PORT_DIPSETTING( 0x0c, DEF_STR( Easiest ) ) PORT_DIPSETTING( 0x14, DEF_STR( Easier ) ) - PORT_DIPSETTING( 0x18, DEF_STR( Easy ) ) - PORT_DIPSETTING( 0x1c, DEF_STR( Normal ) ) + PORT_DIPSETTING( 0x18, DEF_STR( Easy ) ) + PORT_DIPSETTING( 0x1c, DEF_STR( Normal ) ) PORT_DIPSETTING( 0x10, DEF_STR( Hard ) ) PORT_DIPSETTING( 0x04, DEF_STR( Harder ) ) PORT_DIPSETTING( 0x08, DEF_STR( Hardest ) ) diff --git a/src/mame/drivers/segas24.c b/src/mame/drivers/segas24.c index e4f8ea18926..97bfa03db41 100644 --- a/src/mame/drivers/segas24.c +++ b/src/mame/drivers/segas24.c @@ -1107,7 +1107,7 @@ static MACHINE_RESET( system24 ) static INPUT_PORTS_START( system24_P1_P2 ) PORT_START("P1") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE2 ) //enabled with "Separate" PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1) @@ -1720,7 +1720,7 @@ static INPUT_PORTS_START( gground ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(3) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(3) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE4 ) //enabled with "Separate" - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(3) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(3) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(3) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(3) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(3) diff --git a/src/mame/drivers/seibuspi.c b/src/mame/drivers/seibuspi.c index 024a1da3e64..52143316b62 100644 --- a/src/mame/drivers/seibuspi.c +++ b/src/mame/drivers/seibuspi.c @@ -1882,7 +1882,7 @@ static MACHINE_DRIVER_START( spi ) MDRV_DS2404_ADD("ds2404", 1995, 1, 1) - /* video hardware */ + /* video hardware */ MDRV_SCREEN_ADD("screen", RASTER) MDRV_SCREEN_REFRESH_RATE(54) MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) @@ -2207,7 +2207,7 @@ static MACHINE_DRIVER_START( seibu386 ) MDRV_EEPROM_ADD("eeprom", eeprom_intf) - /* video hardware */ + /* video hardware */ MDRV_SCREEN_ADD("screen", RASTER) MDRV_SCREEN_REFRESH_RATE(54) MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) @@ -2265,7 +2265,7 @@ static MACHINE_DRIVER_START( sys386f2 ) MDRV_EEPROM_ADD("eeprom", eeprom_intf) - /* video hardware */ + /* video hardware */ MDRV_SCREEN_ADD("screen", RASTER) MDRV_SCREEN_REFRESH_RATE(54) MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) diff --git a/src/mame/drivers/sengokmj.c b/src/mame/drivers/sengokmj.c index 893ff558fde..15bf9428c2a 100644 --- a/src/mame/drivers/sengokmj.c +++ b/src/mame/drivers/sengokmj.c @@ -148,7 +148,7 @@ static INPUT_PORTS_START( sengokmj ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) PORT_DIPNAME( 0x0010, 0x0010, "Kamon" ) PORT_DIPLOCATION("SW1:5") PORT_DIPSETTING( 0x0010, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) + PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) PORT_DIPUNUSED_DIPLOC( 0x0020, 0x0020, "SW1:6" ) PORT_DIPNAME( 0x0040, 0x0040, "Out Sw" ) PORT_DIPLOCATION("SW1:7") PORT_DIPSETTING( 0x0040, DEF_STR( Off ) ) diff --git a/src/mame/drivers/senjyo.c b/src/mame/drivers/senjyo.c index a99c0d82f09..b68cb6ebf80 100644 --- a/src/mame/drivers/senjyo.c +++ b/src/mame/drivers/senjyo.c @@ -853,21 +853,21 @@ ROM_END ROM_START( baluba ) ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD( "0", 0x0000, 0x4000, CRC(0e2ebe32) SHA1(d5cac260b19dc4e8d2064a7e3de5d52ab0eb95d0) ) - ROM_LOAD( "1", 0x4000, 0x4000, CRC(cde97076) SHA1(ef47851b2ed0d820e1564545795b707d00d5c6ce) ) + ROM_LOAD( "0", 0x0000, 0x4000, CRC(0e2ebe32) SHA1(d5cac260b19dc4e8d2064a7e3de5d52ab0eb95d0) ) + ROM_LOAD( "1", 0x4000, 0x4000, CRC(cde97076) SHA1(ef47851b2ed0d820e1564545795b707d00d5c6ce) ) ROM_REGION( 0x10000, "sub", 0 ) /* 64k for sound board */ - ROM_LOAD( "2", 0x0000, 0x2000, CRC(441fbc64) SHA1(3853f80043e28e06a3ee399e3cd261b3ee94e0b9) ) + ROM_LOAD( "2", 0x0000, 0x2000, CRC(441fbc64) SHA1(3853f80043e28e06a3ee399e3cd261b3ee94e0b9) ) ROM_REGION( 0x03000, "gfx1", 0 ) - ROM_LOAD( "15", 0x00000, 0x1000, CRC(3dda0d84) SHA1(473c307c157bb229a31cd82ce4cdeca1ff604019) ) /* fg */ - ROM_LOAD( "16", 0x01000, 0x1000, CRC(3ebc79d8) SHA1(a29b4e314446821cd4a2b1a9d3ff16ee3b6a8f7a) ) - ROM_LOAD( "17", 0x02000, 0x1000, CRC(c4430deb) SHA1(e4c18ff2e2c82f3bce346267bc86d4160cb11995) ) + ROM_LOAD( "15", 0x00000, 0x1000, CRC(3dda0d84) SHA1(473c307c157bb229a31cd82ce4cdeca1ff604019) ) /* fg */ + ROM_LOAD( "16", 0x01000, 0x1000, CRC(3ebc79d8) SHA1(a29b4e314446821cd4a2b1a9d3ff16ee3b6a8f7a) ) + ROM_LOAD( "17", 0x02000, 0x1000, CRC(c4430deb) SHA1(e4c18ff2e2c82f3bce346267bc86d4160cb11995) ) ROM_REGION( 0x06000, "gfx2", 0 ) ROM_LOAD( "9", 0x00000, 0x2000, CRC(90f88c43) SHA1(e4ea963d9c31e34f70aa2b710760e0a102567988) ) /* bg1 */ - ROM_LOAD( "10", 0x02000, 0x2000, CRC(ab117070) SHA1(d9a8580f3b0919208801b00501579cf81665fc36) ) - ROM_LOAD( "11", 0x04000, 0x2000, CRC(e13b44b0) SHA1(70f3d2465a7652405e23809c81d7ec6ec501835b) ) + ROM_LOAD( "10", 0x02000, 0x2000, CRC(ab117070) SHA1(d9a8580f3b0919208801b00501579cf81665fc36) ) + ROM_LOAD( "11", 0x04000, 0x2000, CRC(e13b44b0) SHA1(70f3d2465a7652405e23809c81d7ec6ec501835b) ) ROM_REGION( 0x06000, "gfx3", 0 ) ROM_LOAD( "12", 0x00000, 0x2000, CRC(a6541c8d) SHA1(d7a211c58c2067f257f5a9e343ca4bf689edd514) ) /* bg2 */ diff --git a/src/mame/drivers/seta.c b/src/mame/drivers/seta.c index c7ed1ee874d..6c1427f0503 100644 --- a/src/mame/drivers/seta.c +++ b/src/mame/drivers/seta.c @@ -6647,7 +6647,7 @@ GFXDECODE_END static GFXDECODE_START( qzkklgy2 ) GFXDECODE_ENTRY( "gfx1", 0, layout_planes_2roms, 512*0, 32 ) // [0] Sprites - GFXDECODE_ENTRY( "gfx2", 0, layout_packed, 512*0, 32 ) // [1] Layer 1 + GFXDECODE_ENTRY( "gfx2", 0, layout_packed, 512*0, 32 ) // [1] Layer 1 GFXDECODE_END /*************************************************************************** @@ -9504,7 +9504,7 @@ ROM_START( crazyfgt ) ROM_LOAD16_BYTE( "rom.u3", 0x00000, 0x40000, CRC(bf333e75) SHA1(be124558ca49963cc56d3255c546587558b61926) ) ROM_LOAD16_BYTE( "rom.u4", 0x00001, 0x40000, CRC(505e9d47) SHA1(3797d396a24e46b891de4c40aafe960d1cf5f161) ) - ROM_REGION( 0x200000, "gfx1", 0 ) /* Sprites */ + ROM_REGION( 0x200000, "gfx1", 0 ) /* Sprites */ ROM_LOAD( "rom.u228", 0x000000, 0x80000, CRC(7181618e) SHA1(57c5aced95b0a11a43dc9bd532290f067113e65a) ) ROM_LOAD( "rom.u227", 0x080000, 0x80000, CRC(7905b5f2) SHA1(633f86bf2be620afbe8012ade5d1e59c359a25d4) ) ROM_LOAD( "rom.u226", 0x100000, 0x80000, CRC(ef210e34) SHA1(99241ffcbc8af889c8ab6f0bc67eedef27d455f0) ) diff --git a/src/mame/drivers/seta2.c b/src/mame/drivers/seta2.c index 1b8ce1dfb68..7255638f05e 100644 --- a/src/mame/drivers/seta2.c +++ b/src/mame/drivers/seta2.c @@ -1121,7 +1121,7 @@ static INPUT_PORTS_START( gundamex ) PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:5") PORT_DIPSETTING( 0x0010, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0020, 0x0020, "Freeze" ) PORT_DIPLOCATION("SW1:6") /* Listed as "Unused" */ + PORT_DIPNAME( 0x0020, 0x0020, "Freeze" ) PORT_DIPLOCATION("SW1:6") /* Listed as "Unused" */ PORT_DIPSETTING( 0x0020, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) PORT_DIPNAME( 0x0040, 0x0040, "Show Targets" ) PORT_DIPLOCATION("SW1:7") /* Listed as "Unused" */ diff --git a/src/mame/drivers/sfkick.c b/src/mame/drivers/sfkick.c index 7c8f514f7a9..5a3390698ca 100644 --- a/src/mame/drivers/sfkick.c +++ b/src/mame/drivers/sfkick.c @@ -367,12 +367,12 @@ static INPUT_PORTS_START( sfkick ) PORT_START("DSW1") /* bitswapped at read! 76543210 -> 45673210 */ PORT_DIPNAME( 0x82, 0x02, DEF_STR( Unknown ) ) /* unknown, code @ $98a8 */ - PORT_DIPSETTING( 0x00, "3" ) + PORT_DIPSETTING( 0x00, "3" ) PORT_DIPSETTING( 0x02, "2" ) PORT_DIPSETTING( 0x80, "1" ) PORT_DIPSETTING( 0x82, "0" ) PORT_DIPNAME( 0x0c, 0x08, DEF_STR( Difficulty ) ) /* not sure, code @ $9877 */ - PORT_DIPSETTING( 0x0c, DEF_STR( Easy ) ) + PORT_DIPSETTING( 0x0c, DEF_STR( Easy ) ) PORT_DIPSETTING( 0x08, DEF_STR( Normal ) ) PORT_DIPSETTING( 0x04, DEF_STR( Medium ) ) PORT_DIPSETTING( 0x00, DEF_STR( Hard ) ) diff --git a/src/mame/drivers/shadfrce.c b/src/mame/drivers/shadfrce.c index 6ad8145ab46..84f5da73a08 100644 --- a/src/mame/drivers/shadfrce.c +++ b/src/mame/drivers/shadfrce.c @@ -572,7 +572,7 @@ static const ym2151_interface ym2151_config = }; static MACHINE_DRIVER_START( shadfrce ) - MDRV_CPU_ADD("maincpu", M68000, CPU_CLOCK) /* verified on pcb */ + MDRV_CPU_ADD("maincpu", M68000, CPU_CLOCK) /* verified on pcb */ MDRV_CPU_PROGRAM_MAP(shadfrce_map) MDRV_TIMER_ADD_SCANLINE("scantimer", shadfrce_scanline, "screen", 0, 1) @@ -593,13 +593,13 @@ static MACHINE_DRIVER_START( shadfrce ) /* sound hardware */ MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker") - MDRV_SOUND_ADD("ymsnd", YM2151, XTAL_3_579545MHz) /* verified on pcb */ + MDRV_SOUND_ADD("ymsnd", YM2151, XTAL_3_579545MHz) /* verified on pcb */ MDRV_SOUND_CONFIG(ym2151_config) MDRV_SOUND_ROUTE(0, "lspeaker", 0.50) MDRV_SOUND_ROUTE(1, "rspeaker", 0.50) - MDRV_SOUND_ADD("oki", OKIM6295, XTAL_13_4952MHz/8) /* verified on pcb */ - MDRV_SOUND_CONFIG(okim6295_interface_pin7high) /* verified on pcb, pin7 is at 2.4v */ + MDRV_SOUND_ADD("oki", OKIM6295, XTAL_13_4952MHz/8) /* verified on pcb */ + MDRV_SOUND_CONFIG(okim6295_interface_pin7high) /* verified on pcb, pin7 is at 2.4v */ MDRV_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.50) MDRV_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.50) MACHINE_DRIVER_END diff --git a/src/mame/drivers/shangha3.c b/src/mame/drivers/shangha3.c index fc1565d18fc..034a806c6ae 100644 --- a/src/mame/drivers/shangha3.c +++ b/src/mame/drivers/shangha3.c @@ -650,7 +650,7 @@ ROM_START( blocken ) /* 280000-37ffff empty */ ROM_REGION( 0x80000, "samples", 0 ) /* samples for M6295 */ - ROM_LOAD( "ic53.bin", 0x0000, 0x80000, CRC(86108c56) SHA1(aa405fa2eec5cc178ef6226f229a12dac09504f0) ) + ROM_LOAD( "ic53.bin", 0x0000, 0x80000, CRC(86108c56) SHA1(aa405fa2eec5cc178ef6226f229a12dac09504f0) ) ROM_REGION( 0x100000, "oki", 0 ) /* $00000-$20000 stays the same in all sound banks, */ diff --git a/src/mame/drivers/shaolins.c b/src/mame/drivers/shaolins.c index 241d469132f..c5b88d948e2 100644 --- a/src/mame/drivers/shaolins.c +++ b/src/mame/drivers/shaolins.c @@ -42,8 +42,8 @@ static ADDRESS_MAP_START( shaolins_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x0000, 0x0000) AM_WRITE(shaolins_nmi_w) /* bit 0 = flip screen, bit 1 = nmi enable, bit 2 = ? */ /* bit 3, bit 4 = coin counters */ AM_RANGE(0x0100, 0x0100) AM_WRITE(watchdog_reset_w) - AM_RANGE(0x0300, 0x0300) AM_DEVWRITE("sn1", sn76496_w) /* trigger chip to read from latch. The program always */ - AM_RANGE(0x0400, 0x0400) AM_DEVWRITE("sn2", sn76496_w) /* writes the same number as the latch, so we don't */ + AM_RANGE(0x0300, 0x0300) AM_DEVWRITE("sn1", sn76496_w) /* trigger chip to read from latch. The program always */ + AM_RANGE(0x0400, 0x0400) AM_DEVWRITE("sn2", sn76496_w) /* writes the same number as the latch, so we don't */ /* bother emulating them. */ AM_RANGE(0x0500, 0x0500) AM_READ_PORT("DSW1") AM_RANGE(0x0600, 0x0600) AM_READ_PORT("DSW2") @@ -60,7 +60,7 @@ static ADDRESS_MAP_START( shaolins_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x3100, 0x33ff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram) AM_RANGE(0x3800, 0x3bff) AM_RAM_WRITE(shaolins_colorram_w) AM_BASE(&shaolins_colorram) AM_RANGE(0x3c00, 0x3fff) AM_RAM_WRITE(shaolins_videoram_w) AM_BASE(&shaolins_videoram) - AM_RANGE(0x4000, 0x5fff) AM_ROM /* Machine checks for extra rom */ + AM_RANGE(0x4000, 0x5fff) AM_ROM /* Machine checks for extra rom */ AM_RANGE(0x6000, 0xffff) AM_ROM ADDRESS_MAP_END diff --git a/src/mame/drivers/shisen.c b/src/mame/drivers/shisen.c index d8708304d7f..7d5020dc00d 100644 --- a/src/mame/drivers/shisen.c +++ b/src/mame/drivers/shisen.c @@ -140,7 +140,7 @@ static INPUT_PORTS_START( shisen ) PORT_DIPSETTING( 0x60, DEF_STR( 1C_5C ) ) PORT_DIPSETTING( 0x50, DEF_STR( 1C_6C ) ) PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) ) - PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) ) PORT_CONDITION("DSW2",0x04,PORTCOND_NOTEQUALS,0x04) PORT_DIPLOCATION("SW1:5,6") + PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) ) PORT_CONDITION("DSW2",0x04,PORTCOND_NOTEQUALS,0x04) PORT_DIPLOCATION("SW1:5,6") PORT_DIPSETTING( 0x00, DEF_STR( 5C_1C ) ) PORT_DIPSETTING( 0x10, DEF_STR( 3C_1C ) ) PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) ) diff --git a/src/mame/drivers/shootout.c b/src/mame/drivers/shootout.c index 96dacdb7c10..e910980eea9 100644 --- a/src/mame/drivers/shootout.c +++ b/src/mame/drivers/shootout.c @@ -232,7 +232,7 @@ static const gfx_layout tile_layout = static GFXDECODE_START( shootout ) GFXDECODE_ENTRY( "gfx1", 0, char_layout, 16*4+8*8, 16 ) /* characters */ - GFXDECODE_ENTRY( "gfx2", 0, sprite_layout, 16*4, 8 ) /* sprites */ + GFXDECODE_ENTRY( "gfx2", 0, sprite_layout, 16*4, 8 ) /* sprites */ GFXDECODE_ENTRY( "gfx3", 0, tile_layout, 0, 16 ) /* tiles */ GFXDECODE_END diff --git a/src/mame/drivers/sidearms.c b/src/mame/drivers/sidearms.c index 93f04bd2b5e..7e889179580 100644 --- a/src/mame/drivers/sidearms.c +++ b/src/mame/drivers/sidearms.c @@ -145,7 +145,7 @@ static WRITE8_HANDLER( whizz_bankswitch_w ) int bank = 0; switch (data & 0xC0) - { + { case 0x00 : bank = 0; break; case 0x40 : bank = 2; break; case 0x80 : bank = 1; break; diff --git a/src/mame/drivers/simpsons.c b/src/mame/drivers/simpsons.c index 25de121bda1..1a766c1e3b2 100644 --- a/src/mame/drivers/simpsons.c +++ b/src/mame/drivers/simpsons.c @@ -397,7 +397,7 @@ ROM_START( simpsons4pa ) /* World 4 Player, later? (by use of later leters) */ ROM_REGION( 0x28000, "audiocpu", 0 ) /* Z80 code + banks */ ROM_LOAD( "072-e03.6g", 0x00000, 0x08000, CRC(866b7a35) SHA1(98905764eb4c7d968ccc17618a1f24ee12e33c0e) ) - ROM_CONTINUE( 0x10000, 0x18000 ) + ROM_CONTINUE( 0x10000, 0x18000 ) ROM_REGION( 0x100000, "gfx1", 0 ) /* graphics ( dont dispose as the program can read them, 0 ) */ ROM_LOAD( "072-b07.18h", 0x000000, 0x080000, CRC(ba1ec910) SHA1(0805ccb641271dea43185dc0365732260db1763d) ) /* tiles */ diff --git a/src/mame/drivers/skyfox.c b/src/mame/drivers/skyfox.c index 9b777af6bfe..45a7a956cdc 100644 --- a/src/mame/drivers/skyfox.c +++ b/src/mame/drivers/skyfox.c @@ -161,7 +161,7 @@ static INPUT_PORTS_START( skyfox ) PORT_DIPSETTING( 0x04, "5" ) // PORT_DIPSETTING( 0x05, "5" ) // PORT_DIPSETTING( 0x06, "5" ) - PORT_DIPSETTING( 0x07, "Infinite (Cheat)") + PORT_DIPSETTING( 0x07, "Infinite (Cheat)") PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) diff --git a/src/mame/drivers/slapfght.c b/src/mame/drivers/slapfght.c index ac3d6fc9f5b..15dd0ba3290 100644 --- a/src/mame/drivers/slapfght.c +++ b/src/mame/drivers/slapfght.c @@ -1860,7 +1860,7 @@ GAME( 1985, perfrmanu,perfrman, perfrman, perfrman, 0, ROT270, "[Toaplan] GAME( 1985, tigerh, 0, tigerh, tigerh, tigerh, ROT270, "Taito America Corp.", "Tiger Heli (US)", GAME_NO_COCKTAIL ) GAME( 1985, tigerhj, tigerh, tigerh, tigerh, tigerh, ROT270, "Taito", "Tiger Heli (Japan)", GAME_NO_COCKTAIL ) GAME( 1985, tigerhb1, tigerh, tigerhb, tigerh, tigerhb, ROT270, "bootleg", "Tiger Heli (bootleg set 1)", GAME_NO_COCKTAIL ) -GAME( 1985, tigerhb2, tigerh, tigerhb, tigerh, 0, ROT270, "bootleg", "Tiger Heli (bootleg set 2)", GAME_NO_COCKTAIL ) +GAME( 1985, tigerhb2, tigerh, tigerhb, tigerh, 0, ROT270, "bootleg", "Tiger Heli (bootleg set 2)", GAME_NO_COCKTAIL ) GAME( 1985, tigerhb3, tigerh, tigerhb, tigerh, 0, ROT270, "bootleg", "Tiger Heli (bootleg set 3)", GAME_NO_COCKTAIL ) GAME( 1986, slapfigh, 0, slapfigh, slapfigh, slapfigh, ROT270, "Taito", "Slap Fight (set 1)", GAME_NOT_WORKING | GAME_NO_COCKTAIL ) GAME( 1986, slapfigha,slapfigh, slapfigh, slapfigh, slapfigh, ROT270, "Taito", "Slap Fight (set 2)", GAME_NOT_WORKING | GAME_NO_COCKTAIL ) diff --git a/src/mame/drivers/sliver.c b/src/mame/drivers/sliver.c index 40935ef9d5f..f2607b12097 100644 --- a/src/mame/drivers/sliver.c +++ b/src/mame/drivers/sliver.c @@ -492,7 +492,7 @@ static INPUT_PORTS_START( sliver ) PORT_DIPSETTING( 0x000c, DEF_STR( 1C_4C ) ) PORT_DIPSETTING( 0x000b, DEF_STR( 1C_5C ) ) PORT_DIPSETTING( 0x0000, DEF_STR( Free_Play ) ) - PORT_DIPNAME( 0x0030, 0x0020, DEF_STR( Lives ) ) + PORT_DIPNAME( 0x0030, 0x0020, DEF_STR( Lives ) ) PORT_DIPSETTING( 0x0030, "2" ) PORT_DIPSETTING( 0x0020, "3" ) PORT_DIPSETTING( 0x0010, "4" ) diff --git a/src/mame/drivers/snesb.c b/src/mame/drivers/snesb.c index a9edd4cea0e..881ca1cb733 100644 --- a/src/mame/drivers/snesb.c +++ b/src/mame/drivers/snesb.c @@ -191,7 +191,7 @@ static READ8_HANDLER(sb2b_75bd37_r) { /* protection check */ static UINT8 cnt=0; - return ++cnt; + return ++cnt; } static READ8_HANDLER(sb2b_6a6xxx_r) @@ -214,12 +214,12 @@ static READ8_HANDLER(sb2b_6a6xxx_r) static READ8_HANDLER(sb2b_770071_r) { - return input_port_read(space->machine, "DSW"); + return input_port_read(space->machine, "DSW"); } static READ8_HANDLER(sb2b_770079_r) { - return input_port_read(space->machine, "COIN"); + return input_port_read(space->machine, "COIN"); } static READ8_HANDLER(sb2b_7xxx_r) @@ -231,17 +231,17 @@ static READ8_HANDLER(sb2b_7xxx_r) static READ8_HANDLER(iron_770071_r) { - return input_port_read(space->machine, "DSW1"); + return input_port_read(space->machine, "DSW1"); } static READ8_HANDLER(iron_770073_r) { - return input_port_read(space->machine, "DSW2"); + return input_port_read(space->machine, "DSW2"); } static READ8_HANDLER(iron_770079_r) { - return input_port_read(space->machine, "COIN"); + return input_port_read(space->machine, "COIN"); } @@ -855,42 +855,42 @@ static DRIVER_INIT( sblast2b ) UINT8 *dst = memory_region(machine, "user3"); for (i=0; i<0x80000*3; i++) { - cipherText = src[i]; - plainText = data_substitution0[cipherText&0xf]|data_substitution1[cipherText>>4]; - newAddress = (address_substitution_high[i>>15]<<15)|(i&0x7fc0)|(address_substitution_low[i&0x3f]); + cipherText = src[i]; + plainText = data_substitution0[cipherText&0xf]|data_substitution1[cipherText>>4]; + newAddress = (address_substitution_high[i>>15]<<15)|(i&0x7fc0)|(address_substitution_low[i&0x3f]); if(newAddress<0x10000) - { - plainText = BITSWAP8(plainText, 6,3,5,4,2,0,7,1) ^ 0xff; - } + { + plainText = BITSWAP8(plainText, 6,3,5,4,2,0,7,1) ^ 0xff; + } + else + if(newAddress<0x20000) + { + plainText = BITSWAP8(plainText, 4,0,7,6,3,1,2,5) ^ 0xff; + } + else + if(newAddress<0x30000) + { + plainText = BITSWAP8(plainText, 5,7,6,1,4,3,0,2); + } else - if(newAddress<0x20000) - { - plainText = BITSWAP8(plainText, 4,0,7,6,3,1,2,5) ^ 0xff; - } - else - if(newAddress<0x30000) - { - plainText = BITSWAP8(plainText, 5,7,6,1,4,3,0,2); - } - else - if(newAddress<0x40000) - { - plainText = BITSWAP8(plainText, 3,1,2,0,5,6,4,7) ^ 0xff; - } + if(newAddress<0x40000) + { + plainText = BITSWAP8(plainText, 3,1,2,0,5,6,4,7) ^ 0xff; + } dst[newAddress] = plainText; } - /* boot vector */ + /* boot vector */ dst[0xfffc]=0xc0; dst[0xfffd]=0x7a; - /* protection checks */ - memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x75bd37, 0x75bd37, 0, 0, sb2b_75bd37_r); - memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x6a6000, 0x6a6fff, 0, 0, sb2b_6a6xxx_r); + /* protection checks */ + memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x75bd37, 0x75bd37, 0, 0, sb2b_75bd37_r); + memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x6a6000, 0x6a6fff, 0, 0, sb2b_6a6xxx_r); - /* extra inputs */ - memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x770071, 0x770071, 0, 0, sb2b_770071_r); + /* extra inputs */ + memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x770071, 0x770071, 0, 0, sb2b_770071_r); memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x770079, 0x770079, 0, 0, sb2b_770079_r); /* handler to read boot code */ @@ -917,7 +917,7 @@ static DRIVER_INIT( iron ) } /* extra inputs */ - memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x770071, 0x770071, 0, 0, iron_770071_r); + memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x770071, 0x770071, 0, 0, iron_770071_r); memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x770073, 0x770073, 0, 0, iron_770073_r); memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x770079, 0x770079, 0, 0, iron_770079_r); diff --git a/src/mame/drivers/snk.c b/src/mame/drivers/snk.c index 40cdb4a830f..fb8d3fe850e 100644 --- a/src/mame/drivers/snk.c +++ b/src/mame/drivers/snk.c @@ -5901,8 +5901,8 @@ ROM_START( choppera ) ROM_REGION( 0x40000, "bg_tiles", 0 ) ROM_LOAD( "kk_10.rom", 0x00000, 0x10000, CRC(5cf4d22b) SHA1(b66864740898478becb188d7dd34d61187926e4d) ) - ROM_LOAD( "11a.rom", 0x10000, 0x10000, CRC(881ac259) SHA1(6cce41878c9d9712996d4987a9a578f1301b8feb) ) - ROM_LOAD( "12a.rom", 0x20000, 0x10000, CRC(de96b331) SHA1(725cfe739f7ed0f37eb620d9566bfda1369f4d50) ) + ROM_LOAD( "11a.rom", 0x10000, 0x10000, CRC(881ac259) SHA1(6cce41878c9d9712996d4987a9a578f1301b8feb) ) + ROM_LOAD( "12a.rom", 0x20000, 0x10000, CRC(de96b331) SHA1(725cfe739f7ed0f37eb620d9566bfda1369f4d50) ) ROM_LOAD( "kk_13.rom", 0x30000, 0x10000, CRC(2756817d) SHA1(acde21454ddf843425deff3357c9e3a7e7a2baec) ) ROM_REGION( 0x20000, "sp16_tiles", 0 ) diff --git a/src/mame/drivers/snowbros.c b/src/mame/drivers/snowbros.c index 99db9869702..6c63ccfc1e9 100644 --- a/src/mame/drivers/snowbros.c +++ b/src/mame/drivers/snowbros.c @@ -1452,15 +1452,15 @@ static const gfx_layout hyperpac_tilelayout = static const gfx_layout sb3_tilebglayout = { - 16,16, - RGN_FRAC(1,1), - 8, - {8, 9,10, 11, 0, 1, 2, 3 }, - { 0, 4, 16, 20, 32, 36, 48, 52, - 512+0,512+4,512+16,512+20,512+32,512+36,512+48,512+52}, - { 0*64, 1*64, 2*64, 3*64, 4*64, 5*64, 6*64, 7*64, - 1024+0*16,1024+1*64,1024+2*64,1024+3*64,1024+4*64,1024+5*64,1024+6*64,1024+7*64}, - 32*64 + 16,16, + RGN_FRAC(1,1), + 8, + {8, 9,10, 11, 0, 1, 2, 3 }, + { 0, 4, 16, 20, 32, 36, 48, 52, + 512+0,512+4,512+16,512+20,512+32,512+36,512+48,512+52}, + { 0*64, 1*64, 2*64, 3*64, 4*64, 5*64, 6*64, 7*64, + 1024+0*16,1024+1*64,1024+2*64,1024+3*64,1024+4*64,1024+5*64,1024+6*64,1024+7*64}, + 32*64 }; @@ -1515,7 +1515,7 @@ static MACHINE_RESET (finalttr) static const kaneko_pandora_interface snowbros_pandora_config = { "screen", /* screen tag */ - 0, /* gfx_region */ + 0, /* gfx_region */ 0, 0 /* x_offs, y_offs */ }; diff --git a/src/mame/drivers/sothello.c b/src/mame/drivers/sothello.c index e17e28ab65f..75d4eb8f0db 100644 --- a/src/mame/drivers/sothello.c +++ b/src/mame/drivers/sothello.c @@ -126,7 +126,7 @@ static ADDRESS_MAP_START( maincpu_io_map, ADDRESS_SPACE_IO, 8 ) AM_RANGE( 0x40, 0x4f) AM_WRITE(soundlatch_w) AM_RANGE( 0x50, 0x50) AM_WRITE(bank_w) AM_RANGE( 0x60, 0x61) AM_MIRROR(0x02) AM_DEVREADWRITE("ymsnd", ym2203_r, ym2203_w) - /* not sure, but the A1 line is ignored, code @ $8b8 */ + /* not sure, but the A1 line is ignored, code @ $8b8 */ AM_RANGE( 0x70, 0x70) AM_WRITE( v9938_0_vram_w ) AM_READ( v9938_0_vram_r ) AM_RANGE( 0x71, 0x71) AM_WRITE( v9938_0_command_w ) AM_READ( v9938_0_status_r ) AM_RANGE( 0x72, 0x72) AM_WRITE( v9938_0_palette_w ) diff --git a/src/mame/drivers/spcforce.c b/src/mame/drivers/spcforce.c index f032215ee0c..ed5cc145d19 100644 --- a/src/mame/drivers/spcforce.c +++ b/src/mame/drivers/spcforce.c @@ -289,14 +289,14 @@ MACHINE_DRIVER_END ***************************************************************************/ ROM_START( spcforce ) ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD( "m1v4f.1a", 0x0000, 0x0800, CRC(7da0d1ed) SHA1(2ee145f590da557be057f181b4861014627872e7) ) - ROM_LOAD( "m2v4f.1c", 0x0800, 0x0800, CRC(25605bff) SHA1(afda2884a00fdbc000191dd548fd8e34df3e2f49) ) - ROM_LOAD( "m3v5f.2a", 0x1000, 0x0800, CRC(6f879366) SHA1(ef624619dbaad1f2adf4fab82e04bac117dbfac6) ) - ROM_LOAD( "m4v5f.2c", 0x1800, 0x0800, CRC(7fbfabfa) SHA1(0d6bbdcc80e251aa0ebd12e66549afaf6d8ccb0e) ) + ROM_LOAD( "m1v4f.1a", 0x0000, 0x0800, CRC(7da0d1ed) SHA1(2ee145f590da557be057f181b4861014627872e7) ) + ROM_LOAD( "m2v4f.1c", 0x0800, 0x0800, CRC(25605bff) SHA1(afda2884a00fdbc000191dd548fd8e34df3e2f49) ) + ROM_LOAD( "m3v5f.2a", 0x1000, 0x0800, CRC(6f879366) SHA1(ef624619dbaad1f2adf4fab82e04bac117dbfac6) ) + ROM_LOAD( "m4v5f.2c", 0x1800, 0x0800, CRC(7fbfabfa) SHA1(0d6bbdcc80e251aa0ebd12e66549afaf6d8ccb0e) ) /*0x2000 empty */ - ROM_LOAD( "m6v4f.3c", 0x2800, 0x0800, CRC(12128e9e) SHA1(b2a113b419e11ca094f56ae93870df11690b119a) ) - ROM_LOAD( "m7v4f.4a", 0x3000, 0x0800, CRC(978ad452) SHA1(fa84dcc6587403dd939da719a747d8c7332ed038) ) - ROM_LOAD( "m8v4f.4c", 0x3800, 0x0800, CRC(f805c3cd) SHA1(78eb13b99aae895742b34ed56bee9313d3643de1) ) + ROM_LOAD( "m6v4f.3c", 0x2800, 0x0800, CRC(12128e9e) SHA1(b2a113b419e11ca094f56ae93870df11690b119a) ) + ROM_LOAD( "m7v4f.4a", 0x3000, 0x0800, CRC(978ad452) SHA1(fa84dcc6587403dd939da719a747d8c7332ed038) ) + ROM_LOAD( "m8v4f.4c", 0x3800, 0x0800, CRC(f805c3cd) SHA1(78eb13b99aae895742b34ed56bee9313d3643de1) ) ROM_REGION( 0x1000, "audiocpu", 0 ) /* sound MCU */ ROM_LOAD( "vm5.k10", 0x0000, 0x0800, CRC(8820913c) SHA1(90002cafdf5f32f916e5457e013ebe53405d5ca8) ) @@ -315,11 +315,11 @@ ROM_START( spcforc2 ) ROM_LOAD( "spacefor.1a", 0x0000, 0x0800, CRC(ef6fdccb) SHA1(2fff28437597958b39a821f93ac30f32c24f50aa) ) ROM_LOAD( "spacefor.1c", 0x0800, 0x0800, CRC(44bd1cdd) SHA1(6dd5ae7a64079c61b63667f06e0d34dec48eac7c) ) ROM_LOAD( "spacefor.2a", 0x1000, 0x0800, CRC(fcbc7df7) SHA1(b6e89dbfc80d5d9dcf889f618a8278c182773a14) ) - ROM_LOAD( "vm4", 0x1800, 0x0800, CRC(c5b073b9) SHA1(93b77c77488aa954c35880439be6c7629448a3ea) ) + ROM_LOAD( "vm4", 0x1800, 0x0800, CRC(c5b073b9) SHA1(93b77c77488aa954c35880439be6c7629448a3ea) ) /*0x2000 empty */ ROM_LOAD( "spacefor.3c", 0x2800, 0x0800, CRC(9fd52301) SHA1(1ea5d5b888dd2f7ac6aab227c78b86c2f2f320da) ) ROM_LOAD( "spacefor.4a", 0x3000, 0x0800, CRC(89aefc0a) SHA1(0b56efa613bce972af4bbf145853bfc0cda60ef9) ) - ROM_LOAD( "m8v4f.4c", 0x3800, 0x0800, CRC(f805c3cd) SHA1(78eb13b99aae895742b34ed56bee9313d3643de1) ) + ROM_LOAD( "m8v4f.4c", 0x3800, 0x0800, CRC(f805c3cd) SHA1(78eb13b99aae895742b34ed56bee9313d3643de1) ) ROM_REGION( 0x1000, "audiocpu", 0 ) /* sound MCU */ ROM_LOAD( "vm5.k10", 0x0000, 0x0800, CRC(8820913c) SHA1(90002cafdf5f32f916e5457e013ebe53405d5ca8) ) @@ -335,17 +335,17 @@ ROM_END ROM_START( meteor ) ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD( "vm1", 0x0000, 0x0800, CRC(894fe9b1) SHA1(617e05523392e2ba2608ca13aa24d6601289fe87) ) - ROM_LOAD( "vm2", 0x0800, 0x0800, CRC(28685a68) SHA1(f911a3ccb8d63cf82a6dc8f069f3f498e9081656) ) - ROM_LOAD( "vm3", 0x1000, 0x0800, CRC(c88fb12a) SHA1(1eeb26caf7a1421ec2d570f71b8c4675ad7ea172) ) - ROM_LOAD( "vm4", 0x1800, 0x0800, CRC(c5b073b9) SHA1(93b77c77488aa954c35880439be6c7629448a3ea) ) + ROM_LOAD( "vm1", 0x0000, 0x0800, CRC(894fe9b1) SHA1(617e05523392e2ba2608ca13aa24d6601289fe87) ) + ROM_LOAD( "vm2", 0x0800, 0x0800, CRC(28685a68) SHA1(f911a3ccb8d63cf82a6dc8f069f3f498e9081656) ) + ROM_LOAD( "vm3", 0x1000, 0x0800, CRC(c88fb12a) SHA1(1eeb26caf7a1421ec2d570f71b8c4675ad7ea172) ) + ROM_LOAD( "vm4", 0x1800, 0x0800, CRC(c5b073b9) SHA1(93b77c77488aa954c35880439be6c7629448a3ea) ) /*0x2000 empty */ - ROM_LOAD( "vm6", 0x2800, 0x0800, CRC(9969ec43) SHA1(3ce067c34b84e9559f195e7ef9939a78070693b1) ) - ROM_LOAD( "vm7", 0x3000, 0x0800, CRC(39f43ac2) SHA1(b45275759f4003a22a32dc04227a98908bd140a9) ) - ROM_LOAD( "vm8", 0x3800, 0x0800, CRC(a0508de3) SHA1(75666a4e46b6c433f1c1f8e76c30fd087354097b) ) + ROM_LOAD( "vm6", 0x2800, 0x0800, CRC(9969ec43) SHA1(3ce067c34b84e9559f195e7ef9939a78070693b1) ) + ROM_LOAD( "vm7", 0x3000, 0x0800, CRC(39f43ac2) SHA1(b45275759f4003a22a32dc04227a98908bd140a9) ) + ROM_LOAD( "vm8", 0x3800, 0x0800, CRC(a0508de3) SHA1(75666a4e46b6c433f1c1f8e76c30fd087354097b) ) ROM_REGION( 0x1000, "audiocpu", 0 ) /* sound MCU */ - ROM_LOAD( "vm5", 0x0000, 0x0800, CRC(b14ccd57) SHA1(0349ec5d0ca7f98ffdd96d7bf01cf096fe547f7a) ) + ROM_LOAD( "vm5", 0x0000, 0x0800, CRC(b14ccd57) SHA1(0349ec5d0ca7f98ffdd96d7bf01cf096fe547f7a) ) ROM_REGION( 0x3000, "gfx1", 0 ) ROM_LOAD( "rm1v", 0x0000, 0x0800, CRC(d621fe96) SHA1(29b75333ea8103095a4d452636eea4a1055845e5) ) diff --git a/src/mame/drivers/speedatk.c b/src/mame/drivers/speedatk.c index a263ce8fe90..626c2032a2b 100644 --- a/src/mame/drivers/speedatk.c +++ b/src/mame/drivers/speedatk.c @@ -139,8 +139,8 @@ static READ8_HANDLER( key_matrix_r ) { case 0x002: return 0x02; case 0x001: return 0x01; - case 0x004: return 0x03; - case 0x008: return 0x04; + case 0x004: return 0x03; + case 0x008: return 0x04; case 0x010: return 0x07; case 0x020: return 0x08; case 0x040: return 0x09; @@ -365,8 +365,8 @@ ROM_START( speedatk ) ROM_REGION( 0x6000, "gfx2", 0 ) ROM_LOAD( "cb0-5", 0x0000, 0x2000, CRC(47a966e7) SHA1(fdaa0f88656afc431bae367679ce6298fa962e0f) ) ROM_LOAD( "cb0-6", 0x2000, 0x2000, CRC(cc1da937) SHA1(1697bb008bfa5c33a282bd470ac39c324eea7509) ) - ROM_COPY( "gfx2", 0x0000, 0x4000, 0x1000 ) /* Fill the blank space with cards gfx */ - ROM_COPY( "gfx1", 0x1000, 0x5000, 0x1000 ) /* Gfx from cb0-7 */ + ROM_COPY( "gfx2", 0x0000, 0x4000, 0x1000 ) /* Fill the blank space with cards gfx */ + ROM_COPY( "gfx1", 0x1000, 0x5000, 0x1000 ) /* Gfx from cb0-7 */ ROM_REGION( 0x0120, "proms", 0 ) ROM_LOAD( "cb1.bpr", 0x0000, 0x0020, CRC(a0176c23) SHA1(133fb9eef8a6595cac2dcd7edce4789899a59e84) ) /* color PROM */ diff --git a/src/mame/drivers/speedspn.c b/src/mame/drivers/speedspn.c index deadcdbf366..9a8efe7034e 100644 --- a/src/mame/drivers/speedspn.c +++ b/src/mame/drivers/speedspn.c @@ -124,7 +124,7 @@ static ADDRESS_MAP_START( speedspn_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0xa000, 0xa7ff) AM_RAM AM_RANGE(0xa800, 0xafff) AM_RAM AM_RANGE(0xb000, 0xbfff) AM_RAM /* RAM PROGRAM */ - AM_RANGE(0xc000, 0xffff) AM_ROMBANK("bank1") /* banked ROM */ + AM_RANGE(0xc000, 0xffff) AM_ROMBANK("bank1") /* banked ROM */ ADDRESS_MAP_END static ADDRESS_MAP_START( speedspn_io_map, ADDRESS_SPACE_IO, 8 ) diff --git a/src/mame/drivers/spiders.c b/src/mame/drivers/spiders.c index 95a184fa1b1..a06023e5843 100644 --- a/src/mame/drivers/spiders.c +++ b/src/mame/drivers/spiders.c @@ -235,7 +235,7 @@ static WRITE_LINE_DEVICE_HANDLER( main_cpu_irq ) const device_config *pia2 = devtag_get_device(device->machine, "pia2"); const device_config *pia3 = devtag_get_device(device->machine, "pia3"); int combined_state = pia6821_get_irq_a(pia1) | pia6821_get_irq_b(pia1) | - pia6821_get_irq_b(pia2) | + pia6821_get_irq_b(pia2) | pia6821_get_irq_a(pia3) | pia6821_get_irq_b(pia3); cputag_set_input_line(device->machine, "maincpu", M6809_IRQ_LINE, combined_state ? ASSERT_LINE : CLEAR_LINE); @@ -462,8 +462,8 @@ static MC6845_UPDATE_ROW( update_row ) /* the memory is hooked up to the MA, RA lines this way */ offs_t offs = ((ma << 3) & 0x3f00) | - ((ra << 5) & 0x00e0) | - ((ma << 0) & 0x001f); + ((ra << 5) & 0x00e0) | + ((ma << 0) & 0x001f); if (flipscreen) offs = offs ^ 0x3fff; diff --git a/src/mame/drivers/srmp5.c b/src/mame/drivers/srmp5.c index 8c9f8ff637e..06763110912 100644 --- a/src/mame/drivers/srmp5.c +++ b/src/mame/drivers/srmp5.c @@ -148,23 +148,23 @@ static VIDEO_UPDATE( srmp5 ) for(ys=0;ys<=sizey;ys++) { ys2 = (sprite_sublist[SPRITE_PALETTE] & 0x4000) ? ys : (sizey - ys); - for(xs=0;xs<=sizex;xs++) - { - UINT8 pen=pixels[address&(0x100000-1)]; - xs2 = (sprite_sublist[SPRITE_PALETTE] & 0x8000) ? (sizex - xs) : xs; - if(pen) - { - if(xb+xs2<=visarea->max_x && xb+xs2>=visarea->min_x && yb+ys2<=visarea->max_y && yb+ys2>=visarea->min_y ) - { - UINT16 pixdata=palram[pen+((sprite_sublist[SPRITE_PALETTE]&0xff)<<8)]; - *BITMAP_ADDR32(bitmap, yb+ys2, xb+xs2) = ((pixdata&0x7c00)>>7) | ((pixdata&0x3e0)<<6) | ((pixdata&0x1f)<<19); - } - } - ++address; - } - } - } - } + for(xs=0;xs<=sizex;xs++) + { + UINT8 pen=pixels[address&(0x100000-1)]; + xs2 = (sprite_sublist[SPRITE_PALETTE] & 0x8000) ? (sizex - xs) : xs; + if(pen) + { + if(xb+xs2<=visarea->max_x && xb+xs2>=visarea->min_x && yb+ys2<=visarea->max_y && yb+ys2>=visarea->min_y ) + { + UINT16 pixdata=palram[pen+((sprite_sublist[SPRITE_PALETTE]&0xff)<<8)]; + *BITMAP_ADDR32(bitmap, yb+ys2, xb+xs2) = ((pixdata&0x7c00)>>7) | ((pixdata&0x3e0)<<6) | ((pixdata&0x1f)<<19); + } + } + ++address; + } + } + } + } sprite_sublist+=SPRITE_SUBLIST_ENTRY_LENGTH; --sublist_length; } diff --git a/src/mame/drivers/srmp6.c b/src/mame/drivers/srmp6.c index b379518dbf2..961a5013df3 100644 --- a/src/mame/drivers/srmp6.c +++ b/src/mame/drivers/srmp6.c @@ -247,7 +247,7 @@ static VIDEO_UPDATE(srmp6) drawgfx_alpha(bitmap,cliprect,screen->machine->gfx[0],tileno,global_pal,flip_x,flip_y,xb,yb,0,alpha); tileno++; - } + } } sprite_sublist+=8; @@ -353,36 +353,36 @@ static int destl; static UINT32 process(running_machine *machine,UINT8 b,UINT32 dst_offset) { - int l=0; + int l=0; - UINT8 *tram=(UINT8*)tileram; + UINT8 *tram=(UINT8*)tileram; - if(lastb==lastb2) //rle - { + if(lastb==lastb2) //rle + { int i; - int rle=(b+1)&0xff; + int rle=(b+1)&0xff; - for(i=0;i<rle;++i) - { + for(i=0;i<rle;++i) + { tram[dst_offset+destl] = lastb; gfx_element_mark_dirty(machine->gfx[0], (dst_offset+destl)/0x40); dst_offset++; - ++l; - } - lastb2=0xffff; - - return l; - } - else - { - lastb2=lastb; - lastb=b; + ++l; + } + lastb2=0xffff; + + return l; + } + else + { + lastb2=lastb; + lastb=b; tram[dst_offset+destl] = b; gfx_element_mark_dirty(machine->gfx[0], (dst_offset+destl)/0x40); - return 1; - } + return 1; + } } @@ -423,7 +423,7 @@ static WRITE16_HANDLER(srmp6_dma_w) { int i; UINT8 ctrl=rom[srcdata]; - ++srcdata; + ++srcdata; for(i=0;i<8;++i) { @@ -436,14 +436,14 @@ static WRITE16_HANDLER(srmp6_dma_w) tempidx+=process(space->machine,real_byte,tempidx); real_byte = rom[srctab+p*2+1];//px[DMA_XOR((current_table_address+p*2+1))]; tempidx+=process(space->machine,real_byte,tempidx); - } - else - { - tempidx+=process(space->machine,p,tempidx); - } + } + else + { + tempidx+=process(space->machine,p,tempidx); + } - ctrl<<=1; - ++srcdata; + ctrl<<=1; + ++srcdata; if(tempidx>=len) @@ -451,7 +451,7 @@ static WRITE16_HANDLER(srmp6_dma_w) LOG(("%x\n",srcdata)); return; } - } + } } } } @@ -528,8 +528,8 @@ static ADDRESS_MAP_START( srmp6, ADDRESS_SPACE_PROGRAM, 16 ) // AM_RANGE(0x5fff00, 0x5fffff) AM_WRITE(dma_w) AM_BASE(&dmaram) AM_RANGE(0x4c0000, 0x4c006f) AM_READWRITE(video_regs_r, video_regs_w) AM_BASE(&video_regs) // ? gfx regs ST-0026 NiLe - AM_RANGE(0x4e0000, 0x4e00ff) AM_DEVREADWRITE("nile", nile_snd_r, nile_snd_w) AM_BASE(&nile_sound_regs) - AM_RANGE(0x4e0100, 0x4e0101) AM_DEVREADWRITE("nile", nile_sndctrl_r, nile_sndctrl_w) + AM_RANGE(0x4e0000, 0x4e00ff) AM_DEVREADWRITE("nile", nile_snd_r, nile_snd_w) AM_BASE(&nile_sound_regs) + AM_RANGE(0x4e0100, 0x4e0101) AM_DEVREADWRITE("nile", nile_sndctrl_r, nile_sndctrl_w) // AM_RANGE(0x4e0110, 0x4e0111) AM_NOP // ? accessed once ($268dc, written $b.w) // AM_RANGE(0x5fff00, 0x5fff1f) AM_RAM // ? see routine $5ca8, video_regs related ??? @@ -682,7 +682,7 @@ ROM_START( srmp6 ) ROM_REGION( 0x200000, "user1", 0 ) /* 68000 Data */ ROM_LOAD( "sx011-09.10", 0x000000, 0x200000, CRC(58f74438) SHA1(a256e39ca0406e513ab4dbd812fb0b559b4f61f2) ) - /* these are accessed directly by the 68k, DMA device etc. NOT decoded */ + /* these are accessed directly by the 68k, DMA device etc. NOT decoded */ ROM_REGION( 0x2000000, "nile", 0) /* Banked ROM */ ROM_LOAD16_WORD_SWAP( "sx011-08.15", 0x0000000, 0x0400000, CRC(01b3b1f0) SHA1(bbd60509c9ba78358edbcbb5953eafafd6e2eaf5) ) // CHR00 ROM_LOAD16_WORD_SWAP( "sx011-07.16", 0x0400000, 0x0400000, CRC(26e57dac) SHA1(91272268977c5fbff7e8fbe1147bf108bd2ed321) ) // CHR01 diff --git a/src/mame/drivers/srumbler.c b/src/mame/drivers/srumbler.c index cce2524b074..6d192edc0fe 100644 --- a/src/mame/drivers/srumbler.c +++ b/src/mame/drivers/srumbler.c @@ -93,7 +93,7 @@ static ADDRESS_MAP_START( srumbler_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x400e, 0x400e) AM_WRITE(soundlatch_w) AM_RANGE(0x5000, 0x5fff) AM_ROMBANK("5000") AM_WRITE(srumbler_foreground_w) AM_BASE(&srumbler_foregroundram) /* Banked ROM */ AM_RANGE(0x6000, 0x6fff) AM_ROMBANK("6000") /* Banked ROM */ - AM_RANGE(0x6000, 0x6fff) AM_WRITENOP /* Video RAM 2 ??? (not used) */ + AM_RANGE(0x6000, 0x6fff) AM_WRITENOP /* Video RAM 2 ??? (not used) */ AM_RANGE(0x7000, 0x7fff) AM_ROMBANK("7000") /* Banked ROM */ AM_RANGE(0x7000, 0x73ff) AM_WRITE(paletteram_RRRRGGGGBBBBxxxx_be_w) AM_BASE_GENERIC(paletteram) AM_RANGE(0x8000, 0x8fff) AM_ROMBANK("8000") /* Banked ROM */ diff --git a/src/mame/drivers/sshangha.c b/src/mame/drivers/sshangha.c index fe1171c683c..3665875c5bf 100644 --- a/src/mame/drivers/sshangha.c +++ b/src/mame/drivers/sshangha.c @@ -299,7 +299,7 @@ static INPUT_PORTS_START( sshangha ) PORT_DIPNAME( 0x0200, 0x0200, "Adult Mode" ) PORT_DIPSETTING( 0x0000, DEF_STR( No ) ) PORT_DIPSETTING( 0x0200, DEF_STR( Yes ) ) - PORT_DIPNAME( 0x0100, 0x0100, "Quest Mode" ) + PORT_DIPNAME( 0x0100, 0x0100, "Quest Mode" ) PORT_DIPSETTING( 0x0000, DEF_STR( No ) ) PORT_DIPSETTING( 0x0100, DEF_STR( Yes ) ) INPUT_PORTS_END diff --git a/src/mame/drivers/sslam.c b/src/mame/drivers/sslam.c index a79bea8b994..07aae5a39bb 100644 --- a/src/mame/drivers/sslam.c +++ b/src/mame/drivers/sslam.c @@ -590,7 +590,7 @@ static INPUT_PORTS_START( sslam ) PORT_DIPSETTING( 0x20, "3-4" ) PORT_DIPSETTING( 0x10, "3-3" ) PORT_DIPSETTING( 0x00, "0-0" ) - PORT_DIPNAME( 0x40, 0x40, "Play Mode" ) PORT_DIPLOCATION("SW1:7") + PORT_DIPNAME( 0x40, 0x40, "Play Mode" ) PORT_DIPLOCATION("SW1:7") PORT_DIPSETTING( 0x00, "2 Players" ) PORT_DIPSETTING( 0x40, "4 Players" ) PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:8") diff --git a/src/mame/drivers/ssv.c b/src/mame/drivers/ssv.c index 335813d7b7f..88b40809639 100644 --- a/src/mame/drivers/ssv.c +++ b/src/mame/drivers/ssv.c @@ -413,7 +413,7 @@ static READ16_HANDLER( fake_r ) { return ssv_scroll[offset]; } AM_RANGE(0x160000, 0x17ffff) AM_RAM /* */ \ AM_RANGE(0x1c0000, 0x1c0001) AM_READ(ssv_vblank_r ) /* Vblank? */ \ /**/AM_RANGE(0x1c0002, 0x1c007f) AM_READONLY /* Scroll */ \ - AM_RANGE(0x1c0000, 0x1c007f) AM_WRITE(ssv_scroll_w) AM_BASE(&ssv_scroll) /* Scroll */ \ + AM_RANGE(0x1c0000, 0x1c007f) AM_WRITE(ssv_scroll_w) AM_BASE(&ssv_scroll) /* Scroll */ \ AM_RANGE(0x210002, 0x210003) AM_READ_PORT("DSW1") \ AM_RANGE(0x210004, 0x210005) AM_READ_PORT("DSW2") \ AM_RANGE(0x210008, 0x210009) AM_READ_PORT("P1") \ @@ -421,9 +421,9 @@ static READ16_HANDLER( fake_r ) { return ssv_scroll[offset]; } AM_RANGE(0x21000c, 0x21000d) AM_READ_PORT("SYSTEM") \ AM_RANGE(0x21000e, 0x21000f) AM_READNOP AM_WRITE(ssv_lockout_w) /* Lockout */ \ AM_RANGE(0x210010, 0x210011) AM_WRITENOP \ - AM_RANGE(0x230000, 0x230071) AM_WRITEONLY AM_BASE(&ssv_irq_vectors) /* IRQ Vec */ \ - AM_RANGE(0x240000, 0x240071) AM_WRITE(ssv_irq_ack_w ) /* IRQ Ack */ \ - AM_RANGE(0x260000, 0x260001) AM_WRITE(ssv_irq_enable_w) /* IRQ En */ \ + AM_RANGE(0x230000, 0x230071) AM_WRITEONLY AM_BASE(&ssv_irq_vectors) /* IRQ Vec */ \ + AM_RANGE(0x240000, 0x240071) AM_WRITE(ssv_irq_ack_w ) /* IRQ Ack */ \ + AM_RANGE(0x260000, 0x260001) AM_WRITE(ssv_irq_enable_w) /* IRQ En */ \ AM_RANGE(0x300000, 0x30007f) AM_DEVREADWRITE8("ensoniq", es5506_r, es5506_w, 0x00ff) /* Sound */ \ AM_RANGE(0x482000, 0x482fff) AM_RAM_WRITE(dsp_w) AM_BASE(&dsp_ram) \ AM_RANGE(_ROM, 0xffffff) AM_ROMBANK("bank1") /* ROM */ \ @@ -3561,17 +3561,17 @@ ROM_START( koikois2 ) ROM_RELOAD( 0x300001, 0x080000 ) ROM_REGION( 0x2000000, "gfx1", 0 ) /* Sprites */ - ROM_LOAD( "kk2-a0.bin", 0x0000000, 0x400000, CRC(b94b76c2) SHA1(07ce3e3946669c1bd2f022da9861164625be9c1b) ) - ROM_LOAD( "kk2-a1.bin", 0x0400000, 0x200000, CRC(a7c99f56) SHA1(de341e99f76446fab4d7f09c2d8a6f18554b5d2f) ) + ROM_LOAD( "kk2-a0.bin", 0x0000000, 0x400000, CRC(b94b76c2) SHA1(07ce3e3946669c1bd2f022da9861164625be9c1b) ) + ROM_LOAD( "kk2-a1.bin", 0x0400000, 0x200000, CRC(a7c99f56) SHA1(de341e99f76446fab4d7f09c2d8a6f18554b5d2f) ) - ROM_LOAD( "kk2-b0.bin", 0x0800000, 0x400000, CRC(4d028972) SHA1(732c874d3511c7bce006436d557ec24e54df0166) ) - ROM_LOAD( "kk2-b1.bin", 0x0c00000, 0x200000, CRC(778ec9fb) SHA1(5983f0292e274e3da098b461355e2c001f4881b3) ) + ROM_LOAD( "kk2-b0.bin", 0x0800000, 0x400000, CRC(4d028972) SHA1(732c874d3511c7bce006436d557ec24e54df0166) ) + ROM_LOAD( "kk2-b1.bin", 0x0c00000, 0x200000, CRC(778ec9fb) SHA1(5983f0292e274e3da098b461355e2c001f4881b3) ) - ROM_LOAD( "kk2-c0.bin", 0x1000000, 0x400000, CRC(34b699d9) SHA1(b5208d5f70f21725e54c9dc59de73f1a5646a72c) ) - ROM_LOAD( "kk2-c1.bin", 0x1400000, 0x200000, CRC(ab451e88) SHA1(0c4d6c0c758f2ab4210c201605dd573661b6c553) ) + ROM_LOAD( "kk2-c0.bin", 0x1000000, 0x400000, CRC(34b699d9) SHA1(b5208d5f70f21725e54c9dc59de73f1a5646a72c) ) + ROM_LOAD( "kk2-c1.bin", 0x1400000, 0x200000, CRC(ab451e88) SHA1(0c4d6c0c758f2ab4210c201605dd573661b6c553) ) - ROM_LOAD( "kk2-d0.bin", 0x1800000, 0x400000, CRC(0e3005a4) SHA1(fa8da58308d58bb6b2e8beb8ee8f7ea08b18f4d9) ) - ROM_LOAD( "kk2-d1.bin", 0x1c00000, 0x200000, CRC(17a02252) SHA1(c7aa61e27f197b3c497a65a9369e3a6a20c9f82a) ) + ROM_LOAD( "kk2-d0.bin", 0x1800000, 0x400000, CRC(0e3005a4) SHA1(fa8da58308d58bb6b2e8beb8ee8f7ea08b18f4d9) ) + ROM_LOAD( "kk2-d1.bin", 0x1c00000, 0x200000, CRC(17a02252) SHA1(c7aa61e27f197b3c497a65a9369e3a6a20c9f82a) ) ROM_REGION16_BE( 0x400000, "ensoniq.0", ROMREGION_ERASE | 0 ) /* Samples */ ROM_LOAD16_BYTE( "kk2_snd0.bin", 0x000000, 0x200000, CRC(b27eaa94) SHA1(05baaef683a1fcd9eb8a7cfd5b280c05108e832f) ) diff --git a/src/mame/drivers/statriv2.c b/src/mame/drivers/statriv2.c index e41a69290db..2c8d7e50fc8 100644 --- a/src/mame/drivers/statriv2.c +++ b/src/mame/drivers/statriv2.c @@ -251,8 +251,8 @@ static const ppi8255_interface ppi8255_intf = DEVCB_INPUT_PORT("IN0"), /* Port A read */ DEVCB_INPUT_PORT("IN1"), /* Port B read */ DEVCB_INPUT_PORT("IN2"), /* Port C read (Lower Nibble as Input) */ - DEVCB_NULL, /* Port A write */ - DEVCB_NULL, /* Port B write */ + DEVCB_NULL, /* Port A write */ + DEVCB_NULL, /* Port B write */ DEVCB_HANDLER(ppi_portc_hi_w) /* Port C write (High nibble as Output) */ }; @@ -375,7 +375,7 @@ static INPUT_PORTS_START( hangman ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("Spinner") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_START("IN1") + PORT_START("IN1") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Left") PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN1 ) @@ -414,7 +414,7 @@ static INPUT_PORTS_START( statriv2 ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("Button D") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_START("IN1") + PORT_START("IN1") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Play 1000") PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_CUSTOM(latched_coin_r, "COIN") @@ -443,7 +443,7 @@ INPUT_PORTS_END static INPUT_PORTS_START( statriv4 ) PORT_INCLUDE(statriv2) - PORT_MODIFY("IN1") + PORT_MODIFY("IN1") PORT_DIPNAME( 0x40, 0x40, DEF_STR( Coinage ) ) PORT_DIPSETTING( 0x40, DEF_STR( 1C_1C ) ) PORT_DIPSETTING( 0x00, DEF_STR( 1C_2C ) ) @@ -491,7 +491,7 @@ INPUT_PORTS_END static INPUT_PORTS_START( sextriv ) PORT_INCLUDE(statriv2) - PORT_MODIFY("IN1") + PORT_MODIFY("IN1") PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPSETTING( 0x40, DEF_STR( On ) ) diff --git a/src/mame/drivers/stv.c b/src/mame/drivers/stv.c index 4d56acb4a56..7a6d445ef4a 100644 --- a/src/mame/drivers/stv.c +++ b/src/mame/drivers/stv.c @@ -202,7 +202,7 @@ static UINT8 NMI_reset; static void system_reset(void); static UINT8 en_68k; /*SCU stuff*/ -static int timer_0; /* Counter for Timer 0 irq*/ +static int timer_0; /* Counter for Timer 0 irq*/ static int timer_1; /* Counter for Timer 1 irq*/ /*Maybe add these in a struct...*/ static UINT32 scu_src_0, /* Source DMA lv 0 address*/ @@ -627,7 +627,7 @@ static void stv_SMPC_w8 (const address_space *space, int offset, UINT8 data) if(LOG_SMPC) logerror ("SMPC: Status Acquire\n"); smpc_ram[0x5f]=0x10; smpc_ram[0x21] = (0x80) | ((NMI_reset & 1) << 6); - smpc_ram[0x23] = DectoBCD(systime.local_time.year /100); + smpc_ram[0x23] = DectoBCD(systime.local_time.year /100); smpc_ram[0x25] = DectoBCD(systime.local_time.year %100); smpc_ram[0x27] = (systime.local_time.weekday << 4) | (systime.local_time.month+1); smpc_ram[0x29] = DectoBCD(systime.local_time.mday); @@ -1060,8 +1060,8 @@ DMA TODO: #define D0MV_1 if(!(DMA_STATUS & 0x10)) DMA_STATUS^=0x10 #define D1MV_1 if(!(DMA_STATUS & 0x100)) DMA_STATUS^=0x100 #define D2MV_1 if(!(DMA_STATUS & 0x1000)) DMA_STATUS^=0x1000 -#define D0MV_0 if(DMA_STATUS & 0x10) DMA_STATUS^=0x10 -#define D1MV_0 if(DMA_STATUS & 0x100) DMA_STATUS^=0x100 +#define D0MV_0 if(DMA_STATUS & 0x10) DMA_STATUS^=0x10 +#define D1MV_0 if(DMA_STATUS & 0x100) DMA_STATUS^=0x100 #define D2MV_0 if(DMA_STATUS & 0x1000) DMA_STATUS^=0x1000 static UINT32 scu_index_0,scu_index_1,scu_index_2; @@ -1127,7 +1127,7 @@ static READ32_HANDLER( stv_scu_r32 ) { if(LOG_SCU) logerror("(PC=%08x) SCU reg read at %d = %08x\n",cpu_get_pc(space->cpu),offset,stv_scu[offset]); return stv_scu[offset]; - } + } } static WRITE32_HANDLER( stv_scu_w32 ) @@ -1338,7 +1338,7 @@ static WRITE32_HANDLER( stv_scu_w32 ) stv_irq.vblank_in = (((stv_scu[40] & 0x0001)>>0) ^ 1); stv_irq.vblank_out = (((stv_scu[40] & 0x0002)>>1) ^ 1); stv_irq.hblank_in = (((stv_scu[40] & 0x0004)>>2) ^ 1); - stv_irq.timer_0 = (((stv_scu[40] & 0x0008)>>3) ^ 1); + stv_irq.timer_0 = (((stv_scu[40] & 0x0008)>>3) ^ 1); stv_irq.timer_1 = (((stv_scu[40] & 0x0010)>>4) ^ 1); stv_irq.dsp_end = (((stv_scu[40] & 0x0020)>>5) ^ 1); stv_irq.sound_req = (((stv_scu[40] & 0x0040)>>6) ^ 1); @@ -1772,7 +1772,7 @@ static void dma_indirect_lv0(const address_space *space) } if(LOG_SCU) logerror("DMA lv 0 indirect mode transfer START\n" - "Start %08x End %08x Size %04x\n",scu_src_0,scu_dst_0,scu_size_0); + "Start %08x End %08x Size %04x\n",scu_src_0,scu_dst_0,scu_size_0); if(LOG_SCU) logerror("Start Add %04x Destination Add %04x\n",scu_src_add_0,scu_dst_add_0); //guess,but I believe it's right. @@ -1839,7 +1839,7 @@ static void dma_indirect_lv1(const address_space *space) } if(LOG_SCU) logerror("DMA lv 1 indirect mode transfer START\n" - "Start %08x End %08x Size %04x\n",scu_src_1,scu_dst_1,scu_size_1); + "Start %08x End %08x Size %04x\n",scu_src_1,scu_dst_1,scu_size_1); if(LOG_SCU) logerror("Start Add %04x Destination Add %04x\n",scu_src_add_1,scu_dst_add_1); //guess,but I believe it's right. @@ -1908,7 +1908,7 @@ static void dma_indirect_lv2(const address_space *space) } if(LOG_SCU) logerror("DMA lv 2 indirect mode transfer START\n" - "Start %08x End %08x Size %04x\n",scu_src_2,scu_dst_2,scu_size_2); + "Start %08x End %08x Size %04x\n",scu_src_2,scu_dst_2,scu_size_2); if(LOG_SCU) logerror("Start Add %04x Destination Add %04x\n",scu_src_add_2,scu_dst_add_2); //guess,but I believe it's right. @@ -2361,7 +2361,7 @@ DRIVER_INIT ( stv ) memory_install_write32_handler(cputag_get_address_space(machine, "slave", ADDRESS_SPACE_PROGRAM), 0x60ffc44, 0x60ffc47, 0, 0, w60ffc44_write ); memory_install_write32_handler(cputag_get_address_space(machine, "slave", ADDRESS_SPACE_PROGRAM), 0x60ffc48, 0x60ffc4b, 0, 0, w60ffc48_write ); - smpc_ram[0x23] = DectoBCD(systime.local_time.year /100); + smpc_ram[0x23] = DectoBCD(systime.local_time.year /100); smpc_ram[0x25] = DectoBCD(systime.local_time.year %100); smpc_ram[0x27] = (systime.local_time.weekday << 4) | (systime.local_time.month+1); smpc_ram[0x29] = DectoBCD(systime.local_time.mday); @@ -2370,16 +2370,16 @@ DRIVER_INIT ( stv ) smpc_ram[0x2f] = DectoBCD(systime.local_time.second); smpc_ram[0x31] = 0x00; //CTG1=0 CTG0=0 (correct??) // smpc_ram[0x33] = input_port_read(machine, "FAKE"); - smpc_ram[0x5f] = 0x10; + smpc_ram[0x5f] = 0x10; - #ifdef MAME_DEBUG - /*Uncomment this to enable header info*/ - //print_game_info(); + #ifdef MAME_DEBUG + /*Uncomment this to enable header info*/ + //print_game_info(); #endif } #define DATA_TRANSFER(_max_) \ - for(dst_i=0;dst_i<_max_;dst_i++,src_i++) \ + for(dst_i=0;dst_i<_max_;dst_i++,src_i++) \ STR[(dst_i & 0xfc) | (~dst_i & 3)] = ROM[src_i]; #define DATA_DELETE \ @@ -3852,78 +3852,78 @@ GAME( 1996, stvbios, 0, stv, stv, stv, ROT0, "Sega", //GAME YEAR, NAME, PARENT, MACH, INP, INIT, MONITOR /* Playable */ -GAME( 1998, astrass, stvbios, stv, stv, astrass, ROT0, "Sunsoft", "Astra SuperStars (J 980514 V1.002)", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND ) -GAME( 1995, bakubaku, stvbios, stv, stv, stv, ROT0, "Sega", "Baku Baku Animal (J 950407 V1.000)", GAME_NO_SOUND | GAME_IMPERFECT_GRAPHICS ) -GAME( 1996, batmanfr, stvbios, stv, batmanfr, batmanfr, ROT0, "Acclaim", "Batman Forever (JUE 960507 V1.000)", GAME_NO_SOUND ) -GAME( 1996, colmns97, stvbios, stv, stv, colmns97, ROT0, "Sega", "Columns '97 (JET 961209 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) -GAME( 1997, cotton2, stvbios, stv, stv, cotton2, ROT0, "Success", "Cotton 2 (JUET 970902 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) -GAME( 1998, cottonbm, stvbios, stv, stv, cottonbm, ROT0, "Success", "Cotton Boomerang (JUET 980709 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) -GAME( 1995, critcrsh, stvbios, stv, critcrsh, stv, ROT0, "Sega", "Critter Crusher (EA 951204 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) -GAME( 1999, danchih, stvbios, stv, stvmp, danchih, ROT0, "Altron (Tecmo license)", "Danchi de Hanafuda (J 990607 V1.400)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) -GAME( 2000, danchiq, stvbios, stv, stv, danchih, ROT0, "Altron", "Danchi de Quiz Okusan Yontaku Desuyo! (J 001128 V1.200)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) -GAME( 1996, diehard, stvbios, stv, stv, diehard, ROT0, "Sega", "Die Hard Arcade (UET 960515 V1.000)", GAME_IMPERFECT_SOUND ) -GAME( 1996, dnmtdeka, diehard, stv, stv, dnmtdeka, ROT0, "Sega", "Dynamite Deka (J 960515 V1.000)", GAME_IMPERFECT_SOUND ) -GAME( 1995, ejihon, stvbios, stv, stv, stv, ROT0, "Sega", "Ejihon Tantei Jimusyo (J 950613 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) -GAME( 1995, fhboxers, stvbios, stv, stv, fhboxers, ROT0, "Sega", "Funky Head Boxers (JUETBKAL 951218 V1.000)", GAME_NO_SOUND | GAME_IMPERFECT_GRAPHICS ) -GAME( 1994, gaxeduel, stvbios, stv, stv, gaxeduel, ROT0, "Sega", "Golden Axe - The Duel (JUETL 950117 V1.000)", GAME_IMPERFECT_SOUND ) -GAME( 1998, grdforce, stvbios, stv, stv, grdforce, ROT0, "Success", "Guardian Force (JUET 980318 V0.105)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) -GAME( 1998, groovef, stvbios, stv, stv, groovef, ROT0, "Atlus", "Power Instinct 3 - Groove On Fight (J 970416 V1.001)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) -GAME( 1997, hanagumi, stvbios, stv, stv, hanagumi, ROT0, "Sega", "Hanagumi Taisen Columns - Sakura Wars (J 971007 V1.010)", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND ) -GAME( 1996, introdon, stvbios, stv, stv, stv, ROT0, "Sunsoft / Success", "Karaoke Quiz Intro Don Don! (J 960213 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) -GAME( 1995, kiwames, stvbios, stv, stvmp, stv, ROT0, "Athena", "Pro Mahjong Kiwame S (J 951020 V1.208)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) -GAME( 1997, maruchan, stvbios, stv, stv, maruchan, ROT0, "Sega / Toyosuisan", "Maru-Chan de Goo! (J 971216 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) -GAME( 1996, mausuke, stvbios, stv, stv, mausuke, ROT0, "Data East", "Mausuke no Ojama the World (J 960314 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) -GAME( 1998, myfairld, stvbios, stv, stvmp, stv, ROT0, "Micronet", "Virtual Mahjong 2 - My Fair Lady (J 980608 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) -GAME( 1998, othellos, stvbios, stv, stv, othellos, ROT0, "Success", "Othello Shiyouyo (J 980423 V1.002)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) -GAME( 1995, pblbeach, stvbios, stv, stv, pblbeach, ROT0, "T&E Soft", "Pebble Beach - The Great Shot (JUE 950913 V0.990)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) -GAME( 1996, prikura, stvbios, stv, stv, prikura, ROT0, "Atlus", "Princess Clara Daisakusen (J 960910 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) -GAME( 1996, puyosun, stvbios, stv, stv, puyosun, ROT0, "Compile", "Puyo Puyo Sun (J 961115 V0.001)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) -GAME( 1998, rsgun, stvbios, stv, stv, rsgun, ROT0, "Treasure", "Radiant Silvergun (JUET 980523 V1.000)", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND ) -GAME( 1998, sasissu, stvbios, stv, stv, sasissu, ROT0, "Sega", "Taisen Tanto-R Sashissu!! (J 980216 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) -GAME( 1999, sanjeon, sasissu, stv, stv, sanjeon, ROT0, "Sega / Deniam", "DaeJeon! SanJeon SuJeon (AJTUE 990412 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) -GAME( 1997, seabass, stvbios, stv, stv, seabass, ROT0, "A wave inc. (Able license)", "Sea Bass Fishing (JUET 971110 V0.001)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) -GAME( 1995, shanhigw, stvbios, stv, stv, shanhigw, ROT0, "Sunsoft / Activision", "Shanghai - The Great Wall / Shanghai Triple Threat (JUE 950623 V1.005)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) -GAME( 1997, shienryu, stvbios, stv, stv, shienryu, ROT270, "Warashi", "Shienryu (JUET 961226 V1.000)", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND ) -GAME( 1998, sss, stvbios, stv, stv, sss, ROT0, "Capcom / Cave / Victor", "Steep Slope Sliders (JUET 981110 V1.000)", GAME_IMPERFECT_SOUND ) -GAME( 1995, sandor, stvbios, stv, stv, sandor, ROT0, "Sega", "Puzzle & Action: Sando-R (J 951114 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) -GAME( 1997, thunt, sandor, stv, stv, thunt, ROT0, "Sega", "Puzzle & Action: Treasure Hunt (JUET 970901 V2.00E)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) -GAME( 1997, thuntk, sandor, stv, stv, sandor, ROT0, "Sega / Deniam", "Puzzle & Action: BoMulEul Chajara (JUET 970125 V2.00K)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) -GAME( 1996, sokyugrt, stvbios, stv, stv, sokyugrt, ROT0, "Raizing / 8ing", "Soukyugurentai / Terra Diver (JUET 960821 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) -GAME( 1995, suikoenb, stvbios, stv, stv, suikoenb, ROT0, "Data East", "Suikoenbu / Outlaws of the Lost Dynasty (JUETL 950314 V2.001)", GAME_IMPERFECT_SOUND ) -GAME( 1996, vfkids, stvbios, stv, stv, stv, ROT0, "Sega", "Virtua Fighter Kids (JUET 960319 V0.000)", GAME_IMPERFECT_SOUND ) -GAME( 1997, winterht, stvbios, stv, stv, winterht, ROT0, "Sega", "Winter Heat (JUET 971012 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) -GAME( 1997, znpwfv, stvbios, stv, stv, znpwfv, ROT0, "Sega", "Zen Nippon Pro-Wrestling Featuring Virtua (J 971123 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) +GAME( 1998, astrass, stvbios, stv, stv, astrass, ROT0, "Sunsoft", "Astra SuperStars (J 980514 V1.002)", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND ) +GAME( 1995, bakubaku, stvbios, stv, stv, stv, ROT0, "Sega", "Baku Baku Animal (J 950407 V1.000)", GAME_NO_SOUND | GAME_IMPERFECT_GRAPHICS ) +GAME( 1996, batmanfr, stvbios, stv, batmanfr, batmanfr, ROT0, "Acclaim", "Batman Forever (JUE 960507 V1.000)", GAME_NO_SOUND ) +GAME( 1996, colmns97, stvbios, stv, stv, colmns97, ROT0, "Sega", "Columns '97 (JET 961209 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) +GAME( 1997, cotton2, stvbios, stv, stv, cotton2, ROT0, "Success", "Cotton 2 (JUET 970902 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) +GAME( 1998, cottonbm, stvbios, stv, stv, cottonbm, ROT0, "Success", "Cotton Boomerang (JUET 980709 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) +GAME( 1995, critcrsh, stvbios, stv, critcrsh, stv, ROT0, "Sega", "Critter Crusher (EA 951204 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) +GAME( 1999, danchih, stvbios, stv, stvmp, danchih, ROT0, "Altron (Tecmo license)", "Danchi de Hanafuda (J 990607 V1.400)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) +GAME( 2000, danchiq, stvbios, stv, stv, danchih, ROT0, "Altron", "Danchi de Quiz Okusan Yontaku Desuyo! (J 001128 V1.200)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) +GAME( 1996, diehard, stvbios, stv, stv, diehard, ROT0, "Sega", "Die Hard Arcade (UET 960515 V1.000)", GAME_IMPERFECT_SOUND ) +GAME( 1996, dnmtdeka, diehard, stv, stv, dnmtdeka, ROT0, "Sega", "Dynamite Deka (J 960515 V1.000)", GAME_IMPERFECT_SOUND ) +GAME( 1995, ejihon, stvbios, stv, stv, stv, ROT0, "Sega", "Ejihon Tantei Jimusyo (J 950613 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) +GAME( 1995, fhboxers, stvbios, stv, stv, fhboxers, ROT0, "Sega", "Funky Head Boxers (JUETBKAL 951218 V1.000)", GAME_NO_SOUND | GAME_IMPERFECT_GRAPHICS ) +GAME( 1994, gaxeduel, stvbios, stv, stv, gaxeduel, ROT0, "Sega", "Golden Axe - The Duel (JUETL 950117 V1.000)", GAME_IMPERFECT_SOUND ) +GAME( 1998, grdforce, stvbios, stv, stv, grdforce, ROT0, "Success", "Guardian Force (JUET 980318 V0.105)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) +GAME( 1998, groovef, stvbios, stv, stv, groovef, ROT0, "Atlus", "Power Instinct 3 - Groove On Fight (J 970416 V1.001)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) +GAME( 1997, hanagumi, stvbios, stv, stv, hanagumi, ROT0, "Sega", "Hanagumi Taisen Columns - Sakura Wars (J 971007 V1.010)", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND ) +GAME( 1996, introdon, stvbios, stv, stv, stv, ROT0, "Sunsoft / Success", "Karaoke Quiz Intro Don Don! (J 960213 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) +GAME( 1995, kiwames, stvbios, stv, stvmp, stv, ROT0, "Athena", "Pro Mahjong Kiwame S (J 951020 V1.208)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) +GAME( 1997, maruchan, stvbios, stv, stv, maruchan, ROT0, "Sega / Toyosuisan", "Maru-Chan de Goo! (J 971216 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) +GAME( 1996, mausuke, stvbios, stv, stv, mausuke, ROT0, "Data East", "Mausuke no Ojama the World (J 960314 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) +GAME( 1998, myfairld, stvbios, stv, stvmp, stv, ROT0, "Micronet", "Virtual Mahjong 2 - My Fair Lady (J 980608 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) +GAME( 1998, othellos, stvbios, stv, stv, othellos, ROT0, "Success", "Othello Shiyouyo (J 980423 V1.002)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) +GAME( 1995, pblbeach, stvbios, stv, stv, pblbeach, ROT0, "T&E Soft", "Pebble Beach - The Great Shot (JUE 950913 V0.990)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) +GAME( 1996, prikura, stvbios, stv, stv, prikura, ROT0, "Atlus", "Princess Clara Daisakusen (J 960910 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) +GAME( 1996, puyosun, stvbios, stv, stv, puyosun, ROT0, "Compile", "Puyo Puyo Sun (J 961115 V0.001)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) +GAME( 1998, rsgun, stvbios, stv, stv, rsgun, ROT0, "Treasure", "Radiant Silvergun (JUET 980523 V1.000)", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND ) +GAME( 1998, sasissu, stvbios, stv, stv, sasissu, ROT0, "Sega", "Taisen Tanto-R Sashissu!! (J 980216 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) +GAME( 1999, sanjeon, sasissu, stv, stv, sanjeon, ROT0, "Sega / Deniam", "DaeJeon! SanJeon SuJeon (AJTUE 990412 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) +GAME( 1997, seabass, stvbios, stv, stv, seabass, ROT0, "A wave inc. (Able license)", "Sea Bass Fishing (JUET 971110 V0.001)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) +GAME( 1995, shanhigw, stvbios, stv, stv, shanhigw, ROT0, "Sunsoft / Activision", "Shanghai - The Great Wall / Shanghai Triple Threat (JUE 950623 V1.005)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) +GAME( 1997, shienryu, stvbios, stv, stv, shienryu, ROT270, "Warashi", "Shienryu (JUET 961226 V1.000)", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND ) +GAME( 1998, sss, stvbios, stv, stv, sss, ROT0, "Capcom / Cave / Victor", "Steep Slope Sliders (JUET 981110 V1.000)", GAME_IMPERFECT_SOUND ) +GAME( 1995, sandor, stvbios, stv, stv, sandor, ROT0, "Sega", "Puzzle & Action: Sando-R (J 951114 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) +GAME( 1997, thunt, sandor, stv, stv, thunt, ROT0, "Sega", "Puzzle & Action: Treasure Hunt (JUET 970901 V2.00E)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) +GAME( 1997, thuntk, sandor, stv, stv, sandor, ROT0, "Sega / Deniam", "Puzzle & Action: BoMulEul Chajara (JUET 970125 V2.00K)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) +GAME( 1996, sokyugrt, stvbios, stv, stv, sokyugrt, ROT0, "Raizing / 8ing", "Soukyugurentai / Terra Diver (JUET 960821 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) +GAME( 1995, suikoenb, stvbios, stv, stv, suikoenb, ROT0, "Data East", "Suikoenbu / Outlaws of the Lost Dynasty (JUETL 950314 V2.001)", GAME_IMPERFECT_SOUND ) +GAME( 1996, vfkids, stvbios, stv, stv, stv, ROT0, "Sega", "Virtua Fighter Kids (JUET 960319 V0.000)", GAME_IMPERFECT_SOUND ) +GAME( 1997, winterht, stvbios, stv, stv, winterht, ROT0, "Sega", "Winter Heat (JUET 971012 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) +GAME( 1997, znpwfv, stvbios, stv, stv, znpwfv, ROT0, "Sega", "Zen Nippon Pro-Wrestling Featuring Virtua (J 971123 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) /* Almost */ -GAME( 1997, vmahjong, stvbios, stv, stvmp, stv, ROT0, "Micronet", "Virtual Mahjong (J 961214 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) -GAME( 1998, twcup98, stvbios, stv, stv, twcup98, ROT0, "Tecmo", "Tecmo World Cup '98 (JUET 980410 V1.000)", GAME_UNEMULATED_PROTECTION | GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS|GAME_NOT_WORKING ) // player movement -GAME( 1995, smleague, stvbios, stv, stv, smleague, ROT0, "Sega", "Super Major League (U 960108 V1.000)", GAME_NOT_WORKING | GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) -GAME( 1995, finlarch, smleague,stv, stv, finlarch, ROT0, "Sega", "Final Arch (J 950714 V1.001)", GAME_NOT_WORKING | GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) -GAME( 1998, elandore, stvbios, stv, stv, elandore, ROT0, "Sai-Mate", "Touryuu Densetsu Elan-Doree / Elan Doree - Legend of Dragoon (JUET 980922 V1.006)", GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION | GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) +GAME( 1997, vmahjong, stvbios, stv, stvmp, stv, ROT0, "Micronet", "Virtual Mahjong (J 961214 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) +GAME( 1998, twcup98, stvbios, stv, stv, twcup98, ROT0, "Tecmo", "Tecmo World Cup '98 (JUET 980410 V1.000)", GAME_UNEMULATED_PROTECTION | GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS|GAME_NOT_WORKING ) // player movement +GAME( 1995, smleague, stvbios, stv, stv, smleague, ROT0, "Sega", "Super Major League (U 960108 V1.000)", GAME_NOT_WORKING | GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) +GAME( 1995, finlarch, smleague,stv, stv, finlarch, ROT0, "Sega", "Final Arch (J 950714 V1.001)", GAME_NOT_WORKING | GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) +GAME( 1998, elandore, stvbios, stv, stv, elandore, ROT0, "Sai-Mate", "Touryuu Densetsu Elan-Doree / Elan Doree - Legend of Dragoon (JUET 980922 V1.006)", GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION | GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) /* Unemulated printer device */ -GAME( 1998, stress, stvbios, stv, stv, stv, ROT0, "Sega", "Stress Busters (J 981020 V1.000)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND ) -GAME( 1997, nclubv3, stvbios, stv, stv, nameclv3, ROT0, "Sega", "Name Club Ver.3 (J 970723 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING ) -GAME( 1997, pclub2, stvbios, stv, stv, stv, ROT0, "Atlus", "Print Club 2 (U 970921 V1.000)", GAME_NOT_WORKING ) -GAME( 1999, pclub2v3, pclub2, stv, stv, stv, ROT0, "Atlus", "Print Club 2 Vol. 3 (U 990310 V1.000)", GAME_NOT_WORKING ) +GAME( 1998, stress, stvbios, stv, stv, stv, ROT0, "Sega", "Stress Busters (J 981020 V1.000)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND ) +GAME( 1997, nclubv3, stvbios, stv, stv, nameclv3, ROT0, "Sega", "Name Club Ver.3 (J 970723 V1.000)", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING ) +GAME( 1997, pclub2, stvbios, stv, stv, stv, ROT0, "Atlus", "Print Club 2 (U 970921 V1.000)", GAME_NOT_WORKING ) +GAME( 1999, pclub2v3, pclub2, stv, stv, stv, ROT0, "Atlus", "Print Club 2 Vol. 3 (U 990310 V1.000)", GAME_NOT_WORKING ) /* Doing something.. but not enough yet */ -GAME( 1995, vfremix, stvbios, stv, stv, vfremix, ROT0, "Sega", "Virtua Fighter Remix (JUETBKAL 950428 V1.000)", GAME_IMPERFECT_SOUND | GAME_NOT_WORKING ) -GAME( 1997, findlove, stvbios, stv, stv, stv, ROT0, "Daiki / FCF", "Find Love (J 971212 V1.000)", GAME_IMPERFECT_SOUND | GAME_NOT_WORKING ) -GAME( 1996, decathlt, stvbios, stv, stv, decathlt, ROT0, "Sega", "Decathlete (JUET 960709 V1.001)", GAME_NO_SOUND | GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION ) -GAME( 1996, decathlto, decathlt,stv, stv, decathlt, ROT0, "Sega", "Decathlete (JUET 960424 V1.000)", GAME_NO_SOUND | GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION ) +GAME( 1995, vfremix, stvbios, stv, stv, vfremix, ROT0, "Sega", "Virtua Fighter Remix (JUETBKAL 950428 V1.000)", GAME_IMPERFECT_SOUND | GAME_NOT_WORKING ) +GAME( 1997, findlove, stvbios, stv, stv, stv, ROT0, "Daiki / FCF", "Find Love (J 971212 V1.000)", GAME_IMPERFECT_SOUND | GAME_NOT_WORKING ) +GAME( 1996, decathlt, stvbios, stv, stv, decathlt, ROT0, "Sega", "Decathlete (JUET 960709 V1.001)", GAME_NO_SOUND | GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION ) +GAME( 1996, decathlto, decathlt,stv, stv, decathlt, ROT0, "Sega", "Decathlete (JUET 960424 V1.000)", GAME_NO_SOUND | GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION ) /* Gives I/O errors */ -GAME( 1996, magzun, stvbios, stv, stv, stv, ROT0, "Sega", "Magical Zunou Power (J 961031 V1.000)", GAME_NOT_WORKING ) -GAME( 1997, techbowl, stvbios, stv, stv, stv, ROT0, "Sega", "Technical Bowling (J 971212 V1.000)", GAME_NOT_WORKING ) -GAME( 1999, micrombc, stvbios, stv, stv, stv, ROT0, "Sega", "Microman Battle Charge (J 990326 V1.000)", GAME_NOT_WORKING ) +GAME( 1996, magzun, stvbios, stv, stv, stv, ROT0, "Sega", "Magical Zunou Power (J 961031 V1.000)", GAME_NOT_WORKING ) +GAME( 1997, techbowl, stvbios, stv, stv, stv, ROT0, "Sega", "Technical Bowling (J 971212 V1.000)", GAME_NOT_WORKING ) +GAME( 1999, micrombc, stvbios, stv, stv, stv, ROT0, "Sega", "Microman Battle Charge (J 990326 V1.000)", GAME_NOT_WORKING ) /* Black screen */ -GAME( 1999, ffreveng, stvbios, stv, stv, ffreveng, ROT0, "Capcom", "Final Fight Revenge (JUET 990714 V1.000)", GAME_UNEMULATED_PROTECTION | GAME_NO_SOUND | GAME_NOT_WORKING ) +GAME( 1999, ffreveng, stvbios, stv, stv, ffreveng, ROT0, "Capcom", "Final Fight Revenge (JUET 990714 V1.000)", GAME_UNEMULATED_PROTECTION | GAME_NO_SOUND | GAME_NOT_WORKING ) /* CD games */ -GAME( 1995, sfish2, 0, stv, stv, stv, ROT0, "Sega", "Sport Fishing 2 (UET 951106 V1.10e)", GAME_NO_SOUND | GAME_NOT_WORKING ) -GAME( 1995, sfish2j, sfish2, stv, stv, stv, ROT0, "Sega", "Sport Fishing 2 (J 951201 V1.100)", GAME_NO_SOUND | GAME_NOT_WORKING ) +GAME( 1995, sfish2, 0, stv, stv, stv, ROT0, "Sega", "Sport Fishing 2 (UET 951106 V1.10e)", GAME_NO_SOUND | GAME_NOT_WORKING ) +GAME( 1995, sfish2j, sfish2, stv, stv, stv, ROT0, "Sega", "Sport Fishing 2 (J 951201 V1.100)", GAME_NO_SOUND | GAME_NOT_WORKING ) /* This is the known list of undumped ST-V games: diff --git a/src/mame/drivers/subs.c b/src/mame/drivers/subs.c index eb426520b5c..46ab9a03b01 100644 --- a/src/mame/drivers/subs.c +++ b/src/mame/drivers/subs.c @@ -164,8 +164,8 @@ static const gfx_layout motion_layout = static GFXDECODE_START( subs ) - GFXDECODE_ENTRY( "gfx1", 0, playfield_layout, 0, 2 ) /* playfield graphics */ - GFXDECODE_ENTRY( "gfx2", 0, motion_layout, 0, 2 ) /* motion graphics */ + GFXDECODE_ENTRY( "gfx1", 0, playfield_layout, 0, 2 ) /* playfield graphics */ + GFXDECODE_ENTRY( "gfx2", 0, motion_layout, 0, 2 ) /* motion graphics */ GFXDECODE_END diff --git a/src/mame/drivers/suna16.c b/src/mame/drivers/suna16.c index b6db3d07d6a..befff84e8b7 100644 --- a/src/mame/drivers/suna16.c +++ b/src/mame/drivers/suna16.c @@ -1032,19 +1032,19 @@ MACHINE_DRIVER_END ROM_START( bssoccer ) - ROM_REGION( 0x200000, "maincpu", 0 ) /* 68000 Code */ + ROM_REGION( 0x200000, "maincpu", 0 ) /* 68000 Code */ ROM_LOAD16_BYTE( "02", 0x000000, 0x080000, CRC(32871005) SHA1(b094ee3f4fc24c0521915d565f6e203d51e51f6d) ) ROM_LOAD16_BYTE( "01", 0x000001, 0x080000, CRC(ace00db6) SHA1(6bd146f9b44c97be77578b4f0ffa28cbf66283c2) ) ROM_LOAD16_BYTE( "04", 0x100000, 0x080000, CRC(25ee404d) SHA1(1ab7cb1b4836caa05be73ea441deed80f1e1ba81) ) ROM_LOAD16_BYTE( "03", 0x100001, 0x080000, CRC(1a131014) SHA1(4d21264da3ee9b9912d1205999a555657ba33bd7) ) - ROM_REGION( 0x010000, "audiocpu", 0 ) /* Z80 #1 - Music */ + ROM_REGION( 0x010000, "audiocpu", 0 ) /* Z80 #1 - Music */ ROM_LOAD( "11", 0x000000, 0x010000, CRC(df7ae9bc) SHA1(86660e723b0712c131dc57645b6a659d5100e962) ) // 1xxxxxxxxxxxxxxx = 0xFF - ROM_REGION( 0x080000, "pcm1", 0 ) /* Z80 #2 - PCM */ + ROM_REGION( 0x080000, "pcm1", 0 ) /* Z80 #2 - PCM */ ROM_LOAD( "13", 0x000000, 0x080000, CRC(2b273dca) SHA1(86e1bac9d1e39457c565390b9053986453db95ab) ) - ROM_REGION( 0x080000, "pcm2", 0 ) /* Z80 #3 - PCM */ + ROM_REGION( 0x080000, "pcm2", 0 ) /* Z80 #3 - PCM */ ROM_LOAD( "12", 0x000000, 0x080000, CRC(6b73b87b) SHA1(52c7dc7da6c21eb7e0dad13deadb1faa94a87bb3) ) ROM_REGION( 0x300000, "gfx1", ROMREGION_INVERT ) /* Sprites */ @@ -1080,14 +1080,14 @@ audio2.rom 27c010 ROM_START( uballoon ) - ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */ + ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */ ROM_LOAD16_BYTE( "prg2.rom", 0x000000, 0x080000, CRC(72ab80ea) SHA1(b755940877cf286559208106dd5e6933aeb72242) ) ROM_LOAD16_BYTE( "prg1.rom", 0x000001, 0x080000, CRC(27a04f55) SHA1(a530294b000654db8d84efe4835b72e0dca62819) ) - ROM_REGION( 0x010000, "audiocpu", 0 ) /* Z80 #1 - Music */ + ROM_REGION( 0x010000, "audiocpu", 0 ) /* Z80 #1 - Music */ ROM_LOAD( "audio1.rom", 0x000000, 0x010000, CRC(c771f2b4) SHA1(6da4c526c0ea3be5d5bb055a31bf1171a6ddb51d) ) - ROM_REGION( 0x020000, "pcm1", 0 ) /* Z80 #2 - PCM */ + ROM_REGION( 0x020000, "pcm1", 0 ) /* Z80 #2 - PCM */ ROM_LOAD( "audio2.rom", 0x000000, 0x020000, CRC(c7f75347) SHA1(5bbbd39285c593441c6da6a12f3632d60b103216) ) /* There's no Z80 #3 - PCM */ @@ -1133,14 +1133,14 @@ static DRIVER_INIT( uballoon ) ***************************************************************************/ ROM_START( sunaq ) - ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */ + ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */ ROM_LOAD16_BYTE( "prog2.bin", 0x000000, 0x080000, CRC(a92bce45) SHA1(258b2a21c27effa1d3380e4c08558542b1d05175) ) ROM_LOAD16_BYTE( "prog1.bin", 0x000001, 0x080000, CRC(ff690e7e) SHA1(43b9c67f8d8d791be922966632613a077807b755) ) - ROM_REGION( 0x010000, "audiocpu", 0 ) /* Z80 #1 - Music */ + ROM_REGION( 0x010000, "audiocpu", 0 ) /* Z80 #1 - Music */ ROM_LOAD( "audio1.bin", 0x000000, 0x010000, CRC(3df42f82) SHA1(91c1037c9d5d1ec82ed4cdfb35de5a6d626ecb3b) ) - ROM_REGION( 0x080000, "pcm1", 0 ) /* Z80 #2 - PCM */ + ROM_REGION( 0x080000, "pcm1", 0 ) /* Z80 #2 - PCM */ ROM_LOAD( "audio2.bin", 0x000000, 0x080000, CRC(cac85ba9) SHA1(e5fbe813022c17d9eaf2a57184341666e2af365a) ) /* There's no Z80 #3 - PCM */ @@ -1217,10 +1217,10 @@ ROM_START( bestbest ) ROM_LOAD16_BYTE( "3.bin", 0x00000, 0x80000, CRC(e2bb8f26) SHA1(d73bbe034718c77774dede61e751a9ae2d29118a) ) ROM_LOAD16_BYTE( "1.bin", 0x00001, 0x80000, CRC(d365e20a) SHA1(29706d6e422e71c7dad51a3369683a6539f72b54) ) - ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 #1 - Music */ + ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 #1 - Music */ ROM_LOAD( "5.bin", 0x00000, 0x10000, CRC(bb9265e6) SHA1(424eceac4fd48c9a99653ece2f3fcbc8b37569cf) ) // BEST OF BEST V10 XILINX PROGRAM 3020 1994,1,17 - ROM_REGION( 0x10000, "pcm1", 0 ) /* Z80 #2 - PCM */ + ROM_REGION( 0x10000, "pcm1", 0 ) /* Z80 #2 - PCM */ ROM_LOAD( "6.bin", 0x00000, 0x10000, CRC(dd445f6b) SHA1(658417d72c003f25db273e3c731838317ed1876c) ) /* There's no Z80 #3 - PCM */ diff --git a/src/mame/drivers/suna8.c b/src/mame/drivers/suna8.c index 6ab804b67a0..7d20b089c2c 100644 --- a/src/mame/drivers/suna8.c +++ b/src/mame/drivers/suna8.c @@ -208,7 +208,7 @@ static DRIVER_INIT( hardhea2 ) const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM); UINT8 *RAM = memory_region(machine, "maincpu"); size_t size = memory_region_length(machine, "maincpu"); - UINT8 *decrypt = auto_alloc_array(machine, UINT8, size); + UINT8 *decrypt = auto_alloc_array(machine, UINT8, size); UINT8 x; int i; @@ -295,7 +295,7 @@ static DRIVER_INIT( starfigh ) const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM); UINT8 *RAM = memory_region(machine, "maincpu"); size_t size = memory_region_length(machine, "maincpu"); - UINT8 *decrypt = auto_alloc_array(machine, UINT8, size); + UINT8 *decrypt = auto_alloc_array(machine, UINT8, size); UINT8 x; int i; @@ -363,7 +363,7 @@ static DRIVER_INIT( sparkman ) const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM); UINT8 *RAM = memory_region(machine, "maincpu"); size_t size = memory_region_length(machine, "maincpu"); - UINT8 *decrypt = auto_alloc_array(machine, UINT8, size); + UINT8 *decrypt = auto_alloc_array(machine, UINT8, size); UINT8 x; int i; @@ -490,7 +490,7 @@ static WRITE8_HANDLER( hardhead_bankswitch_w ) { int bank = data & 0x0f; - if (data & ~0xef) logerror("CPU #0 - PC %04X: unknown bank bits: %02X\n",cpu_get_pc(space->cpu),data); + if (data & ~0xef) logerror("CPU #0 - PC %04X: unknown bank bits: %02X\n",cpu_get_pc(space->cpu),data); memory_set_bank(space->machine, "bank1", bank); } @@ -546,7 +546,7 @@ static WRITE8_HANDLER( rranger_bankswitch_w ) int bank = data & 0x07; if ((~data & 0x10) && (bank >= 4)) bank += 4; - if (data & ~0xf7) logerror("CPU #0 - PC %04X: unknown bank bits: %02X\n",cpu_get_pc(space->cpu),data); + if (data & ~0xf7) logerror("CPU #0 - PC %04X: unknown bank bits: %02X\n",cpu_get_pc(space->cpu),data); memory_set_bank(space->machine, "bank1", bank); @@ -616,7 +616,7 @@ static READ8_HANDLER( brickzn_c140_r ) static WRITE8_HANDLER( brickzn_palettebank_w ) { suna8_palettebank = (data >> 1) & 1; - if (data & ~0x02) logerror("CPU #0 - PC %04X: unknown palettebank bits: %02X\n",cpu_get_pc(space->cpu),data); + if (data & ~0x02) logerror("CPU #0 - PC %04X: unknown palettebank bits: %02X\n",cpu_get_pc(space->cpu),data); /* Also used as soundlatch - depending on c0c0? */ soundlatch_w(space,0,data); @@ -630,7 +630,7 @@ static WRITE8_HANDLER( brickzn_palettebank_w ) static WRITE8_HANDLER( brickzn_spritebank_w ) { suna8_spritebank = (data >> 1) & 1; - if (data & ~0x03) logerror("CPU #0 - PC %04X: unknown spritebank bits: %02X\n",cpu_get_pc(space->cpu),data); + if (data & ~0x03) logerror("CPU #0 - PC %04X: unknown spritebank bits: %02X\n",cpu_get_pc(space->cpu),data); flip_screen_set(space->machine, data & 0x01 ); } @@ -647,7 +647,7 @@ static WRITE8_HANDLER( brickzn_rombank_w ) { int bank = data & 0x0f; - if (data & ~0x0f) logerror("CPU #0 - PC %04X: unknown rom bank bits: %02X\n",cpu_get_pc(space->cpu),data); + if (data & ~0x0f) logerror("CPU #0 - PC %04X: unknown rom bank bits: %02X\n",cpu_get_pc(space->cpu),data); memory_set_bank(space->machine, "bank1", bank); suna8_rombank = data; @@ -693,7 +693,7 @@ static WRITE8_HANDLER( hardhea2_nmi_w ) static WRITE8_HANDLER( hardhea2_flipscreen_w ) { flip_screen_set(space->machine, data & 0x01); - if (data & ~0x01) logerror("CPU #0 - PC %04X: unknown flipscreen bits: %02X\n",cpu_get_pc(space->cpu),data); + if (data & ~0x01) logerror("CPU #0 - PC %04X: unknown flipscreen bits: %02X\n",cpu_get_pc(space->cpu),data); } static WRITE8_HANDLER( hardhea2_leds_w ) @@ -712,7 +712,7 @@ static WRITE8_HANDLER( hardhea2_leds_w ) static WRITE8_HANDLER( hardhea2_spritebank_w ) { suna8_spritebank = (data >> 1) & 1; - if (data & ~0x02) logerror("CPU #0 - PC %04X: unknown spritebank bits: %02X\n",cpu_get_pc(space->cpu),data); + if (data & ~0x02) logerror("CPU #0 - PC %04X: unknown spritebank bits: %02X\n",cpu_get_pc(space->cpu),data); } /* @@ -723,7 +723,7 @@ static WRITE8_HANDLER( hardhea2_rombank_w ) { int bank = data & 0x0f; - if (data & ~0x0f) logerror("CPU #0 - PC %04X: unknown rom bank bits: %02X\n",cpu_get_pc(space->cpu),data); + if (data & ~0x0f) logerror("CPU #0 - PC %04X: unknown rom bank bits: %02X\n",cpu_get_pc(space->cpu),data); memory_set_bank(space->machine, "bank1", bank); suna8_rombank = data; @@ -797,7 +797,7 @@ static UINT8 spritebank_latch; static WRITE8_HANDLER( starfigh_spritebank_latch_w ) { spritebank_latch = (data >> 2) & 1; - if (data & ~0x04) logerror("CPU #0 - PC %04X: unknown spritebank bits: %02X\n",cpu_get_pc(space->cpu),data); + if (data & ~0x04) logerror("CPU #0 - PC %04X: unknown spritebank bits: %02X\n",cpu_get_pc(space->cpu),data); } static WRITE8_HANDLER( starfigh_spritebank_w ) diff --git a/src/mame/drivers/supbtime.c b/src/mame/drivers/supbtime.c index bcbb0a4e77e..09bd9938c6b 100644 --- a/src/mame/drivers/supbtime.c +++ b/src/mame/drivers/supbtime.c @@ -34,7 +34,7 @@ VIDEO_UPDATE( supbtime ); static READ16_HANDLER( supbtime_controls_r ) { - switch (offset<<1) + switch (offset<<1) { case 0: return input_port_read(space->machine, "INPUTS"); @@ -182,7 +182,7 @@ static INPUT_PORTS_START( supbtime ) PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Allow_Continue ) ) PORT_DIPSETTING( 0x0000, DEF_STR( No ) ) PORT_DIPSETTING( 0x0200, DEF_STR( Yes ) ) - PORT_DIPNAME( 0x0100, 0x0000, DEF_STR( Demo_Sounds ) ) + PORT_DIPNAME( 0x0100, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPSETTING( 0x0100, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) INPUT_PORTS_END @@ -260,7 +260,7 @@ static INPUT_PORTS_START( chinatwn ) PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) ) PORT_DIPSETTING( 0x0200, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0100, 0x0000, DEF_STR( Demo_Sounds ) ) + PORT_DIPNAME( 0x0100, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPSETTING( 0x0100, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) INPUT_PORTS_END @@ -412,11 +412,11 @@ ROM_START( supbtime ) ROM_LOAD( "mae02.bin", 0x000000, 0x80000, CRC(a715cca0) SHA1(0539bba39c60324d85599ac69ff78bb215deb511) ) /* chars */ ROM_REGION( 0x100000, "gfx2", 0 ) - ROM_LOAD16_BYTE( "mae00.bin", 0x000001, 0x80000, CRC(30043094) SHA1(5302cfd9bdaf90c4901fda75407379c4ce1cbdec) ) /* sprites */ + ROM_LOAD16_BYTE( "mae00.bin", 0x000001, 0x80000, CRC(30043094) SHA1(5302cfd9bdaf90c4901fda75407379c4ce1cbdec) ) /* sprites */ ROM_LOAD16_BYTE( "mae01.bin", 0x000000, 0x80000, CRC(434af3fb) SHA1(1cfd30d14f03554e826576d6d32ce424f0df3748) ) ROM_REGION( 0x40000, "oki", 0 ) /* ADPCM samples */ - ROM_LOAD( "gc05.bin", 0x00000, 0x20000, CRC(2f2246ff) SHA1(3fcceb6f5aa5f33187bcf4c59d88327f396fa80d) ) + ROM_LOAD( "gc05.bin", 0x00000, 0x20000, CRC(2f2246ff) SHA1(3fcceb6f5aa5f33187bcf4c59d88327f396fa80d) ) ROM_END /* is this actually a good dump?, there are no backgrounds ingame! */ @@ -432,11 +432,11 @@ ROM_START( supbtimea ) ROM_LOAD( "mae02.bin", 0x000000, 0x80000, CRC(a715cca0) SHA1(0539bba39c60324d85599ac69ff78bb215deb511) ) /* chars */ ROM_REGION( 0x100000, "gfx2", 0 ) - ROM_LOAD16_BYTE( "mae00.bin", 0x000001, 0x80000, CRC(30043094) SHA1(5302cfd9bdaf90c4901fda75407379c4ce1cbdec) ) /* sprites */ + ROM_LOAD16_BYTE( "mae00.bin", 0x000001, 0x80000, CRC(30043094) SHA1(5302cfd9bdaf90c4901fda75407379c4ce1cbdec) ) /* sprites */ ROM_LOAD16_BYTE( "mae01.bin", 0x000000, 0x80000, CRC(434af3fb) SHA1(1cfd30d14f03554e826576d6d32ce424f0df3748) ) ROM_REGION( 0x40000, "oki", 0 ) /* ADPCM samples */ - ROM_LOAD( "gc05.bin", 0x00000, 0x20000, CRC(2f2246ff) SHA1(3fcceb6f5aa5f33187bcf4c59d88327f396fa80d) ) + ROM_LOAD( "gc05.bin", 0x00000, 0x20000, CRC(2f2246ff) SHA1(3fcceb6f5aa5f33187bcf4c59d88327f396fa80d) ) ROM_END ROM_START( supbtimej ) @@ -451,11 +451,11 @@ ROM_START( supbtimej ) ROM_LOAD( "mae02.bin", 0x000000, 0x80000, CRC(a715cca0) SHA1(0539bba39c60324d85599ac69ff78bb215deb511) ) /* chars */ ROM_REGION( 0x100000, "gfx2", 0 ) - ROM_LOAD16_BYTE( "mae00.bin", 0x000001, 0x80000, CRC(30043094) SHA1(5302cfd9bdaf90c4901fda75407379c4ce1cbdec) ) /* sprites */ + ROM_LOAD16_BYTE( "mae00.bin", 0x000001, 0x80000, CRC(30043094) SHA1(5302cfd9bdaf90c4901fda75407379c4ce1cbdec) ) /* sprites */ ROM_LOAD16_BYTE( "mae01.bin", 0x000000, 0x80000, CRC(434af3fb) SHA1(1cfd30d14f03554e826576d6d32ce424f0df3748) ) ROM_REGION( 0x40000, "oki", 0 ) /* ADPCM samples */ - ROM_LOAD( "gc05.bin", 0x00000, 0x20000, CRC(2f2246ff) SHA1(3fcceb6f5aa5f33187bcf4c59d88327f396fa80d) ) + ROM_LOAD( "gc05.bin", 0x00000, 0x20000, CRC(2f2246ff) SHA1(3fcceb6f5aa5f33187bcf4c59d88327f396fa80d) ) ROM_END ROM_START( chinatwn ) @@ -470,11 +470,11 @@ ROM_START( chinatwn ) ROM_LOAD( "mak-02.h2", 0x000000, 0x80000, CRC(745b2c50) SHA1(557ac71da170a04caaab393dc43e46858ef8dd70) ) /* chars */ ROM_REGION( 0x100000, "gfx2", 0 ) - ROM_LOAD16_BYTE( "mak-00.a2", 0x000001, 0x80000, CRC(18e8cc1b) SHA1(afa79557222a94de7d9fde526ca45796f74fb3b2) ) /* sprites */ + ROM_LOAD16_BYTE( "mak-00.a2", 0x000001, 0x80000, CRC(18e8cc1b) SHA1(afa79557222a94de7d9fde526ca45796f74fb3b2) ) /* sprites */ ROM_LOAD16_BYTE( "mak-01.a4", 0x000000, 0x80000, CRC(d88ebda8) SHA1(ec6eab95f3ca8ee946151c46c6570b0b0c508ffc) ) ROM_REGION( 0x40000, "oki", 0 ) /* ADPCM samples */ - ROM_LOAD( "gv_03-.j14", 0x00000, 0x20000, CRC(948faf92) SHA1(2538c7d4fa7fe0bfdd5dccece8ee82e911cee63f) ) + ROM_LOAD( "gv_03-.j14", 0x00000, 0x20000, CRC(948faf92) SHA1(2538c7d4fa7fe0bfdd5dccece8ee82e911cee63f) ) ROM_END /******************************************************************************/ diff --git a/src/mame/drivers/superchs.c b/src/mame/drivers/superchs.c index cbf71892efe..cbd3e8041f8 100644 --- a/src/mame/drivers/superchs.c +++ b/src/mame/drivers/superchs.c @@ -122,7 +122,7 @@ static READ32_HANDLER( superchs_input_r ) case 0x01: return coin_word<<16; - } + } return 0xffffffff; } diff --git a/src/mame/drivers/supertnk.c b/src/mame/drivers/supertnk.c index 345709bd475..64896efa7fb 100644 --- a/src/mame/drivers/supertnk.c +++ b/src/mame/drivers/supertnk.c @@ -366,7 +366,7 @@ static INPUT_PORTS_START( supertnk ) PORT_DIPSETTING( 0x00, "at 15,000 points" ) PORT_DIPSETTING( 0x10, "at 10,000 points" ) PORT_DIPNAME( 0x20, 0x00, DEF_STR( Lives ) ) - PORT_DIPSETTING( 0x00, "3" ) + PORT_DIPSETTING( 0x00, "3" ) PORT_DIPSETTING( 0x20, "5" ) PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) @@ -461,7 +461,7 @@ ROM_START( supertnk ) ROM_REGION( 0x0060, "proms", 0 ) /* color PROM */ ROM_LOAD( "supertnk.clr", 0x0000, 0x0020, CRC(9ae1faee) SHA1(19de4bb8bc389d98c8f8e35c755fad96e1a6a0cd) ) - /* unknown - sync? */ + /* unknown - sync? */ ROM_LOAD( "supertnk.s", 0x0020, 0x0020, CRC(91722fcf) SHA1(f77386014b459cc151d2990ac823b91c04e8d319) ) /* unknown - sync? */ ROM_LOAD( "supertnk.t", 0x0040, 0x0020, CRC(154390bd) SHA1(4dc0fd7bd8999d2670c8d93aaada835d2a84d4db) ) diff --git a/src/mame/drivers/suprgolf.c b/src/mame/drivers/suprgolf.c index cedb97e5ecf..8e898c462cd 100644 --- a/src/mame/drivers/suprgolf.c +++ b/src/mame/drivers/suprgolf.c @@ -319,9 +319,9 @@ static INPUT_PORTS_START( suprgolf ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(2) /* release power? */ PORT_START("SYSTEM") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 ) /* 1P */ + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 ) /* 1P */ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1) /* POW */ - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START2 ) /* 1P */ + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START2 ) /* 1P */ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2) /* POW */ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) diff --git a/src/mame/drivers/suprnova.c b/src/mame/drivers/suprnova.c index b269dbe4471..aa1e2082f91 100644 --- a/src/mame/drivers/suprnova.c +++ b/src/mame/drivers/suprnova.c @@ -1324,18 +1324,18 @@ ROM_START( panicstr ) ROM_LOAD16_BYTE( "ps1000j0.u10", 0x000000, 0x100000, CRC(59645f89) SHA1(8da205c6e38899d6c637941700dd7eea56011c10) ) ROM_LOAD16_BYTE( "ps1001j0.u8", 0x000001, 0x100000, CRC(c4722be9) SHA1(7009d320a80cfa7d80efc5fc915081914bc3c827) ) - ROM_REGION( 0x800000, "gfx1", 0 ) + ROM_REGION( 0x800000, "gfx1", 0 ) ROM_LOAD( "ps-10000.u24", 0x000000, 0x400000, CRC(294b2f14) SHA1(90cbd0acdaa2d89d208c28aae33ab57c03624089) ) ROM_LOAD( "ps110100.u20", 0x400000, 0x400000, CRC(e292f393) SHA1(b0914f7f0abf9f821f2592c289ea4e3b3e7f819a) ) - ROM_REGION( 0x400000, "gfx2", 0 ) + ROM_REGION( 0x400000, "gfx2", 0 ) ROM_LOAD( "ps120000.u16", 0x000000, 0x400000, CRC(d772ac15) SHA1(6bf7b9bfccdcb7481b21fa2ab9b683d79033a192) ) - ROM_REGION( 0x400000, "gfx3", ROMREGION_ERASE00 ) /* Tiles Plane B */ + ROM_REGION( 0x400000, "gfx3", ROMREGION_ERASE00 ) /* Tiles Plane B */ /* First 0x040000 bytes (0x03ff Tiles) are RAM Based Tiles */ /* 0x040000 - 0x3fffff empty? */ - ROM_REGION( 0x400000, "ymz", 0 ) /* Samples */ + ROM_REGION( 0x400000, "ymz", 0 ) /* Samples */ ROM_LOAD( "ps-30000.u4", 0x000000, 0x400000, CRC(2262e263) SHA1(73443e5f40f5c5c9bd41c6207fa6376072f0f65e) ) ROM_END diff --git a/src/mame/drivers/system1.c b/src/mame/drivers/system1.c index dabd8549122..76f62040c65 100644 --- a/src/mame/drivers/system1.c +++ b/src/mame/drivers/system1.c @@ -4245,7 +4245,7 @@ ROM_END ROM_START( ufosensib ) ROM_REGION( 0x40000, "maincpu", 0 ) ROM_LOAD( "k108.ic18.3-4s", 0x20000, 0x8000, CRC(6b1d0955) SHA1(dbda145d40eaecd30c1d55a9675c58a2967c20c4) ) - ROM_CONTINUE( 0x00000, 0x8000 ) /* Now load the operands in RAM */ + ROM_CONTINUE( 0x00000, 0x8000 ) /* Now load the operands in RAM */ ROM_LOAD( "k109.ic19.4s", 0x30000, 0x8000, CRC(fc543b26) SHA1(b9e1d2ca6f9811bf341edf104fe209dbf56e4b2d) ) ROM_CONTINUE( 0x10000, 0x8000 ) ROM_LOAD( "k110.ic20.4-5s", 0x38000, 0x8000, CRC(6ba2dc77) SHA1(09a65f55988ae28e285d402af9a2a1f1dc05a82c) ) diff --git a/src/mame/drivers/system16.c b/src/mame/drivers/system16.c index 0b2c2a5ab7b..080d2639637 100644 --- a/src/mame/drivers/system16.c +++ b/src/mame/drivers/system16.c @@ -2242,36 +2242,36 @@ ROM_START( goldnaxeb1 ) ROM_LOAD( "27.11", 0x50000, 0x10000, CRC(afb1a7e4) SHA1(726fded9db72a881128b43f449d2baf450131f63) ) ROM_REGION16_BE( 0x1c0000, "gfx2", 0 ) /* sprites */ - ROM_LOAD16_BYTE( "33.17", 0x000001, 0x10000, CRC(28ba70c8) SHA1(a6f33e1404928b6d1006943494646d6cfbd60a4b) ) - ROM_LOAD16_BYTE( "34.18", 0x020001, 0x10000, CRC(2ed96a26) SHA1(edcf915243e6f92d31cdfc53965438f6b6bff51d) ) - ROM_LOAD16_BYTE( "37.bin", 0x100001, 0x10000, CRC(84dccc5b) SHA1(10263d98d663f1170c3203066f391075a1d64ff5) ) + ROM_LOAD16_BYTE( "33.17", 0x000001, 0x10000, CRC(28ba70c8) SHA1(a6f33e1404928b6d1006943494646d6cfbd60a4b) ) + ROM_LOAD16_BYTE( "34.18", 0x020001, 0x10000, CRC(2ed96a26) SHA1(edcf915243e6f92d31cdfc53965438f6b6bff51d) ) + ROM_LOAD16_BYTE( "37.bin", 0x100001, 0x10000, CRC(84dccc5b) SHA1(10263d98d663f1170c3203066f391075a1d64ff5) ) ROM_LOAD16_BYTE( "13.bin", 0x120001, 0x10000, CRC(3d41b995) SHA1(913d2a0c9a2ac6d36589966d7eb5537120ea6ff0) ) //ROM_LOAD16_BYTE( "ga18.a9", 0x120001, 0x10000, CRC(de346006) SHA1(65aa489373b6d2cccbb024f13fc190a7cae86274) ) // the old set had this rom, with most of the data blanked out.. why? logo removed? bad? - ROM_LOAD16_BYTE( "21.7", 0x000000, 0x10000, CRC(ede51fe0) SHA1(c05a2b51095a322bac5a67ee8886aecc186cbdfe) ) - ROM_LOAD16_BYTE( "22.8", 0x020000, 0x10000, CRC(30989141) SHA1(f6e7ae258deedec11b1f80c19575c884aac26c56) ) - ROM_LOAD16_BYTE( "38.bin", 0x100000, 0x10000, CRC(38e4c92a) SHA1(8b8a596da0726bc02c412a68e5163770fe3e62e4) ) + ROM_LOAD16_BYTE( "21.7", 0x000000, 0x10000, CRC(ede51fe0) SHA1(c05a2b51095a322bac5a67ee8886aecc186cbdfe) ) + ROM_LOAD16_BYTE( "22.8", 0x020000, 0x10000, CRC(30989141) SHA1(f6e7ae258deedec11b1f80c19575c884aac26c56) ) + ROM_LOAD16_BYTE( "38.bin", 0x100000, 0x10000, CRC(38e4c92a) SHA1(8b8a596da0726bc02c412a68e5163770fe3e62e4) ) ROM_LOAD16_BYTE( "14.bin", 0x120000, 0x10000, CRC(9fb1f9b6) SHA1(a193ff48f2bfbb4afbc322ae33cdf360afcb681e) ) - ROM_LOAD16_BYTE( "35.19", 0x040001, 0x10000, CRC(101d2fff) SHA1(1de1390c5f55f192491053c8aac31be3389aab2b) ) - ROM_LOAD16_BYTE( "36.20", 0x060001, 0x10000, CRC(677e64a6) SHA1(e3d0d31097017c6cb1a7f41292783f18ce13b41c) ) - ROM_LOAD16_BYTE( "15.bin", 0x140001, 0x10000, CRC(11794d05) SHA1(eef52d7a644dbcc5f983222f163445a725286a32) ) - ROM_LOAD16_BYTE( "17.bin", 0x160001, 0x10000, CRC(ad1c1c90) SHA1(155f17593cfab1a117bb755b1edd0c473d455f91) ) + ROM_LOAD16_BYTE( "35.19", 0x040001, 0x10000, CRC(101d2fff) SHA1(1de1390c5f55f192491053c8aac31be3389aab2b) ) + ROM_LOAD16_BYTE( "36.20", 0x060001, 0x10000, CRC(677e64a6) SHA1(e3d0d31097017c6cb1a7f41292783f18ce13b41c) ) + ROM_LOAD16_BYTE( "15.bin", 0x140001, 0x10000, CRC(11794d05) SHA1(eef52d7a644dbcc5f983222f163445a725286a32) ) + ROM_LOAD16_BYTE( "17.bin", 0x160001, 0x10000, CRC(ad1c1c90) SHA1(155f17593cfab1a117bb755b1edd0c473d455f91) ) - ROM_LOAD16_BYTE( "23.9", 0x040000, 0x10000, CRC(5853000d) SHA1(db7adf1de74c66f667ea7ccc41702576de081ff5) ) - ROM_LOAD16_BYTE( "24.10", 0x060000, 0x10000, CRC(697b3276) SHA1(a8aeb2cfaca9368d5bfa14a67de36dbadd4a0585) ) - ROM_LOAD16_BYTE( "16.bin", 0x140000, 0x10000, CRC(753b01e8) SHA1(0180cf893d63e60e14e2fb0f5836b302f08f0228) ) - ROM_LOAD16_BYTE( "18.bin", 0x160000, 0x10000, CRC(5dd6d8db) SHA1(270886aebf4549c5cf456b1e90927b759a53e2e1) ) + ROM_LOAD16_BYTE( "23.9", 0x040000, 0x10000, CRC(5853000d) SHA1(db7adf1de74c66f667ea7ccc41702576de081ff5) ) + ROM_LOAD16_BYTE( "24.10", 0x060000, 0x10000, CRC(697b3276) SHA1(a8aeb2cfaca9368d5bfa14a67de36dbadd4a0585) ) + ROM_LOAD16_BYTE( "16.bin", 0x140000, 0x10000, CRC(753b01e8) SHA1(0180cf893d63e60e14e2fb0f5836b302f08f0228) ) + ROM_LOAD16_BYTE( "18.bin", 0x160000, 0x10000, CRC(5dd6d8db) SHA1(270886aebf4549c5cf456b1e90927b759a53e2e1) ) - ROM_LOAD16_BYTE( "40.23", 0x080001, 0x10000, CRC(a9519afe) SHA1(0550f596ef080db25241d88242d57edb3c7fb685) ) - ROM_LOAD16_BYTE( "39.22", 0x0a0001, 0x10000, CRC(74df9232) SHA1(61286c83eb6f31983c0ed24ca2151c58a95238f1) ) - ROM_LOAD16_BYTE( "19.bin", 0x180001, 0x10000, CRC(a8c8c784) SHA1(8e998019b4dbf509179d41eb2b446647db3d00a6) ) - ROM_LOAD16_BYTE( "25.bin", 0x1a0001, 0x10000, CRC(cc3a922c) SHA1(3c96459d95961d463909b6b0e8c77916c3a018e3) ) + ROM_LOAD16_BYTE( "40.23", 0x080001, 0x10000, CRC(a9519afe) SHA1(0550f596ef080db25241d88242d57edb3c7fb685) ) + ROM_LOAD16_BYTE( "39.22", 0x0a0001, 0x10000, CRC(74df9232) SHA1(61286c83eb6f31983c0ed24ca2151c58a95238f1) ) + ROM_LOAD16_BYTE( "19.bin", 0x180001, 0x10000, CRC(a8c8c784) SHA1(8e998019b4dbf509179d41eb2b446647db3d00a6) ) + ROM_LOAD16_BYTE( "25.bin", 0x1a0001, 0x10000, CRC(cc3a922c) SHA1(3c96459d95961d463909b6b0e8c77916c3a018e3) ) - ROM_LOAD16_BYTE( "42.26", 0x080000, 0x10000, CRC(ac6ad195) SHA1(3c3fe38047698e28cae9193438fe0b85941476c5) ) - ROM_LOAD16_BYTE( "41.25", 0x0a0000, 0x10000, CRC(03a905c4) SHA1(c526a744021a392c860ded37afd54a78e9f47778) ) - ROM_LOAD16_BYTE( "20.bin", 0x180000, 0x10000, CRC(cba013c7) SHA1(a0658aaf7893bc9fb8f0435cab9f77ceb1fb4e1d) ) - ROM_LOAD16_BYTE( "26.bin", 0x1a0000, 0x10000, CRC(bea4d237) SHA1(46e51e89b4ee1e2701da1004758d7da547a2e4c2) ) + ROM_LOAD16_BYTE( "42.26", 0x080000, 0x10000, CRC(ac6ad195) SHA1(3c3fe38047698e28cae9193438fe0b85941476c5) ) + ROM_LOAD16_BYTE( "41.25", 0x0a0000, 0x10000, CRC(03a905c4) SHA1(c526a744021a392c860ded37afd54a78e9f47778) ) + ROM_LOAD16_BYTE( "20.bin", 0x180000, 0x10000, CRC(cba013c7) SHA1(a0658aaf7893bc9fb8f0435cab9f77ceb1fb4e1d) ) + ROM_LOAD16_BYTE( "26.bin", 0x1a0000, 0x10000, CRC(bea4d237) SHA1(46e51e89b4ee1e2701da1004758d7da547a2e4c2) ) ROM_REGION( 0x30000, "soundcpu", 0 ) /* sound CPU */ @@ -2333,24 +2333,24 @@ ROM_START( goldnaxeb2 ) ROM_LOAD16_BYTE( "ic73.34", 0x000001, 0x10000, CRC(28ba70c8) SHA1(a6f33e1404928b6d1006943494646d6cfbd60a4b) ) // mpr12378.b1 [1/4] IDENTICAL ROM_LOAD16_BYTE( "ic74.33", 0x020001, 0x10000, CRC(2ed96a26) SHA1(edcf915243e6f92d31cdfc53965438f6b6bff51d) ) // mpr12378.b1 [2/4] IDENTICAL ROM_LOAD16_BYTE( "ic79.28", 0x100001, 0x10000, CRC(84dccc5b) SHA1(10263d98d663f1170c3203066f391075a1d64ff5) ) // mpr12378.b1 [3/4] IDENTICAL - ROM_LOAD16_BYTE( "ic80.27", 0x120001, 0x10000, CRC(3d41b995) SHA1(913d2a0c9a2ac6d36589966d7eb5537120ea6ff0) ) // mpr12378.b1 [4/4] IDENTICAL + ROM_LOAD16_BYTE( "ic80.27", 0x120001, 0x10000, CRC(3d41b995) SHA1(913d2a0c9a2ac6d36589966d7eb5537120ea6ff0) ) // mpr12378.b1 [4/4] IDENTICAL ROM_LOAD16_BYTE( "ic58.22", 0x000000, 0x10000, CRC(ede51fe0) SHA1(c05a2b51095a322bac5a67ee8886aecc186cbdfe) ) // mpr12379.b4 [1/4] IDENTICAL ROM_LOAD16_BYTE( "ic59.21", 0x020000, 0x10000, CRC(30989141) SHA1(f6e7ae258deedec11b1f80c19575c884aac26c56) ) // mpr12379.b4 [2/4] IDENTICAL ROM_LOAD16_BYTE( "ic64.16", 0x100000, 0x10000, CRC(38e4c92a) SHA1(8b8a596da0726bc02c412a68e5163770fe3e62e4) ) // mpr12379.b4 [3/4] IDENTICAL - ROM_LOAD16_BYTE( "ic65.15", 0x120000, 0x10000, CRC(9fb1f9b6) SHA1(a193ff48f2bfbb4afbc322ae33cdf360afcb681e) ) // mpr12379.b4 [4/4] IDENTICAL - ROM_LOAD16_BYTE( "ic75.32", 0x040001, 0x10000, CRC(101d2fff) SHA1(1de1390c5f55f192491053c8aac31be3389aab2b) ) // mpr12380.b2 [1/4] IDENTICAL + ROM_LOAD16_BYTE( "ic65.15", 0x120000, 0x10000, CRC(9fb1f9b6) SHA1(a193ff48f2bfbb4afbc322ae33cdf360afcb681e) ) // mpr12379.b4 [4/4] IDENTICAL + ROM_LOAD16_BYTE( "ic75.32", 0x040001, 0x10000, CRC(101d2fff) SHA1(1de1390c5f55f192491053c8aac31be3389aab2b) ) // mpr12380.b2 [1/4] IDENTICAL ROM_LOAD16_BYTE( "ic76.31", 0x060001, 0x10000, CRC(677e64a6) SHA1(e3d0d31097017c6cb1a7f41292783f18ce13b41c) ) // mpr12380.b2 [2/4] IDENTICAL ROM_LOAD16_BYTE( "ic81.26", 0x140001, 0x10000, CRC(a34e84d1) SHA1(5aa8836ef1bdf97e399899c911967840e9873bfb) ) // mpr12380.b2 [3/4] 99.992371% ROM_LOAD16_BYTE( "ic82.25", 0x160001, 0x10000, CRC(ad1c1c90) SHA1(155f17593cfab1a117bb755b1edd0c473d455f91) ) // mpr12380.b2 [4/4] IDENTICAL - ROM_LOAD16_BYTE( "ic60.20", 0x040000, 0x10000, CRC(5853000d) SHA1(db7adf1de74c66f667ea7ccc41702576de081ff5) ) // mpr12381.b5 [1/4] IDENTICAL + ROM_LOAD16_BYTE( "ic60.20", 0x040000, 0x10000, CRC(5853000d) SHA1(db7adf1de74c66f667ea7ccc41702576de081ff5) ) // mpr12381.b5 [1/4] IDENTICAL ROM_LOAD16_BYTE( "ic61.19", 0x060000, 0x10000, CRC(697b3276) SHA1(a8aeb2cfaca9368d5bfa14a67de36dbadd4a0585) ) // mpr12381.b5 [2/4] IDENTICAL ROM_LOAD16_BYTE( "ic66.14", 0x140000, 0x10000, CRC(753b01e8) SHA1(0180cf893d63e60e14e2fb0f5836b302f08f0228) ) // mpr12381.b5 [3/4] IDENTICAL ROM_LOAD16_BYTE( "ic67.13", 0x160000, 0x10000, CRC(5dd6d8db) SHA1(270886aebf4549c5cf456b1e90927b759a53e2e1) ) // mpr12381.b5 [4/4] IDENTICAL - ROM_LOAD16_BYTE( "ic77.30", 0x080001, 0x10000, CRC(a9519afe) SHA1(0550f596ef080db25241d88242d57edb3c7fb685) ) // mpr12382.b3 [1/4] IDENTICAL + ROM_LOAD16_BYTE( "ic77.30", 0x080001, 0x10000, CRC(a9519afe) SHA1(0550f596ef080db25241d88242d57edb3c7fb685) ) // mpr12382.b3 [1/4] IDENTICAL ROM_LOAD16_BYTE( "ic78.29", 0x0a0001, 0x10000, CRC(74df9232) SHA1(61286c83eb6f31983c0ed24ca2151c58a95238f1) ) // mpr12382.b3 [2/4] IDENTICAL ROM_LOAD16_BYTE( "ic83.24", 0x180001, 0x10000, CRC(a8c8c784) SHA1(8e998019b4dbf509179d41eb2b446647db3d00a6) ) // mpr12382.b3 [3/4] IDENTICAL ROM_LOAD16_BYTE( "ic84.23", 0x1a0001, 0x10000, CRC(cc3a922c) SHA1(3c96459d95961d463909b6b0e8c77916c3a018e3) ) // mpr12382.b3 [4/4] IDENTICAL - ROM_LOAD16_BYTE( "ic62.18", 0x080000, 0x10000, CRC(ac6ad195) SHA1(3c3fe38047698e28cae9193438fe0b85941476c5) ) // mpr12383.b6 [1/4] IDENTICAL + ROM_LOAD16_BYTE( "ic62.18", 0x080000, 0x10000, CRC(ac6ad195) SHA1(3c3fe38047698e28cae9193438fe0b85941476c5) ) // mpr12383.b6 [1/4] IDENTICAL ROM_LOAD16_BYTE( "ic63.17", 0x0a0000, 0x10000, CRC(03a905c4) SHA1(c526a744021a392c860ded37afd54a78e9f47778) ) // mpr12383.b6 [2/4] IDENTICAL ROM_LOAD16_BYTE( "ic68.12", 0x180000, 0x10000, CRC(cba013c7) SHA1(a0658aaf7893bc9fb8f0435cab9f77ceb1fb4e1d) ) // mpr12383.b6 [3/4] IDENTICAL ROM_LOAD16_BYTE( "ic69.11", 0x1a0000, 0x10000, CRC(bea4d237) SHA1(46e51e89b4ee1e2701da1004758d7da547a2e4c2) ) // mpr12383.b6 [4/4] IDENTICAL @@ -3340,7 +3340,7 @@ ROM_START( astormb2 ) ROM_LOAD16_BYTE( "16.043", 0x040001, 0x20000, CRC(41f78977) SHA1(9cf9fcf96722d148c4b2cf7aa33425b6efcd0379) ) // mpr13082.bin [2/2] IDENTICAL ROM_LOAD16_BYTE( "29.012", 0x000000, 0x20000, CRC(22acf675) SHA1(80fd0d96017bf36d964a79f7e13e73fee7ed370a) ) // mpr13089.bin [1/2] 99.941254% ROM_LOAD16_BYTE( "28.013", 0x040000, 0x20000, CRC(32b37a3a) SHA1(70f268aa99a17739fd9d832b5f1d9e37247747e6) ) // mpr13089.bin [2/2] IDENTICAL - ROM_LOAD16_BYTE( "19.040", 0x080001, 0x20000, CRC(10c359ac) SHA1(9087cb824242ce5fc8eba45b61cca8b329c576e5) ) // mpr13081.bin [1/2] IDENTICAL + ROM_LOAD16_BYTE( "19.040", 0x080001, 0x20000, CRC(10c359ac) SHA1(9087cb824242ce5fc8eba45b61cca8b329c576e5) ) // mpr13081.bin [1/2] IDENTICAL ROM_LOAD16_BYTE( "18.041", 0x0c0001, 0x20000, CRC(47146c1d) SHA1(cd5d92136f86128a9f304c4f8850f1efd652dd5c) ) // mpr13081.bin [2/2] IDENTICAL ROM_LOAD16_BYTE( "31.010", 0x080000, 0x20000, CRC(e88fc39c) SHA1(f19c55c49771625a76e65b639a3b23969db8031d) ) // mpr13088.bin [1/2] IDENTICAL ROM_LOAD16_BYTE( "30.011", 0x0c0000, 0x20000, CRC(6fe7e2a2) SHA1(94e5852377f72fd00daae302db4a5f93301213e4) ) // mpr13088.bin [2/2] IDENTICAL diff --git a/src/mame/drivers/taito_b.c b/src/mame/drivers/taito_b.c index e7e63e2ba78..74c7ab90c43 100644 --- a/src/mame/drivers/taito_b.c +++ b/src/mame/drivers/taito_b.c @@ -343,12 +343,12 @@ static WRITE16_HANDLER( gain_control_w ) if (offset == 0) { mb87078_data_w(mb87078, data >> 8, 0); - //logerror("MB87078 dsel=0 data=%4x\n", data); + //logerror("MB87078 dsel=0 data=%4x\n", data); } else { mb87078_data_w(mb87078, data >> 8, 1); - //logerror("MB87078 dsel=1 data=%4x\n", data); + //logerror("MB87078 dsel=1 data=%4x\n", data); } } } @@ -367,7 +367,7 @@ static const eeprom_interface taitob_eeprom_intf = "0101", /* write command */ "0111", /* erase command */ "0100000000", /* lock command */ - "0100110000" /* unlock command*/ + "0100110000" /* unlock command*/ }; static UINT16 eep_latch = 0; @@ -1999,7 +1999,7 @@ static INPUT_PORTS_START( sbm ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) PORT_NAME("Pad Photosensor 1")//PHOTO 1 (punching pad photosensor 1) PORT_BIT( 0x20, IP_ACTIVE_HIGH,IPT_BUTTON2 ) PORT_PLAYER(1) PORT_NAME("Pad Photosensor 2")//PHOTO 2 (punching pad photosensor 2) PORT_BIT( 0x40, IP_ACTIVE_HIGH,IPT_BUTTON3 ) PORT_PLAYER(1) PORT_NAME("Pad Photosensor 3")//PHOTO 3 (punching pad photosensor 3) - /*To simulate a punch: + /*To simulate a punch: - wait for "READY GO!" message, - press button1 + button 2 (LCTRL + ALT) (you'll hear a "punching" sound), - THEN press button 3 (SPACE) diff --git a/src/mame/drivers/taito_f3.c b/src/mame/drivers/taito_f3.c index bd3eebcb073..a252074a7f7 100644 --- a/src/mame/drivers/taito_f3.c +++ b/src/mame/drivers/taito_f3.c @@ -276,10 +276,10 @@ static INPUT_PORTS_START( kn ) PORT_BIT( 0x00000080, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_MODIFY("IN2") - PORT_BIT( 0x00000100, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(2) - PORT_BIT( 0x00000200, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_PLAYER(2) - PORT_BIT( 0x00000400, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_PLAYER(2) - PORT_BIT( 0x0000f800, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x00000100, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(2) + PORT_BIT( 0x00000200, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_PLAYER(2) + PORT_BIT( 0x00000400, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_PLAYER(2) + PORT_BIT( 0x0000f800, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_MODIFY("IN3") PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(1) @@ -341,7 +341,7 @@ static const gfx_layout tile_layout = 8+4, 8+0, 24+4, 24+0, 32+4, 32+0, 48+4, 48+0, 40+4, 40+0, 56+4, 56+0, - }, + }, { 0*64, 1*64, 2*64, 3*64, 4*64, 5*64, 6*64, 7*64, 8*64, 9*64, 10*64, 11*64, 12*64, 13*64, 14*64, 15*64 }, 128*8 /* every sprite takes 128 consecutive bytes */ @@ -401,7 +401,7 @@ static MACHINE_DRIVER_START( f3 ) MDRV_EEPROM_93C46_ADD("eeprom") - /* video hardware */ + /* video hardware */ MDRV_SCREEN_ADD("screen", RASTER) MDRV_SCREEN_REFRESH_RATE(58.97) MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(624) /* 58.97 Hz, 624us vblank time */) @@ -501,7 +501,7 @@ static MACHINE_DRIVER_START( bubsympb ) MDRV_EEPROM_93C46_ADD("eeprom") - /* video hardware */ + /* video hardware */ MDRV_SCREEN_ADD("screen", RASTER) MDRV_SCREEN_REFRESH_RATE(58.97) MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(624) /* 58.97 Hz, 624us vblank time */) @@ -528,7 +528,7 @@ MACHINE_DRIVER_END ROM_START( ringrage ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d21-23.40", 0x000000, 0x40000, CRC(14e9ed65) SHA1(956db484375a43bcdf5a6a104e3c7d7ef5baaa1b) ) + ROM_LOAD32_BYTE("d21-23.40", 0x000000, 0x40000, CRC(14e9ed65) SHA1(956db484375a43bcdf5a6a104e3c7d7ef5baaa1b) ) ROM_LOAD32_BYTE("d21-22.38", 0x000001, 0x40000, CRC(6f8b65b0) SHA1(a4f786b72068c6c9c1b23df67029eb0e2a982789) ) ROM_LOAD32_BYTE("d21-21.36", 0x000002, 0x40000, CRC(bf7234bc) SHA1(781b8f850275537e1ae2dae18a4554a1283cb432) ) ROM_LOAD32_BYTE("d21-25.34", 0x000003, 0x40000, CRC(aeff6e19) SHA1(7fd8f64f0a52dfe369a3709af8c043286b5b6fdf) ) @@ -541,7 +541,7 @@ ROM_START( ringrage ) ROM_REGION(0x200000, "gfx2" , 0 ) /* Tiles */ ROM_LOAD16_BYTE("d21-06.49", 0x000000, 0x080000, CRC(92d4a720) SHA1(81dc58c58d5f4f20ceeb5d6b90491f1efcbc67d3) ) - ROM_LOAD16_BYTE("d21-07.50", 0x000001, 0x080000, CRC(6da696e9) SHA1(74332090b0de4193a669cd5242fd655e7b90f772) ) + ROM_LOAD16_BYTE("d21-07.50", 0x000001, 0x080000, CRC(6da696e9) SHA1(74332090b0de4193a669cd5242fd655e7b90f772) ) ROM_LOAD ("d21-08.51", 0x180000, 0x080000, CRC(a0d95be9) SHA1(1746097e827ac10906f012c5c4f93c388a30f4b3) ) ROM_FILL ( 0x100000, 0x080000, 0 ) @@ -557,7 +557,7 @@ ROM_END ROM_START( ringrageu ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d21-23.40", 0x000000, 0x40000, CRC(14e9ed65) SHA1(956db484375a43bcdf5a6a104e3c7d7ef5baaa1b) ) + ROM_LOAD32_BYTE("d21-23.40", 0x000000, 0x40000, CRC(14e9ed65) SHA1(956db484375a43bcdf5a6a104e3c7d7ef5baaa1b) ) ROM_LOAD32_BYTE("d21-22.38", 0x000001, 0x40000, CRC(6f8b65b0) SHA1(a4f786b72068c6c9c1b23df67029eb0e2a982789) ) ROM_LOAD32_BYTE("d21-21.36", 0x000002, 0x40000, CRC(bf7234bc) SHA1(781b8f850275537e1ae2dae18a4554a1283cb432) ) ROM_LOAD32_BYTE("d21-24.34", 0x000003, 0x40000, CRC(404dee67) SHA1(1e46d52d72b6cbe5e8af9f0f8e8b1acf9c6feb26) ) @@ -570,7 +570,7 @@ ROM_START( ringrageu ) ROM_REGION(0x200000, "gfx2" , 0 ) /* Tiles */ ROM_LOAD16_BYTE("d21-06.49", 0x000000, 0x080000, CRC(92d4a720) SHA1(81dc58c58d5f4f20ceeb5d6b90491f1efcbc67d3) ) - ROM_LOAD16_BYTE("d21-07.50", 0x000001, 0x080000, CRC(6da696e9) SHA1(74332090b0de4193a669cd5242fd655e7b90f772) ) + ROM_LOAD16_BYTE("d21-07.50", 0x000001, 0x080000, CRC(6da696e9) SHA1(74332090b0de4193a669cd5242fd655e7b90f772) ) ROM_LOAD ("d21-08.51", 0x180000, 0x080000, CRC(a0d95be9) SHA1(1746097e827ac10906f012c5c4f93c388a30f4b3) ) ROM_FILL ( 0x100000, 0x080000, 0 ) @@ -586,7 +586,7 @@ ROM_END ROM_START( ringragej ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d21-23.40", 0x000000, 0x40000, CRC(14e9ed65) SHA1(956db484375a43bcdf5a6a104e3c7d7ef5baaa1b) ) + ROM_LOAD32_BYTE("d21-23.40", 0x000000, 0x40000, CRC(14e9ed65) SHA1(956db484375a43bcdf5a6a104e3c7d7ef5baaa1b) ) ROM_LOAD32_BYTE("d21-22.38", 0x000001, 0x40000, CRC(6f8b65b0) SHA1(a4f786b72068c6c9c1b23df67029eb0e2a982789) ) ROM_LOAD32_BYTE("d21-21.36", 0x000002, 0x40000, CRC(bf7234bc) SHA1(781b8f850275537e1ae2dae18a4554a1283cb432) ) ROM_LOAD32_BYTE("d21-20.34", 0x000003, 0x40000, CRC(a8eb68a4) SHA1(040238fad0d17cac21b144b0fcab1774d2924da9) ) @@ -599,7 +599,7 @@ ROM_START( ringragej ) ROM_REGION(0x200000, "gfx2" , 0 ) /* Tiles */ ROM_LOAD16_BYTE("d21-06.49", 0x000000, 0x080000, CRC(92d4a720) SHA1(81dc58c58d5f4f20ceeb5d6b90491f1efcbc67d3) ) - ROM_LOAD16_BYTE("d21-07.50", 0x000001, 0x080000, CRC(6da696e9) SHA1(74332090b0de4193a669cd5242fd655e7b90f772) ) + ROM_LOAD16_BYTE("d21-07.50", 0x000001, 0x080000, CRC(6da696e9) SHA1(74332090b0de4193a669cd5242fd655e7b90f772) ) ROM_LOAD ("d21-08.51", 0x180000, 0x080000, CRC(a0d95be9) SHA1(1746097e827ac10906f012c5c4f93c388a30f4b3) ) ROM_FILL ( 0x100000, 0x080000, 0 ) @@ -615,7 +615,7 @@ ROM_END ROM_START( arabianm ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d29-23.rom", 0x000000, 0x40000, CRC(89a0c706) SHA1(d0df02be2b63566ec776bb13947f975062766a01) ) + ROM_LOAD32_BYTE("d29-23.rom", 0x000000, 0x40000, CRC(89a0c706) SHA1(d0df02be2b63566ec776bb13947f975062766a01) ) ROM_LOAD32_BYTE("d29-22.rom", 0x000001, 0x40000, CRC(4afc22a4) SHA1(9579d134a1e4b0c86af9b41d136acfe6cc7f6624) ) ROM_LOAD32_BYTE("d29-21.rom", 0x000002, 0x40000, CRC(ac32eb38) SHA1(19d8d965497e41a7a2f490a197322da7fd1fa40a) ) ROM_LOAD32_BYTE("d29-25.rom", 0x000003, 0x40000, CRC(b9b652ed) SHA1(19cceef87884adeb03e5e330159541a1e503a7f2) ) @@ -628,7 +628,7 @@ ROM_START( arabianm ) ROM_REGION(0x200000, "gfx2" , 0) /* Tiles */ ROM_LOAD16_BYTE("d29-06.rom", 0x000000, 0x080000, CRC(eea07bf3) SHA1(7860a2c0c592af000b56e59bd39d67b086fe3606) ) - ROM_LOAD16_BYTE("d29-07.rom", 0x000001, 0x080000, CRC(db3c094d) SHA1(5b60f0fa1054bf93ce51d310376b1abdb3022541) ) + ROM_LOAD16_BYTE("d29-07.rom", 0x000001, 0x080000, CRC(db3c094d) SHA1(5b60f0fa1054bf93ce51d310376b1abdb3022541) ) ROM_LOAD ("d29-08.rom", 0x180000, 0x080000, CRC(d7562851) SHA1(91d86e75ba7a590ca298b932b4cf8fa9228f115e) ) ROM_FILL ( 0x100000, 0x080000, 0 ) @@ -655,7 +655,7 @@ ROM_END ROM_START( arabianmj ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d29-23.rom", 0x000000, 0x40000, CRC(89a0c706) SHA1(d0df02be2b63566ec776bb13947f975062766a01) ) + ROM_LOAD32_BYTE("d29-23.rom", 0x000000, 0x40000, CRC(89a0c706) SHA1(d0df02be2b63566ec776bb13947f975062766a01) ) ROM_LOAD32_BYTE("d29-22.rom", 0x000001, 0x40000, CRC(4afc22a4) SHA1(9579d134a1e4b0c86af9b41d136acfe6cc7f6624) ) ROM_LOAD32_BYTE("d29-21.rom", 0x000002, 0x40000, CRC(ac32eb38) SHA1(19d8d965497e41a7a2f490a197322da7fd1fa40a) ) ROM_LOAD32_BYTE("d29-20.34", 0x000003, 0x40000, CRC(57b833c1) SHA1(69beff431e400db17ca1983a7a4d6684a1ea701c) ) @@ -668,7 +668,7 @@ ROM_START( arabianmj ) ROM_REGION(0x200000, "gfx2" , 0) /* Tiles */ ROM_LOAD16_BYTE("d29-06.rom", 0x000000, 0x080000, CRC(eea07bf3) SHA1(7860a2c0c592af000b56e59bd39d67b086fe3606) ) - ROM_LOAD16_BYTE("d29-07.rom", 0x000001, 0x080000, CRC(db3c094d) SHA1(5b60f0fa1054bf93ce51d310376b1abdb3022541) ) + ROM_LOAD16_BYTE("d29-07.rom", 0x000001, 0x080000, CRC(db3c094d) SHA1(5b60f0fa1054bf93ce51d310376b1abdb3022541) ) ROM_LOAD ("d29-08.rom", 0x180000, 0x080000, CRC(d7562851) SHA1(91d86e75ba7a590ca298b932b4cf8fa9228f115e) ) ROM_FILL ( 0x100000, 0x080000, 0 ) @@ -695,7 +695,7 @@ ROM_END ROM_START( arabianmu ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d29-23.rom", 0x000000, 0x40000, CRC(89a0c706) SHA1(d0df02be2b63566ec776bb13947f975062766a01) ) + ROM_LOAD32_BYTE("d29-23.rom", 0x000000, 0x40000, CRC(89a0c706) SHA1(d0df02be2b63566ec776bb13947f975062766a01) ) ROM_LOAD32_BYTE("d29-22.rom", 0x000001, 0x40000, CRC(4afc22a4) SHA1(9579d134a1e4b0c86af9b41d136acfe6cc7f6624) ) ROM_LOAD32_BYTE("d29-21.rom", 0x000002, 0x40000, CRC(ac32eb38) SHA1(19d8d965497e41a7a2f490a197322da7fd1fa40a) ) ROM_LOAD32_BYTE("d29-24.bin", 0x000003, 0x40000, CRC(ceb1627b) SHA1(c705ed956fa80ad77c53e8e2b9d27020255578bd) ) @@ -708,7 +708,7 @@ ROM_START( arabianmu ) ROM_REGION(0x200000, "gfx2" , 0) /* Tiles */ ROM_LOAD16_BYTE("d29-06.rom", 0x000000, 0x080000, CRC(eea07bf3) SHA1(7860a2c0c592af000b56e59bd39d67b086fe3606) ) - ROM_LOAD16_BYTE("d29-07.rom", 0x000001, 0x080000, CRC(db3c094d) SHA1(5b60f0fa1054bf93ce51d310376b1abdb3022541) ) + ROM_LOAD16_BYTE("d29-07.rom", 0x000001, 0x080000, CRC(db3c094d) SHA1(5b60f0fa1054bf93ce51d310376b1abdb3022541) ) ROM_LOAD ("d29-08.rom", 0x180000, 0x080000, CRC(d7562851) SHA1(91d86e75ba7a590ca298b932b4cf8fa9228f115e) ) ROM_FILL ( 0x100000, 0x080000, 0 ) @@ -735,7 +735,7 @@ ROM_END ROM_START( ridingf ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d34-12.40", 0x000000, 0x40000, CRC(e67e69d4) SHA1(9960629a7576f6a1d8a0e17c1bfc202ceee9e824) ) + ROM_LOAD32_BYTE("d34-12.40", 0x000000, 0x40000, CRC(e67e69d4) SHA1(9960629a7576f6a1d8a0e17c1bfc202ceee9e824) ) ROM_LOAD32_BYTE("d34-11.38", 0x000001, 0x40000, CRC(7d240a88) SHA1(3410d3f66e868f2696dbd95adbbd393596d34351) ) ROM_LOAD32_BYTE("d34-10.36", 0x000002, 0x40000, CRC(8aa3f4ac) SHA1(ba3c1274dcaccf4ba97ff224cb453eb1ead510ed) ) ROM_LOAD32_BYTE("d34_14.34", 0x000003, 0x40000, CRC(e000198e) SHA1(3c9fdd40ade7b02021d23b7ce63a28d80bb6e8e0) ) @@ -747,7 +747,7 @@ ROM_START( ridingf ) ROM_REGION(0x200000, "gfx2" , 0) /* Tiles */ ROM_LOAD16_BYTE("d34-05.49", 0x000000, 0x080000, CRC(72e3ee4b) SHA1(2b69487338c18ced7a2ac4f280e8e22aa7209eb3) ) - ROM_LOAD16_BYTE("d34-06.50", 0x000001, 0x080000, CRC(edc9b9f3) SHA1(c57bec1c8882d95388c3fae7cb5a321bdb202737) ) + ROM_LOAD16_BYTE("d34-06.50", 0x000001, 0x080000, CRC(edc9b9f3) SHA1(c57bec1c8882d95388c3fae7cb5a321bdb202737) ) ROM_FILL ( 0x100000, 0x100000, 0 ) ROM_REGION(0x140000, "audiocpu", 0) /* sound CPU */ @@ -762,7 +762,7 @@ ROM_END ROM_START( ridingfj ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d34-12.40", 0x000000, 0x40000, CRC(e67e69d4) SHA1(9960629a7576f6a1d8a0e17c1bfc202ceee9e824) ) + ROM_LOAD32_BYTE("d34-12.40", 0x000000, 0x40000, CRC(e67e69d4) SHA1(9960629a7576f6a1d8a0e17c1bfc202ceee9e824) ) ROM_LOAD32_BYTE("d34-11.38", 0x000001, 0x40000, CRC(7d240a88) SHA1(3410d3f66e868f2696dbd95adbbd393596d34351) ) ROM_LOAD32_BYTE("d34-10.36", 0x000002, 0x40000, CRC(8aa3f4ac) SHA1(ba3c1274dcaccf4ba97ff224cb453eb1ead510ed) ) ROM_LOAD32_BYTE("d34-09.34", 0x000003, 0x40000, CRC(0e0e78a2) SHA1(4c8d0a5d6b8c77be34fd7b9c4a2df4022e74443a) ) @@ -774,7 +774,7 @@ ROM_START( ridingfj ) ROM_REGION(0x200000, "gfx2" , 0) /* Tiles */ ROM_LOAD16_BYTE("d34-05.49", 0x000000, 0x080000, CRC(72e3ee4b) SHA1(2b69487338c18ced7a2ac4f280e8e22aa7209eb3) ) - ROM_LOAD16_BYTE("d34-06.50", 0x000001, 0x080000, CRC(edc9b9f3) SHA1(c57bec1c8882d95388c3fae7cb5a321bdb202737) ) + ROM_LOAD16_BYTE("d34-06.50", 0x000001, 0x080000, CRC(edc9b9f3) SHA1(c57bec1c8882d95388c3fae7cb5a321bdb202737) ) ROM_FILL ( 0x100000, 0x100000, 0 ) ROM_REGION(0x140000, "audiocpu", 0) /* sound CPU */ @@ -789,7 +789,7 @@ ROM_END ROM_START( ridingfu ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d34-12.40", 0x000000, 0x40000, CRC(e67e69d4) SHA1(9960629a7576f6a1d8a0e17c1bfc202ceee9e824) ) + ROM_LOAD32_BYTE("d34-12.40", 0x000000, 0x40000, CRC(e67e69d4) SHA1(9960629a7576f6a1d8a0e17c1bfc202ceee9e824) ) ROM_LOAD32_BYTE("d34-11.38", 0x000001, 0x40000, CRC(7d240a88) SHA1(3410d3f66e868f2696dbd95adbbd393596d34351) ) ROM_LOAD32_BYTE("d34-10.36", 0x000002, 0x40000, CRC(8aa3f4ac) SHA1(ba3c1274dcaccf4ba97ff224cb453eb1ead510ed) ) ROM_LOAD32_BYTE("d34_13.34", 0x000003, 0x40000, CRC(97072918) SHA1(7ae96fb7a07b7192c39ec496e1193c1cbfbbc770) ) @@ -801,7 +801,7 @@ ROM_START( ridingfu ) ROM_REGION(0x200000, "gfx2" , 0) /* Tiles */ ROM_LOAD16_BYTE("d34-05.49", 0x000000, 0x080000, CRC(72e3ee4b) SHA1(2b69487338c18ced7a2ac4f280e8e22aa7209eb3) ) - ROM_LOAD16_BYTE("d34-06.50", 0x000001, 0x080000, CRC(edc9b9f3) SHA1(c57bec1c8882d95388c3fae7cb5a321bdb202737) ) + ROM_LOAD16_BYTE("d34-06.50", 0x000001, 0x080000, CRC(edc9b9f3) SHA1(c57bec1c8882d95388c3fae7cb5a321bdb202737) ) ROM_FILL ( 0x100000, 0x100000, 0 ) ROM_REGION(0x140000, "audiocpu", 0) /* sound CPU */ @@ -816,7 +816,7 @@ ROM_END ROM_START( gseeker ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d40_12.rom", 0x000000, 0x40000, CRC(884055fb) SHA1(a91c3dcd635a3e22fbec94c9fc46d3c29fde5e71) ) + ROM_LOAD32_BYTE("d40_12.rom", 0x000000, 0x40000, CRC(884055fb) SHA1(a91c3dcd635a3e22fbec94c9fc46d3c29fde5e71) ) ROM_LOAD32_BYTE("d40_11.rom", 0x000001, 0x40000, CRC(85e701d2) SHA1(da0bc34a2c64d2db2fe143ad5a77bf667de5b015) ) ROM_LOAD32_BYTE("d40_10.rom", 0x000002, 0x40000, CRC(1e659ac5) SHA1(cd435d361c4353b361ef975f208d81369d5d079f) ) ROM_LOAD32_BYTE("d40_14.rom", 0x000003, 0x40000, CRC(d9a76bd9) SHA1(8edaf114c1342b33fd518320a181743d1dd324c1) ) @@ -847,7 +847,7 @@ ROM_END ROM_START( gseekerj ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d40_12.rom", 0x000000, 0x40000, CRC(884055fb) SHA1(a91c3dcd635a3e22fbec94c9fc46d3c29fde5e71) ) + ROM_LOAD32_BYTE("d40_12.rom", 0x000000, 0x40000, CRC(884055fb) SHA1(a91c3dcd635a3e22fbec94c9fc46d3c29fde5e71) ) ROM_LOAD32_BYTE("d40_11.rom", 0x000001, 0x40000, CRC(85e701d2) SHA1(da0bc34a2c64d2db2fe143ad5a77bf667de5b015) ) ROM_LOAD32_BYTE("d40_10.rom", 0x000002, 0x40000, CRC(1e659ac5) SHA1(cd435d361c4353b361ef975f208d81369d5d079f) ) ROM_LOAD32_BYTE("d40-09.34", 0x000003, 0x40000, CRC(37a90af5) SHA1(1f3401148375c9ca638ca6db6098ea4acf7d63a6) ) @@ -878,7 +878,7 @@ ROM_END ROM_START( gseekeru ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d40_12.rom", 0x000000, 0x40000, CRC(884055fb) SHA1(a91c3dcd635a3e22fbec94c9fc46d3c29fde5e71) ) + ROM_LOAD32_BYTE("d40_12.rom", 0x000000, 0x40000, CRC(884055fb) SHA1(a91c3dcd635a3e22fbec94c9fc46d3c29fde5e71) ) ROM_LOAD32_BYTE("d40_11.rom", 0x000001, 0x40000, CRC(85e701d2) SHA1(da0bc34a2c64d2db2fe143ad5a77bf667de5b015) ) ROM_LOAD32_BYTE("d40_10.rom", 0x000002, 0x40000, CRC(1e659ac5) SHA1(cd435d361c4353b361ef975f208d81369d5d079f) ) ROM_LOAD32_BYTE("d40-13.bin", 0x000003, 0x40000, CRC(aea05b4f) SHA1(4be054ebec49d694a7a3ee9bc66c22c46126ea4f) ) @@ -909,16 +909,16 @@ ROM_END ROM_START( commandw ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("cw_mpr3.bin", 0x000000, 0x40000, CRC(636944fc) SHA1(47deffed68ac179f27bfdb21ed62d6555a4b8988) ) + ROM_LOAD32_BYTE("cw_mpr3.bin", 0x000000, 0x40000, CRC(636944fc) SHA1(47deffed68ac179f27bfdb21ed62d6555a4b8988) ) ROM_LOAD32_BYTE("cw_mpr2.bin", 0x000001, 0x40000, CRC(1151a42b) SHA1(e938913ecd3211a8fb4041ec5a5694cd9df9be69) ) ROM_LOAD32_BYTE("cw_mpr1.bin", 0x000002, 0x40000, CRC(93669389) SHA1(11336a15900c4f419f3af5c423fbc502f4db616b) ) ROM_LOAD32_BYTE("cw_mpr0.bin", 0x000003, 0x40000, CRC(0468df52) SHA1(0da923aa779b541e700c5249272e9c59ab59e863) ) ROM_REGION(0x1000000, "gfx1" , 0) /* Sprites */ ROM_LOAD16_BYTE("cw_objl0.bin", 0x000000, 0x200000, CRC(9822102e) SHA1(c4e80ab4d54c39676ee6e557a03828250077765b) ) - ROM_LOAD16_BYTE("cw_objm0.bin", 0x000001, 0x200000, CRC(f7687684) SHA1(0bed6362dee96083e2e8b6448c9f7bfa5166bfb7) ) + ROM_LOAD16_BYTE("cw_objm0.bin", 0x000001, 0x200000, CRC(f7687684) SHA1(0bed6362dee96083e2e8b6448c9f7bfa5166bfb7) ) ROM_LOAD16_BYTE("cw_objl1.bin", 0x400000, 0x200000, CRC(ca3ad7f6) SHA1(849fbb89f0b132c83db5b7d699078da3cc10baf6) ) - ROM_LOAD16_BYTE("cw_objm1.bin", 0x400001, 0x200000, CRC(504b1bf5) SHA1(7b8ff7834907a9cdab5416bf713487bf71b9070e) ) + ROM_LOAD16_BYTE("cw_objm1.bin", 0x400001, 0x200000, CRC(504b1bf5) SHA1(7b8ff7834907a9cdab5416bf713487bf71b9070e) ) ROM_LOAD ("cw_objh0.bin", 0xc00000, 0x200000, CRC(83d7e0ae) SHA1(774a07d0cadc2c8f5ec155270bf927e4462654e2) ) ROM_LOAD ("cw_objh1.bin", 0xe00000, 0x200000, CRC(324f5832) SHA1(ff91243c5d09c4c46904640fe278a7485db70577) ) ROM_FILL ( 0x800000, 0x400000, 0 ) @@ -940,16 +940,16 @@ ROM_END ROM_START( cupfinal ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d49-13.bin", 0x000000, 0x20000, CRC(ccee5e73) SHA1(5273e3b9bc6fc4fa0c63d9c62aa6b638e9780c24) ) + ROM_LOAD32_BYTE("d49-13.bin", 0x000000, 0x20000, CRC(ccee5e73) SHA1(5273e3b9bc6fc4fa0c63d9c62aa6b638e9780c24) ) ROM_LOAD32_BYTE("d49-14.bin", 0x000001, 0x20000, CRC(2323bf2e) SHA1(e43f9eac6887e39d5c0f39264aa914a5d5f84cca) ) ROM_LOAD32_BYTE("d49-16.bin", 0x000002, 0x20000, CRC(8e73f739) SHA1(620a4d52abc00908cd1393babdc600b929019a51) ) ROM_LOAD32_BYTE("d49-20.bin", 0x000003, 0x20000, CRC(1e9c392c) SHA1(4ed9390b84c23809215a42c930ab0451531cfef1) ) ROM_REGION(0xc00000, "gfx1" , 0) /* Sprites */ ROM_LOAD16_BYTE("d49-01", 0x000000, 0x200000, CRC(1dc89f1c) SHA1(9597b1d8c9b447080ca9401aee83bb4a64bb8332) ) - ROM_LOAD16_BYTE("d49-02", 0x000001, 0x200000, CRC(1e4c374f) SHA1(512edc6a934578d0e7371410a041150d3b13aaad) ) + ROM_LOAD16_BYTE("d49-02", 0x000001, 0x200000, CRC(1e4c374f) SHA1(512edc6a934578d0e7371410a041150d3b13aaad) ) ROM_LOAD16_BYTE("d49-06", 0x400000, 0x100000, CRC(71ef4ee1) SHA1(1d7729dbc77f7201ff574e8aef65a55bd81c25a7) ) - ROM_LOAD16_BYTE("d49-07", 0x400001, 0x100000, CRC(e5655b8f) SHA1(2c21745370bfe9dbf0e95f7ce42ed34a162bff64) ) + ROM_LOAD16_BYTE("d49-07", 0x400001, 0x100000, CRC(e5655b8f) SHA1(2c21745370bfe9dbf0e95f7ce42ed34a162bff64) ) ROM_LOAD ("d49-03", 0x900000, 0x200000, CRC(cf9a8727) SHA1(f21787fdcdd8be2009c2d481a9b2d7fc03ce782e) ) ROM_LOAD ("d49-08", 0xb00000, 0x100000, CRC(7d3c6536) SHA1(289b4bf79ebd9cbdf64ab956784d226e6d546654) ) ROM_FILL ( 0x600000, 0x300000, 0 ) @@ -972,16 +972,16 @@ ROM_END ROM_START( hthero93 ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d49-13.bin", 0x000000, 0x20000, CRC(ccee5e73) SHA1(5273e3b9bc6fc4fa0c63d9c62aa6b638e9780c24) ) + ROM_LOAD32_BYTE("d49-13.bin", 0x000000, 0x20000, CRC(ccee5e73) SHA1(5273e3b9bc6fc4fa0c63d9c62aa6b638e9780c24) ) ROM_LOAD32_BYTE("d49-14.bin", 0x000001, 0x20000, CRC(2323bf2e) SHA1(e43f9eac6887e39d5c0f39264aa914a5d5f84cca) ) ROM_LOAD32_BYTE("d49-16.bin", 0x000002, 0x20000, CRC(8e73f739) SHA1(620a4d52abc00908cd1393babdc600b929019a51) ) ROM_LOAD32_BYTE("d49-19.35", 0x000003, 0x20000, CRC(f0925800) SHA1(e8d91b216a0409080b77cc1e832b7d15c66a5eef) ) ROM_REGION(0xc00000, "gfx1" , 0) /* Sprites */ ROM_LOAD16_BYTE("d49-01", 0x000000, 0x200000, CRC(1dc89f1c) SHA1(9597b1d8c9b447080ca9401aee83bb4a64bb8332) ) - ROM_LOAD16_BYTE("d49-02", 0x000001, 0x200000, CRC(1e4c374f) SHA1(512edc6a934578d0e7371410a041150d3b13aaad) ) + ROM_LOAD16_BYTE("d49-02", 0x000001, 0x200000, CRC(1e4c374f) SHA1(512edc6a934578d0e7371410a041150d3b13aaad) ) ROM_LOAD16_BYTE("d49-06", 0x400000, 0x100000, CRC(71ef4ee1) SHA1(1d7729dbc77f7201ff574e8aef65a55bd81c25a7) ) - ROM_LOAD16_BYTE("d49-07", 0x400001, 0x100000, CRC(e5655b8f) SHA1(2c21745370bfe9dbf0e95f7ce42ed34a162bff64) ) + ROM_LOAD16_BYTE("d49-07", 0x400001, 0x100000, CRC(e5655b8f) SHA1(2c21745370bfe9dbf0e95f7ce42ed34a162bff64) ) ROM_LOAD ("d49-03", 0x900000, 0x200000, CRC(cf9a8727) SHA1(f21787fdcdd8be2009c2d481a9b2d7fc03ce782e) ) ROM_LOAD ("d49-08", 0xb00000, 0x100000, CRC(7d3c6536) SHA1(289b4bf79ebd9cbdf64ab956784d226e6d546654) ) ROM_FILL ( 0x600000, 0x300000, 0 ) @@ -1004,16 +1004,16 @@ ROM_END ROM_START( trstar ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d53-15-1.24", 0x000000, 0x40000, CRC(098bba94) SHA1(b77990213ac790d15bdc0dc1e8f7adf04fe5e952) ) + ROM_LOAD32_BYTE("d53-15-1.24", 0x000000, 0x40000, CRC(098bba94) SHA1(b77990213ac790d15bdc0dc1e8f7adf04fe5e952) ) ROM_LOAD32_BYTE("d53-16-1.26", 0x000001, 0x40000, CRC(4fa8b15c) SHA1(821c21e1b958614ba6636330583b3661f9e0cebb) ) ROM_LOAD32_BYTE("d53-18-1.37", 0x000002, 0x40000, CRC(aa71cfcc) SHA1(ba62c01255cdfe0821d1b72b7f11d6e1f88b09d7) ) ROM_LOAD32_BYTE("d53-20-1.35", 0x000003, 0x40000, CRC(4de1e287) SHA1(2b592ecbf8d81aca49844ed81c351818409f596f) ) ROM_REGION(0xc00000, "gfx1" , 0) /* Sprites */ ROM_LOAD16_BYTE("d53-03.45", 0x000000, 0x200000, CRC(91b66145) SHA1(df5bc2e544ce80a98db1fe28b4a8af8c3905c7eb) ) - ROM_LOAD16_BYTE("d53-04.46", 0x000001, 0x200000, CRC(ac3a5e80) SHA1(8a6ea8096099b465d63d56abc79ed77304fd4fa4) ) + ROM_LOAD16_BYTE("d53-04.46", 0x000001, 0x200000, CRC(ac3a5e80) SHA1(8a6ea8096099b465d63d56abc79ed77304fd4fa4) ) ROM_LOAD16_BYTE("d53-06.64", 0x400000, 0x100000, CRC(f4bac410) SHA1(569bcd81d596b24add5db4a145ae04750a1bb086) ) - ROM_LOAD16_BYTE("d53-07.65", 0x400001, 0x100000, CRC(2f4773c3) SHA1(17cef13de0836923743b336cc5a64f7452629486) ) + ROM_LOAD16_BYTE("d53-07.65", 0x400001, 0x100000, CRC(2f4773c3) SHA1(17cef13de0836923743b336cc5a64f7452629486) ) ROM_LOAD ("d53-05.47", 0x900000, 0x200000, CRC(b9b68b15) SHA1(c3783b09b22954a959188b80e537fa84d827ac47) ) ROM_LOAD ("d53-08.66", 0xb00000, 0x100000, CRC(ad13a1ee) SHA1(341112055b6bee33072c262f4ea7c4d0970888a6) ) ROM_FILL ( 0x600000, 0x300000, 0 ) @@ -1035,16 +1035,16 @@ ROM_END ROM_START( trstarj ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d53-15-1.24", 0x000000, 0x40000, CRC(098bba94) SHA1(b77990213ac790d15bdc0dc1e8f7adf04fe5e952) ) + ROM_LOAD32_BYTE("d53-15-1.24", 0x000000, 0x40000, CRC(098bba94) SHA1(b77990213ac790d15bdc0dc1e8f7adf04fe5e952) ) ROM_LOAD32_BYTE("d53-16-1.26", 0x000001, 0x40000, CRC(4fa8b15c) SHA1(821c21e1b958614ba6636330583b3661f9e0cebb) ) ROM_LOAD32_BYTE("d53-18-1.37", 0x000002, 0x40000, CRC(aa71cfcc) SHA1(ba62c01255cdfe0821d1b72b7f11d6e1f88b09d7) ) ROM_LOAD32_BYTE("d53-17-1.35", 0x000003, 0x40000, CRC(a3ef83ab) SHA1(c99170047e678a7acde1bf64f903f240e9384b94) ) ROM_REGION(0xc00000, "gfx1" , 0) /* Sprites */ ROM_LOAD16_BYTE("d53-03.45", 0x000000, 0x200000, CRC(91b66145) SHA1(df5bc2e544ce80a98db1fe28b4a8af8c3905c7eb) ) - ROM_LOAD16_BYTE("d53-04.46", 0x000001, 0x200000, CRC(ac3a5e80) SHA1(8a6ea8096099b465d63d56abc79ed77304fd4fa4) ) + ROM_LOAD16_BYTE("d53-04.46", 0x000001, 0x200000, CRC(ac3a5e80) SHA1(8a6ea8096099b465d63d56abc79ed77304fd4fa4) ) ROM_LOAD16_BYTE("d53-06.64", 0x400000, 0x100000, CRC(f4bac410) SHA1(569bcd81d596b24add5db4a145ae04750a1bb086) ) - ROM_LOAD16_BYTE("d53-07.65", 0x400001, 0x100000, CRC(2f4773c3) SHA1(17cef13de0836923743b336cc5a64f7452629486) ) + ROM_LOAD16_BYTE("d53-07.65", 0x400001, 0x100000, CRC(2f4773c3) SHA1(17cef13de0836923743b336cc5a64f7452629486) ) ROM_LOAD ("d53-05.47", 0x900000, 0x200000, CRC(b9b68b15) SHA1(c3783b09b22954a959188b80e537fa84d827ac47) ) ROM_LOAD ("d53-08.66", 0xb00000, 0x100000, CRC(ad13a1ee) SHA1(341112055b6bee33072c262f4ea7c4d0970888a6) ) ROM_FILL ( 0x600000, 0x300000, 0 ) @@ -1066,16 +1066,16 @@ ROM_END ROM_START( prmtmfgt ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d53-15-1.24", 0x000000, 0x40000, CRC(098bba94) SHA1(b77990213ac790d15bdc0dc1e8f7adf04fe5e952) ) + ROM_LOAD32_BYTE("d53-15-1.24", 0x000000, 0x40000, CRC(098bba94) SHA1(b77990213ac790d15bdc0dc1e8f7adf04fe5e952) ) ROM_LOAD32_BYTE("d53-16-1.26", 0x000001, 0x40000, CRC(4fa8b15c) SHA1(821c21e1b958614ba6636330583b3661f9e0cebb) ) ROM_LOAD32_BYTE("d53-18-1.37", 0x000002, 0x40000, CRC(aa71cfcc) SHA1(ba62c01255cdfe0821d1b72b7f11d6e1f88b09d7) ) ROM_LOAD32_BYTE("d53-19-1.35", 0x000003, 0x40000, CRC(3ae6d211) SHA1(f3e27e0169686633d8d8f2cbac05375aa94cfde9) ) ROM_REGION(0xc00000, "gfx1" , 0) /* Sprites */ ROM_LOAD16_BYTE("d53-03.45", 0x000000, 0x200000, CRC(91b66145) SHA1(df5bc2e544ce80a98db1fe28b4a8af8c3905c7eb) ) - ROM_LOAD16_BYTE("d53-04.46", 0x000001, 0x200000, CRC(ac3a5e80) SHA1(8a6ea8096099b465d63d56abc79ed77304fd4fa4) ) + ROM_LOAD16_BYTE("d53-04.46", 0x000001, 0x200000, CRC(ac3a5e80) SHA1(8a6ea8096099b465d63d56abc79ed77304fd4fa4) ) ROM_LOAD16_BYTE("d53-06.64", 0x400000, 0x100000, CRC(f4bac410) SHA1(569bcd81d596b24add5db4a145ae04750a1bb086) ) - ROM_LOAD16_BYTE("d53-07.65", 0x400001, 0x100000, CRC(2f4773c3) SHA1(17cef13de0836923743b336cc5a64f7452629486) ) + ROM_LOAD16_BYTE("d53-07.65", 0x400001, 0x100000, CRC(2f4773c3) SHA1(17cef13de0836923743b336cc5a64f7452629486) ) ROM_LOAD ("d53-05.47", 0x900000, 0x200000, CRC(b9b68b15) SHA1(c3783b09b22954a959188b80e537fa84d827ac47) ) ROM_LOAD ("d53-08.66", 0xb00000, 0x100000, CRC(ad13a1ee) SHA1(341112055b6bee33072c262f4ea7c4d0970888a6) ) ROM_FILL ( 0x600000, 0x300000, 0 ) @@ -1097,16 +1097,16 @@ ROM_END ROM_START( trstaro ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d53-15.24", 0x000000, 0x40000, CRC(f24de51b) SHA1(d45d1b60901995edf0721eae7eb8c6e829f47d8d) ) + ROM_LOAD32_BYTE("d53-15.24", 0x000000, 0x40000, CRC(f24de51b) SHA1(d45d1b60901995edf0721eae7eb8c6e829f47d8d) ) ROM_LOAD32_BYTE("d53-16.26", 0x000001, 0x40000, CRC(ffc84429) SHA1(23354c1a65853c06e5c959957a92b700b1418fd4) ) ROM_LOAD32_BYTE("d53-18.37", 0x000002, 0x40000, CRC(ea2d6e13) SHA1(96461b73de745c4b0ac99267931106e1d5dcb664) ) ROM_LOAD32_BYTE("d53-20.35",0x000003, 0x40000, CRC(77e1f267) SHA1(763ccab234c45ea00908198b0aef3ba63ddfb8f8) ) ROM_REGION(0xc00000, "gfx1" , 0) /* Sprites */ ROM_LOAD16_BYTE("d53-03.45", 0x000000, 0x200000, CRC(91b66145) SHA1(df5bc2e544ce80a98db1fe28b4a8af8c3905c7eb) ) - ROM_LOAD16_BYTE("d53-04.46", 0x000001, 0x200000, CRC(ac3a5e80) SHA1(8a6ea8096099b465d63d56abc79ed77304fd4fa4) ) + ROM_LOAD16_BYTE("d53-04.46", 0x000001, 0x200000, CRC(ac3a5e80) SHA1(8a6ea8096099b465d63d56abc79ed77304fd4fa4) ) ROM_LOAD16_BYTE("d53-06.64", 0x400000, 0x100000, CRC(f4bac410) SHA1(569bcd81d596b24add5db4a145ae04750a1bb086) ) - ROM_LOAD16_BYTE("d53-07.65", 0x400001, 0x100000, CRC(2f4773c3) SHA1(17cef13de0836923743b336cc5a64f7452629486) ) + ROM_LOAD16_BYTE("d53-07.65", 0x400001, 0x100000, CRC(2f4773c3) SHA1(17cef13de0836923743b336cc5a64f7452629486) ) ROM_LOAD ("d53-05.47", 0x900000, 0x200000, CRC(b9b68b15) SHA1(c3783b09b22954a959188b80e537fa84d827ac47) ) ROM_LOAD ("d53-08.66", 0xb00000, 0x100000, CRC(ad13a1ee) SHA1(341112055b6bee33072c262f4ea7c4d0970888a6) ) ROM_FILL ( 0x600000, 0x300000, 0 ) @@ -1128,16 +1128,16 @@ ROM_END ROM_START( trstaroj ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d53-15.24", 0x000000, 0x40000, CRC(f24de51b) SHA1(d45d1b60901995edf0721eae7eb8c6e829f47d8d) ) + ROM_LOAD32_BYTE("d53-15.24", 0x000000, 0x40000, CRC(f24de51b) SHA1(d45d1b60901995edf0721eae7eb8c6e829f47d8d) ) ROM_LOAD32_BYTE("d53-16.26", 0x000001, 0x40000, CRC(ffc84429) SHA1(23354c1a65853c06e5c959957a92b700b1418fd4) ) ROM_LOAD32_BYTE("d53-18.37", 0x000002, 0x40000, CRC(ea2d6e13) SHA1(96461b73de745c4b0ac99267931106e1d5dcb664) ) ROM_LOAD32_BYTE("d53-17.35", 0x000003, 0x40000, CRC(99ef934b) SHA1(a04a27f67b2db87549f4dc09cf9d00f3480351a6) ) ROM_REGION(0xc00000, "gfx1" , 0) /* Sprites */ ROM_LOAD16_BYTE("d53-03.45", 0x000000, 0x200000, CRC(91b66145) SHA1(df5bc2e544ce80a98db1fe28b4a8af8c3905c7eb) ) - ROM_LOAD16_BYTE("d53-04.46", 0x000001, 0x200000, CRC(ac3a5e80) SHA1(8a6ea8096099b465d63d56abc79ed77304fd4fa4) ) + ROM_LOAD16_BYTE("d53-04.46", 0x000001, 0x200000, CRC(ac3a5e80) SHA1(8a6ea8096099b465d63d56abc79ed77304fd4fa4) ) ROM_LOAD16_BYTE("d53-06.64", 0x400000, 0x100000, CRC(f4bac410) SHA1(569bcd81d596b24add5db4a145ae04750a1bb086) ) - ROM_LOAD16_BYTE("d53-07.65", 0x400001, 0x100000, CRC(2f4773c3) SHA1(17cef13de0836923743b336cc5a64f7452629486) ) + ROM_LOAD16_BYTE("d53-07.65", 0x400001, 0x100000, CRC(2f4773c3) SHA1(17cef13de0836923743b336cc5a64f7452629486) ) ROM_LOAD ("d53-05.47", 0x900000, 0x200000, CRC(b9b68b15) SHA1(c3783b09b22954a959188b80e537fa84d827ac47) ) ROM_LOAD ("d53-08.66", 0xb00000, 0x100000, CRC(ad13a1ee) SHA1(341112055b6bee33072c262f4ea7c4d0970888a6) ) ROM_FILL ( 0x600000, 0x300000, 0 ) @@ -1159,16 +1159,16 @@ ROM_END ROM_START( prmtmfgto ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d53-15.24", 0x000000, 0x40000, CRC(f24de51b) SHA1(d45d1b60901995edf0721eae7eb8c6e829f47d8d) ) + ROM_LOAD32_BYTE("d53-15.24", 0x000000, 0x40000, CRC(f24de51b) SHA1(d45d1b60901995edf0721eae7eb8c6e829f47d8d) ) ROM_LOAD32_BYTE("d53-16.26", 0x000001, 0x40000, CRC(ffc84429) SHA1(23354c1a65853c06e5c959957a92b700b1418fd4) ) ROM_LOAD32_BYTE("d53-18.37", 0x000002, 0x40000, CRC(ea2d6e13) SHA1(96461b73de745c4b0ac99267931106e1d5dcb664) ) ROM_LOAD32_BYTE("d53-19.35", 0x000003, 0x40000, CRC(00e6c2f1) SHA1(cf4b9ee35be8138abfaa354d01184efbfe83cea2) ) ROM_REGION(0xc00000, "gfx1" , 0) /* Sprites */ ROM_LOAD16_BYTE("d53-03.45", 0x000000, 0x200000, CRC(91b66145) SHA1(df5bc2e544ce80a98db1fe28b4a8af8c3905c7eb) ) - ROM_LOAD16_BYTE("d53-04.46", 0x000001, 0x200000, CRC(ac3a5e80) SHA1(8a6ea8096099b465d63d56abc79ed77304fd4fa4) ) + ROM_LOAD16_BYTE("d53-04.46", 0x000001, 0x200000, CRC(ac3a5e80) SHA1(8a6ea8096099b465d63d56abc79ed77304fd4fa4) ) ROM_LOAD16_BYTE("d53-06.64", 0x400000, 0x100000, CRC(f4bac410) SHA1(569bcd81d596b24add5db4a145ae04750a1bb086) ) - ROM_LOAD16_BYTE("d53-07.65", 0x400001, 0x100000, CRC(2f4773c3) SHA1(17cef13de0836923743b336cc5a64f7452629486) ) + ROM_LOAD16_BYTE("d53-07.65", 0x400001, 0x100000, CRC(2f4773c3) SHA1(17cef13de0836923743b336cc5a64f7452629486) ) ROM_LOAD ("d53-05.47", 0x900000, 0x200000, CRC(b9b68b15) SHA1(c3783b09b22954a959188b80e537fa84d827ac47) ) ROM_LOAD ("d53-08.66", 0xb00000, 0x100000, CRC(ad13a1ee) SHA1(341112055b6bee33072c262f4ea7c4d0970888a6) ) ROM_FILL ( 0x600000, 0x300000, 0 ) @@ -1190,7 +1190,7 @@ ROM_END ROM_START( gunlock ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d66-18.24", 0x000000, 0x40000, CRC(8418513e) SHA1(a071647268fad08802b88fb6d795612218b7ddef) ) + ROM_LOAD32_BYTE("d66-18.24", 0x000000, 0x40000, CRC(8418513e) SHA1(a071647268fad08802b88fb6d795612218b7ddef) ) ROM_LOAD32_BYTE("d66-19.26", 0x000001, 0x40000, CRC(95731473) SHA1(ab79821cd6098a4db84ebc9a499c29b1525510a5) ) ROM_LOAD32_BYTE("d66-21.37", 0x000002, 0x40000, CRC(bd0d60f2) SHA1(609ed2b04cb9efc4b370dcbdf22fd168318989be) ) ROM_LOAD32_BYTE("d66-24.35", 0x000003, 0x40000, CRC(97816378) SHA1(b22cb442b663c7a10fbc292583cd788f66f10a25) ) @@ -1203,7 +1203,7 @@ ROM_START( gunlock ) ROM_REGION(0x400000, "gfx2" , 0) /* Tiles */ ROM_LOAD16_BYTE("d66-06.rom", 0x000000, 0x100000, CRC(b3d8126d) SHA1(3cbb44f396973c36abdf3fdf391becb22bb6d661) ) - ROM_LOAD16_BYTE("d66-07.rom", 0x000001, 0x100000, CRC(a6da9be7) SHA1(b528505ab925db75acf31bfbed2035cbe36e7a74) ) + ROM_LOAD16_BYTE("d66-07.rom", 0x000001, 0x100000, CRC(a6da9be7) SHA1(b528505ab925db75acf31bfbed2035cbe36e7a74) ) ROM_LOAD ("d66-08.rom", 0x300000, 0x100000, CRC(9959f30b) SHA1(64bf2bf995c283c00d968e3c078b824de4084d3d) ) ROM_FILL ( 0x200000, 0x100000, 0 ) @@ -1218,7 +1218,7 @@ ROM_END ROM_START( rayforce ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d66-18.24", 0x000000, 0x40000, CRC(8418513e) SHA1(a071647268fad08802b88fb6d795612218b7ddef) ) + ROM_LOAD32_BYTE("d66-18.24", 0x000000, 0x40000, CRC(8418513e) SHA1(a071647268fad08802b88fb6d795612218b7ddef) ) ROM_LOAD32_BYTE("d66-19.26", 0x000001, 0x40000, CRC(95731473) SHA1(ab79821cd6098a4db84ebc9a499c29b1525510a5) ) ROM_LOAD32_BYTE("d66-21.37", 0x000002, 0x40000, CRC(bd0d60f2) SHA1(609ed2b04cb9efc4b370dcbdf22fd168318989be) ) ROM_LOAD32_BYTE("d66-25.35", 0x000003, 0x40000, CRC(e08653ee) SHA1(03ae4e457369a4b29cd7d52408e28725e41ee244) ) @@ -1231,7 +1231,7 @@ ROM_START( rayforce ) ROM_REGION(0x400000, "gfx2" , 0) /* Tiles */ ROM_LOAD16_BYTE("d66-06.rom", 0x000000, 0x100000, CRC(b3d8126d) SHA1(3cbb44f396973c36abdf3fdf391becb22bb6d661) ) - ROM_LOAD16_BYTE("d66-07.rom", 0x000001, 0x100000, CRC(a6da9be7) SHA1(b528505ab925db75acf31bfbed2035cbe36e7a74) ) + ROM_LOAD16_BYTE("d66-07.rom", 0x000001, 0x100000, CRC(a6da9be7) SHA1(b528505ab925db75acf31bfbed2035cbe36e7a74) ) ROM_LOAD ("d66-08.rom", 0x300000, 0x100000, CRC(9959f30b) SHA1(64bf2bf995c283c00d968e3c078b824de4084d3d) ) ROM_FILL ( 0x200000, 0x100000, 0 ) @@ -1246,7 +1246,7 @@ ROM_END ROM_START( rayforcej ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d66-18.24", 0x000000, 0x40000, CRC(8418513e) SHA1(a071647268fad08802b88fb6d795612218b7ddef) ) + ROM_LOAD32_BYTE("d66-18.24", 0x000000, 0x40000, CRC(8418513e) SHA1(a071647268fad08802b88fb6d795612218b7ddef) ) ROM_LOAD32_BYTE("d66-19.26", 0x000001, 0x40000, CRC(95731473) SHA1(ab79821cd6098a4db84ebc9a499c29b1525510a5) ) ROM_LOAD32_BYTE("d66-21.37", 0x000002, 0x40000, CRC(bd0d60f2) SHA1(609ed2b04cb9efc4b370dcbdf22fd168318989be) ) ROM_LOAD32_BYTE("d66-20.35", 0x000003, 0x40000, CRC(798f0254) SHA1(b070588053bddc3d0b0c2660192b0cb16bf8247f) ) @@ -1259,7 +1259,7 @@ ROM_START( rayforcej ) ROM_REGION(0x400000, "gfx2" , 0) /* Tiles */ ROM_LOAD16_BYTE("d66-06.rom", 0x000000, 0x100000, CRC(b3d8126d) SHA1(3cbb44f396973c36abdf3fdf391becb22bb6d661) ) - ROM_LOAD16_BYTE("d66-07.rom", 0x000001, 0x100000, CRC(a6da9be7) SHA1(b528505ab925db75acf31bfbed2035cbe36e7a74) ) + ROM_LOAD16_BYTE("d66-07.rom", 0x000001, 0x100000, CRC(a6da9be7) SHA1(b528505ab925db75acf31bfbed2035cbe36e7a74) ) ROM_LOAD ("d66-08.rom", 0x300000, 0x100000, CRC(9959f30b) SHA1(64bf2bf995c283c00d968e3c078b824de4084d3d) ) ROM_FILL ( 0x200000, 0x100000, 0 ) @@ -1274,16 +1274,16 @@ ROM_END ROM_START( scfinals ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d68-01.20", 0x000000, 0x40000, CRC(cb951856) SHA1(c7b0418b957ed0feecc9dffe5a963bd22df0ac4e) ) + ROM_LOAD32_BYTE("d68-01.20", 0x000000, 0x40000, CRC(cb951856) SHA1(c7b0418b957ed0feecc9dffe5a963bd22df0ac4e) ) ROM_LOAD32_BYTE("d68-02.19", 0x000001, 0x40000, CRC(4f94413a) SHA1(b46a35ab0150d5d5e53149c53f11978fbfa28159) ) ROM_LOAD32_BYTE("d68-04.18", 0x000002, 0x40000, CRC(4a4e4972) SHA1(5300380a57f70fe91c69f2b1e9d25253081e61da) ) ROM_LOAD32_BYTE("d68-03.17", 0x000003, 0x40000, CRC(a40be699) SHA1(03101d2aef8e7c0c332a3c8c0a025024f6cfe580) ) ROM_REGION(0xc00000, "gfx1" , 0) /* Sprites */ ROM_LOAD16_BYTE("d49-01", 0x000000, 0x200000, CRC(1dc89f1c) SHA1(9597b1d8c9b447080ca9401aee83bb4a64bb8332) ) - ROM_LOAD16_BYTE("d49-02", 0x000001, 0x200000, CRC(1e4c374f) SHA1(512edc6a934578d0e7371410a041150d3b13aaad) ) + ROM_LOAD16_BYTE("d49-02", 0x000001, 0x200000, CRC(1e4c374f) SHA1(512edc6a934578d0e7371410a041150d3b13aaad) ) ROM_LOAD16_BYTE("d49-06", 0x400000, 0x100000, CRC(71ef4ee1) SHA1(1d7729dbc77f7201ff574e8aef65a55bd81c25a7) ) - ROM_LOAD16_BYTE("d49-07", 0x400001, 0x100000, CRC(e5655b8f) SHA1(2c21745370bfe9dbf0e95f7ce42ed34a162bff64) ) + ROM_LOAD16_BYTE("d49-07", 0x400001, 0x100000, CRC(e5655b8f) SHA1(2c21745370bfe9dbf0e95f7ce42ed34a162bff64) ) ROM_LOAD ("d49-03", 0x900000, 0x200000, CRC(cf9a8727) SHA1(f21787fdcdd8be2009c2d481a9b2d7fc03ce782e) ) ROM_LOAD ("d49-08", 0xb00000, 0x100000, CRC(7d3c6536) SHA1(289b4bf79ebd9cbdf64ab956784d226e6d546654) ) ROM_FILL ( 0x600000, 0x300000, 0 ) @@ -1306,14 +1306,14 @@ ROM_END ROM_START( lightbr ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d69-25.ic40", 0x000000, 0x80000, CRC(27f1b8be) SHA1(e5fc47644a000c96056e2013c42272ae5beeb98e) ) + ROM_LOAD32_BYTE("d69-25.ic40", 0x000000, 0x80000, CRC(27f1b8be) SHA1(e5fc47644a000c96056e2013c42272ae5beeb98e) ) ROM_LOAD32_BYTE("d69-26.ic38", 0x000001, 0x80000, CRC(2ff7dba6) SHA1(8757d949f44bb69fbf918852046ed0cd46ab7864) ) ROM_LOAD32_BYTE("d69-28.ic36", 0x000002, 0x80000, CRC(a5546162) SHA1(35d9cd41f379e7fc4092c6c519b158208b977d89) ) ROM_LOAD32_BYTE("d69-27.ic34", 0x000003, 0x80000, CRC(e232a949) SHA1(aa6969e0aa195dbae1aecc4e812c590ab4389174) ) ROM_REGION(0xc00000, "gfx1" , 0) /* Sprites */ ROM_LOAD16_BYTE("d69-06.bin", 0x000000, 0x200000, CRC(cb4aac81) SHA1(15d315c6b9695cc2fe07defc67c7a4fb26de1950) ) - ROM_LOAD16_BYTE("d69-07.bin", 0x000001, 0x200000, CRC(b749f984) SHA1(39fd662bdc42e812519181a640a83e29e300826a) ) + ROM_LOAD16_BYTE("d69-07.bin", 0x000001, 0x200000, CRC(b749f984) SHA1(39fd662bdc42e812519181a640a83e29e300826a) ) ROM_LOAD16_BYTE("d69-09.bin", 0x400000, 0x100000, CRC(a96c19b8) SHA1(7872b4dd9d51877bed709fec393413e41d6b954f) ) ROM_LOAD16_BYTE("d69-10.bin", 0x400001, 0x100000, CRC(36aa80c6) SHA1(aeb5f7632810564426761b5798539bf4c4a0c64c) ) ROM_LOAD ("d69-08.bin", 0x900000, 0x200000, CRC(5b68d7d8) SHA1(f2ee3dd7100a3c9d8f402fe36dae2bc66cb17be3) ) @@ -1322,7 +1322,7 @@ ROM_START( lightbr ) ROM_REGION(0x800000, "gfx2" , 0) /* Tiles */ ROM_LOAD16_BYTE("d69-03.bin", 0x000000, 0x200000, CRC(6999c86f) SHA1(8a91930edfc0b5d23e59f8c3b43131db6edb4d37) ) - ROM_LOAD16_BYTE("d69-04.bin", 0x000001, 0x200000, CRC(cc91dcb7) SHA1(97f510b1e1a3adf49efe82babdd7abce3756ce4b) ) + ROM_LOAD16_BYTE("d69-04.bin", 0x000001, 0x200000, CRC(cc91dcb7) SHA1(97f510b1e1a3adf49efe82babdd7abce3756ce4b) ) ROM_LOAD ("d69-05.bin", 0x600000, 0x200000, CRC(f9f5433c) SHA1(d3de66385d883c72967c44bc29983d7a79f665d1) ) ROM_FILL ( 0x400000, 0x200000, 0 ) @@ -1337,14 +1337,14 @@ ROM_END ROM_START( dungeonm ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d69-20.bin", 0x000000, 0x80000, CRC(33650fe4) SHA1(df8b775749b1f0f02d0df6141597cc49fb3ae227) ) + ROM_LOAD32_BYTE("d69-20.bin", 0x000000, 0x80000, CRC(33650fe4) SHA1(df8b775749b1f0f02d0df6141597cc49fb3ae227) ) ROM_LOAD32_BYTE("d69-13.bin", 0x000001, 0x80000, CRC(dec2ec17) SHA1(8472a5aaea9e4e4fb5f7f4b5eda356b590d1541d) ) ROM_LOAD32_BYTE("d69-15.bin", 0x000002, 0x80000, CRC(323e1955) SHA1(d76582d1ff5a9aa87a498fea3280bc3c25ee9ec0) ) ROM_LOAD32_BYTE("d69-22.bin", 0x000003, 0x80000, CRC(f99e175d) SHA1(8f5f4710d72faed978e68e6e36703f47e8bab06f) ) ROM_REGION(0xc00000, "gfx1" , 0) /* Sprites */ ROM_LOAD16_BYTE("d69-06.bin", 0x000000, 0x200000, CRC(cb4aac81) SHA1(15d315c6b9695cc2fe07defc67c7a4fb26de1950) ) - ROM_LOAD16_BYTE("d69-07.bin", 0x000001, 0x200000, CRC(b749f984) SHA1(39fd662bdc42e812519181a640a83e29e300826a) ) + ROM_LOAD16_BYTE("d69-07.bin", 0x000001, 0x200000, CRC(b749f984) SHA1(39fd662bdc42e812519181a640a83e29e300826a) ) ROM_LOAD16_BYTE("d69-09.bin", 0x400000, 0x100000, CRC(a96c19b8) SHA1(7872b4dd9d51877bed709fec393413e41d6b954f) ) ROM_LOAD16_BYTE("d69-10.bin", 0x400001, 0x100000, CRC(36aa80c6) SHA1(aeb5f7632810564426761b5798539bf4c4a0c64c) ) ROM_LOAD ("d69-08.bin", 0x900000, 0x200000, CRC(5b68d7d8) SHA1(f2ee3dd7100a3c9d8f402fe36dae2bc66cb17be3) ) @@ -1353,7 +1353,7 @@ ROM_START( dungeonm ) ROM_REGION(0x800000, "gfx2" , 0) /* Tiles */ ROM_LOAD16_BYTE("d69-03.bin", 0x000000, 0x200000, CRC(6999c86f) SHA1(8a91930edfc0b5d23e59f8c3b43131db6edb4d37) ) - ROM_LOAD16_BYTE("d69-04.bin", 0x000001, 0x200000, CRC(cc91dcb7) SHA1(97f510b1e1a3adf49efe82babdd7abce3756ce4b) ) + ROM_LOAD16_BYTE("d69-04.bin", 0x000001, 0x200000, CRC(cc91dcb7) SHA1(97f510b1e1a3adf49efe82babdd7abce3756ce4b) ) ROM_LOAD ("d69-05.bin", 0x600000, 0x200000, CRC(f9f5433c) SHA1(d3de66385d883c72967c44bc29983d7a79f665d1) ) ROM_FILL ( 0x400000, 0x200000, 0 ) @@ -1368,14 +1368,14 @@ ROM_END ROM_START( dungeonmu ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d69-20.bin", 0x000000, 0x80000, CRC(33650fe4) SHA1(df8b775749b1f0f02d0df6141597cc49fb3ae227) ) + ROM_LOAD32_BYTE("d69-20.bin", 0x000000, 0x80000, CRC(33650fe4) SHA1(df8b775749b1f0f02d0df6141597cc49fb3ae227) ) ROM_LOAD32_BYTE("d69-13.bin", 0x000001, 0x80000, CRC(dec2ec17) SHA1(8472a5aaea9e4e4fb5f7f4b5eda356b590d1541d) ) ROM_LOAD32_BYTE("d69-15.bin", 0x000002, 0x80000, CRC(323e1955) SHA1(d76582d1ff5a9aa87a498fea3280bc3c25ee9ec0) ) ROM_LOAD32_BYTE("d69-21.bin", 0x000003, 0x80000, CRC(c9d4e051) SHA1(7c7e76f0d0bca305ff6761aa509d344c2dac8e2e) ) ROM_REGION(0xc00000, "gfx1" , 0) /* Sprites */ ROM_LOAD16_BYTE("d69-06.bin", 0x000000, 0x200000, CRC(cb4aac81) SHA1(15d315c6b9695cc2fe07defc67c7a4fb26de1950) ) - ROM_LOAD16_BYTE("d69-07.bin", 0x000001, 0x200000, CRC(b749f984) SHA1(39fd662bdc42e812519181a640a83e29e300826a) ) + ROM_LOAD16_BYTE("d69-07.bin", 0x000001, 0x200000, CRC(b749f984) SHA1(39fd662bdc42e812519181a640a83e29e300826a) ) ROM_LOAD16_BYTE("d69-09.bin", 0x400000, 0x100000, CRC(a96c19b8) SHA1(7872b4dd9d51877bed709fec393413e41d6b954f) ) ROM_LOAD16_BYTE("d69-10.bin", 0x400001, 0x100000, CRC(36aa80c6) SHA1(aeb5f7632810564426761b5798539bf4c4a0c64c) ) ROM_LOAD ("d69-08.bin", 0x900000, 0x200000, CRC(5b68d7d8) SHA1(f2ee3dd7100a3c9d8f402fe36dae2bc66cb17be3) ) @@ -1384,7 +1384,7 @@ ROM_START( dungeonmu ) ROM_REGION(0x800000, "gfx2" , 0) /* Tiles */ ROM_LOAD16_BYTE("d69-03.bin", 0x000000, 0x200000, CRC(6999c86f) SHA1(8a91930edfc0b5d23e59f8c3b43131db6edb4d37) ) - ROM_LOAD16_BYTE("d69-04.bin", 0x000001, 0x200000, CRC(cc91dcb7) SHA1(97f510b1e1a3adf49efe82babdd7abce3756ce4b) ) + ROM_LOAD16_BYTE("d69-04.bin", 0x000001, 0x200000, CRC(cc91dcb7) SHA1(97f510b1e1a3adf49efe82babdd7abce3756ce4b) ) ROM_LOAD ("d69-05.bin", 0x600000, 0x200000, CRC(f9f5433c) SHA1(d3de66385d883c72967c44bc29983d7a79f665d1) ) ROM_FILL ( 0x400000, 0x200000, 0 ) @@ -1459,14 +1459,14 @@ Notes: ROM_START( lightbrj ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d69-20.bin", 0x000000, 0x80000, CRC(33650fe4) SHA1(df8b775749b1f0f02d0df6141597cc49fb3ae227) ) + ROM_LOAD32_BYTE("d69-20.bin", 0x000000, 0x80000, CRC(33650fe4) SHA1(df8b775749b1f0f02d0df6141597cc49fb3ae227) ) ROM_LOAD32_BYTE("d69-13.bin", 0x000001, 0x80000, CRC(dec2ec17) SHA1(8472a5aaea9e4e4fb5f7f4b5eda356b590d1541d) ) ROM_LOAD32_BYTE("d69-15.bin", 0x000002, 0x80000, CRC(323e1955) SHA1(d76582d1ff5a9aa87a498fea3280bc3c25ee9ec0) ) ROM_LOAD32_BYTE("d69-14.bin", 0x000003, 0x80000, CRC(990bf945) SHA1(797794d7afc1e6e98ce1bfb3de3c241a96a8fa01) ) ROM_REGION(0xc00000, "gfx1" , 0) /* Sprites */ ROM_LOAD16_BYTE("d69-06.bin", 0x000000, 0x200000, CRC(cb4aac81) SHA1(15d315c6b9695cc2fe07defc67c7a4fb26de1950) ) - ROM_LOAD16_BYTE("d69-07.bin", 0x000001, 0x200000, CRC(b749f984) SHA1(39fd662bdc42e812519181a640a83e29e300826a) ) + ROM_LOAD16_BYTE("d69-07.bin", 0x000001, 0x200000, CRC(b749f984) SHA1(39fd662bdc42e812519181a640a83e29e300826a) ) ROM_LOAD16_BYTE("d69-09.bin", 0x400000, 0x100000, CRC(a96c19b8) SHA1(7872b4dd9d51877bed709fec393413e41d6b954f) ) ROM_LOAD16_BYTE("d69-10.bin", 0x400001, 0x100000, CRC(36aa80c6) SHA1(aeb5f7632810564426761b5798539bf4c4a0c64c) ) ROM_LOAD ("d69-08.bin", 0x900000, 0x200000, CRC(5b68d7d8) SHA1(f2ee3dd7100a3c9d8f402fe36dae2bc66cb17be3) ) @@ -1475,7 +1475,7 @@ ROM_START( lightbrj ) ROM_REGION(0x800000, "gfx2" , 0) /* Tiles */ ROM_LOAD16_BYTE("d69-03.bin", 0x000000, 0x200000, CRC(6999c86f) SHA1(8a91930edfc0b5d23e59f8c3b43131db6edb4d37) ) - ROM_LOAD16_BYTE("d69-04.bin", 0x000001, 0x200000, CRC(cc91dcb7) SHA1(97f510b1e1a3adf49efe82babdd7abce3756ce4b) ) + ROM_LOAD16_BYTE("d69-04.bin", 0x000001, 0x200000, CRC(cc91dcb7) SHA1(97f510b1e1a3adf49efe82babdd7abce3756ce4b) ) ROM_LOAD ("d69-05.bin", 0x600000, 0x200000, CRC(f9f5433c) SHA1(d3de66385d883c72967c44bc29983d7a79f665d1) ) ROM_FILL ( 0x400000, 0x200000, 0 ) @@ -1490,16 +1490,16 @@ ROM_END ROM_START( intcup94 ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d78-07.20", 0x000000, 0x20000, CRC(8525d990) SHA1(b28aeb8727d615cae9eafd7710bf833a612ef7d4) ) + ROM_LOAD32_BYTE("d78-07.20", 0x000000, 0x20000, CRC(8525d990) SHA1(b28aeb8727d615cae9eafd7710bf833a612ef7d4) ) ROM_LOAD32_BYTE("d78-06.19", 0x000001, 0x20000, CRC(42db1d41) SHA1(daf617764b04cd24e76dfa95423213c2a3692068) ) ROM_LOAD32_BYTE("d78-05.18", 0x000002, 0x20000, CRC(5f7fbbbc) SHA1(8936bcc4026b2819b8708911c9defe4436d070ad) ) ROM_LOAD32_BYTE("d78-11.17", 0x000003, 0x20000, CRC(bb9d2987) SHA1(98bea0346702eefd9f6f1839b95932b9b8bca902) ) ROM_REGION(0xc00000, "gfx1" , 0) /* Sprites */ ROM_LOAD16_BYTE("d49-01.12", 0x000000, 0x200000, CRC(1dc89f1c) SHA1(9597b1d8c9b447080ca9401aee83bb4a64bb8332) ) - ROM_LOAD16_BYTE("d49-02.8", 0x000001, 0x200000, CRC(1e4c374f) SHA1(512edc6a934578d0e7371410a041150d3b13aaad) ) + ROM_LOAD16_BYTE("d49-02.8", 0x000001, 0x200000, CRC(1e4c374f) SHA1(512edc6a934578d0e7371410a041150d3b13aaad) ) ROM_LOAD16_BYTE("d49-06.11", 0x400000, 0x100000, CRC(71ef4ee1) SHA1(1d7729dbc77f7201ff574e8aef65a55bd81c25a7) ) - ROM_LOAD16_BYTE("d49-07.7", 0x400001, 0x100000, CRC(e5655b8f) SHA1(2c21745370bfe9dbf0e95f7ce42ed34a162bff64) ) + ROM_LOAD16_BYTE("d49-07.7", 0x400001, 0x100000, CRC(e5655b8f) SHA1(2c21745370bfe9dbf0e95f7ce42ed34a162bff64) ) ROM_LOAD ("d49-03.4", 0x900000, 0x200000, CRC(cf9a8727) SHA1(f21787fdcdd8be2009c2d481a9b2d7fc03ce782e) ) ROM_LOAD ("d49-08.3", 0xb00000, 0x100000, CRC(7d3c6536) SHA1(289b4bf79ebd9cbdf64ab956784d226e6d546654) ) ROM_FILL ( 0x600000, 0x300000, 0 ) @@ -1522,16 +1522,16 @@ ROM_END ROM_START( hthero94 ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d78-07.20", 0x000000, 0x20000, CRC(8525d990) SHA1(b28aeb8727d615cae9eafd7710bf833a612ef7d4) ) + ROM_LOAD32_BYTE("d78-07.20", 0x000000, 0x20000, CRC(8525d990) SHA1(b28aeb8727d615cae9eafd7710bf833a612ef7d4) ) ROM_LOAD32_BYTE("d78-06.19", 0x000001, 0x20000, CRC(42db1d41) SHA1(daf617764b04cd24e76dfa95423213c2a3692068) ) ROM_LOAD32_BYTE("d78-05.18", 0x000002, 0x20000, CRC(5f7fbbbc) SHA1(8936bcc4026b2819b8708911c9defe4436d070ad) ) ROM_LOAD32_BYTE("d78-10.17", 0x000003, 0x20000, CRC(cc9a1911) SHA1(341b6c33b182e3a64a22f1dc43e9cf72c6aeea7b) ) ROM_REGION(0xc00000, "gfx1" , 0) /* Sprites */ ROM_LOAD16_BYTE("d49-01.12", 0x000000, 0x200000, CRC(1dc89f1c) SHA1(9597b1d8c9b447080ca9401aee83bb4a64bb8332) ) - ROM_LOAD16_BYTE("d49-02.8", 0x000001, 0x200000, CRC(1e4c374f) SHA1(512edc6a934578d0e7371410a041150d3b13aaad) ) + ROM_LOAD16_BYTE("d49-02.8", 0x000001, 0x200000, CRC(1e4c374f) SHA1(512edc6a934578d0e7371410a041150d3b13aaad) ) ROM_LOAD16_BYTE("d49-06.11", 0x400000, 0x100000, CRC(71ef4ee1) SHA1(1d7729dbc77f7201ff574e8aef65a55bd81c25a7) ) - ROM_LOAD16_BYTE("d49-07.7", 0x400001, 0x100000, CRC(e5655b8f) SHA1(2c21745370bfe9dbf0e95f7ce42ed34a162bff64) ) + ROM_LOAD16_BYTE("d49-07.7", 0x400001, 0x100000, CRC(e5655b8f) SHA1(2c21745370bfe9dbf0e95f7ce42ed34a162bff64) ) ROM_LOAD ("d49-03.4", 0x900000, 0x200000, CRC(cf9a8727) SHA1(f21787fdcdd8be2009c2d481a9b2d7fc03ce782e) ) ROM_LOAD ("d49-08.3", 0xb00000, 0x100000, CRC(7d3c6536) SHA1(289b4bf79ebd9cbdf64ab956784d226e6d546654) ) ROM_FILL ( 0x600000, 0x300000, 0 ) @@ -1554,7 +1554,7 @@ ROM_END ROM_START( recalh ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("rh_mpr3.bin", 0x000000, 0x80000, CRC(65202dd4) SHA1(8d5748d03868b127a7d727e00c1bce51a5bae129) ) + ROM_LOAD32_BYTE("rh_mpr3.bin", 0x000000, 0x80000, CRC(65202dd4) SHA1(8d5748d03868b127a7d727e00c1bce51a5bae129) ) ROM_LOAD32_BYTE("rh_mpr2.bin", 0x000001, 0x80000, CRC(3eda66db) SHA1(6d726762404d85008d6bebe5a77cebe505b650fc) ) ROM_LOAD32_BYTE("rh_mpr1.bin", 0x000002, 0x80000, CRC(536e74ca) SHA1(2a50bb2e93563273c4b0c0c59143893fe25d007e) ) ROM_LOAD32_BYTE("rh_mpr0.bin", 0x000003, 0x80000, CRC(38025817) SHA1(fa4cf98cfca95c462b19b873a7660f7cec71cf56) ) @@ -1581,20 +1581,20 @@ ROM_END ROM_START( kaiserkn ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d84-25.20", 0x000000, 0x80000, CRC(2840893f) SHA1(079dece4667b029189622476cc618b88e57243a6) ) + ROM_LOAD32_BYTE("d84-25.20", 0x000000, 0x80000, CRC(2840893f) SHA1(079dece4667b029189622476cc618b88e57243a6) ) ROM_LOAD32_BYTE("d84-24.19", 0x000001, 0x80000, CRC(bf20c755) SHA1(9f6edfe9bb40051e8a93d06a391c993ed7288db6) ) ROM_LOAD32_BYTE("d84-23.18", 0x000002, 0x80000, CRC(39f12a9b) SHA1(4b3fe9b8b0abb46feacd11ffb6b505568f892483) ) ROM_LOAD32_BYTE("d84-29.17", 0x000003, 0x80000, CRC(9821f17a) SHA1(4a2c1ebeb1a1d3d756957956c883f8374aaf4f8d) ) ROM_REGION(0x1a00000, "gfx1" , 0) /* Sprites */ ROM_LOAD16_BYTE("d84-03.rom", 0x0000000, 0x200000, CRC(d786f552) SHA1(f73146892f714b5706d568fc8a135fddaa656570) ) - ROM_LOAD16_BYTE("d84-04.rom", 0x0000001, 0x200000, CRC(d1f32b5d) SHA1(35289cce64fdbb8d966dd1d5307b5393be5e7799) ) + ROM_LOAD16_BYTE("d84-04.rom", 0x0000001, 0x200000, CRC(d1f32b5d) SHA1(35289cce64fdbb8d966dd1d5307b5393be5e7799) ) ROM_LOAD16_BYTE("d84-06.rom", 0x0400000, 0x200000, CRC(fa924dab) SHA1(28a8c3cd701f8df0c53069bb576bb2a820f3a331) ) - ROM_LOAD16_BYTE("d84-07.rom", 0x0400001, 0x200000, CRC(54517a6b) SHA1(6e2c213c7ec1a3b78ad7e71db2326602557fd0f8) ) + ROM_LOAD16_BYTE("d84-07.rom", 0x0400001, 0x200000, CRC(54517a6b) SHA1(6e2c213c7ec1a3b78ad7e71db2326602557fd0f8) ) ROM_LOAD16_BYTE("d84-09.rom", 0x0800000, 0x200000, CRC(faa78d98) SHA1(da3a2c5a45dd169743f113aa08e574f732e1f0fd) ) - ROM_LOAD16_BYTE("d84-10.rom", 0x0800001, 0x200000, CRC(b84b7320) SHA1(f5de0d6da50d8ed753607b51e46bc9a4572ef431) ) + ROM_LOAD16_BYTE("d84-10.rom", 0x0800001, 0x200000, CRC(b84b7320) SHA1(f5de0d6da50d8ed753607b51e46bc9a4572ef431) ) ROM_LOAD16_BYTE("d84-19.rom", 0x0c00000, 0x080000, CRC(6ddf77e5) SHA1(a1323acaed37fce62a19e63a0800d9d1dc2cfff7) ) - ROM_LOAD16_BYTE("d84-20.rom", 0x0c00001, 0x080000, CRC(f85041e5) SHA1(6b2814514338f550d6aa14dbe39e848e8e64edee) ) + ROM_LOAD16_BYTE("d84-20.rom", 0x0c00001, 0x080000, CRC(f85041e5) SHA1(6b2814514338f550d6aa14dbe39e848e8e64edee) ) ROM_LOAD ("d84-05.rom", 0x1380000, 0x200000, CRC(31a3c75d) SHA1(1a16ccb6a0a03ab715e5b016ab3b1b2cd0f1ae41) ) ROM_LOAD ("d84-08.rom", 0x1580000, 0x200000, CRC(07347bf1) SHA1(34bd359933acdec7fd1ce047092a30d1177afc2c) ) ROM_LOAD ("d84-11.rom", 0x1780000, 0x200000, CRC(a062c1d4) SHA1(158912aa3dd75c3961bf738f9ac9034f0b005b60) ) @@ -1624,20 +1624,20 @@ ROM_END ROM_START( kaiserknj ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d84-25.20", 0x000000, 0x80000, CRC(2840893f) SHA1(079dece4667b029189622476cc618b88e57243a6) ) + ROM_LOAD32_BYTE("d84-25.20", 0x000000, 0x80000, CRC(2840893f) SHA1(079dece4667b029189622476cc618b88e57243a6) ) ROM_LOAD32_BYTE("d84-24.19", 0x000001, 0x80000, CRC(bf20c755) SHA1(9f6edfe9bb40051e8a93d06a391c993ed7288db6) ) ROM_LOAD32_BYTE("d84-23.18", 0x000002, 0x80000, CRC(39f12a9b) SHA1(4b3fe9b8b0abb46feacd11ffb6b505568f892483) ) ROM_LOAD32_BYTE("d84-22.17", 0x000003, 0x80000, CRC(762f9056) SHA1(c39854d865210d05fe745493098ef5990327c56e) ) ROM_REGION(0x1a00000, "gfx1" , 0) /* Sprites */ ROM_LOAD16_BYTE("d84-03.rom", 0x0000000, 0x200000, CRC(d786f552) SHA1(f73146892f714b5706d568fc8a135fddaa656570) ) - ROM_LOAD16_BYTE("d84-04.rom", 0x0000001, 0x200000, CRC(d1f32b5d) SHA1(35289cce64fdbb8d966dd1d5307b5393be5e7799) ) + ROM_LOAD16_BYTE("d84-04.rom", 0x0000001, 0x200000, CRC(d1f32b5d) SHA1(35289cce64fdbb8d966dd1d5307b5393be5e7799) ) ROM_LOAD16_BYTE("d84-06.rom", 0x0400000, 0x200000, CRC(fa924dab) SHA1(28a8c3cd701f8df0c53069bb576bb2a820f3a331) ) - ROM_LOAD16_BYTE("d84-07.rom", 0x0400001, 0x200000, CRC(54517a6b) SHA1(6e2c213c7ec1a3b78ad7e71db2326602557fd0f8) ) + ROM_LOAD16_BYTE("d84-07.rom", 0x0400001, 0x200000, CRC(54517a6b) SHA1(6e2c213c7ec1a3b78ad7e71db2326602557fd0f8) ) ROM_LOAD16_BYTE("d84-09.rom", 0x0800000, 0x200000, CRC(faa78d98) SHA1(da3a2c5a45dd169743f113aa08e574f732e1f0fd) ) - ROM_LOAD16_BYTE("d84-10.rom", 0x0800001, 0x200000, CRC(b84b7320) SHA1(f5de0d6da50d8ed753607b51e46bc9a4572ef431) ) + ROM_LOAD16_BYTE("d84-10.rom", 0x0800001, 0x200000, CRC(b84b7320) SHA1(f5de0d6da50d8ed753607b51e46bc9a4572ef431) ) ROM_LOAD16_BYTE("d84-19.rom", 0x0c00000, 0x080000, CRC(6ddf77e5) SHA1(a1323acaed37fce62a19e63a0800d9d1dc2cfff7) ) - ROM_LOAD16_BYTE("d84-20.rom", 0x0c00001, 0x080000, CRC(f85041e5) SHA1(6b2814514338f550d6aa14dbe39e848e8e64edee) ) + ROM_LOAD16_BYTE("d84-20.rom", 0x0c00001, 0x080000, CRC(f85041e5) SHA1(6b2814514338f550d6aa14dbe39e848e8e64edee) ) ROM_LOAD ("d84-05.rom", 0x1380000, 0x200000, CRC(31a3c75d) SHA1(1a16ccb6a0a03ab715e5b016ab3b1b2cd0f1ae41) ) ROM_LOAD ("d84-08.rom", 0x1580000, 0x200000, CRC(07347bf1) SHA1(34bd359933acdec7fd1ce047092a30d1177afc2c) ) ROM_LOAD ("d84-11.rom", 0x1780000, 0x200000, CRC(a062c1d4) SHA1(158912aa3dd75c3961bf738f9ac9034f0b005b60) ) @@ -1667,20 +1667,20 @@ ROM_END ROM_START( gblchmp ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d84-25.20", 0x000000, 0x80000, CRC(2840893f) SHA1(079dece4667b029189622476cc618b88e57243a6) ) + ROM_LOAD32_BYTE("d84-25.20", 0x000000, 0x80000, CRC(2840893f) SHA1(079dece4667b029189622476cc618b88e57243a6) ) ROM_LOAD32_BYTE("d84-24.19", 0x000001, 0x80000, CRC(bf20c755) SHA1(9f6edfe9bb40051e8a93d06a391c993ed7288db6) ) ROM_LOAD32_BYTE("d84-23.18", 0x000002, 0x80000, CRC(39f12a9b) SHA1(4b3fe9b8b0abb46feacd11ffb6b505568f892483) ) ROM_LOAD32_BYTE("d84-28.17", 0x000003, 0x80000, CRC(ef26c1ec) SHA1(99440573704252b59148b3c30a006ce152b30ada) ) ROM_REGION(0x1a00000, "gfx1" , 0) /* Sprites */ ROM_LOAD16_BYTE("d84-03.rom", 0x0000000, 0x200000, CRC(d786f552) SHA1(f73146892f714b5706d568fc8a135fddaa656570) ) - ROM_LOAD16_BYTE("d84-04.rom", 0x0000001, 0x200000, CRC(d1f32b5d) SHA1(35289cce64fdbb8d966dd1d5307b5393be5e7799) ) + ROM_LOAD16_BYTE("d84-04.rom", 0x0000001, 0x200000, CRC(d1f32b5d) SHA1(35289cce64fdbb8d966dd1d5307b5393be5e7799) ) ROM_LOAD16_BYTE("d84-06.rom", 0x0400000, 0x200000, CRC(fa924dab) SHA1(28a8c3cd701f8df0c53069bb576bb2a820f3a331) ) - ROM_LOAD16_BYTE("d84-07.rom", 0x0400001, 0x200000, CRC(54517a6b) SHA1(6e2c213c7ec1a3b78ad7e71db2326602557fd0f8) ) + ROM_LOAD16_BYTE("d84-07.rom", 0x0400001, 0x200000, CRC(54517a6b) SHA1(6e2c213c7ec1a3b78ad7e71db2326602557fd0f8) ) ROM_LOAD16_BYTE("d84-09.rom", 0x0800000, 0x200000, CRC(faa78d98) SHA1(da3a2c5a45dd169743f113aa08e574f732e1f0fd) ) - ROM_LOAD16_BYTE("d84-10.rom", 0x0800001, 0x200000, CRC(b84b7320) SHA1(f5de0d6da50d8ed753607b51e46bc9a4572ef431) ) + ROM_LOAD16_BYTE("d84-10.rom", 0x0800001, 0x200000, CRC(b84b7320) SHA1(f5de0d6da50d8ed753607b51e46bc9a4572ef431) ) ROM_LOAD16_BYTE("d84-19.rom", 0x0c00000, 0x080000, CRC(6ddf77e5) SHA1(a1323acaed37fce62a19e63a0800d9d1dc2cfff7) ) - ROM_LOAD16_BYTE("d84-20.rom", 0x0c00001, 0x080000, CRC(f85041e5) SHA1(6b2814514338f550d6aa14dbe39e848e8e64edee) ) + ROM_LOAD16_BYTE("d84-20.rom", 0x0c00001, 0x080000, CRC(f85041e5) SHA1(6b2814514338f550d6aa14dbe39e848e8e64edee) ) ROM_LOAD ("d84-05.rom", 0x1380000, 0x200000, CRC(31a3c75d) SHA1(1a16ccb6a0a03ab715e5b016ab3b1b2cd0f1ae41) ) ROM_LOAD ("d84-08.rom", 0x1580000, 0x200000, CRC(07347bf1) SHA1(34bd359933acdec7fd1ce047092a30d1177afc2c) ) ROM_LOAD ("d84-11.rom", 0x1780000, 0x200000, CRC(a062c1d4) SHA1(158912aa3dd75c3961bf738f9ac9034f0b005b60) ) @@ -1710,20 +1710,20 @@ ROM_END ROM_START( dankuga ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("dkg_mpr3.20", 0x000000, 0x80000, CRC(ee1531ca) SHA1(5a78f44906c77a3195cbb41d256292255275643f) ) + ROM_LOAD32_BYTE("dkg_mpr3.20", 0x000000, 0x80000, CRC(ee1531ca) SHA1(5a78f44906c77a3195cbb41d256292255275643f) ) ROM_LOAD32_BYTE("dkg_mpr2.19", 0x000001, 0x80000, CRC(18a4748b) SHA1(31b912b532329d2cbd43df44f21e0923af7157d5) ) ROM_LOAD32_BYTE("dkg_mpr1.18", 0x000002, 0x80000, CRC(97566f69) SHA1(2f1ae6b9a463f20beea1558278741ddfe3901a6d) ) ROM_LOAD32_BYTE("dkg_mpr0.17", 0x000003, 0x80000, CRC(ad6ada07) SHA1(124db0cf8a5fbd99525633a2f783a0e1b281badf) ) ROM_REGION(0x1a00000, "gfx1" , 0) /* Sprites */ ROM_LOAD16_BYTE("d84-03.rom", 0x0000000, 0x200000, CRC(d786f552) SHA1(f73146892f714b5706d568fc8a135fddaa656570) ) - ROM_LOAD16_BYTE("d84-04.rom", 0x0000001, 0x200000, CRC(d1f32b5d) SHA1(35289cce64fdbb8d966dd1d5307b5393be5e7799) ) + ROM_LOAD16_BYTE("d84-04.rom", 0x0000001, 0x200000, CRC(d1f32b5d) SHA1(35289cce64fdbb8d966dd1d5307b5393be5e7799) ) ROM_LOAD16_BYTE("d84-06.rom", 0x0400000, 0x200000, CRC(fa924dab) SHA1(28a8c3cd701f8df0c53069bb576bb2a820f3a331) ) - ROM_LOAD16_BYTE("d84-07.rom", 0x0400001, 0x200000, CRC(54517a6b) SHA1(6e2c213c7ec1a3b78ad7e71db2326602557fd0f8) ) + ROM_LOAD16_BYTE("d84-07.rom", 0x0400001, 0x200000, CRC(54517a6b) SHA1(6e2c213c7ec1a3b78ad7e71db2326602557fd0f8) ) ROM_LOAD16_BYTE("d84-09.rom", 0x0800000, 0x200000, CRC(faa78d98) SHA1(da3a2c5a45dd169743f113aa08e574f732e1f0fd) ) - ROM_LOAD16_BYTE("d84-10.rom", 0x0800001, 0x200000, CRC(b84b7320) SHA1(f5de0d6da50d8ed753607b51e46bc9a4572ef431) ) + ROM_LOAD16_BYTE("d84-10.rom", 0x0800001, 0x200000, CRC(b84b7320) SHA1(f5de0d6da50d8ed753607b51e46bc9a4572ef431) ) ROM_LOAD16_BYTE("d84-19.rom", 0x0c00000, 0x080000, CRC(6ddf77e5) SHA1(a1323acaed37fce62a19e63a0800d9d1dc2cfff7) ) - ROM_LOAD16_BYTE("d84-20.rom", 0x0c00001, 0x080000, CRC(f85041e5) SHA1(6b2814514338f550d6aa14dbe39e848e8e64edee) ) + ROM_LOAD16_BYTE("d84-20.rom", 0x0c00001, 0x080000, CRC(f85041e5) SHA1(6b2814514338f550d6aa14dbe39e848e8e64edee) ) ROM_LOAD ("d84-05.rom", 0x1380000, 0x200000, CRC(31a3c75d) SHA1(1a16ccb6a0a03ab715e5b016ab3b1b2cd0f1ae41) ) ROM_LOAD ("d84-08.rom", 0x1580000, 0x200000, CRC(07347bf1) SHA1(34bd359933acdec7fd1ce047092a30d1177afc2c) ) ROM_LOAD ("d84-11.rom", 0x1780000, 0x200000, CRC(a062c1d4) SHA1(158912aa3dd75c3961bf738f9ac9034f0b005b60) ) @@ -1753,7 +1753,7 @@ ROM_END ROM_START( dariusg ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d87-12.bin", 0x000000, 0x80000, CRC(de78f328) SHA1(126464a826685f5bfab6cc099448ce4df207a407) ) + ROM_LOAD32_BYTE("d87-12.bin", 0x000000, 0x80000, CRC(de78f328) SHA1(126464a826685f5bfab6cc099448ce4df207a407) ) ROM_LOAD32_BYTE("d87-11.bin", 0x000001, 0x80000, CRC(f7bed18e) SHA1(db7d92680f9f406a5295ee85ce110c1a56ed386f) ) ROM_LOAD32_BYTE("d87-10.bin", 0x000002, 0x80000, CRC(4149f66f) SHA1(57d36a62d490d9e53b6b80a92ea0e8c41d61799f) ) ROM_LOAD32_BYTE("d87-16.bin", 0x000003, 0x80000, CRC(8f7e5901) SHA1(b920f43374af30e2f7d7d01049af6746206c8ece) ) @@ -1781,7 +1781,7 @@ ROM_END ROM_START( dariusgj ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d87-12.bin", 0x000000, 0x80000, CRC(de78f328) SHA1(126464a826685f5bfab6cc099448ce4df207a407) ) + ROM_LOAD32_BYTE("d87-12.bin", 0x000000, 0x80000, CRC(de78f328) SHA1(126464a826685f5bfab6cc099448ce4df207a407) ) ROM_LOAD32_BYTE("d87-11.bin", 0x000001, 0x80000, CRC(f7bed18e) SHA1(db7d92680f9f406a5295ee85ce110c1a56ed386f) ) ROM_LOAD32_BYTE("d87-10.bin", 0x000002, 0x80000, CRC(4149f66f) SHA1(57d36a62d490d9e53b6b80a92ea0e8c41d61799f) ) ROM_LOAD32_BYTE("d87-09.bin", 0x000003, 0x80000, CRC(6170382d) SHA1(85b0f9a3400884e1c073d5bdcdf7318377650eed) ) @@ -1809,7 +1809,7 @@ ROM_END ROM_START( dariusgu ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d87-12.bin", 0x000000, 0x80000, CRC(de78f328) SHA1(126464a826685f5bfab6cc099448ce4df207a407) ) + ROM_LOAD32_BYTE("d87-12.bin", 0x000000, 0x80000, CRC(de78f328) SHA1(126464a826685f5bfab6cc099448ce4df207a407) ) ROM_LOAD32_BYTE("d87-11.bin", 0x000001, 0x80000, CRC(f7bed18e) SHA1(db7d92680f9f406a5295ee85ce110c1a56ed386f) ) ROM_LOAD32_BYTE("d87-10.bin", 0x000002, 0x80000, CRC(4149f66f) SHA1(57d36a62d490d9e53b6b80a92ea0e8c41d61799f) ) ROM_LOAD32_BYTE("d87-15.bin", 0x000003, 0x80000, CRC(f8796997) SHA1(fa286561bac9894cb260944ffa14d0059b882ab9) ) @@ -1837,7 +1837,7 @@ ROM_END ROM_START( dariusgx ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("dge_mpr3.bin", 0x000000, 0x80000, CRC(1c1e24a7) SHA1(eafde331c3be5be55d0d838a84017f357ff92634) ) + ROM_LOAD32_BYTE("dge_mpr3.bin", 0x000000, 0x80000, CRC(1c1e24a7) SHA1(eafde331c3be5be55d0d838a84017f357ff92634) ) ROM_LOAD32_BYTE("dge_mpr2.bin", 0x000001, 0x80000, CRC(7be23e23) SHA1(4764355f51e207f4538dd753aea59bf2689835de) ) ROM_LOAD32_BYTE("dge_mpr1.bin", 0x000002, 0x80000, CRC(bc030f6f) SHA1(841396911d26ddfae0c9863431e02e0b5e762ac6) ) ROM_LOAD32_BYTE("dge_mpr0.bin", 0x000003, 0x80000, CRC(c5bd135c) SHA1(402e26a05f1c3162fa3a8d3fcb81ef334b733699) ) @@ -1865,7 +1865,7 @@ ROM_END ROM_START( bublbob2 ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d90-12", 0x000000, 0x40000, CRC(9e523996) SHA1(c49a426f9865f96e8021c8ed9a6ac094c5e586b1) ) + ROM_LOAD32_BYTE("d90-12", 0x000000, 0x40000, CRC(9e523996) SHA1(c49a426f9865f96e8021c8ed9a6ac094c5e586b1) ) ROM_LOAD32_BYTE("d90-11", 0x000001, 0x40000, CRC(edfdbb7f) SHA1(698ad631d5b13661645f2c5ccd3e4fbf0248053c) ) ROM_LOAD32_BYTE("d90-10", 0x000002, 0x40000, CRC(8e957d3d) SHA1(5db31e5788483b802592e1092bf98df51ff4b70e) ) ROM_LOAD32_BYTE("d90-17", 0x000003, 0x40000, CRC(711f1894) SHA1(8e574d9a63593fbe0c87840e79a2e2dbfc227671) ) @@ -1888,12 +1888,12 @@ ROM_START( bublbob2 ) ROM_REGION16_BE(0x800000, "ensoniq.0" , ROMREGION_ERASE00 ) // V2: 4 banks, only 2 populated ROM_LOAD16_BYTE("d90-04", 0x000000, 0x200000, CRC(feee5fda) SHA1(b89354013ec4d34bcd51ecded412effa66dd2f2f) ) // C8 C9 CA CB - ROM_LOAD16_BYTE("d90-05", 0x400000, 0x200000, CRC(c192331f) SHA1(ebab05b3681c70b373bc06c1826be1cc397d3af7) ) // CC CD -std- + ROM_LOAD16_BYTE("d90-05", 0x400000, 0x200000, CRC(c192331f) SHA1(ebab05b3681c70b373bc06c1826be1cc397d3af7) ) // CC CD -std- ROM_END ROM_START( bubsymphe ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d90-12", 0x000000, 0x40000, CRC(9e523996) SHA1(c49a426f9865f96e8021c8ed9a6ac094c5e586b1) ) + ROM_LOAD32_BYTE("d90-12", 0x000000, 0x40000, CRC(9e523996) SHA1(c49a426f9865f96e8021c8ed9a6ac094c5e586b1) ) ROM_LOAD32_BYTE("d90-11", 0x000001, 0x40000, CRC(edfdbb7f) SHA1(698ad631d5b13661645f2c5ccd3e4fbf0248053c) ) ROM_LOAD32_BYTE("d90-10", 0x000002, 0x40000, CRC(8e957d3d) SHA1(5db31e5788483b802592e1092bf98df51ff4b70e) ) ROM_LOAD32_BYTE("d90-16", 0x000003, 0x40000, CRC(d12ef19b) SHA1(8715102b54c730c809b3964a80cd1aed863ba334) ) @@ -1916,12 +1916,12 @@ ROM_START( bubsymphe ) ROM_REGION16_BE(0x800000, "ensoniq.0" , ROMREGION_ERASE00 ) // V2: 4 banks, only 2 populated ROM_LOAD16_BYTE("d90-04", 0x000000, 0x200000, CRC(feee5fda) SHA1(b89354013ec4d34bcd51ecded412effa66dd2f2f) ) // C8 C9 CA CB - ROM_LOAD16_BYTE("d90-05", 0x400000, 0x200000, CRC(c192331f) SHA1(ebab05b3681c70b373bc06c1826be1cc397d3af7) ) // CC CD -std- + ROM_LOAD16_BYTE("d90-05", 0x400000, 0x200000, CRC(c192331f) SHA1(ebab05b3681c70b373bc06c1826be1cc397d3af7) ) // CC CD -std- ROM_END ROM_START( bubsymphj ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d90-12", 0x000000, 0x40000, CRC(9e523996) SHA1(c49a426f9865f96e8021c8ed9a6ac094c5e586b1) ) + ROM_LOAD32_BYTE("d90-12", 0x000000, 0x40000, CRC(9e523996) SHA1(c49a426f9865f96e8021c8ed9a6ac094c5e586b1) ) ROM_LOAD32_BYTE("d90-11", 0x000001, 0x40000, CRC(edfdbb7f) SHA1(698ad631d5b13661645f2c5ccd3e4fbf0248053c) ) ROM_LOAD32_BYTE("d90-10", 0x000002, 0x40000, CRC(8e957d3d) SHA1(5db31e5788483b802592e1092bf98df51ff4b70e) ) ROM_LOAD32_BYTE("d90-09", 0x000003, 0x40000, CRC(3f2090b7) SHA1(2a95c8c8dc23b618c0ce65497391d464494f4d6a) ) @@ -1944,7 +1944,7 @@ ROM_START( bubsymphj ) ROM_REGION16_BE(0x800000, "ensoniq.0" , ROMREGION_ERASE00 ) // V2: 4 banks, only 2 populated ROM_LOAD16_BYTE("d90-04", 0x000000, 0x200000, CRC(feee5fda) SHA1(b89354013ec4d34bcd51ecded412effa66dd2f2f) ) // C8 C9 CA CB - ROM_LOAD16_BYTE("d90-05", 0x400000, 0x200000, CRC(c192331f) SHA1(ebab05b3681c70b373bc06c1826be1cc397d3af7) ) // CC CD -std- + ROM_LOAD16_BYTE("d90-05", 0x400000, 0x200000, CRC(c192331f) SHA1(ebab05b3681c70b373bc06c1826be1cc397d3af7) ) // CC CD -std- ROM_REGION( 0x0a00, "plds", 0 ) ROM_LOAD( "pal16l8a-d77-09.bin", 0x0000, 0x0104, CRC(b371532b) SHA1(7f875f380e69d14326a036a09d2fda7554b73664) ) @@ -1983,7 +1983,7 @@ Dumped by tirino73 ROM_START( bubsymphb ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("bsb_d12.bin", 0x000000, 0x40000, CRC(d05160fc) SHA1(62eb47827d4089711af1187455faeb62a8d9e369) ) + ROM_LOAD32_BYTE("bsb_d12.bin", 0x000000, 0x40000, CRC(d05160fc) SHA1(62eb47827d4089711af1187455faeb62a8d9e369) ) ROM_LOAD32_BYTE("bsb_d13.bin", 0x000001, 0x40000, CRC(83fc0d2c) SHA1(275a923e6e6b6763cb7036d94943609eb9ce866b) ) ROM_LOAD32_BYTE("bsb_d14.bin", 0x000002, 0x40000, CRC(e6d49bb7) SHA1(9ca509ffd3f46160f3bbb0ceee9abcd09f9f9ad1) ) ROM_LOAD32_BYTE("bsb_d15.bin", 0x000003, 0x40000, CRC(014cf8e0) SHA1(5e91fc6665c1d472d0651c06108ea6a8eb5ae8b4) ) @@ -2010,7 +2010,7 @@ ROM_END ROM_START( bubsymphu ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d90-12", 0x000000, 0x40000, CRC(9e523996) SHA1(c49a426f9865f96e8021c8ed9a6ac094c5e586b1) ) + ROM_LOAD32_BYTE("d90-12", 0x000000, 0x40000, CRC(9e523996) SHA1(c49a426f9865f96e8021c8ed9a6ac094c5e586b1) ) ROM_LOAD32_BYTE("d90-11", 0x000001, 0x40000, CRC(edfdbb7f) SHA1(698ad631d5b13661645f2c5ccd3e4fbf0248053c) ) ROM_LOAD32_BYTE("d90-10", 0x000002, 0x40000, CRC(8e957d3d) SHA1(5db31e5788483b802592e1092bf98df51ff4b70e) ) ROM_LOAD32_BYTE("d90-15", 0x000003, 0x40000, CRC(06182802) SHA1(c068ea8e8852033d0cf7bd4bca4b0411b7aebded) ) @@ -2033,12 +2033,12 @@ ROM_START( bubsymphu ) ROM_REGION16_BE(0x800000, "ensoniq.0" , ROMREGION_ERASE00 ) // V2: 4 banks, only 2 populated ROM_LOAD16_BYTE("d90-04", 0x000000, 0x200000, CRC(feee5fda) SHA1(b89354013ec4d34bcd51ecded412effa66dd2f2f) ) // C8 C9 CA CB - ROM_LOAD16_BYTE("d90-05", 0x400000, 0x200000, CRC(c192331f) SHA1(ebab05b3681c70b373bc06c1826be1cc397d3af7) ) // CC CD -std- + ROM_LOAD16_BYTE("d90-05", 0x400000, 0x200000, CRC(c192331f) SHA1(ebab05b3681c70b373bc06c1826be1cc397d3af7) ) // CC CD -std- ROM_END ROM_START( spcinvdj ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d93-04.bin", 0x000000, 0x20000, CRC(cd9a4e5c) SHA1(b163b8274570610af8697b1b38116dcf4c3593db) ) + ROM_LOAD32_BYTE("d93-04.bin", 0x000000, 0x20000, CRC(cd9a4e5c) SHA1(b163b8274570610af8697b1b38116dcf4c3593db) ) ROM_LOAD32_BYTE("d93-03.bin", 0x000001, 0x20000, CRC(0174bfc1) SHA1(133452f6a5bdf01b1b436077288a597734a8731a) ) ROM_LOAD32_BYTE("d93-02.bin", 0x000002, 0x20000, CRC(01922b31) SHA1(660c9c20e76a5f4094f1bfee9d75146f0829daeb) ) ROM_LOAD32_BYTE("d93-01.bin", 0x000003, 0x20000, CRC(4a74ab1c) SHA1(5f7ae70d8fa3f141239ed3de3a45c50e2d824864) ) @@ -2066,7 +2066,7 @@ ROM_END ROM_START( pwrgoal ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d94-18.bin", 0x000000, 0x40000, CRC(b92681c3) SHA1(0ca05a69d046668c878df3d2b7ae3172d748e290) ) + ROM_LOAD32_BYTE("d94-18.bin", 0x000000, 0x40000, CRC(b92681c3) SHA1(0ca05a69d046668c878df3d2b7ae3172d748e290) ) ROM_LOAD32_BYTE("d94-17.bin", 0x000001, 0x40000, CRC(6009333e) SHA1(4ab28f2d9e2b75adc668f5d9390e06086bbd97dc) ) ROM_LOAD32_BYTE("d94-16.bin", 0x000002, 0x40000, CRC(c6dbc9c8) SHA1(4f096b59734db51eeddcf0649f2a6f11bdde9590) ) ROM_LOAD32_BYTE("d94-22.rom", 0x000003, 0x40000, CRC(f672e487) SHA1(da62afc82aeae4aeeebbee0965cda3d84464ad09) ) @@ -2100,7 +2100,7 @@ ROM_END ROM_START( hthero95 ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d94-18.bin", 0x000000, 0x40000, CRC(b92681c3) SHA1(0ca05a69d046668c878df3d2b7ae3172d748e290) ) + ROM_LOAD32_BYTE("d94-18.bin", 0x000000, 0x40000, CRC(b92681c3) SHA1(0ca05a69d046668c878df3d2b7ae3172d748e290) ) ROM_LOAD32_BYTE("d94-17.bin", 0x000001, 0x40000, CRC(6009333e) SHA1(4ab28f2d9e2b75adc668f5d9390e06086bbd97dc) ) ROM_LOAD32_BYTE("d94-16.bin", 0x000002, 0x40000, CRC(c6dbc9c8) SHA1(4f096b59734db51eeddcf0649f2a6f11bdde9590) ) ROM_LOAD32_BYTE("d94-15.bin", 0x000003, 0x40000, CRC(187c85ab) SHA1(8270930b95fafe5ad92ea978c1558c491d9668b0) ) @@ -2134,7 +2134,7 @@ ROM_END ROM_START( hthero95u ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("d94-18.bin", 0x000000, 0x40000, CRC(b92681c3) SHA1(0ca05a69d046668c878df3d2b7ae3172d748e290) ) + ROM_LOAD32_BYTE("d94-18.bin", 0x000000, 0x40000, CRC(b92681c3) SHA1(0ca05a69d046668c878df3d2b7ae3172d748e290) ) ROM_LOAD32_BYTE("d94-17.bin", 0x000001, 0x40000, CRC(6009333e) SHA1(4ab28f2d9e2b75adc668f5d9390e06086bbd97dc) ) ROM_LOAD32_BYTE("d94-16.bin", 0x000002, 0x40000, CRC(c6dbc9c8) SHA1(4f096b59734db51eeddcf0649f2a6f11bdde9590) ) ROM_LOAD32_BYTE("d94-21.bin", 0x000003, 0x40000, CRC(8175d411) SHA1(b93ffef510ecfaced6cae07ea6cd549af7473049) ) @@ -2175,7 +2175,7 @@ ROM_START( qtheater ) ROM_REGION(0x800000, "gfx1" , 0) /* Sprites */ ROM_LOAD16_BYTE("d95-02.12", 0x000000, 0x200000, CRC(74ce6f3e) SHA1(eb03f44889bd2d5705e9d8cda6516b39758d9554) ) - ROM_LOAD16_BYTE("d95-01.8", 0x000001, 0x200000, CRC(141beb7d) SHA1(bba91f47f68367e2bb3d89298cb62fac2d4edf7b) ) + ROM_LOAD16_BYTE("d95-01.8", 0x000001, 0x200000, CRC(141beb7d) SHA1(bba91f47f68367e2bb3d89298cb62fac2d4edf7b) ) ROM_FILL ( 0x400000, 0x400000, 0 ) ROM_REGION(0x800000, "gfx2" , 0) /* Tiles */ @@ -2194,7 +2194,7 @@ ROM_END ROM_START( spcinv95u ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("e06-14.20", 0x000000, 0x20000, CRC(71ba7f00) SHA1(6b1d994c8319778aad3bec7bf7b24dc4944a36f0) ) + ROM_LOAD32_BYTE("e06-14.20", 0x000000, 0x20000, CRC(71ba7f00) SHA1(6b1d994c8319778aad3bec7bf7b24dc4944a36f0) ) ROM_LOAD32_BYTE("e06-13.19", 0x000001, 0x20000, CRC(f506ba4b) SHA1(551f9e87d2bfd513998648b175b63677cd6bdd74) ) ROM_LOAD32_BYTE("e06-12.18", 0x000002, 0x20000, CRC(06cbd72b) SHA1(0c8e11bd5f3fcf7451908c53e74ae545a0d97640) ) ROM_LOAD32_BYTE("e06-15.17", 0x000003, 0x20000, CRC(a6ec0103) SHA1(4f524a6b52bbdb370b8f98d26e7446da943e3edd) ) @@ -2217,7 +2217,7 @@ ROM_START( spcinv95u ) ROM_REGION16_BE(0x800000, "ensoniq.0" , ROMREGION_ERASE00 ) // V2: 4 banks, only 2 populated ROM_LOAD16_BYTE("e06-04", 0x000000, 0x200000, CRC(1dac29df) SHA1(ed68a41def148dcf4057cfac87a2a563c6882e1d) ) // C8 C9 CA CB - ROM_LOAD16_BYTE("e06-05", 0x400000, 0x200000, CRC(f370ff15) SHA1(4bc464d1c3a28326c8b1ae2036387954cb1dd813) ) // CC CD CE CF + ROM_LOAD16_BYTE("e06-05", 0x400000, 0x200000, CRC(f370ff15) SHA1(4bc464d1c3a28326c8b1ae2036387954cb1dd813) ) // CC CD CE CF ROM_REGION( 0x0a00, "plds", 0 ) ROM_LOAD( "pal16l8a-d77-09.bin", 0x0000, 0x0104, CRC(b371532b) SHA1(7f875f380e69d14326a036a09d2fda7554b73664) ) @@ -2229,7 +2229,7 @@ ROM_END ROM_START( spcinv95 ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("e06-14.20", 0x000000, 0x20000, CRC(71ba7f00) SHA1(6b1d994c8319778aad3bec7bf7b24dc4944a36f0) ) + ROM_LOAD32_BYTE("e06-14.20", 0x000000, 0x20000, CRC(71ba7f00) SHA1(6b1d994c8319778aad3bec7bf7b24dc4944a36f0) ) ROM_LOAD32_BYTE("e06-13.19", 0x000001, 0x20000, CRC(f506ba4b) SHA1(551f9e87d2bfd513998648b175b63677cd6bdd74) ) ROM_LOAD32_BYTE("e06-12.18", 0x000002, 0x20000, CRC(06cbd72b) SHA1(0c8e11bd5f3fcf7451908c53e74ae545a0d97640) ) ROM_LOAD32_BYTE("e06-16.17", 0x000003, 0x20000, CRC(d1eb3195) SHA1(40c5e326e8dd9a892abdab952f853799f26601b7) ) @@ -2252,7 +2252,7 @@ ROM_START( spcinv95 ) ROM_REGION16_BE(0x800000, "ensoniq.0" , ROMREGION_ERASE00 ) // V2: 4 banks, only 2 populated ROM_LOAD16_BYTE("e06-04", 0x000000, 0x200000, CRC(1dac29df) SHA1(ed68a41def148dcf4057cfac87a2a563c6882e1d) ) // C8 C9 CA CB - ROM_LOAD16_BYTE("e06-05", 0x400000, 0x200000, CRC(f370ff15) SHA1(4bc464d1c3a28326c8b1ae2036387954cb1dd813) ) // CC CD CE CF + ROM_LOAD16_BYTE("e06-05", 0x400000, 0x200000, CRC(f370ff15) SHA1(4bc464d1c3a28326c8b1ae2036387954cb1dd813) ) // CC CD CE CF ROM_REGION( 0x0a00, "plds", 0 ) ROM_LOAD( "pal16l8a-d77-09.bin", 0x0000, 0x0104, CRC(b371532b) SHA1(7f875f380e69d14326a036a09d2fda7554b73664) ) @@ -2264,7 +2264,7 @@ ROM_END ROM_START( akkanvdr ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("e06-14.20", 0x000000, 0x20000, CRC(71ba7f00) SHA1(6b1d994c8319778aad3bec7bf7b24dc4944a36f0) ) + ROM_LOAD32_BYTE("e06-14.20", 0x000000, 0x20000, CRC(71ba7f00) SHA1(6b1d994c8319778aad3bec7bf7b24dc4944a36f0) ) ROM_LOAD32_BYTE("e06-13.19", 0x000001, 0x20000, CRC(f506ba4b) SHA1(551f9e87d2bfd513998648b175b63677cd6bdd74) ) ROM_LOAD32_BYTE("e06-12.18", 0x000002, 0x20000, CRC(06cbd72b) SHA1(0c8e11bd5f3fcf7451908c53e74ae545a0d97640) ) ROM_LOAD32_BYTE("e06-11.17", 0x000003, 0x20000, CRC(3fe550b9) SHA1(6258d72204834abfba58bc2d5882f3616a6fd784) ) @@ -2287,7 +2287,7 @@ ROM_START( akkanvdr ) ROM_REGION16_BE(0x800000, "ensoniq.0" , ROMREGION_ERASE00 ) // V2: 4 banks, only 2 populated ROM_LOAD16_BYTE("e06-04", 0x000000, 0x200000, CRC(1dac29df) SHA1(ed68a41def148dcf4057cfac87a2a563c6882e1d) ) // C8 C9 CA CB - ROM_LOAD16_BYTE("e06-05", 0x400000, 0x200000, CRC(f370ff15) SHA1(4bc464d1c3a28326c8b1ae2036387954cb1dd813) ) // CC CD CE CF + ROM_LOAD16_BYTE("e06-05", 0x400000, 0x200000, CRC(f370ff15) SHA1(4bc464d1c3a28326c8b1ae2036387954cb1dd813) ) // CC CD CE CF ROM_END @@ -2377,7 +2377,7 @@ Notes: ROM_START( elvactr ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("e02-12.20", 0x000000, 0x80000, CRC(ea5f5a32) SHA1(4f30c56fbf068fee6d3afb2479043c7e89f6c055) ) + ROM_LOAD32_BYTE("e02-12.20", 0x000000, 0x80000, CRC(ea5f5a32) SHA1(4f30c56fbf068fee6d3afb2479043c7e89f6c055) ) ROM_LOAD32_BYTE("e02-11.19", 0x000001, 0x80000, CRC(bcced8ff) SHA1(09c38c78300ba9d710b4e46ca71014bbc5ac46b4) ) ROM_LOAD32_BYTE("e02-10.18", 0x000002, 0x80000, CRC(72f1b952) SHA1(9fc41ecfbee3581d9e92ff3a2ab6e4b93567e31d) ) ROM_LOAD32_BYTE("e02-16.17", 0x000003, 0x80000, CRC(cd97182b) SHA1(b3387980acfeec81eb0178d5b2955ac39595e22d) ) @@ -2414,7 +2414,7 @@ ROM_END ROM_START( elvactrj ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("e02-12.20", 0x000000, 0x80000, CRC(ea5f5a32) SHA1(4f30c56fbf068fee6d3afb2479043c7e89f6c055) ) + ROM_LOAD32_BYTE("e02-12.20", 0x000000, 0x80000, CRC(ea5f5a32) SHA1(4f30c56fbf068fee6d3afb2479043c7e89f6c055) ) ROM_LOAD32_BYTE("e02-11.19", 0x000001, 0x80000, CRC(bcced8ff) SHA1(09c38c78300ba9d710b4e46ca71014bbc5ac46b4) ) ROM_LOAD32_BYTE("e02-10.18", 0x000002, 0x80000, CRC(72f1b952) SHA1(9fc41ecfbee3581d9e92ff3a2ab6e4b93567e31d) ) ROM_LOAD32_BYTE("e02-09.17", 0x000003, 0x80000, CRC(23997907) SHA1(e5b0b9069b29cf08e1a782c73f42137aec198f7f) ) @@ -2442,7 +2442,7 @@ ROM_END ROM_START( elvact2u ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("e02-12.20", 0x000000, 0x80000, CRC(ea5f5a32) SHA1(4f30c56fbf068fee6d3afb2479043c7e89f6c055) ) + ROM_LOAD32_BYTE("e02-12.20", 0x000000, 0x80000, CRC(ea5f5a32) SHA1(4f30c56fbf068fee6d3afb2479043c7e89f6c055) ) ROM_LOAD32_BYTE("e02-11.19", 0x000001, 0x80000, CRC(bcced8ff) SHA1(09c38c78300ba9d710b4e46ca71014bbc5ac46b4) ) ROM_LOAD32_BYTE("e02-10.18", 0x000002, 0x80000, CRC(72f1b952) SHA1(9fc41ecfbee3581d9e92ff3a2ab6e4b93567e31d) ) ROM_LOAD32_BYTE("e02-15.17", 0x000003, 0x80000, CRC(ba9028bd) SHA1(1d04ce5333143ed78ec297d89c0cdb99bf6e4bde) ) @@ -2470,7 +2470,7 @@ ROM_END ROM_START( twinqix ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("mpr0-3.b60", 0x000000, 0x40000, CRC(1a63d0de) SHA1(7d8d8a6c9c7f9dfc0a8a528a905e33388b8fe13d) ) + ROM_LOAD32_BYTE("mpr0-3.b60", 0x000000, 0x40000, CRC(1a63d0de) SHA1(7d8d8a6c9c7f9dfc0a8a528a905e33388b8fe13d) ) ROM_LOAD32_BYTE("mpr0-2.b61", 0x000001, 0x40000, CRC(45a70987) SHA1(8cca6845064d943fd28416143e60399188b023cd) ) ROM_LOAD32_BYTE("mpr0-1.b62", 0x000002, 0x40000, CRC(531f9447) SHA1(4d18efaad9c3dd2b14d3125c0f9e18cfcde3a1f2) ) ROM_LOAD32_BYTE("mpr0-0.b63", 0x000003, 0x40000, CRC(a4c44c11) SHA1(b928134028bb8cddd6e34a501a4aad56173e2ae2) ) @@ -2481,7 +2481,7 @@ ROM_START( twinqix ) ROM_FILL ( 0x100000, 0x100000, 0 ) ROM_REGION(0x400000, "gfx2" , 0 ) /* Tiles */ - ROM_LOAD32_BYTE("scr0-0.b07", 0x000000, 0x080000, CRC(9a1b9b34) SHA1(ddf9c6ba0f9c340b580573e1d96ac76b1cd35beb) ) + ROM_LOAD32_BYTE("scr0-0.b07", 0x000000, 0x080000, CRC(9a1b9b34) SHA1(ddf9c6ba0f9c340b580573e1d96ac76b1cd35beb) ) ROM_LOAD32_BYTE("scr0-1.b06", 0x000002, 0x080000, CRC(e9bef879) SHA1(7e720f5054a1ef3a28353f1c221f4cf15d3b7428) ) ROM_LOAD32_BYTE("scr0-2.b05", 0x000001, 0x080000, CRC(cac6854b) SHA1(c97fb7de48e1644695bbe431587d6c1be01ea62d) ) ROM_LOAD32_BYTE("scr0-3.b04", 0x000003, 0x080000, CRC(ce063034) SHA1(2ecff74427d7d2fa8d1db4ac87481d123d7ce003) ) @@ -2517,9 +2517,9 @@ ROM_START( quizhuhu ) ROM_REGION(0xc00000, "gfx1" , 0) /* Sprites */ ROM_LOAD16_BYTE("e08-06.12", 0x000000, 0x200000, CRC(8dadc9ac) SHA1(469e3c5063f5cb0832fb5bb5000ecd3c342cd095) ) - ROM_LOAD16_BYTE("e08-04.8", 0x000001, 0x200000, CRC(5423721d) SHA1(7e9f4492845b7b4df0336203b1da6ca5ffeb36de) ) + ROM_LOAD16_BYTE("e08-04.8", 0x000001, 0x200000, CRC(5423721d) SHA1(7e9f4492845b7b4df0336203b1da6ca5ffeb36de) ) ROM_LOAD16_BYTE("e08-05.11", 0x400000, 0x100000, CRC(79d2e516) SHA1(7dc0c23f3995d14b443a3f67d488e5ab780e8a94) ) - ROM_LOAD16_BYTE("e08-03.7", 0x400001, 0x100000, CRC(07b9ab6a) SHA1(db205822233c385e1dbe4a9d40b311df9bca7053) ) + ROM_LOAD16_BYTE("e08-03.7", 0x400001, 0x100000, CRC(07b9ab6a) SHA1(db205822233c385e1dbe4a9d40b311df9bca7053) ) ROM_LOAD ("e08-02.4", 0x900000, 0x200000, CRC(d89eb067) SHA1(bd8e1cf4c2046894c629d927fa05806b9b73505d) ) ROM_LOAD ("e08-01.3", 0xb00000, 0x100000, CRC(90223c06) SHA1(f07dae563946908d471ae89db74a2e55c5ab5890) ) ROM_FILL ( 0x600000, 0x300000, 0 ) @@ -2551,7 +2551,7 @@ ROM_START( pbobble2 ) ROM_REGION(0x400000, "gfx1" , 0) /* Sprites */ ROM_LOAD16_BYTE("e10-02.rom", 0x000000, 0x100000, CRC(c0564490) SHA1(cbe9f880192c08f4d1db21d5ba14073b97e5f1d3) ) - ROM_LOAD16_BYTE("e10-01.rom", 0x000001, 0x100000, CRC(8c26ff49) SHA1(cbb514c061106003d2ae2b6c43958b24feaad656) ) + ROM_LOAD16_BYTE("e10-01.rom", 0x000001, 0x100000, CRC(8c26ff49) SHA1(cbb514c061106003d2ae2b6c43958b24feaad656) ) ROM_FILL ( 0x200000, 0x200000, 0 ) ROM_REGION(0x400000, "gfx2" , 0) /* Tiles */ @@ -2583,7 +2583,7 @@ ROM_START( pbobble2o ) ROM_REGION(0x400000, "gfx1" , 0) /* Sprites */ ROM_LOAD16_BYTE("e10-02.rom", 0x000000, 0x100000, CRC(c0564490) SHA1(cbe9f880192c08f4d1db21d5ba14073b97e5f1d3) ) - ROM_LOAD16_BYTE("e10-01.rom", 0x000001, 0x100000, CRC(8c26ff49) SHA1(cbb514c061106003d2ae2b6c43958b24feaad656) ) + ROM_LOAD16_BYTE("e10-01.rom", 0x000001, 0x100000, CRC(8c26ff49) SHA1(cbb514c061106003d2ae2b6c43958b24feaad656) ) ROM_FILL ( 0x200000, 0x200000, 0 ) ROM_REGION(0x400000, "gfx2" , 0) /* Tiles */ @@ -2610,7 +2610,7 @@ ROM_START( pbobble2j ) ROM_REGION(0x400000, "gfx1" , 0) /* Sprites */ ROM_LOAD16_BYTE("e10-02.rom", 0x000000, 0x100000, CRC(c0564490) SHA1(cbe9f880192c08f4d1db21d5ba14073b97e5f1d3) ) - ROM_LOAD16_BYTE("e10-01.rom", 0x000001, 0x100000, CRC(8c26ff49) SHA1(cbb514c061106003d2ae2b6c43958b24feaad656) ) + ROM_LOAD16_BYTE("e10-01.rom", 0x000001, 0x100000, CRC(8c26ff49) SHA1(cbb514c061106003d2ae2b6c43958b24feaad656) ) ROM_FILL ( 0x200000, 0x200000, 0 ) ROM_REGION(0x400000, "gfx2" , 0) /* Tiles */ @@ -2637,7 +2637,7 @@ ROM_START( pbobble2u ) ROM_REGION(0x400000, "gfx1" , 0) /* Sprites */ ROM_LOAD16_BYTE("e10-02.rom", 0x000000, 0x100000, CRC(c0564490) SHA1(cbe9f880192c08f4d1db21d5ba14073b97e5f1d3) ) - ROM_LOAD16_BYTE("e10-01.rom", 0x000001, 0x100000, CRC(8c26ff49) SHA1(cbb514c061106003d2ae2b6c43958b24feaad656) ) + ROM_LOAD16_BYTE("e10-01.rom", 0x000001, 0x100000, CRC(8c26ff49) SHA1(cbb514c061106003d2ae2b6c43958b24feaad656) ) ROM_FILL ( 0x200000, 0x200000, 0 ) ROM_REGION(0x400000, "gfx2" , 0) /* Tiles */ @@ -2657,14 +2657,14 @@ ROM_END ROM_START( pbobble2x ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("e10-29.20", 0x000000, 0x40000, CRC(f1e9ad3f) SHA1(8689d85f30e075d21e4be01a2a097a850a921c47) ) + ROM_LOAD32_BYTE("e10-29.20", 0x000000, 0x40000, CRC(f1e9ad3f) SHA1(8689d85f30e075d21e4be01a2a097a850a921c47) ) ROM_LOAD32_BYTE("e10-28.19", 0x000001, 0x40000, CRC(412a3602) SHA1(d754e6ac886676d2c1eb52de3a727894f316e6b5) ) ROM_LOAD32_BYTE("e10-27.18", 0x000002, 0x40000, CRC(88cc0b5c) SHA1(bb08a7b8b37356376052ed03f8515677811823c0) ) ROM_LOAD32_BYTE("e10-26.17", 0x000003, 0x40000, CRC(a5c24047) SHA1(62861577ce0aedb8d05360f0302fceecbde15420) ) ROM_REGION(0x400000, "gfx1" , 0) /* Sprites */ ROM_LOAD16_BYTE("e10-02.rom", 0x000000, 0x100000, CRC(c0564490) SHA1(cbe9f880192c08f4d1db21d5ba14073b97e5f1d3) ) - ROM_LOAD16_BYTE("e10-01.rom", 0x000001, 0x100000, CRC(8c26ff49) SHA1(cbb514c061106003d2ae2b6c43958b24feaad656) ) + ROM_LOAD16_BYTE("e10-01.rom", 0x000001, 0x100000, CRC(8c26ff49) SHA1(cbb514c061106003d2ae2b6c43958b24feaad656) ) ROM_FILL ( 0x200000, 0x200000, 0 ) ROM_REGION(0x400000, "gfx2" , 0) /* Tiles */ @@ -2691,22 +2691,22 @@ ROM_END ROM_START( gekirido ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("e11-12.bin", 0x000000, 0x40000, CRC(6a7aaacf) SHA1(a8114c84e76c75c908a61d985d96aa4eb9a0ac5a) ) + ROM_LOAD32_BYTE("e11-12.bin", 0x000000, 0x40000, CRC(6a7aaacf) SHA1(a8114c84e76c75c908a61d985d96aa4eb9a0ac5a) ) ROM_LOAD32_BYTE("e11-11.bin", 0x000001, 0x40000, CRC(2284a08e) SHA1(3dcb91be0d3491ad5e77efd30bacd506dad0f848) ) ROM_LOAD32_BYTE("e11-10.bin", 0x000002, 0x40000, CRC(8795e6ba) SHA1(9128c29fdce3276f55aad47451e4a507470c8b9f) ) ROM_LOAD32_BYTE("e11-09.bin", 0x000003, 0x40000, CRC(b4e17ef4) SHA1(ab06ab68aaa487cc3046a15fef3dde8581197391) ) ROM_REGION(0x800000, "gfx1" , 0) /* Sprites */ ROM_LOAD16_BYTE("e11-03.bin", 0x000000, 0x200000, CRC(f73877c5) SHA1(1f6b7c0b8a0aaab3e5427d21de7fad3d3cbf737a) ) - ROM_LOAD16_BYTE("e11-02.bin", 0x000001, 0x200000, CRC(5722a83b) SHA1(823c20a33016a5506ca5415ec615c3d2546ca9ab) ) + ROM_LOAD16_BYTE("e11-02.bin", 0x000001, 0x200000, CRC(5722a83b) SHA1(823c20a33016a5506ca5415ec615c3d2546ca9ab) ) ROM_LOAD ("e11-01.bin", 0x600000, 0x200000, CRC(c2cd1069) SHA1(9744dd3d8a6d9200cea4429dafce5620b60e2960) ) - ROM_FILL ( 0x400000, 0x200000, 0 ) + ROM_FILL ( 0x400000, 0x200000, 0 ) ROM_REGION(0x800000, "gfx2" , 0) /* Tiles */ ROM_LOAD16_BYTE("e11-08.bin", 0x000000, 0x200000, CRC(907f69d3) SHA1(0899ed58edcae22144625c349c9d2fe4d46d11e3) ) ROM_LOAD16_BYTE("e11-07.bin", 0x000001, 0x200000, CRC(ef018607) SHA1(61b602b13754c3be21caf76acbfc10c87518ba47) ) ROM_LOAD ("e11-06.bin", 0x600000, 0x200000, CRC(200ce305) SHA1(c80a0b96510913a6411e6763fb72bf413fb792da) ) - ROM_FILL ( 0x400000, 0x200000, 0 ) + ROM_FILL ( 0x400000, 0x200000, 0 ) ROM_REGION(0x140000, "audiocpu", 0) /* 68000 sound CPU */ ROM_LOAD16_BYTE("e11-13.bin", 0x100000, 0x20000, CRC(51a11ff7) SHA1(c03042489d71423667f25856d15aa6a363ea6c92) ) @@ -2719,17 +2719,17 @@ ROM_END ROM_START( tcobra2 ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("e15-14.bin", 0x000000, 0x40000, CRC(b527b733) SHA1(19efd647ea9c277b306714fe79ebf40d5f9d2187) ) + ROM_LOAD32_BYTE("e15-14.bin", 0x000000, 0x40000, CRC(b527b733) SHA1(19efd647ea9c277b306714fe79ebf40d5f9d2187) ) ROM_LOAD32_BYTE("e15-13.bin", 0x000001, 0x40000, CRC(0f03daf7) SHA1(de5aee5a339224dfe5e03a02d3ef5ffd5a39211e) ) ROM_LOAD32_BYTE("e15-12.bin", 0x000002, 0x40000, CRC(59d832f2) SHA1(27019b4121b1f8b0b9e141234192b3da1a4af718) ) ROM_LOAD32_BYTE("e15-18.bin", 0x000003, 0x40000, CRC(4908c3aa) SHA1(9b0230e6bafd0533ecbe89bc18fae6f3425ea1a3) ) ROM_REGION(0xc00000, "gfx1" , 0) /* Sprites */ ROM_LOAD16_BYTE("e15-04.bin", 0x000000, 0x200000, CRC(6ea8d9bd) SHA1(c31644e89752325ba2f174b60e31bd9659479391) ) - ROM_LOAD16_BYTE("e15-02.bin", 0x000001, 0x200000, CRC(2ea7f2bd) SHA1(3b42f603f7d35e9b32931a2e8913eb735151a64c) ) + ROM_LOAD16_BYTE("e15-02.bin", 0x000001, 0x200000, CRC(2ea7f2bd) SHA1(3b42f603f7d35e9b32931a2e8913eb735151a64c) ) ROM_LOAD16_BYTE("e15-03.bin", 0x400000, 0x100000, CRC(be45a52f) SHA1(5d9735a774233b43003057cbab6ae7d6e0195dd2) ) - ROM_LOAD16_BYTE("e15-01.bin", 0x400001, 0x100000, CRC(85421aac) SHA1(327e72f0107e024ec9fc9dc20d381e2e20f36248) ) - ROM_FILL ( 0x600000, 0x600000, 0 ) + ROM_LOAD16_BYTE("e15-01.bin", 0x400001, 0x100000, CRC(85421aac) SHA1(327e72f0107e024ec9fc9dc20d381e2e20f36248) ) + ROM_FILL ( 0x600000, 0x600000, 0 ) ROM_REGION(0xc00000, "gfx2" , 0) /* Tiles */ ROM_LOAD16_BYTE("e15-10.bin", 0x000000, 0x200000, CRC(d8c96b00) SHA1(9cd275abb66b3475433ea2649dc872d7d35eb5b8) ) @@ -2749,17 +2749,17 @@ ROM_END ROM_START( tcobra2u ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("e15-14.bin", 0x000000, 0x40000, CRC(b527b733) SHA1(19efd647ea9c277b306714fe79ebf40d5f9d2187) ) + ROM_LOAD32_BYTE("e15-14.bin", 0x000000, 0x40000, CRC(b527b733) SHA1(19efd647ea9c277b306714fe79ebf40d5f9d2187) ) ROM_LOAD32_BYTE("e15-13.bin", 0x000001, 0x40000, CRC(0f03daf7) SHA1(de5aee5a339224dfe5e03a02d3ef5ffd5a39211e) ) ROM_LOAD32_BYTE("e15-12.bin", 0x000002, 0x40000, CRC(59d832f2) SHA1(27019b4121b1f8b0b9e141234192b3da1a4af718) ) ROM_LOAD32_BYTE("e15-17.bin", 0x000003, 0x40000, CRC(3e0ff33c) SHA1(6da0a69272172e03921417f3949817756c7894b4) ) ROM_REGION(0xc00000, "gfx1" , 0) /* Sprites */ ROM_LOAD16_BYTE("e15-04.bin", 0x000000, 0x200000, CRC(6ea8d9bd) SHA1(c31644e89752325ba2f174b60e31bd9659479391) ) - ROM_LOAD16_BYTE("e15-02.bin", 0x000001, 0x200000, CRC(2ea7f2bd) SHA1(3b42f603f7d35e9b32931a2e8913eb735151a64c) ) + ROM_LOAD16_BYTE("e15-02.bin", 0x000001, 0x200000, CRC(2ea7f2bd) SHA1(3b42f603f7d35e9b32931a2e8913eb735151a64c) ) ROM_LOAD16_BYTE("e15-03.bin", 0x400000, 0x100000, CRC(be45a52f) SHA1(5d9735a774233b43003057cbab6ae7d6e0195dd2) ) - ROM_LOAD16_BYTE("e15-01.bin", 0x400001, 0x100000, CRC(85421aac) SHA1(327e72f0107e024ec9fc9dc20d381e2e20f36248) ) - ROM_FILL ( 0x600000, 0x600000, 0 ) + ROM_LOAD16_BYTE("e15-01.bin", 0x400001, 0x100000, CRC(85421aac) SHA1(327e72f0107e024ec9fc9dc20d381e2e20f36248) ) + ROM_FILL ( 0x600000, 0x600000, 0 ) ROM_REGION(0xc00000, "gfx2" , 0) /* Tiles */ ROM_LOAD16_BYTE("e15-10.bin", 0x000000, 0x200000, CRC(d8c96b00) SHA1(9cd275abb66b3475433ea2649dc872d7d35eb5b8) ) @@ -2779,17 +2779,17 @@ ROM_END ROM_START( ktiger2 ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("e15-14.bin", 0x000000, 0x40000, CRC(b527b733) SHA1(19efd647ea9c277b306714fe79ebf40d5f9d2187) ) + ROM_LOAD32_BYTE("e15-14.bin", 0x000000, 0x40000, CRC(b527b733) SHA1(19efd647ea9c277b306714fe79ebf40d5f9d2187) ) ROM_LOAD32_BYTE("e15-13.bin", 0x000001, 0x40000, CRC(0f03daf7) SHA1(de5aee5a339224dfe5e03a02d3ef5ffd5a39211e) ) ROM_LOAD32_BYTE("e15-12.bin", 0x000002, 0x40000, CRC(59d832f2) SHA1(27019b4121b1f8b0b9e141234192b3da1a4af718) ) ROM_LOAD32_BYTE("e15-11.bin", 0x000003, 0x40000, CRC(a706a286) SHA1(c3d1cdb0c5b1004acadc926ffd9083c9afea8608) ) ROM_REGION(0xc00000, "gfx1" , 0) /* Sprites */ ROM_LOAD16_BYTE("e15-04.bin", 0x000000, 0x200000, CRC(6ea8d9bd) SHA1(c31644e89752325ba2f174b60e31bd9659479391) ) - ROM_LOAD16_BYTE("e15-02.bin", 0x000001, 0x200000, CRC(2ea7f2bd) SHA1(3b42f603f7d35e9b32931a2e8913eb735151a64c) ) + ROM_LOAD16_BYTE("e15-02.bin", 0x000001, 0x200000, CRC(2ea7f2bd) SHA1(3b42f603f7d35e9b32931a2e8913eb735151a64c) ) ROM_LOAD16_BYTE("e15-03.bin", 0x400000, 0x100000, CRC(be45a52f) SHA1(5d9735a774233b43003057cbab6ae7d6e0195dd2) ) - ROM_LOAD16_BYTE("e15-01.bin", 0x400001, 0x100000, CRC(85421aac) SHA1(327e72f0107e024ec9fc9dc20d381e2e20f36248) ) - ROM_FILL ( 0x600000, 0x600000, 0 ) + ROM_LOAD16_BYTE("e15-01.bin", 0x400001, 0x100000, CRC(85421aac) SHA1(327e72f0107e024ec9fc9dc20d381e2e20f36248) ) + ROM_FILL ( 0x600000, 0x600000, 0 ) ROM_REGION(0xc00000, "gfx2" , 0) /* Tiles */ ROM_LOAD16_BYTE("e15-10.bin", 0x000000, 0x200000, CRC(d8c96b00) SHA1(9cd275abb66b3475433ea2649dc872d7d35eb5b8) ) @@ -2809,7 +2809,7 @@ ROM_END ROM_START( bubblem ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("e21-21.20", 0x000000, 0x080000, CRC(cac4169c) SHA1(e1e5b9bbaecfd29ee764c8b29df8ffd08ef01866) ) + ROM_LOAD32_BYTE("e21-21.20", 0x000000, 0x080000, CRC(cac4169c) SHA1(e1e5b9bbaecfd29ee764c8b29df8ffd08ef01866) ) ROM_LOAD32_BYTE("e21-20.19", 0x000001, 0x080000, CRC(7727c673) SHA1(cda3dbcf8da06e81b899008462bcd6b2ea43db81) ) ROM_LOAD32_BYTE("e21-19.18", 0x000002, 0x080000, CRC(be0b907d) SHA1(8bb6a149a4b0ccdb32396f7e750218a0bdc31965) ) ROM_LOAD32_BYTE("e21-18.17", 0x000003, 0x080000, CRC(d14e313a) SHA1(3913d396a6a72f539163c216809e54a06ecd3b96) ) @@ -2836,7 +2836,7 @@ ROM_END ROM_START( bubblemj ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("e21-11.20", 0x000000, 0x080000, CRC(df0eeae4) SHA1(4cc8d350da881947c1b9c4e0b8fbe220494f6c38) ) + ROM_LOAD32_BYTE("e21-11.20", 0x000000, 0x080000, CRC(df0eeae4) SHA1(4cc8d350da881947c1b9c4e0b8fbe220494f6c38) ) ROM_LOAD32_BYTE("e21-10.19", 0x000001, 0x080000, CRC(cdfb58f6) SHA1(70d2b8228ab4ddd572fe2ee53c1b7205b66ef6a3) ) ROM_LOAD32_BYTE("e21-09.18", 0x000002, 0x080000, CRC(6c305f17) SHA1(c4118722d697ccf54b43626a47673892a6c2caaf) ) ROM_LOAD32_BYTE("e21-08.17", 0x000003, 0x080000, CRC(27381ae2) SHA1(29b5d4bafa4ac02d35cb3ed7b7461e749ef2d6d6) ) @@ -2863,7 +2863,7 @@ ROM_END ROM_START( cleopatr ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("e28-10.bin", 0x000000, 0x80000, CRC(013fbc39) SHA1(d36ac44609b88e1da35c98dda381042e0112ea00) ) + ROM_LOAD32_BYTE("e28-10.bin", 0x000000, 0x80000, CRC(013fbc39) SHA1(d36ac44609b88e1da35c98dda381042e0112ea00) ) ROM_LOAD32_BYTE("e28-09.bin", 0x000001, 0x80000, CRC(1c48a1f9) SHA1(791d321c03073cdd0269b970f926897446d2a6fb) ) ROM_LOAD32_BYTE("e28-08.bin", 0x000002, 0x80000, CRC(7564f199) SHA1(ec4b19edb0660ad478f6c0ec27d701368696a2e4) ) ROM_LOAD32_BYTE("e28-07.bin", 0x000003, 0x80000, CRC(a507797b) SHA1(6fa04091df1fa8c08f03b1ee378b4ec4a6ef7f51) ) @@ -2889,7 +2889,7 @@ ROM_END ROM_START( pbobble3 ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("e29-12.rom", 0x000000, 0x80000, CRC(9eb19a00) SHA1(5a6417e4377070f9f01110dc6d513d0de01cff1e) ) + ROM_LOAD32_BYTE("e29-12.rom", 0x000000, 0x80000, CRC(9eb19a00) SHA1(5a6417e4377070f9f01110dc6d513d0de01cff1e) ) ROM_LOAD32_BYTE("e29-11.rom", 0x000001, 0x80000, CRC(e54ada97) SHA1(325e2bc7156656cc262989910dde07a1746cf790) ) ROM_LOAD32_BYTE("e29-10.rom", 0x000002, 0x80000, CRC(1502a122) SHA1(cb981a4578aa30276c491a0ef47f5e05c05d8b28) ) ROM_LOAD32_BYTE("e29-16.rom", 0x000003, 0x80000, CRC(aac293da) SHA1(2188d1abe6aeefa872cf16db40999574497d982e) ) @@ -2918,7 +2918,7 @@ ROM_END ROM_START( pbobble3u ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("e29-12.rom", 0x000000, 0x80000, CRC(9eb19a00) SHA1(5a6417e4377070f9f01110dc6d513d0de01cff1e) ) + ROM_LOAD32_BYTE("e29-12.rom", 0x000000, 0x80000, CRC(9eb19a00) SHA1(5a6417e4377070f9f01110dc6d513d0de01cff1e) ) ROM_LOAD32_BYTE("e29-11.rom", 0x000001, 0x80000, CRC(e54ada97) SHA1(325e2bc7156656cc262989910dde07a1746cf790) ) ROM_LOAD32_BYTE("e29-10.rom", 0x000002, 0x80000, CRC(1502a122) SHA1(cb981a4578aa30276c491a0ef47f5e05c05d8b28) ) ROM_LOAD32_BYTE("e29-15.bin", 0x000003, 0x80000, CRC(ddc5a34c) SHA1(f38c99ac33b199b3ed99a84c67984f23a864e5d4) ) @@ -2947,7 +2947,7 @@ ROM_END ROM_START( pbobble3j ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("e29-12.rom", 0x000000, 0x80000, CRC(9eb19a00) SHA1(5a6417e4377070f9f01110dc6d513d0de01cff1e) ) + ROM_LOAD32_BYTE("e29-12.rom", 0x000000, 0x80000, CRC(9eb19a00) SHA1(5a6417e4377070f9f01110dc6d513d0de01cff1e) ) ROM_LOAD32_BYTE("e29-11.rom", 0x000001, 0x80000, CRC(e54ada97) SHA1(325e2bc7156656cc262989910dde07a1746cf790) ) ROM_LOAD32_BYTE("e29-10.rom", 0x000002, 0x80000, CRC(1502a122) SHA1(cb981a4578aa30276c491a0ef47f5e05c05d8b28) ) ROM_LOAD32_BYTE("e29-09.bin", 0x000003, 0x80000, CRC(44ccf2f6) SHA1(60877525feaa992b1b374acfb5c16439e5f32161) ) @@ -2976,7 +2976,7 @@ ROM_END ROM_START( arkretrn ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("e36-11", 0x000000, 0x040000, CRC(b50cfb92) SHA1(dac69fc9ef03315b11bb94d19e3dfdc8867b08ed) ) + ROM_LOAD32_BYTE("e36-11", 0x000000, 0x040000, CRC(b50cfb92) SHA1(dac69fc9ef03315b11bb94d19e3dfdc8867b08ed) ) ROM_LOAD32_BYTE("e36-10", 0x000001, 0x040000, CRC(c940dba1) SHA1(ec87c9e4250f8b2f15094681a4783bca8c68f576) ) ROM_LOAD32_BYTE("e36-09", 0x000002, 0x040000, CRC(f16985e0) SHA1(a74cfee8f958e7a32354d4353eeb199a7fb1ce64) ) ROM_LOAD32_BYTE("e36-08", 0x000003, 0x040000, CRC(aa699e1b) SHA1(6bde0759940e0f238e4fa5bd228115574ff927d8) ) @@ -3010,7 +3010,7 @@ ROM_END ROM_START( kirameki ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("e44-19.20", 0x000000, 0x80000, CRC(2f3b239a) SHA1(fb79955eba377d429ece04553251146b406143b1) ) + ROM_LOAD32_BYTE("e44-19.20", 0x000000, 0x80000, CRC(2f3b239a) SHA1(fb79955eba377d429ece04553251146b406143b1) ) ROM_LOAD32_BYTE("e44-18.19", 0x000001, 0x80000, CRC(3137c8bc) SHA1(5f5cb47e214fe116cf985e847fa8340cf2ea5a64) ) ROM_LOAD32_BYTE("e44-17.18", 0x000002, 0x80000, CRC(5905cd20) SHA1(52545622d3c7a31a9e95ab48e7251f1eae2c25b4) ) ROM_LOAD32_BYTE("e44-16.17", 0x000003, 0x80000, CRC(5e9ac3fd) SHA1(3c45707d0d260961df99249978c7e8f51dd1720e) ) @@ -3045,7 +3045,7 @@ ROM_END ROM_START( puchicar ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("e46-16", 0x000000, 0x80000, CRC(cf2accdf) SHA1(b1e9808299a3c68c939009275108ee76cd7f5749) ) + ROM_LOAD32_BYTE("e46-16", 0x000000, 0x80000, CRC(cf2accdf) SHA1(b1e9808299a3c68c939009275108ee76cd7f5749) ) ROM_LOAD32_BYTE("e46-15", 0x000001, 0x80000, CRC(c32c6ed8) SHA1(b0c4cca836e6957ecabdaddff23439f9d038a161) ) ROM_LOAD32_BYTE("e46-14", 0x000002, 0x80000, CRC(a154c300) SHA1(177d9f3514f1e59a1036b979d2ab969249f519ca) ) ROM_LOAD32_BYTE("e46-18", 0x000003, 0x80000, CRC(396e3122) SHA1(1000bfe22f783f7121a261d37551bde5687fff8b) ) @@ -3085,7 +3085,7 @@ ROM_END ROM_START( puchicarj ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("e46-16", 0x000000, 0x80000, CRC(cf2accdf) SHA1(b1e9808299a3c68c939009275108ee76cd7f5749) ) + ROM_LOAD32_BYTE("e46-16", 0x000000, 0x80000, CRC(cf2accdf) SHA1(b1e9808299a3c68c939009275108ee76cd7f5749) ) ROM_LOAD32_BYTE("e46-15", 0x000001, 0x80000, CRC(c32c6ed8) SHA1(b0c4cca836e6957ecabdaddff23439f9d038a161) ) ROM_LOAD32_BYTE("e46-14", 0x000002, 0x80000, CRC(a154c300) SHA1(177d9f3514f1e59a1036b979d2ab969249f519ca) ) ROM_LOAD32_BYTE("e46.13", 0x000003, 0x80000, CRC(59fbdf3a) SHA1(4499a7579907e8e1d8ca2c29e8e8d12185e8fe4d) ) @@ -3125,7 +3125,7 @@ ROM_END ROM_START( pbobble4 ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("e49-12.20", 0x000000, 0x80000, CRC(fffea203) SHA1(6351209c78099f270c8d8c8aa4a2dd9ce126c4ed) ) + ROM_LOAD32_BYTE("e49-12.20", 0x000000, 0x80000, CRC(fffea203) SHA1(6351209c78099f270c8d8c8aa4a2dd9ce126c4ed) ) ROM_LOAD32_BYTE("e49-11.19", 0x000001, 0x80000, CRC(bf69a087) SHA1(2acbdb7faf5bdb1d9b5b9506c0b6f02fedcbd6a5) ) ROM_LOAD32_BYTE("e49-10.18", 0x000002, 0x80000, CRC(0307460b) SHA1(7ad9c6e5d319d6727444ffd14a87c6885445cee0) ) ROM_LOAD32_BYTE("e49-16.17", 0x000003, 0x80000, CRC(0a021624) SHA1(21a948f9f4adce0aaf76292f419a7c289f265d30) ) @@ -3161,7 +3161,7 @@ ROM_END ROM_START( pbobble4j ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("e49-12.20", 0x000000, 0x80000, CRC(fffea203) SHA1(6351209c78099f270c8d8c8aa4a2dd9ce126c4ed) ) + ROM_LOAD32_BYTE("e49-12.20", 0x000000, 0x80000, CRC(fffea203) SHA1(6351209c78099f270c8d8c8aa4a2dd9ce126c4ed) ) ROM_LOAD32_BYTE("e49-11.19", 0x000001, 0x80000, CRC(bf69a087) SHA1(2acbdb7faf5bdb1d9b5b9506c0b6f02fedcbd6a5) ) ROM_LOAD32_BYTE("e49-10.18", 0x000002, 0x80000, CRC(0307460b) SHA1(7ad9c6e5d319d6727444ffd14a87c6885445cee0) ) ROM_LOAD32_BYTE("e49-09.17", 0x000003, 0x80000, CRC(e40c7708) SHA1(0a8e973bb1d8c6dea9124d2742d354c6f20c08ee) ) @@ -3197,7 +3197,7 @@ ROM_END ROM_START( pbobble4u ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("e49-12.20", 0x000000, 0x80000, CRC(fffea203) SHA1(6351209c78099f270c8d8c8aa4a2dd9ce126c4ed) ) + ROM_LOAD32_BYTE("e49-12.20", 0x000000, 0x80000, CRC(fffea203) SHA1(6351209c78099f270c8d8c8aa4a2dd9ce126c4ed) ) ROM_LOAD32_BYTE("e49-11.19", 0x000001, 0x80000, CRC(bf69a087) SHA1(2acbdb7faf5bdb1d9b5b9506c0b6f02fedcbd6a5) ) ROM_LOAD32_BYTE("e49-10.18", 0x000002, 0x80000, CRC(0307460b) SHA1(7ad9c6e5d319d6727444ffd14a87c6885445cee0) ) ROM_LOAD32_BYTE("e49-15.17", 0x000003, 0x80000, CRC(7d0526b2) SHA1(1b769f735735e9135418ff26c020d8ac7f62d857) ) @@ -3233,7 +3233,7 @@ ROM_END ROM_START( popnpopj ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("e51-12.20", 0x000000, 0x80000, CRC(86a237d5) SHA1(4b87a51705a4d831b21ee770af17310c6c091c2e) ) + ROM_LOAD32_BYTE("e51-12.20", 0x000000, 0x80000, CRC(86a237d5) SHA1(4b87a51705a4d831b21ee770af17310c6c091c2e) ) ROM_LOAD32_BYTE("e51-11.19", 0x000001, 0x80000, CRC(8a49f34f) SHA1(8691fbc1e96f0c9eb550dbb8ae8d7ef371397166) ) ROM_LOAD32_BYTE("e51-10.18", 0x000002, 0x80000, CRC(4bce68f8) SHA1(1a9220926f4d8db509f4ccbf318d123f34c42153) ) ROM_LOAD32_BYTE("e51-09.17", 0x000003, 0x80000, CRC(4a086017) SHA1(edec4120b3d96a179f12949bd261b97d41351cab) ) @@ -3268,7 +3268,7 @@ ROM_END ROM_START( popnpop ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("e51-12.20", 0x000000, 0x80000, CRC(86a237d5) SHA1(4b87a51705a4d831b21ee770af17310c6c091c2e) ) + ROM_LOAD32_BYTE("e51-12.20", 0x000000, 0x80000, CRC(86a237d5) SHA1(4b87a51705a4d831b21ee770af17310c6c091c2e) ) ROM_LOAD32_BYTE("e51-11.19", 0x000001, 0x80000, CRC(8a49f34f) SHA1(8691fbc1e96f0c9eb550dbb8ae8d7ef371397166) ) ROM_LOAD32_BYTE("e51-10.18", 0x000002, 0x80000, CRC(4bce68f8) SHA1(1a9220926f4d8db509f4ccbf318d123f34c42153) ) ROM_LOAD32_BYTE("e51-16.17", 0x000003, 0x80000, CRC(2a9d8e0f) SHA1(a5363a98f03cbc7b5f7c393b21062730bd6ee2a8) ) @@ -3303,7 +3303,7 @@ ROM_END ROM_START( popnpopu ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("e51-12.20", 0x000000, 0x80000, CRC(86a237d5) SHA1(4b87a51705a4d831b21ee770af17310c6c091c2e) ) + ROM_LOAD32_BYTE("e51-12.20", 0x000000, 0x80000, CRC(86a237d5) SHA1(4b87a51705a4d831b21ee770af17310c6c091c2e) ) ROM_LOAD32_BYTE("e51-11.19", 0x000001, 0x80000, CRC(8a49f34f) SHA1(8691fbc1e96f0c9eb550dbb8ae8d7ef371397166) ) ROM_LOAD32_BYTE("e51-10.18", 0x000002, 0x80000, CRC(4bce68f8) SHA1(1a9220926f4d8db509f4ccbf318d123f34c42153) ) ROM_LOAD32_BYTE("e51-15.17", 0x000003, 0x80000, CRC(1ad77903) SHA1(d5e631d70108d1f15bcfcacde914ac2fb95cb102) ) @@ -3380,7 +3380,7 @@ Notes: ROM_START( landmakr ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("e61-13.20", 0x000000, 0x80000, CRC(0af756a2) SHA1(2dadac6873f2491ee77703f07f00dde2aa909355) ) + ROM_LOAD32_BYTE("e61-13.20", 0x000000, 0x80000, CRC(0af756a2) SHA1(2dadac6873f2491ee77703f07f00dde2aa909355) ) ROM_LOAD32_BYTE("e61-12.19", 0x000001, 0x80000, CRC(636b3df9) SHA1(78a5bf4977bb90d710942188ce5016f3df499feb) ) ROM_LOAD32_BYTE("e61-11.18", 0x000002, 0x80000, CRC(279a0ee4) SHA1(08380286737b33db76a79b27d0df5faba17dfb96) ) ROM_LOAD32_BYTE("e61-10.17", 0x000003, 0x80000, CRC(daabf2b2) SHA1(dbfbe38841fc2f937052353eff1202790d364b9f) ) @@ -3410,7 +3410,7 @@ ROM_END ROM_START( landmakrp ) ROM_REGION(0x200000, "maincpu", 0) /* 68020 code */ - ROM_LOAD32_BYTE("mpro-3.60", 0x000000, 0x80000, CRC(f92eccd0) SHA1(88e836390be1ca08c578080662d17007a9e0bcc3) ) + ROM_LOAD32_BYTE("mpro-3.60", 0x000000, 0x80000, CRC(f92eccd0) SHA1(88e836390be1ca08c578080662d17007a9e0bcc3) ) ROM_LOAD32_BYTE("mpro-2.61", 0x000001, 0x80000, CRC(5a26c9e0) SHA1(e7f09722f6b7a459248c2c8ad0a2695365cc78dc) ) ROM_LOAD32_BYTE("mpro-1.62", 0x000002, 0x80000, CRC(710776a8) SHA1(669aa086e7a5faedd90407e558c01bf5f0869790) ) ROM_LOAD32_BYTE("mpro-0.63", 0x000003, 0x80000, CRC(bc71dd2f) SHA1(ec0d07f9729a53737975547066bd1221f78563c5) ) diff --git a/src/mame/drivers/taito_h.c b/src/mame/drivers/taito_h.c index 559b085f818..0b55a5610d8 100644 --- a/src/mame/drivers/taito_h.c +++ b/src/mame/drivers/taito_h.c @@ -310,8 +310,8 @@ static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0xe201, 0xe201) AM_READWRITE(taitosound_slave_comm_r, taitosound_slave_comm_w) AM_RANGE(0xe400, 0xe403) AM_WRITENOP /* pan control */ AM_RANGE(0xea00, 0xea00) AM_READNOP - AM_RANGE(0xee00, 0xee00) AM_WRITENOP /* ? */ - AM_RANGE(0xf000, 0xf000) AM_WRITENOP /* ? */ + AM_RANGE(0xee00, 0xee00) AM_WRITENOP /* ? */ + AM_RANGE(0xf000, 0xf000) AM_WRITENOP /* ? */ AM_RANGE(0xf200, 0xf200) AM_WRITE(sound_bankswitch_w) ADDRESS_MAP_END diff --git a/src/mame/drivers/taito_l.c b/src/mame/drivers/taito_l.c index 5f46de997af..8daf131a8b0 100644 --- a/src/mame/drivers/taito_l.c +++ b/src/mame/drivers/taito_l.c @@ -645,7 +645,7 @@ static READ8_HANDLER( horshoes_trackx_hi_r ) #define COMMON_BANKS_MAP \ AM_RANGE(0x0000, 0x5fff) AM_ROM \ - AM_RANGE(0x6000, 0x7fff) AM_ROMBANK("bank1") \ + AM_RANGE(0x6000, 0x7fff) AM_ROMBANK("bank1") \ AM_RANGE(0xc000, 0xcfff) AM_ROMBANK("bank2") AM_WRITE(bank0_w) \ AM_RANGE(0xd000, 0xdfff) AM_ROMBANK("bank3") AM_WRITE(bank1_w) \ AM_RANGE(0xe000, 0xefff) AM_ROMBANK("bank4") AM_WRITE(bank2_w) \ @@ -1019,7 +1019,7 @@ static INPUT_PORTS_START( champwr ) PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_START("IN0") + PORT_START("IN0") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 ) diff --git a/src/mame/drivers/taito_o.c b/src/mame/drivers/taito_o.c index 6df9a48ac5b..58521bae290 100644 --- a/src/mame/drivers/taito_o.c +++ b/src/mame/drivers/taito_o.c @@ -281,4 +281,4 @@ ROM_START( parentj ) ROM_LOAD( "ampal22v10a-0233.c42", 0x000, 0x2dd, CRC(0c030a81) SHA1(0f8198df2cb046683d2db9ac8e609cdff53083ed) ) ROM_END -GAME( 1989, parentj, 0, parentj, parentj, 0, ROT0, "Taito", "Parent Jack", GAME_NOT_WORKING) +GAME( 1989, parentj, 0, parentj, parentj, 0, ROT0, "Taito", "Parent Jack", GAME_NOT_WORKING) diff --git a/src/mame/drivers/taito_z.c b/src/mame/drivers/taito_z.c index f778b87eb11..f9dfc837cdf 100644 --- a/src/mame/drivers/taito_z.c +++ b/src/mame/drivers/taito_z.c @@ -1252,7 +1252,7 @@ static READ16_HANDLER( sci_steer_input_r ) case 0x04: return (steer & 0xff); - case 0x05: + case 0x05: return (steer & 0xff00) >> 8; } diff --git a/src/mame/drivers/taitoair.c b/src/mame/drivers/taitoair.c index df6dfd0f7a2..c139d2e2c5d 100644 --- a/src/mame/drivers/taitoair.c +++ b/src/mame/drivers/taitoair.c @@ -380,8 +380,8 @@ static ADDRESS_MAP_START( airsys_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x000000, 0x0bffff) AM_ROM AM_RANGE(0x0c0000, 0x0cffff) AM_RAM AM_BASE(&taitoh_68000_mainram) AM_RANGE(0x140000, 0x140001) AM_WRITE(system_control_w) /* Pause the TMS32025 */ - AM_RANGE(0x180000, 0x183fff) AM_RAM /* "gradiation ram (0)" */ - AM_RANGE(0x184000, 0x187fff) AM_RAM /* "gradiation ram (1)" */ + AM_RANGE(0x180000, 0x183fff) AM_RAM /* "gradiation ram (0)" */ + AM_RANGE(0x184000, 0x187fff) AM_RAM /* "gradiation ram (1)" */ AM_RANGE(0x188000, 0x18bfff) AM_RAM_WRITE(airsys_paletteram16_w) AM_BASE_GENERIC(paletteram) AM_RANGE(0x800000, 0x820fff) AM_READWRITE(TC0080VCO_word_r, TC0080VCO_word_w) /* tilemaps, sprites */ AM_RANGE(0x908000, 0x90ffff) AM_RAM AM_BASE(&taitoair_line_ram) /* "line ram" */ @@ -405,8 +405,8 @@ static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0xe201, 0xe201) AM_READWRITE(taitosound_slave_comm_r, taitosound_slave_comm_w) AM_RANGE(0xe400, 0xe403) AM_WRITENOP /* pan control */ AM_RANGE(0xea00, 0xea00) AM_READNOP - AM_RANGE(0xee00, 0xee00) AM_WRITENOP /* ? */ - AM_RANGE(0xf000, 0xf000) AM_WRITENOP /* ? */ + AM_RANGE(0xee00, 0xee00) AM_WRITENOP /* ? */ + AM_RANGE(0xf000, 0xf000) AM_WRITENOP /* ? */ AM_RANGE(0xf200, 0xf200) AM_WRITE(sound_bankswitch_w) ADDRESS_MAP_END diff --git a/src/mame/drivers/taitojc.c b/src/mame/drivers/taitojc.c index 3609c6120e0..36808d8961f 100644 --- a/src/mame/drivers/taitojc.c +++ b/src/mame/drivers/taitojc.c @@ -1141,7 +1141,7 @@ static INPUT_PORTS_START( dendeg ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE("eeprom", eeprom_set_cs_line) PORT_START("UNUSED") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON7 ) // Horn + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON7 ) // Horn PORT_BIT( 0xfe, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_START("BUTTONS") @@ -1364,7 +1364,7 @@ static DRIVER_INIT( taitojc ) ROM_START( sidebs ) ROM_REGION(0x200000, "maincpu", 0) /* 68040 code */ - ROM_LOAD32_BYTE("e23-19.036", 0x000000, 0x80000, CRC(7b75481b) SHA1(47332e045f92b31e4f35c38e6880a7287b9a5c2c) ) + ROM_LOAD32_BYTE("e23-19.036", 0x000000, 0x80000, CRC(7b75481b) SHA1(47332e045f92b31e4f35c38e6880a7287b9a5c2c) ) ROM_LOAD32_BYTE("e23-20.037", 0x000001, 0x80000, CRC(cbd857dd) SHA1(ae33ad8b0c3559a3a9096351e9aa07782d3cb841) ) ROM_LOAD32_BYTE("e23-21.038", 0x000002, 0x80000, CRC(357f2e10) SHA1(226922f2649d9ac78d253200f5bbff4fb3ac74c8) ) ROM_LOAD32_BYTE("e23-22.039", 0x000003, 0x80000, CRC(c793ba43) SHA1(0ddbf625320968b4e18309d8e732ce4a2b9f4bce) ) @@ -1406,7 +1406,7 @@ ROM_END ROM_START( sidebs2 ) ROM_REGION(0x200000, "maincpu", 0) /* 68040 code */ - ROM_LOAD32_BYTE( "sbs2_p0.36", 0x000000, 0x80000, CRC(2dd78d09) SHA1(f0a0105c3f2827c8b55d1bc58ebeea0f71150fed) ) + ROM_LOAD32_BYTE( "sbs2_p0.36", 0x000000, 0x80000, CRC(2dd78d09) SHA1(f0a0105c3f2827c8b55d1bc58ebeea0f71150fed) ) ROM_LOAD32_BYTE( "sbs2_p1.37", 0x000001, 0x80000, CRC(befeda1d) SHA1(3171c87b0872f3206653900e3dbd210ea9beba61) ) ROM_LOAD32_BYTE( "sbs2_p2.38", 0x000002, 0x80000, CRC(ade07d7e) SHA1(a5200ea3ddbfef37d302e7cb27015b6f6aa8a7c1) ) ROM_LOAD32_BYTE( "sbs2_p3.39", 0x000003, 0x80000, CRC(94e943d6) SHA1(2bc7332526b969e5084b9d73063f1c0d18ec5181) ) @@ -1472,7 +1472,7 @@ ROM_END ROM_START( sidebs2j ) ROM_REGION(0x200000, "maincpu", 0) /* 68040 code */ - ROM_LOAD32_BYTE( "e38-23.36", 0x000000, 0x80000, CRC(b3d8e2d9) SHA1(6de6a51c3d9ace532fa03517bab93101b5a3eaae) ) + ROM_LOAD32_BYTE( "e38-23.36", 0x000000, 0x80000, CRC(b3d8e2d9) SHA1(6de6a51c3d9ace532fa03517bab93101b5a3eaae) ) ROM_LOAD32_BYTE( "e38-24.37", 0x000001, 0x80000, CRC(2a47d80d) SHA1(41b889e4a1397c7f0d4f6ef136ed8abfd7e1ed86) ) ROM_LOAD32_BYTE( "e38-25.38", 0x000002, 0x80000, CRC(f1a8a4df) SHA1(e4cf75969fb0503df2290522194b097f5cb983a3) ) ROM_LOAD32_BYTE( "e38-26.39", 0x000003, 0x80000, CRC(b550fbf2) SHA1(a0a461af7e71c6ad6468cfdee2bc7161ae31bbfb) ) @@ -1538,7 +1538,7 @@ ROM_END ROM_START( dendeg ) ROM_REGION(0x200000, "maincpu", 0) /* 68040 code */ - ROM_LOAD32_BYTE( "e35-21.036", 0x000000, 0x80000, CRC(bc70ca97) SHA1(724a24da9d6f163c26e7528ee2c15bd06f2c4382) ) + ROM_LOAD32_BYTE( "e35-21.036", 0x000000, 0x80000, CRC(bc70ca97) SHA1(724a24da9d6f163c26e7528ee2c15bd06f2c4382) ) ROM_LOAD32_BYTE( "e35-22.037", 0x000001, 0x80000, CRC(83b17de8) SHA1(538ddc16727e08e9a2a8ff6b4f030dc044993aa0) ) ROM_LOAD32_BYTE( "e35-23.038", 0x000002, 0x80000, CRC(1da4acd6) SHA1(2ce11c5f37287526bb1d39185f793d79fc73d5b5) ) ROM_LOAD32_BYTE( "e35-24.039", 0x000003, 0x80000, CRC(0318afb0) SHA1(9c86330c85536fb1a093ed40610b1c3ddb7813c3) ) @@ -1547,7 +1547,7 @@ ROM_START( dendeg ) ROM_LOAD16_BYTE( "e35-25.030", 0x100001, 0x040000, CRC(8104de13) SHA1(e518fbaf91704cf5cb8ffbb4833e3adba8c18658) ) ROM_LOAD16_BYTE( "e35-26.031", 0x100000, 0x040000, CRC(61821cc9) SHA1(87cd5bd3bb22c9f4ca4b6d96f75434d48418321b) ) - ROM_REGION( 0x010000, "user1", 0 ) /* MC68HC11M0 code */ + ROM_REGION( 0x010000, "user1", 0 ) /* MC68HC11M0 code */ ROM_LOAD( "e17-23.065", 0x000000, 0x010000, CRC(80ac1428) SHA1(5a2a1e60a11ecdb8743c20ddacfb61f9fd00f01c) ) ROM_REGION( 0x00080, "user2", 0 ) /* eeprom */ @@ -1585,7 +1585,7 @@ ROM_END ROM_START( dendegx ) ROM_REGION(0x200000, "maincpu", 0) /* 68040 code */ - ROM_LOAD32_BYTE( "e35-30.036", 0x000000, 0x80000, CRC(57ee0975) SHA1(c7741a7e0e9c1fdebc6b942587d7ac5a6f26f66d) )//ex + ROM_LOAD32_BYTE( "e35-30.036", 0x000000, 0x80000, CRC(57ee0975) SHA1(c7741a7e0e9c1fdebc6b942587d7ac5a6f26f66d) )//ex ROM_LOAD32_BYTE( "e35-31.037", 0x000001, 0x80000, CRC(bd5f2651) SHA1(73b760df351170ace019e4b61c82d8c6296a3632) )//ex ROM_LOAD32_BYTE( "e35-32.038", 0x000002, 0x80000, CRC(66be29d5) SHA1(e73937f5bda709a606d5cdf7316b26051317c22f) )//ex ROM_LOAD32_BYTE( "e35-33.039", 0x000003, 0x80000, CRC(76a6bde2) SHA1(ca456ec3f0410777362e3eb977ae156866271bd5) )//ex @@ -1632,7 +1632,7 @@ ROM_END ROM_START( dendeg2 ) ROM_REGION(0x200000, "maincpu", 0) /* 68040 code */ - ROM_LOAD32_BYTE( "e52-25-1.036", 0x000000, 0x80000, CRC(fadf5b4c) SHA1(48f3e1425bb9552d472a2720e1c9a752db2b43ed) ) + ROM_LOAD32_BYTE( "e52-25-1.036", 0x000000, 0x80000, CRC(fadf5b4c) SHA1(48f3e1425bb9552d472a2720e1c9a752db2b43ed) ) ROM_LOAD32_BYTE( "e52-26-1.037", 0x000001, 0x80000, CRC(7cf5230d) SHA1(b3416886d7cfc88520f6bf378529086bf0095db5) ) ROM_LOAD32_BYTE( "e52-27-1.038", 0x000002, 0x80000, CRC(25f0d81d) SHA1(c33c3e6b1ad49b63b31a2f1227d43141faef4eab) ) ROM_LOAD32_BYTE( "e52-28-1.039", 0x000003, 0x80000, CRC(e76ff6a1) SHA1(674c00f19df034de8134d48a8c2d2e42f7eb1be7) ) @@ -1683,7 +1683,7 @@ ROM_END ROM_START( dendeg2x ) ROM_REGION(0x200000, "maincpu", 0) /* 68040 code */ - ROM_LOAD32_BYTE( "e52-35.036", 0x000000, 0x80000, CRC(d5b33eb8) SHA1(e05ad73986741827b7bbeac72af0a8324384bf6b) ) //2ex + ROM_LOAD32_BYTE( "e52-35.036", 0x000000, 0x80000, CRC(d5b33eb8) SHA1(e05ad73986741827b7bbeac72af0a8324384bf6b) ) //2ex ROM_LOAD32_BYTE( "e52-36.037", 0x000001, 0x80000, CRC(f3f3fabd) SHA1(4f88080091af2208d671c491284d992b5036908c) ) //2ex ROM_LOAD32_BYTE( "e52-37.038", 0x000002, 0x80000, CRC(65b8ef31) SHA1(b61b391b160e81715ff355aeef65026d7e4dd9af) ) //2ex ROM_LOAD32_BYTE( "e52-38.039", 0x000003, 0x80000, CRC(cf61f321) SHA1(c8493d2499afba673174b26044aca537e384916c) ) //2ex @@ -1734,7 +1734,7 @@ ROM_END ROM_START( landgear ) ROM_REGION(0x200000, "maincpu", 0) /* 68040 code */ - ROM_LOAD32_BYTE( "e17-37.36", 0x000000, 0x80000, CRC(e6dda113) SHA1(786cbfae420b6ee820a93731e59da3442245b6b8) ) + ROM_LOAD32_BYTE( "e17-37.36", 0x000000, 0x80000, CRC(e6dda113) SHA1(786cbfae420b6ee820a93731e59da3442245b6b8) ) ROM_LOAD32_BYTE( "e17-38.37", 0x000001, 0x80000, CRC(86fa29bd) SHA1(f711528143c042cdc4a26d9e6965a882a73f397c) ) ROM_LOAD32_BYTE( "e17-39.38", 0x000002, 0x80000, CRC(ccbbcc7b) SHA1(52d91fcaa1683d2679ed4f14ebc11dc487527898) ) ROM_LOAD32_BYTE( "e17-40.39", 0x000003, 0x80000, CRC(ce9231d2) SHA1(d2c3955d910dbd0cac95862047c58791af626722) ) @@ -1789,7 +1789,7 @@ ROM_END ROM_START( dangcurv ) ROM_REGION(0x200000, "maincpu", 0) /* 68040 code */ - ROM_LOAD32_BYTE("e09-23.036", 0x000000, 0x80000, CRC(b4cdadd6) SHA1(84bd1d055ff15afb5438cd5151abf78b0000cebc) ) + ROM_LOAD32_BYTE("e09-23.036", 0x000000, 0x80000, CRC(b4cdadd6) SHA1(84bd1d055ff15afb5438cd5151abf78b0000cebc) ) ROM_LOAD32_BYTE("e09-24.037", 0x000001, 0x80000, CRC(fb2fc795) SHA1(2f58d043ab9fc0269a5b6827009777cd7ab832fc) ) ROM_LOAD32_BYTE("e09-25.038", 0x000002, 0x80000, CRC(aa233404) SHA1(a2b14e54eb1b5f6d4ed9f289b30ecfa654f21c87) ) ROM_LOAD32_BYTE("e09-26.039", 0x000003, 0x80000, CRC(78337271) SHA1(bd29de6a5b6db3baddecf82c3b6c8b366c64289e) ) diff --git a/src/mame/drivers/taitosj.c b/src/mame/drivers/taitosj.c index 4702eea90d5..ce00fe89ab8 100644 --- a/src/mame/drivers/taitosj.c +++ b/src/mame/drivers/taitosj.c @@ -753,7 +753,7 @@ static INPUT_PORTS_START( alpine ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_2WAY PORT_COCKTAIL PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL // "Fast" + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL // "Fast" PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) @@ -1634,9 +1634,9 @@ static INPUT_PORTS_START( kikstart ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_DIPNAME(0x18, 0x10, DEF_STR( Difficulty ) ) PORT_DIPSETTING( 0x18, DEF_STR( Easy ) ) /* 3:00 */ - PORT_DIPSETTING( 0x10, DEF_STR( Normal ) ) /* 2:30 */ + PORT_DIPSETTING( 0x10, DEF_STR( Normal ) ) /* 2:30 */ PORT_DIPSETTING( 0x08, DEF_STR( Difficult ) ) /* 2:00 */ - PORT_DIPSETTING( 0x00, DEF_STR( Very_Difficult ) ) /* 1:30 */ + PORT_DIPSETTING( 0x00, DEF_STR( Very_Difficult ) ) /* 1:30 */ PORT_SERVICE( 0x20, IP_ACTIVE_LOW ) PORT_DIPNAME( 0x40, 0x40, DEF_STR( Flip_Screen ) ) PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) diff --git a/src/mame/drivers/taitowlf.c b/src/mame/drivers/taitowlf.c index e4f7ae6a537..760e4c17832 100644 --- a/src/mame/drivers/taitowlf.c +++ b/src/mame/drivers/taitowlf.c @@ -517,7 +517,7 @@ static INPUT_PORTS_START(taitowlf) AT_KEYB_HELPER( 0x0200, "(MF2)Cursor Right", KEYCODE_RIGHT ) /* Right 6a ea */ AT_KEYB_HELPER( 0x0800, "(MF2)Cursor Down", KEYCODE_DOWN ) /* Down 6c ec */ AT_KEYB_HELPER( 0x1000, "(MF2)Page Down", KEYCODE_PGDN ) /* Page Down 6d ed */ - AT_KEYB_HELPER( 0x4000, "Del", KEYCODE_A ) /* Delete 6f ef */ + AT_KEYB_HELPER( 0x4000, "Del", KEYCODE_A ) /* Delete 6f ef */ PORT_START("pc_keyboard_7") INPUT_PORTS_END @@ -633,7 +633,7 @@ static MACHINE_DRIVER_START(taitowlf) MDRV_NVRAM_HANDLER( mc146818 ) - /* video hardware */ + /* video hardware */ MDRV_SCREEN_ADD("screen", RASTER) MDRV_SCREEN_REFRESH_RATE(60) MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) diff --git a/src/mame/drivers/tankbatt.c b/src/mame/drivers/tankbatt.c index 71a944a6db2..978518313dc 100644 --- a/src/mame/drivers/tankbatt.c +++ b/src/mame/drivers/tankbatt.c @@ -226,7 +226,7 @@ static INPUT_PORTS_START( tankbatt ) PORT_DIPNAME( 0x01, 0x01, DEF_STR( Cabinet ) ) PORT_DIPSETTING( 0x01, DEF_STR( Upright ) ) PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) ) - PORT_DIPNAME( 0x06, 0x06, DEF_STR( Coinage ) ) + PORT_DIPNAME( 0x06, 0x06, DEF_STR( Coinage ) ) PORT_DIPSETTING( 0x04, DEF_STR( 2C_1C ) ) PORT_DIPSETTING( 0x06, DEF_STR( 1C_1C ) ) PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) ) diff --git a/src/mame/drivers/tcl.c b/src/mame/drivers/tcl.c index b2862838bcc..87fab6877ac 100644 --- a/src/mame/drivers/tcl.c +++ b/src/mame/drivers/tcl.c @@ -192,13 +192,13 @@ static DRIVER_INIT(tcl) if(i&0x8000) { WRITEDEST(ROL(src[idx]^0x44,4)); // abcdefgh -> aFghaBcd - WRITEDEST(ROL(src[idx]^0x44,7)); // abcdefgh -> haBcdeFg - WRITEDEST(ROL(src[idx]^0x44,2)); // abcdefgh -> cdeFghaB - WRITEDEST((src[idx]^0x44)^0xf0); // abcdefgh -> AbCEeFgh + WRITEDEST(ROL(src[idx]^0x44,7)); // abcdefgh -> haBcdeFg + WRITEDEST(ROL(src[idx]^0x44,2)); // abcdefgh -> cdeFghaB + WRITEDEST((src[idx]^0x44)^0xf0); // abcdefgh -> AbCEeFgh } else { - WRITEDEST(ROL(src[idx]^0x11,4)); // abcdefgh -> efgHabcD + WRITEDEST(ROL(src[idx]^0x11,4)); // abcdefgh -> efgHabcD WRITEDEST(ROL(src[idx]^0x11,7)); // abcdefgh -> HabcDefg WRITEDEST(ROL(src[idx]^0x11,2)); // abcdefgh -> cDefgHab WRITEDEST((src[idx]^0x11)^0xf0); // abcdefgh -> ABCdefgH diff --git a/src/mame/drivers/tecmo.c b/src/mame/drivers/tecmo.c index f3f30e4f318..a145cef29d1 100644 --- a/src/mame/drivers/tecmo.c +++ b/src/mame/drivers/tecmo.c @@ -813,7 +813,7 @@ ROM_END ROM_START( rygar2 ) ROM_REGION( 0x18000, "maincpu", 0 ) - ROM_LOAD( "5p.bin", 0x00000, 0x08000, CRC(151ffc0b) SHA1(0eb877f2c68d3d1f52d7b12d0a8ad08c9932c054) ) /* code */ + ROM_LOAD( "5p.bin", 0x00000, 0x08000, CRC(151ffc0b) SHA1(0eb877f2c68d3d1f52d7b12d0a8ad08c9932c054) ) /* code */ ROM_LOAD( "cpu_5m.bin", 0x08000, 0x04000, CRC(7ac5191b) SHA1(305f39d974f906f9bc24e9fe2ca58e647925ab63) ) /* code */ ROM_LOAD( "cpu_5j.bin", 0x10000, 0x08000, CRC(ed76d606) SHA1(39c8a07e9a1f218ad088d00a2c9dfc993efafb6b) ) /* banked at f000-f7ff */ diff --git a/src/mame/drivers/tetrisp2.c b/src/mame/drivers/tetrisp2.c index 444f4103428..4775e523f32 100644 --- a/src/mame/drivers/tetrisp2.c +++ b/src/mame/drivers/tetrisp2.c @@ -450,7 +450,7 @@ static ADDRESS_MAP_START( rockn2_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x100000, 0x103fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram) // Object RAM AM_RANGE(0x104000, 0x107fff) AM_RAM // Spare Object RAM AM_RANGE(0x108000, 0x10ffff) AM_RAM // Work RAM - AM_RANGE(0x200000, 0x23ffff) AM_READWRITE8(tetrisp2_priority_r, rockn_priority_w, 0x00ff) // Priority + AM_RANGE(0x200000, 0x23ffff) AM_READWRITE8(tetrisp2_priority_r, rockn_priority_w, 0x00ff) // Priority AM_RANGE(0x300000, 0x31ffff) AM_RAM_WRITE(tetrisp2_palette_w) AM_BASE_GENERIC(paletteram) // Palette AM_RANGE(0x500000, 0x50ffff) AM_RAM // Line AM_RANGE(0x600000, 0x60ffff) AM_RAM_WRITE(tetrisp2_vram_rot_w) AM_BASE(&tetrisp2_vram_rot) // Rotation @@ -484,7 +484,7 @@ static ADDRESS_MAP_START( rocknms_main_map, ADDRESS_SPACE_PROGRAM, 16 ) AM_RANGE(0x100000, 0x103fff) AM_RAM AM_BASE_SIZE_GENERIC(spriteram) // Object RAM AM_RANGE(0x104000, 0x107fff) AM_RAM // Spare Object RAM AM_RANGE(0x108000, 0x10ffff) AM_RAM // Work RAM - AM_RANGE(0x200000, 0x23ffff) AM_READWRITE8(tetrisp2_priority_r, rockn_priority_w, 0x00ff) // Priority + AM_RANGE(0x200000, 0x23ffff) AM_READWRITE8(tetrisp2_priority_r, rockn_priority_w, 0x00ff) // Priority AM_RANGE(0x300000, 0x31ffff) AM_RAM_WRITE(tetrisp2_palette_w) AM_BASE_GENERIC(paletteram) // Palette // AM_RANGE(0x500000, 0x50ffff) AM_RAM // Line AM_RANGE(0x600000, 0x60ffff) AM_RAM_WRITE(tetrisp2_vram_rot_w) AM_BASE(&tetrisp2_vram_rot) // Rotation @@ -1442,7 +1442,7 @@ ROM_START( nndmseal ) ROM_LOAD16_BYTE( "1.1", 0x00000, 0x40000, CRC(45acea25) SHA1(f2f2e78be261c3d8c0145a639bc3771f0588401d) ) // 1xxxxxxxxxxxxxxxxx = 0xFF ROM_LOAD16_BYTE( "3.3", 0x00001, 0x40000, CRC(0754d96a) SHA1(1da44994e8bcfd8832755e298c0125b38cfdd16e) ) // 1xxxxxxxxxxxxxxxxx = 0xFF - ROM_REGION( 0x100000, "gfx1", ROMREGION_ERASE ) /* 8x8x8 (Sprites) */ + ROM_REGION( 0x100000, "gfx1", ROMREGION_ERASE ) /* 8x8x8 (Sprites) */ /* This game doesn't use sprites, but the region needs to be a valid size for at least one sprite 'page' for the init to work. */ ROM_REGION( 0x400000, "gfx2", 0 ) // 16x16x8 (Background) @@ -1750,7 +1750,7 @@ ROM_START( rockn4 ) /* Prototype */ ROM_REGION( 0x7000000, "ymz", 0 ) /* Samples */ ROM_LOAD( "sound00", 0x0000000, 0x0400000, CRC(918ea8eb) SHA1(0cd82859634635b6ce49db36fb91ed3365a101eb) ) // COMMON AREA - ROM_FILL( 0x0400000, 0x0c00000, 0xff ) // BANK AREA + ROM_FILL( 0x0400000, 0x0c00000, 0xff ) // BANK AREA ROM_LOAD( "sound01", 0x1000000, 0x0400000, CRC(c548e51e) SHA1(4fe1e35c9ed4366dce98b4f4c00f94e202ef15dc) ) // bank 0 ROM_LOAD( "sound02", 0x1400000, 0x0400000, CRC(ffda0253) SHA1(9b8ae98accc2f72a1cd881086f89e647e4904ad9) ) // bank 0 ROM_LOAD( "sound03", 0x1800000, 0x0400000, CRC(1f813af5) SHA1(a72d842e39b9fc955a2fc6721673b34b1b591e4a) ) // bank 0 @@ -1799,7 +1799,7 @@ ROM_START( rocknms ) ROM_REGION( 0x7000000, "ymz", 0 ) /* Samples */ ROM_LOAD( "sound00", 0x0000000, 0x0400000, CRC(8bafae71) SHA1(db74accd4bc1bfeb4a3341a0fd572b81287f1278) ) // COMMON AREA - ROM_FILL( 0x0400000, 0x0c00000, 0xff ) // BANK AREA + ROM_FILL( 0x0400000, 0x0c00000, 0xff ) // BANK AREA ROM_LOAD( "sound01", 0x1000000, 0x0400000, CRC(eec0589b) SHA1(f54c1c7e7741100a1398ebd45aef4755171d9965) ) // bank 0 ROM_LOAD( "sound02", 0x1400000, 0x0400000, CRC(564aa972) SHA1(b19e960fd79647e5bcca509982c9887decb92bc6) ) // bank 0 ROM_LOAD( "sound03", 0x1800000, 0x0400000, CRC(940302d0) SHA1(b28c2bb1a9b8cea0b6963ffa5d3ac26d90b0bffc) ) // bank 0 diff --git a/src/mame/drivers/thedeep.c b/src/mame/drivers/thedeep.c index b6be8d7c718..600b956f792 100644 --- a/src/mame/drivers/thedeep.c +++ b/src/mame/drivers/thedeep.c @@ -356,7 +356,7 @@ static MACHINE_DRIVER_START( thedeep ) MDRV_CPU_PROGRAM_MAP(main_map) MDRV_CPU_VBLANK_INT_HACK(thedeep_interrupt,2) /* IRQ by MCU, NMI by vblank (maskable) */ - MDRV_CPU_ADD("audiocpu", M65C02, XTAL_12MHz/8) /* verified on pcb */ + MDRV_CPU_ADD("audiocpu", M65C02, XTAL_12MHz/8) /* verified on pcb */ MDRV_CPU_PROGRAM_MAP(audio_map) /* IRQ by YM2203, NMI by when sound latch written by main cpu */ diff --git a/src/mame/drivers/thief.c b/src/mame/drivers/thief.c index 63502596446..cd81b6d82a4 100644 --- a/src/mame/drivers/thief.c +++ b/src/mame/drivers/thief.c @@ -189,7 +189,7 @@ static ADDRESS_MAP_START( io_map, ADDRESS_SPACE_IO, 8 ) AM_RANGE(0x00, 0x00) AM_WRITENOP /* watchdog */ AM_RANGE(0x10, 0x10) AM_WRITE(thief_video_control_w) AM_RANGE(0x30, 0x30) AM_WRITE(thief_input_select_w) /* 8255 */ - AM_RANGE(0x31, 0x31) AM_READ(thief_io_r) /* 8255 */ + AM_RANGE(0x31, 0x31) AM_READ(thief_io_r) /* 8255 */ AM_RANGE(0x33, 0x33) AM_DEVWRITE("samples", tape_control_w) AM_RANGE(0x40, 0x41) AM_DEVWRITE("ay1", ay8910_address_data_w) AM_RANGE(0x41, 0x41) AM_DEVREAD("ay1", ay8910_r) diff --git a/src/mame/drivers/thunderx.c b/src/mame/drivers/thunderx.c index f8449a007e9..24843d8bd2a 100644 --- a/src/mame/drivers/thunderx.c +++ b/src/mame/drivers/thunderx.c @@ -537,7 +537,7 @@ static INPUT_PORTS_START( thunderx ) KONAMI_COINAGE(DEF_STR( Free_Play ), "No Coin B") /* "No Coin B" = coins produce sound, but no effect on coin counter */ - PORT_START("DSW2") + PORT_START("DSW2") PORT_DIPNAME( 0x03, 0x02, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1,2") PORT_DIPSETTING( 0x03, "2" ) PORT_DIPSETTING( 0x02, "3" ) // factory default diff --git a/src/mame/drivers/tiamc1.c b/src/mame/drivers/tiamc1.c index e9b47590a59..cecb0ac9d79 100644 --- a/src/mame/drivers/tiamc1.c +++ b/src/mame/drivers/tiamc1.c @@ -181,7 +181,7 @@ static INPUT_PORTS_START( tiamc1 ) PORT_START("IN2") PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNUSED ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SPECIAL ) /* OUT:coin lockout */ + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SPECIAL ) /* OUT:coin lockout */ PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* OUT:game counter */ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* RAZR ??? */ PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_COIN1 ) diff --git a/src/mame/drivers/tickee.c b/src/mame/drivers/tickee.c index a19265968f5..4cc367718d5 100644 --- a/src/mame/drivers/tickee.c +++ b/src/mame/drivers/tickee.c @@ -607,8 +607,8 @@ static const ay8910_interface ay8910_interface_1 = AY8910_DEFAULT_LOADS, DEVCB_INPUT_PORT("DSW"), DEVCB_INPUT_PORT("IN1"), - DEVCB_NULL, - DEVCB_NULL + DEVCB_NULL, + DEVCB_NULL }; static const ay8910_interface ay8910_interface_2 = diff --git a/src/mame/drivers/tmaster.c b/src/mame/drivers/tmaster.c index 0161a3c75a1..21021404071 100644 --- a/src/mame/drivers/tmaster.c +++ b/src/mame/drivers/tmaster.c @@ -337,7 +337,7 @@ static void tmaster_draw(running_machine *machine) bitmap_t *bitmap; buffer = (tmaster_regs[0x02/2] >> 8) & 3; // 1 bit per layer, selects the currently displayed buffer - sw = tmaster_regs[0x04/2]; + sw = tmaster_regs[0x04/2]; sx = tmaster_regs[0x06/2]; sh = tmaster_regs[0x08/2] + 1; sy = tmaster_regs[0x0a/2]; @@ -766,8 +766,8 @@ static INPUT_PORTS_START( tmaster ) PORT_INCLUDE( microtouch ) PORT_START("COIN") - PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 ) // "M. Coin 1 Input" - PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 ) // "M. Coin 2 Input" + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 ) // "M. Coin 1 Input" + PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 ) // "M. Coin 2 Input" PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_BILL1 ) PORT_IMPULSE(2) // "DBV Input" PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_UNKNOWN ) diff --git a/src/mame/drivers/tmmjprd.c b/src/mame/drivers/tmmjprd.c index de89a097e01..daef3eb416d 100644 --- a/src/mame/drivers/tmmjprd.c +++ b/src/mame/drivers/tmmjprd.c @@ -650,7 +650,7 @@ static ADDRESS_MAP_START( tmmjprd_map, ADDRESS_SPACE_PROGRAM, 32 ) AM_RANGE(0x200160, 0x200177) AM_WRITEONLY AM_BASE( &tmmjprd_tilemap_regs[3] ) // tilemap regs4 AM_RANGE(0x200200, 0x20021b) AM_WRITEONLY AM_BASE( &tmmjprd_spriteregs ) // sprregs? // AM_RANGE(0x200300, 0x200303) AM_WRITE(tmmjprd_rombank_w) // used during rom testing, rombank/area select + something else? - AM_RANGE(0x20040c, 0x20040f) AM_WRITE(tmmjprd_brt_1_w) + AM_RANGE(0x20040c, 0x20040f) AM_WRITE(tmmjprd_brt_1_w) AM_RANGE(0x200410, 0x200413) AM_WRITE(tmmjprd_brt_2_w) // AM_RANGE(0x200500, 0x200503) AM_WRITEONLY AM_BASE( &tmmjprd_viewregs7 ) // AM_RANGE(0x200700, 0x20070f) AM_WRITE(tmmjprd_blitter_w) AM_BASE( &tmmjprd_blitterregs ) @@ -766,7 +766,7 @@ ROM_START( tmmjprd ) ROM_REGION( 0x200000, "maincpu", 0 ) ROM_LOAD32_BYTE( "p00.bin", 0x000000, 0x080000, CRC(a1efd960) SHA1(7f41ab58de32777bccbfe28e6e5a1f2dca35bb90) ) ROM_LOAD32_BYTE( "p01.bin", 0x000001, 0x080000, CRC(9c325374) SHA1(1ddf1c292fc1bcf4dcefb5d4aa3abdeb1489c020) ) - ROM_LOAD32_BYTE( "p02.bin", 0x000002, 0x080000, CRC(729a5f12) SHA1(615704d36afdceb4b1ff2e5dc34856e614181e16) ) + ROM_LOAD32_BYTE( "p02.bin", 0x000002, 0x080000, CRC(729a5f12) SHA1(615704d36afdceb4b1ff2e5dc34856e614181e16) ) ROM_LOAD32_BYTE( "p03.bin", 0x000003, 0x080000, CRC(595615ab) SHA1(aca746d74aa6e7e856eb5c9b740d884778743b27) ) ROM_REGION( 0x2000000, "gfx1", 0 ) /* Sprite Roms */ @@ -777,7 +777,7 @@ ROM_START( tmmjprd ) ROM_LOAD32_WORD( "10.bin", 0x1800002, 0x400000, CRC(5ab6af41) SHA1(e29cee23c84e17dd8dabd2ec71e622c25418646e) ) ROM_LOAD32_WORD( "11.bin", 0x0800002, 0x400000, CRC(1d1fd633) SHA1(655be5b72bb70a90d23e49512ca84d9978d87b0b) ) ROM_LOAD32_WORD( "12.bin", 0x1800000, 0x400000, CRC(5b8bb9d6) SHA1(ee93774077d8a2ddcf70869a9c2f4961219a85b4) ) - ROM_LOAD32_WORD( "13.bin", 0x0800000, 0x400000, CRC(d950df0a) SHA1(3b109341ab4ad87005113fb481b5d1ed9a82f50f) ) + ROM_LOAD32_WORD( "13.bin", 0x0800000, 0x400000, CRC(d950df0a) SHA1(3b109341ab4ad87005113fb481b5d1ed9a82f50f) ) ROM_REGION( 0x2000000, "gfx2", 0 ) /* BG Roms */ ROM_LOAD32_WORD( "40.bin", 0x0000000, 0x400000, CRC(8bedc606) SHA1(7159c8b86e8d7d5ae202c239638483ccdc7dfc25) ) @@ -798,7 +798,7 @@ ROM_START( tmpdoki ) ROM_REGION( 0x200000, "maincpu", 0 ) ROM_LOAD32_BYTE( "u70_p0.bin", 0x000000, 0x080000, CRC(c0ee1942) SHA1(0cebc3e326d84e200c2399208d810c0ac767dbb4) ) ROM_LOAD32_BYTE( "u72_p1.bin", 0x000001, 0x080000, CRC(3c1bc6f6) SHA1(7b3719d4bb52e45db793564b0ccee067fd7af4e4) ) - ROM_LOAD32_BYTE( "u71_p2.bin", 0x000002, 0x080000, CRC(f2091cce) SHA1(88c6822eb1546e914c2644264367e71fb2a82be3) ) + ROM_LOAD32_BYTE( "u71_p2.bin", 0x000002, 0x080000, CRC(f2091cce) SHA1(88c6822eb1546e914c2644264367e71fb2a82be3) ) ROM_LOAD32_BYTE( "u73_p3.bin", 0x000003, 0x080000, CRC(cca8ef13) SHA1(d5b077f3d8d38262e69d058a7d61e4563332abce) ) ROM_REGION( 0x2000000, "gfx1", 0 ) /* Sprite Roms */ @@ -809,7 +809,7 @@ ROM_START( tmpdoki ) ROM_LOAD32_WORD( "10.bin", 0x1800002, 0x400000, CRC(5ab6af41) SHA1(e29cee23c84e17dd8dabd2ec71e622c25418646e) ) ROM_LOAD32_WORD( "11.bin", 0x0800002, 0x400000, CRC(1d1fd633) SHA1(655be5b72bb70a90d23e49512ca84d9978d87b0b) ) ROM_LOAD32_WORD( "12.bin", 0x1800000, 0x400000, CRC(5b8bb9d6) SHA1(ee93774077d8a2ddcf70869a9c2f4961219a85b4) ) - ROM_LOAD32_WORD( "13.bin", 0x0800000, 0x400000, CRC(d950df0a) SHA1(3b109341ab4ad87005113fb481b5d1ed9a82f50f) ) + ROM_LOAD32_WORD( "13.bin", 0x0800000, 0x400000, CRC(d950df0a) SHA1(3b109341ab4ad87005113fb481b5d1ed9a82f50f) ) ROM_REGION( 0x2000000, "gfx2", 0 ) /* BG Roms */ ROM_LOAD32_WORD( "40.bin", 0x0000000, 0x400000, CRC(8bedc606) SHA1(7159c8b86e8d7d5ae202c239638483ccdc7dfc25) ) diff --git a/src/mame/drivers/tmnt.c b/src/mame/drivers/tmnt.c index ee7000da375..d72304be577 100644 --- a/src/mame/drivers/tmnt.c +++ b/src/mame/drivers/tmnt.c @@ -330,7 +330,7 @@ static SAMPLES_START( tmnt_decode_sample ) int val = source[2*i] + source[2*i+1] * 256; int expo = val >> 13; - val = (val >> 3) & (0x3ff); /* 10 bit, Max Amplitude 0x400 */ + val = (val >> 3) & (0x3ff); /* 10 bit, Max Amplitude 0x400 */ val -= 0x200; /* Centralize value */ val <<= (expo-3); diff --git a/src/mame/drivers/tnzs.c b/src/mame/drivers/tnzs.c index 716887855c4..630d0cabee2 100644 --- a/src/mame/drivers/tnzs.c +++ b/src/mame/drivers/tnzs.c @@ -889,7 +889,7 @@ static ADDRESS_MAP_START( jpopnics_main_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1") AM_RANGE(0xc000, 0xdfff) AM_RAM AM_BASE_MEMBER(tnzs_state, objram) AM_RANGE(0xe000, 0xefff) AM_RAM AM_SHARE("share1") /* WORK RAM (shared by the 2 z80's) */ - AM_RANGE(0xf000, 0xf1ff) AM_RAM AM_BASE_MEMBER(tnzs_state, vdcram) /* VDC RAM */ + AM_RANGE(0xf000, 0xf1ff) AM_RAM AM_BASE_MEMBER(tnzs_state, vdcram) /* VDC RAM */ AM_RANGE(0xf200, 0xf2ff) AM_RAM AM_BASE_MEMBER(tnzs_state, scrollram) /* scrolling info */ AM_RANGE(0xf300, 0xf303) AM_MIRROR(0xfc) AM_WRITEONLY AM_BASE_MEMBER(tnzs_state, objctrl) /* control registers (0x80 mirror used by Arkanoid 2) */ AM_RANGE(0xf400, 0xf400) AM_WRITEONLY AM_BASE_MEMBER(tnzs_state, bg_flag) /* enable / disable background transparency */ @@ -1441,7 +1441,7 @@ INPUT_PORTS_END static INPUT_PORTS_START( jpopnics ) /* 0xc600 (CPU1) -> 0xef0e (shared RAM) */ - PORT_START("DSWA") + PORT_START("DSWA") PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) /* code at 0x6e99 - is it ever called ? */ PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) @@ -1452,24 +1452,24 @@ static INPUT_PORTS_START( jpopnics ) PORT_DIPUNUSED( 0x80, IP_ACTIVE_LOW ) /* see notes */ /* 0xc601 (CPU1) -> 0xef0f (shared RAM) */ - PORT_START("DSWB") + PORT_START("DSWB") TAITO_DIFFICULTY PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) ) /* table at 0x2b86 */ PORT_DIPSETTING( 0x08, "50k 200k 150k+" ) PORT_DIPSETTING( 0x0c, "50k 250k 200k+" ) PORT_DIPSETTING( 0x04, "100k 300k 200k+" ) PORT_DIPSETTING( 0x00, "100k 400k 300k+" ) - PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) ) - PORT_DIPSETTING( 0x20, "2" ) - PORT_DIPSETTING( 0x30, "3" ) - PORT_DIPSETTING( 0x10, "4" ) - PORT_DIPSETTING( 0x00, "5" ) + PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) ) + PORT_DIPSETTING( 0x20, "2" ) + PORT_DIPSETTING( 0x30, "3" ) + PORT_DIPSETTING( 0x10, "4" ) + PORT_DIPSETTING( 0x00, "5" ) PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) /* code at 0x3dcc */ PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x80, DEF_STR( Allow_Continue ) ) - PORT_DIPSETTING( 0x00, DEF_STR( No ) ) - PORT_DIPSETTING( 0x80, DEF_STR( Yes ) ) + PORT_DIPNAME( 0x80, 0x80, DEF_STR( Allow_Continue ) ) + PORT_DIPSETTING( 0x00, DEF_STR( No ) ) + PORT_DIPSETTING( 0x80, DEF_STR( Yes ) ) PORT_START("IN0") PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) @@ -2562,7 +2562,7 @@ ROM_START( tnzsjo ) ROM_END ROM_START( tnzso ) - ROM_REGION( 0x30000, "maincpu", 0 ) /* 64k + bankswitch areas for the first CPU */ + ROM_REGION( 0x30000, "maincpu", 0 ) /* 64k + bankswitch areas for the first CPU */ ROM_LOAD( "u32", 0x00000, 0x08000, CRC(edf3b39e) SHA1(be221c99e50795d569611dba454c3954a259a859) ) ROM_CONTINUE( 0x18000, 0x18000 ) /* banked at 8000-bfff */ diff --git a/src/mame/drivers/toaplan1.c b/src/mame/drivers/toaplan1.c index cf800906177..e7dd8833312 100644 --- a/src/mame/drivers/toaplan1.c +++ b/src/mame/drivers/toaplan1.c @@ -373,14 +373,14 @@ ADDRESS_MAP_END PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_PLAYER(player) options PORT_8WAY \ PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_PLAYER(player) options PORT_8WAY \ PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(player) options PORT_8WAY \ - PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(player) options \ - PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(player) options \ - PORT_BIT( 0x40, IP_ACTIVE_HIGH, button3 ) PORT_PLAYER(player) options \ + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(player) options \ + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(player) options \ + PORT_BIT( 0x40, IP_ACTIVE_HIGH, button3 ) PORT_PLAYER(player) options \ PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN ) #define TOAPLAN1_SYSTEM_INPUTS \ PORT_START("SYSTEM") \ - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SERVICE1 ) \ + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SERVICE1 ) \ PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_TILT ) \ PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNKNOWN ) \ PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_COIN1 ) \ @@ -1212,7 +1212,7 @@ static GFXDECODE_START( rallybik ) GFXDECODE_END static GFXDECODE_START( outzone ) - GFXDECODE_ENTRY( "gfx1", 0x00000, vm_tilelayout, 0, 64 ) + GFXDECODE_ENTRY( "gfx1", 0x00000, vm_tilelayout, 0, 64 ) GFXDECODE_ENTRY( "gfx2", 0x00000, tilelayout, 64*16, 64 ) GFXDECODE_END diff --git a/src/mame/drivers/toaplan2.c b/src/mame/drivers/toaplan2.c index 6f9dbd534af..c971da0d0a6 100644 --- a/src/mame/drivers/toaplan2.c +++ b/src/mame/drivers/toaplan2.c @@ -925,7 +925,7 @@ static WRITE16_HANDLER( fixeight_sec_cpu_w ) } else if (mcu_data == 0xff00) { -#if 0 /* check the 37B6 code */ +#if 0 /* check the 37B6 code */ /* copy nvram data to shared ram after post is complete */ fixeight_sharedram[0] = fixeight_nvram[0]; /* Dip Switch A */ fixeight_sharedram[1] = fixeight_nvram[1]; /* Dip Switch B */ @@ -2183,7 +2183,7 @@ static INPUT_PORTS_START( ghox ) PORT_DIPSETTING( 0x0020, "2" ) PORT_DIPSETTING( 0x0000, "3" ) PORT_DIPSETTING( 0x0010, "5" ) - PORT_DIPNAME( 0x0040, 0x0000, "Invulnerability" ) PORT_DIPLOCATION("SW2:7") + PORT_DIPNAME( 0x0040, 0x0000, "Invulnerability" ) PORT_DIPLOCATION("SW2:7") PORT_DIPSETTING( 0x0000, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0040, DEF_STR( On ) ) PORT_DIPNAME( 0x0080, 0x0000, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW2:8") @@ -5121,7 +5121,7 @@ ROM_END ROM_START( batrid ) ROM_REGION( 0x200000, "maincpu", 0 ) /* Main 68k code */ ROM_LOAD16_BYTE( "prg0_europe.u22", 0x000000, 0x080000, CRC(91d3e975) SHA1(682885fc17f2424d475c282f239f42faf1aae076) ) - ROM_LOAD16_BYTE( "prg1b.u23", 0x000001, 0x080000, CRC(8e70b492) SHA1(f84f2039826ae815afb058d71c1dbd190f9d524d) ) + ROM_LOAD16_BYTE( "prg1b.u23", 0x000001, 0x080000, CRC(8e70b492) SHA1(f84f2039826ae815afb058d71c1dbd190f9d524d) ) ROM_LOAD16_BYTE( "prg2.u21" , 0x100000, 0x080000, CRC(bdaa5fbf) SHA1(abd72ac633c0c8e7b4b1d7902c0d6e014ba995fe) ) ROM_LOAD16_BYTE( "prg3.u24" , 0x100001, 0x080000, CRC(7aa9f941) SHA1(99bdbad7a96d461073b06a53c50fc57c2fd6fc6d) ) @@ -5145,7 +5145,7 @@ ROM_END ROM_START( batridu ) ROM_REGION( 0x200000, "maincpu", 0 ) /* Main 68k code */ ROM_LOAD16_BYTE( "prg0_usa.u22", 0x000000, 0x080000, CRC(2049d007) SHA1(f2a43547a6fc5083b03c1d59a85abbf6e1ce4cd9) ) - ROM_LOAD16_BYTE( "prg1b.u23", 0x000001, 0x080000, CRC(8e70b492) SHA1(f84f2039826ae815afb058d71c1dbd190f9d524d) ) + ROM_LOAD16_BYTE( "prg1b.u23", 0x000001, 0x080000, CRC(8e70b492) SHA1(f84f2039826ae815afb058d71c1dbd190f9d524d) ) ROM_LOAD16_BYTE( "prg2.u21" , 0x100000, 0x080000, CRC(bdaa5fbf) SHA1(abd72ac633c0c8e7b4b1d7902c0d6e014ba995fe) ) ROM_LOAD16_BYTE( "prg3.u24" , 0x100001, 0x080000, CRC(7aa9f941) SHA1(99bdbad7a96d461073b06a53c50fc57c2fd6fc6d) ) @@ -5169,7 +5169,7 @@ ROM_END ROM_START( batridc ) ROM_REGION( 0x200000, "maincpu", 0 ) /* Main 68k code */ ROM_LOAD16_BYTE( "prg0_china.u22", 0x000000, 0x080000, CRC(c3b91f7e) SHA1(6b2376c37808dccda296d90ccd7f577ccff4e4dc) ) - ROM_LOAD16_BYTE( "prg1b.u23", 0x000001, 0x080000, CRC(8e70b492) SHA1(f84f2039826ae815afb058d71c1dbd190f9d524d) ) + ROM_LOAD16_BYTE( "prg1b.u23", 0x000001, 0x080000, CRC(8e70b492) SHA1(f84f2039826ae815afb058d71c1dbd190f9d524d) ) ROM_LOAD16_BYTE( "prg2.u21" , 0x100000, 0x080000, CRC(bdaa5fbf) SHA1(abd72ac633c0c8e7b4b1d7902c0d6e014ba995fe) ) ROM_LOAD16_BYTE( "prg3.u24" , 0x100001, 0x080000, CRC(7aa9f941) SHA1(99bdbad7a96d461073b06a53c50fc57c2fd6fc6d) ) diff --git a/src/mame/drivers/toki.c b/src/mame/drivers/toki.c index a97f918cd17..3df5bfcf233 100644 --- a/src/mame/drivers/toki.c +++ b/src/mame/drivers/toki.c @@ -430,7 +430,7 @@ static const msm5205_interface msm5205_config = static MACHINE_DRIVER_START( toki ) /* KOYO 20.000MHz near the cpu */ /* basic machine hardware */ - MDRV_CPU_ADD("maincpu", M68000,XTAL_20MHz /2) /* verified on pcb */ + MDRV_CPU_ADD("maincpu", M68000,XTAL_20MHz /2) /* verified on pcb */ MDRV_CPU_PROGRAM_MAP(toki_map) MDRV_CPU_VBLANK_INT("screen", irq1_line_hold)/* VBL */ diff --git a/src/mame/drivers/tokyocop.c b/src/mame/drivers/tokyocop.c index 821cf40d1fd..99a922b6bb6 100644 --- a/src/mame/drivers/tokyocop.c +++ b/src/mame/drivers/tokyocop.c @@ -41,7 +41,7 @@ static MACHINE_DRIVER_START( tokyocop ) MDRV_CPU_ADD("maincpu", PENTIUM, 2000000000) /* Pentium4? */ MDRV_CPU_PROGRAM_MAP(tokyocop_map) - /* video hardware */ + /* video hardware */ MDRV_SCREEN_ADD("screen", RASTER) MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16) MDRV_SCREEN_REFRESH_RATE(60) diff --git a/src/mame/drivers/trackfld.c b/src/mame/drivers/trackfld.c index d888d330fde..c98e008eb51 100644 --- a/src/mame/drivers/trackfld.c +++ b/src/mame/drivers/trackfld.c @@ -105,10 +105,10 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x1000, 0x1000) AM_MIRROR(0x007f) AM_WRITE(watchdog_reset_w) /* AFE */ AM_RANGE(0x1080, 0x1080) AM_MIRROR(0x0078) AM_WRITE(trackfld_flipscreen_w) /* FLIP */ AM_RANGE(0x1081, 0x1081) AM_MIRROR(0x0078) AM_WRITE(konami_sh_irqtrigger_w) /* 26 */ /* cause interrupt on audio CPU */ - AM_RANGE(0x1082, 0x1082) AM_MIRROR(0x0078) AM_WRITENOP /* 25 */ + AM_RANGE(0x1082, 0x1082) AM_MIRROR(0x0078) AM_WRITENOP /* 25 */ AM_RANGE(0x1083, 0x1084) AM_MIRROR(0x0078) AM_WRITE(coin_w) /* 24, 23 */ - AM_RANGE(0x1085, 0x1085) AM_MIRROR(0x0078) AM_WRITENOP /* CN3.2 */ - AM_RANGE(0x1086, 0x1086) AM_MIRROR(0x0078) AM_WRITENOP /* CN3.4 */ + AM_RANGE(0x1085, 0x1085) AM_MIRROR(0x0078) AM_WRITENOP /* CN3.2 */ + AM_RANGE(0x1086, 0x1086) AM_MIRROR(0x0078) AM_WRITENOP /* CN3.4 */ AM_RANGE(0x1087, 0x1087) AM_MIRROR(0x0078) AM_WRITE(interrupt_enable_w) /* INT */ AM_RANGE(0x1100, 0x1100) AM_MIRROR(0x007f) AM_WRITE(soundlatch_w) /* 32 */ AM_RANGE(0x1200, 0x1200) AM_MIRROR(0x007f) AM_READ_PORT("DSW2") @@ -587,7 +587,7 @@ static INPUT_PORTS_START( reaktor ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) // probably unused PORT_START("IN1") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) // probably unused + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) // probably unused PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) // probably unused PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) // probably unused PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) // probably unused diff --git a/src/mame/drivers/triforce.c b/src/mame/drivers/triforce.c index b83784f6d06..dea4dcb0022 100644 --- a/src/mame/drivers/triforce.c +++ b/src/mame/drivers/triforce.c @@ -427,7 +427,7 @@ static MACHINE_DRIVER_START( triforce_base ) MDRV_QUANTUM_TIME(HZ(6000)) - /* video hardware */ + /* video hardware */ MDRV_SCREEN_ADD("screen", RASTER) MDRV_SCREEN_REFRESH_RATE(60) MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32) diff --git a/src/mame/drivers/tryout.c b/src/mame/drivers/tryout.c index a0da309efaa..2e22181e4d0 100644 --- a/src/mame/drivers/tryout.c +++ b/src/mame/drivers/tryout.c @@ -56,7 +56,7 @@ static WRITE8_HANDLER( tryout_sound_irq_ack_w ) static WRITE8_HANDLER( tryout_bankswitch_w ) { - UINT8 *RAM = memory_region(space->machine, "maincpu"); + UINT8 *RAM = memory_region(space->machine, "maincpu"); int bankaddress; bankaddress = 0x10000 + (data & 0x01) * 0x2000; diff --git a/src/mame/drivers/tubep.c b/src/mame/drivers/tubep.c index 29f0a0785c2..58e1600874c 100644 --- a/src/mame/drivers/tubep.c +++ b/src/mame/drivers/tubep.c @@ -214,7 +214,7 @@ static ADDRESS_MAP_START( tubep_second_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0x0000, 0x7fff) AM_ROM AM_RANGE(0xa000, 0xa000) AM_WRITE(tubep_background_a000_w) AM_RANGE(0xc000, 0xc000) AM_WRITE(tubep_background_c000_w) - AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_SHARE("share1") /* 6116 #1 */ + AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_SHARE("share1") /* 6116 #1 */ AM_RANGE(0xe800, 0xebff) AM_WRITEONLY AM_SHARE("share4") AM_BASE(&tubep_backgroundram) /* row of 8 x 2147 RAMs on main PCB */ AM_RANGE(0xf000, 0xf3ff) AM_WRITEONLY AM_SHARE("share3") /* sprites color lookup table */ AM_RANGE(0xf800, 0xffff) AM_RAM AM_SHARE("share2") /* program copies here part of shared ram ?? */ @@ -229,7 +229,7 @@ ADDRESS_MAP_END static READ8_HANDLER( tubep_soundlatch_r ) { - int res; + int res; res = sound_latch; sound_latch = 0; /* "=0" ???? or "&= 0x7f" ????? works either way */ @@ -532,7 +532,7 @@ static MACHINE_RESET( rjammer ) static READ8_HANDLER( rjammer_soundlatch_r ) { - int res = sound_latch; + int res = sound_latch; return res; } diff --git a/src/mame/drivers/tumbleb.c b/src/mame/drivers/tumbleb.c index 4e11232aeae..edab73eb9aa 100644 --- a/src/mame/drivers/tumbleb.c +++ b/src/mame/drivers/tumbleb.c @@ -366,7 +366,7 @@ static WRITE16_HANDLER( jumppop_sound_w ) static READ16_HANDLER( tumblepopb_controls_r ) { - switch (offset<<1) + switch (offset<<1) { case 0: return input_port_read(space->machine, "PLAYERS"); @@ -1964,10 +1964,10 @@ static GFXDECODE_START( tumbleb ) GFXDECODE_END static GFXDECODE_START( suprtrio ) - GFXDECODE_ENTRY( "gfx1", 0, tcharlayout, 256, 16 ) /* Characters 8x8 */ + GFXDECODE_ENTRY( "gfx1", 0, tcharlayout, 256, 16 ) /* Characters 8x8 */ GFXDECODE_ENTRY( "gfx1", 0, suprtrio_tlayout, 512, 16 ) /* Tiles 16x16 */ GFXDECODE_ENTRY( "gfx1", 0, suprtrio_tlayout, 256, 16 ) /* Tiles 16x16 */ - GFXDECODE_ENTRY( "gfx2", 0, tlayout, 0, 16 ) /* Sprites 16x16 */ + GFXDECODE_ENTRY( "gfx2", 0, tlayout, 0, 16 ) /* Sprites 16x16 */ GFXDECODE_END static GFXDECODE_START( fncywld ) @@ -2343,7 +2343,7 @@ ROM_START( tumbleb2 ) ROM_LOAD16_BYTE( "thumbpop.19", 0x00000, 0x40000, CRC(0795aab4) SHA1(85b38804446f6b0b4d8c3a59a8958d520c567a4e) ) ROM_LOAD16_BYTE( "thumbpop.18", 0x00001, 0x40000, CRC(ad58df43) SHA1(2e562bfffb42543af767dd9e82a1d2465dfcd8b8) ) - ROM_REGION( 0x100000, "gfx2", 0 ) + ROM_REGION( 0x100000, "gfx2", 0 ) ROM_LOAD( "map-01.rom", 0x00000, 0x80000, CRC(e81ffa09) SHA1(01ada9557ead91eb76cf00db118d6c432104a398) ) ROM_LOAD( "map-00.rom", 0x80000, 0x80000, CRC(8c879cfe) SHA1(a53ef7811f14a8b105749b1cf29fe8a3a33bab5e) ) @@ -2480,7 +2480,7 @@ ROM_START( pangpang ) ROM_LOAD16_BYTE( "7.bin", 0x40001, 0x20000, CRC(cd544173) SHA1(b929d771040a48356b449458d3125142b9bfc365) ) ROM_CONTINUE(0xc0001,0x20000) - ROM_REGION( 0x100000, "gfx2", 0 ) + ROM_REGION( 0x100000, "gfx2", 0 ) ROM_LOAD16_BYTE( "8.bin", 0x00000, 0x40000, CRC(ea0fa1e0) SHA1(1f2f6264097d15339782c2e399d125c3835fd852) ) ROM_LOAD16_BYTE( "9.bin", 0x00001, 0x40000, CRC(1da5fe49) SHA1(338be1a9f8c42e685e1cefb12b2d169b7560e5f7) ) ROM_LOAD16_BYTE( "4.bin", 0x80000, 0x40000, CRC(4f282eb1) SHA1(3731045a500082d37588edf7cbb0c0ebae566aab) ) diff --git a/src/mame/drivers/tumblep.c b/src/mame/drivers/tumblep.c index a8708427ac3..5bde8a25019 100644 --- a/src/mame/drivers/tumblep.c +++ b/src/mame/drivers/tumblep.c @@ -86,7 +86,7 @@ static WRITE16_HANDLER( jumppop_sound_w ) static READ16_HANDLER( tumblepop_controls_r ) { - switch (offset<<1) + switch (offset<<1) { case 0: return input_port_read(space->machine, "PLAYERS"); diff --git a/src/mame/drivers/tunhunt.c b/src/mame/drivers/tunhunt.c index 0380fe95d22..8b97333356a 100644 --- a/src/mame/drivers/tunhunt.c +++ b/src/mame/drivers/tunhunt.c @@ -380,7 +380,7 @@ ROM_START( tunhunt ) ROM_LOAD( "004.fh1", 0x6800, 0x800, CRC(4d6c920e) SHA1(2ef274356f4b8a0170a267cd6a3758b2bda693b5) ) ROM_LOAD( "005.ef1", 0x7000, 0x800, CRC(e17badf0) SHA1(6afbf517486340fe54b01fa26258877b2a8fc510) ) ROM_LOAD( "006.d1", 0x7800, 0x800, CRC(c3ae8519) SHA1(2b2e49065bc38429894ef29a29ffc60f96e64840) ) - ROM_RELOAD( 0xf800, 0x800 ) /* 6502 vectors */ + ROM_RELOAD( 0xf800, 0x800 ) /* 6502 vectors */ ROM_REGION( 0x400, "gfx1", 0 ) /* alphanumeric characters */ ROM_LOAD( "019.c10", 0x000, 0x400, CRC(d6fd45a9) SHA1(c86ea3790c29c554199af8ad6f3d563dcb7723c7) ) @@ -405,7 +405,7 @@ ROM_START( tunhuntc ) ROM_LOAD( "004.fh1", 0x6800, 0x800, CRC(4d6c920e) SHA1(2ef274356f4b8a0170a267cd6a3758b2bda693b5) ) ROM_LOAD( "005.ef1", 0x7000, 0x800, CRC(e17badf0) SHA1(6afbf517486340fe54b01fa26258877b2a8fc510) ) ROM_LOAD( "006.d1", 0x7800, 0x800, CRC(c3ae8519) SHA1(2b2e49065bc38429894ef29a29ffc60f96e64840) ) - ROM_RELOAD( 0xf800, 0x800 ) /* 6502 vectors */ + ROM_RELOAD( 0xf800, 0x800 ) /* 6502 vectors */ ROM_REGION( 0x400, "gfx1", 0 ) /* alphanumeric characters */ ROM_LOAD( "019.c10", 0x000, 0x400, CRC(d6fd45a9) SHA1(c86ea3790c29c554199af8ad6f3d563dcb7723c7) ) diff --git a/src/mame/drivers/turbo.c b/src/mame/drivers/turbo.c index a858d73ec98..c84eadbe844 100644 --- a/src/mame/drivers/turbo.c +++ b/src/mame/drivers/turbo.c @@ -773,7 +773,7 @@ static ADDRESS_MAP_START( subroc3d_map, ADDRESS_SPACE_PROGRAM, 8 ) AM_RANGE(0xa802, 0xa802) AM_MIRROR(0x07fc) AM_READ_PORT("DSW2") // INPUT 253 AM_RANGE(0xa803, 0xa803) AM_MIRROR(0x07fc) AM_READ_PORT("DSW3") // INPUT 253 AM_RANGE(0xb000, 0xb7ff) AM_RAM // SCRATCH - AM_RANGE(0xb800, 0xbfff) // HANDLE CL + AM_RANGE(0xb800, 0xbfff) // HANDLE CL AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(turbo_videoram_w) AM_BASE_MEMBER(turbo_state, videoram) // FIX PAGE AM_RANGE(0xe800, 0xe803) AM_MIRROR(0x07fc) AM_DEVREADWRITE("ppi8255_0", ppi8255_r, ppi8255_w) AM_RANGE(0xf000, 0xf003) AM_MIRROR(0x07fc) AM_DEVREADWRITE("ppi8255_1", ppi8255_r, ppi8255_w) diff --git a/src/mame/drivers/twin16.c b/src/mame/drivers/twin16.c index 941bf6f4fde..07b65438398 100644 --- a/src/mame/drivers/twin16.c +++ b/src/mame/drivers/twin16.c @@ -867,7 +867,7 @@ ROM_START( devilw ) ROM_LOAD16_BYTE( "687_l11.10r", 0x00000, 0x10000, CRC(399deee8) SHA1(dcc65e95f28ae4e9b671e70ce0bd5ba0fe178506) ) ROM_LOAD16_BYTE( "687_l10.8r", 0x00001, 0x10000, CRC(117c91ee) SHA1(dcf8efb25fc73cff916b66b7bcfd3c1fb2556a53) ) - ROM_REGION( 0x20000, "konami", 0 ) // samples + ROM_REGION( 0x20000, "konami", 0 ) // samples ROM_LOAD( "687_i01.5a", 0x00000, 0x20000, CRC(d4992dfb) SHA1(c65bef07b6adb9ab6328d679595450945dbf6a88) ) ROM_REGION( 0x20000, "upd", 0 ) // samples @@ -903,7 +903,7 @@ ROM_START( majuu ) ROM_LOAD16_BYTE( "687_l11.10r", 0x00000, 0x10000, CRC(399deee8) SHA1(dcc65e95f28ae4e9b671e70ce0bd5ba0fe178506) ) ROM_LOAD16_BYTE( "687_l10.8r", 0x00001, 0x10000, CRC(117c91ee) SHA1(dcf8efb25fc73cff916b66b7bcfd3c1fb2556a53) ) - ROM_REGION( 0x20000, "konami", 0 ) // samples + ROM_REGION( 0x20000, "konami", 0 ) // samples ROM_LOAD( "687_i01.5a", 0x00000, 0x20000, CRC(d4992dfb) SHA1(c65bef07b6adb9ab6328d679595450945dbf6a88) ) ROM_REGION( 0x20000, "upd", 0 ) // samples @@ -939,7 +939,7 @@ ROM_START( darkadv ) ROM_LOAD16_BYTE( "687_l11.10r", 0x00000, 0x10000, CRC(399deee8) SHA1(dcc65e95f28ae4e9b671e70ce0bd5ba0fe178506) ) ROM_LOAD16_BYTE( "687_l10.8r", 0x00001, 0x10000, CRC(117c91ee) SHA1(dcf8efb25fc73cff916b66b7bcfd3c1fb2556a53) ) - ROM_REGION( 0x20000, "konami", 0 ) // samples + ROM_REGION( 0x20000, "konami", 0 ) // samples ROM_LOAD( "687_i01.5a", 0x00000, 0x20000, CRC(d4992dfb) SHA1(c65bef07b6adb9ab6328d679595450945dbf6a88) ) ROM_REGION( 0x20000, "upd", 0 ) // samples @@ -973,7 +973,7 @@ ROM_START( vulcan ) ROM_REGION( 0x20000, "gfx3", ROMREGION_ERASE00 ) // tile data; mapped at 0x80000 on CPUB - ROM_REGION( 0x20000, "konami", 0 ) // samples + ROM_REGION( 0x20000, "konami", 0 ) // samples ROM_LOAD( "785_f01.5a", 0x00000, 0x20000, CRC(a0d8d69e) SHA1(2994e5740b7c099d55fb162a363a26ef1995c756) ) ROM_REGION( 0x20000, "upd", 0 ) // samples @@ -1007,7 +1007,7 @@ ROM_START( vulcana ) ROM_REGION( 0x20000, "gfx3", ROMREGION_ERASE00 ) // tile data; mapped at 0x80000 on CPUB - ROM_REGION( 0x20000, "konami", 0 ) // samples + ROM_REGION( 0x20000, "konami", 0 ) // samples ROM_LOAD( "785_f01.5a", 0x00000, 0x20000, CRC(a0d8d69e) SHA1(2994e5740b7c099d55fb162a363a26ef1995c756) ) ROM_REGION( 0x20000, "upd", 0 ) // samples @@ -1041,7 +1041,7 @@ ROM_START( vulcanb ) ROM_REGION( 0x20000, "gfx3", ROMREGION_ERASE00 ) // tile data; mapped at 0x80000 on CPUB - ROM_REGION( 0x20000, "konami", 0 ) // samples + ROM_REGION( 0x20000, "konami", 0 ) // samples ROM_LOAD( "785_f01.5a", 0x00000, 0x20000, CRC(a0d8d69e) SHA1(2994e5740b7c099d55fb162a363a26ef1995c756) ) ROM_REGION( 0x20000, "upd", 0 ) // samples @@ -1080,7 +1080,7 @@ ROM_START( gradius2 ) ROM_REGION( 0x20000, "gfx3", ROMREGION_ERASE00 ) // tile data; mapped at 0x80000 on CPUB - ROM_REGION( 0x20000, "konami", 0 ) // samples + ROM_REGION( 0x20000, "konami", 0 ) // samples ROM_LOAD( "785_f01.5a", 0x00000, 0x20000, CRC(a0d8d69e) SHA1(2994e5740b7c099d55fb162a363a26ef1995c756) ) ROM_REGION( 0x20000, "upd", 0 ) // samples @@ -1114,7 +1114,7 @@ ROM_START( gradius2a ) ROM_REGION( 0x20000, "gfx3", ROMREGION_ERASE00 ) // tile data; mapped at 0x80000 on CPUB - ROM_REGION( 0x20000, "konami", 0 ) // samples + ROM_REGION( 0x20000, "konami", 0 ) // samples ROM_LOAD( "785_f01.5a", 0x00000, 0x20000, CRC(a0d8d69e) SHA1(2994e5740b7c099d55fb162a363a26ef1995c756) ) ROM_REGION( 0x20000, "upd", 0 ) // samples @@ -1134,7 +1134,7 @@ ROM_START( gradius2b ) ROM_LOAD16_BYTE( "785_p13.10s", 0x20000, 0x10000, CRC(478fdb0a) SHA1(2e285ad6dcfc67f3e24d231e0e1be19036ce64d2) ) ROM_LOAD16_BYTE( "785_p12.8s", 0x20001, 0x10000, CRC(38ea402a) SHA1(90ff2bd71435988cde967704ce3b1401de206683) ) - ROM_REGION( 0x10000, "audiocpu", 0 ) // Z80 code (sound CPU) + ROM_REGION( 0x10000, "audiocpu", 0 ) // Z80 code (sound CPU) ROM_LOAD( "785_g03.10a", 0x00000, 0x8000, CRC(67a3b50d) SHA1(3c83f3b0df73d9361ec3cda26a6c4c603a088419) ) ROM_REGION( 0x4000, "gfx1", 0 ) @@ -1148,7 +1148,7 @@ ROM_START( gradius2b ) ROM_REGION( 0x20000, "gfx3", ROMREGION_ERASE00 ) // tile data; mapped at 0x80000 on CPUB - ROM_REGION( 0x20000, "konami", 0 ) // samples + ROM_REGION( 0x20000, "konami", 0 ) // samples ROM_LOAD( "785_f01.5a", 0x00000, 0x20000, CRC(a0d8d69e) SHA1(2994e5740b7c099d55fb162a363a26ef1995c756) ) ROM_REGION( 0x20000, "upd", 0 ) // samples @@ -1172,7 +1172,7 @@ ROM_START( fround ) ROM_LOAD16_WORD("870c16.p15", 0x100000, 0x80000, CRC(41df6a1b) SHA1(32e0fdeb53628d18adde851e4496dd01ac6ec68f) ) ROM_LOAD16_WORD("870c15.p13", 0x180000, 0x80000, CRC(8c9281df) SHA1(5e3d80be414db108d5363d0ea1b74021ba942c33) ) - ROM_REGION( 0x20000, "konami", 0 ) // samples + ROM_REGION( 0x20000, "konami", 0 ) // samples ROM_LOAD( "870_c01.5a", 0x00000, 0x20000, CRC(6af96546) SHA1(63b49b28c0f2ef8f52bc4c5955ad6a633dd553cf) ) ROM_REGION( 0x20000, "upd", 0 ) // samples @@ -1196,7 +1196,7 @@ ROM_START( froundl ) ROM_LOAD16_WORD("870c16.p15", 0x100000, 0x80000, CRC(41df6a1b) SHA1(32e0fdeb53628d18adde851e4496dd01ac6ec68f) ) ROM_LOAD16_WORD("870c15.p13", 0x180000, 0x80000, CRC(8c9281df) SHA1(5e3d80be414db108d5363d0ea1b74021ba942c33) ) - ROM_REGION( 0x20000, "konami", 0 ) // samples + ROM_REGION( 0x20000, "konami", 0 ) // samples ROM_LOAD( "870_c01.5a", 0x00000, 0x20000, CRC(6af96546) SHA1(63b49b28c0f2ef8f52bc4c5955ad6a633dd553cf) ) ROM_REGION( 0x20000, "upd", 0 ) // samples @@ -1246,7 +1246,7 @@ ROM_START( miaj ) ROM_LOAD16_BYTE("808_e13.10s", 0x20000, 0x10000, CRC(1fa708f4) SHA1(9511a19f50fb61571c2986c72d1a85e87b8d0495) ) ROM_LOAD16_BYTE("808_e12.8s", 0x20001, 0x10000, CRC(d62f1fde) SHA1(1e55084f1294b6ac7c152fcd1800511fcab5d360) ) - ROM_REGION( 0x10000, "audiocpu", 0 ) // Z80 code (sound CPU) + ROM_REGION( 0x10000, "audiocpu", 0 ) // Z80 code (sound CPU) ROM_LOAD( "808_e03.10a", 0x00000, 0x8000, CRC(3d93a7cd) SHA1(dcdd327e78f32436b276d0666f62a5b733b296e8) ) ROM_REGION( 0x4000, "gfx1", 0 ) @@ -1256,9 +1256,9 @@ ROM_START( miaj ) ROM_LOAD16_WORD("808d17.p16", 0x000000, 0x80000, CRC(d1299082) SHA1(c3c07b0517e7428ccd1cdf9e15aaf16d98e7c4cd) ) ROM_LOAD16_WORD("808d15.p13", 0x100000, 0x80000, CRC(2b22a6b6) SHA1(8e1af0627a4eac045128c4096e2cfb59c3d2f5ef) ) - ROM_REGION( 0x20000, "gfx3", ROMREGION_ERASE00 ) // tile data; mapped at 0x80000 on CPUB + ROM_REGION( 0x20000, "gfx3", ROMREGION_ERASE00 ) // tile data; mapped at 0x80000 on CPUB - ROM_REGION( 0x20000, "konami", 0 ) // samples + ROM_REGION( 0x20000, "konami", 0 ) // samples ROM_LOAD("808_d01.5a", 0x00000, 0x20000, CRC(fd4d37c0) SHA1(ef91c6e7bb57c27a9a51729fffd1bfe3e806fb61) ) ROM_REGION( 0x20000, "upd", ROMREGION_ERASE00 ) // samples @@ -1277,7 +1277,7 @@ ROM_START( cuebrickj ) ROM_LOAD16_BYTE( "903_e13.10s", 0x20000, 0x10000, CRC(4fb5fb80) SHA1(3a59dae3846341289c31aa106684ebc45488ca45) ) ROM_LOAD16_BYTE( "903_e12.8s", 0x20001, 0x10000, CRC(883e3097) SHA1(fe0fa1a2881a67223d741c400bb8c1a0c67946c1) ) - ROM_REGION( 0x10000, "audiocpu", 0 ) // Z80 code (sound CPU) + ROM_REGION( 0x10000, "audiocpu", 0 ) // Z80 code (sound CPU) ROM_LOAD( "903_d03.10a", 0x00000, 0x8000, CRC(455e855a) SHA1(cfdd54a5071862653ee94c0455301f4a7245fbd8) ) ROM_REGION( 0x4000, "gfx1", 0 ) @@ -1286,11 +1286,11 @@ ROM_START( cuebrickj ) ROM_REGION( 0x200000, "gfx2", ROMREGION_ERASE00 ) // gfx data used at runtime // unpopulated - ROM_REGION16_BE( 0x20000, "gfx3", 0 ) // tile data; mapped at 0x80000 on CPUB + ROM_REGION16_BE( 0x20000, "gfx3", 0 ) // tile data; mapped at 0x80000 on CPUB ROM_LOAD16_BYTE( "903_e11.10r", 0x00000, 0x10000, CRC(5c41faf8) SHA1(f9eee6a7b92d3b3aa4320747da6390310522a2cf) ) ROM_LOAD16_BYTE( "903_e10.8r", 0x00001, 0x10000, CRC(417576d4) SHA1(e84762743e3a1117b6ef7ea0b304877e4a719f75) ) - ROM_REGION( 0x20000, "konami", ROMREGION_ERASE00 ) // samples + ROM_REGION( 0x20000, "konami", ROMREGION_ERASE00 ) // samples // unpopulated ROM_REGION( 0x20000, "upd", ROMREGION_ERASE00 ) // samples diff --git a/src/mame/drivers/ultrsprt.c b/src/mame/drivers/ultrsprt.c index 0c8d744e194..f1b2c872dce 100644 --- a/src/mame/drivers/ultrsprt.c +++ b/src/mame/drivers/ultrsprt.c @@ -216,7 +216,7 @@ static MACHINE_DRIVER_START( ultrsprt ) MDRV_EEPROM_93C46_ADD("eeprom") MDRV_MACHINE_START(ultrsprt) - /* video hardware */ + /* video hardware */ MDRV_SCREEN_ADD("screen", RASTER) MDRV_SCREEN_REFRESH_RATE(60) MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) diff --git a/src/mame/drivers/undrfire.c b/src/mame/drivers/undrfire.c index 938391eeab9..a916eb81e37 100644 --- a/src/mame/drivers/undrfire.c +++ b/src/mame/drivers/undrfire.c @@ -280,7 +280,7 @@ static READ32_HANDLER( undrfire_input_r ) { return input_port_read(space->machine, "SYSTEM") | (coin_word << 16); } - } + } return 0xffffffff; } diff --git a/src/mame/drivers/vaportra.c b/src/mame/drivers/vaportra.c index 6326087dde0..20c122ed0cf 100644 --- a/src/mame/drivers/vaportra.c +++ b/src/mame/drivers/vaportra.c @@ -141,7 +141,7 @@ static INPUT_PORTS_START( vaportra ) PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Allow_Continue ) ) PORT_DIPSETTING( 0x0000, DEF_STR( No ) ) PORT_DIPSETTING( 0x0040, DEF_STR( Yes ) ) - PORT_DIPNAME( 0x0080, 0x0000, DEF_STR( Demo_Sounds ) ) + PORT_DIPNAME( 0x0080, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPSETTING( 0x0080, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) @@ -265,10 +265,10 @@ MACHINE_DRIVER_END ROM_START( vaportra ) ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 code */ - ROM_LOAD16_BYTE( "fl_02-1.bin", 0x00000, 0x20000, CRC(9ae36095) SHA1(c8d11a6033a44277a267915b4ca471c43acd1143) ) - ROM_LOAD16_BYTE( "fl_00-1.bin", 0x00001, 0x20000, CRC(c08cc048) SHA1(b28f95856817b8a8cb6cc588d48e95196cbf52fd) ) + ROM_LOAD16_BYTE( "fl_02-1.bin", 0x00000, 0x20000, CRC(9ae36095) SHA1(c8d11a6033a44277a267915b4ca471c43acd1143) ) + ROM_LOAD16_BYTE( "fl_00-1.bin", 0x00001, 0x20000, CRC(c08cc048) SHA1(b28f95856817b8a8cb6cc588d48e95196cbf52fd) ) ROM_LOAD16_BYTE( "fl_03.bin", 0x40000, 0x20000, CRC(80bd2844) SHA1(3fcaa409c7134388fa9458df8e8aaecc93f085e6) ) - ROM_LOAD16_BYTE( "fl_01.bin", 0x40001, 0x20000, CRC(9474b085) SHA1(5510309ddab5fbf1dbb0a7b1e424a5dff5ec263d) ) + ROM_LOAD16_BYTE( "fl_01.bin", 0x40001, 0x20000, CRC(9474b085) SHA1(5510309ddab5fbf1dbb0a7b1e424a5dff5ec263d) ) ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */ ROM_LOAD( "fj04", 0x00000, 0x10000, CRC(e9aedf9b) SHA1(f7bcf8f666015140aaad8ee5cf619636934b7066) ) @@ -278,11 +278,11 @@ ROM_START( vaportra ) ROM_REGION( 0x100000, "gfx2", 0 ) ROM_LOAD( "vtmaa02.bin", 0x000000, 0x80000, CRC(091ff98e) SHA1(814dc08c055bad5368955a4b1fe6a706b58adc02) ) /* tiles 3 */ - ROM_LOAD( "vtmaa01.bin", 0x080000, 0x80000, CRC(c217a31b) SHA1(e259d48190d6890781fb0338e17e14822876babb) ) /* tiles 2 */ + ROM_LOAD( "vtmaa01.bin", 0x080000, 0x80000, CRC(c217a31b) SHA1(e259d48190d6890781fb0338e17e14822876babb) ) /* tiles 2 */ ROM_REGION( 0x100000, "gfx3", 0 ) - ROM_LOAD( "vtmaa03.bin", 0x000000, 0x80000, CRC(1a30bf81) SHA1(00e6c713e12133a99d64ca80638c9cbc8e26b2c8) ) /* sprites */ - ROM_LOAD( "vtmaa04.bin", 0x080000, 0x80000, CRC(b713e9cc) SHA1(af33943d75d2ee3a7385f624537008dca9e1d5d8) ) + ROM_LOAD( "vtmaa03.bin", 0x000000, 0x80000, CRC(1a30bf81) SHA1(00e6c713e12133a99d64ca80638c9cbc8e26b2c8) ) /* sprites */ + ROM_LOAD( "vtmaa04.bin", 0x080000, 0x80000, CRC(b713e9cc) SHA1(af33943d75d2ee3a7385f624537008dca9e1d5d8) ) ROM_REGION( 0x40000, "oki1", 0 ) /* ADPCM samples */ ROM_LOAD( "fj06", 0x00000, 0x20000, CRC(6e98a235) SHA1(374564b4e494d03cd1330c06e321b9452c22a075) ) @@ -303,10 +303,10 @@ ROM_END ROM_START( vaportrau ) ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 code */ - ROM_LOAD16_BYTE( "fj02", 0x00000, 0x20000, CRC(a2affb73) SHA1(0d49397cc9891047a0b92e92e2e3d0e7fcaf8db9) ) - ROM_LOAD16_BYTE( "fj00", 0x00001, 0x20000, CRC(ef05e07b) SHA1(0e505709fa251e6b30f019c0c28ee9ba2b29a50a) ) + ROM_LOAD16_BYTE( "fj02", 0x00000, 0x20000, CRC(a2affb73) SHA1(0d49397cc9891047a0b92e92e2e3d0e7fcaf8db9) ) + ROM_LOAD16_BYTE( "fj00", 0x00001, 0x20000, CRC(ef05e07b) SHA1(0e505709fa251e6b30f019c0c28ee9ba2b29a50a) ) ROM_LOAD16_BYTE( "fj03", 0x40000, 0x20000, CRC(44893379) SHA1(da1340bc1821a552c317cb9a7c1ba69eb080b055) ) - ROM_LOAD16_BYTE( "fj01", 0x40001, 0x20000, CRC(97fbc107) SHA1(b2899eb4347c0471397b83051e46c94dff3526f5) ) + ROM_LOAD16_BYTE( "fj01", 0x40001, 0x20000, CRC(97fbc107) SHA1(b2899eb4347c0471397b83051e46c94dff3526f5) ) ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */ ROM_LOAD( "fj04", 0x00000, 0x10000, CRC(e9aedf9b) SHA1(f7bcf8f666015140aaad8ee5cf619636934b7066) ) @@ -316,11 +316,11 @@ ROM_START( vaportrau ) ROM_REGION( 0x100000, "gfx2", 0 ) ROM_LOAD( "vtmaa02.bin", 0x000000, 0x80000, CRC(091ff98e) SHA1(814dc08c055bad5368955a4b1fe6a706b58adc02) ) /* tiles 3 */ - ROM_LOAD( "vtmaa01.bin", 0x080000, 0x80000, CRC(c217a31b) SHA1(e259d48190d6890781fb0338e17e14822876babb) ) /* tiles 2 */ + ROM_LOAD( "vtmaa01.bin", 0x080000, 0x80000, CRC(c217a31b) SHA1(e259d48190d6890781fb0338e17e14822876babb) ) /* tiles 2 */ ROM_REGION( 0x100000, "gfx3", 0 ) - ROM_LOAD( "vtmaa03.bin", 0x000000, 0x80000, CRC(1a30bf81) SHA1(00e6c713e12133a99d64ca80638c9cbc8e26b2c8) ) /* sprites */ - ROM_LOAD( "vtmaa04.bin", 0x080000, 0x80000, CRC(b713e9cc) SHA1(af33943d75d2ee3a7385f624537008dca9e1d5d8) ) + ROM_LOAD( "vtmaa03.bin", 0x000000, 0x80000, CRC(1a30bf81) SHA1(00e6c713e12133a99d64ca80638c9cbc8e26b2c8) ) /* sprites */ + ROM_LOAD( "vtmaa04.bin", 0x080000, 0x80000, CRC(b713e9cc) SHA1(af33943d75d2ee3a7385f624537008dca9e1d5d8) ) ROM_REGION( 0x40000, "oki1", 0 ) /* ADPCM samples */ ROM_LOAD( "fj06", 0x00000, 0x20000, CRC(6e98a235) SHA1(374564b4e494d03cd1330c06e321b9452c22a075) ) @@ -341,10 +341,10 @@ ROM_END ROM_START( kuhga ) ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 code */ - ROM_LOAD16_BYTE( "fp02-3.bin", 0x00000, 0x20000, CRC(d0705ef4) SHA1(781efbf36d9dda543895e0a59cd4d72667439a93) ) - ROM_LOAD16_BYTE( "fp00-3.bin", 0x00001, 0x20000, CRC(1da92e48) SHA1(6507bd9bbc31ee03e38b82cc135aebf090902761) ) + ROM_LOAD16_BYTE( "fp02-3.bin", 0x00000, 0x20000, CRC(d0705ef4) SHA1(781efbf36d9dda543895e0a59cd4d72667439a93) ) + ROM_LOAD16_BYTE( "fp00-3.bin", 0x00001, 0x20000, CRC(1da92e48) SHA1(6507bd9bbc31ee03e38b82cc135aebf090902761) ) ROM_LOAD16_BYTE( "fp03.bin", 0x40000, 0x20000, CRC(ea0da0f1) SHA1(ca40e694cb0aa0c13672c14fd4a389bc6d26cbc6) ) - ROM_LOAD16_BYTE( "fp01.bin", 0x40001, 0x20000, CRC(e3ecbe86) SHA1(382e959111ec37ad94da8fd6dcefe2d2aab346b6) ) + ROM_LOAD16_BYTE( "fp01.bin", 0x40001, 0x20000, CRC(e3ecbe86) SHA1(382e959111ec37ad94da8fd6dcefe2d2aab346b6) ) ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */ ROM_LOAD( "fj04", 0x00000, 0x10000, CRC(e9aedf9b) SHA1(f7bcf8f666015140aaad8ee5cf619636934b7066) ) @@ -354,11 +354,11 @@ ROM_START( kuhga ) ROM_REGION( 0x100000, "gfx2", 0 ) ROM_LOAD( "vtmaa02.bin", 0x000000, 0x80000, CRC(091ff98e) SHA1(814dc08c055bad5368955a4b1fe6a706b58adc02) ) /* tiles 3 */ - ROM_LOAD( "vtmaa01.bin", 0x080000, 0x80000, CRC(c217a31b) SHA1(e259d48190d6890781fb0338e17e14822876babb) ) /* tiles 2 */ + ROM_LOAD( "vtmaa01.bin", 0x080000, 0x80000, CRC(c217a31b) SHA1(e259d48190d6890781fb0338e17e14822876babb) ) /* tiles 2 */ ROM_REGION( 0x100000, "gfx3", 0 ) - ROM_LOAD( "vtmaa03.bin", 0x000000, 0x80000, CRC(1a30bf81) SHA1(00e6c713e12133a99d64ca80638c9cbc8e26b2c8) ) /* sprites */ - ROM_LOAD( "vtmaa04.bin", 0x080000, 0x80000, CRC(b713e9cc) SHA1(af33943d75d2ee3a7385f624537008dca9e1d5d8) ) + ROM_LOAD( "vtmaa03.bin", 0x000000, 0x80000, CRC(1a30bf81) SHA1(00e6c713e12133a99d64ca80638c9cbc8e26b2c8) ) /* sprites */ + ROM_LOAD( "vtmaa04.bin", 0x080000, 0x80000, CRC(b713e9cc) SHA1(af33943d75d2ee3a7385f624537008dca9e1d5d8) ) ROM_REGION( 0x40000, "oki1", 0 ) /* ADPCM samples */ ROM_LOAD( "fj06", 0x00000, 0x20000, CRC(6e98a235) SHA1(374564b4e494d03cd1330c06e321b9452c22a075) ) diff --git a/src/mame/drivers/vball.c b/src/mame/drivers/vball.c index 69133763cc0..4306971e92c 100644 --- a/src/mame/drivers/vball.c +++ b/src/mame/drivers/vball.c @@ -418,7 +418,7 @@ static const ym2151_interface ym2151_config = static MACHINE_DRIVER_START( vball ) /* basic machine hardware */ - MDRV_CPU_ADD("maincpu", M6502, CPU_CLOCK) /* 2 MHz - measured by guru but it makes the game far far too slow ?! */ + MDRV_CPU_ADD("maincpu", M6502, CPU_CLOCK) /* 2 MHz - measured by guru but it makes the game far far too slow ?! */ MDRV_CPU_PROGRAM_MAP(main_map) MDRV_TIMER_ADD_SCANLINE("scantimer", vball_scanline, "screen", 0, 1) diff --git a/src/mame/drivers/vcombat.c b/src/mame/drivers/vcombat.c index dd56349770f..e8133c67e29 100644 --- a/src/mame/drivers/vcombat.c +++ b/src/mame/drivers/vcombat.c @@ -343,10 +343,10 @@ ADDRESS_MAP_END /* The first i860 - middle board */ static ADDRESS_MAP_START( vid_0_map, ADDRESS_SPACE_PROGRAM, 64 ) AM_RANGE(0x00000000, 0x0001ffff) AM_RAM_WRITE(v0_fb_w) /* Shared framebuffer - half of the bits lost to 32-bit bus */ - AM_RANGE(0x20000000, 0x20000007) AM_RAM AM_SHARE("share6") /* M0<-P0 com 1 (0x440000 in 68k-land) */ + AM_RANGE(0x20000000, 0x20000007) AM_RAM AM_SHARE("share6") /* M0<-P0 com 1 (0x440000 in 68k-land) */ AM_RANGE(0x40000000, 0x401fffff) AM_ROM AM_REGION("gfx", 0) - AM_RANGE(0x80000000, 0x80000007) AM_RAM AM_SHARE("share7") /* M0->P0 com 2 (0x480000 in 68k-land) */ - AM_RANGE(0xc0000000, 0xc0000fff) AM_NOP /* Dummy D$ flush page. */ + AM_RANGE(0x80000000, 0x80000007) AM_RAM AM_SHARE("share7") /* M0->P0 com 2 (0x480000 in 68k-land) */ + AM_RANGE(0xc0000000, 0xc0000fff) AM_NOP /* Dummy D$ flush page. */ AM_RANGE(0xfffc0000, 0xffffffff) AM_RAM AM_SHARE("share2") /* Shared RAM with main */ ADDRESS_MAP_END @@ -354,10 +354,10 @@ ADDRESS_MAP_END /* The second i860 - top board */ static ADDRESS_MAP_START( vid_1_map, ADDRESS_SPACE_PROGRAM, 64 ) AM_RANGE(0x00000000, 0x0001ffff) AM_RAM_WRITE(v1_fb_w) /* Half of the bits lost to 32-bit bus */ - AM_RANGE(0x20000000, 0x20000007) AM_RAM AM_SHARE("share8") /* M0->P1 com 1 (0x540000 in 68k-land) */ + AM_RANGE(0x20000000, 0x20000007) AM_RAM AM_SHARE("share8") /* M0->P1 com 1 (0x540000 in 68k-land) */ AM_RANGE(0x40000000, 0x401fffff) AM_ROM AM_REGION("gfx", 0) AM_RANGE(0x80000000, 0x80000007) AM_RAM AM_SHARE("share9") /* M0<-P1 com 2 (0x580000 in 68k-land) */ - AM_RANGE(0xc0000000, 0xc0000fff) AM_NOP /* Dummy D$ flush page. */ + AM_RANGE(0xc0000000, 0xc0000fff) AM_NOP /* Dummy D$ flush page. */ AM_RANGE(0xfffc0000, 0xffffffff) AM_RAM AM_SHARE("share3") /* Shared RAM with main */ ADDRESS_MAP_END diff --git a/src/mame/drivers/vegas.c b/src/mame/drivers/vegas.c index b947ea04fac..4c3d6179bec 100644 --- a/src/mame/drivers/vegas.c +++ b/src/mame/drivers/vegas.c @@ -336,7 +336,7 @@ #define NREG_BOOTCS (0x078/4) #define NREG_CPUSTAT (0x080/4) #define NREG_INTCTRL (0x088/4) -#define NREG_INTSTAT0 (0x090/4) +#define NREG_INTSTAT0 (0x090/4) #define NREG_INTSTAT1 (0x098/4) #define NREG_INTCLR (0x0A0/4) #define NREG_INTPPES (0x0A8/4) diff --git a/src/mame/drivers/vicdual.c b/src/mame/drivers/vicdual.c index 35abef5b5ae..4a7b8895e42 100644 --- a/src/mame/drivers/vicdual.c +++ b/src/mame/drivers/vicdual.c @@ -737,7 +737,7 @@ static READ8_HANDLER( headon2_io_r ) UINT8 ret = 0; if (offset & 0x01) ret = input_port_read(space->machine, "IN0"); - if (offset & 0x02) /* schematics show this as in input port, but never read from */ + if (offset & 0x02) /* schematics show this as in input port, but never read from */ if (offset & 0x04) ret = input_port_read(space->machine, "IN1"); if (offset & 0x08) ret = input_port_read(space->machine, "IN2"); if (offset & 0x12) logerror("********* Read from port %x\n", offset); @@ -1336,7 +1336,7 @@ static INPUT_PORTS_START( sspacaho ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_DIPNAME( 0x04, 0x00, "S.A. Bonus Life" ) PORT_DIPSETTING( 0x00, "10000" ) - PORT_DIPSETTING( 0x04, "15000" ) + PORT_DIPSETTING( 0x04, "15000" ) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(vicdual_get_timer_value, NULL) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START1 ) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) diff --git a/src/mame/drivers/videopkr.c b/src/mame/drivers/videopkr.c index baf2b7dfef9..7faceee30a9 100644 --- a/src/mame/drivers/videopkr.c +++ b/src/mame/drivers/videopkr.c @@ -470,7 +470,7 @@ static READ8_HANDLER( videopkr_io_r ) { case 0xef: /* inputs are multiplexed through a diode matrix */ { - hf = ((input_port_read(space->machine, "IN1") & 0x10 ) >> 4) & 1; /* Hopper full detection */ + hf = ((input_port_read(space->machine, "IN1") & 0x10 ) >> 4) & 1; /* Hopper full detection */ co = 0x10 * ((input_port_read(space->machine, "IN1") & 0x20 ) >> 5); /* Coin Out detection */ kbdin = ((input_port_read(space->machine, "IN1") & 0xaf ) << 8) + input_port_read(space->machine, "IN0"); diff --git a/src/mame/drivers/vigilant.c b/src/mame/drivers/vigilant.c index bf8b9b141c2..cc3402cc46d 100644 --- a/src/mame/drivers/vigilant.c +++ b/src/mame/drivers/vigilant.c @@ -83,13 +83,13 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( vigilant_io_map, ADDRESS_SPACE_IO, 8 ) ADDRESS_MAP_GLOBAL_MASK(0xff) AM_RANGE(0x00, 0x00) AM_READ_PORT("IN0") AM_WRITE(m72_sound_command_byte_w) /* SD */ - AM_RANGE(0x01, 0x01) AM_READ_PORT("IN1") AM_WRITE(vigilant_out2_w) /* OUT2 */ + AM_RANGE(0x01, 0x01) AM_READ_PORT("IN1") AM_WRITE(vigilant_out2_w) /* OUT2 */ AM_RANGE(0x02, 0x02) AM_READ_PORT("IN2") AM_RANGE(0x03, 0x03) AM_READ_PORT("DSW1") AM_RANGE(0x04, 0x04) AM_READ_PORT("DSW2") AM_WRITE(vigilant_bank_select_w) /* PBANK */ - AM_RANGE(0x80, 0x81) AM_WRITE(vigilant_horiz_scroll_w) /* HSPL, HSPH */ + AM_RANGE(0x80, 0x81) AM_WRITE(vigilant_horiz_scroll_w) /* HSPL, HSPH */ AM_RANGE(0x82, 0x83) AM_WRITE(vigilant_rear_horiz_scroll_w) /* RHSPL, RHSPH */ - AM_RANGE(0x84, 0x84) AM_WRITE(vigilant_rear_color_w) /* RCOD */ + AM_RANGE(0x84, 0x84) AM_WRITE(vigilant_rear_color_w) /* RCOD */ ADDRESS_MAP_END static ADDRESS_MAP_START( kikcubic_map, ADDRESS_SPACE_PROGRAM, 8 ) diff --git a/src/mame/drivers/viper.c b/src/mame/drivers/viper.c index b6b29ed9907..d3bd432c35b 100644 --- a/src/mame/drivers/viper.c +++ b/src/mame/drivers/viper.c @@ -632,7 +632,7 @@ static MACHINE_DRIVER_START(viper) MDRV_3DFX_VOODOO_3_ADD("voodoo", STD_VOODOO_3_CLOCK, 16, "screen") MDRV_3DFX_VOODOO_CPU("maincpu") - /* video hardware */ + /* video hardware */ MDRV_SCREEN_ADD("screen", RASTER) MDRV_SCREEN_REFRESH_RATE(60) MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32) diff --git a/src/mame/drivers/vp101.c b/src/mame/drivers/vp101.c index b158199b36f..a59724ee089 100644 --- a/src/mame/drivers/vp101.c +++ b/src/mame/drivers/vp101.c @@ -56,7 +56,7 @@ static const mips3_config config = }; static MACHINE_DRIVER_START( vp101 ) - MDRV_CPU_ADD("maincpu", R5000LE, 300000000) /* actually VR5500 with added NEC VR-series custom instructions */ + MDRV_CPU_ADD("maincpu", R5000LE, 300000000) /* actually VR5500 with added NEC VR-series custom instructions */ MDRV_CPU_CONFIG(config) MDRV_CPU_PROGRAM_MAP(main_map) diff --git a/src/mame/drivers/warpwarp.c b/src/mame/drivers/warpwarp.c index 72cd57594ea..47e7f749d03 100644 --- a/src/mame/drivers/warpwarp.c +++ b/src/mame/drivers/warpwarp.c @@ -764,7 +764,7 @@ MACHINE_DRIVER_END static MACHINE_DRIVER_START( bombbee ) /* basic machine hardware */ - MDRV_CPU_ADD("maincpu", 8080, MASTER_CLOCK/9) /* 18.432 MHz / 9 */ + MDRV_CPU_ADD("maincpu", 8080, MASTER_CLOCK/9) /* 18.432 MHz / 9 */ MDRV_CPU_PROGRAM_MAP(bombbee_map) MDRV_CPU_VBLANK_INT("screen", irq0_line_assert) diff --git a/src/mame/drivers/wc90.c b/src/mame/drivers/wc90.c index 7f8d06598b5..5d302dc775b 100644 --- a/src/mame/drivers/wc90.c +++ b/src/mame/drivers/wc90.c @@ -282,7 +282,7 @@ static const gfx_layout spritelayout = }; static GFXDECODE_START( wc90 ) - GFXDECODE_ENTRY( "gfx1", 0x00000, charlayout, 1*16*16, 16*16 ) + GFXDECODE_ENTRY( "gfx1", 0x00000, charlayout, 1*16*16, 16*16 ) GFXDECODE_ENTRY( "gfx2", 0x00000, tilelayout, 2*16*16, 16*16 ) GFXDECODE_ENTRY( "gfx3", 0x00000, tilelayout, 3*16*16, 16*16 ) GFXDECODE_ENTRY( "gfx4", 0x00000, spritelayout, 0*16*16, 16*16 ) // sprites diff --git a/src/mame/drivers/wc90b.c b/src/mame/drivers/wc90b.c index 26f4963ed63..fa5f0b48762 100644 --- a/src/mame/drivers/wc90b.c +++ b/src/mame/drivers/wc90b.c @@ -317,7 +317,7 @@ static const gfx_layout spritelayout = }; static GFXDECODE_START( wc90b ) - GFXDECODE_ENTRY( "gfx1", 0x00000, charlayout, 1*16*16, 16*16 ) + GFXDECODE_ENTRY( "gfx1", 0x00000, charlayout, 1*16*16, 16*16 ) GFXDECODE_ENTRY( "gfx2", 0x00000, tilelayout, 2*16*16, 16*16 ) GFXDECODE_ENTRY( "gfx2", 0x02000, tilelayout, 2*16*16, 16*16 ) GFXDECODE_ENTRY( "gfx2", 0x04000, tilelayout, 2*16*16, 16*16 ) diff --git a/src/mame/drivers/welltris.c b/src/mame/drivers/welltris.c index 76652a22e04..4bb5489a02e 100644 --- a/src/mame/drivers/welltris.c +++ b/src/mame/drivers/welltris.c @@ -559,7 +559,7 @@ static INPUT_PORTS_START( welltris ) PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Flip_Screen ) ) /* Flip Screen Not Currently Supported */ PORT_DIPSETTING( 0x0040, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_SERVICE( 0x0080, IP_ACTIVE_LOW ) + PORT_SERVICE( 0x0080, IP_ACTIVE_LOW ) INPUT_PORTS_END static INPUT_PORTS_START( quiz18k ) @@ -650,7 +650,7 @@ static INPUT_PORTS_START( quiz18k ) PORT_DIPNAME( 0x40, 0x40, "DIPSW 2-7" ) PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_SERVICE( 0x80, IP_ACTIVE_LOW ) + PORT_SERVICE( 0x80, IP_ACTIVE_LOW ) INPUT_PORTS_END diff --git a/src/mame/drivers/wgp.c b/src/mame/drivers/wgp.c index 90837207321..a04cd9fa276 100644 --- a/src/mame/drivers/wgp.c +++ b/src/mame/drivers/wgp.c @@ -585,7 +585,7 @@ static READ16_HANDLER( wgp_adinput_r ) return steer; case 0x02: - return 0xc0; /* steer offset, correct acc. to service mode */ + return 0xc0; /* steer offset, correct acc. to service mode */ case 0x03: return 0xbf; /* accel offset, correct acc. to service mode */ diff --git a/src/mame/drivers/williams.c b/src/mame/drivers/williams.c index 2b94e3972eb..16f53abdd3a 100644 --- a/src/mame/drivers/williams.c +++ b/src/mame/drivers/williams.c @@ -1310,7 +1310,7 @@ static INPUT_PORTS_START( tshoot ) PORT_BIT( 0x3F, 0x20, IPT_AD_STICK_Y ) PORT_MINMAX(0,0x3F) PORT_SENSITIVITY(25) PORT_KEYDELTA(10) PORT_START("INP1Y") /* muxed into IN0 */ - PORT_BIT( 0x3F, 0x20, IPT_AD_STICK_X ) PORT_MINMAX(0,0x3F) PORT_SENSITIVITY(25) PORT_KEYDELTA(10) + PORT_BIT( 0x3F, 0x20, IPT_AD_STICK_X ) PORT_MINMAX(0,0x3F) PORT_SENSITIVITY(25) PORT_KEYDELTA(10) INPUT_PORTS_END @@ -2614,31 +2614,31 @@ ROM_END ROM_START( inferno ) ROM_REGION( 0x50000, "maincpu", 0 ) ROM_LOAD( "ic9.inf", 0x0e000, 0x1000, CRC(1a013185) SHA1(9079c082ec043714f9d8ea92bc81d0b93d2ce715) ) /* IC9 */ - ROM_LOAD( "ic10.inf", 0x0f000, 0x1000, CRC(dbf64a36) SHA1(54326bc527797f0a3a55764073eb40030aec1aae) ) /* IC10 */ + ROM_LOAD( "ic10.inf", 0x0f000, 0x1000, CRC(dbf64a36) SHA1(54326bc527797f0a3a55764073eb40030aec1aae) ) /* IC10 */ ROM_LOAD( "ic18.inf", 0x10000, 0x2000, CRC(95bcf7b1) SHA1(66687a3962109a25e26ae00bddd33ed973981b91) ) /* IC18 */ ROM_LOAD( "ic16.inf", 0x12000, 0x2000, CRC(8bc4f935) SHA1(12da6faa71e5984047fa14f32af5bb865f228cb2) ) /* IC16 */ ROM_LOAD( "ic14.inf", 0x14000, 0x2000, CRC(a70508a7) SHA1(930bb9af3b6ba9fdf3e7c32f6b5ffae9acd6cee3) ) /* IC14 */ ROM_LOAD( "ic12.inf", 0x16000, 0x2000, CRC(7ffb87f9) SHA1(469f5ae39ad8531c4c11e9d10ab57686e7f54aef) ) /* IC12 */ - ROM_LOAD( "ic17.inf", 0x30000, 0x2000, CRC(b4684139) SHA1(c1d6ecd3dc8191250ef70e6972dad234c0d8f739) ) /* IC17 */ - ROM_LOAD( "ic15.inf", 0x32000, 0x2000, CRC(128a6ad6) SHA1(357438e50663d6cb96dabfa5110c17836584e15f) ) /* IC15 */ - ROM_LOAD( "ic13.inf", 0x34000, 0x2000, CRC(83a9e4d6) SHA1(4937e4d1c516da837213e40a1da862578c8dd272) ) /* IC13 */ - ROM_LOAD( "ic11.inf", 0x36000, 0x2000, CRC(c2e9c909) SHA1(21f0b9bf6ef3a9466ea9afde1c7efde9ed04ce5b) ) /* IC11 */ + ROM_LOAD( "ic17.inf", 0x30000, 0x2000, CRC(b4684139) SHA1(c1d6ecd3dc8191250ef70e6972dad234c0d8f739) ) /* IC17 */ + ROM_LOAD( "ic15.inf", 0x32000, 0x2000, CRC(128a6ad6) SHA1(357438e50663d6cb96dabfa5110c17836584e15f) ) /* IC15 */ + ROM_LOAD( "ic13.inf", 0x34000, 0x2000, CRC(83a9e4d6) SHA1(4937e4d1c516da837213e40a1da862578c8dd272) ) /* IC13 */ + ROM_LOAD( "ic11.inf", 0x36000, 0x2000, CRC(c2e9c909) SHA1(21f0b9bf6ef3a9466ea9afde1c7efde9ed04ce5b) ) /* IC11 */ - ROM_LOAD( "ic25.inf", 0x40000, 0x2000, CRC(103a5951) SHA1(57c8caa1e9d5e245052822d08add9343fd622e04) ) /* IC25 */ - ROM_LOAD( "ic23.inf", 0x42000, 0x2000, CRC(c04749a0) SHA1(b203e8d1df556e10b4ecad4733448f889c63e261) ) /* IC23 */ - ROM_LOAD( "ic21.inf", 0x44000, 0x2000, CRC(c405f853) SHA1(6bd74d065a6043849e083c2822925b82c6fedb00) ) /* IC21 */ - ROM_LOAD( "ic19.inf", 0x46000, 0x2000, CRC(ade7645a) SHA1(bfaab1840e3171df895a2333a30b9dac214b3351) ) /* IC19 */ + ROM_LOAD( "ic25.inf", 0x40000, 0x2000, CRC(103a5951) SHA1(57c8caa1e9d5e245052822d08add9343fd622e04) ) /* IC25 */ + ROM_LOAD( "ic23.inf", 0x42000, 0x2000, CRC(c04749a0) SHA1(b203e8d1df556e10b4ecad4733448f889c63e261) ) /* IC23 */ + ROM_LOAD( "ic21.inf", 0x44000, 0x2000, CRC(c405f853) SHA1(6bd74d065a6043849e083c2822925b82c6fedb00) ) /* IC21 */ + ROM_LOAD( "ic19.inf", 0x46000, 0x2000, CRC(ade7645a) SHA1(bfaab1840e3171df895a2333a30b9dac214b3351) ) /* IC19 */ /* sound CPU */ ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_LOAD( "ic8.inf", 0x0e000, 0x2000, CRC(4e3123b8) SHA1(f453feed3ae3b6430db49eb4325f62eecfee9f5e) ) /* IC8 */ ROM_REGION( 0x6000, "gfx1", 0 ) - ROM_LOAD( "ic57.inf", 0x00000, 0x2000, CRC(65a4ef79) SHA1(270c58901e83665bc388cd9cb92022c55e8eae50) ) /* IC57 */ - ROM_LOAD( "ic58.inf", 0x02000, 0x2000, CRC(4bb1c2a0) SHA1(9e8d214b8d1dbe4c2369e4047e165c9e692098a5) ) /* IC58 */ - ROM_LOAD( "ic41.inf", 0x04000, 0x2000, CRC(f3f7238f) SHA1(3810f1afd318ec37271c099c989b142b85d8da51) ) /* IC41 */ + ROM_LOAD( "ic57.inf", 0x00000, 0x2000, CRC(65a4ef79) SHA1(270c58901e83665bc388cd9cb92022c55e8eae50) ) /* IC57 */ + ROM_LOAD( "ic58.inf", 0x02000, 0x2000, CRC(4bb1c2a0) SHA1(9e8d214b8d1dbe4c2369e4047e165c9e692098a5) ) /* IC58 */ + ROM_LOAD( "ic41.inf", 0x04000, 0x2000, CRC(f3f7238f) SHA1(3810f1afd318ec37271c099c989b142b85d8da51) ) /* IC41 */ ROM_END diff --git a/src/mame/drivers/witch.c b/src/mame/drivers/witch.c index 5da52382a06..74a077f5733 100644 --- a/src/mame/drivers/witch.c +++ b/src/mame/drivers/witch.c @@ -385,12 +385,12 @@ static READ8_HANDLER(prot_read_700x) switch(cpu_get_pc(space->cpu)) { - case 0x23f: - case 0x246: - case 0x24c: - case 0x252: - case 0x258: - case 0x25e: + case 0x23f: + case 0x246: + case 0x24c: + case 0x252: + case 0x258: + case 0x25e: return offset;//enough to pass... } return memory_region(space->machine, "sub")[0x7000+offset]; @@ -549,7 +549,7 @@ F180 kkkbbppp ; Read onPORT 0xA005 kkk = KEY IN | 1-10 ; 1-20 ; 1-40 ; 1-50 ; 1-100 ; 1-200 ; 1-250 ; 1-500 */ PORT_START("A005") /* DSW */ - PORT_DIPNAME( 0x07, 0x07, "PAY OUT" ) + PORT_DIPNAME( 0x07, 0x07, "PAY OUT" ) PORT_DIPSETTING( 0x07, "60" ) PORT_DIPSETTING( 0x06, "65" ) PORT_DIPSETTING( 0x05, "70" ) @@ -839,7 +839,7 @@ ROM_END static DRIVER_INIT(witch) { - UINT8 *ROM = (UINT8 *)memory_region(machine, "maincpu"); + UINT8 *ROM = (UINT8 *)memory_region(machine, "maincpu"); memory_set_bankptr(machine, "bank1", &ROM[0x10000+UNBANKED_SIZE]); memory_install_read8_handler(cputag_get_address_space(machine, "sub", ADDRESS_SPACE_PROGRAM), 0x7000, 0x700f, 0, 0, prot_read_700x); diff --git a/src/mame/drivers/wiz.c b/src/mame/drivers/wiz.c index 8549e3edb9a..bc104d9aea2 100644 --- a/src/mame/drivers/wiz.c +++ b/src/mame/drivers/wiz.c @@ -324,7 +324,7 @@ static INPUT_PORTS_START( stinger ) PORT_DIPSETTING( 0x60, "20000 90000" ) PORT_DIPSETTING( 0x40, "30000 80000" ) PORT_DIPSETTING( 0x20, "30000 90000" ) - PORT_DIPSETTING( 0x00, DEF_STR( None ) ) + PORT_DIPSETTING( 0x00, DEF_STR( None ) ) PORT_START("DSW1") PORT_DIPNAME( 0x01, 0x00, "Debug Mode" ) /* See notes */ @@ -874,7 +874,7 @@ ROM_END ROM_START( wizt ) ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD( "wiz1.bin", 0x0000, 0x4000, CRC(5a6d3c60) SHA1(faeb7e7ddeee9638ec046655e87f866d81fdbee0) ) + ROM_LOAD( "wiz1.bin", 0x0000, 0x4000, CRC(5a6d3c60) SHA1(faeb7e7ddeee9638ec046655e87f866d81fdbee0) ) ROM_LOAD( "ic05_03.bin", 0x4000, 0x4000, CRC(7978d879) SHA1(866efdff3c111793d5a3cc2fa0b03a2b4e371c49) ) ROM_LOAD( "ic06_02.bin", 0x8000, 0x4000, CRC(9c406ad2) SHA1(cd82c3dc622886b6ebb30ba565f3c34d5a4e229b) ) diff --git a/src/mame/drivers/wrally.c b/src/mame/drivers/wrally.c index 51b83cb1d5d..dd21029d877 100644 --- a/src/mame/drivers/wrally.c +++ b/src/mame/drivers/wrally.c @@ -275,7 +275,7 @@ static MACHINE_DRIVER_START( wrally ) /* sound hardware */ MDRV_SPEAKER_STANDARD_MONO("mono") - MDRV_SOUND_ADD("oki", OKIM6295, XTAL_1MHz) /* verified on pcb */ + MDRV_SOUND_ADD("oki", OKIM6295, XTAL_1MHz) /* verified on pcb */ MDRV_SOUND_CONFIG(okim6295_interface_pin7high) /* verified on pcb */ MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) MACHINE_DRIVER_END diff --git a/src/mame/drivers/wwfwfest.c b/src/mame/drivers/wwfwfest.c index a07280d289a..72adf3e1f1f 100644 --- a/src/mame/drivers/wwfwfest.c +++ b/src/mame/drivers/wwfwfest.c @@ -485,13 +485,13 @@ ROM_START( wwfwfest ) ROM_LOAD16_BYTE( "31a13-2.ic19", 0x00001, 0x40000, CRC(7175bca7) SHA1(992b47a787b5bc2a5a381ec78b8dfaf7d42c614b) ) ROM_LOAD16_BYTE( "31a14-2.ic18", 0x00000, 0x40000, CRC(5d06bfd1) SHA1(39a93da662158aa5a9953dcabfcb47c2fc196dc7) ) - ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU (Z80) */ + ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU (Z80) */ ROM_LOAD( "31a11-2.ic42", 0x00000, 0x10000, CRC(5ddebfea) SHA1(30073963e965250d94f0dc3bd261a054850adf95) ) - ROM_REGION( 0x80000, "oki", 0 ) /* ADPCM samples */ + ROM_REGION( 0x80000, "oki", 0 ) /* ADPCM samples */ ROM_LOAD( "31j10.ic73", 0x00000, 0x80000, CRC(6c522edb) SHA1(8005d59c94160638ba2ea7caf4e991fff03003d5) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* FG0 Tiles (8x8) */ + ROM_REGION( 0x20000, "gfx1", 0 ) /* FG0 Tiles (8x8) */ ROM_LOAD( "31a12-0.ic33", 0x00000, 0x20000, CRC(d0803e20) SHA1(b68758e9a5522396f831a3972571f8aed54c64de) ) ROM_REGION( 0x800000, "gfx2", 0 ) /* SPR Tiles (16x16), 27080 Mask ROM's */ @@ -514,13 +514,13 @@ ROM_START( wwfwfesta ) ROM_LOAD16_BYTE( "wf_18.rom", 0x00000, 0x40000, CRC(933ea1a0) SHA1(61da142cfa7abd3b77ab21979c061a078c0d0c63) ) ROM_LOAD16_BYTE( "wf_19.rom", 0x00001, 0x40000, CRC(bd02e3c4) SHA1(7ae63e48caf9919ce7b63b4c5aa9474ba8c336da) ) - ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU (Z80) */ + ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU (Z80) */ ROM_LOAD( "31a11-2.ic42", 0x00000, 0x10000, CRC(5ddebfea) SHA1(30073963e965250d94f0dc3bd261a054850adf95) ) - ROM_REGION( 0x80000, "oki", 0 ) /* ADPCM samples */ + ROM_REGION( 0x80000, "oki", 0 ) /* ADPCM samples */ ROM_LOAD( "31j10.ic73", 0x00000, 0x80000, CRC(6c522edb) SHA1(8005d59c94160638ba2ea7caf4e991fff03003d5) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* FG0 Tiles (8x8) */ + ROM_REGION( 0x20000, "gfx1", 0 ) /* FG0 Tiles (8x8) */ ROM_LOAD( "wf_33.rom", 0x00000, 0x20000, CRC(06f22615) SHA1(2e9418e372da85ea597977d912d8b35753655f4e) ) ROM_REGION( 0x800000, "gfx2", 0 ) /* SPR Tiles (16x16), 27080 Mask ROM's */ @@ -574,13 +574,13 @@ ROM_START( wwfwfestj ) ROM_LOAD16_BYTE( "31j13-0.ic19", 0x00001, 0x40000, CRC(2147780d) SHA1(9a7a5db06117f3780e084d3f0c7b642ff8a9db55) ) ROM_LOAD16_BYTE( "31j14-0.ic18", 0x00000, 0x40000, CRC(d76fc747) SHA1(5f6819bc61756d1df4ac0776ac420a59c438cf8a) ) - ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU (Z80) */ + ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU (Z80) */ ROM_LOAD( "31a11-2.ic42", 0x00000, 0x10000, CRC(5ddebfea) SHA1(30073963e965250d94f0dc3bd261a054850adf95) ) - ROM_REGION( 0x80000, "oki", 0 ) /* ADPCM samples */ + ROM_REGION( 0x80000, "oki", 0 ) /* ADPCM samples */ ROM_LOAD( "31j10.ic73", 0x00000, 0x80000, CRC(6c522edb) SHA1(8005d59c94160638ba2ea7caf4e991fff03003d5) ) - ROM_REGION( 0x20000, "gfx1", 0 ) /* FG0 Tiles (8x8) */ + ROM_REGION( 0x20000, "gfx1", 0 ) /* FG0 Tiles (8x8) */ ROM_LOAD( "31j12-0.ic33", 0x00000, 0x20000, CRC(f4821fe0) SHA1(e5faa9860e9d4e75393b64ca85a8bfc4852fd4fd) ) ROM_REGION( 0x800000, "gfx2", 0 ) /* SPR Tiles (16x16), 27080 Mask ROM's */ diff --git a/src/mame/drivers/xybots.c b/src/mame/drivers/xybots.c index 758f9ed51d9..95f25290540 100644 --- a/src/mame/drivers/xybots.c +++ b/src/mame/drivers/xybots.c @@ -133,7 +133,7 @@ static INPUT_PORTS_START( xybots ) PORT_START("FFE200") PORT_BIT( 0x00ff, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_SERVICE( 0x0100, IP_ACTIVE_LOW ) - PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_UNUSED ) /* /AUDBUSY */ + PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_UNUSED ) /* /AUDBUSY */ PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_UNUSED ) /* 256H */ PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_VBLANK ) /* VBLANK */ PORT_BIT( 0xf000, IP_ACTIVE_LOW, IPT_UNUSED ) diff --git a/src/mame/drivers/yunsung8.c b/src/mame/drivers/yunsung8.c index a358c2394cf..8368605fdf8 100644 --- a/src/mame/drivers/yunsung8.c +++ b/src/mame/drivers/yunsung8.c @@ -371,7 +371,7 @@ static INPUT_PORTS_START( rocktris ) PORT_DIPSETTING( 0x80, DEF_STR( 1C_4C ) ) PORT_START("DSW2") - PORT_DIPNAME( 0x01, 0x01, "Unknown 2-0" ) // the rest seems unused + PORT_DIPNAME( 0x01, 0x01, "Unknown 2-0" ) // the rest seems unused PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_DIPNAME( 0x02, 0x02, "Unknown 2-1" ) diff --git a/src/mame/drivers/zac2650.c b/src/mame/drivers/zac2650.c index 2bb9d499bcb..5a2de0d08a1 100644 --- a/src/mame/drivers/zac2650.c +++ b/src/mame/drivers/zac2650.c @@ -227,14 +227,14 @@ static const gfx_layout s2636_character = 1, { 0 }, { STEP8(0,1) }, - { STEP8(0,8), STEP2(8*8,8) }, + { STEP8(0,8), STEP2(8*8,8) }, 8*8 }; static GFXDECODE_START( tinvader ) GFXDECODE_SCALE( "gfx1", 0, tinvader_character, 0, 2, 3, 3 ) - GFXDECODE_SCALE( NULL, 0x1F00, s2636_character, 0, 2, 4, 3 ) /* dynamic */ - GFXDECODE_SCALE( NULL, 0x1F00, s2636_character, 0, 2, 8, 6 ) /* dynamic */ + GFXDECODE_SCALE( NULL, 0x1F00, s2636_character, 0, 2, 4, 3 ) /* dynamic */ + GFXDECODE_SCALE( NULL, 0x1F00, s2636_character, 0, 2, 8, 6 ) /* dynamic */ GFXDECODE_END static MACHINE_DRIVER_START( tinvader ) diff --git a/src/mame/drivers/zn.c b/src/mame/drivers/zn.c index 99cfab962b5..6b65b058733 100644 --- a/src/mame/drivers/zn.c +++ b/src/mame/drivers/zn.c @@ -1441,7 +1441,7 @@ static void atpsx_interrupt(const device_config *device, int state) { if (state) { - psx_irq_set(device->machine, 0x400); + psx_irq_set(device->machine, 0x400); } } @@ -2008,7 +2008,7 @@ static void jdredd_ide_interrupt(const device_config *device, int state) { if (state) { - psx_irq_set(device->machine, 0x400); + psx_irq_set(device->machine, 0x400); } } diff --git a/src/mame/drivers/zr107.c b/src/mame/drivers/zr107.c index 945dcabd989..66186061867 100644 --- a/src/mame/drivers/zr107.c +++ b/src/mame/drivers/zr107.c @@ -744,7 +744,7 @@ static MACHINE_DRIVER_START( zr107 ) MDRV_K056230_ADD("k056230", zr107_k056230_intf) - /* video hardware */ + /* video hardware */ MDRV_SCREEN_ADD("screen", RASTER) MDRV_SCREEN_REFRESH_RATE(60) MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32) @@ -797,7 +797,7 @@ static MACHINE_DRIVER_START( jetwave ) MDRV_K056230_ADD("k056230", zr107_k056230_intf) - /* video hardware */ + /* video hardware */ MDRV_SCREEN_ADD("screen", RASTER) MDRV_SCREEN_REFRESH_RATE(60) MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32) diff --git a/src/mame/includes/atari.h b/src/mame/includes/atari.h index 5a3f0afa9a7..85294466310 100644 --- a/src/mame/includes/atari.h +++ b/src/mame/includes/atari.h @@ -235,7 +235,7 @@ typedef struct { UINT8 cclock[256+32]; /* color clock buffer filled by ANTIC */ UINT8 pmbits[256+32]; /* player missile buffer filled by GTIA */ UINT16 color_lookup[256]; /* color lookup table */ - UINT8 *prio_table[64]; /* player/missile priority tables */ + UINT8 *prio_table[64]; /* player/missile priority tables */ VIDEO *video[312]; /* video buffer */ UINT32 *cclk_expand; /* shared buffer for the following: */ UINT32 *pf_21; /* 1cclk 2 color txt 2,3 */ @@ -262,8 +262,8 @@ typedef struct { #define RDANTIC(space) memory_read_byte(space, antic.dpage+antic.doffs) #define RDVIDEO(space,o) memory_read_byte(space, antic.vpage+((antic.voffs+(o))&VOFFS)) #define RDCHGEN(space,o) memory_read_byte(space, antic.chbase+(o)) -#define RDPMGFXS(space,o) memory_read_byte(space, antic.pmbase_s+(o)+(antic.scanline>>1)) -#define RDPMGFXD(space,o) memory_read_byte(space, antic.pmbase_d+(o)+antic.scanline) +#define RDPMGFXS(space,o) memory_read_byte(space, antic.pmbase_s+(o)+(antic.scanline>>1)) +#define RDPMGFXD(space,o) memory_read_byte(space, antic.pmbase_d+(o)+antic.scanline) #define PREPARE() \ UINT32 *dst = (UINT32 *)&antic.cclock[PMOFFSET] @@ -364,7 +364,7 @@ typedef struct { for( i = 0; i < width; i++ ) \ video->data[i] = RDVIDEO(space,i) << 1 -#define PREPARE_GFXA(space,width) \ +#define PREPARE_GFXA(space,width) \ UINT32 *dst = (UINT32 *)&antic.cclock[PMOFFSET]; \ int i; \ for( i = 0; i < width; i++ ) \ @@ -376,7 +376,7 @@ typedef struct { for( i = 0; i < width; i++ ) \ video->data[i] = RDVIDEO(space,i) -#define PREPARE_GFXF(space,width) \ +#define PREPARE_GFXF(space,width) \ UINT32 *dst = (UINT32 *)&antic.cclock[PMOFFSET]; \ int i; \ for( i = 0; i < width; i++ ) \ diff --git a/src/mame/includes/atarig1.h b/src/mame/includes/atarig1.h index dfcac38189f..2b57cf05020 100644 --- a/src/mame/includes/atarig1.h +++ b/src/mame/includes/atarig1.h @@ -10,21 +10,21 @@ typedef struct _atarig1_state atarig1_state; struct _atarig1_state { atarigen_state atarigen; - UINT8 is_pitfight; + UINT8 is_pitfight; - UINT8 which_input; + UINT8 which_input; UINT16 * mo_command; UINT16 * bslapstic_base; void * bslapstic_bank0; - UINT8 bslapstic_bank; - UINT8 bslapstic_primed; + UINT8 bslapstic_bank; + UINT8 bslapstic_primed; int pfscroll_xoffset; - UINT16 current_control; - UINT8 playfield_tile_bank; - UINT16 playfield_xscroll; - UINT16 playfield_yscroll; + UINT16 current_control; + UINT8 playfield_tile_bank; + UINT16 playfield_xscroll; + UINT16 playfield_yscroll; }; diff --git a/src/mame/includes/atarig42.h b/src/mame/includes/atarig42.h index 5f3ee49daaf..76a5d07acbf 100644 --- a/src/mame/includes/atarig42.h +++ b/src/mame/includes/atarig42.h @@ -10,17 +10,17 @@ typedef struct _atarig42_state atarig42_state; struct _atarig42_state { atarigen_state atarigen; - UINT16 playfield_base; - UINT16 motion_object_base; - UINT16 motion_object_mask; + UINT16 playfield_base; + UINT16 motion_object_base; + UINT16 motion_object_mask; - UINT16 current_control; - UINT8 playfield_tile_bank; - UINT8 playfield_color_bank; - UINT16 playfield_xscroll; - UINT16 playfield_yscroll; + UINT16 current_control; + UINT8 playfield_tile_bank; + UINT8 playfield_color_bank; + UINT16 playfield_xscroll; + UINT16 playfield_yscroll; - UINT8 analog_data; + UINT8 analog_data; UINT16 * mo_command; int sloop_bank; diff --git a/src/mame/includes/atarigt.h b/src/mame/includes/atarigt.h index ccdc8b50331..ff7146b6b58 100644 --- a/src/mame/includes/atarigt.h +++ b/src/mame/includes/atarigt.h @@ -15,25 +15,25 @@ typedef struct _atarigt_state atarigt_state; struct _atarigt_state { atarigen_state atarigen; - UINT8 is_primrage; + UINT8 is_primrage; UINT16 * colorram; bitmap_t * pf_bitmap; bitmap_t * an_bitmap; - UINT8 playfield_tile_bank; - UINT8 playfield_color_bank; - UINT16 playfield_xscroll; - UINT16 playfield_yscroll; + UINT8 playfield_tile_bank; + UINT8 playfield_color_bank; + UINT16 playfield_xscroll; + UINT16 playfield_yscroll; - UINT32 tram_checksum; + UINT32 tram_checksum; - UINT32 expanded_mram[MRAM_ENTRIES * 3]; + UINT32 expanded_mram[MRAM_ENTRIES * 3]; UINT32 * mo_command; - void (*protection_w)(const address_space *space, offs_t offset, UINT16 data); - void (*protection_r)(const address_space *space, offs_t offset, UINT16 *data); + void (*protection_w)(const address_space *space, offs_t offset, UINT16 data); + void (*protection_r)(const address_space *space, offs_t offset, UINT16 *data); }; diff --git a/src/mame/includes/atarigx2.h b/src/mame/includes/atarigx2.h index 1f8d20422c3..3ff14692a11 100644 --- a/src/mame/includes/atarigx2.h +++ b/src/mame/includes/atarigx2.h @@ -10,18 +10,18 @@ typedef struct _atarigx2_state atarigx2_state; struct _atarigx2_state { atarigen_state atarigen; - UINT16 playfield_base; - UINT16 motion_object_base; - UINT16 motion_object_mask; + UINT16 playfield_base; + UINT16 motion_object_base; + UINT16 motion_object_mask; UINT32 * mo_command; UINT32 * protection_base; - UINT16 current_control; - UINT8 playfield_tile_bank; - UINT8 playfield_color_bank; - UINT16 playfield_xscroll; - UINT16 playfield_yscroll; + UINT16 current_control; + UINT8 playfield_tile_bank; + UINT8 playfield_color_bank; + UINT16 playfield_xscroll; + UINT16 playfield_yscroll; }; diff --git a/src/mame/includes/atarisy1.h b/src/mame/includes/atarisy1.h index 628dd478b17..adddc5d99be 100644 --- a/src/mame/includes/atarisy1.h +++ b/src/mame/includes/atarisy1.h @@ -13,22 +13,22 @@ struct _atarisy1_state UINT16 * bankselect; - UINT8 joystick_type; - UINT8 trackball_type; + UINT8 joystick_type; + UINT8 trackball_type; const device_config *joystick_timer; - UINT8 joystick_int; - UINT8 joystick_int_enable; - UINT8 joystick_value; + UINT8 joystick_int; + UINT8 joystick_int_enable; + UINT8 joystick_value; - UINT8 tms5220_out_data; - UINT8 tms5220_in_data; - UINT8 tms5220_ctl; + UINT8 tms5220_out_data; + UINT8 tms5220_in_data; + UINT8 tms5220_ctl; /* playfield parameters */ - UINT16 playfield_lookup[256]; - UINT8 playfield_tile_bank; - UINT16 playfield_priority_pens; + UINT16 playfield_lookup[256]; + UINT8 playfield_tile_bank; + UINT16 playfield_priority_pens; const device_config *yscroll_reset_timer; /* INT3 tracking */ @@ -37,8 +37,8 @@ struct _atarisy1_state const device_config *int3off_timer; /* graphics bank tracking */ - UINT8 bank_gfx[3][8]; - UINT8 bank_color_shift[MAX_GFX_ELEMENTS]; + UINT8 bank_gfx[3][8]; + UINT8 bank_color_shift[MAX_GFX_ELEMENTS]; }; diff --git a/src/mame/includes/atarisy2.h b/src/mame/includes/atarisy2.h index 1f1d61a25c6..e2bbd60c32a 100644 --- a/src/mame/includes/atarisy2.h +++ b/src/mame/includes/atarisy2.h @@ -13,29 +13,29 @@ struct _atarisy2_state UINT16 * slapstic_base; - UINT8 interrupt_enable; + UINT8 interrupt_enable; UINT16 * bankselect; - INT8 pedal_count; + INT8 pedal_count; - UINT8 has_tms5220; - UINT8 tms5220_data; - UINT8 tms5220_data_strobe; + UINT8 has_tms5220; + UINT8 tms5220_data; + UINT8 tms5220_data_strobe; - UINT8 which_adc; + UINT8 which_adc; - UINT8 p2portwr_state; - UINT8 p2portrd_state; + UINT8 p2portwr_state; + UINT8 p2portrd_state; UINT16 * rombank1; UINT16 * rombank2; - UINT8 sound_reset_state; + UINT8 sound_reset_state; emu_timer * yscroll_reset_timer; - UINT32 playfield_tile_bank[2]; - UINT32 videobank; - UINT16 vram[0x8000/2]; + UINT32 playfield_tile_bank[2]; + UINT32 videobank; + UINT16 vram[0x8000/2]; }; diff --git a/src/mame/includes/badlands.h b/src/mame/includes/badlands.h index 1a61c09725f..508e3250810 100644 --- a/src/mame/includes/badlands.h +++ b/src/mame/includes/badlands.h @@ -11,12 +11,12 @@ struct _badlands_state { atarigen_state atarigen; - UINT8 pedal_value[2]; + UINT8 pedal_value[2]; UINT8 * bank_base; UINT8 * bank_source_data; - UINT8 playfield_tile_bank; + UINT8 playfield_tile_bank; }; diff --git a/src/mame/includes/batman.h b/src/mame/includes/batman.h index 8a410420d3c..723ea08d311 100644 --- a/src/mame/includes/batman.h +++ b/src/mame/includes/batman.h @@ -11,9 +11,9 @@ struct _batman_state { atarigen_state atarigen; - UINT16 latch_data; + UINT16 latch_data; - UINT8 alpha_tile_bank; + UINT8 alpha_tile_bank; }; diff --git a/src/mame/includes/changela.h b/src/mame/includes/changela.h index 9826eba8cf3..9494390ad85 100644 --- a/src/mame/includes/changela.h +++ b/src/mame/includes/changela.h @@ -12,7 +12,7 @@ struct _changela_state bitmap_t *obj0_bitmap, *river_bitmap, *tree0_bitmap, *tree1_bitmap; UINT8* tree_ram; UINT8* memory_devices; - UINT32 mem_dev_selected; /* an offset within memory_devices area */ + UINT32 mem_dev_selected; /* an offset within memory_devices area */ UINT32 slopeROM_bank; UINT8 tree_en; UINT8 horizon; diff --git a/src/mame/includes/cop01.h b/src/mame/includes/cop01.h index 7dc18c4d3a5..a0d2e5ec7ad 100644 --- a/src/mame/includes/cop01.h +++ b/src/mame/includes/cop01.h @@ -19,7 +19,7 @@ struct _cop01_state /* sound-related */ int pulse; - int timer; // kludge for ym3526 in mightguy + int timer; // kludge for ym3526 in mightguy /* devices */ const device_config *audiocpu; diff --git a/src/mame/includes/cyberbal.h b/src/mame/includes/cyberbal.h index 7cfa837333f..a59413bb283 100644 --- a/src/mame/includes/cyberbal.h +++ b/src/mame/includes/cyberbal.h @@ -13,17 +13,17 @@ struct _cyberbal_state UINT16 * paletteram_0; UINT16 * paletteram_1; - UINT16 current_slip[2]; - UINT8 playfield_palette_bank[2]; - UINT16 playfield_xscroll[2]; - UINT16 playfield_yscroll[2]; + UINT16 current_slip[2]; + UINT8 playfield_palette_bank[2]; + UINT16 playfield_xscroll[2]; + UINT16 playfield_yscroll[2]; UINT8 * bank_base; - UINT8 fast_68k_int; + UINT8 fast_68k_int; UINT8 io_68k_int; - UINT8 sound_data_from_68k; + UINT8 sound_data_from_68k; UINT8 sound_data_from_6502; - UINT8 sound_data_from_68k_ready; + UINT8 sound_data_from_68k_ready; UINT8 sound_data_from_6502_ready; }; diff --git a/src/mame/includes/djboy.h b/src/mame/includes/djboy.h index 6068a182fbd..48f48555533 100644 --- a/src/mame/includes/djboy.h +++ b/src/mame/includes/djboy.h @@ -21,8 +21,8 @@ struct _djboy_state int prot_busy_count; UINT8 prot_output_buffer[PROT_OUTPUT_BUFFER_SIZE]; int prot_available_data_count; - int prot_offs; /* internal state */ - UINT8 prot_ram[0x80]; /* internal RAM */ + int prot_offs; /* internal state */ + UINT8 prot_ram[0x80]; /* internal RAM */ UINT8 prot_param[8]; int coin; int complete; diff --git a/src/mame/includes/dkong.h b/src/mame/includes/dkong.h index 62e4e28b266..ab6b8f5777a 100644 --- a/src/mame/includes/dkong.h +++ b/src/mame/includes/dkong.h @@ -25,7 +25,7 @@ * 256VF is not being used, so counting is from 248...255, 0...255, .... */ -#define MASTER_CLOCK XTAL_61_44MHz +#define MASTER_CLOCK XTAL_61_44MHz #define CLOCK_1H (MASTER_CLOCK / 5 / 4) #define CLOCK_16H (CLOCK_1H / 16) #define CLOCK_1VF ((CLOCK_16H) / 12 / 2) @@ -96,7 +96,7 @@ struct _dkong_state bitmap_t * bg_bits; const UINT8 * color_codes; emu_timer * scanline_timer; - INT8 vidhw; /* Selected video hardware RS Conversion / TKG04 */ + INT8 vidhw; /* Selected video hardware RS Conversion / TKG04 */ /* radar scope */ @@ -109,7 +109,7 @@ struct _dkong_state UINT8 rflip_sig; UINT8 star_ff; UINT8 blue_level; - double cd4049_a; + double cd4049_a; double cd4049_b; /* Specific states */ @@ -127,7 +127,7 @@ struct _dkong_state UINT16 grid_col; UINT8 sprite_bank; UINT8 dma_latch; - UINT8 flip; + UINT8 flip; /* reverse address lookup map - hunchbkd */ INT16 rev_map[0x200]; diff --git a/src/mame/includes/foodf.h b/src/mame/includes/foodf.h index 0428e13635c..09faf37fc91 100644 --- a/src/mame/includes/foodf.h +++ b/src/mame/includes/foodf.h @@ -11,12 +11,12 @@ struct _foodf_state { atarigen_state atarigen; - double rweights[3]; + double rweights[3]; double gweights[3]; double bweights[2]; - UINT8 playfield_flip; + UINT8 playfield_flip; - UINT8 whichport; + UINT8 whichport; }; diff --git a/src/mame/includes/gauntlet.h b/src/mame/includes/gauntlet.h index e16d841a66a..d528a119ec6 100644 --- a/src/mame/includes/gauntlet.h +++ b/src/mame/includes/gauntlet.h @@ -10,10 +10,10 @@ typedef struct _gauntlet_state gauntlet_state; struct _gauntlet_state { atarigen_state atarigen; - UINT16 sound_reset_val; - UINT8 vindctr2_screen_refresh; - UINT8 playfield_tile_bank; - UINT8 playfield_color_bank; + UINT16 sound_reset_val; + UINT8 vindctr2_screen_refresh; + UINT8 playfield_tile_bank; + UINT8 playfield_color_bank; }; diff --git a/src/mame/includes/harddriv.h b/src/mame/includes/harddriv.h index a8f7f16378c..ad9c07fbac5 100644 --- a/src/mame/includes/harddriv.h +++ b/src/mame/includes/harddriv.h @@ -21,8 +21,8 @@ struct _harddriv_state const device_config * jsacpu; const device_config * dsp32; - UINT8 hd34010_host_access; - UINT8 dsk_pio_access; + UINT8 hd34010_host_access; + UINT8 dsk_pio_access; UINT16 * msp_ram; UINT16 * dsk_ram; @@ -38,123 +38,123 @@ struct _harddriv_state UINT16 * stmsp_sync[3]; UINT16 * gsp_speedup_addr[2]; - offs_t gsp_speedup_pc; + offs_t gsp_speedup_pc; UINT16 * msp_speedup_addr; - offs_t msp_speedup_pc; + offs_t msp_speedup_pc; UINT16 * ds3_speedup_addr; - offs_t ds3_speedup_pc; - offs_t ds3_transfer_pc; + offs_t ds3_speedup_pc; + offs_t ds3_transfer_pc; UINT32 * rddsp32_sync[2]; - UINT32 gsp_speedup_count[4]; - UINT32 msp_speedup_count[4]; - UINT32 adsp_speedup_count[4]; + UINT32 gsp_speedup_count[4]; + UINT32 msp_speedup_count[4]; + UINT32 adsp_speedup_count[4]; UINT16 * sounddsp_ram; - UINT8 gsp_multisync; + UINT8 gsp_multisync; UINT8 * gsp_vram; UINT16 * gsp_control_lo; UINT16 * gsp_control_hi; UINT16 * gsp_paletteram_lo; UINT16 * gsp_paletteram_hi; - size_t gsp_vram_size; + size_t gsp_vram_size; /* driver state */ UINT32 * rddsp32_speedup; - offs_t rddsp32_speedup_pc; + offs_t rddsp32_speedup_pc; /* machine state */ - UINT8 irq_state; - UINT8 gsp_irq_state; - UINT8 msp_irq_state; - UINT8 adsp_irq_state; - UINT8 duart_irq_state; - - UINT8 duart_read_data[16]; - UINT8 duart_write_data[16]; - UINT8 duart_output_port; + UINT8 irq_state; + UINT8 gsp_irq_state; + UINT8 msp_irq_state; + UINT8 adsp_irq_state; + UINT8 duart_irq_state; + + UINT8 duart_read_data[16]; + UINT8 duart_write_data[16]; + UINT8 duart_output_port; const device_config * duart_timer; - UINT8 last_gsp_shiftreg; + UINT8 last_gsp_shiftreg; - UINT8 m68k_zp1; + UINT8 m68k_zp1; UINT8 m68k_zp2; - UINT8 m68k_adsp_buffer_bank; + UINT8 m68k_adsp_buffer_bank; - UINT8 adsp_halt; + UINT8 adsp_halt; UINT8 adsp_br; - UINT8 adsp_xflag; - UINT16 adsp_sim_address; - UINT16 adsp_som_address; - UINT32 adsp_eprom_base; + UINT8 adsp_xflag; + UINT16 adsp_sim_address; + UINT16 adsp_som_address; + UINT32 adsp_eprom_base; UINT16 * sim_memory; - UINT32 sim_memory_size; - UINT16 som_memory[0x8000/2]; + UINT32 sim_memory_size; + UINT16 som_memory[0x8000/2]; UINT16 * adsp_pgm_memory_word; - UINT8 ds3_gcmd; + UINT8 ds3_gcmd; UINT8 ds3_gflag; UINT8 ds3_g68irqs; UINT8 ds3_gfirqs; UINT8 ds3_g68flag; UINT8 ds3_send; UINT8 ds3_reset; - UINT16 ds3_gdata; + UINT16 ds3_gdata; UINT16 ds3_g68data; - UINT32 ds3_sim_address; + UINT32 ds3_sim_address; - UINT16 adc_control; - UINT8 adc8_select; - UINT8 adc8_data; - UINT8 adc12_select; - UINT8 adc12_byte; - UINT16 adc12_data; + UINT16 adc_control; + UINT8 adc8_select; + UINT8 adc8_data; + UINT8 adc12_select; + UINT8 adc12_byte; + UINT16 adc12_data; - UINT16 hdc68k_last_wheel; - UINT16 hdc68k_last_port1; - UINT8 hdc68k_wheel_edge; - UINT8 hdc68k_shifter_state; + UINT16 hdc68k_last_wheel; + UINT16 hdc68k_last_port1; + UINT8 hdc68k_wheel_edge; + UINT8 hdc68k_shifter_state; - UINT8 st68k_sloop_bank; - offs_t st68k_last_alt_sloop_offset; + UINT8 st68k_sloop_bank; + offs_t st68k_last_alt_sloop_offset; #define MAX_MSP_SYNC 16 UINT32 * dataptr[MAX_MSP_SYNC]; - UINT32 dataval[MAX_MSP_SYNC]; + UINT32 dataval[MAX_MSP_SYNC]; int next_msp_sync; /* audio state */ - UINT8 soundflag; - UINT8 mainflag; - UINT16 sounddata; - UINT16 maindata; + UINT8 soundflag; + UINT8 mainflag; + UINT16 sounddata; + UINT16 maindata; - UINT8 dacmute; - UINT8 cramen; - UINT8 irq68k; + UINT8 dacmute; + UINT8 cramen; + UINT8 irq68k; - offs_t sound_rom_offs; + offs_t sound_rom_offs; UINT8 * rombase; - UINT32 romsize; - UINT16 comram[0x400/2]; - UINT64 last_bio_cycles; + UINT32 romsize; + UINT16 comram[0x400/2]; + UINT64 last_bio_cycles; /* video state */ - offs_t vram_mask; + offs_t vram_mask; - UINT8 shiftreg_enable; + UINT8 shiftreg_enable; - UINT32 mask_table[65536 * 4]; + UINT32 mask_table[65536 * 4]; UINT8 * gsp_shiftreg_source; - INT8 gfx_finescroll; - UINT8 gfx_palettebank; + INT8 gfx_finescroll; + UINT8 gfx_palettebank; }; diff --git a/src/mame/includes/hyprduel.h b/src/mame/includes/hyprduel.h index 12baaf51739..5b20ad9c7b2 100644 --- a/src/mame/includes/hyprduel.h +++ b/src/mame/includes/hyprduel.h @@ -20,8 +20,8 @@ struct _hyprduel_state UINT16 * irq_enable; UINT16 * sharedram1; UINT16 * sharedram3; - UINT16 * spriteram; - UINT16 * paletteram; + UINT16 * spriteram; + UINT16 * paletteram; size_t tiletable_size; size_t spriteram_size; diff --git a/src/mame/includes/konamigx.h b/src/mame/includes/konamigx.h index 10dd9028fe8..b31d65a0247 100644 --- a/src/mame/includes/konamigx.h +++ b/src/mame/includes/konamigx.h @@ -32,8 +32,8 @@ int K055555GX_decode_osmixcolor(int layer, int *color); x------------------------------- (bit 31 : full shadow) */ #define K055555_COLORMASK 0x0000ffff -#define K055555_MIXSHIFT 16 -#define K055555_BRTSHIFT 18 +#define K055555_MIXSHIFT 16 +#define K055555_BRTSHIFT 18 #define K055555_SKIPSHADOW 0x40000000 #define K055555_FULLSHADOW 0x80000000 @@ -64,9 +64,9 @@ void konamigx_le2_sprite_callback(int *code, int *color, int *priority); // Sub Layer Flags #define GXSUB_K053250 0x10 // chip type: 0=K053936 ROZ+, 1=K053250 LVC -#define GXSUB_4BPP 0x04 // 16 colors -#define GXSUB_5BPP 0x05 // 32 colors -#define GXSUB_8BPP 0x08 // 256 colors +#define GXSUB_4BPP 0x04 // 16 colors +#define GXSUB_5BPP 0x05 // 32 colors +#define GXSUB_8BPP 0x08 // 256 colors void konamigx_mixer(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, tilemap_t *sub1, int sub1flags, diff --git a/src/mame/includes/konamipt.h b/src/mame/includes/konamipt.h index 14103e41b4a..294574cfc22 100644 --- a/src/mame/includes/konamipt.h +++ b/src/mame/includes/konamipt.h @@ -14,8 +14,8 @@ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_##direction2 ) PORT_4WAY \ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY \ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY \ - PORT_BIT( 0x10, IP_ACTIVE_LOW, button1 ) \ - PORT_BIT( 0x20, IP_ACTIVE_LOW, button2 ) \ + PORT_BIT( 0x10, IP_ACTIVE_LOW, button1 ) \ + PORT_BIT( 0x20, IP_ACTIVE_LOW, button2 ) \ PORT_BIT( 0x40, IP_ACTIVE_LOW, button3 ) #define KONAMI8_COCKTAIL_4WAY( direction1, direction2, button1, button2, button3 ) \ @@ -23,8 +23,8 @@ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_##direction2 ) PORT_4WAY PORT_COCKTAIL \ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_COCKTAIL \ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_COCKTAIL \ - PORT_BIT( 0x10, IP_ACTIVE_LOW, button1 ) PORT_COCKTAIL \ - PORT_BIT( 0x20, IP_ACTIVE_LOW, button2 ) PORT_COCKTAIL \ + PORT_BIT( 0x10, IP_ACTIVE_LOW, button1 ) PORT_COCKTAIL \ + PORT_BIT( 0x20, IP_ACTIVE_LOW, button2 ) PORT_COCKTAIL \ PORT_BIT( 0x40, IP_ACTIVE_LOW, button3 ) PORT_COCKTAIL #define KONAMI8_MONO_8WAY( direction1, direction2, button1, button2, button3 ) \ @@ -32,8 +32,8 @@ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_##direction2 ) PORT_8WAY \ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY \ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY \ - PORT_BIT( 0x10, IP_ACTIVE_LOW, button1 ) \ - PORT_BIT( 0x20, IP_ACTIVE_LOW, button2 ) \ + PORT_BIT( 0x10, IP_ACTIVE_LOW, button1 ) \ + PORT_BIT( 0x20, IP_ACTIVE_LOW, button2 ) \ PORT_BIT( 0x40, IP_ACTIVE_LOW, button3 ) #define KONAMI8_COCKTAIL_8WAY( direction1, direction2, button1, button2, button3 ) \ @@ -152,8 +152,8 @@ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(player) \ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(player) \ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(player) \ - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(player) \ - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(player) \ + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(player) \ + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(player) \ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN##player ) \ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START##player ) @@ -194,8 +194,8 @@ because they just need a few lines of code */ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(player) \ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(player) \ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(player) \ - PORT_BIT( 0x20, IP_ACTIVE_LOW, button1 ) PORT_PLAYER(player) \ - PORT_BIT( 0x40, IP_ACTIVE_LOW, button2 ) PORT_PLAYER(player) \ + PORT_BIT( 0x20, IP_ACTIVE_LOW, button1 ) PORT_PLAYER(player) \ + PORT_BIT( 0x40, IP_ACTIVE_LOW, button2 ) PORT_PLAYER(player) \ PORT_BIT( 0x80, IP_ACTIVE_LOW, button3 ) PORT_PLAYER(player) #define KONAMI8_ALT_B12( player ) \ diff --git a/src/mame/includes/mario.h b/src/mame/includes/mario.h index 4f43c3dfcdf..6c3d498694c 100644 --- a/src/mame/includes/mario.h +++ b/src/mame/includes/mario.h @@ -8,7 +8,7 @@ * 7C -> 100 => 256 - 124 = 132 ==> 264 Scanlines */ -#define MASTER_CLOCK XTAL_24MHz +#define MASTER_CLOCK XTAL_24MHz #define PIXEL_CLOCK (MASTER_CLOCK / 4) #define CLOCK_1H (MASTER_CLOCK / 8) #define CLOCK_16H (CLOCK_1H / 16) diff --git a/src/mame/includes/midyunit.h b/src/mame/includes/midyunit.h index ecbbbb36217..d0d2d56fe30 100644 --- a/src/mame/includes/midyunit.h +++ b/src/mame/includes/midyunit.h @@ -9,7 +9,7 @@ /*----------- defined in machine/midyunit.c -----------*/ extern UINT16 *midyunit_cmos_ram; -extern UINT32 midyunit_cmos_page; +extern UINT32 midyunit_cmos_page; WRITE16_HANDLER( midyunit_cmos_w ); READ16_HANDLER( midyunit_cmos_r ); diff --git a/src/mame/includes/namcos2.h b/src/mame/includes/namcos2.h index a4d3e9276ee..654d1b39117 100644 --- a/src/mame/includes/namcos2.h +++ b/src/mame/includes/namcos2.h @@ -210,7 +210,7 @@ void namcos2_adjust_posirq_timer( running_machine *machine, int scanline ); /* SLAVE CPU RAM MEMORY */ /**************************************************************/ -#define NAMCOS2_68K_SLAVE_RAM "bank4" +#define NAMCOS2_68K_SLAVE_RAM "bank4" /**************************************************************/ /* */ diff --git a/src/mame/includes/phoenix.h b/src/mame/includes/phoenix.h index c917ddae294..9c9bc88c5a7 100644 --- a/src/mame/includes/phoenix.h +++ b/src/mame/includes/phoenix.h @@ -4,7 +4,7 @@ /*----------- video timing -----------*/ -#define MASTER_CLOCK XTAL_11MHz +#define MASTER_CLOCK XTAL_11MHz #define PIXEL_CLOCK (MASTER_CLOCK/2) #define CPU_CLOCK (PIXEL_CLOCK) diff --git a/src/mame/includes/relief.h b/src/mame/includes/relief.h index 26146f73d30..f933d6c5293 100644 --- a/src/mame/includes/relief.h +++ b/src/mame/includes/relief.h @@ -11,9 +11,9 @@ struct _relief_state { atarigen_state atarigen; - UINT8 ym2413_volume; - UINT8 overall_volume; - UINT32 adpcm_bank_base; + UINT8 ym2413_volume; + UINT8 overall_volume; + UINT32 adpcm_bank_base; }; diff --git a/src/mame/includes/st0016.h b/src/mame/includes/st0016.h index 0743e47bd25..3a05a1304f4 100644 --- a/src/mame/includes/st0016.h +++ b/src/mame/includes/st0016.h @@ -37,17 +37,17 @@ extern UINT8 *st0016_charram; extern UINT8 *macs_ram1,*macs_ram2; READ8_HANDLER(st0016_dma_r); -WRITE8_HANDLER (st0016_sprite_bank_w); -WRITE8_HANDLER (st0016_palette_bank_w); -WRITE8_HANDLER (st0016_character_bank_w); -READ8_HANDLER (st0016_sprite_ram_r); -WRITE8_HANDLER (st0016_sprite_ram_w); -READ8_HANDLER (st0016_sprite2_ram_r); -WRITE8_HANDLER (st0016_sprite2_ram_w); -READ8_HANDLER (st0016_palette_ram_r); -WRITE8_HANDLER (st0016_palette_ram_w); -READ8_HANDLER (st0016_character_ram_r); -WRITE8_HANDLER (st0016_character_ram_w); +WRITE8_HANDLER (st0016_sprite_bank_w); +WRITE8_HANDLER (st0016_palette_bank_w); +WRITE8_HANDLER (st0016_character_bank_w); +READ8_HANDLER (st0016_sprite_ram_r); +WRITE8_HANDLER (st0016_sprite_ram_w); +READ8_HANDLER (st0016_sprite2_ram_r); +WRITE8_HANDLER (st0016_sprite2_ram_w); +READ8_HANDLER (st0016_palette_ram_r); +WRITE8_HANDLER (st0016_palette_ram_w); +READ8_HANDLER (st0016_character_ram_r); +WRITE8_HANDLER (st0016_character_ram_w); READ8_HANDLER (st0016_vregs_r); WRITE8_HANDLER (st0016_vregs_w); diff --git a/src/mame/includes/toobin.h b/src/mame/includes/toobin.h index c0b791c2391..05539bdfd64 100644 --- a/src/mame/includes/toobin.h +++ b/src/mame/includes/toobin.h @@ -13,7 +13,7 @@ struct _toobin_state UINT16 * interrupt_scan; - double brightness; + double brightness; bitmap_t * pfbitmap; }; diff --git a/src/mame/includes/vindictr.h b/src/mame/includes/vindictr.h index abec05afdf6..53b6ccd9d57 100644 --- a/src/mame/includes/vindictr.h +++ b/src/mame/includes/vindictr.h @@ -11,9 +11,9 @@ struct _vindictr_state { atarigen_state atarigen; - UINT8 playfield_tile_bank; - UINT16 playfield_xscroll; - UINT16 playfield_yscroll; + UINT8 playfield_tile_bank; + UINT16 playfield_xscroll; + UINT16 playfield_yscroll; }; diff --git a/src/mame/includes/xybots.h b/src/mame/includes/xybots.h index 37aac1e7d8f..2862bed4c8b 100644 --- a/src/mame/includes/xybots.h +++ b/src/mame/includes/xybots.h @@ -11,7 +11,7 @@ struct _xybots_state { atarigen_state atarigen; - UINT16 h256; + UINT16 h256; }; diff --git a/src/mame/machine/amiga.c b/src/mame/machine/amiga.c index 5378c372cfa..f3859b75c09 100644 --- a/src/mame/machine/amiga.c +++ b/src/mame/machine/amiga.c @@ -80,75 +80,75 @@ static emu_timer * amiga_blitter_timer; const char *const amiga_custom_names[0x100] = { /* 0x000 */ - "BLTDDAT", "DMACONR", "VPOSR", "VHPOSR", - "DSKDATR", "JOY0DAT", "JOY1DAT", "CLXDAT", - "ADKCONR", "POT0DAT", "POT1DAT", "POTGOR", - "SERDATR", "DSKBYTR", "INTENAR", "INTREQR", + "BLTDDAT", "DMACONR", "VPOSR", "VHPOSR", + "DSKDATR", "JOY0DAT", "JOY1DAT", "CLXDAT", + "ADKCONR", "POT0DAT", "POT1DAT", "POTGOR", + "SERDATR", "DSKBYTR", "INTENAR", "INTREQR", /* 0x020 */ - "DSKPTH", "DSKPTL", "DSKLEN", "DSKDAT", - "REFPTR", "VPOSW", "VHPOSW", "COPCON", - "SERDAT", "SERPER", "POTGO", "JOYTEST", - "STREQU", "STRVBL", "STRHOR", "STRLONG", + "DSKPTH", "DSKPTL", "DSKLEN", "DSKDAT", + "REFPTR", "VPOSW", "VHPOSW", "COPCON", + "SERDAT", "SERPER", "POTGO", "JOYTEST", + "STREQU", "STRVBL", "STRHOR", "STRLONG", /* 0x040 */ - "BLTCON0", "BLTCON1", "BLTAFWM", "BLTALWM", - "BLTCPTH", "BLTCPTL", "BLTBPTH", "BLTBPTL", - "BLTAPTH", "BLTAPTL", "BLTDPTH", "BLTDPTL", - "BLTSIZE", "BLTCON0L", "BLTSIZV", "BLTSIZH", + "BLTCON0", "BLTCON1", "BLTAFWM", "BLTALWM", + "BLTCPTH", "BLTCPTL", "BLTBPTH", "BLTBPTL", + "BLTAPTH", "BLTAPTL", "BLTDPTH", "BLTDPTL", + "BLTSIZE", "BLTCON0L", "BLTSIZV", "BLTSIZH", /* 0x060 */ - "BLTCMOD", "BLTBMOD", "BLTAMOD", "BLTDMOD", + "BLTCMOD", "BLTBMOD", "BLTAMOD", "BLTDMOD", "UNK068", "UNK06A", "UNK06C", "UNK06E", - "BLTCDAT", "BLTBDAT", "BLTADAT", "UNK076", + "BLTCDAT", "BLTBDAT", "BLTADAT", "UNK076", "SPRHDAT", "BPLHDAT", "LISAID", "DSRSYNC", /* 0x080 */ - "COP1LCH", "COP1LCL", "COP2LCH", "COP2LCL", - "COPJMP1", "COPJMP2", "COPINS", "DIWSTRT", - "DIWSTOP", "DDFSTRT", "DDFSTOP", "DMACON", - "CLXCON", "INTENA", "INTREQ", "ADKCON", + "COP1LCH", "COP1LCL", "COP2LCH", "COP2LCL", + "COPJMP1", "COPJMP2", "COPINS", "DIWSTRT", + "DIWSTOP", "DDFSTRT", "DDFSTOP", "DMACON", + "CLXCON", "INTENA", "INTREQ", "ADKCON", /* 0x0A0 */ - "AUD0LCH", "AUD0LCL", "AUD0LEN", "AUD0PER", - "AUD0VOL", "AUD0DAT", "UNK0AC", "UNK0AE", - "AUD1LCH", "AUD1LCL", "AUD1LEN", "AUD1PER", - "AUD1VOL", "AUD1DAT", "UNK0BC", "UNK0BE", + "AUD0LCH", "AUD0LCL", "AUD0LEN", "AUD0PER", + "AUD0VOL", "AUD0DAT", "UNK0AC", "UNK0AE", + "AUD1LCH", "AUD1LCL", "AUD1LEN", "AUD1PER", + "AUD1VOL", "AUD1DAT", "UNK0BC", "UNK0BE", /* 0x0C0 */ - "AUD2LCH", "AUD2LCL", "AUD2LEN", "AUD2PER", - "AUD2VOL", "AUD2DAT", "UNK0CC", "UNK0CE", - "AUD3LCH", "AUD3LCL", "AUD3LEN", "AUD3PER", - "AUD3VOL", "AUD3DAT", "UNK0DC", "UNK0DE", + "AUD2LCH", "AUD2LCL", "AUD2LEN", "AUD2PER", + "AUD2VOL", "AUD2DAT", "UNK0CC", "UNK0CE", + "AUD3LCH", "AUD3LCL", "AUD3LEN", "AUD3PER", + "AUD3VOL", "AUD3DAT", "UNK0DC", "UNK0DE", /* 0x0E0 */ - "BPL1PTH", "BPL1PTL", "BPL2PTH", "BPL2PTL", - "BPL3PTH", "BPL3PTL", "BPL4PTH", "BPL4PTL", - "BPL5PTH", "BPL5PTL", "BPL6PTH", "BPL6PTL", + "BPL1PTH", "BPL1PTL", "BPL2PTH", "BPL2PTL", + "BPL3PTH", "BPL3PTL", "BPL4PTH", "BPL4PTL", + "BPL5PTH", "BPL5PTL", "BPL6PTH", "BPL6PTL", "BPL7PTH", "BPL7PTL", "BPL8PTH", "BPL8PTL", /* 0x100 */ - "BPLCON0", "BPLCON1", "BPLCON2", "BPLCON3", - "BPL1MOD", "BPL2MOD", "BPLCON4", "CLXCON2", - "BPL1DAT", "BPL2DAT", "BPL3DAT", "BPL4DAT", - "BPL5DAT", "BPL6DAT", "BPL7DAT", "BPL8DAT", + "BPLCON0", "BPLCON1", "BPLCON2", "BPLCON3", + "BPL1MOD", "BPL2MOD", "BPLCON4", "CLXCON2", + "BPL1DAT", "BPL2DAT", "BPL3DAT", "BPL4DAT", + "BPL5DAT", "BPL6DAT", "BPL7DAT", "BPL8DAT", /* 0x120 */ - "SPR0PTH", "SPR0PTL", "SPR1PTH", "SPR1PTL", - "SPR2PTH", "SPR2PTL", "SPR3PTH", "SPR3PTL", - "SPR4PTH", "SPR4PTL", "SPR5PTH", "SPR5PTL", - "SPR6PTH", "SPR6PTL", "SPR7PTH", "SPR7PTL", + "SPR0PTH", "SPR0PTL", "SPR1PTH", "SPR1PTL", + "SPR2PTH", "SPR2PTL", "SPR3PTH", "SPR3PTL", + "SPR4PTH", "SPR4PTL", "SPR5PTH", "SPR5PTL", + "SPR6PTH", "SPR6PTL", "SPR7PTH", "SPR7PTL", /* 0x140 */ - "SPR0POS", "SPR0CTL", "SPR0DATA", "SPR0DATB", - "SPR1POS", "SPR1CTL", "SPR1DATA", "SPR1DATB", - "SPR2POS", "SPR2CTL", "SPR2DATA", "SPR2DATB", - "SPR3POS", "SPR3CTL", "SPR3DATA", "SPR3DATB", + "SPR0POS", "SPR0CTL", "SPR0DATA", "SPR0DATB", + "SPR1POS", "SPR1CTL", "SPR1DATA", "SPR1DATB", + "SPR2POS", "SPR2CTL", "SPR2DATA", "SPR2DATB", + "SPR3POS", "SPR3CTL", "SPR3DATA", "SPR3DATB", /* 0x160 */ - "SPR4POS", "SPR4CTL", "SPR4DATA", "SPR4DATB", - "SPR5POS", "SPR5CTL", "SPR5DATA", "SPR5DATB", - "SPR6POS", "SPR6CTL", "SPR6DATA", "SPR6DATB", - "SPR7POS", "SPR7CTL", "SPR7DATA", "SPR7DATB", + "SPR4POS", "SPR4CTL", "SPR4DATA", "SPR4DATB", + "SPR5POS", "SPR5CTL", "SPR5DATA", "SPR5DATB", + "SPR6POS", "SPR6CTL", "SPR6DATA", "SPR6DATB", + "SPR7POS", "SPR7CTL", "SPR7DATA", "SPR7DATB", /* 0x180 */ - "COLOR00", "COLOR01", "COLOR02", "COLOR03", - "COLOR04", "COLOR05", "COLOR06", "COLOR07", - "COLOR08", "COLOR09", "COLOR10", "COLOR11", - "COLOR12", "COLOR13", "COLOR14", "COLOR15", + "COLOR00", "COLOR01", "COLOR02", "COLOR03", + "COLOR04", "COLOR05", "COLOR06", "COLOR07", + "COLOR08", "COLOR09", "COLOR10", "COLOR11", + "COLOR12", "COLOR13", "COLOR14", "COLOR15", /* 0x1A0 */ - "COLOR16", "COLOR17", "COLOR18", "COLOR19", - "COLOR20", "COLOR21", "COLOR22", "COLOR23", - "COLOR24", "COLOR25", "COLOR26", "COLOR27", - "COLOR28", "COLOR29", "COLOR30", "COLOR31", + "COLOR16", "COLOR17", "COLOR18", "COLOR19", + "COLOR20", "COLOR21", "COLOR22", "COLOR23", + "COLOR24", "COLOR25", "COLOR26", "COLOR27", + "COLOR28", "COLOR29", "COLOR30", "COLOR31", /* 0x1C0 */ "HTOTAL", "HSSTOP", "HBSTRT", "HBSTOP", "VTOTAL", "VSSTOP", "VBSTRT", "VBSTOP", @@ -1023,7 +1023,7 @@ static void blitter_setup(const address_space *space) blittime /= 2; /* signal blitter busy */ - CUSTOM_REG(REG_DMACON) |= 0x4000; + CUSTOM_REG(REG_DMACON) |= 0x4000; /* set a timer */ timer_adjust_oneshot( amiga_blitter_timer, cpu_clocks_to_attotime( space->cpu, blittime ), 0); diff --git a/src/mame/machine/archimds.c b/src/mame/machine/archimds.c index 27e3727e87c..5b80c784848 100644 --- a/src/mame/machine/archimds.c +++ b/src/mame/machine/archimds.c @@ -277,7 +277,7 @@ static const char *const ioc_regnames[] = "(read) Keyboard receive (write) keyboard send", // 1 "?", "?", - "(read) IRQ status A", // 4 + "(read) IRQ status A", // 4 "(read) IRQ request A (write) IRQ clear", // 5 "(rw) IRQ mask A", // 6 "?", diff --git a/src/mame/machine/asic65.c b/src/mame/machine/asic65.c index 75ba688492f..a2b53b195ee 100644 --- a/src/mame/machine/asic65.c +++ b/src/mame/machine/asic65.c @@ -21,23 +21,23 @@ static struct _asic65_t { - UINT8 type; - int command; - UINT16 param[32]; - UINT16 yorigin; - UINT8 param_index; - UINT8 result_index; - UINT8 reset_state; - UINT8 last_bank; + UINT8 type; + int command; + UINT16 param[32]; + UINT16 yorigin; + UINT8 param_index; + UINT8 result_index; + UINT8 reset_state; + UINT8 last_bank; /* ROM-based interface states */ const device_config *cpu; UINT8 tfull; - UINT8 _68full; - UINT8 cmd; - UINT8 xflg; - UINT16 _68data; - UINT16 tdata; + UINT8 _68full; + UINT8 cmd; + UINT8 xflg; + UINT16 _68data; + UINT16 tdata; FILE * log; } asic65; @@ -75,7 +75,7 @@ static const UINT8 command_map[3][MAX_COMMANDS] = { { /* standard version */ - OP_UNKNOWN, OP_REFLECT, OP_CHECKSUM, OP_VERSION, /* 00-03 */ + OP_UNKNOWN, OP_REFLECT, OP_CHECKSUM, OP_VERSION, /* 00-03 */ OP_RAMTEST, OP_UNKNOWN, OP_UNKNOWN, OP_RESET, /* 04-07 */ OP_UNKNOWN, OP_UNKNOWN, OP_UNKNOWN, OP_UNKNOWN, /* 08-0b */ OP_UNKNOWN, OP_UNKNOWN, OP_TMATRIXMULT, OP_UNKNOWN, /* 0c-0f */ @@ -89,7 +89,7 @@ static const UINT8 command_map[3][MAX_COMMANDS] = }, { /* Steel Talons version */ - OP_UNKNOWN, OP_REFLECT, OP_CHECKSUM, OP_VERSION, /* 00-03 */ + OP_UNKNOWN, OP_REFLECT, OP_CHECKSUM, OP_VERSION, /* 00-03 */ OP_RAMTEST, OP_UNKNOWN, OP_UNKNOWN, OP_RESET, /* 04-07 */ OP_UNKNOWN, OP_UNKNOWN, OP_UNKNOWN, OP_UNKNOWN, /* 08-0b */ OP_UNKNOWN, OP_UNKNOWN, OP_UNKNOWN, OP_UNKNOWN, /* 0c-0f */ @@ -103,7 +103,7 @@ static const UINT8 command_map[3][MAX_COMMANDS] = }, { /* Guardians version */ - OP_UNKNOWN, OP_REFLECT, OP_CHECKSUM, OP_VERSION, /* 00-03 */ + OP_UNKNOWN, OP_REFLECT, OP_CHECKSUM, OP_VERSION, /* 00-03 */ OP_RAMTEST, OP_UNKNOWN, OP_UNKNOWN, OP_RESET, /* 04-07 */ OP_UNKNOWN, OP_UNKNOWN, OP_UNKNOWN, OP_UNKNOWN, /* 08-0b */ OP_UNKNOWN, OP_UNKNOWN, OP_INITBANKS, OP_SETBANK, /* 0c-0f */ diff --git a/src/mame/machine/asteroid.c b/src/mame/machine/asteroid.c index cf6636b6228..c98a0771880 100644 --- a/src/mame/machine/asteroid.c +++ b/src/mame/machine/asteroid.c @@ -75,7 +75,7 @@ READ8_HANDLER( asteroid_IN1_r ) if (res & bitmask) res = 0x80; else - res = ~0x80; + res = ~0x80; return res; } diff --git a/src/mame/machine/atarigen.h b/src/mame/machine/atarigen.h index 9ceede12b58..8462aa0330c 100644 --- a/src/mame/machine/atarigen.h +++ b/src/mame/machine/atarigen.h @@ -63,16 +63,16 @@ struct _atarigen_screen_timer typedef struct _atarigen_state atarigen_state; struct _atarigen_state { - UINT8 scanline_int_state; - UINT8 sound_int_state; - UINT8 video_int_state; + UINT8 scanline_int_state; + UINT8 sound_int_state; + UINT8 video_int_state; const UINT16 * eeprom_default; UINT16 * eeprom; - size_t eeprom_size; + size_t eeprom_size; - UINT8 cpu_to_sound_ready; - UINT8 sound_to_cpu_ready; + UINT8 cpu_to_sound_ready; + UINT8 sound_to_cpu_ready; UINT16 * playfield; UINT16 * playfield2; @@ -92,12 +92,12 @@ struct _atarigen_state UINT16 * atarivc_data; UINT16 * atarivc_eof_data; - atarivc_state_desc atarivc_state; + atarivc_state_desc atarivc_state; /* internal state */ - atarigen_int_func update_int_callback; + atarigen_int_func update_int_callback; - UINT8 eeprom_unlocked; + UINT8 eeprom_unlocked; UINT8 slapstic_num; UINT16 * slapstic; @@ -109,16 +109,16 @@ struct _atarigen_state offs_t slapstic_mirror; const device_config * sound_cpu; - UINT8 cpu_to_sound; - UINT8 sound_to_cpu; - UINT8 timed_int; - UINT8 ym2151_int; + UINT8 cpu_to_sound; + UINT8 sound_to_cpu; + UINT8 timed_int; + UINT8 ym2151_int; - atarigen_scanline_func scanline_callback; - UINT32 scanlines_per_callback; + atarigen_scanline_func scanline_callback; + UINT32 scanlines_per_callback; - UINT32 actual_vc_latch0; - UINT32 actual_vc_latch1; + UINT32 actual_vc_latch0; + UINT32 actual_vc_latch1; UINT8 atarivc_playfields; UINT32 playfield_latch; diff --git a/src/mame/machine/bfm_bd1.c b/src/mame/machine/bfm_bd1.c index 82ddd9dce52..2db67a73583 100644 --- a/src/mame/machine/bfm_bd1.c +++ b/src/mame/machine/bfm_bd1.c @@ -445,7 +445,7 @@ static int BD1_setdata(int id, int segdata, int data) if ( bd1[id].window_size <= 0 || (bd1[id].window_size > 16)) { // no window selected default to rotate mode - if ( mode == 2 ) mode = 0; + if ( mode == 2 ) mode = 0; else if ( mode == 3 ) mode = 1; //mode &= -2; } @@ -503,7 +503,7 @@ static int BD1_setdata(int id, int segdata, int data) { bd1[id].string[bd1[id].window_end] = BD1ASCII[data]; bd1[id].segments[bd1[id].cursor_pos] = segdata; - } + } else { bd1[id].string[bd1[id].window_end] = ' '; diff --git a/src/mame/machine/carpolo.c b/src/mame/machine/carpolo.c index 16633be81fb..12a4ca86d8d 100644 --- a/src/mame/machine/carpolo.c +++ b/src/mame/machine/carpolo.c @@ -48,8 +48,8 @@ #define COIN3_PRIORITY_LINE 5 #define COIN4_PRIORITY_LINE 4 #define BALL_SCREEN_PRIORITY_LINE 3 -#define CAR_CAR_PRIORITY_LINE 2 -#define CAR_GOAL_PRIORITY_LINE 1 +#define CAR_CAR_PRIORITY_LINE 2 +#define CAR_GOAL_PRIORITY_LINE 1 #define PRI0_PRIORTITY_LINE 0 /* priority 0 controls three different things */ diff --git a/src/mame/machine/cx4ops.c b/src/mame/machine/cx4ops.c index 9b64666d042..87050abca3b 100644 --- a/src/mame/machine/cx4ops.c +++ b/src/mame/machine/cx4ops.c @@ -134,7 +134,7 @@ static void CX4_op1f(running_machine *machine) cx4.C41FAngleRes = cx4.C41FAngleRes; if(cx4.C41FXVal < 0) { - cx4.C41FAngleRes += 0x100; + cx4.C41FAngleRes += 0x100; } cx4.C41FAngleRes &= 0x1ff; } diff --git a/src/mame/machine/daikaiju.c b/src/mame/machine/daikaiju.c index e279b4741c9..766765a2e02 100644 --- a/src/mame/machine/daikaiju.c +++ b/src/mame/machine/daikaiju.c @@ -110,7 +110,7 @@ displayed (game) or not (attract mode). Due to above bug message is always displ #define MCU_CONTROLS1 0x36 #define MCU_MESSAGE 0x40 #define MCU_CONTROLS2 0x44 -#define MCU_ID 0x60 +#define MCU_ID 0x60 #define MCU_ADDRESS1_LENGTH 2 #define MCU_ADDRESS2_LENGTH 2 @@ -170,9 +170,9 @@ WRITE8_HANDLER( daikaiju_mcu_w ) case MCU_ADDRESS1: SET_COMMAND(MCU_ADDRESS1_LENGTH); break; case MCU_ADDRESS2: SET_COMMAND(MCU_ADDRESS2_LENGTH); break; case MCU_CONTROLS1: SET_COMMAND(MCU_CONTROLS1_LENGTH); break; - case MCU_MESSAGE: SET_COMMAND(MCU_MESSAGE_LENGTH); break; + case MCU_MESSAGE: SET_COMMAND(MCU_MESSAGE_LENGTH); break; case MCU_CONTROLS2: SET_COMMAND(MCU_CONTROLS2_LENGTH); break; - case MCU_ID: SET_COMMAND(MCU_ID_LENGTH); break; + case MCU_ID: SET_COMMAND(MCU_ID_LENGTH); break; default: daikaiju_command=data; logerror("Unknown MCU command W %x %x \n",data,cpu_get_pc(space->cpu)); @@ -193,7 +193,7 @@ READ8_HANDLER( daikaiju_mcu_r ) return ID_DAIKAIJU; case MCU_CONTROLS1: - { + { int n; switch( (daikaiju_buffer[0]&0xf)^0xf) { diff --git a/src/mame/machine/dc.c b/src/mame/machine/dc.c index 93e558b95d7..6f1dfc69b98 100644 --- a/src/mame/machine/dc.c +++ b/src/mame/machine/dc.c @@ -179,7 +179,7 @@ INLINE int decode_reg32_64(running_machine *machine, UINT32 offset, UINT64 mem_m { reg++; *shift = 32; - } + } return reg; } @@ -203,7 +203,7 @@ INLINE int decode_reg3216_64(running_machine *machine, UINT32 offset, UINT64 mem { reg++; *shift = 32; - } + } return reg; } @@ -1107,8 +1107,8 @@ WRITE64_HANDLER( dc_g1_ctrl_w ) UINT64 shift; UINT32 old,dat; struct sh4_ddt_dma ddtdata; - UINT8 *ROM; - UINT32 dmaoffset; + UINT8 *ROM; + UINT32 dmaoffset; reg = decode_reg32_64(space->machine, offset, mem_mask, &shift); dat = (UINT32)(data >> shift); @@ -1127,16 +1127,16 @@ WRITE64_HANDLER( dc_g1_ctrl_w ) return; } // printf("ROM board DMA to %x len %x (PC %x)\n", g1bus_regs[SB_GDSTAR], g1bus_regs[SB_GDLEN], cpu_get_pc(space->cpu)); - ROM = (UINT8 *)devtag_get_info_ptr(space->machine, "rom_board", DEVINFO_PTR_MEMORY); - dmaoffset = (UINT32)devtag_get_info_int(space->machine, "rom_board", DEVINFO_INT_DMAOFFSET); + ROM = (UINT8 *)devtag_get_info_ptr(space->machine, "rom_board", DEVINFO_PTR_MEMORY); + dmaoffset = (UINT32)devtag_get_info_int(space->machine, "rom_board", DEVINFO_INT_DMAOFFSET); ddtdata.destination=g1bus_regs[SB_GDSTAR]; // destination address ddtdata.length=g1bus_regs[SB_GDLEN] >> 5; // words to transfer ddtdata.size=32; // bytes per word - ddtdata.buffer=ROM+dmaoffset; // buffer address + ddtdata.buffer=ROM+dmaoffset; // buffer address ddtdata.direction=1; // 0 source to buffer, 1 buffer to destination ddtdata.channel= -1; // not used ddtdata.mode= -1; // copy from/to buffer - mame_printf_verbose("G1CTRL: transfer %x from ROM %08x to sdram %08x\n", g1bus_regs[SB_GDLEN], dmaoffset, g1bus_regs[SB_GDSTAR]); + mame_printf_verbose("G1CTRL: transfer %x from ROM %08x to sdram %08x\n", g1bus_regs[SB_GDLEN], dmaoffset, g1bus_regs[SB_GDSTAR]); sh4_dma_ddt(cputag_get_cpu(space->machine, "maincpu"), &ddtdata); g1bus_regs[SB_GDST]=0; dc_sysctrl_regs[SB_ISTNRM] |= IST_DMA_GDROM; diff --git a/src/mame/machine/dec0.c b/src/mame/machine/dec0.c index 64058fe1e50..b03211f9e53 100644 --- a/src/mame/machine/dec0.c +++ b/src/mame/machine/dec0.c @@ -389,7 +389,7 @@ static void baddudes_i8751_write(running_machine *machine, int data) static void birdtry_i8751_write(running_machine *machine, int data) { - static int pwr, + static int pwr, hgt; i8751_return=0; @@ -429,22 +429,22 @@ static void birdtry_i8751_write(running_machine *machine, int data) /* 0x200-0x20f values are for shot height(STRONG=0x200<<-->>WEAK=0x20f). * * Returned value to i8751 doesn't matter,but send the result to 0x534. * * Higher the value,stronger is the height. */ - case 0x200: hgt = 0x5c0; break; /*H*/ - case 0x201: hgt = 0x580; break; /*|*/ - case 0x202: hgt = 0x540; break; /*|*/ - case 0x203: hgt = 0x500; break; /*|*/ - case 0x204: hgt = 0x4c0; break; /*|*/ - case 0x205: hgt = 0x480; break; /*|*/ - case 0x206: hgt = 0x440; break; /*|*/ - case 0x207: hgt = 0x400; break; /*M*/ - case 0x208: hgt = 0x3c0; break; /*|*/ - case 0x209: hgt = 0x380; break; /*|*/ - case 0x20a: hgt = 0x340; break; /*|*/ - case 0x20b: hgt = 0x300; break; /*|*/ - case 0x20c: hgt = 0x2c0; break; /*|*/ - case 0x20d: hgt = 0x280; break; /*|*/ - case 0x20e: hgt = 0x240; break; /*|*/ - case 0x20f: hgt = 0x200; break; /*L*/ + case 0x200: hgt = 0x5c0; break; /*H*/ + case 0x201: hgt = 0x580; break; /*|*/ + case 0x202: hgt = 0x540; break; /*|*/ + case 0x203: hgt = 0x500; break; /*|*/ + case 0x204: hgt = 0x4c0; break; /*|*/ + case 0x205: hgt = 0x480; break; /*|*/ + case 0x206: hgt = 0x440; break; /*|*/ + case 0x207: hgt = 0x400; break; /*M*/ + case 0x208: hgt = 0x3c0; break; /*|*/ + case 0x209: hgt = 0x380; break; /*|*/ + case 0x20a: hgt = 0x340; break; /*|*/ + case 0x20b: hgt = 0x300; break; /*|*/ + case 0x20c: hgt = 0x2c0; break; /*|*/ + case 0x20d: hgt = 0x280; break; /*|*/ + case 0x20e: hgt = 0x240; break; /*|*/ + case 0x20f: hgt = 0x200; break; /*L*/ case 0x534: i8751_return = hgt; break; /*Shot height*/ /*At the ending screen(???)*/ diff --git a/src/mame/machine/decocass.c b/src/mame/machine/decocass.c index 65100a0a245..faa038887c1 100644 --- a/src/mame/machine/decocass.c +++ b/src/mame/machine/decocass.c @@ -308,7 +308,7 @@ static READ8_HANDLER( decocass_type1_latch_26_pass_3_inv_2_r ) LOG(3,(" %02x%s", prom[promaddr], (promaddr % 8) == 7 ? "\n" : "")); } state->firsttime = 0; - state->latch1 = 0; /* reset latch (??) */ + state->latch1 = 0; /* reset latch (??) */ } if (0 == (offset & E5XX_MASK)) @@ -388,7 +388,7 @@ static READ8_HANDLER( decocass_type1_pass_136_r ) LOG(3,(" %02x%s", prom[promaddr], (promaddr % 8) == 7 ? "\n" : "")); } state->firsttime = 0; - state->latch1 = 0; /* reset latch (??) */ + state->latch1 = 0; /* reset latch (??) */ } if (0 == (offset & E5XX_MASK)) @@ -468,7 +468,7 @@ static READ8_HANDLER( decocass_type1_latch_27_pass_3_inv_2_r ) LOG(3,(" %02x%s", prom[promaddr], (promaddr % 8) == 7 ? "\n" : "")); } state->firsttime = 0; - state->latch1 = 0; /* reset latch (??) */ + state->latch1 = 0; /* reset latch (??) */ } if (0 == (offset & E5XX_MASK)) @@ -548,7 +548,7 @@ static READ8_HANDLER( decocass_type1_latch_26_pass_5_inv_2_r ) LOG(3,(" %02x%s", prom[promaddr], (promaddr % 8) == 7 ? "\n" : "")); } state->firsttime = 0; - state->latch1 = 0; /* reset latch (??) */ + state->latch1 = 0; /* reset latch (??) */ } if (0 == (offset & E5XX_MASK)) @@ -630,7 +630,7 @@ static READ8_HANDLER( decocass_type1_latch_16_pass_3_inv_1_r ) LOG(3,(" %02x%s", prom[promaddr], (promaddr % 8) == 7 ? "\n" : "")); } state->firsttime = 0; - state->latch1 = 0; /* reset latch (??) */ + state->latch1 = 0; /* reset latch (??) */ } if (0 == (offset & E5XX_MASK)) @@ -1202,11 +1202,11 @@ READ8_HANDLER( decocass_e5xx_r ) UINT8 bot_eot = (tape_get_status_bits(state->cassette) >> 5) & 1; data = - (BIT(state->i8041_p1, 7) << 0) | /* D0 = P17 - REQ/ */ - (BIT(state->i8041_p2, 0) << 1) | /* D1 = P20 - FNO/ */ - (BIT(state->i8041_p2, 1) << 2) | /* D2 = P21 - EOT/ */ - (BIT(state->i8041_p2, 2) << 3) | /* D3 = P22 - ERR/ */ - ((bot_eot) << 4) | /* D4 = BOT/EOT (direct from drive) */ + (BIT(state->i8041_p1, 7) << 0) | /* D0 = P17 - REQ/ */ + (BIT(state->i8041_p2, 0) << 1) | /* D1 = P20 - FNO/ */ + (BIT(state->i8041_p2, 1) << 2) | /* D2 = P21 - EOT/ */ + (BIT(state->i8041_p2, 2) << 3) | /* D3 = P22 - ERR/ */ + ((bot_eot) << 4) | /* D4 = BOT/EOT (direct from drive) */ (1 << 5) | /* D5 floating input */ (1 << 6) | /* D6 floating input */ (!tape_is_present(state->cassette) << 7); /* D7 = cassette present */ diff --git a/src/mame/machine/decocass.h b/src/mame/machine/decocass.h index fde54b28753..c28fed78666 100644 --- a/src/mame/machine/decocass.h +++ b/src/mame/machine/decocass.h @@ -92,10 +92,10 @@ struct _decocass_state /* dongle type #4: status */ INT32 type4_ctrs; /* latched PROM address (E5x0 LSB, E5x1 MSB) */ - INT32 type4_latch; /* latched enable PROM (1100xxxx written to E5x1) */ + INT32 type4_latch; /* latched enable PROM (1100xxxx written to E5x1) */ /* dongle type #5: status */ - INT32 type5_latch; /* latched enable PROM (1100xxxx written to E5x1) */ + INT32 type5_latch; /* latched enable PROM (1100xxxx written to E5x1) */ /* devices */ const device_config *maincpu; diff --git a/src/mame/machine/decoprot.c b/src/mame/machine/decoprot.c index 8f9ccb1f913..fee5e1bde18 100644 --- a/src/mame/machine/decoprot.c +++ b/src/mame/machine/decoprot.c @@ -462,7 +462,7 @@ READ16_HANDLER( deco16_66_prot_r ) /* Mutant Fighter */ if (offset!=0x6a/2) mutantf_port_6a_hack=0x2866; - switch (offset*2) { + switch (offset*2) { case 0xac: /* Dip switches */ return input_port_read(space->machine, "DSW"); case 0xc2: /* Dip switches */ @@ -616,7 +616,7 @@ WRITE16_HANDLER( deco16_104_cninja_prot_w ) READ16_HANDLER( deco16_104_cninja_prot_r ) { - switch (offset<<1) { + switch (offset<<1) { case 0x80: /* Master level control */ return deco16_prot_ram[0]; @@ -1686,7 +1686,7 @@ READ32_HANDLER( deco16_146_fghthist_prot_r ) && addr!=0x5ae && addr!=0x50a && addr!=0x476 && addr!=0x328 && addr!=0x3e && addr!=0x558 // dbl check these later && addr!=0x444 && addr!=0x46a // confirmed && cpu_get_pc(space->cpu)!=0x16448 // hmm - && addr!=0x67a + && addr!=0x67a && addr!=0x6c2 && addr!=0xac && addr!=0x416 && addr!=0x2c2 // confirmed && addr!=0x3d8 && addr!=0x250 && addr!=0x306 && addr!=0x608 && addr!=0x52e // confirmed diff --git a/src/mame/machine/fddebug.c b/src/mame/machine/fddebug.c index 77288d4d36b..8d34b3f3042 100644 --- a/src/mame/machine/fddebug.c +++ b/src/mame/machine/fddebug.c @@ -151,7 +151,7 @@ #define OF_LONG (SIZE_LONG << 0) /* long size operation */ /* immediate sizes */ -#define OF_ISIZEMASK (SIZE_MASK << 3) +#define OF_ISIZEMASK (SIZE_MASK << 3) #define OF_IMMB (SIZE_BYTE << 3) /* immediate byte follows */ #define OF_IMMW (SIZE_WORD << 3) /* immediate word follows */ #define OF_IMML (SIZE_LONG << 3) /* immediate long follows */ @@ -220,7 +220,7 @@ static UINT8 * undobuff; /* array of possible instruction decodings */ static fd1094_possibility posslist[4*4*4*4*4]; -static int posscount; +static int posscount; /* array of possible seeds */ static UINT32 * possible_seed; @@ -894,8 +894,8 @@ static void execute_fdunlock(running_machine *machine, int ref, int params, cons /* support 0 or 1 parameters */ if (params != 1 || !debug_command_parameter_number(machine, param[0], &offset)) - offset = cpu_get_pc(cpu); - keyaddr = addr_to_keyaddr(offset / 2); + offset = cpu_get_pc(cpu); + keyaddr = addr_to_keyaddr(offset / 2); /* toggle the ignore PC status */ debug_console_printf(machine, "Unlocking PC %06X\n", (int)offset); @@ -936,8 +936,8 @@ static void execute_fdignore(running_machine *machine, int ref, int params, cons return; } if (params != 1 || !debug_command_parameter_number(machine, param[0], &offset)) - offset = cpu_get_pc(cpu); - offset /= 2; + offset = cpu_get_pc(cpu); + offset /= 2; /* toggle the ignore PC status */ ignorepc[offset] = !ignorepc[offset]; @@ -1035,13 +1035,13 @@ static void execute_fdpc(running_machine *machine, int ref, int params, const ch /* support 0 or 1 parameters */ if (!debug_command_parameter_number(machine, param[0], &newpc)) - newpc = cpu_get_pc(cpu); + newpc = cpu_get_pc(cpu); - /* set the new PC */ - cpu_set_reg(cpu, REG_GENPC, newpc); + /* set the new PC */ + cpu_set_reg(cpu, REG_GENPC, newpc); - /* recompute around that */ - instruction_hook(cpu, newpc); + /* recompute around that */ + instruction_hook(cpu, newpc); } diff --git a/src/mame/machine/gdcrypt.c b/src/mame/machine/gdcrypt.c index fee0e2dbb5b..8b60da7bb9b 100644 --- a/src/mame/machine/gdcrypt.c +++ b/src/mame/machine/gdcrypt.c @@ -171,7 +171,7 @@ static void des_generate_subkeys(const UINT64 key, UINT32 *subkeys) (DES_RIGHTSWAP[(r >> 20) & 0xf] << 5) | (DES_RIGHTSWAP[(r >> 28) & 0xf] << 4); - l &= 0x0fffffff; + l &= 0x0fffffff; r &= 0x0fffffff; @@ -204,7 +204,7 @@ static void des_generate_subkeys(const UINT64 key, UINT32 *subkeys) ((r >> 26) & DES_MASK_TABLE[20])| ((r >> 24) & DES_MASK_TABLE[21]); - subkeys[round*2+1] = + subkeys[round*2+1] = ((l << 15) & DES_MASK_TABLE[22])| ((l << 17) & DES_MASK_TABLE[23])| ((l << 10) & DES_MASK_TABLE[24])| @@ -261,7 +261,7 @@ static UINT64 des_encrypt_decrypt(int decrypt, UINT64 ret) l ^= DES_SBOX2[ (temp>>24) & 0x3f ]; subkey++; - temp = ((r>>3) | (r<<29)) ^ des_subkeys[subkey]; + temp = ((r>>3) | (r<<29)) ^ des_subkeys[subkey]; l ^= DES_SBOX7[ (temp>>0) & 0x3f ]; l ^= DES_SBOX5[ (temp>>8) & 0x3f ]; l ^= DES_SBOX3[ (temp>>16) & 0x3f ]; @@ -274,9 +274,9 @@ static UINT64 des_encrypt_decrypt(int decrypt, UINT64 ret) r ^= DES_SBOX6[ (temp>>8) & 0x3f ]; r ^= DES_SBOX4[ (temp>>16) & 0x3f ]; r ^= DES_SBOX2[ (temp>>24) & 0x3f ]; - subkey++; + subkey++; - temp = ((l>>3) | (l<<29)) ^ des_subkeys[subkey]; + temp = ((l>>3) | (l<<29)) ^ des_subkeys[subkey]; r ^= DES_SBOX7[ (temp>>0) & 0x3f ]; r ^= DES_SBOX5[ (temp>>8) & 0x3f ]; r ^= DES_SBOX3[ (temp>>16) & 0x3f ]; @@ -362,7 +362,7 @@ void naomi_game_decrypt(running_machine* machine, UINT64 key, UINT8* region, int ret = rev64(ret); ret = des_encrypt_decrypt(1, ret); ret = rev64(ret); - write_from_qword(region+i, ret); + write_from_qword(region+i, ret); } #ifdef MAME_DEBUG diff --git a/src/mame/machine/harddriv.c b/src/mame/machine/harddriv.c index 091abdab1c5..d1e74a00ce3 100644 --- a/src/mame/machine/harddriv.c +++ b/src/mame/machine/harddriv.c @@ -396,7 +396,7 @@ WRITE16_HANDLER( hd68k_wr0_write ) WRITE16_HANDLER( hd68k_wr1_write ) { if (offset == 0) { // logerror("Shifter Interface Latch = %02X\n", data); - } else { logerror("/WR1(%04X)=%02X\n", offset, data); + } else { logerror("/WR1(%04X)=%02X\n", offset, data); } } @@ -404,7 +404,7 @@ WRITE16_HANDLER( hd68k_wr1_write ) WRITE16_HANDLER( hd68k_wr2_write ) { if (offset == 0) { // logerror("Steering Wheel Latch = %02X\n", data); - } else { logerror("/WR2(%04X)=%02X\n", offset, data); + } else { logerror("/WR2(%04X)=%02X\n", offset, data); } } @@ -1859,9 +1859,9 @@ READ16_HANDLER( stmsp_speedup_r ) state->stmsp_sync[0][5] == 0 && /* 80060 */ state->stmsp_sync[0][6] == 0 && /* 80070 */ state->stmsp_sync[1][0] == 0 && /* 99680 */ - state->stmsp_sync[2][0] == 0xffff && /* 99d30 */ - state->stmsp_sync[2][1] == 0xffff && /* 99d40 */ - state->stmsp_sync[2][2] == 0 && /* 99d50 */ + state->stmsp_sync[2][0] == 0xffff && /* 99d30 */ + state->stmsp_sync[2][1] == 0xffff && /* 99d40 */ + state->stmsp_sync[2][2] == 0 && /* 99d50 */ cpu_get_pc(space->cpu) == 0x3c0) { state->msp_speedup_count[0]++; diff --git a/src/mame/machine/irobot.c b/src/mame/machine/irobot.c index dd1f523dd52..fcc154fa40c 100644 --- a/src/mame/machine/irobot.c +++ b/src/mame/machine/irobot.c @@ -21,7 +21,7 @@ * too high. */ -#define IR_TIMING 1 /* try to emulate MB and VG running time */ +#define IR_TIMING 1 /* try to emulate MB and VG running time */ #define DISASSEMBLE_MB_ROM 0 /* generate a disassembly of the mathbox ROMs */ #define IR_CPU_STATE(m) \ @@ -193,8 +193,8 @@ MACHINE_RESET( irobot ) UINT8 *MB = memory_region(machine, "mathbox"); /* initialize the memory regions */ - mbROM = MB + 0x00000; - mbRAM = MB + 0x0c000; + mbROM = MB + 0x00000; + mbRAM = MB + 0x0c000; comRAM[0] = MB + 0x0e000; comRAM[1] = MB + 0x0f000; @@ -562,7 +562,7 @@ TIMER_DEVICE_CALLBACK( irobot_irmb_done_callback ) Y = zresult -#define JUMP0 curop++; +#define JUMP0 curop++; #define JUMP1 if (cflag) curop = curop->nxtop; else curop++; #define JUMP2 if (!zresult) curop = curop->nxtop; else curop++; #define JUMP3 if (!nflag) curop = curop->nxtop; else curop++; diff --git a/src/mame/machine/kaneko16.c b/src/mame/machine/kaneko16.c index 3b8c35dd876..1759e0887d4 100644 --- a/src/mame/machine/kaneko16.c +++ b/src/mame/machine/kaneko16.c @@ -174,7 +174,7 @@ static INT16 calc_compute_x(void) else if ((hit.x1p >= hit.x2p) && (hit.x1p < (hit.x2p + hit.x2s))) // x1p inside x2 x_coll = (hit.x2s - (hit.x1p - hit.x2p)); else // normal/no overlap - x_coll = ((hit.x1s + hit.x2s)/2) - abs((hit.x1p + hit.x1s/2) - (hit.x2p + hit.x2s/2)); + x_coll = ((hit.x1s + hit.x2s)/2) - abs((hit.x1p + hit.x1s/2) - (hit.x2p + hit.x2s/2)); return x_coll; } @@ -2121,7 +2121,7 @@ void calc3_mcu_run(running_machine *machine) if (mcu_command == 0) return; logerror("%s : MCU executed command at %04X: %04X\n", - cpuexec_describe_context(machine),calc3_mcu_command_offset,mcu_command); + cpuexec_describe_context(machine),calc3_mcu_command_offset,mcu_command); if (mcu_command>0) diff --git a/src/mame/machine/leland.c b/src/mame/machine/leland.c index 33b7e2b4b36..ff67b4b6d6c 100644 --- a/src/mame/machine/leland.c +++ b/src/mame/machine/leland.c @@ -1362,7 +1362,7 @@ READ8_DEVICE_HANDLER( leland_sound_port_r ) WRITE8_DEVICE_HANDLER( leland_sound_port_w ) { /* update the graphics banking */ - leland_gfx_port_w(device, 0, data); + leland_gfx_port_w(device, 0, data); /* set the new value */ leland_gfx_control = data; diff --git a/src/mame/machine/mcr.c b/src/mame/machine/mcr.c index ef671e76ec2..0014e0f16bc 100644 --- a/src/mame/machine/mcr.c +++ b/src/mame/machine/mcr.c @@ -236,10 +236,10 @@ const z80_daisy_chain mcr_ipu_daisy_chain[] = Z80CTC_INTERFACE( mcr_ctc_intf ) { 0, /* timer disables */ - DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), /* interrupt handler */ + DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), /* interrupt handler */ DEVCB_LINE(z80ctc_trg1_w), /* ZC/TO0 callback */ - DEVCB_NULL, /* ZC/TO1 callback */ - DEVCB_NULL /* ZC/TO2 callback */ + DEVCB_NULL, /* ZC/TO1 callback */ + DEVCB_NULL /* ZC/TO2 callback */ }; @@ -249,7 +249,7 @@ Z80CTC_INTERFACE( nflfoot_ctc_intf ) DEVCB_CPU_INPUT_LINE("ipu", INPUT_LINE_IRQ0), /* interrupt handler */ DEVCB_NULL, /* ZC/TO0 callback */ DEVCB_NULL, /* ZC/TO1 callback */ - DEVCB_NULL /* ZC/TO2 callback */ + DEVCB_NULL /* ZC/TO2 callback */ }; diff --git a/src/mame/machine/mexico86.c b/src/mame/machine/mexico86.c index c6644b10d41..40069e47688 100644 --- a/src/mame/machine/mexico86.c +++ b/src/mame/machine/mexico86.c @@ -23,7 +23,7 @@ bit 0 = ? (unused?) WRITE8_HANDLER( mexico86_f008_w ) { cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, (data & 4) ? CLEAR_LINE : ASSERT_LINE); - if (cputag_get_cpu(space->machine, "mcu") != NULL) + if (cputag_get_cpu(space->machine, "mcu") != NULL) { // mexico 86, knight boy cputag_set_input_line(space->machine, "mcu", INPUT_LINE_RESET, (data & 2) ? CLEAR_LINE : ASSERT_LINE); diff --git a/src/mame/machine/midtunit.c b/src/mame/machine/midtunit.c index 939a2be9e33..c5af044dfc1 100644 --- a/src/mame/machine/midtunit.c +++ b/src/mame/machine/midtunit.c @@ -30,16 +30,16 @@ static UINT8 chip_type; static UINT8 fake_sound_state; /* protection */ -static UINT8 mk_prot_index; -static UINT16 mk2_prot_data; +static UINT8 mk_prot_index; +static UINT16 mk2_prot_data; static const UINT32 *nbajam_prot_table; static UINT16 nbajam_prot_queue[5]; static UINT8 nbajam_prot_index; static const UINT8 *jdredd_prot_table; -static UINT8 jdredd_prot_index; -static UINT8 jdredd_prot_max; +static UINT8 jdredd_prot_index; +static UINT8 jdredd_prot_max; diff --git a/src/mame/machine/midwayic.c b/src/mame/machine/midwayic.c index 852a41c731c..e14f0ee4ece 100644 --- a/src/mame/machine/midwayic.c +++ b/src/mame/machine/midwayic.c @@ -56,7 +56,7 @@ struct pic_state UINT8 nvram_addr; UINT8 buffer[0x10]; UINT8 nvram[PIC_NVRAM_SIZE]; - UINT8 default_nvram[PIC_NVRAM_SIZE]; + UINT8 default_nvram[PIC_NVRAM_SIZE]; UINT8 time_buf[8]; UINT8 time_index; UINT8 time_just_written; @@ -73,7 +73,7 @@ struct ioasic_state UINT8 shuffle_type; UINT8 shuffle_active; const UINT8 * shuffle_map; - void (*irq_callback)(running_machine *, int); + void (*irq_callback)(running_machine *, int); UINT8 irq_state; UINT16 sound_irq_state; UINT8 auto_ack; diff --git a/src/mame/machine/midyunit.c b/src/mame/machine/midyunit.c index 9fe6993ed40..b872850845e 100644 --- a/src/mame/machine/midyunit.c +++ b/src/mame/machine/midyunit.c @@ -36,7 +36,7 @@ static UINT8 term2_analog_select; /* CMOS-related variables */ UINT16 *midyunit_cmos_ram; - UINT32 midyunit_cmos_page; + UINT32 midyunit_cmos_page; static UINT8 cmos_w_enable; /* sound-related variables */ diff --git a/src/mame/machine/mw8080bw.c b/src/mame/machine/mw8080bw.c index eaa08000ae6..7539a101b33 100644 --- a/src/mame/machine/mw8080bw.c +++ b/src/mame/machine/mw8080bw.c @@ -44,7 +44,7 @@ static int vysnc_chain_counter_to_vpos( UINT8 counter, int vblank ) static TIMER_CALLBACK( mw8080bw_interrupt_callback ) { - mw8080bw_state *state = (mw8080bw_state *)machine->driver_data; + mw8080bw_state *state = (mw8080bw_state *)machine->driver_data; UINT8 next_counter; int next_vpos; int next_vblank; @@ -74,14 +74,14 @@ static TIMER_CALLBACK( mw8080bw_interrupt_callback ) static void mw8080bw_create_interrupt_timer( running_machine *machine ) { - mw8080bw_state *state = (mw8080bw_state *)machine->driver_data; + mw8080bw_state *state = (mw8080bw_state *)machine->driver_data; state->interrupt_timer = timer_alloc(machine, mw8080bw_interrupt_callback, NULL); } static void mw8080bw_start_interrupt_timer( running_machine *machine ) { - mw8080bw_state *state = (mw8080bw_state *)machine->driver_data; + mw8080bw_state *state = (mw8080bw_state *)machine->driver_data; int vpos = vysnc_chain_counter_to_vpos(MW8080BW_INT_TRIGGER_COUNT_1, MW8080BW_INT_TRIGGER_VBLANK_1); timer_adjust_oneshot(state->interrupt_timer, video_screen_get_time_until_pos(machine->primary_screen, vpos, 0), 0); } @@ -96,7 +96,7 @@ static void mw8080bw_start_interrupt_timer( running_machine *machine ) MACHINE_START( mw8080bw ) { - mw8080bw_state *state = (mw8080bw_state *)machine->driver_data; + mw8080bw_state *state = (mw8080bw_state *)machine->driver_data; mw8080bw_create_interrupt_timer(machine); diff --git a/src/mame/machine/namco51.c b/src/mame/machine/namco51.c index 421dc198276..3e6d60f581c 100644 --- a/src/mame/machine/namco51.c +++ b/src/mame/machine/namco51.c @@ -63,7 +63,7 @@ #define LOG(x) do { if (VERBOSE) logerror x; } while (0) -#define READ_PORT(st,num) devcb_call_read8(&(st)->in[num], 0) +#define READ_PORT(st,num) devcb_call_read8(&(st)->in[num], 0) #define WRITE_PORT(st,num,data) devcb_call_write8(&(st)->out[num], 0, data) diff --git a/src/mame/machine/namco51.h b/src/mame/machine/namco51.h index 56e0f657b9a..a5a46337bed 100644 --- a/src/mame/machine/namco51.h +++ b/src/mame/machine/namco51.h @@ -8,7 +8,7 @@ typedef struct _namco_51xx_interface namco_51xx_interface; struct _namco_51xx_interface { devcb_read8 in[4]; /* read handlers for ports A-D */ - devcb_write8 out[2]; /* write handlers for ports A-B */ + devcb_write8 out[2]; /* write handlers for ports A-B */ }; diff --git a/src/mame/machine/namco53.c b/src/mame/machine/namco53.c index bbbb5bfdd63..7ff0d63c342 100644 --- a/src/mame/machine/namco53.c +++ b/src/mame/machine/namco53.c @@ -66,9 +66,9 @@ struct _namco_53xx_state { const device_config * cpu; UINT8 portO; - devcb_resolved_read8 k; - devcb_resolved_read8 in[4]; - devcb_resolved_write8 p; + devcb_resolved_read8 k; + devcb_resolved_read8 in[4]; + devcb_resolved_write8 p; }; INLINE namco_53xx_state *get_safe_token(const device_config *device) diff --git a/src/mame/machine/namcos2.c b/src/mame/machine/namcos2.c index 4dca207aa0a..3e4e59305b7 100644 --- a/src/mame/machine/namcos2.c +++ b/src/mame/machine/namcos2.c @@ -202,7 +202,7 @@ READ16_HANDLER( namcos2_68k_serial_comms_ctrl_r ) switch(offset){ case 0x00: - retval |= 0x0004; /* Set READY? status bit */ + retval |= 0x0004; /* Set READY? status bit */ break; default: diff --git a/src/mame/machine/naomibd.c b/src/mame/machine/naomibd.c index e804e60c30f..0072f1aa51d 100644 --- a/src/mame/machine/naomibd.c +++ b/src/mame/machine/naomibd.c @@ -429,7 +429,7 @@ READ64_DEVICE_HANDLER( naomibd_r ) printf("naomibd: PIO read count %x\n", v->prot_pio_count); #endif - if (v->prot_reverse_bytes) + if (v->prot_reverse_bytes) { ret = (UINT64)(prot[byte_offset+1] | (prot[byte_offset]<<8)); } diff --git a/src/mame/machine/neoboot.c b/src/mame/machine/neoboot.c index 5bb8cb82907..6ccad38c388 100644 --- a/src/mame/machine/neoboot.c +++ b/src/mame/machine/neoboot.c @@ -451,13 +451,13 @@ void decrypt_cthd2003( running_machine *machine ) memcpy(romdata, tmp, 8*128*128); romdata = memory_region(machine, "audiocpu")+0x10000; - memcpy(tmp+8*0*128, romdata+8*0*128, 8*32*128); + memcpy(tmp+8*0*128, romdata+8*0*128, 8*32*128); memcpy(tmp+8*32*128, romdata+8*64*128, 8*32*128); - memcpy(tmp+8*64*128, romdata+8*32*128, 8*32*128); + memcpy(tmp+8*64*128, romdata+8*32*128, 8*32*128); memcpy(tmp+8*96*128, romdata+8*96*128, 8*32*128); memcpy(romdata, tmp, 8*128*128); - free(tmp); + free(tmp); memcpy(romdata-0x10000,romdata,0x10000); @@ -505,18 +505,18 @@ void patch_cthd2003( running_machine *machine ) { mem16[i] -= 0x7000; mem16[i+1] -= 0x0010; - } + } // Fix for green dots on title page for (i=0xac500/2;i < 0xac520/2; i=i+1) { mem16[i] = 0xFFFF; } - // Fix for blanks as screen change level end clear + // Fix for blanks as screen change level end clear mem16[0x991d0/2] = 0xdd03; mem16[0x99306/2] = 0xdd03; mem16[0x99354/2] = 0xdd03; - mem16[0x9943e/2] = 0xdd03; + mem16[0x9943e/2] = 0xdd03; } @@ -613,18 +613,18 @@ void patch_ct2k3sa( running_machine *machine ) { mem16[i] -= 0x7000; mem16[i+1] -= 0x0010; - } + } // Fix for green dots on title page for (i=0xac500/2;i < 0xac520/2; i=i+1) { mem16[i] = 0xFFFF; } - // Fix for blanks as screen change level end clear + // Fix for blanks as screen change level end clear mem16[0x991d0/2] = 0xdd03; mem16[0x99306/2] = 0xdd03; mem16[0x99354/2] = 0xdd03; - mem16[0x9943e/2] = 0xdd03; + mem16[0x9943e/2] = 0xdd03; } diff --git a/src/mame/machine/neoprot.c b/src/mame/machine/neoprot.c index 5b8b3308ecb..795a600c492 100644 --- a/src/mame/machine/neoprot.c +++ b/src/mame/machine/neoprot.c @@ -165,7 +165,7 @@ void mslugx_install_protection( running_machine *machine ) for (i = 0;i < (0x100000/2) - 4;i++) { if (mem16[i + 0] == 0x0243 && - mem16[i + 1] == 0x0001 && /* andi.w #$1, D3 */ + mem16[i + 1] == 0x0001 && /* andi.w #$1, D3 */ mem16[i + 2] == 0x6600) /* bne xxxx */ { mem16[i + 2] = 0x4e71; diff --git a/src/mame/machine/pgmprot.c b/src/mame/machine/pgmprot.c index 96963ccbfca..1b7a48cabd9 100644 --- a/src/mame/machine/pgmprot.c +++ b/src/mame/machine/pgmprot.c @@ -245,7 +245,7 @@ WRITE16_HANDLER( pstars_w ) case 0xa0: state->pstars_val = pstar_a0[state->pstars_int[0]]; - break; + break; case 0x9d: state->pstars_val = pstar_9d[state->pstars_int[0]]; @@ -260,7 +260,7 @@ WRITE16_HANDLER( pstars_w ) break; case 0x80: - state->pstars_val = pstar_80[state->pstars_int[0]]; + state->pstars_val = pstar_80[state->pstars_int[0]]; break; default: @@ -509,13 +509,13 @@ READ16_HANDLER( asic28_r ) break; case 0xcc: //BG - { - int y = state->asic_params[0xcc]; + { + int y = state->asic_params[0xcc]; if (y & 0x400) //y is signed (probably x too and it also applies to TXT, but I've never seen it used) y =- (0x400 - (y & 0x3ff)); val = 0x900000 + (((state->asic_params[0xcb] + (y) * 64) * 4) /*&0x1fff*/); - } - break; + } + break; case 0xd0: //txt palette val = 0xa01000 + (state->asic28_regs[0] << 5); diff --git a/src/mame/machine/pxa255.h b/src/mame/machine/pxa255.h index 8943908a490..46676491dcc 100644 --- a/src/mame/machine/pxa255.h +++ b/src/mame/machine/pxa255.h @@ -37,7 +37,7 @@ #define PXA255_DCSR_REQPEND (0x00000100) #define PXA255_DCSR_STOPSTATE (0x00000008) #define PXA255_DCSR_ENDINTR (0x00000004) - #define PXA255_DCSR_STARTINTR (0x00000002) + #define PXA255_DCSR_STARTINTR (0x00000002) #define PXA255_DCSR_BUSERRINTR (0x00000001) #define PXA255_DINT (PXA255_DMA_BASE_ADDR + 0x000000f0) #define PXA255_DRCMR0 (PXA255_DMA_BASE_ADDR + 0x00000100) diff --git a/src/mame/machine/s16fd.c b/src/mame/machine/s16fd.c index 505b271a80c..bc6b93df150 100644 --- a/src/mame/machine/s16fd.c +++ b/src/mame/machine/s16fd.c @@ -217,7 +217,7 @@ void fd1094_driver_init(running_machine *machine, const char* tag, void (*set_de fd1094_cacheregion[i] = auto_alloc_array(machine, UINT16, fd1094_cpuregionsize / 2); fd1094_cached_states[i] = -1; } - fd1094_current_cacheposition = 0; + fd1094_current_cacheposition = 0; fd1094_state = -1; /* key debugging */ diff --git a/src/mame/machine/scramble.c b/src/mame/machine/scramble.c index f984370d3e0..85e83dfa755 100644 --- a/src/mame/machine/scramble.c +++ b/src/mame/machine/scramble.c @@ -155,7 +155,7 @@ const ppi8255_interface scramble_ppi_0_intf = DEVCB_INPUT_PORT("IN2"), /* Port C read */ DEVCB_NULL, /* Port A write */ DEVCB_NULL, /* Port B write */ - DEVCB_NULL /* Port C write */ + DEVCB_NULL /* Port C write */ }; const ppi8255_interface scramble_ppi_1_intf = diff --git a/src/mame/machine/scudsp.c b/src/mame/machine/scudsp.c index a8bdde283f7..9cd20beedec 100644 --- a/src/mame/machine/scudsp.c +++ b/src/mame/machine/scudsp.c @@ -84,9 +84,9 @@ typedef union { } SCUDSPREG16; static struct { - UINT8 pc; /*Program Counter*/ + UINT8 pc; /*Program Counter*/ UINT8 delay; /* Delay */ - UINT8 top; /*Jump Command memory*/ + UINT8 top; /*Jump Command memory*/ UINT16 lop; /*Counter Register*/ /*12-bits*/ UINT8 ct0,ct1,ct2,ct3; /*Index for RAM*/ /*6-bits */ UINT32 md0[0x40],md1[0x40],md2[0x40],md3[0x40]; /*RAM memory*/ @@ -623,9 +623,9 @@ static void dsp_dma( const address_space *space ) case 2: add = 4; break; /* 2 */ case 3: add = 16; break; /* 4 */ case 4: add = 16; break; /* 8 */ - case 5: add = 64; break; /* 16 */ - case 6: add = 128; break; /* 32 */ - case 7: add = 256; break; /* 64 */ + case 5: add = 64; break; /* 16 */ + case 6: add = 128; break; /* 32 */ + case 7: add = 256; break; /* 64 */ } } @@ -796,7 +796,7 @@ void dsp_execute_program(const address_space *dmaspace) if ( log_file == NULL ) { log_file = fopen("dsp.log", "a"); - } + } for ( i = 0; i < 0x100; i++ ) { dsp_dasm_opcode( dsp_reg.internal_prg[ i ], dasm_buffer ); diff --git a/src/mame/machine/segacrpt.c b/src/mame/machine/segacrpt.c index 3e16e038f3e..ec6c066e5ea 100644 --- a/src/mame/machine/segacrpt.c +++ b/src/mame/machine/segacrpt.c @@ -1324,7 +1324,7 @@ void robowres_decode(running_machine *machine, const char *cputag) 0x45,0x14,0x55,0x01,0x40,0x11,0x50, 0x05,0x44,0x15,0x54,0x00,0x41,0x10, 0x05, 0x44,0x15,0x54,0x00,0x41,0x10,0x51, 0x04,0x45,0x14,0x55,0x01,0x40,0x11, 0x04, 0x45,0x14, - 0x00,0x41,0x10,0x51,0x04,0x45,0x14, 0x55,0x01,0x40,0x11,0x50,0x05,0x44, 0x55, + 0x00,0x41,0x10,0x51,0x04,0x45,0x14, 0x55,0x01,0x40,0x11,0x50,0x05,0x44, 0x55, 0x01,0x40,0x11,0x50,0x05,0x44,0x15, 0x54,0x00,0x41,0x10,0x51,0x04,0x45, 0x54, 0x00,0x41 }; diff --git a/src/mame/machine/segaic16.c b/src/mame/machine/segaic16.c index cc2a90ece08..a0a1fb67c42 100644 --- a/src/mame/machine/segaic16.c +++ b/src/mame/machine/segaic16.c @@ -48,7 +48,7 @@ struct multiply_chip struct divide_chip { - UINT16 regs[8]; + UINT16 regs[8]; }; diff --git a/src/mame/machine/seicop.c b/src/mame/machine/seicop.c index efe40cda751..8e8ffa21d9b 100644 --- a/src/mame/machine/seicop.c +++ b/src/mame/machine/seicop.c @@ -2028,10 +2028,10 @@ static void cop2_move2_prot(const address_space *space) case 0x10: xsrc++; break; //right case 0x30: xsrc--; break; //left case 0x40: ysrc--; break; //up - case 0x60: ysrc++; break; //down + case 0x60: ysrc++; break; //down case 0x08: ysrc--; xsrc++; break; //up-right case 0x38: ysrc--; xsrc--; break; //up-left - case 0x28: ysrc++; xsrc--; break; //down-left + case 0x28: ysrc++; xsrc--; break; //down-left case 0x18: ysrc++; xsrc++; break; //down-right } @@ -2246,7 +2246,7 @@ INLINE void cop_ram_w(cop_state *cop, UINT16 offset, UINT16 data) INLINE UINT32 r32(offs_t address) { - return (memory_read_word(space, address + 0) << 0) | + return (memory_read_word(space, address + 0) << 0) | (memory_read_word(space, address + 2) << 16); } diff --git a/src/mame/machine/snes.c b/src/mame/machine/snes.c index 4d4f2effe43..47a252f0099 100644 --- a/src/mame/machine/snes.c +++ b/src/mame/machine/snes.c @@ -176,7 +176,7 @@ static TIMER_CALLBACK( snes_scanline_tick ) timer_adjust_oneshot(snes_hirq_timer, video_screen_get_time_until_pos(machine->primary_screen, snes_ppu.beam.current_vert, pixel*snes_htmult), 0); } } - } + } /* Start of VBlank */ if( snes_ppu.beam.current_vert == snes_ppu.beam.last_visible_line ) @@ -677,7 +677,7 @@ READ8_HANDLER( snes_r_io ) // return (snes_ram[offset] & 0xdf) | (snes_open_bus_r(space,0) & 0x20); case BBAD0: case A1T0L: case A1T0H: case A1B0: case DAS0L: case DAS0H: case DSAB0: case A2A0L: case A2A0H: case NTRL0: - case BBAD1: case A1T1L: case A1T1H: case A1B1: case DAS1L: + case BBAD1: case A1T1L: case A1T1H: case A1B1: case DAS1L: case DAS1H: case DSAB1: case A2A1L: case A2A1H: case NTRL1: case BBAD2: case A1T2L: case A1T2H: case A1B2: case DAS2L: case DAS2H: case DSAB2: case A2A2L: case A2A2H: case NTRL2: diff --git a/src/mame/machine/snes7110.c b/src/mame/machine/snes7110.c index e065a9b91d1..81ee7f33b48 100644 --- a/src/mame/machine/snes7110.c +++ b/src/mame/machine/snes7110.c @@ -57,7 +57,7 @@ static const UINT8 spc7110_evolution_table[53][4] = { 0x05, 31, 34, 0 }, { 0x04, 33, 35, 0 }, { 0x04, 33, 36, 0 }, - { 0x03, 34, 37, 0 }, + { 0x03, 34, 37, 0 }, { 0x02, 35, 38, 0 }, { 0x02, 36, 5, 0 }, @@ -167,7 +167,7 @@ static SPC7110Decomp* SPC7110Decomp_ctor(running_machine *machine) { #define map(x, y) (((i >> x) & 1) << y) //2x8-bit - newclass->morton16[1][i] = map(7, 15) + map(6, 7) + map(5, 14) + map(4, 6) + newclass->morton16[1][i] = map(7, 15) + map(6, 7) + map(5, 14) + map(4, 6) + map(3, 13) + map(2, 5) + map(1, 12) + map(0, 4); newclass->morton16[0][i] = map(7, 11) + map(6, 3) + map(5, 10) + map(4, 2) + map(3, 9) + map(2, 1) + map(1, 8) + map(0, 0); @@ -846,7 +846,7 @@ typedef struct UINT32 dx_offset; UINT32 ex_offset; - UINT32 fx_offset; + UINT32 fx_offset; //==================== //real-time clock unit @@ -883,7 +883,7 @@ static void spc7110_init(running_machine* machine) snes_spc7110.r4813 = 0x00; snes_spc7110.r4814 = 0x00; snes_spc7110.r4815 = 0x00; - snes_spc7110.r4816 = 0x00; + snes_spc7110.r4816 = 0x00; snes_spc7110.r4817 = 0x00; snes_spc7110.r4818 = 0x00; @@ -1252,12 +1252,12 @@ static void spc7110_mmio_write(running_machine *machine, UINT32 addr, UINT8 data case 0x4817: snes_spc7110.r4817 = data; break; case 0x4818: { - if(snes_spc7110.r481x != 0x07) break; + if(snes_spc7110.r481x != 0x07) break; - snes_spc7110.r4818 = data; - snes_spc7110.r4814_latch = snes_spc7110.r4815_latch = 0; - break; - } + snes_spc7110.r4818 = data; + snes_spc7110.r4814_latch = snes_spc7110.r4815_latch = 0; + break; + } //========= //math unit @@ -1270,28 +1270,28 @@ static void spc7110_mmio_write(running_machine *machine, UINT32 addr, UINT8 data case 0x4824: snes_spc7110.r4824 = data; break; case 0x4825: { - snes_spc7110.r4825 = data; - - if(snes_spc7110.r482e & 1) { - //signed 16-bit x 16-bit multiplication - INT16 r0 = (INT16)(snes_spc7110.r4824 + (snes_spc7110.r4825 << 8)); - INT16 r1 = (INT16)(snes_spc7110.r4820 + (snes_spc7110.r4821 << 8)); - - INT32 result = r0 * r1; - snes_spc7110.r4828 = result; - snes_spc7110.r4829 = result >> 8; - snes_spc7110.r482a = result >> 16; - snes_spc7110.r482b = result >> 24; + snes_spc7110.r4825 = data; + + if(snes_spc7110.r482e & 1) { + //signed 16-bit x 16-bit multiplication + INT16 r0 = (INT16)(snes_spc7110.r4824 + (snes_spc7110.r4825 << 8)); + INT16 r1 = (INT16)(snes_spc7110.r4820 + (snes_spc7110.r4821 << 8)); + + INT32 result = r0 * r1; + snes_spc7110.r4828 = result; + snes_spc7110.r4829 = result >> 8; + snes_spc7110.r482a = result >> 16; + snes_spc7110.r482b = result >> 24; } else { - //unsigned 16-bit x 16-bit multiplication - UINT16 r0 = (UINT16)(snes_spc7110.r4824 + (snes_spc7110.r4825 << 8)); - UINT16 r1 = (UINT16)(snes_spc7110.r4820 + (snes_spc7110.r4821 << 8)); - - UINT32 result = r0 * r1; - snes_spc7110.r4828 = result; - snes_spc7110.r4829 = result >> 8; - snes_spc7110.r482a = result >> 16; - snes_spc7110.r482b = result >> 24; + //unsigned 16-bit x 16-bit multiplication + UINT16 r0 = (UINT16)(snes_spc7110.r4824 + (snes_spc7110.r4825 << 8)); + UINT16 r1 = (UINT16)(snes_spc7110.r4820 + (snes_spc7110.r4821 << 8)); + + UINT32 result = r0 * r1; + snes_spc7110.r4828 = result; + snes_spc7110.r4829 = result >> 8; + snes_spc7110.r482a = result >> 16; + snes_spc7110.r482b = result >> 24; } snes_spc7110.r482f = 0x80; @@ -1389,7 +1389,7 @@ static void spc7110_mmio_write(running_machine *machine, UINT32 addr, UINT8 data snes_spc7110.r4831 = data; snes_spc7110.dx_offset = spc7110_datarom_addr((data & 7) * 0x100000); break; - } + } case 0x4832: { diff --git a/src/mame/machine/snessdd1.c b/src/mame/machine/snessdd1.c index ee061ea83ae..297a9284221 100644 --- a/src/mame/machine/snessdd1.c +++ b/src/mame/machine/snessdd1.c @@ -474,8 +474,8 @@ typedef struct running_machine* machine; SDD1_IM* IM; SDD1_GCD* GCD; - SDD1_BG* BG0; SDD1_BG* BG1; SDD1_BG* BG2; SDD1_BG* BG3; - SDD1_BG* BG4; SDD1_BG* BG5; SDD1_BG* BG6; SDD1_BG* BG7; + SDD1_BG* BG0; SDD1_BG* BG1; SDD1_BG* BG2; SDD1_BG* BG3; + SDD1_BG* BG4; SDD1_BG* BG5; SDD1_BG* BG6; SDD1_BG* BG7; SDD1_PEM* PEM; SDD1_CM* CM; SDD1_OL* OL; diff --git a/src/mame/machine/steppers.c b/src/mame/machine/steppers.c index 0e63fea93b4..3be744848f5 100644 --- a/src/mame/machine/steppers.c +++ b/src/mame/machine/steppers.c @@ -29,7 +29,7 @@ typedef struct _stepper UINT8 pattern, /* coil pattern */ old_pattern, /* old coil pattern */ type; /* reel type */ - INT16 step_pos, /* step position 0 - max_steps */ + INT16 step_pos, /* step position 0 - max_steps */ max_steps; /* maximum step position */ INT16 index_start, /* start position of index (in half steps) */ @@ -612,8 +612,8 @@ void stepper_config(running_machine *machine, int which, const stepper_interface step[which].type = intf->type; step[which].index_start = intf->index_start;/* location of first index value in half steps */ - step[which].index_end = intf->index_end; /* location of last index value in half steps */ - step[which].index_patt = intf->index_patt; /* hex value of coil pattern (0 if not needed)*/ + step[which].index_end = intf->index_end; /* location of last index value in half steps */ + step[which].index_patt = intf->index_patt; /* hex value of coil pattern (0 if not needed)*/ step[which].pattern = 0; step[which].old_pattern = 0; step[which].step_pos = 0; diff --git a/src/mame/machine/stvcd.c b/src/mame/machine/stvcd.c index b8fe3b0a4e3..bce2a270a24 100644 --- a/src/mame/machine/stvcd.c +++ b/src/mame/machine/stvcd.c @@ -538,7 +538,7 @@ static void cd_writeWord(UINT32 addr, UINT16 data) return; case 0x000c: case 0x000e: - CDROM_LOG(("WW HIRM: %04x => %04x\n", hirqmask, data)) + CDROM_LOG(("WW HIRM: %04x => %04x\n", hirqmask, data)) hirqmask = data; return; case 0x0018: @@ -792,7 +792,7 @@ static void cd_writeWord(UINT32 addr, UINT16 data) // is it a valid track? if (cr2 >> 8) { - cd_stat = CD_STAT_PAUSE; + cd_stat = CD_STAT_PAUSE; // (index is cr2 low byte) } else @@ -1231,7 +1231,7 @@ static void cd_writeWord(UINT32 addr, UINT16 data) finfbuf[1] = (curdir[temp].firstfad>>16)&0xff; finfbuf[2] = (curdir[temp].firstfad>>8)&0xff; finfbuf[3] = (curdir[temp].firstfad&0xff); - // second 4 bytes = length of file + // second 4 bytes = length of file finfbuf[4] = (curdir[temp].length>>24)&0xff; finfbuf[5] = (curdir[temp].length>>16)&0xff; finfbuf[6] = (curdir[temp].length>>8)&0xff; @@ -1414,7 +1414,7 @@ static void read_new_dir(UINT32 fileno) if ((sect[1] == 'C') && (sect[2] == 'D') && (sect[3] == '0') && (sect[4] == '0') && (sect[5] == '1')) { - switch (sect[0]) + switch (sect[0]) { case 0: // boot record break; @@ -1819,7 +1819,7 @@ static void cd_playdata(void) { if (fadstoplay) { - logerror("STVCD: Reading FAD %d\n", cd_curfad); + logerror("STVCD: Reading FAD %d\n", cd_curfad); if (cdrom) { diff --git a/src/mame/machine/taitosj.c b/src/mame/machine/taitosj.c index 4af1c521b3d..1269edd91cd 100644 --- a/src/mame/machine/taitosj.c +++ b/src/mame/machine/taitosj.c @@ -53,7 +53,7 @@ MACHINE_RESET( taitosj ) zaccept = 1; zready = 0; busreq = 0; - if (cputag_get_cpu(machine, "mcu") != NULL) + if (cputag_get_cpu(machine, "mcu") != NULL) cputag_set_input_line(machine, "mcu", 0, CLEAR_LINE); spacecr_prot_value = 0; diff --git a/src/mame/machine/ticket.c b/src/mame/machine/ticket.c index 88c8591634c..18ded9e6fde 100644 --- a/src/mame/machine/ticket.c +++ b/src/mame/machine/ticket.c @@ -128,13 +128,13 @@ static DEVICE_START( ticket ) assert(config != NULL); /* initialize the state */ - state->active_bit = 0x80; + state->active_bit = 0x80; state->time_msec = device->clock; state->motoron = config->motorhigh ? state->active_bit : 0; state->ticketdispensed = config->statushigh ? state->active_bit : 0; state->ticketnotdispensed = state->ticketdispensed ^ state->active_bit; - state->timer = timer_alloc(device->machine, ticket_dispenser_toggle, (void *)device); + state->timer = timer_alloc(device->machine, ticket_dispenser_toggle, (void *)device); state_save_register_device_item(device, 0, state->status); state_save_register_device_item(device, 0, state->power); @@ -149,7 +149,7 @@ static DEVICE_RESET( ticket ) { ticket_state *state = get_safe_token(device); state->status = state->ticketnotdispensed; - state->power = 0x00; + state->power = 0x00; } diff --git a/src/mame/machine/vsnes.c b/src/mame/machine/vsnes.c index b297a0d0ed9..ae5ef600a19 100644 --- a/src/mame/machine/vsnes.c +++ b/src/mame/machine/vsnes.c @@ -151,7 +151,7 @@ static READ8_HANDLER( gun_in0_r ) /* shift */ input_latch[0] >>= 1; - ret |= input_port_read(space->machine, "COINS"); /* merge coins, etc */ + ret |= input_port_read(space->machine, "COINS"); /* merge coins, etc */ ret |= (input_port_read(space->machine, "DSW0") & 3) << 3; /* merge 2 dipswitches */ /* The gun games expect a 1 returned on every 5th read after sound_fix is reset*/ @@ -176,7 +176,7 @@ READ8_HANDLER( vsnes_in0_r ) /* shift */ input_latch[0] >>= 1; - ret |= input_port_read(space->machine, "COINS"); /* merge coins, etc */ + ret |= input_port_read(space->machine, "COINS"); /* merge coins, etc */ ret |= (input_port_read(space->machine, "DSW0") & 3) << 3; /* merge 2 dipswitches */ return ret; @@ -213,7 +213,7 @@ READ8_HANDLER( vsnes_in0_1_r ) /* shift */ input_latch[2] >>= 1; - ret |= input_port_read(space->machine, "COINS2"); /* merge coins, etc */ + ret |= input_port_read(space->machine, "COINS2"); /* merge coins, etc */ ret |= (input_port_read(space->machine, "DSW1") & 3) << 3; /* merge 2 dipswitches */ return ret; } @@ -925,7 +925,7 @@ DRIVER_INIT( cstlevna ) UINT8 *prg = memory_region(machine, "maincpu"); memcpy(&prg[0x08000], &prg[0x28000], 0x8000); - /* banking is done with writes to the $8000-$ffff area */ + /* banking is done with writes to the $8000-$ffff area */ memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, castlevania_rom_banking ); /* common init */ @@ -955,7 +955,7 @@ DRIVER_INIT( topgun ) UINT8 *prg = memory_region(machine, "maincpu"); memcpy(&prg[0x08000], &prg[0x28000], 0x8000); - /* banking is done with writes to the $8000-$ffff area */ + /* banking is done with writes to the $8000-$ffff area */ memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, castlevania_rom_banking ); /* tap on the PPU, due to some tricky protection */ @@ -1170,13 +1170,13 @@ static READ8_HANDLER( rbi_hack_r ) { switch(VSindex++) { - case 9: + case 9: return 0x6F; case 14: return 0x94; - default: + default: return 0xB4; } } @@ -1343,7 +1343,7 @@ DRIVER_INIT( platoon ) init_vsnes(machine); - remapped_colortable = rp2c04001_colortable; + remapped_colortable = rp2c04001_colortable; } diff --git a/src/mame/mame.mak b/src/mame/mame.mak index dadbe037645..32b64cb0e00 100644 --- a/src/mame/mame.mak +++ b/src/mame/mame.mak @@ -374,7 +374,7 @@ $(MAMEOBJ)/aristocr.a: \ $(MACHINE)/archimds.o \ $(MAMEOBJ)/atari.a: \ - $(DRIVERS)/atarigx2.o $(VIDEO)/atarigx2.o \ + $(DRIVERS)/atarigx2.o $(VIDEO)/atarigx2.o \ $(DRIVERS)/arcadecl.o $(VIDEO)/arcadecl.o \ $(DRIVERS)/asteroid.o $(MACHINE)/asteroid.o $(AUDIO)/asteroid.o $(AUDIO)/llander.o \ $(DRIVERS)/atarifb.o $(MACHINE)/atarifb.o $(AUDIO)/atarifb.o $(VIDEO)/atarifb.o \ @@ -1858,7 +1858,7 @@ $(DRIVERS)/zac2650.o: $(LAYOUT)/tinv2650.lh $(DRIVERS)/galaxian.o: $(MAMESRC)/drivers/galdrvr.c $(DRIVERS)/mpu4.o: $(MAMESRC)/drivers/mpu4drvr.c $(DRIVERS)/neogeo.o: $(MAMESRC)/drivers/neodrvr.c -$(MACHINE)/snes.o: $(MAMESRC)/machine/snesdsp1.c \ +$(MACHINE)/snes.o: $(MAMESRC)/machine/snesdsp1.c \ $(MAMESRC)/machine/snesdsp2.c \ $(MAMESRC)/machine/snesdsp3.c \ $(MAMESRC)/machine/snesdsp4.c \ @@ -1872,5 +1872,5 @@ $(MACHINE)/snes.o: $(MAMESRC)/machine/snesdsp1.c \ $(MAMESRC)/machine/snessdd1.c \ $(MAMESRC)/machine/snes7110.c \ $(MAMESRC)/machine/snesst10.c -$(VIDEO)/model2.o: $(MAMESRC)/video/model2rd.c -$(VIDEO)/model3.o: $(MAMESRC)/video/m3raster.c +$(VIDEO)/model2.o: $(MAMESRC)/video/model2rd.c +$(VIDEO)/model3.o: $(MAMESRC)/video/m3raster.c diff --git a/src/mame/mamedriv.c b/src/mame/mamedriv.c index dcd3c852558..7306667c76e 100644 --- a/src/mame/mamedriv.c +++ b/src/mame/mamedriv.c @@ -919,7 +919,7 @@ const game_driver * const drivers[] = DRIVER( alpinesa ) /* (c) 1996 */ DRIVER( propcycl ) /* (c) 1996 */ DRIVER( tokyowar ) /* (c) 1996 */ - DRIVER( aquajet ) /* (c) 1996 */ + DRIVER( aquajet ) /* (c) 1996 */ /* Namco System 23 */ DRIVER( rapidrvr ) /* (c) 1997 */ @@ -2715,7 +2715,7 @@ V-V TP-027 DRIVER( ecofghtru ) /* 15/02/1994 (c) 1993 (US) */ DRIVER( ecofghtru1 )/* 03/12/1993 (c) 1993 (US) */ DRIVER( ecofghtra ) /* 03/12/1993 (c) 1993 (Asia) */ - DRIVER( uecology ) /* 03/12/1993 (c) 1993 (Japan) */ + DRIVER( uecology ) /* 03/12/1993 (c) 1993 (Japan) */ DRIVER( ddtod ) /* 12/04/1994 (c) 1993 (Euro) */ DRIVER( ddtodr1 ) /* 13/01/1994 (c) 1993 (Euro) */ DRIVER( ddtodu ) /* 25/01/1994 (c) 1993 (US) */ @@ -3985,8 +3985,8 @@ DokiDoki Penguin Land *not confirmed DRIVER( hotrod ) /* 1988.?? Hot Rod (World) */ DRIVER( hotroda ) /* 1988.07 Hot Rod (US) */ - DRIVER( sspiritj ) /* 1988.10 Scramble Spirits (Japan) */ - DRIVER( sspirits ) /* 1988.?? Scramble Spirits (World) */ + DRIVER( sspiritj ) /* 1988.10 Scramble Spirits (Japan) */ + DRIVER( sspirits ) /* 1988.?? Scramble Spirits (World) */ DRIVER( sspirtfc ) /* 1988.?? Scramble Spirits (protected) */ /* 1988.11 Scramble Spirits (US) */ DRIVER( ggroundj ) /* 1988.11 Gain Ground (Japan, FD1094, decrypted) */ @@ -4336,7 +4336,7 @@ BOMULEUL CHAJARA SEGA ST-V 1997/04/11 DRIVER( topshoot ) /* (c) 1995 Sun Mixing */ /* Sega MegaTech, the number shown is on the label of the instruction rom */ - DRIVER( megatech ) + DRIVER( megatech ) DRIVER( mt_beast ) /* 01 */ DRIVER( mt_shar2 ) /* 02 */ DRIVER( mt_stbld ) /* 03 */ @@ -4650,11 +4650,11 @@ BOMULEUL CHAJARA SEGA ST-V 1997/04/11 DRIVER( dolphin ) /* 2003.08 Dolphin Blue */ DRIVER( ggisuka ) /* 2003.12 Guilty Gear Isuka */ /* 2003.12 Sangoku Senki Shichisei Tensei (IGS) */ - DRIVER( rumblef ) /* 2004.03 The Rumble Fish */ + DRIVER( rumblef ) /* 2004.03 The Rumble Fish */ DRIVER( rangrmsn ) /* 2004.03 Ranger Mission */ DRIVER( salmankt ) /* 2004.06 Salary Man Kintarou Net Select */ DRIVER( kofnw ) /* 2004.07 The King of Fighters Neo Wave */ - DRIVER( kofnwj ) /* 2004.07 The King of Fighters Neo Wave (Japan) */ + DRIVER( kofnwj ) /* 2004.07 The King of Fighters Neo Wave (Japan) */ DRIVER( xtrmhunt ) /* 2004.09 Extreme Hunting */ /* 2004.09 Dirty Pig Skin Football */ /* 2004.09 Faster than Speed */ @@ -4666,11 +4666,11 @@ BOMULEUL CHAJARA SEGA ST-V 1997/04/11 /* 2005.10 The King of Fighters XI */ DRIVER( fotns ) /* 2005.12 Hokuto no Ken */ /* 2006.02 Metal Slug 6 */ - DRIVER( xtrmhnt2 ) /* 2006.09 Extreme Hunting 2 Tournament Edition */ + DRIVER( xtrmhnt2 ) /* 2006.09 Extreme Hunting 2 Tournament Edition */ /* 2008.?? Sega Clay Challenge */ /* Hikaru */ - DRIVER( hikaru ) /* BIOS (c)2000 */ + DRIVER( hikaru ) /* BIOS (c)2000 */ /* 1999.06 Syouboushi Brave Fire Fighters */ DRIVER( podrace ) /* 2000.06 Star Wars: Racer Arcade */ /* 2000.09 Nascar Arcade */ @@ -5274,7 +5274,7 @@ BOMULEUL CHAJARA SEGA ST-V 1997/04/11 DRIVER( mrgoemon ) /* GX621 (c) 1986 (Japan) */ DRIVER( jailbrek ) /* GX507 (c) 1986 */ DRIVER( manhatan ) /* GX507 (c) 1986 (Japan) */ - DRIVER( jailbrekb ) /* bootleg */ + DRIVER( jailbrekb ) /* bootleg */ DRIVER( scotrsht ) /* GX545 (c) 1985 */ DRIVER( finalizr ) /* GX523 (c) 1985 */ DRIVER( finalizrb ) /* bootleg */ @@ -5838,10 +5838,10 @@ BOMULEUL CHAJARA SEGA ST-V 1997/04/11 DRIVER( caterplr ) /* (bootleg) */ DRIVER( millpac ) /* Valadon */ DRIVER( magworm ) /* (bootleg) */ - DRIVER( mazeinv ) /* (proto) (c) 1982 */ + DRIVER( mazeinv ) /* (proto) (c) 1982 */ DRIVER( milliped ) /* 136013 (c) 1982 */ DRIVER( millipdd ) /* hack by Two Bit Score */ - DRIVER( qwak ) /* (proto) (c) 1982 */ + DRIVER( qwak ) /* (proto) (c) 1982 */ DRIVER( runaway ) /* (proto) (c) 1982 */ DRIVER( bullsdrt ) /* (c) 1985 Shinkai */ DRIVER( cmmb162 ) @@ -6288,7 +6288,7 @@ BOMULEUL CHAJARA SEGA ST-V 1997/04/11 /* Neo Geo games */ /* the four digits number is the game ID stored at address 0x0108 of the program ROM */ /* info on prototypes taken from http://www.members.tripod.com/fresa/proto/puzzle.htm */ - DRIVER( neogeo ) + DRIVER( neogeo ) DRIVER( nam1975 ) /* 0001 (c) 1990 SNK */ DRIVER( bstars ) /* 0002 (c) 1990 SNK */ DRIVER( bstarsh ) /* 0002 (c) 1990 SNK */ @@ -6563,8 +6563,8 @@ BOMULEUL CHAJARA SEGA ST-V 1997/04/11 /* Hyper NeoGeo 64 uses a 3 digit rom code? */ - DRIVER( hng64 ) - DRIVER( roadedge ) /* 001 1997/09/10 Roads Edge / Round Trip RV */ + DRIVER( hng64 ) + DRIVER( roadedge ) /* 001 1997/09/10 Roads Edge / Round Trip RV */ DRIVER( sams64 ) /* 002 1997/12/19 Samurai Shodown 64 / Samurai Spirits 64 */ DRIVER( xrally ) /* 003 1998/05/13 Xtreme Rally / Off Beat Racer! */ DRIVER( bbust2 ) /* 004 1998/09/11 Beast Busters: Second Nightmare */ @@ -7709,7 +7709,7 @@ BOMULEUL CHAJARA SEGA ST-V 1997/04/11 DRIVER( janjans1 ) /* (c) 1996 Visco */ DRIVER( stmblade ) /* (c) 1996 Visco */ DRIVER( jsk ) /* (c) 1997 Visco */ - DRIVER( koikois2 ) /* (c) 1997 Visco */ + DRIVER( koikois2 ) /* (c) 1997 Visco */ DRIVER( mslider ) /* (c) 1997 Visco / Datt Japan */ DRIVER( ryorioh ) /* (c) 1998 Visco */ DRIVER( janjans2 ) /* (c) 2000 Visco */ @@ -8177,8 +8177,8 @@ Other Sun games DRIVER( chry10 ) /* bootleg */ DRIVER( chrygld ) /* bootleg */ DRIVER( cabaret ) /* (c) 1992 AMT */ - DRIVER( cpoker ) /* (c) 1993? IGS */ - DRIVER( cpokert ) /* (c) 1993? Tuning */ + DRIVER( cpoker ) /* (c) 1993? IGS */ + DRIVER( cpokert ) /* (c) 1993? Tuning */ DRIVER( csk227it ) /* (c) 198? IGS */ DRIVER( csk234it ) /* (c) 198? IGS */ DRIVER( igs_ncs ) /* (c) 198? IGS */ @@ -8274,10 +8274,10 @@ Other Sun games DRIVER( olds ) /* (c) 1999 */ DRIVER( olds100 ) /* (c) 1999 */ DRIVER( olds100a ) /* (c) 1999 */ - DRIVER( kov2 ) /* (c) 2000 */ - DRIVER( kov2106 ) /* (c) 2000 */ - DRIVER( kov2p ) /* (c) 2000 */ - DRIVER( kov2p205 ) /* (c) 2000 */ + DRIVER( kov2 ) /* (c) 2000 */ + DRIVER( kov2106 ) /* (c) 2000 */ + DRIVER( kov2p ) /* (c) 2000 */ + DRIVER( kov2p205 ) /* (c) 2000 */ DRIVER( ddp2 ) /* (c) 2001 */ DRIVER( ddp2a ) /* (c) 2001 */ DRIVER( puzzli2 ) /* (c) 2001 */ @@ -8379,19 +8379,19 @@ Other Sun games DRIVER( yumefuda ) /* (c) 198? Alba */ /* Home Data games */ - DRIVER( hourouki ) /* (c) 1987 Home Data */ - DRIVER( mhgaiden ) /* (c) 1987 Home Data */ + DRIVER( hourouki ) /* (c) 1987 Home Data */ + DRIVER( mhgaiden ) /* (c) 1987 Home Data */ DRIVER( mirderby ) /* (c) 1988 Home Data? */ - DRIVER( mjhokite ) /* (c) 1988 Home Data */ - DRIVER( mjclinic ) /* (c) 1988 Home Data */ - DRIVER( mrokumei ) /* (c) 1988 Home Data */ - DRIVER( reikaids ) /* (c) 1988 Home Data */ - DRIVER( mjkojink ) /* (c) 1989 Home Data */ - DRIVER( vitaminc ) /* (c) 1989 Home Data */ - DRIVER( mjyougo ) /* (c) 1989 Home Data */ - DRIVER( lemnangl ) /* (c) 1990 Home Data */ - DRIVER( mjkinjas ) /* (c) 1991 Home Data */ - DRIVER( battlcry ) /* (c) 1991 Home Data */ + DRIVER( mjhokite ) /* (c) 1988 Home Data */ + DRIVER( mjclinic ) /* (c) 1988 Home Data */ + DRIVER( mrokumei ) /* (c) 1988 Home Data */ + DRIVER( reikaids ) /* (c) 1988 Home Data */ + DRIVER( mjkojink ) /* (c) 1989 Home Data */ + DRIVER( vitaminc ) /* (c) 1989 Home Data */ + DRIVER( mjyougo ) /* (c) 1989 Home Data */ + DRIVER( lemnangl ) /* (c) 1990 Home Data */ + DRIVER( mjkinjas ) /* (c) 1991 Home Data */ + DRIVER( battlcry ) /* (c) 1991 Home Data */ DRIVER( jogakuen ) /* (c) 1992 Windom corporation */ DRIVER( mjikaga ) /* (c) 1991 Mitchell */ DRIVER( mjprivat ) /* (c) 1991 Matoba */ @@ -8405,7 +8405,7 @@ Other Sun games /* Dynamo games */ DRIVER( skeetsht ) /* (c) 1991 */ - DRIVER( toursol ) /* (c) 1995 Dynamo */ + DRIVER( toursol ) /* (c) 1995 Dynamo */ DRIVER( toursol1 ) /* (c) 1995 Dynamo */ /* Taiyo games */ @@ -8493,17 +8493,17 @@ Other Sun games DRIVER( wsjr15 ) /* (c) 1991 */ DRIVER( maddog ) /* (c) 1990 */ DRIVER( maddog2 ) /* (c) 1992 */ - DRIVER( maddog22 ) /* (c) 1992 */ - DRIVER( maddog21 ) /* (c) 1992 */ - DRIVER( spacepir ) /* (c) 1992 */ - DRIVER( gallgall ) /* (c) 1992 */ - DRIVER( crimepat ) /* (c) 1993 */ + DRIVER( maddog22 ) /* (c) 1992 */ + DRIVER( maddog21 ) /* (c) 1992 */ + DRIVER( spacepir ) /* (c) 1992 */ + DRIVER( gallgall ) /* (c) 1992 */ + DRIVER( crimepat ) /* (c) 1993 */ DRIVER( crimep211 ) /* (c) 1993 */ - DRIVER( crimep2 ) /* (c) 1993 */ - DRIVER( lastbh ) /* (c) 1994 */ - DRIVER( fastdraw ) /* (c) 1995 */ - DRIVER( aplatoon ) /* (c) 199? Nova? */ - DRIVER( zortonbr ) /* (c) 1993 Web Picmatic */ + DRIVER( crimep2 ) /* (c) 1993 */ + DRIVER( lastbh ) /* (c) 1994 */ + DRIVER( fastdraw ) /* (c) 1995 */ + DRIVER( aplatoon ) /* (c) 199? Nova? */ + DRIVER( zortonbr ) /* (c) 1993 Web Picmatic */ /* Crystal System */ DRIVER( crysbios ) @@ -8671,7 +8671,7 @@ Other Sun games DRIVER( sshooter11 )/* (c) 1998 P&P Marketing */ DRIVER( pass ) /* (c) 1992 Oksan */ DRIVER( news ) /* "Virus"??? ((c) 1993 Poby in ROM VIRUS.4) */ - DRIVER( newsa ) /* "Jeansole / Poby */ + DRIVER( newsa ) /* "Jeansole / Poby */ DRIVER( taxidrvr ) /* [1984 Graphic Techno] */ DRIVER( xyonix ) /* [1989 Philko] */ DRIVER( gt507uk ) /* (c) 1986 Grayhound Electronics */ @@ -9058,7 +9058,7 @@ Other Sun games DRIVER( quizmstr ) /* (c) 1985 Coinmaster */ DRIVER( trailblz ) /* (c) 1987 Coinmaster */ DRIVER( supnudg2 ) /* (c) 1989 Coinmaster */ - DRIVER( pokeroul ) /* (c) 1990 Coinmaster */ + DRIVER( pokeroul ) /* (c) 1990 Coinmaster */ DRIVER( egghunt ) /* (c) 1995 Invi Image */ DRIVER( magic10 ) /* (c) 1995 A.W.P. Games */ DRIVER( magic10a ) /* (c) 1995 A.W.P. Games */ @@ -9336,14 +9336,14 @@ Other Sun games DRIVER( ciclone ) /* (c) 2000 unknown */ /* V30-based italian gambling games */ - DRIVER( tour4000 ) /* (c) 2000 High Video */ - DRIVER( cfever40 ) /* (c) 2000 High Video */ - DRIVER( cfever50 ) /* (c) 2000 High Video */ - DRIVER( tour4010 ) /* (c) 2000 High Video */ - DRIVER( cfever51 ) /* (c) 2000 High Video */ - DRIVER( cfever61 ) /* (c) 2000 High Video */ - DRIVER( cfever1k ) /* (c) 2000 High Video */ - DRIVER( girotutt ) /* (c) 2000 High Video */ + DRIVER( tour4000 ) /* (c) 2000 High Video */ + DRIVER( cfever40 ) /* (c) 2000 High Video */ + DRIVER( cfever50 ) /* (c) 2000 High Video */ + DRIVER( tour4010 ) /* (c) 2000 High Video */ + DRIVER( cfever51 ) /* (c) 2000 High Video */ + DRIVER( cfever61 ) /* (c) 2000 High Video */ + DRIVER( cfever1k ) /* (c) 2000 High Video */ + DRIVER( girotutt ) /* (c) 2000 High Video */ /* M68k-based gambling games */ DRIVER( steaser ) /* (c) 1993 unknown */ diff --git a/src/mame/tiny.c b/src/mame/tiny.c index f116db9e548..7d70d24856c 100644 --- a/src/mame/tiny.c +++ b/src/mame/tiny.c @@ -39,8 +39,8 @@ const game_driver * const drivers[] = #else /* DRIVER_RECURSIVE */ DRIVER( robby ) /* (c) 1981 Bally Midway */ - DRIVER( gridlee ) /* [1983 Videa] prototype - no copyright notice */ - DRIVER( alienar ) /* (c) 1985 Duncan Brown */ + DRIVER( gridlee ) /* [1983 Videa] prototype - no copyright notice */ + DRIVER( alienar ) /* (c) 1985 Duncan Brown */ DRIVER( carpolo ) /* (c) 1977 Exidy */ DRIVER( sidetrac ) /* (c) 1979 Exidy */ DRIVER( targ ) /* (c) 1980 Exidy */ diff --git a/src/mame/video/1943.c b/src/mame/video/1943.c index d6baec0b63a..f9de12334b6 100644 --- a/src/mame/video/1943.c +++ b/src/mame/video/1943.c @@ -95,7 +95,7 @@ PALETTE_INIT( 1943 ) for (i = 0x80; i < 0x180; i++) { UINT8 ctabentry = ((color_prom[0x200 + (i - 0x080)] & 0x03) << 4) | - ((color_prom[0x100 + (i - 0x080)] & 0x0f) << 0); + ((color_prom[0x100 + (i - 0x080)] & 0x0f) << 0); colortable_entry_set_value(machine->colortable, i, ctabentry); } @@ -103,7 +103,7 @@ PALETTE_INIT( 1943 ) for (i = 0x180; i < 0x280; i++) { UINT8 ctabentry = ((color_prom[0x400 + (i - 0x180)] & 0x03) << 4) | - ((color_prom[0x300 + (i - 0x180)] & 0x0f) << 0); + ((color_prom[0x300 + (i - 0x180)] & 0x0f) << 0); colortable_entry_set_value(machine->colortable, i, ctabentry); } @@ -113,7 +113,7 @@ PALETTE_INIT( 1943 ) for (i = 0x280; i < 0x380; i++) { UINT8 ctabentry = ((color_prom[0x600 + (i - 0x280)] & 0x07) << 4) | - ((color_prom[0x500 + (i - 0x280)] & 0x0f) << 0) | 0x80; + ((color_prom[0x500 + (i - 0x280)] & 0x0f) << 0) | 0x80; colortable_entry_set_value(machine->colortable, i, ctabentry); } } diff --git a/src/mame/video/8080bw.c b/src/mame/video/8080bw.c index 1b7baca758d..353ce47a60b 100644 --- a/src/mame/video/8080bw.c +++ b/src/mame/video/8080bw.c @@ -15,7 +15,7 @@ MACHINE_START( extra_8080bw_vh ) { - mw8080bw_state *state = (mw8080bw_state *)machine->driver_data; + mw8080bw_state *state = (mw8080bw_state *)machine->driver_data; state_save_register_global(machine, state->c8080bw_flip_screen); state_save_register_global(machine, state->color_map); @@ -65,7 +65,7 @@ static void cosmo_get_pens( pen_t *pens ) INLINE void set_pixel( running_machine *machine, bitmap_t *bitmap, UINT8 y, UINT8 x, pen_t *pens, UINT8 color ) { - mw8080bw_state *state = (mw8080bw_state *)machine->driver_data; + mw8080bw_state *state = (mw8080bw_state *)machine->driver_data; if (y >= MW8080BW_VCOUNTER_START_NO_VBLANK) { @@ -94,7 +94,7 @@ INLINE void set_8_pixels( running_machine *machine, bitmap_t *bitmap, UINT8 y, U /* this is needed as this driver doesn't emulate the shift register like mw8080bw does */ static void clear_extra_columns( running_machine *machine, bitmap_t *bitmap, pen_t *pens, UINT8 color ) { - mw8080bw_state *state = (mw8080bw_state *)machine->driver_data; + mw8080bw_state *state = (mw8080bw_state *)machine->driver_data; UINT8 x; for (x = 0; x < 4; x++) @@ -114,7 +114,7 @@ static void clear_extra_columns( running_machine *machine, bitmap_t *bitmap, pen VIDEO_UPDATE( invadpt2 ) { - mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data; + mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data; pen_t pens[NUM_PENS]; offs_t offs; UINT8 *prom; @@ -146,7 +146,7 @@ VIDEO_UPDATE( invadpt2 ) VIDEO_UPDATE( ballbomb ) { - mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data; + mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data; pen_t pens[NUM_PENS]; offs_t offs; UINT8 *color_map_base; @@ -179,7 +179,7 @@ VIDEO_UPDATE( ballbomb ) VIDEO_UPDATE( schaser ) { - mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data; + mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data; pen_t pens[NUM_PENS]; offs_t offs; UINT8 *background_map_base; @@ -220,7 +220,7 @@ VIDEO_UPDATE( schaser ) VIDEO_UPDATE( schasrcv ) { - mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data; + mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data; pen_t pens[NUM_PENS]; offs_t offs; @@ -246,7 +246,7 @@ VIDEO_UPDATE( schasrcv ) VIDEO_UPDATE( rollingc ) { - mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data; + mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data; pen_t pens[NUM_PENS]; offs_t offs; @@ -271,7 +271,7 @@ VIDEO_UPDATE( rollingc ) VIDEO_UPDATE( polaris ) { - mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data; + mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data; pen_t pens[NUM_PENS]; offs_t offs; UINT8 *color_map_base; @@ -343,7 +343,7 @@ VIDEO_UPDATE( polaris ) VIDEO_UPDATE( lupin3 ) { - mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data; + mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data; pen_t pens[NUM_PENS]; offs_t offs; @@ -368,7 +368,7 @@ VIDEO_UPDATE( lupin3 ) VIDEO_UPDATE( cosmo ) { - mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data; + mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data; pen_t pens[NUM_PENS]; offs_t offs; @@ -395,7 +395,7 @@ VIDEO_UPDATE( cosmo ) VIDEO_UPDATE( indianbt ) { - mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data; + mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data; pen_t pens[NUM_PENS]; offs_t offs; UINT8 *color_map_base; @@ -427,7 +427,7 @@ VIDEO_UPDATE( indianbt ) VIDEO_UPDATE( shuttlei ) { - mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data; + mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data; pen_t pens[2] = { RGB_BLACK, RGB_WHITE }; offs_t offs; @@ -458,7 +458,7 @@ VIDEO_UPDATE( shuttlei ) VIDEO_UPDATE( sflush ) { - mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data; + mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data; pen_t pens[NUM_PENS]; offs_t offs; diff --git a/src/mame/video/actfancr.c b/src/mame/video/actfancr.c index 4e170615edb..a871d1ae01b 100644 --- a/src/mame/video/actfancr.c +++ b/src/mame/video/actfancr.c @@ -178,7 +178,7 @@ VIDEO_UPDATE( actfancr ) int x, y, sprite, colour, multi, fx, fy, inc, flash; y = buffered_spriteram[offs] + (buffered_spriteram[offs + 1] << 8); - if ((y & 0x8000) == 0) + if ((y & 0x8000) == 0) continue; x = buffered_spriteram[offs + 4] + (buffered_spriteram[offs + 5] << 8); @@ -270,7 +270,7 @@ VIDEO_UPDATE( triothep ) int x, y, sprite, colour, multi, fx, fy, inc, flash; y = buffered_spriteram[offs] + (buffered_spriteram[offs + 1] << 8); - if ((y & 0x8000) == 0) + if ((y & 0x8000) == 0) continue; x = buffered_spriteram[offs + 4] + (buffered_spriteram[offs + 5] << 8); diff --git a/src/mame/video/armedf.c b/src/mame/video/armedf.c index 5bd86e5c7e0..b8651bbcb94 100644 --- a/src/mame/video/armedf.c +++ b/src/mame/video/armedf.c @@ -9,18 +9,18 @@ ***************************************************************************/ static TILEMAP_MAPPER( armedf_scan_type1 ) -{ /* col: 0..63; row: 0..31 */ +{ /* col: 0..63; row: 0..31 */ /* armed formation */ return col * 32 + row; } static TILEMAP_MAPPER( armedf_scan_type2 ) -{ /* col: 0..63; row: 0..31 */ +{ /* col: 0..63; row: 0..31 */ return 32 * (31 - row) + (col & 0x1f) + 0x800 * (col / 32); } static TILEMAP_MAPPER( armedf_scan_type3 ) -{ /* col: 0..63; row: 0..31 */ +{ /* col: 0..63; row: 0..31 */ /* legion & legiono */ return (col & 0x1f) * 32 + row + 0x800 * (col / 32); } @@ -250,7 +250,7 @@ static void draw_sprites( running_machine *machine, bitmap_t *bitmap, const rect drawgfx_transpen(bitmap,cliprect,machine->gfx[3], code & 0xfff, color, - flipx,flipy, + flipx,flipy, sx,sy,15); } } diff --git a/src/mame/video/asterix.c b/src/mame/video/asterix.c index 4f31c4f8fdd..707580a6bfd 100644 --- a/src/mame/video/asterix.c +++ b/src/mame/video/asterix.c @@ -30,7 +30,7 @@ void asterix_sprite_callback(running_machine *machine, int *code, int *color, in if (pri <= layerpri[2]) *priority_mask = 0; else if (pri > layerpri[2] && pri <= layerpri[1]) *priority_mask = 0xf0; else if (pri > layerpri[1] && pri <= layerpri[0]) *priority_mask = 0xf0|0xcc; - else *priority_mask = 0xf0|0xcc|0xaa; + else *priority_mask = 0xf0|0xcc|0xaa; *color = sprite_colorbase | (*color & 0x001f); *code = (*code & 0xfff) | spritebanks[(*code >> 12) & 3]; } diff --git a/src/mame/video/astrocde.c b/src/mame/video/astrocde.c index b075a8c35d1..0bc88666904 100644 --- a/src/mame/video/astrocde.c +++ b/src/mame/video/astrocde.c @@ -683,7 +683,7 @@ WRITE8_HANDLER( astrocade_funcgen_w ) { funcgen_expand_count ^= 1; data >>= 4 * funcgen_expand_count; - data = (funcgen_expand_color[(data >> 3) & 1] << 6) | + data = (funcgen_expand_color[(data >> 3) & 1] << 6) | (funcgen_expand_color[(data >> 2) & 1] << 4) | (funcgen_expand_color[(data >> 1) & 1] << 2) | (funcgen_expand_color[(data >> 0) & 1] << 0); @@ -707,7 +707,7 @@ WRITE8_HANDLER( astrocade_funcgen_w ) else { UINT8 shift = 2 * (~funcgen_rotate_count++ & 3); - data = (((funcgen_rotate_data[3] >> shift) & 3) << 6) | + data = (((funcgen_rotate_data[3] >> shift) & 3) << 6) | (((funcgen_rotate_data[2] >> shift) & 3) << 4) | (((funcgen_rotate_data[1] >> shift) & 3) << 2) | (((funcgen_rotate_data[0] >> shift) & 3) << 0); diff --git a/src/mame/video/atari.c b/src/mame/video/atari.c index b778f396b3b..4bb96e14462 100644 --- a/src/mame/video/atari.c +++ b/src/mame/video/atari.c @@ -1269,7 +1269,7 @@ INLINE void LMS(running_machine *machine, int new_cmd) *****************************************************************************/ static void antic_scanline_dma(running_machine *machine, int param) { - const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM); + const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM); LOG((" @cycle #%3d DMA fetch\n", cycle(machine))); if (antic.scanline == VBL_END) antic.r.nmist &= ~VBL_NMI; diff --git a/src/mame/video/atarimo.c b/src/mame/video/atarimo.c index e13761d8038..be9230eb158 100644 --- a/src/mame/video/atarimo.c +++ b/src/mame/video/atarimo.c @@ -33,7 +33,7 @@ struct _atarimo_data gfx_element gfxelement[MAX_GFX_ELEMENTS]; /* local copy of graphics elements */ int gfxgranularity[MAX_GFX_ELEMENTS]; - bitmap_t *bitmap; /* temporary bitmap to render to */ + bitmap_t *bitmap; /* temporary bitmap to render to */ int linked; /* are the entries linked? */ int split; /* are entries split or together? */ @@ -72,9 +72,9 @@ struct _atarimo_data int maxperline; /* maximum number of entries/line */ atarimo_mask linkmask; /* mask for the link */ - atarimo_mask gfxmask; /* mask for the graphics bank */ + atarimo_mask gfxmask; /* mask for the graphics bank */ atarimo_mask codemask; /* mask for the code index */ - atarimo_mask codehighmask; /* mask for the upper code index */ + atarimo_mask codehighmask; /* mask for the upper code index */ atarimo_mask colormask; /* mask for the color */ atarimo_mask xposmask; /* mask for the X position */ atarimo_mask yposmask; /* mask for the Y position */ @@ -84,9 +84,9 @@ struct _atarimo_data atarimo_mask vflipmask; /* mask for the vertical flip */ atarimo_mask prioritymask; /* mask for the priority */ atarimo_mask neighbormask; /* mask for the neighbor */ - atarimo_mask absolutemask; /* mask for absolute coordinates */ + atarimo_mask absolutemask; /* mask for absolute coordinates */ - atarimo_mask specialmask; /* mask for the special value */ + atarimo_mask specialmask; /* mask for the special value */ int specialvalue; /* resulting value to indicate "special" */ atarimo_special_func specialcb; /* callback routine for special entries */ int codehighshift; /* shift count for the upper code */ diff --git a/src/mame/video/atarimo.h b/src/mame/video/atarimo.h index 4612dbab452..7411b914da0 100644 --- a/src/mame/video/atarimo.h +++ b/src/mame/video/atarimo.h @@ -60,22 +60,22 @@ struct _atarimo_desc UINT16 maxcolors; /* maximum number of colors */ UINT8 transpen; /* transparent pen index */ - atarimo_entry linkmask; /* mask for the link */ - atarimo_entry gfxmask; /* mask for the graphics bank */ - atarimo_entry codemask; /* mask for the code index */ - atarimo_entry codehighmask; /* mask for the upper code index */ - atarimo_entry colormask; /* mask for the color */ - atarimo_entry xposmask; /* mask for the X position */ - atarimo_entry yposmask; /* mask for the Y position */ - atarimo_entry widthmask; /* mask for the width, in tiles*/ - atarimo_entry heightmask; /* mask for the height, in tiles */ - atarimo_entry hflipmask; /* mask for the horizontal flip */ - atarimo_entry vflipmask; /* mask for the vertical flip */ - atarimo_entry prioritymask; /* mask for the priority */ - atarimo_entry neighbormask; /* mask for the neighbor */ - atarimo_entry absolutemask; /* mask for absolute coordinates */ - - atarimo_entry specialmask; /* mask for the special value */ + atarimo_entry linkmask; /* mask for the link */ + atarimo_entry gfxmask; /* mask for the graphics bank */ + atarimo_entry codemask; /* mask for the code index */ + atarimo_entry codehighmask; /* mask for the upper code index */ + atarimo_entry colormask; /* mask for the color */ + atarimo_entry xposmask; /* mask for the X position */ + atarimo_entry yposmask; /* mask for the Y position */ + atarimo_entry widthmask; /* mask for the width, in tiles*/ + atarimo_entry heightmask; /* mask for the height, in tiles */ + atarimo_entry hflipmask; /* mask for the horizontal flip */ + atarimo_entry vflipmask; /* mask for the vertical flip */ + atarimo_entry prioritymask; /* mask for the priority */ + atarimo_entry neighbormask; /* mask for the neighbor */ + atarimo_entry absolutemask; /* mask for absolute coordinates */ + + atarimo_entry specialmask; /* mask for the special value */ UINT16 specialvalue; /* resulting value to indicate "special" */ atarimo_special_func specialcb; /* callback routine for special entries */ }; diff --git a/src/mame/video/atarirle.c b/src/mame/video/atarirle.c index 2d2efc607e5..c0709c68f25 100644 --- a/src/mame/video/atarirle.c +++ b/src/mame/video/atarirle.c @@ -48,10 +48,10 @@ typedef struct atarirle_info atarirle_info; struct atarirle_info { INT16 width; - INT16 height; - INT16 xoffs; - INT16 yoffs; - UINT8 bpp; + INT16 height; + INT16 xoffs; + INT16 yoffs; + UINT8 bpp; const UINT16 * table; const UINT16 * data; }; @@ -73,15 +73,15 @@ struct atarirle_data rectangle cliprect; /* clipping rectangle */ - atarirle_mask codemask; /* mask for the code index */ - atarirle_mask colormask; /* mask for the color */ - atarirle_mask xposmask; /* mask for the X position */ - atarirle_mask yposmask; /* mask for the Y position */ - atarirle_mask scalemask; /* mask for the scale factor */ - atarirle_mask hflipmask; /* mask for the horizontal flip */ - atarirle_mask ordermask; /* mask for the order */ - atarirle_mask prioritymask; /* mask for the priority */ - atarirle_mask vrammask; /* mask for the VRAM target */ + atarirle_mask codemask; /* mask for the code index */ + atarirle_mask colormask; /* mask for the color */ + atarirle_mask xposmask; /* mask for the X position */ + atarirle_mask yposmask; /* mask for the Y position */ + atarirle_mask scalemask; /* mask for the scale factor */ + atarirle_mask hflipmask; /* mask for the horizontal flip */ + atarirle_mask ordermask; /* mask for the order */ + atarirle_mask prioritymask; /* mask for the priority */ + atarirle_mask vrammask; /* mask for the VRAM target */ const UINT16 * rombase; /* pointer to the base of the GFX ROM */ int romlength; /* length of the GFX ROM */ diff --git a/src/mame/video/atarirle.h b/src/mame/video/atarirle.h index 400c78d06f4..21375be5b84 100644 --- a/src/mame/video/atarirle.h +++ b/src/mame/video/atarirle.h @@ -56,15 +56,15 @@ struct atarirle_desc UINT16 palettebase; /* base palette entry */ UINT16 maxcolors; /* maximum number of colors */ - atarirle_entry codemask; /* mask for the code index */ - atarirle_entry colormask; /* mask for the color */ - atarirle_entry xposmask; /* mask for the X position */ - atarirle_entry yposmask; /* mask for the Y position */ - atarirle_entry scalemask; /* mask for the scale factor */ - atarirle_entry hflipmask; /* mask for the horizontal flip */ - atarirle_entry ordermask; /* mask for the order */ - atarirle_entry prioritymask; /* mask for the priority */ - atarirle_entry vrammask; /* mask for the VRAM target */ + atarirle_entry codemask; /* mask for the code index */ + atarirle_entry colormask; /* mask for the color */ + atarirle_entry xposmask; /* mask for the X position */ + atarirle_entry yposmask; /* mask for the Y position */ + atarirle_entry scalemask; /* mask for the scale factor */ + atarirle_entry hflipmask; /* mask for the horizontal flip */ + atarirle_entry ordermask; /* mask for the order */ + atarirle_entry prioritymask; /* mask for the priority */ + atarirle_entry vrammask; /* mask for the VRAM target */ }; diff --git a/src/mame/video/avgdvg.c b/src/mame/video/avgdvg.c index 77ce2825b94..2166f6cd38c 100644 --- a/src/mame/video/avgdvg.c +++ b/src/mame/video/avgdvg.c @@ -1188,7 +1188,7 @@ static TIMER_CALLBACK( run_state_machine ) int cycles = 0; UINT8 *state_prom = memory_region(machine, "user1"); - while (cycles < VGSLICE) + while (cycles < VGSLICE) { /* Get next state */ vg->state_latch = (vg->state_latch & 0x10) diff --git a/src/mame/video/bigstrkb.c b/src/mame/video/bigstrkb.c index 89061c79eb1..d60ace51d2f 100644 --- a/src/mame/video/bigstrkb.c +++ b/src/mame/video/bigstrkb.c @@ -67,7 +67,7 @@ static TILE_GET_INFO( get_bsb_tile_info ) int tileno,col; tileno = bsb_videoram[tile_index] & 0x0fff; - col= bsb_videoram[tile_index] & 0xf000; + col= bsb_videoram[tile_index] & 0xf000; SET_TILE_INFO(0,tileno,col>>12,0); } @@ -83,7 +83,7 @@ static TILE_GET_INFO( get_bsb_tile2_info ) int tileno,col; tileno = bsb_videoram2[tile_index] & 0x0fff; - col= bsb_videoram2[tile_index] & 0xf000; + col= bsb_videoram2[tile_index] & 0xf000; SET_TILE_INFO(1,tileno,col>>12,0); } @@ -100,7 +100,7 @@ static TILE_GET_INFO( get_bsb_tile3_info ) int tileno,col; tileno = bsb_videoram3[tile_index] & 0x0fff; - col= bsb_videoram3[tile_index] & 0xf000; + col= bsb_videoram3[tile_index] & 0xf000; SET_TILE_INFO(1,tileno+0x2000,(col>>12)+(0x100/16),0); } diff --git a/src/mame/video/carpolo.c b/src/mame/video/carpolo.c index f91faa0770d..b7310e6e927 100644 --- a/src/mame/video/carpolo.c +++ b/src/mame/video/carpolo.c @@ -185,7 +185,7 @@ VIDEO_START( carpolo ) *************************************/ static void draw_alpha_line(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, - int alpha_line, int video_line) + int alpha_line, int video_line) { int x; @@ -645,19 +645,19 @@ VIDEO_EOF( carpolo ) else if (check_sprite_sprite_collision(machine, car2_x, car2_y, car2_code, car2_flipy, - ball_x, ball_y, ball_code, ball_flipy, + ball_x, ball_y, ball_code, ball_flipy, &col_x, &col_y)) carpolo_generate_car_ball_interrupt(machine, 1, col_x, col_y); else if (check_sprite_sprite_collision(machine, car3_x, car3_y, car3_code, car3_flipy, - ball_x, ball_y, ball_code, ball_flipy, + ball_x, ball_y, ball_code, ball_flipy, &col_x, &col_y)) carpolo_generate_car_ball_interrupt(machine, 2, col_x, col_y); else if (check_sprite_sprite_collision(machine, car4_x, car4_y, car4_code, car4_flipy, - ball_x, ball_y, ball_code, ball_flipy, + ball_x, ball_y, ball_code, ball_flipy, &col_x, &col_y)) carpolo_generate_car_ball_interrupt(machine, 3, col_x, col_y); diff --git a/src/mame/video/cchasm.c b/src/mame/video/cchasm.c index 6b8ac8793a0..1e7b095ed42 100644 --- a/src/mame/video/cchasm.c +++ b/src/mame/video/cchasm.c @@ -43,7 +43,7 @@ static void cchasm_refresh (running_machine *machine) while (!done) { data = cchasm_ram[pc]; - opcode = data >> 12; + opcode = data >> 12; data &= 0xfff; if ((opcode > COLOR) && (data & 0x800)) data |= 0xfffff000; diff --git a/src/mame/video/cclimber.c b/src/mame/video/cclimber.c index d492aefae46..169ae7f0cdf 100644 --- a/src/mame/video/cclimber.c +++ b/src/mame/video/cclimber.c @@ -743,7 +743,7 @@ VIDEO_UPDATE( toprollr ) tilemap_set_scrollx(toproller_bg_tilemap, 0, toprollr_bg_videoram[0]); tilemap_set_flip(toproller_bg_tilemap, (CCLIMBER_FLIP_X ? TILEMAP_FLIPX : 0) | - (CCLIMBER_FLIP_Y ? TILEMAP_FLIPY : 0)); + (CCLIMBER_FLIP_Y ? TILEMAP_FLIPY : 0)); tilemap_mark_all_tiles_dirty(toproller_bg_tilemap); tilemap_draw(bitmap, &scroll_area_clip, toproller_bg_tilemap, 0, 0); diff --git a/src/mame/video/cischeat.c b/src/mame/video/cischeat.c index d68c8cf7051..518104775ac 100644 --- a/src/mame/video/cischeat.c +++ b/src/mame/video/cischeat.c @@ -147,7 +147,7 @@ VIDEO_START( cischeat ) shift_ret = 1; VIDEO_START_CALL(megasys1); - megasys1_bits_per_color_code = 5; + megasys1_bits_per_color_code = 5; prepare_shadows(); } @@ -161,7 +161,7 @@ VIDEO_START( f1gpstar ) { VIDEO_START_CALL(cischeat); - megasys1_bits_per_color_code = 4; + megasys1_bits_per_color_code = 4; } VIDEO_START( bigrun ) @@ -252,12 +252,12 @@ WRITE16_HANDLER( bigrun_vregs_w ) switch (offset) { - case 0x0000/2 : // leds + case 0x0000/2 : // leds if (ACCESSING_BITS_0_7) { - coin_counter_w(space->machine, 0,new_data & 0x01); - coin_counter_w(space->machine, 1,new_data & 0x02); - set_led_status(space->machine, 0,new_data & 0x10); // start button + coin_counter_w(space->machine, 0,new_data & 0x01); + coin_counter_w(space->machine, 1,new_data & 0x02); + set_led_status(space->machine, 0,new_data & 0x10); // start button set_led_status(space->machine, 1,new_data & 0x20); // ? } break; @@ -265,12 +265,12 @@ WRITE16_HANDLER( bigrun_vregs_w ) case 0x0002/2 : // ?? 91/1/91/1 ... break; - case 0x0004/2 : // motor (seat?) + case 0x0004/2 : // motor (seat?) if (ACCESSING_BITS_0_7) set_led_status(space->machine, 2, (new_data != old_data) ? 1 : 0); - break; + break; - case 0x0006/2 : // motor (wheel?) + case 0x0006/2 : // motor (wheel?) break; case 0x000a/2 : // to sound cpu @@ -345,12 +345,12 @@ WRITE16_HANDLER( cischeat_vregs_w ) switch (offset) { - case 0x0000/2 : // leds + case 0x0000/2 : // leds if (ACCESSING_BITS_0_7) { - coin_counter_w(space->machine, 0,new_data & 0x01); - coin_counter_w(space->machine, 1,new_data & 0x02); - set_led_status(space->machine, 0,new_data & 0x10); // start button + coin_counter_w(space->machine, 0,new_data & 0x01); + coin_counter_w(space->machine, 1,new_data & 0x02); + set_led_status(space->machine, 0,new_data & 0x10); // start button set_led_status(space->machine, 1,new_data & 0x20); // ? } break; @@ -358,12 +358,12 @@ WRITE16_HANDLER( cischeat_vregs_w ) case 0x0002/2 : // ?? 91/1/91/1 ... break; - case 0x0004/2 : // motor (seat?) + case 0x0004/2 : // motor (seat?) if (ACCESSING_BITS_0_7) set_led_status(space->machine, 2, (new_data != old_data) ? 1 : 0); - break; + break; - case 0x0006/2 : // motor (wheel?) + case 0x0006/2 : // motor (wheel?) break; case 0x0010/2 : cischeat_ip_select = new_data; break; @@ -489,8 +489,8 @@ CPU #0 PC 00235C : Warning, vreg 0006 <- 0000 case 0x0004/2 : if (ACCESSING_BITS_0_7) { - coin_counter_w(space->machine, 0,new_data & 0x01); - coin_counter_w(space->machine, 1,new_data & 0x02); + coin_counter_w(space->machine, 0,new_data & 0x01); + coin_counter_w(space->machine, 1,new_data & 0x02); set_led_status(space->machine, 0,new_data & 0x04); // start button set_led_status(space->machine, 1,new_data & 0x20); // ? // wheel | seat motor @@ -904,7 +904,7 @@ static void cischeat_draw_sprites(running_machine *machine, bitmap_t *bitmap , c continue; #ifdef MAME_DEBUG -if ( (debugsprites) && ( ((attr & 0x0300)>>8) != (debugsprites-1) ) ) { continue; }; +if ( (debugsprites) && ( ((attr & 0x0300)>>8) != (debugsprites-1) ) ) { continue; }; #endif xscale = xdim / 16; @@ -1058,7 +1058,7 @@ static void bigrun_draw_sprites(running_machine *machine, bitmap_t *bitmap , con continue; #ifdef MAME_DEBUG -if ( (debugsprites) && ( ((attr & 0x0300)>>8) != (debugsprites-1) ) ) { continue; }; +if ( (debugsprites) && ( ((attr & 0x0300)>>8) != (debugsprites-1) ) ) { continue; }; #endif xscale = xdim / 16; diff --git a/src/mame/video/cosmic.c b/src/mame/video/cosmic.c index d8ad241cee8..8dc17a3cb4a 100644 --- a/src/mame/video/cosmic.c +++ b/src/mame/video/cosmic.c @@ -501,7 +501,7 @@ static void nomnlnd_draw_background( const device_config *screen, bitmap_t *bitm color = (plane1 & plane2) | // R (plane2 ) << 1 | // G - (plane1 & !plane2) << 2; // B + (plane1 & !plane2) << 2; // B } } else @@ -519,7 +519,7 @@ static void nomnlnd_draw_background( const device_config *screen, bitmap_t *bitm color = ( plane1 & plane2) | // R ( plane1 | plane2) << 1 | // G - ((!plane1) & hd) << 2; // B - see above + ((!plane1) & hd) << 2; // B - see above } } diff --git a/src/mame/video/cps1.c b/src/mame/video/cps1.c index 184e86437c3..67f6f4ddea6 100644 --- a/src/mame/video/cps1.c +++ b/src/mame/video/cps1.c @@ -1446,7 +1446,7 @@ INLINE UINT16 *cps1_base( running_machine *machine, int offset, int boundary ) Mask out the irrelevant bits. */ base &= ~(boundary - 1); - return &state->gfxram[(base & 0x3ffff) / 2]; + return &state->gfxram[(base & 0x3ffff) / 2]; } diff --git a/src/mame/video/cvs.c b/src/mame/video/cvs.c index 92014643bee..80d8c13eac8 100644 --- a/src/mame/video/cvs.c +++ b/src/mame/video/cvs.c @@ -15,7 +15,7 @@ #define SPRITE_PEN_BASE (0x820) #define BULLET_STAR_PEN (0x828) -#define STARS_COLOR_BASE 16 +#define STARS_COLOR_BASE 16 /****************************************************** diff --git a/src/mame/video/darius.c b/src/mame/video/darius.c index 0f4b3807e8d..27e23dd43d3 100644 --- a/src/mame/video/darius.c +++ b/src/mame/video/darius.c @@ -97,7 +97,7 @@ static void draw_sprites(running_machine *machine, bitmap_t *bitmap,const rectan cury = sy + y_offs; if (curx > 900) curx -= 1024; - if (cury > 400) cury -= 512; + if (cury > 400) cury -= 512; sprite_ptr->code = code; sprite_ptr->color = color; @@ -134,7 +134,7 @@ VIDEO_UPDATE( darius ) PC080SN_tilemap_update(); // draw bottom layer(always active) - PC080SN_tilemap_draw_offset(bitmap,cliprect,0,0,TILEMAP_DRAW_OPAQUE,0,-xoffs,0); + PC080SN_tilemap_draw_offset(bitmap,cliprect,0,0,TILEMAP_DRAW_OPAQUE,0,-xoffs,0); /* Sprites can be under/over the layer below text layer */ draw_sprites(screen->machine,bitmap,cliprect,0,xoffs,-8); // draw sprites with priority 0 which are under the mid layer diff --git a/src/mame/video/dc.c b/src/mame/video/dc.c index ec8d12ea91f..dc89ac25c1d 100644 --- a/src/mame/video/dc.c +++ b/src/mame/video/dc.c @@ -304,7 +304,7 @@ INLINE UINT32 cv_565z(UINT16 c) INLINE UINT32 cv_4444(UINT16 c) { return - ((c << 16) & 0xf0000000) | ((c << 12) & 0x0f000000) | + ((c << 16) & 0xf0000000) | ((c << 12) & 0x0f000000) | ((c << 12) & 0x00f00000) | ((c << 8) & 0x000f0000) | ((c << 8) & 0x0000f000) | ((c << 4) & 0x00000f00) | ((c << 4) & 0x000000f0) | ((c ) & 0x0000000f); @@ -313,7 +313,7 @@ INLINE UINT32 cv_4444(UINT16 c) INLINE UINT32 cv_4444z(UINT16 c) { return - ((c << 16) & 0xf0000000) | + ((c << 16) & 0xf0000000) | ((c << 12) & 0x00f00000) | ((c << 8) & 0x0000f000) | ((c << 4) & 0x000000f0); @@ -592,7 +592,7 @@ static void tex_get_info(texinfo *t, pvrta_state *sa) t->address = sa->textureaddress; t->pf = sa->pixelformat; - t->palette = 0; + t->palette = 0; t->mode = (sa->vqcompressed<<1); @@ -879,7 +879,7 @@ INLINE int decode_reg_64(UINT32 offset, UINT64 mem_mask, UINT64 *shift) { reg++; *shift = 32; - } + } return reg; } @@ -1550,7 +1550,7 @@ static void process_ta_fifo(running_machine* machine) WRITE64_HANDLER( ta_fifo_poly_w ) { - if (mem_mask == U64(0xffffffffffffffff)) // 64 bit + if (mem_mask == U64(0xffffffffffffffff)) // 64 bit { tafifo_buff[state_ta.tafifo_pos]=(UINT32)data; tafifo_buff[state_ta.tafifo_pos+1]=(UINT32)(data >> 32); diff --git a/src/mame/video/dec0.c b/src/mame/video/dec0.c index dce6f5bcb30..2b267b0dfb7 100644 --- a/src/mame/video/dec0.c +++ b/src/mame/video/dec0.c @@ -599,7 +599,7 @@ WRITE16_HANDLER( dec0_pf3_data_w ) WRITE16_HANDLER( dec0_priority_w ) { - COMBINE_DATA(&dec0_pri); + COMBINE_DATA(&dec0_pri); } WRITE8_HANDLER( dec0_pf3_control_8bit_w ) diff --git a/src/mame/video/dec8.c b/src/mame/video/dec8.c index ea79ab8de5c..5b52cf39cba 100644 --- a/src/mame/video/dec8.c +++ b/src/mame/video/dec8.c @@ -322,7 +322,7 @@ static void draw_sprites2( running_machine* machine, bitmap_t *bitmap, const rec for (offs = 0; offs < 0x800; offs += 8) { y = buffered_spriteram[offs + 1] + (buffered_spriteram[offs] << 8); - if ((y & 0x8000) == 0) continue; + if ((y & 0x8000) == 0) continue; x = buffered_spriteram[offs + 5] + (buffered_spriteram[offs + 4] << 8); colour = ((x & 0xf000) >> 12); flash = x & 0x800; @@ -548,7 +548,7 @@ VIDEO_UPDATE( ghostb ) dec8_state *state = (dec8_state *)screen->machine->driver_data; if (state->pf0_control[0] & 0x4) { /* Rowscroll */ - int offs; + int offs; tilemap_set_scroll_rows(state->pf0_tilemap, 512); for (offs = 0; offs < 512; offs += 2) diff --git a/src/mame/video/dkong.c b/src/mame/video/dkong.c index c0c89188b27..ac78bd4905c 100644 --- a/src/mame/video/dkong.c +++ b/src/mame/video/dkong.c @@ -564,8 +564,8 @@ static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const recta dkong_state *state = (dkong_state *)machine->driver_data; int offs; int scanline_vf; /* buffering scanline including flip */ - int scanline_vfc; /* line buffering scanline including flip - this is the cached scanline_vf*/ - int scanline; /* current scanline */ + int scanline_vfc; /* line buffering scanline including flip - this is the cached scanline_vf*/ + int scanline; /* current scanline */ int add_y; int add_x; int num_sprt; @@ -694,7 +694,7 @@ INLINE double CD4049(running_machine *machine, double x) dkong_state *state = (dkong_state *)machine->driver_data; if (x>0) - return exp(-state->cd4049_a * pow(x,state->cd4049_b)); + return exp(-state->cd4049_a * pow(x,state->cd4049_b)); else return 1.0; } @@ -811,8 +811,8 @@ static void radarscp_draw_background(running_machine *machine, dkong_state *stat { const UINT8 *htable = NULL; int x,y; - UINT8 draw_ok; - UINT16 *pixel; + UINT8 draw_ok; + UINT16 *pixel; if (state->hardware_type == HARDWARE_TRS01) htable = state->gfx4; @@ -841,7 +841,7 @@ static void radarscp_scanline(running_machine *machine, int scanline) const UINT8 *table = state->gfx3; int table_len = state->gfx3_len; int x,y,offset; - UINT16 *pixel; + UINT16 *pixel; static int counter=0; const rectangle *visarea = video_screen_get_visible_area(machine->primary_screen); diff --git a/src/mame/video/gaelco2.c b/src/mame/video/gaelco2.c index dd671fb9b9d..5851c0f8319 100644 --- a/src/mame/video/gaelco2.c +++ b/src/mame/video/gaelco2.c @@ -440,7 +440,7 @@ VIDEO_UPDATE( gaelco2 ) int i; /* read scroll values */ - int scroll0x = gaelco2_videoram[0x2802/2] + 0x14; + int scroll0x = gaelco2_videoram[0x2802/2] + 0x14; int scroll1x = gaelco2_videoram[0x2806/2] + 0x10; int scroll0y = gaelco2_videoram[0x2800/2] + 0x01; int scroll1y = gaelco2_videoram[0x2804/2] + 0x01; diff --git a/src/mame/video/galaga.c b/src/mame/video/galaga.c index 5f004390cb1..e53dd5c1fdb 100644 --- a/src/mame/video/galaga.c +++ b/src/mame/video/galaga.c @@ -549,7 +549,7 @@ static void draw_stars(bitmap_t *bitmap, const rectangle *cliprect ) if ( galaga_starcontrol[5] == 1 ) { - int star_cntr; + int star_cntr; int set_a, set_b; /* two sets of stars controlled by these bits */ diff --git a/src/mame/video/galaxold.c b/src/mame/video/galaxold.c index 6dcc06c5142..23fdfdf847e 100644 --- a/src/mame/video/galaxold.c +++ b/src/mame/video/galaxold.c @@ -22,7 +22,7 @@ static const rectangle* spritevisiblearea; static const rectangle* spritevisibleareaflipx; -#define STARS_COLOR_BASE (memory_region_length(machine, "proms")) +#define STARS_COLOR_BASE (memory_region_length(machine, "proms")) #define BULLETS_COLOR_BASE (STARS_COLOR_BASE + 64) #define BACKGROUND_COLOR_BASE (BULLETS_COLOR_BASE + 2) diff --git a/src/mame/video/genesis.c b/src/mame/video/genesis.c index abb64a7640b..7cec3396d68 100644 --- a/src/mame/video/genesis.c +++ b/src/mame/video/genesis.c @@ -371,9 +371,9 @@ WRITE16_HANDLER( genesis_vdp_w ) { data &= mem_mask; if (ACCESSING_BITS_8_15) - data |= data >> 8; + data |= data >> 8; else - data |= data << 8; + data |= data << 8; } vdp_data_w(space->machine, data); break; @@ -384,9 +384,9 @@ WRITE16_HANDLER( genesis_vdp_w ) { data &= mem_mask; if (ACCESSING_BITS_8_15) - data |= data >> 8; + data |= data >> 8; else - data |= data << 8; + data |= data << 8; } vdp_control_w(space, data); break; diff --git a/src/mame/video/gstriker.c b/src/mame/video/gstriker.c index 81112d173cf..fbfcd0cf6d6 100644 --- a/src/mame/video/gstriker.c +++ b/src/mame/video/gstriker.c @@ -254,7 +254,7 @@ static void MB60553_draw(running_machine *machine, int numchip, bitmap_t* screen // int scrollx; // int scrolly; - UINT32 startx,starty; + UINT32 startx,starty; UINT32 incxx,incyy; diff --git a/src/mame/video/hd63484.c b/src/mame/video/hd63484.c index f1fab8aa3ff..901c7e69562 100644 --- a/src/mame/video/hd63484.c +++ b/src/mame/video/hd63484.c @@ -42,7 +42,7 @@ static const int instruction_length[64] = 0, 0, 4, 4, /* 5x */ 5, 5, 5, 5, /* 6x */ 5, 5, 5, 5, /* 7x */ - 3, 3, 3, 3, /* 8x */ + 3, 3, 3, 3, /* 8x */ 3, 3,-2,-2, /* 9x */ -2,-2, 2, 4, /* Ax */ 5, 5, 7, 7, /* Bx */ @@ -62,7 +62,7 @@ static const char *const instruction_name[64] = "undef","undef","CLR ","SCLR ", /* 5x */ "CPY ","CPY ","CPY ","CPY ", /* 6x */ "SCPY ","SCPY ","SCPY ","SCPY ", /* 7x */ - "AMOVE","RMOVE","ALINE","RLINE", /* 8x */ + "AMOVE","RMOVE","ALINE","RLINE", /* 8x */ "ARCT ","RRCT ","APLL ","RPLL ", /* 9x */ "APLG ","RPLG ","CRCL ","ELPS ", /* Ax */ "AARC ","RARC ","AEARC","REARC", /* Bx */ @@ -361,19 +361,19 @@ static void dot(int x, int y, int opm, UINT16 color) break; case 4: if (get_pixel(x,y) == (ccmp & bitmask)) - HD63484_ram[dst] = (HD63484_ram[dst] & ~bitmask_shifted) | color_shifted; + HD63484_ram[dst] = (HD63484_ram[dst] & ~bitmask_shifted) | color_shifted; break; case 5: if (get_pixel(x,y) != (ccmp & bitmask)) - HD63484_ram[dst] = (HD63484_ram[dst] & ~bitmask_shifted) | color_shifted; + HD63484_ram[dst] = (HD63484_ram[dst] & ~bitmask_shifted) | color_shifted; break; case 6: if (get_pixel(x,y) < (cl0 & bitmask)) - HD63484_ram[dst] = (HD63484_ram[dst] & ~bitmask_shifted) | color_shifted; + HD63484_ram[dst] = (HD63484_ram[dst] & ~bitmask_shifted) | color_shifted; break; case 7: if (get_pixel(x,y) > (cl0 & bitmask)) - HD63484_ram[dst] = (HD63484_ram[dst] & ~bitmask_shifted) | color_shifted; + HD63484_ram[dst] = (HD63484_ram[dst] & ~bitmask_shifted) | color_shifted; break; } } @@ -657,7 +657,7 @@ static void ptn(int opcode,int src_x,int src_y,INT16 _ax,INT16 _ay) case 0x0200: logerror("PTN: not supported"); break; case 0x0300: logerror("PTN: not supported"); break; case 0x0400: logerror("PTN: not supported"); break; - case 0x0500: logerror("PTN: not supported"); break; + case 0x0500: logerror("PTN: not supported"); break; case 0x0600: logerror("PTN: not supported"); break; case 0x0700: logerror("PTN: not supported"); break; } diff --git a/src/mame/video/hng64.c b/src/mame/video/hng64.c index fb3f3e7d1ca..cf3fd73138c 100644 --- a/src/mame/video/hng64.c +++ b/src/mame/video/hng64.c @@ -97,7 +97,7 @@ static void hng64_mark_tile_dirty( int tilemap, int tile_index ) } -#define PIXEL_OP_REMAP_TRANSPEN_PRIORITY_ADDIIVE32(DEST, PRIORITY, SOURCE) \ +#define PIXEL_OP_REMAP_TRANSPEN_PRIORITY_ADDIIVE32(DEST, PRIORITY, SOURCE) \ do \ { \ UINT32 srcdata = (SOURCE); \ @@ -719,7 +719,7 @@ struct _blit_parameters { bitmap_t * bitmap; rectangle cliprect; - UINT32 tilemap_priority_code; + UINT32 tilemap_priority_code; UINT8 mask; UINT8 value; UINT8 alpha; @@ -804,9 +804,9 @@ INLINE UINT32 alpha_additive_r32(UINT32 d, UINT32 s, UINT8 level) -------------------------------------------------*/ #define HNG64_ROZ_PLOT_PIXEL(INPUT_VAL) \ -do { \ +do { \ if (blit->drawformat == HNG64_TILEMAP_NORMAL) \ - *(UINT32 *)dest = clut[INPUT_VAL]; \ + *(UINT32 *)dest = clut[INPUT_VAL]; \ else if (blit->drawformat == HNG64_TILEMAP_ADDITIVE) \ *(UINT32 *)dest = alpha_additive_r32(*(UINT32 *)dest, clut[INPUT_VAL], alpha); \ else if (blit->drawformat == HNG64_TILEMAP_ALPHA) \ @@ -1044,7 +1044,7 @@ static void hng64_drawtilemap(running_machine* machine, bitmap_t *bitmap, const debug_blend_enabled = 1; if ((global_dimensions != 0) && (global_dimensions != 3)) - popmessage("unsupported global_dimensions on tilemaps"); + popmessage("unsupported global_dimensions on tilemaps"); if (tm==0) { diff --git a/src/mame/video/homedata.c b/src/mame/video/homedata.c index d8438ab51ea..1a673490ee7 100644 --- a/src/mame/video/homedata.c +++ b/src/mame/video/homedata.c @@ -72,8 +72,8 @@ static void mrokumei_handleblit( const address_space *space, int rom_base ) */ if( opcode == 0x00 ) { - /* end-of-graphic */ - goto finish; + /* end-of-graphic */ + goto finish; } data = pBlitData[source_addr++]; @@ -256,8 +256,8 @@ static void pteacher_handleblit( const address_space *space, int rom_base ) */ if (opcode == 0x00) { - /* end-of-graphic */ - goto finish; + /* end-of-graphic */ + goto finish; } data = pBlitData[source_addr++]; diff --git a/src/mame/video/homerun.c b/src/mame/video/homerun.c index 21344946abe..ee75feeba47 100644 --- a/src/mame/video/homerun.c +++ b/src/mame/video/homerun.c @@ -12,7 +12,7 @@ WRITE8_DEVICE_HANDLER(homerun_banking_w) else state->gc_up = data & 3; - tilemap_mark_all_tiles_dirty(state->tilemap); + tilemap_mark_all_tiles_dirty(state->tilemap); data >>= 5; memory_set_bank(device->machine, "bank1", data & 0x07); diff --git a/src/mame/video/itech32.c b/src/mame/video/itech32.c index c81e33eb167..e8ec332265d 100644 --- a/src/mame/video/itech32.c +++ b/src/mame/video/itech32.c @@ -27,7 +27,7 @@ * *************************************/ -#define VIDEO_UNKNOWN00 itech32_video[0x00/2] /* $0087 at startup */ +#define VIDEO_UNKNOWN00 itech32_video[0x00/2] /* $0087 at startup */ #define VIDEO_STATUS itech32_video[0x00/2] #define VIDEO_INTSTATE itech32_video[0x02/2] #define VIDEO_INTACK itech32_video[0x02/2] diff --git a/src/mame/video/kaneko16.c b/src/mame/video/kaneko16.c index bf48e767e16..97533c297a3 100644 --- a/src/mame/video/kaneko16.c +++ b/src/mame/video/kaneko16.c @@ -433,7 +433,7 @@ else s->yoffs += video_screen_get_visible_area(machine->primary_screen)->min_y<<6; } - return ( (attr & 0x2000) ? USE_LATCHED_XY : 0 ) | + return ( (attr & 0x2000) ? USE_LATCHED_XY : 0 ) | ( (attr & 0x4000) ? USE_LATCHED_COLOR : 0 ) | ( (attr & 0x8000) ? USE_LATCHED_CODE : 0 ) ; } @@ -881,9 +881,9 @@ static void kaneko16_prepare_first_tilemap_chip(running_machine *machine, bitmap /* Flip layers */ tilemap_set_flip(kaneko16_tmap_0, ((layers_flip_0 & 0x0100) ? TILEMAP_FLIPY : 0) | - ((layers_flip_0 & 0x0200) ? TILEMAP_FLIPX : 0) ); + ((layers_flip_0 & 0x0200) ? TILEMAP_FLIPX : 0) ); tilemap_set_flip(kaneko16_tmap_1, ((layers_flip_0 & 0x0100) ? TILEMAP_FLIPY : 0) | - ((layers_flip_0 & 0x0200) ? TILEMAP_FLIPX : 0) ); + ((layers_flip_0 & 0x0200) ? TILEMAP_FLIPX : 0) ); /* Scroll layers */ layer0_scrollx = kaneko16_layers_0_regs[ 2 ]; @@ -913,17 +913,17 @@ static void kaneko16_prepare_second_tilemap_chip(running_machine *machine, bitma UINT16 layer1_scrollx, layer1_scrolly; int i; - if (kaneko16_tmap_2) - { + if (kaneko16_tmap_2) + { layers_flip_1 = kaneko16_layers_1_regs[ 4 ]; tilemap_set_enable(kaneko16_tmap_2, ~layers_flip_1 & 0x1000); tilemap_set_enable(kaneko16_tmap_3, ~layers_flip_1 & 0x0010); tilemap_set_flip(kaneko16_tmap_2, ((layers_flip_1 & 0x0100) ? TILEMAP_FLIPY : 0) | - ((layers_flip_1 & 0x0200) ? TILEMAP_FLIPX : 0) ); + ((layers_flip_1 & 0x0200) ? TILEMAP_FLIPX : 0) ); tilemap_set_flip(kaneko16_tmap_3, ((layers_flip_1 & 0x0100) ? TILEMAP_FLIPY : 0) | - ((layers_flip_1 & 0x0200) ? TILEMAP_FLIPX : 0) ); + ((layers_flip_1 & 0x0200) ? TILEMAP_FLIPX : 0) ); layer0_scrollx = kaneko16_layers_1_regs[ 2 ]; layer0_scrolly = kaneko16_layers_1_regs[ 3 ] >> 6; diff --git a/src/mame/video/konamigx.c b/src/mame/video/konamigx.c index d4042d56b15..c54591f4cf6 100644 --- a/src/mame/video/konamigx.c +++ b/src/mame/video/konamigx.c @@ -1831,8 +1831,8 @@ WRITE32_HANDLER( konamigx_type3_psac2_bank_w ) /* Soccer Superstars (tile and flip bits now TRUSTED) */ static TILE_GET_INFO( get_gx_psac3_tile_info ) { - int tileno, colour, flip; - UINT8 *tmap = memory_region(machine, "gfx4"); + int tileno, colour, flip; + UINT8 *tmap = memory_region(machine, "gfx4"); int base_index = tile_index; @@ -1843,17 +1843,17 @@ WRITE32_HANDLER( konamigx_type3_psac2_bank_w ) tileno = tmap[base_index*2] | ((tmap[(base_index*2)+1] & 0x0f)<<8); colour = (tmap[(base_index*2)+1]&0xc0)>>6; - flip = 0; + flip = 0; if (tmap[(base_index*2)+1] & 0x20) flip |= TILE_FLIPY; if (tmap[(base_index*2)+1] & 0x10) flip |= TILE_FLIPX; - SET_TILE_INFO(0, tileno, colour, flip); + SET_TILE_INFO(0, tileno, colour, flip); } static TILE_GET_INFO( get_gx_psac3_alt_tile_info ) { - int tileno, colour, flip; - UINT8 *tmap = memory_region(machine, "gfx4")+0x20000; + int tileno, colour, flip; + UINT8 *tmap = memory_region(machine, "gfx4")+0x20000; int base_index = tile_index; @@ -1864,11 +1864,11 @@ WRITE32_HANDLER( konamigx_type3_psac2_bank_w ) tileno = tmap[base_index*2] | ((tmap[(base_index*2)+1] & 0x0f)<<8); colour = (tmap[(base_index*2)+1]&0xc0)>>6; - flip = 0; + flip = 0; if (tmap[(base_index*2)+1] & 0x20) flip |= TILE_FLIPY; if (tmap[(base_index*2)+1] & 0x10) flip |= TILE_FLIPX; - SET_TILE_INFO(0, tileno, colour, flip); + SET_TILE_INFO(0, tileno, colour, flip); } @@ -2053,7 +2053,7 @@ VIDEO_START(konamigx_5bpp) } else if (!strcmp(machine->gamedrv->name,"gokuparo") || !strcmp(machine->gamedrv->name,"fantjour")) - { + { K053247GP_set_SpriteOffset(-46, -23); } else @@ -2345,7 +2345,7 @@ VIDEO_UPDATE(konamigx) { int r,g,b; - r = (screen->machine->generic.paletteram.u32[offset] >>16) & 0xff; + r = (screen->machine->generic.paletteram.u32[offset] >>16) & 0xff; g = (screen->machine->generic.paletteram.u32[offset] >> 8) & 0xff; b = (screen->machine->generic.paletteram.u32[offset] >> 0) & 0xff; @@ -2392,7 +2392,7 @@ VIDEO_UPDATE(konamigx) { int r,g,b; - r = (gx_subpaletteram32[offset] >>16) & 0xff; + r = (gx_subpaletteram32[offset] >>16) & 0xff; g = (gx_subpaletteram32[offset] >> 8) & 0xff; b = (gx_subpaletteram32[offset] >> 0) & 0xff; @@ -2467,8 +2467,8 @@ VIDEO_UPDATE(konamigx) { konamigx_mixer(screen->machine, bitmap, cliprect, gx_psac_tilemap, GXSUB_8BPP,0,0, 0, 0, gx_rushingheroes_hack); } - // hack, draw the roz tilemap if W is held - // todo: fix so that it works with the mixer without crashing(!) + // hack, draw the roz tilemap if W is held + // todo: fix so that it works with the mixer without crashing(!) else if (gx_specialrozenable == 2) { // we're going to throw half of this away anyway in post-process, so only render what's needed @@ -2486,7 +2486,7 @@ VIDEO_UPDATE(konamigx) } else { - konamigx_mixer(screen->machine, bitmap, cliprect, 0, 0, 0, 0, 0, 0, gx_rushingheroes_hack); + konamigx_mixer(screen->machine, bitmap, cliprect, 0, 0, 0, 0, 0, 0, gx_rushingheroes_hack); } @@ -2551,7 +2551,7 @@ WRITE32_HANDLER( konamigx_palette_w ) COMBINE_DATA(&space->machine->generic.paletteram.u32[offset]); - r = (space->machine->generic.paletteram.u32[offset] >>16) & 0xff; + r = (space->machine->generic.paletteram.u32[offset] >>16) & 0xff; g = (space->machine->generic.paletteram.u32[offset] >> 8) & 0xff; b = (space->machine->generic.paletteram.u32[offset] >> 0) & 0xff; @@ -2564,7 +2564,7 @@ WRITE32_HANDLER( konamigx_palette2_w ) COMBINE_DATA(&gx_subpaletteram32[offset]); - r = (gx_subpaletteram32[offset] >>16) & 0xff; + r = (gx_subpaletteram32[offset] >>16) & 0xff; g = (gx_subpaletteram32[offset] >> 8) & 0xff; b = (gx_subpaletteram32[offset] >> 0) & 0xff; diff --git a/src/mame/video/konamiic.c b/src/mame/video/konamiic.c index 3b0e7705692..bc4033bbea8 100644 --- a/src/mame/video/konamiic.c +++ b/src/mame/video/konamiic.c @@ -2988,7 +2988,7 @@ void K053245_vh_start(running_machine *machine,int chip, const char *gfx_memory_ 16,16, 0, 4, - { 24, 16, 8, 0 }, + { 24, 16, 8, 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8*32+0, 8*32+1, 8*32+2, 8*32+3, 8*32+4, 8*32+5, 8*32+6, 8*32+7 }, { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32, @@ -6233,7 +6233,7 @@ WRITE16_HANDLER( K056832_ram_half_word_w ) if (K056832_PageTileMode[K056832_SelectedPage]) tilemap_mark_tile_dirty(K056832_tilemap[K056832_SelectedPage], dofs); else - K056832_mark_line_dirty(K056832_SelectedPage, dofs); + K056832_mark_line_dirty(K056832_SelectedPage, dofs); } } diff --git a/src/mame/video/konamiic.h b/src/mame/video/konamiic.h index 46e9a81eb4c..88897592456 100644 --- a/src/mame/video/konamiic.h +++ b/src/mame/video/konamiic.h @@ -344,12 +344,12 @@ int K055555_get_palette_index(int idx); #define K55_PRIINP_10 17 // sub 2 (GX:PSAC) pri #define K55_PRIINP_11 18 // sub 3 pri -#define K55_OINPRI_ON 19 // object priority bits selector +#define K55_OINPRI_ON 19 // object priority bits selector -#define K55_PALBASE_A 23 // layer A palette -#define K55_PALBASE_B 24 // layer B palette -#define K55_PALBASE_C 25 // layer C palette -#define K55_PALBASE_D 26 // layer D palette +#define K55_PALBASE_A 23 // layer A palette +#define K55_PALBASE_B 24 // layer B palette +#define K55_PALBASE_C 25 // layer C palette +#define K55_PALBASE_D 26 // layer D palette #define K55_PALBASE_OBJ 27 // OBJ palette #define K55_PALBASE_SUB1 28 // SUB1 palette #define K55_PALBASE_SUB2 29 // SUB2 palette diff --git a/src/mame/video/konicdev.c b/src/mame/video/konicdev.c index f9783bd075e..ed3be3ab03c 100644 --- a/src/mame/video/konicdev.c +++ b/src/mame/video/konicdev.c @@ -4015,7 +4015,7 @@ static DEVICE_START( k05324x ) 16,16, 0, 4, - { 24, 16, 8, 0 }, + { 24, 16, 8, 0 }, { 0, 1, 2, 3, 4, 5, 6, 7, 8*32+0, 8*32+1, 8*32+2, 8*32+3, 8*32+4, 8*32+5, 8*32+6, 8*32+7 }, { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32, @@ -6711,7 +6711,7 @@ WRITE16_DEVICE_HANDLER( k056832_ram_half_word_w ) if (k056832->page_tile_mode[k056832->selected_page]) tilemap_mark_tile_dirty(k056832->tilemap[k056832->selected_page], dofs); else - k056832_mark_line_dirty(k056832->selected_page, dofs); + k056832_mark_line_dirty(k056832->selected_page, dofs); } } diff --git a/src/mame/video/ladybug.c b/src/mame/video/ladybug.c index 181c4739b91..94d80b03f5a 100644 --- a/src/mame/video/ladybug.c +++ b/src/mame/video/ladybug.c @@ -343,8 +343,8 @@ VIDEO_UPDATE( sraider ) // draw the gridlines colortable_palette_set_color(screen->machine->colortable, 0x40, MAKE_RGB(state->grid_color & 0x40 ? 0xff : 0, - state->grid_color & 0x20 ? 0xff : 0, - state->grid_color & 0x10 ? 0xff : 0)); + state->grid_color & 0x20 ? 0xff : 0, + state->grid_color & 0x10 ? 0xff : 0)); tilemap_draw(bitmap, cliprect, state->grid_tilemap, 0, flip_screen_get(screen->machine)); for (i = 0; i < 0x100; i++) diff --git a/src/mame/video/legionna.c b/src/mame/video/legionna.c index d8f759435f5..1fe4fc892b7 100644 --- a/src/mame/video/legionna.c +++ b/src/mame/video/legionna.c @@ -415,8 +415,8 @@ VIDEO_UPDATE( grainbow ) tilemap_set_scrolly( midground_layer, 0, legionna_scrollram16[3] ); tilemap_set_scrollx( foreground_layer, 0, legionna_scrollram16[4] ); tilemap_set_scrolly( foreground_layer, 0, legionna_scrollram16[5] ); - tilemap_set_scrollx( text_layer, 0, legionna_scrollram16[6] ); - tilemap_set_scrolly( text_layer, 0, legionna_scrollram16[7] ); + tilemap_set_scrollx( text_layer, 0, legionna_scrollram16[6] ); + tilemap_set_scrolly( text_layer, 0, legionna_scrollram16[7] ); bitmap_fill(bitmap,cliprect,get_black_pen(screen->machine)); diff --git a/src/mame/video/leland.c b/src/mame/video/leland.c index 649d385e894..d37fc4e9cff 100644 --- a/src/mame/video/leland.c +++ b/src/mame/video/leland.c @@ -14,7 +14,7 @@ #define VRAM_SIZE (0x10000) #define QRAM_SIZE (0x10000) -#define VIDEO_WIDTH (320) +#define VIDEO_WIDTH (320) /* debugging */ diff --git a/src/mame/video/lethal.c b/src/mame/video/lethal.c index 55cc5cccaac..d23b91c8f03 100644 --- a/src/mame/video/lethal.c +++ b/src/mame/video/lethal.c @@ -60,7 +60,7 @@ VIDEO_START(lethalen) } else { /* fixme */ - k056832_set_layer_offs(k056832, 0, 188, 0); + k056832_set_layer_offs(k056832, 0, 188, 0); k056832_set_layer_offs(k056832, 1, 190, 0); k056832_set_layer_offs(k056832, 2, 192, 0); k056832_set_layer_offs(k056832, 3, 194, 0); diff --git a/src/mame/video/liberate.c b/src/mame/video/liberate.c index de9a0ba97f2..c6ef02c41b9 100644 --- a/src/mame/video/liberate.c +++ b/src/mame/video/liberate.c @@ -354,7 +354,7 @@ static void prosport_draw_sprites(running_machine *machine, bitmap_t *bitmap, co for (offs = 0x000;offs < 0x800;offs += 4) { - if ((spriteram[offs+0]&1)!=1) continue; + if ((spriteram[offs+0]&1)!=1) continue; code = spriteram[offs+1] + ((spriteram[offs+0]&0x3)<<8); code2=code+1; diff --git a/src/mame/video/liberatr.c b/src/mame/video/liberatr.c index da2a10eddb9..c29baba95d3 100644 --- a/src/mame/video/liberatr.c +++ b/src/mame/video/liberatr.c @@ -192,7 +192,7 @@ static void liberatr_init_planet(running_machine *machine, planet *liberatr_plan /* transfer from the temporary arrays to the structure */ line->max_x = (latitude_scale_factor * 0xc0) >> 8; if (line->max_x & 1) - line->max_x += 1; /* make it even */ + line->max_x += 1; /* make it even */ /* as part of the quest to reduce memory usage (and to a lesser degree diff --git a/src/mame/video/lsasquad.c b/src/mame/video/lsasquad.c index 347a41944e9..0359249d621 100644 --- a/src/mame/video/lsasquad.c +++ b/src/mame/video/lsasquad.c @@ -82,9 +82,9 @@ static int draw_layer_daikaiju(running_machine *machine, bitmap_t *bitmap, const scrolly = -lsasquad_scrollram[offs+0]; scrollx = lsasquad_scrollram[offs+3]; - //check for global x scroll used in bg layer in game (starts at offset 0 in scrollram - // and game name/logo on title screen (starts in the middle of scrollram, but with different - // (NOT unique )id than prev coulmn(s) + //check for global x scroll used in bg layer in game (starts at offset 0 in scrollram + // and game name/logo on title screen (starts in the middle of scrollram, but with different + // (NOT unique )id than prev coulmn(s) if( *previd!=1 ) { diff --git a/src/mame/video/m107.c b/src/mame/video/m107.c index d502a186ca2..2942af6578d 100644 --- a/src/mame/video/m107.c +++ b/src/mame/video/m107.c @@ -226,7 +226,7 @@ static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const recta if (rom[rom_offs+1]&0x80) break; /* end of block */ - rom_offs += 8; + rom_offs += 8; } } } diff --git a/src/mame/video/m92.c b/src/mame/video/m92.c index c0d157f439e..a10d0f865cb 100644 --- a/src/mame/video/m92.c +++ b/src/mame/video/m92.c @@ -311,7 +311,7 @@ static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const recta if (buffered_spriteram16[offs+2] & 0x0080) pri_back=0; else pri_back=2; - sprite= buffered_spriteram16[offs+1]; + sprite= buffered_spriteram16[offs+1]; colour = buffered_spriteram16[offs+2] & 0x007f; pri_sprite= (buffered_spriteram16[offs+0] & 0xe000) >> 13; diff --git a/src/mame/video/madalien.c b/src/mame/video/madalien.c index 5a7782fe7ea..154323c44c5 100644 --- a/src/mame/video/madalien.c +++ b/src/mame/video/madalien.c @@ -18,7 +18,7 @@ UINT8 *madalien_videoram; UINT8 *madalien_charram; UINT8 *madalien_video_flags; -UINT8 *madalien_video_control; /* bit #0 is set during player 2's turn, bit #3 is set during CRTC initialization */ +UINT8 *madalien_video_control; /* bit #0 is set during player 2's turn, bit #3 is set during CRTC initialization */ UINT8 *madalien_scroll; UINT8 *madalien_edge1_pos; UINT8 *madalien_edge2_pos; diff --git a/src/mame/video/magmax.c b/src/mame/video/magmax.c index 36ee6e3c337..f2041a06408 100644 --- a/src/mame/video/magmax.c +++ b/src/mame/video/magmax.c @@ -78,7 +78,7 @@ VIDEO_START( magmax ) prom_tab = auto_alloc_array(machine, UINT32, 256); /* Allocate temporary bitmap */ - machine->generic.tmpbitmap = video_screen_auto_bitmap_alloc(machine->primary_screen); + machine->generic.tmpbitmap = video_screen_auto_bitmap_alloc(machine->primary_screen); for (i=0; i<256; i++) { diff --git a/src/mame/video/meadows.c b/src/mame/video/meadows.c index f3e93cfe81d..4e0e460f2ce 100644 --- a/src/mame/video/meadows.c +++ b/src/mame/video/meadows.c @@ -84,7 +84,7 @@ static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const recta { int x = spriteram[i+0] + SPR_ADJUST_X; int y = spriteram[i+4] + SPR_ADJUST_Y; - int code = spriteram[i+8] & 0x0f; /* bit #0 .. #3 select sprite */ + int code = spriteram[i+8] & 0x0f; /* bit #0 .. #3 select sprite */ /* int bank = (spriteram[i+8] >> 4) & 1; bit #4 selects prom ??? */ int bank = i; /* that fixes it for now :-/ */ int flip = spriteram[i+8] >> 5; /* bit #5 flip vertical flag */ diff --git a/src/mame/video/megasys1.c b/src/mame/video/megasys1.c index 4592b04ee7d..3e76494d4b9 100644 --- a/src/mame/video/megasys1.c +++ b/src/mame/video/megasys1.c @@ -261,12 +261,12 @@ VIDEO_START( megasys1 ) megasys1_active_layers = megasys1_sprite_bank = megasys1_screen_flag = megasys1_sprite_flag = 0; - for (i = 0; i < 3; i ++) + for (i = 0; i < 3; i ++) { megasys1_scroll_flag[i] = megasys1_scrollx[i] = megasys1_scrolly[i] = 0; } - megasys1_bits_per_color_code = 4; + megasys1_bits_per_color_code = 4; /* The tile code of a specific layer is multiplied for a constant @@ -817,7 +817,7 @@ PALETTE_INIT( megasys1 ) { if (opacity & top_mask) { - if (layer != top ) result |= 1; // error: opaque pens aren't always opaque! + if (layer != top ) result |= 1; // error: opaque pens aren't always opaque! } else { diff --git a/src/mame/video/metro.c b/src/mame/video/metro.c index 3762b88cde8..3493e20db02 100644 --- a/src/mame/video/metro.c +++ b/src/mame/video/metro.c @@ -736,7 +736,7 @@ void metro_draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectan ***************************************************************************/ static void draw_tilemap(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, tilemap_t *tmap, UINT32 flags, UINT32 priority, - int sx, int sy, int wx, int wy) // scroll & window values + int sx, int sy, int wx, int wy) // scroll & window values { #if 1 tilemap_set_scrollx(tmap, 0, sx - wx + (wx & 7)); diff --git a/src/mame/video/midtunit.c b/src/mame/video/midtunit.c index 354109c258c..dd5aac8600c 100644 --- a/src/mame/video/midtunit.c +++ b/src/mame/video/midtunit.c @@ -44,7 +44,7 @@ enum static UINT16 midtunit_control; /* videoram-related variables */ -static UINT32 gfxbank_offset[2]; +static UINT32 gfxbank_offset[2]; static UINT16 * local_videoram; static UINT8 videobank_select; @@ -53,8 +53,8 @@ static UINT16 dma_register[18]; static struct { UINT32 offset; /* source offset, in bits */ - INT32 rowbits; /* source bits to skip each row */ - INT32 xpos; /* x position, clipped */ + INT32 rowbits; /* source bits to skip each row */ + INT32 xpos; /* x position, clipped */ INT32 ypos; /* y position, clipped */ INT32 width; /* horizontal pixel count */ INT32 height; /* vertical pixel count */ @@ -456,9 +456,9 @@ typedef void (*dma_draw_func)(void); } \ \ /* update pointers */ \ - if (xflip) \ + if (xflip) \ sx = (sx - 1) & XPOSMASK; \ - else \ + else \ sx = (sx + 1) & XPOSMASK; \ \ /* advance to the next pixel */ \ @@ -558,15 +558,15 @@ DMA_DRAW_FUNC(prefix##_p0c1_xf, bpp, extract, XFLIP_YES, skip, scale, PIXEL_COPY static const dma_draw_func prefix[32] = \ { \ /* B0:N / B1:N B0:Y / B1:N B0:N / B1:Y B0:Y / B1:Y */ \ - dma_draw_none, prefix##_p0, prefix##_p1, prefix##_p0p1, /* no color */ \ - prefix##_c0, prefix##_c0, prefix##_c0p1, prefix##_c0p1, /* color 0 pixels */ \ + dma_draw_none, prefix##_p0, prefix##_p1, prefix##_p0p1, /* no color */ \ + prefix##_c0, prefix##_c0, prefix##_c0p1, prefix##_c0p1, /* color 0 pixels */ \ prefix##_c1, prefix##_p0c1, prefix##_c1, prefix##_p0c1, /* color non-0 pixels */\ - prefix##_c0c1, prefix##_c0c1, prefix##_c0c1, prefix##_c0c1, /* fill */ \ + prefix##_c0c1, prefix##_c0c1, prefix##_c0c1, prefix##_c0c1, /* fill */ \ \ - dma_draw_none, prefix##_p0_xf, prefix##_p1_xf, prefix##_p0p1_xf, /* no color */ \ - prefix##_c0_xf, prefix##_c0_xf, prefix##_c0p1_xf, prefix##_c0p1_xf, /* color 0 pixels */ \ + dma_draw_none, prefix##_p0_xf, prefix##_p1_xf, prefix##_p0p1_xf, /* no color */ \ + prefix##_c0_xf, prefix##_c0_xf, prefix##_c0p1_xf, prefix##_c0p1_xf, /* color 0 pixels */ \ prefix##_c1_xf, prefix##_p0c1_xf, prefix##_c1_xf, prefix##_p0c1_xf, /* color non-0 pixels */\ - prefix##_c0c1_xf, prefix##_c0c1_xf, prefix##_c0c1_xf, prefix##_c0c1_xf /* fill */ \ + prefix##_c0c1_xf, prefix##_c0c1_xf, prefix##_c0c1_xf, prefix##_c0c1_xf /* fill */ \ }; diff --git a/src/mame/video/midvunit.c b/src/mame/video/midvunit.c index b078ae0ed22..6263a2993af 100644 --- a/src/mame/video/midvunit.c +++ b/src/mame/video/midvunit.c @@ -41,7 +41,7 @@ typedef struct _poly_extra_data poly_extra_data; struct _poly_extra_data { UINT8 * texbase; - UINT16 pixdata; + UINT16 pixdata; UINT8 dither; }; diff --git a/src/mame/video/midyunit.c b/src/mame/video/midyunit.c index 8bd07fde7b9..864a43e0f30 100644 --- a/src/mame/video/midyunit.c +++ b/src/mame/video/midyunit.c @@ -50,8 +50,8 @@ static UINT16 dma_register[16]; static struct { UINT32 offset; /* source offset, in bits */ - INT32 rowbytes; /* source bytes to skip each row */ - INT32 xpos; /* x position, clipped */ + INT32 rowbytes; /* source bytes to skip each row */ + INT32 xpos; /* x position, clipped */ INT32 ypos; /* y position, clipped */ INT32 width; /* horizontal pixel count */ INT32 height; /* vertical pixel count */ diff --git a/src/mame/video/model3.c b/src/mame/video/model3.c index ac962c9db5d..ea72b818d54 100644 --- a/src/mame/video/model3.c +++ b/src/mame/video/model3.c @@ -7,7 +7,7 @@ #define pz p[0] -#define pu p[1] +#define pu p[1] #define pv p[2] @@ -1288,17 +1288,17 @@ static void draw_model(UINT32 addr) memcpy(&tri.v[0], &clip_vert[0], sizeof(poly_vertex)); memcpy(&tri.v[1], &clip_vert[i-1], sizeof(poly_vertex)); memcpy(&tri.v[2], &clip_vert[i], sizeof(poly_vertex)); - tri.texture_x = ((header[4] & 0x1f) << 1) | ((header[5] >> 7) & 0x1); - tri.texture_y = (header[5] & 0x1f); + tri.texture_x = ((header[4] & 0x1f) << 1) | ((header[5] >> 7) & 0x1); + tri.texture_y = (header[5] & 0x1f); tri.texture_width = ((header[3] >> 3) & 0x7); tri.texture_height = (header[3] & 0x7); tri.texture_format = (header[6] >> 7) & 0x7; tri.transparency = polygon_transparency; - tri.intensity = intensity; - tri.color = color; + tri.intensity = intensity; + tri.color = color; tri.param = 0; - tri.param |= (header[4] & 0x40) ? TRI_PARAM_TEXTURE_PAGE : 0; + tri.param |= (header[4] & 0x40) ? TRI_PARAM_TEXTURE_PAGE : 0; tri.param |= (header[6] & 0x4000000) ? TRI_PARAM_TEXTURE_ENABLE : 0; tri.param |= (header[2] & 0x2) ? TRI_PARAM_TEXTURE_MIRROR_U : 0; tri.param |= (header[2] & 0x1) ? TRI_PARAM_TEXTURE_MIRROR_V : 0; diff --git a/src/mame/video/momoko.c b/src/mame/video/momoko.c index ec2d80576d6..6365d55d551 100644 --- a/src/mame/video/momoko.c +++ b/src/mame/video/momoko.c @@ -297,7 +297,7 @@ VIDEO_UPDATE( momoko ) for (x=0; x<32; x++) { radr = ((ry + y +34) & 0x3f) *0x20 + ((rx + x) & 0x1f) + (momoko_fg_select & 3) *0x800; - chr = FG_MAP[ radr ] ; + chr = FG_MAP[ radr ] ; if (flip==0) { px = 8*x+dx-6; diff --git a/src/mame/video/moo.c b/src/mame/video/moo.c index 1a5efd8f140..b9ebbb16468 100644 --- a/src/mame/video/moo.c +++ b/src/mame/video/moo.c @@ -29,7 +29,7 @@ void moo_sprite_callback(running_machine *machine, int *code, int *color, int *p if (pri <= layerpri[2]) *priority_mask = 0; else if (pri <= layerpri[1]) *priority_mask = 0xf0; else if (pri <= layerpri[0]) *priority_mask = 0xf0|0xcc; - else *priority_mask = 0xf0|0xcc|0xaa; + else *priority_mask = 0xf0|0xcc|0xaa; *color = sprite_colorbase | (*color & 0x001f); } diff --git a/src/mame/video/munchmo.c b/src/mame/video/munchmo.c index e766d394846..b25b1c93c94 100644 --- a/src/mame/video/munchmo.c +++ b/src/mame/video/munchmo.c @@ -144,7 +144,7 @@ static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const recta drawgfx_transpen( bitmap, cliprect, gfx, 0x7f - (tile_number & 0x7f), color_base - (attributes & 0x03), - 0,0, /* no flip */ + 0,0, /* no flip */ sx,sy, 7 ); } } diff --git a/src/mame/video/mw8080bw.c b/src/mame/video/mw8080bw.c index 71d6e3d07d7..0f4b59fb21e 100644 --- a/src/mame/video/mw8080bw.c +++ b/src/mame/video/mw8080bw.c @@ -10,7 +10,7 @@ VIDEO_UPDATE( mw8080bw ) { - mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data; + mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data; UINT8 x = 0; UINT8 y = MW8080BW_VCOUNTER_START_NO_VBLANK; UINT8 video_data = 0; @@ -77,7 +77,7 @@ VIDEO_UPDATE( mw8080bw ) VIDEO_UPDATE( spcenctr ) { - mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data; + mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data; UINT8 line_buf[256]; /* 256x1 bit RAM */ UINT8 x = 0; @@ -221,7 +221,7 @@ VIDEO_UPDATE( spcenctr ) VIDEO_UPDATE( phantom2 ) { - mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data; + mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data; UINT8 x = 0; UINT8 y = MW8080BW_VCOUNTER_START_NO_VBLANK; UINT8 video_data = 0; @@ -313,7 +313,7 @@ VIDEO_UPDATE( phantom2 ) VIDEO_EOF( phantom2 ) { - mw8080bw_state *state = (mw8080bw_state *)machine->driver_data; + mw8080bw_state *state = (mw8080bw_state *)machine->driver_data; state->phantom2_cloud_counter += MW8080BW_VTOTAL; @@ -333,7 +333,7 @@ VIDEO_EOF( phantom2 ) VIDEO_UPDATE( invaders ) { - mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data; + mw8080bw_state *state = (mw8080bw_state *)screen->machine->driver_data; UINT8 x = 0; UINT8 y = MW8080BW_VCOUNTER_START_NO_VBLANK; UINT8 video_data = 0; diff --git a/src/mame/video/mystwarr.c b/src/mame/video/mystwarr.c index 8517b8dde15..f224bd5c07a 100644 --- a/src/mame/video/mystwarr.c +++ b/src/mame/video/mystwarr.c @@ -400,7 +400,7 @@ WRITE16_HANDLER(ddd_053936_clip_w) if (offset == 1) { - if (ACCESSING_BITS_8_15) K053936GP_clip_enable(0, data & 0x0100); + if (ACCESSING_BITS_8_15) K053936GP_clip_enable(0, data & 0x0100); } else { diff --git a/src/mame/video/n64.c b/src/mame/video/n64.c index 1ec456fd239..5928a3058c3 100644 --- a/src/mame/video/n64.c +++ b/src/mame/video/n64.c @@ -10,7 +10,7 @@ #include "driver.h" #include "includes/n64.h" -#define LOG_RDP_EXECUTION 0 +#define LOG_RDP_EXECUTION 0 #define STRICT_ERROR (0) @@ -2801,7 +2801,7 @@ static void render_spans_32(int start, int end, TILE* tex_tile, int shade, int t { COLOR_COMBINER2_C0(&c1); COLOR_COMBINER2_C1(&c2); - } + } if ((zbuffer || other_modes.z_source_sel) && other_modes.z_compare_en) { @@ -3870,7 +3870,7 @@ static RDP_COMMAND( rdp_set_other_modes ) int index; other_modes.cycle_type = (w1 >> 20) & 0x3; - other_modes.persp_tex_en = (w1 & 0x80000) ? 1 : 0; + other_modes.persp_tex_en = (w1 & 0x80000) ? 1 : 0; other_modes.detail_tex_en = (w1 & 0x40000) ? 1 : 0; other_modes.sharpen_tex_en = (w1 & 0x20000) ? 1 : 0; other_modes.tex_lod_en = (w1 & 0x10000) ? 1 : 0; @@ -4412,7 +4412,7 @@ static RDP_COMMAND( rdp_set_mask_image ) static RDP_COMMAND( rdp_set_color_image ) { - fb_format = (w1 >> 21) & 0x7; + fb_format = (w1 >> 21) & 0x7; fb_size = (w1 >> 19) & 0x3; fb_width = (w1 & 0x3ff) + 1; fb_address = w2 & 0x01ffffff; diff --git a/src/mame/video/namcos22.c b/src/mame/video/namcos22.c index 77842aae9eb..220ee2f97aa 100644 --- a/src/mame/video/namcos22.c +++ b/src/mame/video/namcos22.c @@ -837,7 +837,7 @@ MallocSceneNode( running_machine *machine ) } else { - node = alloc_or_die(struct SceneNode); + node = alloc_or_die(struct SceneNode); } memset( node, 0, sizeof(*node) ); return node; @@ -896,7 +896,7 @@ static void RenderSprite(running_machine *machine, bitmap_t *bitmap, struct Scen for( row=0; row<node->data.sprite.numrows; row++ ) { for( col=0; col<node->data.sprite.numcols; col++ ) - { + { int code = tile; if( node->data.sprite.linkType == 0xff ) { @@ -918,7 +918,7 @@ static void RenderSprite(running_machine *machine, bitmap_t *bitmap, struct Scen node->data.sprite.translucency, node->data.sprite.cz, node->data.sprite.pri ); - i++; + i++; } /* next col */ } /* next row */ } /* RenderSprite */ @@ -1216,18 +1216,18 @@ Prepare3dTexture( running_machine *machine, void *pTilemapROM, void *pTextureROM { /* following setup is Namco System 22 specific */ const UINT8 *pPackedTileAttr = 0x200000 + (UINT8 *)pTilemapROM; UINT8 *pUnpackedTileAttr = auto_alloc_array(machine, UINT8, 0x080000*2); - { - InitXYAttrToPixel(); - mpTextureTileMapAttr = pUnpackedTileAttr; - for( i=0; i<0x80000; i++ ) - { - *pUnpackedTileAttr++ = (*pPackedTileAttr)>>4; - *pUnpackedTileAttr++ = (*pPackedTileAttr)&0xf; - pPackedTileAttr++; - } - mpTextureTileMap16 = (UINT16 *)pTilemapROM; + { + InitXYAttrToPixel(); + mpTextureTileMapAttr = pUnpackedTileAttr; + for( i=0; i<0x80000; i++ ) + { + *pUnpackedTileAttr++ = (*pPackedTileAttr)>>4; + *pUnpackedTileAttr++ = (*pPackedTileAttr)&0xf; + pPackedTileAttr++; + } + mpTextureTileMap16 = (UINT16 *)pTilemapROM; mpTextureTileData = (UINT8 *)pTextureROM; - PatchTexture(); + PatchTexture(); } } } /* Prepare3dTexture */ diff --git a/src/mame/video/nbmj8991.c b/src/mame/video/nbmj8991.c index 5a12c6a851e..41347002f42 100644 --- a/src/mame/video/nbmj8991.c +++ b/src/mame/video/nbmj8991.c @@ -118,7 +118,7 @@ WRITE8_HANDLER( nbmj8991_blitter_w ) case 0x20: blitter_desty = (blitter_desty & 0xff00) | data; break; case 0x30: nbmj8991_scrollx = (nbmj8991_scrollx & 0xff00) | data; break; case 0x40: nbmj8991_scrolly = (nbmj8991_scrolly & 0xff00) | data; break; - case 0x50: blitter_destx = (blitter_destx & 0x00ff) | ((data & 0x01) << 8); + case 0x50: blitter_destx = (blitter_destx & 0x00ff) | ((data & 0x01) << 8); blitter_desty = (blitter_desty & 0x00ff) | ((data & 0x02) << 7); nbmj8991_scrollx = (nbmj8991_scrollx & 0x00ff) | ((data & 0x04) << 6); nbmj8991_scrolly = (nbmj8991_scrolly & 0x00ff) | ((data & 0x08) << 5); diff --git a/src/mame/video/nycaptor.c b/src/mame/video/nycaptor.c index 4200bb18112..1bf7d6449bd 100644 --- a/src/mame/video/nycaptor.c +++ b/src/mame/video/nycaptor.c @@ -130,7 +130,7 @@ WRITE8_HANDLER( nycaptor_gfxctrl_w ) READ8_HANDLER( nycaptor_gfxctrl_r ) { - return gfxctrl; + return gfxctrl; } READ8_HANDLER( nycaptor_scrlram_r ) @@ -228,34 +228,34 @@ VIDEO_UPDATE( nycaptor ) nycaptor_setmask(screen->machine); if(nycaptor_mask&0x1000) { - tilemap_draw(bitmap,cliprect,bg_tilemap,TILEMAP_DRAW_LAYER1|3,0); - tilemap_draw(bitmap,cliprect,bg_tilemap,TILEMAP_DRAW_LAYER0|3,0); - tilemap_draw(bitmap,cliprect,bg_tilemap,TILEMAP_DRAW_LAYER1|2,0); - tilemap_draw(bitmap,cliprect,bg_tilemap,TILEMAP_DRAW_LAYER0|2,0); - tilemap_draw(bitmap,cliprect,bg_tilemap,TILEMAP_DRAW_LAYER1|1,0); - tilemap_draw(bitmap,cliprect,bg_tilemap,TILEMAP_DRAW_LAYER0|1,0); - tilemap_draw(bitmap,cliprect,bg_tilemap,TILEMAP_DRAW_LAYER1|0,0); - tilemap_draw(bitmap,cliprect,bg_tilemap,TILEMAP_DRAW_LAYER0|0,0); - draw_sprites(screen->machine, bitmap,cliprect,0); - draw_sprites(screen->machine, bitmap,cliprect,1); - draw_sprites(screen->machine, bitmap,cliprect,2); - draw_sprites(screen->machine, bitmap,cliprect,3); - draw_sprites(screen->machine, bitmap,cliprect,4); - draw_sprites(screen->machine, bitmap,cliprect,5); - draw_sprites(screen->machine, bitmap,cliprect,6); - draw_sprites(screen->machine, bitmap,cliprect,7); + tilemap_draw(bitmap,cliprect,bg_tilemap,TILEMAP_DRAW_LAYER1|3,0); + tilemap_draw(bitmap,cliprect,bg_tilemap,TILEMAP_DRAW_LAYER0|3,0); + tilemap_draw(bitmap,cliprect,bg_tilemap,TILEMAP_DRAW_LAYER1|2,0); + tilemap_draw(bitmap,cliprect,bg_tilemap,TILEMAP_DRAW_LAYER0|2,0); + tilemap_draw(bitmap,cliprect,bg_tilemap,TILEMAP_DRAW_LAYER1|1,0); + tilemap_draw(bitmap,cliprect,bg_tilemap,TILEMAP_DRAW_LAYER0|1,0); + tilemap_draw(bitmap,cliprect,bg_tilemap,TILEMAP_DRAW_LAYER1|0,0); + tilemap_draw(bitmap,cliprect,bg_tilemap,TILEMAP_DRAW_LAYER0|0,0); + draw_sprites(screen->machine, bitmap,cliprect,0); + draw_sprites(screen->machine, bitmap,cliprect,1); + draw_sprites(screen->machine, bitmap,cliprect,2); + draw_sprites(screen->machine, bitmap,cliprect,3); + draw_sprites(screen->machine, bitmap,cliprect,4); + draw_sprites(screen->machine, bitmap,cliprect,5); + draw_sprites(screen->machine, bitmap,cliprect,6); + draw_sprites(screen->machine, bitmap,cliprect,7); } else #endif switch (nycaptor_spot()&3) { case 0: - tilemap_draw(bitmap,cliprect,bg_tilemap,TILEMAP_DRAW_LAYER1|3,0); + tilemap_draw(bitmap,cliprect,bg_tilemap,TILEMAP_DRAW_LAYER1|3,0); draw_sprites(screen->machine, bitmap,cliprect,6); tilemap_draw(bitmap,cliprect,bg_tilemap,TILEMAP_DRAW_LAYER0|3,0); tilemap_draw(bitmap,cliprect,bg_tilemap,TILEMAP_DRAW_LAYER1|2,0); tilemap_draw(bitmap,cliprect,bg_tilemap,TILEMAP_DRAW_LAYER0|2,0); - tilemap_draw(bitmap,cliprect,bg_tilemap,TILEMAP_DRAW_LAYER1|1,0); + tilemap_draw(bitmap,cliprect,bg_tilemap,TILEMAP_DRAW_LAYER1|1,0); draw_sprites(screen->machine, bitmap,cliprect,3); tilemap_draw(bitmap,cliprect,bg_tilemap,TILEMAP_DRAW_LAYER0|1,0); draw_sprites(screen->machine, bitmap,cliprect,0); @@ -281,7 +281,7 @@ VIDEO_UPDATE( nycaptor ) break; case 2: - tilemap_draw(bitmap,cliprect,bg_tilemap,TILEMAP_DRAW_LAYER1|3,0); + tilemap_draw(bitmap,cliprect,bg_tilemap,TILEMAP_DRAW_LAYER1|3,0); tilemap_draw(bitmap,cliprect,bg_tilemap,TILEMAP_DRAW_LAYER0|3,0); tilemap_draw(bitmap,cliprect,bg_tilemap,TILEMAP_DRAW_LAYER1|1,0); draw_sprites(screen->machine, bitmap,cliprect,1); diff --git a/src/mame/video/parodius.c b/src/mame/video/parodius.c index cd27070ba1c..ce939161fc4 100644 --- a/src/mame/video/parodius.c +++ b/src/mame/video/parodius.c @@ -30,7 +30,7 @@ void parodius_sprite_callback(running_machine *machine, int *code,int *color,int if (pri <= layerpri[2]) *priority_mask = 0; else if (pri > layerpri[2] && pri <= layerpri[1]) *priority_mask = 0xf0; else if (pri > layerpri[1] && pri <= layerpri[0]) *priority_mask = 0xf0|0xcc; - else *priority_mask = 0xf0|0xcc|0xaa; + else *priority_mask = 0xf0|0xcc|0xaa; *color = sprite_colorbase + (*color & 0x1f); } diff --git a/src/mame/video/phoenix.c b/src/mame/video/phoenix.c index bdfcf739215..ed24ae3e613 100644 --- a/src/mame/video/phoenix.c +++ b/src/mame/video/phoenix.c @@ -290,7 +290,7 @@ WRITE8_HANDLER( pleiads_videoreg_w ) if (palette_bank != ((data >> 1) & 3)) { - palette_bank = ((data >> 1) & 3); + palette_bank = ((data >> 1) & 3); tilemap_mark_all_tiles_dirty_all(space->machine); diff --git a/src/mame/video/pitnrun.c b/src/mame/video/pitnrun.c index 52284827ed8..b663913c80c 100644 --- a/src/mame/video/pitnrun.c +++ b/src/mame/video/pitnrun.c @@ -109,13 +109,13 @@ static void pitnrun_spotlights(running_machine *machine) for(y=0;y<128;y++) for(x=0;x<16;x++) { - datapix=ROM[128*16*i+x+y*16]; - for(b=0;b<8;b++) - { + datapix=ROM[128*16*i+x+y*16]; + for(b=0;b<8;b++) + { *BITMAP_ADDR16(tmp_bitmap[i], y, x*8+(7-b)) = (datapix&1); datapix>>=1; } - } + } } @@ -204,7 +204,7 @@ static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const recta } drawgfx_transpen(bitmap,cliprect,machine->gfx[2], - (spriteram[offs+1]&0x3f)+((spriteram[offs+2]&0x80)>>1)+((spriteram[offs+2]&0x40)<<1), + (spriteram[offs+1]&0x3f)+((spriteram[offs+2]&0x80)>>1)+((spriteram[offs+2]&0x40)<<1), pal, flipx,flipy, sx,sy,0); diff --git a/src/mame/video/playmark.c b/src/mame/video/playmark.c index cd47d44fdc3..a3ebad86317 100644 --- a/src/mame/video/playmark.c +++ b/src/mame/video/playmark.c @@ -363,7 +363,7 @@ static void draw_sprites(running_machine *machine, bitmap_t *bitmap,const rectan pri = 2; pdrawgfx_transpen(bitmap,cliprect,machine->gfx[0], - code, + code, color, flipx,0, sx + xoffset,sy + yoffset, diff --git a/src/mame/video/powerins.c b/src/mame/video/powerins.c index b9175119964..5a40f6001db 100644 --- a/src/mame/video/powerins.c +++ b/src/mame/video/powerins.c @@ -145,7 +145,7 @@ WRITE16_HANDLER( powerins_vram_0_w ) static TILEMAP_MAPPER( powerins_get_memory_offset_0 ) { - return (col * TILES_PER_PAGE_Y) + + return (col * TILES_PER_PAGE_Y) + (row % TILES_PER_PAGE_Y) + (row / TILES_PER_PAGE_Y) * (TILES_PER_PAGE * 16); diff --git a/src/mame/video/ppu2c0x.c b/src/mame/video/ppu2c0x.c index 14cb73cefa3..51d66c868dd 100644 --- a/src/mame/video/ppu2c0x.c +++ b/src/mame/video/ppu2c0x.c @@ -753,7 +753,7 @@ static void render_scanline( const device_config *device ) /* if sprites are on, draw them, but we call always to process them */ draw_sprites(device, line_priority); - /* done updating, whew */ + /* done updating, whew */ profiler_mark_end(); } @@ -1362,7 +1362,7 @@ DEVICE_GET_INFO(ppu2c03b) { case DEVINFO_STR_NAME: strcpy(info->s, "2C02B PPU"); break; case PPU2C0XINFO_INT_SCANLINES_PER_FRAME: info->i = PPU_NTSC_SCANLINES_PER_FRAME; break; - default: DEVICE_GET_INFO_CALL(ppu2c02); break; + default: DEVICE_GET_INFO_CALL(ppu2c02); break; } } @@ -1372,7 +1372,7 @@ DEVICE_GET_INFO(ppu2c04) { case DEVINFO_STR_NAME: strcpy(info->s, "2C04 PPU"); break; case PPU2C0XINFO_INT_SCANLINES_PER_FRAME: info->i = PPU_NTSC_SCANLINES_PER_FRAME; break; - default: DEVICE_GET_INFO_CALL(ppu2c02); break; + default: DEVICE_GET_INFO_CALL(ppu2c02); break; } } @@ -1382,7 +1382,7 @@ DEVICE_GET_INFO(ppu2c05) { case DEVINFO_STR_NAME: strcpy(info->s, "2C05 PPU"); break; case PPU2C0XINFO_INT_SCANLINES_PER_FRAME: info->i = PPU_NTSC_SCANLINES_PER_FRAME; break; - default: DEVICE_GET_INFO_CALL(ppu2c02); break; + default: DEVICE_GET_INFO_CALL(ppu2c02); break; } } @@ -1392,6 +1392,6 @@ DEVICE_GET_INFO(ppu2c07) { case DEVINFO_STR_NAME: strcpy(info->s, "2C07 PPU"); break; case PPU2C0XINFO_INT_SCANLINES_PER_FRAME: info->i = PPU_PAL_SCANLINES_PER_FRAME; break; - default: DEVICE_GET_INFO_CALL(ppu2c02); break; + default: DEVICE_GET_INFO_CALL(ppu2c02); break; } } diff --git a/src/mame/video/psikyo4.c b/src/mame/video/psikyo4.c index 5339755cd6c..3916cde837b 100644 --- a/src/mame/video/psikyo4.c +++ b/src/mame/video/psikyo4.c @@ -88,7 +88,7 @@ static void draw_sprites( running_machine *machine, bitmap_t *bitmap, const rect tnum = (source[sprnum + 1] & 0x0007ffff) >> 00; colr = (source[sprnum + 1] & 0x3f000000) >> 24; - if (scr) + if (scr) colr += 0x40; /* Use second copy of palette which is dimmed appropriately */ flipx = (source[sprnum + 1] & 0x40000000); diff --git a/src/mame/video/psikyosh.c b/src/mame/video/psikyosh.c index d4f573ae4d6..96a9af3b929 100644 --- a/src/mame/video/psikyosh.c +++ b/src/mame/video/psikyosh.c @@ -384,7 +384,7 @@ static void draw_background( running_machine *machine, bitmap_t *bitmap, const r #ifdef MAME_DEBUG popmessage ("Pri %d=%02x-%s %d=%02x-%s %d=%02x-%s", 0, BG_TYPE(0), BG_LAYER_ENABLE(0)?"y":"n", - 1, BG_TYPE(1), BG_LAYER_ENABLE(1)?"y":"n", + 1, BG_TYPE(1), BG_LAYER_ENABLE(1)?"y":"n", 2, BG_TYPE(2), BG_LAYER_ENABLE(2)?"y":"n"); #endif #endif diff --git a/src/mame/video/quasar.c b/src/mame/video/quasar.c index 7ac96f975cf..b2ab68a4684 100644 --- a/src/mame/video/quasar.c +++ b/src/mame/video/quasar.c @@ -58,19 +58,19 @@ PALETTE_INIT( quasar ) b = 0x4f * bit0 + 0xa8 * bit1; /* intensity 0 */ - colortable_palette_set_color(machine->colortable, 0x100 + i, RGB_BLACK); + colortable_palette_set_color(machine->colortable, 0x100 + i, RGB_BLACK); /* intensity 1 */ color = MAKE_RGB(r >> 2, g >> 2, b >> 2); - colortable_palette_set_color(machine->colortable, 0x200 + i, color); + colortable_palette_set_color(machine->colortable, 0x200 + i, color); /* intensity 2 */ color = MAKE_RGB((r >> 2) + (r >> 3), (g >> 2) + (g >> 3), (b >> 2) + (b >> 2)); - colortable_palette_set_color(machine->colortable, 0x300 + i, color); + colortable_palette_set_color(machine->colortable, 0x300 + i, color); /* intensity 3 */ color = MAKE_RGB(r >> 1, g >> 1, b >> 1); - colortable_palette_set_color(machine->colortable, 0x400 + i, color); + colortable_palette_set_color(machine->colortable, 0x400 + i, color); } // Address 0-2 from graphic rom diff --git a/src/mame/video/rastan.c b/src/mame/video/rastan.c index a328e97272d..1af4c25bdac 100644 --- a/src/mame/video/rastan.c +++ b/src/mame/video/rastan.c @@ -104,7 +104,7 @@ VIDEO_UPDATE( rastan ) bitmap_fill(screen->machine->priority_bitmap,cliprect,0); - PC080SN_tilemap_draw(bitmap,cliprect,0,layer[0],TILEMAP_DRAW_OPAQUE,1); + PC080SN_tilemap_draw(bitmap,cliprect,0,layer[0],TILEMAP_DRAW_OPAQUE,1); PC080SN_tilemap_draw(bitmap,cliprect,0,layer[1],0,2); PC090OJ_draw_sprites(screen->machine,bitmap,cliprect,0); @@ -124,7 +124,7 @@ VIDEO_UPDATE( opwolf ) bitmap_fill(screen->machine->priority_bitmap,cliprect,0); - PC080SN_tilemap_draw(bitmap,cliprect,0,layer[0],TILEMAP_DRAW_OPAQUE,1); + PC080SN_tilemap_draw(bitmap,cliprect,0,layer[0],TILEMAP_DRAW_OPAQUE,1); PC080SN_tilemap_draw(bitmap,cliprect,0,layer[1],0,2); PC090OJ_draw_sprites(screen->machine,bitmap,cliprect,1); @@ -181,7 +181,7 @@ VIDEO_UPDATE( jumping ) bitmap_fill(screen->machine->priority_bitmap,cliprect,0); - PC080SN_tilemap_draw(bitmap,cliprect,0,layer[0],TILEMAP_DRAW_OPAQUE,0); + PC080SN_tilemap_draw(bitmap,cliprect,0,layer[0],TILEMAP_DRAW_OPAQUE,0); /* Draw the sprites. 128 sprites in total */ for (offs = screen->machine->generic.spriteram_size/2-8; offs >= 0; offs -= 8) @@ -192,7 +192,7 @@ VIDEO_UPDATE( jumping ) int sx,sy,color,data1; sy = ((spriteram16[offs+1] - 0xfff1) ^ 0xffff) & 0x1ff; - if (sy > 400) sy = sy - 512; + if (sy > 400) sy = sy - 512; sx = (spriteram16[offs+2] - 0x38) & 0x1ff; if (sx > 400) sx = sx - 512; @@ -207,7 +207,7 @@ VIDEO_UPDATE( jumping ) } } - PC080SN_tilemap_draw(bitmap,cliprect,0,layer[1],0,0); + PC080SN_tilemap_draw(bitmap,cliprect,0,layer[1],0,0); #if 0 { diff --git a/src/mame/video/rdpblend.h b/src/mame/video/rdpblend.h index 13af9b4685e..945506b06ea 100644 --- a/src/mame/video/rdpblend.h +++ b/src/mame/video/rdpblend.h @@ -19,15 +19,15 @@ INLINE int BLENDER2_16_NIMR_NZC_NDITH(UINT16 *fb, UINT8* hb, COLOR c1, COLOR c2, static int (*rdp_blender1_16_func[8])(UINT16 *, UINT8 *, COLOR, int) = { BLENDER1_16_NIMR_NZC_NDITH, BLENDER1_16_NIMR_ZC_NDITH, - BLENDER1_16_NIMR_ZC_NDITH, BLENDER1_16_NIMR_ZC_DITH, - BLENDER1_16_IMR_NZC_NDITH, BLENDER1_16_IMR_NZC_DITH, - BLENDER1_16_IMR_ZC_NDITH, BLENDER1_16_IMR_ZC_DITH, + BLENDER1_16_NIMR_ZC_NDITH, BLENDER1_16_NIMR_ZC_DITH, + BLENDER1_16_IMR_NZC_NDITH, BLENDER1_16_IMR_NZC_DITH, + BLENDER1_16_IMR_ZC_NDITH, BLENDER1_16_IMR_ZC_DITH, }; static int (*rdp_blender2_16_func[8])(UINT16 *, UINT8 *, COLOR, COLOR, int) = { BLENDER2_16_NIMR_NZC_NDITH, BLENDER2_16_NIMR_NZC_DITH, - BLENDER2_16_NIMR_ZC_NDITH, BLENDER2_16_NIMR_ZC_DITH, - BLENDER2_16_IMR_NZC_NDITH, BLENDER2_16_IMR_NZC_DITH, - BLENDER2_16_IMR_ZC_NDITH, BLENDER2_16_IMR_ZC_DITH, + BLENDER2_16_NIMR_ZC_NDITH, BLENDER2_16_NIMR_ZC_DITH, + BLENDER2_16_IMR_NZC_NDITH, BLENDER2_16_IMR_NZC_DITH, + BLENDER2_16_IMR_ZC_NDITH, BLENDER2_16_IMR_ZC_DITH, }; diff --git a/src/mame/video/rdpfetch.h b/src/mame/video/rdpfetch.h index cf5a00336f4..453e66f875b 100644 --- a/src/mame/video/rdpfetch.h +++ b/src/mame/video/rdpfetch.h @@ -41,41 +41,41 @@ static void (*rdp_fetch_texel_func[128])(COLOR*, int, int) = { // 4-bit accessors FETCH_TEXEL_RGBA4_TLUT_NEN, FETCH_TEXEL_RGBA4_TLUT_NEN, FETCH_TEXEL_RGBA4_TLUT_EN0, FETCH_TEXEL_RGBA4_TLUT_EN1, - FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, - FETCH_TEXEL_CI4_TLUT_NEN, FETCH_TEXEL_CI4_TLUT_NEN, FETCH_TEXEL_CI4_TLUT_EN0, FETCH_TEXEL_CI4_TLUT_EN1, + FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, + FETCH_TEXEL_CI4_TLUT_NEN, FETCH_TEXEL_CI4_TLUT_NEN, FETCH_TEXEL_CI4_TLUT_EN0, FETCH_TEXEL_CI4_TLUT_EN1, FETCH_TEXEL_IA4_TLUT_NEN, FETCH_TEXEL_IA4_TLUT_NEN, FETCH_TEXEL_IA4_TLUT_EN0, FETCH_TEXEL_IA4_TLUT_EN1, FETCH_TEXEL_I4_TLUT_NEN, FETCH_TEXEL_I4_TLUT_NEN, FETCH_TEXEL_I4_TLUT_EN0, FETCH_TEXEL_I4_TLUT_EN1, - FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, - FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, - FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, + FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, + FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, + FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, // 8-bit accessors FETCH_TEXEL_RGBA8_TLUT_NEN, FETCH_TEXEL_RGBA8_TLUT_NEN, FETCH_TEXEL_RGBA8_TLUT_EN0, FETCH_TEXEL_RGBA8_TLUT_EN1, - FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, - FETCH_TEXEL_CI8_TLUT_NEN, FETCH_TEXEL_CI8_TLUT_NEN, FETCH_TEXEL_CI8_TLUT_EN0, FETCH_TEXEL_CI8_TLUT_EN1, + FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, + FETCH_TEXEL_CI8_TLUT_NEN, FETCH_TEXEL_CI8_TLUT_NEN, FETCH_TEXEL_CI8_TLUT_EN0, FETCH_TEXEL_CI8_TLUT_EN1, FETCH_TEXEL_IA8_TLUT_NEN, FETCH_TEXEL_IA8_TLUT_NEN, FETCH_TEXEL_IA8_TLUT_EN0, FETCH_TEXEL_IA8_TLUT_EN1, FETCH_TEXEL_I8_TLUT_NEN, FETCH_TEXEL_I8_TLUT_NEN, FETCH_TEXEL_I8_TLUT_EN0, FETCH_TEXEL_I8_TLUT_EN1, - FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, - FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, - FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, + FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, + FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, + FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, // 16-bit accessors FETCH_TEXEL_RGBA16_TLUT_NEN,FETCH_TEXEL_RGBA16_TLUT_NEN,FETCH_TEXEL_RGBA16_TLUT_EN0,FETCH_TEXEL_RGBA16_TLUT_EN1, - FETCH_TEXEL_YUV16, FETCH_TEXEL_YUV16, FETCH_TEXEL_YUV16, FETCH_TEXEL_YUV16, - FETCH_TEXEL_CI16_TLUT_NEN, FETCH_TEXEL_CI16_TLUT_NEN, FETCH_TEXEL_CI16_TLUT_EN0, FETCH_TEXEL_CI16_TLUT_EN1, + FETCH_TEXEL_YUV16, FETCH_TEXEL_YUV16, FETCH_TEXEL_YUV16, FETCH_TEXEL_YUV16, + FETCH_TEXEL_CI16_TLUT_NEN, FETCH_TEXEL_CI16_TLUT_NEN, FETCH_TEXEL_CI16_TLUT_EN0, FETCH_TEXEL_CI16_TLUT_EN1, FETCH_TEXEL_IA16_TLUT_NEN, FETCH_TEXEL_IA16_TLUT_NEN, FETCH_TEXEL_IA16_TLUT_EN0, FETCH_TEXEL_IA16_TLUT_EN1, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, - FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, - FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, - FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, + FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, + FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, + FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, // 32-bit accessors FETCH_TEXEL_RGBA32_TLUT_NEN,FETCH_TEXEL_RGBA32_TLUT_NEN,FETCH_TEXEL_RGBA32_TLUT_EN0,FETCH_TEXEL_RGBA32_TLUT_EN1, - FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, - FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, - FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, - FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, - FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, + FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, + FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, + FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, + FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, + FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, FETCH_TEXEL_INVALID, }; diff --git a/src/mame/video/rdpspn16.h b/src/mame/video/rdpspn16.h index 4d12aab53e3..88b4358aef6 100644 --- a/src/mame/video/rdpspn16.h +++ b/src/mame/video/rdpspn16.h @@ -133,70 +133,70 @@ INLINE void render_spans_16_c2_s_t_z_f_zc_zu(int start, int end, TILE* tex_tile) static void (*rdp_render_spans_16_func[128])(int, int, TILE*) = { render_spans_16_c1_ns_nt_nz_nf_nzc, render_spans_16_c2_ns_nt_nz_nf_nzc, - render_spans_16_c1_ns_nt_z_nf_nzc, render_spans_16_c2_ns_nt_z_nf_nzc, - render_spans_16_c1_ns_t_nz_nf_nzc, render_spans_16_c2_ns_t_nz_nf_nzc, - render_spans_16_c1_ns_t_z_nf_nzc, render_spans_16_c2_ns_t_z_nf_nzc, - render_spans_16_c1_s_nt_nz_nf_nzc, render_spans_16_c2_s_nt_nz_nf_nzc, - render_spans_16_c1_s_nt_z_nf_nzc, render_spans_16_c2_s_nt_z_nf_nzc, - render_spans_16_c1_s_t_nz_nf_nzc, render_spans_16_c2_s_t_nz_nf_nzc, - render_spans_16_c1_s_t_z_nf_nzc, render_spans_16_c2_s_t_z_nf_nzc, - render_spans_16_c1_ns_nt_nz_f_nzc, render_spans_16_c2_ns_nt_nz_f_nzc, - render_spans_16_c1_ns_nt_z_f_nzc, render_spans_16_c2_ns_nt_z_f_nzc, - render_spans_16_c1_ns_t_nz_f_nzc, render_spans_16_c2_ns_t_nz_f_nzc, - render_spans_16_c1_ns_t_z_f_nzc, render_spans_16_c2_ns_t_z_f_nzc, - render_spans_16_c1_s_nt_nz_f_nzc, render_spans_16_c2_s_nt_nz_f_nzc, - render_spans_16_c1_s_nt_z_f_nzc, render_spans_16_c2_s_nt_z_f_nzc, - render_spans_16_c1_s_t_nz_f_nzc, render_spans_16_c2_s_t_nz_f_nzc, + render_spans_16_c1_ns_nt_z_nf_nzc, render_spans_16_c2_ns_nt_z_nf_nzc, + render_spans_16_c1_ns_t_nz_nf_nzc, render_spans_16_c2_ns_t_nz_nf_nzc, + render_spans_16_c1_ns_t_z_nf_nzc, render_spans_16_c2_ns_t_z_nf_nzc, + render_spans_16_c1_s_nt_nz_nf_nzc, render_spans_16_c2_s_nt_nz_nf_nzc, + render_spans_16_c1_s_nt_z_nf_nzc, render_spans_16_c2_s_nt_z_nf_nzc, + render_spans_16_c1_s_t_nz_nf_nzc, render_spans_16_c2_s_t_nz_nf_nzc, + render_spans_16_c1_s_t_z_nf_nzc, render_spans_16_c2_s_t_z_nf_nzc, + render_spans_16_c1_ns_nt_nz_f_nzc, render_spans_16_c2_ns_nt_nz_f_nzc, + render_spans_16_c1_ns_nt_z_f_nzc, render_spans_16_c2_ns_nt_z_f_nzc, + render_spans_16_c1_ns_t_nz_f_nzc, render_spans_16_c2_ns_t_nz_f_nzc, + render_spans_16_c1_ns_t_z_f_nzc, render_spans_16_c2_ns_t_z_f_nzc, + render_spans_16_c1_s_nt_nz_f_nzc, render_spans_16_c2_s_nt_nz_f_nzc, + render_spans_16_c1_s_nt_z_f_nzc, render_spans_16_c2_s_nt_z_f_nzc, + render_spans_16_c1_s_t_nz_f_nzc, render_spans_16_c2_s_t_nz_f_nzc, render_spans_16_c1_s_t_z_f_nzc, render_spans_16_c2_s_t_z_f_nzc, render_spans_16_c1_ns_nt_nz_nf_zc, render_spans_16_c2_ns_nt_nz_nf_zc, - render_spans_16_c1_ns_nt_z_nf_zc, render_spans_16_c2_ns_nt_z_nf_zc, - render_spans_16_c1_ns_t_nz_nf_zc, render_spans_16_c2_ns_t_nz_nf_zc, - render_spans_16_c1_ns_t_z_nf_zc, render_spans_16_c2_ns_t_z_nf_zc, - render_spans_16_c1_s_nt_nz_nf_zc, render_spans_16_c2_s_nt_nz_nf_zc, - render_spans_16_c1_s_nt_z_nf_zc, render_spans_16_c2_s_nt_z_nf_zc, - render_spans_16_c1_s_t_nz_nf_zc, render_spans_16_c2_s_t_nz_nf_zc, + render_spans_16_c1_ns_nt_z_nf_zc, render_spans_16_c2_ns_nt_z_nf_zc, + render_spans_16_c1_ns_t_nz_nf_zc, render_spans_16_c2_ns_t_nz_nf_zc, + render_spans_16_c1_ns_t_z_nf_zc, render_spans_16_c2_ns_t_z_nf_zc, + render_spans_16_c1_s_nt_nz_nf_zc, render_spans_16_c2_s_nt_nz_nf_zc, + render_spans_16_c1_s_nt_z_nf_zc, render_spans_16_c2_s_nt_z_nf_zc, + render_spans_16_c1_s_t_nz_nf_zc, render_spans_16_c2_s_t_nz_nf_zc, render_spans_16_c1_s_t_z_nf_zc, render_spans_16_c2_s_t_z_nf_zc, - render_spans_16_c1_ns_nt_nz_f_zc, render_spans_16_c2_ns_nt_nz_f_zc, - render_spans_16_c1_ns_nt_z_f_zc, render_spans_16_c2_ns_nt_z_f_zc, - render_spans_16_c1_ns_t_nz_f_zc, render_spans_16_c2_ns_t_nz_f_zc, + render_spans_16_c1_ns_nt_nz_f_zc, render_spans_16_c2_ns_nt_nz_f_zc, + render_spans_16_c1_ns_nt_z_f_zc, render_spans_16_c2_ns_nt_z_f_zc, + render_spans_16_c1_ns_t_nz_f_zc, render_spans_16_c2_ns_t_nz_f_zc, render_spans_16_c1_ns_t_z_f_zc, render_spans_16_c2_ns_t_z_f_zc, - render_spans_16_c1_s_nt_nz_f_zc, render_spans_16_c2_s_nt_nz_f_zc, + render_spans_16_c1_s_nt_nz_f_zc, render_spans_16_c2_s_nt_nz_f_zc, render_spans_16_c1_s_nt_z_f_zc, render_spans_16_c2_s_nt_z_f_zc, render_spans_16_c1_s_t_nz_f_zc, render_spans_16_c2_s_t_nz_f_zc, - render_spans_16_c1_s_t_z_f_zc, render_spans_16_c2_s_t_z_f_zc, + render_spans_16_c1_s_t_z_f_zc, render_spans_16_c2_s_t_z_f_zc, - render_spans_16_c1_ns_nt_nz_nf_nzc_zu, render_spans_16_c2_ns_nt_nz_nf_nzc_zu, - render_spans_16_c1_ns_nt_z_nf_nzc_zu, render_spans_16_c2_ns_nt_z_nf_nzc_zu, - render_spans_16_c1_ns_t_nz_nf_nzc_zu, render_spans_16_c2_ns_t_nz_nf_nzc_zu, - render_spans_16_c1_ns_t_z_nf_nzc_zu, render_spans_16_c2_ns_t_z_nf_nzc_zu, - render_spans_16_c1_s_nt_nz_nf_nzc_zu, render_spans_16_c2_s_nt_nz_nf_nzc_zu, - render_spans_16_c1_s_nt_z_nf_nzc_zu, render_spans_16_c2_s_nt_z_nf_nzc_zu, - render_spans_16_c1_s_t_nz_nf_nzc_zu, render_spans_16_c2_s_t_nz_nf_nzc_zu, + render_spans_16_c1_ns_nt_nz_nf_nzc_zu, render_spans_16_c2_ns_nt_nz_nf_nzc_zu, + render_spans_16_c1_ns_nt_z_nf_nzc_zu, render_spans_16_c2_ns_nt_z_nf_nzc_zu, + render_spans_16_c1_ns_t_nz_nf_nzc_zu, render_spans_16_c2_ns_t_nz_nf_nzc_zu, + render_spans_16_c1_ns_t_z_nf_nzc_zu, render_spans_16_c2_ns_t_z_nf_nzc_zu, + render_spans_16_c1_s_nt_nz_nf_nzc_zu, render_spans_16_c2_s_nt_nz_nf_nzc_zu, + render_spans_16_c1_s_nt_z_nf_nzc_zu, render_spans_16_c2_s_nt_z_nf_nzc_zu, + render_spans_16_c1_s_t_nz_nf_nzc_zu, render_spans_16_c2_s_t_nz_nf_nzc_zu, render_spans_16_c1_s_t_z_nf_nzc_zu, render_spans_16_c2_s_t_z_nf_nzc_zu, - render_spans_16_c1_ns_nt_nz_f_nzc_zu, render_spans_16_c2_ns_nt_nz_f_nzc_zu, - render_spans_16_c1_ns_nt_z_f_nzc_zu, render_spans_16_c2_ns_nt_z_f_nzc_zu, - render_spans_16_c1_ns_t_nz_f_nzc_zu, render_spans_16_c2_ns_t_nz_f_nzc_zu, + render_spans_16_c1_ns_nt_nz_f_nzc_zu, render_spans_16_c2_ns_nt_nz_f_nzc_zu, + render_spans_16_c1_ns_nt_z_f_nzc_zu, render_spans_16_c2_ns_nt_z_f_nzc_zu, + render_spans_16_c1_ns_t_nz_f_nzc_zu, render_spans_16_c2_ns_t_nz_f_nzc_zu, render_spans_16_c1_ns_t_z_f_nzc_zu, render_spans_16_c2_ns_t_z_f_nzc_zu, - render_spans_16_c1_s_nt_nz_f_nzc_zu, render_spans_16_c2_s_nt_nz_f_nzc_zu, + render_spans_16_c1_s_nt_nz_f_nzc_zu, render_spans_16_c2_s_nt_nz_f_nzc_zu, render_spans_16_c1_s_nt_z_f_nzc_zu, render_spans_16_c2_s_nt_z_f_nzc_zu, render_spans_16_c1_s_t_nz_f_nzc_zu, render_spans_16_c2_s_t_nz_f_nzc_zu, - render_spans_16_c1_s_t_z_f_nzc_zu, render_spans_16_c2_s_t_z_f_nzc_zu, + render_spans_16_c1_s_t_z_f_nzc_zu, render_spans_16_c2_s_t_z_f_nzc_zu, render_spans_16_c1_ns_nt_nz_nf_zc_zu, render_spans_16_c2_ns_nt_nz_nf_zc_zu, - render_spans_16_c1_ns_nt_z_nf_zc_zu, render_spans_16_c2_ns_nt_z_nf_zc_zu, - render_spans_16_c1_ns_t_nz_nf_zc_zu, render_spans_16_c2_ns_t_nz_nf_zc_zu, + render_spans_16_c1_ns_nt_z_nf_zc_zu, render_spans_16_c2_ns_nt_z_nf_zc_zu, + render_spans_16_c1_ns_t_nz_nf_zc_zu, render_spans_16_c2_ns_t_nz_nf_zc_zu, render_spans_16_c1_ns_t_z_nf_zc_zu, render_spans_16_c2_ns_t_z_nf_zc_zu, - render_spans_16_c1_s_nt_nz_nf_zc_zu, render_spans_16_c2_s_nt_nz_nf_zc_zu, + render_spans_16_c1_s_nt_nz_nf_zc_zu, render_spans_16_c2_s_nt_nz_nf_zc_zu, render_spans_16_c1_s_nt_z_nf_zc_zu, render_spans_16_c2_s_nt_z_nf_zc_zu, render_spans_16_c1_s_t_nz_nf_zc_zu, render_spans_16_c2_s_t_nz_nf_zc_zu, - render_spans_16_c1_s_t_z_nf_zc_zu, render_spans_16_c2_s_t_z_nf_zc_zu, - render_spans_16_c1_ns_nt_nz_f_zc_zu, render_spans_16_c2_ns_nt_nz_f_zc_zu, + render_spans_16_c1_s_t_z_nf_zc_zu, render_spans_16_c2_s_t_z_nf_zc_zu, + render_spans_16_c1_ns_nt_nz_f_zc_zu, render_spans_16_c2_ns_nt_nz_f_zc_zu, render_spans_16_c1_ns_nt_z_f_zc_zu, render_spans_16_c2_ns_nt_z_f_zc_zu, render_spans_16_c1_ns_t_nz_f_zc_zu, render_spans_16_c2_ns_t_nz_f_zc_zu, - render_spans_16_c1_ns_t_z_f_zc_zu, render_spans_16_c2_ns_t_z_f_zc_zu, + render_spans_16_c1_ns_t_z_f_zc_zu, render_spans_16_c2_ns_t_z_f_zc_zu, render_spans_16_c1_s_nt_nz_f_zc_zu, render_spans_16_c2_s_nt_nz_f_zc_zu, - render_spans_16_c1_s_nt_z_f_zc_zu, render_spans_16_c2_s_nt_z_f_zc_zu, - render_spans_16_c1_s_t_nz_f_zc_zu, render_spans_16_c2_s_t_nz_f_zc_zu, - render_spans_16_c1_s_t_z_f_zc_zu, render_spans_16_c2_s_t_z_f_zc_zu, + render_spans_16_c1_s_nt_z_f_zc_zu, render_spans_16_c2_s_nt_z_f_zc_zu, + render_spans_16_c1_s_t_nz_f_zc_zu, render_spans_16_c2_s_t_nz_f_zc_zu, + render_spans_16_c1_s_t_z_f_zc_zu, render_spans_16_c2_s_t_z_f_zc_zu, }; diff --git a/src/mame/video/rdptpipe.c b/src/mame/video/rdptpipe.c index 8d9145dbe28..164fa7b7a3d 100644 --- a/src/mame/video/rdptpipe.c +++ b/src/mame/video/rdptpipe.c @@ -1,6 +1,6 @@ INLINE void TEXTURE_PIPELINE_BILINEAR_NMID(COLOR* TEX, INT32 SSS, INT32 SST, TILE* tex_tile) { -#define RELATIVE(x, y) ((((x) >> 3) - (y)) << 3) | (x & 7); +#define RELATIVE(x, y) ((((x) >> 3) - (y)) << 3) | (x & 7); INT32 maxs, maxt; COLOR t0, t1, t2, t3; int sss1, sst1, sss2, sst2; @@ -76,7 +76,7 @@ INLINE void TEXTURE_PIPELINE_BILINEAR_NMID(COLOR* TEX, INT32 SSS, INT32 SST, TIL INLINE void TEXTURE_PIPELINE_BILINEAR_MID(COLOR* TEX, INT32 SSS, INT32 SST, TILE* tex_tile) { -#define RELATIVE(x, y) ((((x) >> 3) - (y)) << 3) | (x & 7); +#define RELATIVE(x, y) ((((x) >> 3) - (y)) << 3) | (x & 7); INT32 maxs, maxt; COLOR t0, t1, t2, t3; int sss1, sst1, sss2, sst2; @@ -162,7 +162,7 @@ INLINE void TEXTURE_PIPELINE_BILINEAR_MID(COLOR* TEX, INT32 SSS, INT32 SST, TILE INLINE void TEXTURE_PIPELINE_NEAREST_NMID(COLOR* TEX, INT32 SSS, INT32 SST, TILE* tex_tile) { -#define RELATIVE(x, y) ((((x) >> 3) - (y)) << 3) | (x & 7); +#define RELATIVE(x, y) ((((x) >> 3) - (y)) << 3) | (x & 7); INT32 maxs, maxt; int sss1, sst1; INT32 SFRAC, TFRAC; diff --git a/src/mame/video/rollrace.c b/src/mame/video/rollrace.c index 8afe5e9a2a0..899d5573711 100644 --- a/src/mame/video/rollrace.c +++ b/src/mame/video/rollrace.c @@ -13,8 +13,8 @@ static int ra_flipy = 0; static int ra_flipx = 0; static int ra_spritebank =0 ; -#define RA_FGCHAR_BASE 0 -#define RA_BGCHAR_BASE 4 +#define RA_FGCHAR_BASE 0 +#define RA_BGCHAR_BASE 4 #define RA_SP_BASE 5 WRITE8_HANDLER( rollrace_charbank_w) diff --git a/src/mame/video/route16.c b/src/mame/video/route16.c index f6d9cd4d305..a24733dbca9 100644 --- a/src/mame/video/route16.c +++ b/src/mame/video/route16.c @@ -98,15 +98,15 @@ VIDEO_UPDATE( route16 ) for (i = 0; i < 4; i++) { UINT8 color1 = color_prom1[((palette_1 << 6) & 0x80) | - (palette_1 << 2) | - ((data1 >> 3) & 0x02) | - ((data1 >> 0) & 0x01)]; + (palette_1 << 2) | + ((data1 >> 3) & 0x02) | + ((data1 >> 0) & 0x01)]; /* bit 7 of the 2nd color is the OR of the 1st color bits 0 and 1 - this is a guess */ UINT8 color2 = color_prom2[((palette_2 << 6) & 0x80) | (((color1 << 6) & 0x80) | ((color1 << 7) & 0x80)) | - (palette_2 << 2) | - ((data2 >> 3) & 0x02) | - ((data2 >> 0) & 0x01)]; + (palette_2 << 2) | + ((data2 >> 3) & 0x02) | + ((data2 >> 0) & 0x01)]; /* the final color is the OR of the two colors (verified) */ UINT8 final_color = color1 | color2; @@ -154,7 +154,7 @@ static int video_update_stratvox_ttmahjng(running_machine *machine, bitmap_t *bi for (i = 0; i < 4; i++) { UINT8 color1 = color_prom1[(palette_1 << 2) | - ((data1 >> 3) & 0x02) | + ((data1 >> 3) & 0x02) | ((data1 >> 0) & 0x01)]; /* bit 7 of the 2nd color is the OR of the 1st color bits 0 and 1 (verified) */ diff --git a/src/mame/video/rpunch.c b/src/mame/video/rpunch.c index fcb87d281ba..b3cef47250c 100644 --- a/src/mame/video/rpunch.c +++ b/src/mame/video/rpunch.c @@ -263,8 +263,8 @@ static void draw_bitmap(bitmap_t *bitmap, const rectangle *cliprect) coldat = (rpunch_bitmapram[count]>>8 )&0xf; if (coldat!=15) *BITMAP_ADDR16(bitmap, y, ((x*4+1)-4)&0x1ff) = coldat+colourbase; coldat = (rpunch_bitmapram[count]>>4 )&0xf; if (coldat!=15) *BITMAP_ADDR16(bitmap, y, ((x*4+2)-4)&0x1ff) = coldat+colourbase; coldat = (rpunch_bitmapram[count]>>0 )&0xf; if (coldat!=15) *BITMAP_ADDR16(bitmap, y, ((x*4+3)-4)&0x1ff) = coldat+colourbase; - count++; - } + count++; + } } } diff --git a/src/mame/video/segaic16.c b/src/mame/video/segaic16.c index 944e7ebd98f..98697f57896 100644 --- a/src/mame/video/segaic16.c +++ b/src/mame/video/segaic16.c @@ -1970,7 +1970,7 @@ static void segaic16_sprites_16a_draw(running_machine *machine, struct sprite_in * *******************************************************************************************/ -#define system16b_draw_pixel() \ +#define system16b_draw_pixel() \ /* only draw if onscreen, not 0 or 15 */ \ if (x >= cliprect->min_x && x <= cliprect->max_x && pix != 0 && pix != 15) \ { \ @@ -1999,7 +1999,7 @@ static void segaic16_sprites_16b_draw(running_machine *machine, struct sprite_in { UINT8 numbanks; const UINT16 *spritebase; - UINT16 *data; + UINT16 *data; spritebase = (const UINT16 *)memory_region(machine, "gfx2"); if (!spritebase) @@ -2697,8 +2697,8 @@ static void segaic16_sprites_yboard_draw(running_machine *machine, struct sprite /* make this an actual function */ #define system16a_bootleg_draw_core() \ { \ - const UINT16 *spritedata; \ - int x, y, pix, xdelta = 1; \ + const UINT16 *spritedata; \ + int x, y, pix, xdelta = 1; \ \ xpos += info->xoffs; \ xpos &= 0x1ff; \ diff --git a/src/mame/video/segas32.c b/src/mame/video/segas32.c index ce565c46b0e..6a006356dba 100644 --- a/src/mame/video/segas32.c +++ b/src/mame/video/segas32.c @@ -1637,7 +1637,7 @@ static void sprite_swap_buffers(void) /* only draw if onscreen, not 0 or 15 */ \ if (x >= clipin->min_x && x <= clipin->max_x && \ (!do_clipout || x < clipout->min_x || x > clipout->max_x) && \ - pix != trans) \ + pix != trans) \ { \ if (!indirect) \ { \ @@ -1666,7 +1666,7 @@ static void sprite_swap_buffers(void) /* only draw if onscreen, not 0 or 15 */ \ if (x >= clipin->min_x && x <= clipin->max_x && \ (!do_clipout || x < clipout->min_x || x > clipout->max_x) && \ - pix != trans) \ + pix != trans) \ { \ if (!indirect) \ { \ diff --git a/src/mame/video/sei_crtc.c b/src/mame/video/sei_crtc.c index 6d440c01363..a0330070359 100644 --- a/src/mame/video/sei_crtc.c +++ b/src/mame/video/sei_crtc.c @@ -73,7 +73,7 @@ UINT16 seibucrtc_sc0bank; /******************************* * 0x1a - Layer Dynamic Paging? *******************************/ -#define SEIBU_CRTC_DYN_PAGING (seibucrtc_vregs[0x001a/2]) +#define SEIBU_CRTC_DYN_PAGING (seibucrtc_vregs[0x001a/2]) #define SEIBU_CRTC_SC3_PAGE_SEL (SEIBU_CRTC_DYN_PAGING & 0x0002) /******************************* @@ -89,42 +89,42 @@ UINT16 seibucrtc_sc0bank; /************************************ * 0x20 - Screen 0 (BG) scroll x ************************************/ -#define SEIBU_CRTC_SC0_SX (seibucrtc_vregs[0x0020/2]) +#define SEIBU_CRTC_SC0_SX (seibucrtc_vregs[0x0020/2]) /************************************ * 0x22 - Screen 0 (BG) scroll y ************************************/ -#define SEIBU_CRTC_SC0_SY (seibucrtc_vregs[0x0022/2]) +#define SEIBU_CRTC_SC0_SY (seibucrtc_vregs[0x0022/2]) /************************************ * 0x24 - Screen 1 (FG) scroll x ************************************/ -#define SEIBU_CRTC_SC1_SX (seibucrtc_vregs[0x0024/2]) +#define SEIBU_CRTC_SC1_SX (seibucrtc_vregs[0x0024/2]) /************************************ * 0x26 - Screen 1 (FG) scroll y ************************************/ -#define SEIBU_CRTC_SC1_SY (seibucrtc_vregs[0x0026/2]) +#define SEIBU_CRTC_SC1_SY (seibucrtc_vregs[0x0026/2]) /************************************ * 0x28 - Screen 2 (MD) scroll x ************************************/ -#define SEIBU_CRTC_SC2_SX (seibucrtc_vregs[0x0028/2]) +#define SEIBU_CRTC_SC2_SX (seibucrtc_vregs[0x0028/2]) /************************************ * 0x2a - Screen 2 (MD) scroll y ************************************/ -#define SEIBU_CRTC_SC2_SY (seibucrtc_vregs[0x002a/2]) +#define SEIBU_CRTC_SC2_SY (seibucrtc_vregs[0x002a/2]) /************************************ * 0x2c - Fix screen scroll x (global) ************************************/ -#define SEIBU_CRTC_FIX_SX (seibucrtc_vregs[0x002c/2]) +#define SEIBU_CRTC_FIX_SX (seibucrtc_vregs[0x002c/2]) /************************************ * 0x2e - Fix screen scroll y (global) ************************************/ -#define SEIBU_CRTC_FIX_SY (seibucrtc_vregs[0x002e/2]) +#define SEIBU_CRTC_FIX_SY (seibucrtc_vregs[0x002e/2]) /******************************* diff --git a/src/mame/video/seta.c b/src/mame/video/seta.c index ad71d0ca607..2c7288d13b0 100644 --- a/src/mame/video/seta.c +++ b/src/mame/video/seta.c @@ -909,7 +909,7 @@ static VIDEO_UPDATE( seta_layers ) int layers_ctrl = -1; int enab_0, enab_1, x_0, x_1, y_0, y_1; - int order = 0; + int order = 0; int flip = (screen->machine->generic.spriteram.u16[ 0x600/2 ] & 0x40) >> 6; const rectangle *visarea = video_screen_get_visible_area(screen); diff --git a/src/mame/video/seta2.c b/src/mame/video/seta2.c index d801d6c299c..bba1e0f2b8a 100644 --- a/src/mame/video/seta2.c +++ b/src/mame/video/seta2.c @@ -191,7 +191,7 @@ static void draw_sprites(running_machine *machine, bitmap_t *bitmap,const rectan default: popmessage("unknown gfxset %x",(num & 0x0700)>>8); gfx = mame_rand(machine)&3; break; - case 0x0700: // 8bpp tiles (76543210) + case 0x0700: // 8bpp tiles (76543210) gfx = 3; break; case 0x0600: // 6bpp tiles (--543210) (myangel sliding blocks test) gfx = 2; break; diff --git a/src/mame/video/simpsons.c b/src/mame/video/simpsons.c index 902503c477e..53179472599 100644 --- a/src/mame/video/simpsons.c +++ b/src/mame/video/simpsons.c @@ -32,7 +32,7 @@ void simpsons_sprite_callback(running_machine *machine, int *code,int *color,int if (pri <= layerpri[2]) *priority_mask = 0; else if (pri > layerpri[2] && pri <= layerpri[1]) *priority_mask = 0xf0; else if (pri > layerpri[1] && pri <= layerpri[0]) *priority_mask = 0xf0|0xcc; - else *priority_mask = 0xf0|0xcc|0xaa; + else *priority_mask = 0xf0|0xcc|0xaa; *color = sprite_colorbase + (*color & 0x001f); } diff --git a/src/mame/video/skyraid.c b/src/mame/video/skyraid.c index 26f4d8f5d3b..4197d07a3b7 100644 --- a/src/mame/video/skyraid.c +++ b/src/mame/video/skyraid.c @@ -35,7 +35,7 @@ static void draw_text(running_machine *machine, bitmap_t* bitmap, const rectangl y = 136 + 16 * (i ^ 1); for (x = 0; x < bitmap->width; x += 16) - drawgfx_transpen(bitmap, cliprect, machine->gfx[0], *p++, 0, 0, 0, x, y, 0); + drawgfx_transpen(bitmap, cliprect, machine->gfx[0], *p++, 0, 0, 0, x, y, 0); } } diff --git a/src/mame/video/ssrj.c b/src/mame/video/ssrj.c index 9b34d3d83b7..945313a9dca 100644 --- a/src/mame/video/ssrj.c +++ b/src/mame/video/ssrj.c @@ -231,7 +231,7 @@ static void draw_objects(running_machine *machine, bitmap_t *bitmap, const recta for(i=0;i<6;i++) { - x=ssrj_scrollram[0x80+20*i]; + x=ssrj_scrollram[0x80+20*i]; y=ssrj_scrollram[0x80+20*i+2]; if(!ssrj_scrollram[0x80+20*i+3]) for(k=0;k<5;k++,y+=8) diff --git a/src/mame/video/st0016.c b/src/mame/video/st0016.c index e20a80b8e2f..5eb9ca07ea9 100644 --- a/src/mame/video/st0016.c +++ b/src/mame/video/st0016.c @@ -264,36 +264,36 @@ static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const recta for(i=0;i<ST0016_SPR_BANK_SIZE*ST0016_MAX_SPR_BANK;i+=8) { x=st0016_spriteram[i+4]+((st0016_spriteram[i+5]&3)<<8); - y=st0016_spriteram[i+6]+((st0016_spriteram[i+7]&3)<<8); + y=st0016_spriteram[i+6]+((st0016_spriteram[i+7]&3)<<8); - scrollx=(st0016_vregs[(((st0016_spriteram[i+1]&0x0f)>>1)<<2)+0x40]+256*st0016_vregs[(((st0016_spriteram[i+1]&0x0f)>>1)<<2)+1+0x40])&0x3ff; - scrolly=(st0016_vregs[(((st0016_spriteram[i+1]&0x0f)>>1)<<2)+2+0x40]+256*st0016_vregs[(((st0016_spriteram[i+1]&0x0f)>>1)<<2)+3+0x40])&0x3ff; + scrollx=(st0016_vregs[(((st0016_spriteram[i+1]&0x0f)>>1)<<2)+0x40]+256*st0016_vregs[(((st0016_spriteram[i+1]&0x0f)>>1)<<2)+1+0x40])&0x3ff; + scrolly=(st0016_vregs[(((st0016_spriteram[i+1]&0x0f)>>1)<<2)+2+0x40]+256*st0016_vregs[(((st0016_spriteram[i+1]&0x0f)>>1)<<2)+3+0x40])&0x3ff; if(!ISMACS) { - if (x & 0x200) x-= 0x400; //sign - if (y & 0x200) y-= 0x400; + if (x & 0x200) x-= 0x400; //sign + if (y & 0x200) y-= 0x400; - if (scrollx & 0x200) scrollx-= 0x400; //sign - if (scrolly & 0x200) scrolly-= 0x400; - } + if (scrollx & 0x200) scrollx-= 0x400; //sign + if (scrolly & 0x200) scrolly-= 0x400; + } - if(ISMACS1) + if(ISMACS1) { - if (x & 0x200) x-= 0x400; //sign - if (y & 0x200) y-= 0x2b0;//0x400; + if (x & 0x200) x-= 0x400; //sign + if (y & 0x200) y-= 0x2b0;//0x400; - if (scrollx & 0x200) scrollx-= 0x400; //sign - if (scrolly & 0x200) scrolly-= 0x400; - } + if (scrollx & 0x200) scrollx-= 0x400; //sign + if (scrolly & 0x200) scrolly-= 0x400; + } - x+=scrollx; - y+=scrolly; + x+=scrollx; + y+=scrolly; - if(ISMACS) - { - y+=0x20; - } + if(ISMACS) + { + y+=0x20; + } if( st0016_spriteram[i+3]&0x80) /* end of list */ break; @@ -347,7 +347,7 @@ static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const recta int x0,y0,i0=0; for(x0=(flipx?((1<<lx)-1):0);x0!=(flipx?-1:(1<<lx));x0+=(flipx?-1:1)) for(y0=(flipy?((1<<ly)-1):0);y0!=(flipy?-1:(1<<ly));y0+=(flipy?-1:1)) - { + { /* custom draw */ UINT16 *destline; int yloop,xloop; @@ -408,7 +408,7 @@ static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const recta gfxoffs++; } } - } + } } offset+=8; if(offset>=ST0016_SPR_BANK_SIZE*ST0016_MAX_SPR_BANK) @@ -502,17 +502,17 @@ static void draw_bgmap(running_machine *machine, bitmap_t *bitmap,const rectangl int x,y,code,color,flipx,flipy; int i=st0016_vregs[j+1]*0x1000; for(x=0;x<32*2;x++) - for(y=0;y<8*4;y++) - { - code=st0016_spriteram[i]+256*st0016_spriteram[i+1]; - color=st0016_spriteram[i+2]&0x3f; + for(y=0;y<8*4;y++) + { + code=st0016_spriteram[i]+256*st0016_spriteram[i+1]; + color=st0016_spriteram[i+2]&0x3f; - flipx=st0016_spriteram[i+3]&0x80; + flipx=st0016_spriteram[i+3]&0x80; flipy=st0016_spriteram[i+3]&0x40; - if(priority) - { - drawgfx_transpen(bitmap,cliprect,gfx, + if(priority) + { + drawgfx_transpen(bitmap,cliprect,gfx, code, color, flipx,flipy, @@ -579,9 +579,9 @@ static void draw_bgmap(running_machine *machine, bitmap_t *bitmap,const rectangl } } } - i+=4; - } - } + i+=4; + } + } } } @@ -607,10 +607,10 @@ VIDEO_UPDATE( st0016 ) fprintf(p,"VREG %.4x - %.4x\n",h,st0016_vregs[h]); for(h=0;h<0x1000*ST0016_MAX_SPR_BANK;h+=8) { - fprintf(p,"%.4x - %.4x - ",h,h>>3); - for(j=0;j<8;j++) - fprintf(p,"%.2x ",st0016_spriteram[h+j]); - fprintf(p,"\n"); + fprintf(p,"%.4x - %.4x - ",h,h>>3); + for(j=0;j<8;j++) + fprintf(p,"%.2x ",st0016_spriteram[h+j]); + fprintf(p,"\n"); } fclose(p); } @@ -635,7 +635,7 @@ VIDEO_UPDATE( st0016 ) //draw st0016 gfx to temporary bitmap (indexed 16) draw_bgmap(screen->machine, speglsht_bitmap,cliprect,0); - draw_sprites(screen->machine, speglsht_bitmap,cliprect); + draw_sprites(screen->machine, speglsht_bitmap,cliprect); draw_bgmap(screen->machine, speglsht_bitmap,cliprect,1); //copy temporary bitmap to rgb 32 bit bitmap @@ -664,7 +664,7 @@ VIDEO_UPDATE( st0016 ) bitmap_fill(bitmap,cliprect,UNUSED_PEN); draw_bgmap(screen->machine, bitmap,cliprect,0); - draw_sprites(screen->machine, bitmap,cliprect); + draw_sprites(screen->machine, bitmap,cliprect); draw_bgmap(screen->machine, bitmap,cliprect,1); } return 0; diff --git a/src/mame/video/starcrus.c b/src/mame/video/starcrus.c index 8757ea47d35..3b497e29c3d 100644 --- a/src/mame/video/starcrus.c +++ b/src/mame/video/starcrus.c @@ -94,7 +94,7 @@ WRITE8_HANDLER( starcrus_ship_parm_2_w ) s2_sprite = data&0x1f; set_led_status(space->machine, 2,~data & 0x80); /* game over lamp */ - coin_counter_w(space->machine, 0, ((data&0x40)>>6)^0x01); /* coin counter */ + coin_counter_w(space->machine, 0, ((data&0x40)>>6)^0x01); /* coin counter */ engine2_on = ((data&0x20)>>5)^0x01; if (engine1_on || engine2_on) @@ -234,7 +234,7 @@ static int collision_check_s1s2(running_machine *machine) /* Now check for collisions */ for (sy=0;sy<16;sy++) for (sx=0;sx<16;sx++) - /* Condition 1 - ship 1 = ship 2 */ + /* Condition 1 - ship 1 = ship 2 */ if ((*BITMAP_ADDR16(ship1_vid, sy, sx)==1) && (*BITMAP_ADDR16(ship2_vid, sy, sx)==1)) return 1; @@ -294,7 +294,7 @@ static int collision_check_p1p2(running_machine *machine) /* Now check for collisions */ for (sy=0;sy<16;sy++) for (sx=0;sx<16;sx++) - /* Condition 1 - proj 1 = proj 2 */ + /* Condition 1 - proj 1 = proj 2 */ if ((*BITMAP_ADDR16(proj1_vid, sy, sx)==1) && (*BITMAP_ADDR16(proj2_vid, sy, sx)==1)) return 1; @@ -365,7 +365,7 @@ static int collision_check_s1p1p2(running_machine *machine) for (sy=0;sy<16;sy++) for (sx=0;sx<16;sx++) if (*BITMAP_ADDR16(ship1_vid, sy, sx)==1) - { + { /* Condition 1 - ship 1 = proj 1 */ if (*BITMAP_ADDR16(proj1_vid, sy, sx)==1) return 1; @@ -441,7 +441,7 @@ static int collision_check_s2p1p2(running_machine *machine) for (sy=0;sy<16;sy++) for (sx=0;sx<16;sx++) if (*BITMAP_ADDR16(ship2_vid, sy, sx)==1) - { + { /* Condition 1 - ship 2 = proj 1 */ if (*BITMAP_ADDR16(proj1_vid, sy, sx)==1) return 1; diff --git a/src/mame/video/stvvdp2.c b/src/mame/video/stvvdp2.c index 2b8c668474c..1cb450c2ff0 100644 --- a/src/mame/video/stvvdp2.c +++ b/src/mame/video/stvvdp2.c @@ -196,13 +196,13 @@ enum | LSMD1 | LSMD0 | VRESO1 | VRESO0 | -- | HRESO2 | HRESO1 | HRESO0 | \----------|----------|----------|----------|----------|----------|----------|---------*/ - #define STV_VDP2_TVMD ((stv_vdp2_regs[0x000/4] >> 16)&0x0000ffff) + #define STV_VDP2_TVMD ((stv_vdp2_regs[0x000/4] >> 16)&0x0000ffff) #define STV_VDP2_DISP ((STV_VDP2_TVMD & 0x8000) >> 15) #define STV_VDP2_BDCLMD ((STV_VDP2_TVMD & 0x0100) >> 8) - #define STV_VDP2_LSMD ((STV_VDP2_TVMD & 0x00c0) >> 6) - #define STV_VDP2_VRES ((STV_VDP2_TVMD & 0x0030) >> 4) - #define STV_VDP2_HRES ((STV_VDP2_TVMD & 0x0007) >> 0) + #define STV_VDP2_LSMD ((STV_VDP2_TVMD & 0x00c0) >> 6) + #define STV_VDP2_VRES ((STV_VDP2_TVMD & 0x0030) >> 4) + #define STV_VDP2_HRES ((STV_VDP2_TVMD & 0x0007) >> 0) /* 180002 - r/w - EXTEN - External Signal Enable Register bit-> /----15----|----14----|----13----|----12----|----11----|----10----|----09----|----08----\ @@ -2242,7 +2242,7 @@ static void stv_vdp2_fill_rotation_parameter_table( running_machine *machine, UI case 6: popmessage( "cx = %x, cy = %x, cz = %x", RP.cx, RP.cy, RP.cz ); break; case 7: popmessage( "mx = %x, my = %x", RP.mx, RP.my ); break; case 8: popmessage( "kx = %x, ky = %x", RP.kx, RP.ky ); break; - case 9: popmessage( "kast = %x, dkast = %x, dkax = %x", RP.kast, RP.dkast, RP.dkax ); break; + case 9: popmessage( "kast = %x, dkast = %x, dkax = %x", RP.kast, RP.dkast, RP.dkax ); break; case 10: break; } } @@ -2677,12 +2677,12 @@ static void stv_vdp2_compute_color_offset_RGB555( int *r, int *g, int *b, int co *g = (STV_VDP2_COBG & 0x100) ? (*g - (0xff - (STV_VDP2_COBG & 0xff))) : ((STV_VDP2_COBG & 0xff) + *g); *b = (STV_VDP2_COBB & 0x100) ? (*b - (0xff - (STV_VDP2_COBB & 0xff))) : ((STV_VDP2_COBB & 0xff) + *b); } - if(*r < 0) { *r = 0; } - if(*r > 0xff) { *r = 0xff; } - if(*g < 0) { *g = 0; } - if(*g > 0xff) { *g = 0xff; } - if(*b < 0) { *b = 0; } - if(*b > 0xff) { *b = 0xff; } + if(*r < 0) { *r = 0; } + if(*r > 0xff) { *r = 0xff; } + if(*g < 0) { *g = 0; } + if(*g > 0xff) { *g = 0xff; } + if(*b < 0) { *b = 0; } + if(*b > 0xff) { *b = 0xff; } *r >>= 3; *g >>= 3; *b >>= 3; @@ -2706,12 +2706,12 @@ static void stv_vdp2_compute_color_offset_RGB555_UINT16(UINT16 *rgb, int cor) _g = (STV_VDP2_COBG & 0x100) ? (_g - (0xff - (STV_VDP2_COBG & 0xff))) : ((STV_VDP2_COBG & 0xff) + _g); _b = (STV_VDP2_COBB & 0x100) ? (_b - (0xff - (STV_VDP2_COBB & 0xff))) : ((STV_VDP2_COBB & 0xff) + _b); } - if(_r < 0) { _r = 0; } - if(_r > 0xff) { _r = 0xff; } - if(_g < 0) { _g = 0; } - if(_g > 0xff) { _g = 0xff; } - if(_b < 0) { _b = 0; } - if(_b > 0xff) { _b = 0xff; } + if(_r < 0) { _r = 0; } + if(_r > 0xff) { _r = 0xff; } + if(_g < 0) { _g = 0; } + if(_g > 0xff) { _g = 0xff; } + if(_b < 0) { _b = 0; } + if(_b > 0xff) { _b = 0xff; } _r >>= 3; _g >>= 3; _b >>= 3; @@ -3135,7 +3135,7 @@ static void stv_vdp2_draw_basic_bitmap(running_machine *machine, bitmap_t *bitma } /*Guess: myfairlady needs that the vertical resolution is doubled because it's using the double density mode.*/ if(STV_VDP2_LSMD == 3) { gfxdata += xlinesize*(yy>>16); } - else { gfxdata += xlinesize; } + else { gfxdata += xlinesize; } if ( gfxdata >= gfxdatahigh ) gfxdata = gfxdatalow + (gfxdata - gfxdatahigh); } } @@ -5531,11 +5531,11 @@ static void stv_vdp2_fade_effects(running_machine *machine) t_g = (STV_VDP2_COAG & 0x100) ? (RGB_GREEN(color) - (0x100 - (STV_VDP2_COAG & 0xff))) : ((STV_VDP2_COAG & 0xff) + RGB_GREEN(color)); t_b = (STV_VDP2_COAB & 0x100) ? (RGB_BLUE(color) - (0x100 - (STV_VDP2_COAB & 0xff))) : ((STV_VDP2_COAB & 0xff) + RGB_BLUE(color)); if(t_r < 0) { t_r = 0; } - if(t_r > 0xff) { t_r = 0xff; } + if(t_r > 0xff) { t_r = 0xff; } if(t_g < 0) { t_g = 0; } - if(t_g > 0xff) { t_g = 0xff; } + if(t_g > 0xff) { t_g = 0xff; } if(t_b < 0) { t_b = 0; } - if(t_b > 0xff) { t_b = 0xff; } + if(t_b > 0xff) { t_b = 0xff; } r = t_r; g = t_g; b = t_b; @@ -5547,11 +5547,11 @@ static void stv_vdp2_fade_effects(running_machine *machine) t_g = (STV_VDP2_COBG & 0x100) ? (RGB_GREEN(color) - (0xff - (STV_VDP2_COBG & 0xff))) : ((STV_VDP2_COBG & 0xff) + RGB_GREEN(color)); t_b = (STV_VDP2_COBB & 0x100) ? (RGB_BLUE(color) - (0xff - (STV_VDP2_COBB & 0xff))) : ((STV_VDP2_COBB & 0xff) + RGB_BLUE(color)); if(t_r < 0) { t_r = 0; } - if(t_r > 0xff) { t_r = 0xff; } + if(t_r > 0xff) { t_r = 0xff; } if(t_g < 0) { t_g = 0; } - if(t_g > 0xff) { t_g = 0xff; } + if(t_g > 0xff) { t_g = 0xff; } if(t_b < 0) { t_b = 0; } - if(t_b > 0xff) { t_b = 0xff; } + if(t_b > 0xff) { t_b = 0xff; } r = t_r; g = t_g; b = t_b; @@ -5596,7 +5596,7 @@ Window Registers are hooked up like this ATM: static void stv_vdp2_get_window0_coordinates(UINT16 *s_x, UINT16 *e_x, UINT16 *s_y, UINT16 *e_y) { /*W0*/ - switch(STV_VDP2_LSMD & 3) + switch(STV_VDP2_LSMD & 3) { case 0: case 1: diff --git a/src/mame/video/suprloco.c b/src/mame/video/suprloco.c index 421fc351d9b..50a9fbc7d85 100644 --- a/src/mame/video/suprloco.c +++ b/src/mame/video/suprloco.c @@ -129,7 +129,7 @@ WRITE8_HANDLER( suprloco_control_w ) { /* There is probably a palette select in here */ - /* Bit 0 - coin counter A */ + /* Bit 0 - coin counter A */ /* Bit 1 - coin counter B (only used if coinage differs from A) */ /* Bit 2-3 - probably unused */ /* Bit 4 - ??? */ diff --git a/src/mame/video/suprnova.c b/src/mame/video/suprnova.c index f20e1e33038..8dd8cb1d545 100644 --- a/src/mame/video/suprnova.c +++ b/src/mame/video/suprnova.c @@ -907,8 +907,8 @@ WRITE32_HANDLER ( skns_v3_regs_w ) depthA = (skns_v3_regs[0x0c/4] & 0x0001) << 1; depthB = (skns_v3_regs[0x0c/4] & 0x0100) >> 7; - if (old_depthA != depthA) tilemap_mark_all_tiles_dirty (skns_tilemap_A); - if (old_depthB != depthB) tilemap_mark_all_tiles_dirty (skns_tilemap_B); + if (old_depthA != depthA) tilemap_mark_all_tiles_dirty (skns_tilemap_A); + if (old_depthB != depthB) tilemap_mark_all_tiles_dirty (skns_tilemap_B); } } diff --git a/src/mame/video/surpratk.c b/src/mame/video/surpratk.c index e96dfa430da..575f494ba5e 100644 --- a/src/mame/video/surpratk.c +++ b/src/mame/video/surpratk.c @@ -30,7 +30,7 @@ void surpratk_sprite_callback(running_machine *machine, int *code,int *color,int if (pri <= layerpri[2]) *priority_mask = 0; else if (pri > layerpri[2] && pri <= layerpri[1]) *priority_mask = 0xf0; else if (pri > layerpri[1] && pri <= layerpri[0]) *priority_mask = 0xf0|0xcc; - else *priority_mask = 0xf0|0xcc|0xaa; + else *priority_mask = 0xf0|0xcc|0xaa; *color = sprite_colorbase + (*color & 0x1f); } diff --git a/src/mame/video/system1.c b/src/mame/video/system1.c index 78dcb7db133..4bc5c95a626 100644 --- a/src/mame/video/system1.c +++ b/src/mame/video/system1.c @@ -520,7 +520,7 @@ static void video_update_common(const device_config *screen, bitmap_t *bitmap, c UINT8 lookup_value; /* using the sprite, background, and foreground pixels, look up the color behavior */ - lookup_index = (((sprpix & 0xf) == 0) << 0) | + lookup_index = (((sprpix & 0xf) == 0) << 0) | (((fgpix & 7) == 0) << 1) | (((fgpix >> 9) & 3) << 2) | (((bgpix & 7) == 0) << 4) | diff --git a/src/mame/video/taiicdev.c b/src/mame/video/taiicdev.c index 75a5f98bbe4..d7fede1acfa 100644 --- a/src/mame/video/taiicdev.c +++ b/src/mame/video/taiicdev.c @@ -1673,7 +1673,7 @@ static void tc0080vco_bg0_tilemap_draw( const device_config *device, bitmap_t *b } -#define PIXEL_OP_COPY_TRANS0_SET_PRIORITY(DEST, PRIORITY, SOURCE) \ +#define PIXEL_OP_COPY_TRANS0_SET_PRIORITY(DEST, PRIORITY, SOURCE) \ do \ { \ UINT32 srcdata = (SOURCE); \ @@ -2116,7 +2116,7 @@ void tc0100scn_set_bg_tilemask( const device_config *device, int mask ) WRITE16_DEVICE_HANDLER( tc0100scn_gfxbank_w ) /* Mjnquest banks its 2 sets of scr tiles */ { - tc0100scn_state *tc0100scn = tc0100scn_get_safe_token(device); + tc0100scn_state *tc0100scn = tc0100scn_get_safe_token(device); tc0100scn->gfxbank = (data & 0x1); } @@ -2146,7 +2146,7 @@ static void tc0100scn_set_layer_ptrs( tc0100scn_state *tc0100scn ) static void tc0100scn_dirty_tilemaps( const device_config *device ) { - tc0100scn_state *tc0100scn = tc0100scn_get_safe_token(device); + tc0100scn_state *tc0100scn = tc0100scn_get_safe_token(device); tilemap_mark_all_tiles_dirty(tc0100scn->tilemap[0][tc0100scn->dblwidth]); tilemap_mark_all_tiles_dirty(tc0100scn->tilemap[1][tc0100scn->dblwidth]); @@ -2187,13 +2187,13 @@ static STATE_POSTLOAD( tc0100scn_postload ) READ16_DEVICE_HANDLER( tc0100scn_word_r ) { - tc0100scn_state *tc0100scn = tc0100scn_get_safe_token(device); + tc0100scn_state *tc0100scn = tc0100scn_get_safe_token(device); return tc0100scn->ram[offset]; } WRITE16_DEVICE_HANDLER( tc0100scn_word_w ) { - tc0100scn_state *tc0100scn = tc0100scn_get_safe_token(device); + tc0100scn_state *tc0100scn = tc0100scn_get_safe_token(device); COMBINE_DATA(&tc0100scn->ram[offset]); if (!tc0100scn->dblwidth) @@ -2237,13 +2237,13 @@ WRITE16_DEVICE_HANDLER( TC0100SCN_triple_screen_w ) READ16_DEVICE_HANDLER( tc0100scn_ctrl_word_r ) { - tc0100scn_state *tc0100scn = tc0100scn_get_safe_token(device); + tc0100scn_state *tc0100scn = tc0100scn_get_safe_token(device); return tc0100scn->ctrl[offset]; } WRITE16_DEVICE_HANDLER( tc0100scn_ctrl_word_w ) { - tc0100scn_state *tc0100scn = tc0100scn_get_safe_token(device); + tc0100scn_state *tc0100scn = tc0100scn_get_safe_token(device); COMBINE_DATA(&tc0100scn->ctrl[offset]); @@ -2359,7 +2359,7 @@ WRITE32_DEVICE_HANDLER( tc0100scn_long_w ) void tc0100scn_tilemap_update( const device_config *device ) { - tc0100scn_state *tc0100scn = tc0100scn_get_safe_token(device); + tc0100scn_state *tc0100scn = tc0100scn_get_safe_token(device); int j; tilemap_set_scrolly(tc0100scn->tilemap[0][tc0100scn->dblwidth], 0, tc0100scn->bgscrolly); @@ -2373,7 +2373,7 @@ void tc0100scn_tilemap_update( const device_config *device ) static void tc0100scn_tilemap_draw_fg( const device_config *device, bitmap_t *bitmap, const rectangle *cliprect, tilemap_t* tmap, int flags, UINT32 priority ) { - tc0100scn_state *tc0100scn = tc0100scn_get_safe_token(device); + tc0100scn_state *tc0100scn = tc0100scn_get_safe_token(device); const bitmap_t *src_bitmap = tilemap_get_pixmap(tmap); int width_mask, height_mask, x, y, p; int column_offset, src_x = 0, src_y = 0; @@ -2419,7 +2419,7 @@ static void tc0100scn_tilemap_draw_fg( const device_config *device, bitmap_t *bi int tc0100scn_tilemap_draw( const device_config *device, bitmap_t *bitmap, const rectangle *cliprect, int layer, int flags, UINT32 priority ) { - tc0100scn_state *tc0100scn = tc0100scn_get_safe_token(device); + tc0100scn_state *tc0100scn = tc0100scn_get_safe_token(device); int disable = tc0100scn->ctrl[6] & 0xf7; rectangle clip = *cliprect; sect_rect(&clip, &tc0100scn->cliprect); @@ -2452,7 +2452,7 @@ if (disable != 0 && disable != 3 && disable != 7) int tc0100scn_bottomlayer( const device_config *device ) { - tc0100scn_state *tc0100scn = tc0100scn_get_safe_token(device); + tc0100scn_state *tc0100scn = tc0100scn_get_safe_token(device); return (tc0100scn->ctrl[6] & 0x8) >> 3; } diff --git a/src/mame/video/taito_f3.c b/src/mame/video/taito_f3.c index 916a8a8abfe..c97045f1548 100644 --- a/src/mame/video/taito_f3.c +++ b/src/mame/video/taito_f3.c @@ -529,7 +529,7 @@ static TILE_GET_INFO( get_tile_info_vram ) int flags=0; if (tile_index&1) - vram_tile = (machine->generic.videoram.u32[tile_index>>1]&0xffff); + vram_tile = (machine->generic.videoram.u32[tile_index>>1]&0xffff); else vram_tile = (machine->generic.videoram.u32[tile_index>>1]>>16); @@ -557,7 +557,7 @@ static TILE_GET_INFO( get_tile_info_pixel ) col_off=((tile_index%32)*0x40)+((tile_index&0xfe0)>>5); if (col_off&1) - vram_tile = (machine->generic.videoram.u32[col_off>>1]&0xffff); + vram_tile = (machine->generic.videoram.u32[col_off>>1]&0xffff); else vram_tile = (machine->generic.videoram.u32[col_off>>1]>>16); @@ -856,11 +856,11 @@ WRITE32_HANDLER( f3_palette_24bit_w ) /* This is weird - why are only the sprites and VRAM palettes 21 bit? */ else if (f3_game==CLEOPATR) { if (offset<0x100 || offset>0x1000) { - r = ((space->machine->generic.paletteram.u32[offset] >>16) & 0x7f)<<1; + r = ((space->machine->generic.paletteram.u32[offset] >>16) & 0x7f)<<1; g = ((space->machine->generic.paletteram.u32[offset] >> 8) & 0x7f)<<1; b = ((space->machine->generic.paletteram.u32[offset] >> 0) & 0x7f)<<1; } else { - r = (space->machine->generic.paletteram.u32[offset] >>16) & 0xff; + r = (space->machine->generic.paletteram.u32[offset] >>16) & 0xff; g = (space->machine->generic.paletteram.u32[offset] >> 8) & 0xff; b = (space->machine->generic.paletteram.u32[offset] >> 0) & 0xff; } @@ -869,11 +869,11 @@ WRITE32_HANDLER( f3_palette_24bit_w ) /* Another weird couple - perhaps this is alpha blending related? */ else if (f3_game==TWINQIX || f3_game==RECALH) { if (offset>0x1c00) { - r = ((space->machine->generic.paletteram.u32[offset] >>16) & 0x7f)<<1; + r = ((space->machine->generic.paletteram.u32[offset] >>16) & 0x7f)<<1; g = ((space->machine->generic.paletteram.u32[offset] >> 8) & 0x7f)<<1; b = ((space->machine->generic.paletteram.u32[offset] >> 0) & 0x7f)<<1; } else { - r = (space->machine->generic.paletteram.u32[offset] >>16) & 0xff; + r = (space->machine->generic.paletteram.u32[offset] >>16) & 0xff; g = (space->machine->generic.paletteram.u32[offset] >> 8) & 0xff; b = (space->machine->generic.paletteram.u32[offset] >> 0) & 0xff; } @@ -881,7 +881,7 @@ WRITE32_HANDLER( f3_palette_24bit_w ) /* All other games - standard 24 bit palette */ else { - r = (space->machine->generic.paletteram.u32[offset] >>16) & 0xff; + r = (space->machine->generic.paletteram.u32[offset] >>16) & 0xff; g = (space->machine->generic.paletteram.u32[offset] >> 8) & 0xff; b = (space->machine->generic.paletteram.u32[offset] >> 0) & 0xff; } @@ -1979,7 +1979,7 @@ static void get_line_ram_info(running_machine *machine, tilemap_t *tmap, int sx, if (!pri || (!flipscreen && y<24) || (flipscreen && y>231) || (pri&0xc000)==0xc000 || !(pri&0x2000)/**/) - line_enable=0; + line_enable=0; else if(pri&0x4000) //alpha1 line_enable=2; else if(pri&0x8000) //alpha2 @@ -2116,7 +2116,7 @@ static void get_vram_info(tilemap_t *vram_tilemap, tilemap_t *pixel_tilemap, int if (!pri || (!flipscreen && y<24) || (flipscreen && y>231) || (pri&0xc000)==0xc000 || !(pri&0x2000)/**/) - line_enable=0; + line_enable=0; else if(pri&0x4000) //alpha1 line_enable=2; else if(pri&0x8000) //alpha2 @@ -3139,7 +3139,7 @@ static void get_sprite_info(running_machine *machine, const UINT32 *spriteram32_ } /* These features are common to sprite and block parts */ - flipx = spritecont&0x1; + flipx = spritecont&0x1; flipy = spritecont&0x2; multi = spritecont&0x8; last_x=x; diff --git a/src/mame/video/taitoic.c b/src/mame/video/taitoic.c index 7811c7595bc..c54c55c988a 100644 --- a/src/mame/video/taitoic.c +++ b/src/mame/video/taitoic.c @@ -1488,7 +1488,7 @@ void TC0080VCO_vh_start(running_machine *machine, int gfxnum,int has_fg0,int bg_ { TC0080VCO_tilemap[2] = tilemap_create(machine, TC0080VCO_get_tx_tile_info,tilemap_scan_rows,8,8,64,64); - /* find first empty slot to decode gfx */ + /* find first empty slot to decode gfx */ for (gfx_index = 0; gfx_index < MAX_GFX_ELEMENTS; gfx_index++) if (machine->gfx[gfx_index] == 0) break; @@ -1795,7 +1795,7 @@ static void TC0080VCO_bg0_tilemap_draw(running_machine *machine,bitmap_t *bitmap } -#define PIXEL_OP_COPY_TRANS0_SET_PRIORITY(DEST, PRIORITY, SOURCE) \ +#define PIXEL_OP_COPY_TRANS0_SET_PRIORITY(DEST, PRIORITY, SOURCE) \ do \ { \ UINT32 srcdata = (SOURCE); \ diff --git a/src/mame/video/taitojc.c b/src/mame/video/taitojc.c index 430c1476281..ef7c14b240e 100644 --- a/src/mame/video/taitojc.c +++ b/src/mame/video/taitojc.c @@ -178,7 +178,7 @@ VIDEO_START( taitojc ) poly = poly_alloc(machine, 4000, sizeof(poly_extra_data), POLYFLAG_ALLOW_QUADS); add_exit_callback(machine, taitojc_exit); - /* find first empty slot to decode gfx */ + /* find first empty slot to decode gfx */ for (taitojc_gfx_index = 0; taitojc_gfx_index < MAX_GFX_ELEMENTS; taitojc_gfx_index++) if (machine->gfx[taitojc_gfx_index] == 0) break; diff --git a/src/mame/video/taitosj.c b/src/mame/video/taitosj.c index 4dc8630adf7..b2107b25f3c 100644 --- a/src/mame/video/taitosj.c +++ b/src/mame/video/taitosj.c @@ -11,10 +11,10 @@ #include "includes/taitosj.h" -#define GLOBAL_FLIP_X (*taitosj_video_mode & 0x01) -#define GLOBAL_FLIP_Y (*taitosj_video_mode & 0x02) +#define GLOBAL_FLIP_X (*taitosj_video_mode & 0x01) +#define GLOBAL_FLIP_Y (*taitosj_video_mode & 0x02) #define SPRITE_RAM_PAGE_OFFSET ((*taitosj_video_mode & 0x04) ? 0x80 : 0x00) -#define SPRITES_ON (*taitosj_video_mode & 0x80) +#define SPRITES_ON (*taitosj_video_mode & 0x80) #define TRANSPARENT_PEN (0x40) @@ -738,8 +738,8 @@ static void check_collision(running_machine *machine, int *sprites_on, rectangle static int video_update_common(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, copy_layer_func_t copy_layer_func) { - int sprites_on[0x20]; /* 1 if sprite is active */ - rectangle sprite_areas[0x20]; /* areas on bitmap (sprite locations) */ + int sprites_on[0x20]; /* 1 if sprite is active */ + rectangle sprite_areas[0x20]; /* areas on bitmap (sprite locations) */ set_pens(machine); diff --git a/src/mame/video/thief.c b/src/mame/video/thief.c index f6153ceb5cb..662b8831d98 100644 --- a/src/mame/video/thief.c +++ b/src/mame/video/thief.c @@ -223,10 +223,10 @@ WRITE8_HANDLER( thief_blit_w ){ READ8_HANDLER( thief_coprocessor_r ){ switch( offset ){ - case SCREEN_XPOS: /* xpos */ + case SCREEN_XPOS: /* xpos */ case SCREEN_YPOS: /* ypos */ { - /* XLAT: given (x,y) coordinate, return byte address in videoram */ + /* XLAT: given (x,y) coordinate, return byte address in videoram */ int addr = thief_coprocessor.param[SCREEN_XPOS]+256*thief_coprocessor.param[SCREEN_YPOS]; int result = 0xc000 | (addr>>3); return (offset==0x03)?(result>>8):(result&0xff); diff --git a/src/mame/video/tmnt.c b/src/mame/video/tmnt.c index 4c19273b613..4730f453eaf 100644 --- a/src/mame/video/tmnt.c +++ b/src/mame/video/tmnt.c @@ -136,7 +136,7 @@ void punkshot_sprite_callback(running_machine *machine, int *code,int *color,int if (pri <= layerpri[2]) *priority_mask = 0; else if (pri > layerpri[2] && pri <= layerpri[1]) *priority_mask = 0xf0; else if (pri > layerpri[1] && pri <= layerpri[0]) *priority_mask = 0xf0|0xcc; - else *priority_mask = 0xf0|0xcc|0xaa; + else *priority_mask = 0xf0|0xcc|0xaa; *code |= (*color & 0x10) << 9; *color = sprite_colorbase + (*color & 0x0f); @@ -148,7 +148,7 @@ void thndrx2_sprite_callback(running_machine *machine, int *code,int *color,int if (pri <= layerpri[2]) *priority_mask = 0; else if (pri > layerpri[2] && pri <= layerpri[1]) *priority_mask = 0xf0; else if (pri > layerpri[1] && pri <= layerpri[0]) *priority_mask = 0xf0|0xcc; - else *priority_mask = 0xf0|0xcc|0xaa; + else *priority_mask = 0xf0|0xcc|0xaa; *color = sprite_colorbase + (*color & 0x0f); } @@ -166,7 +166,7 @@ void lgtnfght_sprite_callback(running_machine *machine, int *code,int *color,int if (pri <= layerpri[2]) *priority_mask = 0; else if (pri > layerpri[2] && pri <= layerpri[1]) *priority_mask = 0xf0; else if (pri > layerpri[1] && pri <= layerpri[0]) *priority_mask = 0xf0|0xcc; - else *priority_mask = 0xf0|0xcc|0xaa; + else *priority_mask = 0xf0|0xcc|0xaa; *color = sprite_colorbase + (*color & 0x1f); } @@ -182,7 +182,7 @@ if (input_code_pressed(machine, KEYCODE_E) && (*color & 0x80)) *color = rand(); if (pri <= layerpri[2]) *priority_mask = 0; else if (pri > layerpri[2] && pri <= layerpri[1]) *priority_mask = 0xf0; else if (pri > layerpri[1] && pri <= layerpri[0]) *priority_mask = 0xf0|0xcc; - else *priority_mask = 0xf0|0xcc|0xaa; + else *priority_mask = 0xf0|0xcc|0xaa; *color = sprite_colorbase + (*color & 0x1f); } @@ -193,7 +193,7 @@ void prmrsocr_sprite_callback(running_machine *machine, int *code,int *color,int if (pri <= layerpri[2]) *priority_mask = 0; else if (pri > layerpri[2] && pri <= layerpri[1]) *priority_mask = 0xf0; else if (pri > layerpri[1] && pri <= layerpri[0]) *priority_mask = 0xf0|0xcc; - else *priority_mask = 0xf0|0xcc|0xaa; + else *priority_mask = 0xf0|0xcc|0xaa; *code |= prmrsocr_sprite_bank << 14; diff --git a/src/mame/video/toaplan2.c b/src/mame/video/toaplan2.c index 9025ca85faf..1abea4c11dd 100644 --- a/src/mame/video/toaplan2.c +++ b/src/mame/video/toaplan2.c @@ -1210,8 +1210,8 @@ static void toaplan2_log_vram(running_machine *machine) sypos[1] = source_new0[sprite_voffs + 3]; logerror("SPoffs Sprt Attr Xpos Ypos Sprt Attr Xpos Ypos\n"); logerror("0:%03x now:%04x %04x %04x %04x new:%04x %04x %04x %04x\n",sprite_voffs, - schar[0], sattr[0],sxpos[0], sypos[0], - schar[1], sattr[1],sxpos[1], sypos[1]); + schar[0], sattr[0],sxpos[0], sypos[0], + schar[1], sattr[1],sxpos[1], sypos[1]); if (vid_controllers == 2) { sattr[0] = source_now1[sprite_voffs]; @@ -1223,8 +1223,8 @@ static void toaplan2_log_vram(running_machine *machine) sxpos[1] = source_new1[sprite_voffs + 2]; sypos[1] = source_new1[sprite_voffs + 3]; logerror("1:%03x now:%04x %04x %04x %04x new:%04x %04x %04x %04x\n",sprite_voffs, - schar[0], sattr[0],sxpos[0], sypos[0], - schar[1], sattr[1],sxpos[1], sypos[1]); + schar[0], sattr[0],sxpos[0], sypos[0], + schar[1], sattr[1],sxpos[1], sypos[1]); } } } diff --git a/src/mame/video/topspeed.c b/src/mame/video/topspeed.c index 0a40805a93f..ce02282461d 100644 --- a/src/mame/video/topspeed.c +++ b/src/mame/video/topspeed.c @@ -181,7 +181,7 @@ VIDEO_UPDATE( topspeed ) #ifdef MAME_DEBUG if (dislayer[1]==0) #endif - PC080SN_tilemap_draw_special(screen->machine,bitmap,cliprect,0,layer[2],0,4,topspeed_raster_ctrl + 0x100); + PC080SN_tilemap_draw_special(screen->machine,bitmap,cliprect,0,layer[2],0,4,topspeed_raster_ctrl + 0x100); #ifdef MAME_DEBUG if (dislayer[0]==0) diff --git a/src/mame/video/turbo.c b/src/mame/video/turbo.c index 5af163459fa..08648aca3fe 100644 --- a/src/mame/video/turbo.c +++ b/src/mame/video/turbo.c @@ -544,9 +544,9 @@ VIDEO_UPDATE( turbo ) priority = pr1122[priority]; /* use that to look up the overall priority in IC12/PR1123 (p. 144) */ - mx = (priority & 7) | /* A0-A2: PR-1122 output, bits 0-2 */ - ((sprbits & 0x01000000) >> 21) | /* A3: PLB0 */ - ((foreraw & 0x80) >> 3) | /* A4: PLBE */ + mx = (priority & 7) | /* A0-A2: PR-1122 output, bits 0-2 */ + ((sprbits & 0x01000000) >> 21) | /* A3: PLB0 */ + ((foreraw & 0x80) >> 3) | /* A4: PLBE */ ((forebits & 0x08) << 2) | /* A5: PLBF */ ((babit & 0x07) << 6) | /* A6-A8: BABIT1-3 */ ((state->turbo_fbpla & 0x08) << 6); /* A9: PLA3 */ @@ -844,7 +844,7 @@ VIDEO_UPDATE( subroc3d ) /* we then go through a muxer to select one of the 16 outputs computed above (p. 141) */ offs = (finalbits & 0x0f) | /* A0-A3: CD0-CD3 */ - ((mux & 0x08) << 1) | /* A4: MUX3 */ + ((mux & 0x08) << 1) | /* A4: MUX3 */ (state->subroc3d_col << 5); /* A5-A8: COL0-COL3 */ dest[x + ix] = pr1419[offs]; } diff --git a/src/mame/video/twin16.c b/src/mame/video/twin16.c index 84f8aa265b0..ece484fb09f 100644 --- a/src/mame/video/twin16.c +++ b/src/mame/video/twin16.c @@ -55,7 +55,7 @@ WRITE16_HANDLER( twin16_text_ram_w ) } WRITE16_HANDLER( twin16_paletteram_word_w ) -{ // identical to tmnt_paletteram_w +{ // identical to tmnt_paletteram_w COMBINE_DATA(space->machine->generic.paletteram.u16 + offset); offset &= ~1; diff --git a/src/mame/video/vendetta.c b/src/mame/video/vendetta.c index 21a5d8dc70b..42377de0a3e 100644 --- a/src/mame/video/vendetta.c +++ b/src/mame/video/vendetta.c @@ -39,7 +39,7 @@ void vendetta_sprite_callback(running_machine *machine, int *code,int *color,int if (pri <= layerpri[2]) *priority_mask = 0; else if (pri > layerpri[2] && pri <= layerpri[1]) *priority_mask = 0xf0; else if (pri > layerpri[1] && pri <= layerpri[0]) *priority_mask = 0xf0|0xcc; - else *priority_mask = 0xf0|0xcc|0xaa; + else *priority_mask = 0xf0|0xcc|0xaa; *color = sprite_colorbase + (*color & 0x001f); } diff --git a/src/mame/video/warriorb.c b/src/mame/video/warriorb.c index aeda05002c4..29a4835b725 100644 --- a/src/mame/video/warriorb.c +++ b/src/mame/video/warriorb.c @@ -90,7 +90,7 @@ static void draw_sprites(running_machine *machine, bitmap_t *bitmap,const rectan if (y>0x180) y -= 0x200; pdrawgfx_transpen(bitmap,cliprect,machine->gfx[0], - tilenum, + tilenum, color, flipx,flipy, x,y, diff --git a/src/mame/video/xmen.c b/src/mame/video/xmen.c index 71948a2715e..36b54efe3f1 100644 --- a/src/mame/video/xmen.c +++ b/src/mame/video/xmen.c @@ -34,7 +34,7 @@ void xmen_sprite_callback(running_machine *machine, int *code,int *color,int *pr if (pri <= layerpri[2]) *priority_mask = 0; else if (pri > layerpri[2] && pri <= layerpri[1]) *priority_mask = 0xf0; else if (pri > layerpri[1] && pri <= layerpri[0]) *priority_mask = 0xf0|0xcc; - else *priority_mask = 0xf0|0xcc|0xaa; + else *priority_mask = 0xf0|0xcc|0xaa; *color = sprite_colorbase + (*color & 0x001f); } @@ -125,7 +125,7 @@ VIDEO_UPDATE( xmen ) VIDEO_UPDATE( xmen6p ) { - const device_config *left_screen = devtag_get_device(screen->machine, "lscreen"); + const device_config *left_screen = devtag_get_device(screen->machine, "lscreen"); const device_config *right_screen = devtag_get_device(screen->machine, "rscreen"); int x,y; diff --git a/src/mame/video/ygv608.c b/src/mame/video/ygv608.c index 210b03bffd3..2d738a59363 100644 --- a/src/mame/video/ygv608.c +++ b/src/mame/video/ygv608.c @@ -1065,7 +1065,7 @@ READ16_HANDLER( ygv608_r ) if (regNum == 50) { regNum = 0; - logerror( "warning: rn=50 after read increment\n" ); + logerror( "warning: rn=50 after read increment\n" ); } ygv608.ports.s.p5 &= ~p5_rn; ygv608.ports.s.p5 |= regNum; diff --git a/src/osd/osdcomm.h b/src/osd/osdcomm.h index d9065cf217b..661b1d0ae14 100644 --- a/src/osd/osdcomm.h +++ b/src/osd/osdcomm.h @@ -161,7 +161,7 @@ __extension__ typedef signed long long INT64; #endif #ifndef FALSE -#define FALSE 0 +#define FALSE 0 #endif diff --git a/src/osd/osdcore.h b/src/osd/osdcore.h index 0563c6b58c6..91811eea9fc 100644 --- a/src/osd/osdcore.h +++ b/src/osd/osdcore.h @@ -66,7 +66,7 @@ #define OPEN_FLAG_WRITE 0x0002 /* open for write */ #define OPEN_FLAG_CREATE 0x0004 /* create & truncate file */ #define OPEN_FLAG_CREATE_PATHS 0x0008 /* create paths as necessary */ -#define OPEN_FLAG_NO_PRELOAD 0x0010 /* do not decompress on open */ +#define OPEN_FLAG_NO_PRELOAD 0x0010 /* do not decompress on open */ /* error codes returned by routines below */ enum _file_error @@ -283,7 +283,7 @@ typedef struct _osd_directory_entry osd_directory_entry; struct _osd_directory_entry { const char * name; /* name of the entry */ - osd_dir_entry_type type; /* type of the entry */ + osd_dir_entry_type type; /* type of the entry */ UINT64 size; /* size of the entry */ }; diff --git a/src/osd/windows/debugwin.c b/src/osd/windows/debugwin.c index cae7aa64c4e..28abcb151db 100644 --- a/src/osd/windows/debugwin.c +++ b/src/osd/windows/debugwin.c @@ -387,8 +387,8 @@ void debugwin_init_windows(void) WNDCLASS wc = { 0 }; // initialize the description of the window class - wc.lpszClassName = TEXT("MAMEDebugWindow"); - wc.hInstance = GetModuleHandle(NULL); + wc.lpszClassName = TEXT("MAMEDebugWindow"); + wc.hInstance = GetModuleHandle(NULL); wc.lpfnWndProc = debugwin_window_proc; wc.hCursor = LoadCursor(NULL, IDC_ARROW); wc.hIcon = LoadIcon(NULL, IDI_APPLICATION); @@ -403,7 +403,7 @@ void debugwin_init_windows(void) fatalerror("Unable to register debug window class"); // initialize the description of the view class - wc.lpszClassName = TEXT("MAMEDebugView"); + wc.lpszClassName = TEXT("MAMEDebugView"); wc.lpfnWndProc = debugwin_view_proc; // register the class; fail if we can't @@ -1446,7 +1446,7 @@ static LRESULT CALLBACK debugwin_view_proc(HWND wnd, UINT message, WPARAM wparam debug_view_set_cursor_position(info->view, newpos); SetFocus(wnd); } - break; + break; } // hscroll diff --git a/src/osd/windows/drawd3d.c b/src/osd/windows/drawd3d.c index 8f84161a84c..4a061224157 100644 --- a/src/osd/windows/drawd3d.c +++ b/src/osd/windows/drawd3d.c @@ -150,7 +150,7 @@ struct _d3d_vertex { float x, y, z; // X,Y,Z coordinates float rhw; // 1/W coordinate - D3DCOLOR color; // diffuse color + D3DCOLOR color; // diffuse color float u0, v0; // texture stage 0 coordinates }; @@ -1790,7 +1790,7 @@ static texture_info *texture_create(d3d_info *d3d, const render_texinfo *texsour scheight = texture->rawheight * texture->yprescale; // target surfaces typically cannot be YCbCr, so we always pick RGB in that case - finalfmt = (format != d3d->yuv_format) ? format : D3DFMT_A8R8G8B8; + finalfmt = (format != d3d->yuv_format) ? format : D3DFMT_A8R8G8B8; result = (*d3dintf->device.create_texture)(d3d->device, scwidth, scheight, 1, D3DUSAGE_RENDERTARGET, finalfmt, D3DPOOL_DEFAULT, &texture->d3dfinaltex); if (result == D3D_OK) break; diff --git a/src/osd/windows/drawdd.c b/src/osd/windows/drawdd.c index bc1ef2c1272..f8e2884a02d 100644 --- a/src/osd/windows/drawdd.c +++ b/src/osd/windows/drawdd.c @@ -134,10 +134,10 @@ typedef struct _mode_enum_info mode_enum_info; struct _mode_enum_info { win_window_info * window; - INT32 minimum_width, minimum_height; - INT32 target_width, target_height; + INT32 minimum_width, minimum_height; + INT32 target_width, target_height; double target_refresh; - float best_score; + float best_score; }; @@ -406,7 +406,7 @@ static int drawdd_window_draw(win_window_info *window, HDC dc, int update) // based on the target format, use one of our standard renderers switch (dd->blitdesc.ddpfPixelFormat.dwRBitMask) { - case 0x00ff0000: drawdd_rgb888_draw_primitives(window->primlist->head, dd->membuffer, dd->blitwidth, dd->blitheight, dd->blitwidth); break; + case 0x00ff0000: drawdd_rgb888_draw_primitives(window->primlist->head, dd->membuffer, dd->blitwidth, dd->blitheight, dd->blitwidth); break; case 0x000000ff: drawdd_bgr888_draw_primitives(window->primlist->head, dd->membuffer, dd->blitwidth, dd->blitheight, dd->blitwidth); break; case 0xf800: drawdd_rgb565_draw_primitives(window->primlist->head, dd->membuffer, dd->blitwidth, dd->blitheight, dd->blitwidth); break; case 0x7c00: drawdd_rgb555_draw_primitives(window->primlist->head, dd->membuffer, dd->blitwidth, dd->blitheight, dd->blitwidth); break; @@ -442,7 +442,7 @@ static int drawdd_window_draw(win_window_info *window, HDC dc, int update) // based on the target format, use one of our standard renderers switch (dd->blitdesc.ddpfPixelFormat.dwRBitMask) { - case 0x00ff0000: drawdd_rgb888_nr_draw_primitives(window->primlist->head, dd->blitdesc.lpSurface, dd->blitwidth, dd->blitheight, dd->blitdesc.lPitch / 4); break; + case 0x00ff0000: drawdd_rgb888_nr_draw_primitives(window->primlist->head, dd->blitdesc.lpSurface, dd->blitwidth, dd->blitheight, dd->blitdesc.lPitch / 4); break; case 0x000000ff: drawdd_bgr888_nr_draw_primitives(window->primlist->head, dd->blitdesc.lpSurface, dd->blitwidth, dd->blitheight, dd->blitdesc.lPitch / 4); break; case 0xf800: drawdd_rgb565_nr_draw_primitives(window->primlist->head, dd->blitdesc.lpSurface, dd->blitwidth, dd->blitheight, dd->blitdesc.lPitch / 2); break; case 0x7c00: drawdd_rgb555_nr_draw_primitives(window->primlist->head, dd->blitdesc.lpSurface, dd->blitwidth, dd->blitheight, dd->blitdesc.lPitch / 2); break; diff --git a/src/osd/windows/input.c b/src/osd/windows/input.c index 3dd2824e544..3140f0816e8 100644 --- a/src/osd/windows/input.c +++ b/src/osd/windows/input.c @@ -216,7 +216,7 @@ static int dinput_version; // RawInput variables static get_rawinput_device_list_ptr get_rawinput_device_list; -static get_rawinput_data_ptr get_rawinput_data; +static get_rawinput_data_ptr get_rawinput_data; static get_rawinput_device_info_ptr get_rawinput_device_info; static register_rawinput_devices_ptr register_rawinput_devices; @@ -229,7 +229,7 @@ static UINT8 mouse_enabled; static device_info * mouse_list; // lightgun states -static UINT8 lightgun_shared_axis_mode; +static UINT8 lightgun_shared_axis_mode; static UINT8 lightgun_enabled; static device_info * lightgun_list; @@ -313,113 +313,113 @@ static const TCHAR *default_pov_name(int which); static const int win_key_trans_table[][4] = { // MAME key dinput key virtual key ascii - { ITEM_ID_ESC, DIK_ESCAPE, VK_ESCAPE, 27 }, - { ITEM_ID_1, DIK_1, '1', '1' }, - { ITEM_ID_2, DIK_2, '2', '2' }, - { ITEM_ID_3, DIK_3, '3', '3' }, - { ITEM_ID_4, DIK_4, '4', '4' }, - { ITEM_ID_5, DIK_5, '5', '5' }, - { ITEM_ID_6, DIK_6, '6', '6' }, - { ITEM_ID_7, DIK_7, '7', '7' }, - { ITEM_ID_8, DIK_8, '8', '8' }, - { ITEM_ID_9, DIK_9, '9', '9' }, - { ITEM_ID_0, DIK_0, '0', '0' }, - { ITEM_ID_MINUS, DIK_MINUS, VK_OEM_MINUS, '-' }, - { ITEM_ID_EQUALS, DIK_EQUALS, VK_OEM_PLUS, '=' }, - { ITEM_ID_BACKSPACE, DIK_BACK, VK_BACK, 8 }, - { ITEM_ID_TAB, DIK_TAB, VK_TAB, 9 }, - { ITEM_ID_Q, DIK_Q, 'Q', 'Q' }, - { ITEM_ID_W, DIK_W, 'W', 'W' }, - { ITEM_ID_E, DIK_E, 'E', 'E' }, - { ITEM_ID_R, DIK_R, 'R', 'R' }, - { ITEM_ID_T, DIK_T, 'T', 'T' }, - { ITEM_ID_Y, DIK_Y, 'Y', 'Y' }, - { ITEM_ID_U, DIK_U, 'U', 'U' }, - { ITEM_ID_I, DIK_I, 'I', 'I' }, - { ITEM_ID_O, DIK_O, 'O', 'O' }, - { ITEM_ID_P, DIK_P, 'P', 'P' }, - { ITEM_ID_OPENBRACE, DIK_LBRACKET, VK_OEM_4, '[' }, - { ITEM_ID_CLOSEBRACE, DIK_RBRACKET, VK_OEM_6, ']' }, - { ITEM_ID_ENTER, DIK_RETURN, VK_RETURN, 13 }, - { ITEM_ID_LCONTROL, DIK_LCONTROL, VK_LCONTROL, 0 }, - { ITEM_ID_A, DIK_A, 'A', 'A' }, - { ITEM_ID_S, DIK_S, 'S', 'S' }, - { ITEM_ID_D, DIK_D, 'D', 'D' }, - { ITEM_ID_F, DIK_F, 'F', 'F' }, - { ITEM_ID_G, DIK_G, 'G', 'G' }, - { ITEM_ID_H, DIK_H, 'H', 'H' }, - { ITEM_ID_J, DIK_J, 'J', 'J' }, - { ITEM_ID_K, DIK_K, 'K', 'K' }, - { ITEM_ID_L, DIK_L, 'L', 'L' }, - { ITEM_ID_COLON, DIK_SEMICOLON, VK_OEM_1, ';' }, - { ITEM_ID_QUOTE, DIK_APOSTROPHE, VK_OEM_7, '\'' }, - { ITEM_ID_TILDE, DIK_GRAVE, VK_OEM_3, '`' }, - { ITEM_ID_LSHIFT, DIK_LSHIFT, VK_LSHIFT, 0 }, - { ITEM_ID_BACKSLASH, DIK_BACKSLASH, VK_OEM_5, '\\' }, - { ITEM_ID_Z, DIK_Z, 'Z', 'Z' }, - { ITEM_ID_X, DIK_X, 'X', 'X' }, - { ITEM_ID_C, DIK_C, 'C', 'C' }, - { ITEM_ID_V, DIK_V, 'V', 'V' }, - { ITEM_ID_B, DIK_B, 'B', 'B' }, - { ITEM_ID_N, DIK_N, 'N', 'N' }, - { ITEM_ID_M, DIK_M, 'M', 'M' }, - { ITEM_ID_COMMA, DIK_COMMA, VK_OEM_COMMA, ',' }, + { ITEM_ID_ESC, DIK_ESCAPE, VK_ESCAPE, 27 }, + { ITEM_ID_1, DIK_1, '1', '1' }, + { ITEM_ID_2, DIK_2, '2', '2' }, + { ITEM_ID_3, DIK_3, '3', '3' }, + { ITEM_ID_4, DIK_4, '4', '4' }, + { ITEM_ID_5, DIK_5, '5', '5' }, + { ITEM_ID_6, DIK_6, '6', '6' }, + { ITEM_ID_7, DIK_7, '7', '7' }, + { ITEM_ID_8, DIK_8, '8', '8' }, + { ITEM_ID_9, DIK_9, '9', '9' }, + { ITEM_ID_0, DIK_0, '0', '0' }, + { ITEM_ID_MINUS, DIK_MINUS, VK_OEM_MINUS, '-' }, + { ITEM_ID_EQUALS, DIK_EQUALS, VK_OEM_PLUS, '=' }, + { ITEM_ID_BACKSPACE, DIK_BACK, VK_BACK, 8 }, + { ITEM_ID_TAB, DIK_TAB, VK_TAB, 9 }, + { ITEM_ID_Q, DIK_Q, 'Q', 'Q' }, + { ITEM_ID_W, DIK_W, 'W', 'W' }, + { ITEM_ID_E, DIK_E, 'E', 'E' }, + { ITEM_ID_R, DIK_R, 'R', 'R' }, + { ITEM_ID_T, DIK_T, 'T', 'T' }, + { ITEM_ID_Y, DIK_Y, 'Y', 'Y' }, + { ITEM_ID_U, DIK_U, 'U', 'U' }, + { ITEM_ID_I, DIK_I, 'I', 'I' }, + { ITEM_ID_O, DIK_O, 'O', 'O' }, + { ITEM_ID_P, DIK_P, 'P', 'P' }, + { ITEM_ID_OPENBRACE, DIK_LBRACKET, VK_OEM_4, '[' }, + { ITEM_ID_CLOSEBRACE, DIK_RBRACKET, VK_OEM_6, ']' }, + { ITEM_ID_ENTER, DIK_RETURN, VK_RETURN, 13 }, + { ITEM_ID_LCONTROL, DIK_LCONTROL, VK_LCONTROL, 0 }, + { ITEM_ID_A, DIK_A, 'A', 'A' }, + { ITEM_ID_S, DIK_S, 'S', 'S' }, + { ITEM_ID_D, DIK_D, 'D', 'D' }, + { ITEM_ID_F, DIK_F, 'F', 'F' }, + { ITEM_ID_G, DIK_G, 'G', 'G' }, + { ITEM_ID_H, DIK_H, 'H', 'H' }, + { ITEM_ID_J, DIK_J, 'J', 'J' }, + { ITEM_ID_K, DIK_K, 'K', 'K' }, + { ITEM_ID_L, DIK_L, 'L', 'L' }, + { ITEM_ID_COLON, DIK_SEMICOLON, VK_OEM_1, ';' }, + { ITEM_ID_QUOTE, DIK_APOSTROPHE, VK_OEM_7, '\'' }, + { ITEM_ID_TILDE, DIK_GRAVE, VK_OEM_3, '`' }, + { ITEM_ID_LSHIFT, DIK_LSHIFT, VK_LSHIFT, 0 }, + { ITEM_ID_BACKSLASH, DIK_BACKSLASH, VK_OEM_5, '\\' }, + { ITEM_ID_Z, DIK_Z, 'Z', 'Z' }, + { ITEM_ID_X, DIK_X, 'X', 'X' }, + { ITEM_ID_C, DIK_C, 'C', 'C' }, + { ITEM_ID_V, DIK_V, 'V', 'V' }, + { ITEM_ID_B, DIK_B, 'B', 'B' }, + { ITEM_ID_N, DIK_N, 'N', 'N' }, + { ITEM_ID_M, DIK_M, 'M', 'M' }, + { ITEM_ID_COMMA, DIK_COMMA, VK_OEM_COMMA, ',' }, { ITEM_ID_STOP, DIK_PERIOD, VK_OEM_PERIOD, '.' }, - { ITEM_ID_SLASH, DIK_SLASH, VK_OEM_2, '/' }, - { ITEM_ID_RSHIFT, DIK_RSHIFT, VK_RSHIFT, 0 }, - { ITEM_ID_ASTERISK, DIK_MULTIPLY, VK_MULTIPLY, '*' }, - { ITEM_ID_LALT, DIK_LMENU, VK_LMENU, 0 }, - { ITEM_ID_SPACE, DIK_SPACE, VK_SPACE, ' ' }, - { ITEM_ID_CAPSLOCK, DIK_CAPITAL, VK_CAPITAL, 0 }, - { ITEM_ID_F1, DIK_F1, VK_F1, 0 }, - { ITEM_ID_F2, DIK_F2, VK_F2, 0 }, - { ITEM_ID_F3, DIK_F3, VK_F3, 0 }, - { ITEM_ID_F4, DIK_F4, VK_F4, 0 }, - { ITEM_ID_F5, DIK_F5, VK_F5, 0 }, - { ITEM_ID_F6, DIK_F6, VK_F6, 0 }, - { ITEM_ID_F7, DIK_F7, VK_F7, 0 }, - { ITEM_ID_F8, DIK_F8, VK_F8, 0 }, - { ITEM_ID_F9, DIK_F9, VK_F9, 0 }, - { ITEM_ID_F10, DIK_F10, VK_F10, 0 }, - { ITEM_ID_NUMLOCK, DIK_NUMLOCK, VK_NUMLOCK, 0 }, - { ITEM_ID_SCRLOCK, DIK_SCROLL, VK_SCROLL, 0 }, - { ITEM_ID_7_PAD, DIK_NUMPAD7, VK_NUMPAD7, 0 }, - { ITEM_ID_8_PAD, DIK_NUMPAD8, VK_NUMPAD8, 0 }, - { ITEM_ID_9_PAD, DIK_NUMPAD9, VK_NUMPAD9, 0 }, - { ITEM_ID_MINUS_PAD, DIK_SUBTRACT, VK_SUBTRACT, 0 }, - { ITEM_ID_4_PAD, DIK_NUMPAD4, VK_NUMPAD4, 0 }, - { ITEM_ID_5_PAD, DIK_NUMPAD5, VK_NUMPAD5, 0 }, - { ITEM_ID_6_PAD, DIK_NUMPAD6, VK_NUMPAD6, 0 }, + { ITEM_ID_SLASH, DIK_SLASH, VK_OEM_2, '/' }, + { ITEM_ID_RSHIFT, DIK_RSHIFT, VK_RSHIFT, 0 }, + { ITEM_ID_ASTERISK, DIK_MULTIPLY, VK_MULTIPLY, '*' }, + { ITEM_ID_LALT, DIK_LMENU, VK_LMENU, 0 }, + { ITEM_ID_SPACE, DIK_SPACE, VK_SPACE, ' ' }, + { ITEM_ID_CAPSLOCK, DIK_CAPITAL, VK_CAPITAL, 0 }, + { ITEM_ID_F1, DIK_F1, VK_F1, 0 }, + { ITEM_ID_F2, DIK_F2, VK_F2, 0 }, + { ITEM_ID_F3, DIK_F3, VK_F3, 0 }, + { ITEM_ID_F4, DIK_F4, VK_F4, 0 }, + { ITEM_ID_F5, DIK_F5, VK_F5, 0 }, + { ITEM_ID_F6, DIK_F6, VK_F6, 0 }, + { ITEM_ID_F7, DIK_F7, VK_F7, 0 }, + { ITEM_ID_F8, DIK_F8, VK_F8, 0 }, + { ITEM_ID_F9, DIK_F9, VK_F9, 0 }, + { ITEM_ID_F10, DIK_F10, VK_F10, 0 }, + { ITEM_ID_NUMLOCK, DIK_NUMLOCK, VK_NUMLOCK, 0 }, + { ITEM_ID_SCRLOCK, DIK_SCROLL, VK_SCROLL, 0 }, + { ITEM_ID_7_PAD, DIK_NUMPAD7, VK_NUMPAD7, 0 }, + { ITEM_ID_8_PAD, DIK_NUMPAD8, VK_NUMPAD8, 0 }, + { ITEM_ID_9_PAD, DIK_NUMPAD9, VK_NUMPAD9, 0 }, + { ITEM_ID_MINUS_PAD, DIK_SUBTRACT, VK_SUBTRACT, 0 }, + { ITEM_ID_4_PAD, DIK_NUMPAD4, VK_NUMPAD4, 0 }, + { ITEM_ID_5_PAD, DIK_NUMPAD5, VK_NUMPAD5, 0 }, + { ITEM_ID_6_PAD, DIK_NUMPAD6, VK_NUMPAD6, 0 }, { ITEM_ID_PLUS_PAD, DIK_ADD, VK_ADD, 0 }, - { ITEM_ID_1_PAD, DIK_NUMPAD1, VK_NUMPAD1, 0 }, - { ITEM_ID_2_PAD, DIK_NUMPAD2, VK_NUMPAD2, 0 }, - { ITEM_ID_3_PAD, DIK_NUMPAD3, VK_NUMPAD3, 0 }, - { ITEM_ID_0_PAD, DIK_NUMPAD0, VK_NUMPAD0, 0 }, - { ITEM_ID_DEL_PAD, DIK_DECIMAL, VK_DECIMAL, 0 }, - { ITEM_ID_F11, DIK_F11, VK_F11, 0 }, - { ITEM_ID_F12, DIK_F12, VK_F12, 0 }, - { ITEM_ID_F13, DIK_F13, VK_F13, 0 }, - { ITEM_ID_F14, DIK_F14, VK_F14, 0 }, - { ITEM_ID_F15, DIK_F15, VK_F15, 0 }, - { ITEM_ID_ENTER_PAD, DIK_NUMPADENTER, VK_RETURN, 0 }, - { ITEM_ID_RCONTROL, DIK_RCONTROL, VK_RCONTROL, 0 }, - { ITEM_ID_SLASH_PAD, DIK_DIVIDE, VK_DIVIDE, 0 }, - { ITEM_ID_PRTSCR, DIK_SYSRQ, 0, 0 }, - { ITEM_ID_RALT, DIK_RMENU, VK_RMENU, 0 }, - { ITEM_ID_HOME, DIK_HOME, VK_HOME, 0 }, - { ITEM_ID_UP, DIK_UP, VK_UP, 0 }, - { ITEM_ID_PGUP, DIK_PRIOR, VK_PRIOR, 0 }, - { ITEM_ID_LEFT, DIK_LEFT, VK_LEFT, 0 }, - { ITEM_ID_RIGHT, DIK_RIGHT, VK_RIGHT, 0 }, - { ITEM_ID_END, DIK_END, VK_END, 0 }, - { ITEM_ID_DOWN, DIK_DOWN, VK_DOWN, 0 }, - { ITEM_ID_PGDN, DIK_NEXT, VK_NEXT, 0 }, - { ITEM_ID_INSERT, DIK_INSERT, VK_INSERT, 0 }, - { ITEM_ID_DEL, DIK_DELETE, VK_DELETE, 0 }, - { ITEM_ID_LWIN, DIK_LWIN, VK_LWIN, 0 }, - { ITEM_ID_RWIN, DIK_RWIN, VK_RWIN, 0 }, - { ITEM_ID_MENU, DIK_APPS, VK_APPS, 0 }, - { ITEM_ID_PAUSE, DIK_PAUSE, VK_PAUSE, 0 }, + { ITEM_ID_1_PAD, DIK_NUMPAD1, VK_NUMPAD1, 0 }, + { ITEM_ID_2_PAD, DIK_NUMPAD2, VK_NUMPAD2, 0 }, + { ITEM_ID_3_PAD, DIK_NUMPAD3, VK_NUMPAD3, 0 }, + { ITEM_ID_0_PAD, DIK_NUMPAD0, VK_NUMPAD0, 0 }, + { ITEM_ID_DEL_PAD, DIK_DECIMAL, VK_DECIMAL, 0 }, + { ITEM_ID_F11, DIK_F11, VK_F11, 0 }, + { ITEM_ID_F12, DIK_F12, VK_F12, 0 }, + { ITEM_ID_F13, DIK_F13, VK_F13, 0 }, + { ITEM_ID_F14, DIK_F14, VK_F14, 0 }, + { ITEM_ID_F15, DIK_F15, VK_F15, 0 }, + { ITEM_ID_ENTER_PAD, DIK_NUMPADENTER, VK_RETURN, 0 }, + { ITEM_ID_RCONTROL, DIK_RCONTROL, VK_RCONTROL, 0 }, + { ITEM_ID_SLASH_PAD, DIK_DIVIDE, VK_DIVIDE, 0 }, + { ITEM_ID_PRTSCR, DIK_SYSRQ, 0, 0 }, + { ITEM_ID_RALT, DIK_RMENU, VK_RMENU, 0 }, + { ITEM_ID_HOME, DIK_HOME, VK_HOME, 0 }, + { ITEM_ID_UP, DIK_UP, VK_UP, 0 }, + { ITEM_ID_PGUP, DIK_PRIOR, VK_PRIOR, 0 }, + { ITEM_ID_LEFT, DIK_LEFT, VK_LEFT, 0 }, + { ITEM_ID_RIGHT, DIK_RIGHT, VK_RIGHT, 0 }, + { ITEM_ID_END, DIK_END, VK_END, 0 }, + { ITEM_ID_DOWN, DIK_DOWN, VK_DOWN, 0 }, + { ITEM_ID_PGDN, DIK_NEXT, VK_NEXT, 0 }, + { ITEM_ID_INSERT, DIK_INSERT, VK_INSERT, 0 }, + { ITEM_ID_DEL, DIK_DELETE, VK_DELETE, 0 }, + { ITEM_ID_LWIN, DIK_LWIN, VK_LWIN, 0 }, + { ITEM_ID_RWIN, DIK_RWIN, VK_RWIN, 0 }, + { ITEM_ID_MENU, DIK_APPS, VK_APPS, 0 }, + { ITEM_ID_PAUSE, DIK_PAUSE, VK_PAUSE, 0 }, { ITEM_ID_CANCEL, 0, VK_CANCEL, 0 }, // New keys introduced in Windows 2000. These have no MAME codes to @@ -1418,8 +1418,8 @@ static BOOL CALLBACK dinput_mouse_enum(LPCDIDEVICEINSTANCE instance, LPVOID ref) // set relative mode on the mouse device result = dinput_set_dword_property(devinfo->dinput.device, DIPROP_AXISMODE, 0, DIPH_DEVICE, DIPROPAXISMODE_REL); if (result != DI_OK) - { - mame_printf_error("DirectInput: Unable to set relative mode for mouse %d (%s)\n", generic_device_index(mouse_list, devinfo), devinfo->name); + { + mame_printf_error("DirectInput: Unable to set relative mode for mouse %d (%s)\n", generic_device_index(mouse_list, devinfo), devinfo->name); goto error; } @@ -1511,18 +1511,18 @@ static BOOL CALLBACK dinput_joystick_enum(LPCDIDEVICEINSTANCE instance, LPVOID r // set absolute mode result = dinput_set_dword_property(devinfo->dinput.device, DIPROP_AXISMODE, 0, DIPH_DEVICE, DIPROPAXISMODE_ABS); - if (result != DI_OK) - mame_printf_warning("DirectInput: Unable to set absolute mode for joystick %d (%s)\n", generic_device_index(joystick_list, devinfo), devinfo->name); + if (result != DI_OK) + mame_printf_warning("DirectInput: Unable to set absolute mode for joystick %d (%s)\n", generic_device_index(joystick_list, devinfo), devinfo->name); // turn off deadzone; we do our own calculations result = dinput_set_dword_property(devinfo->dinput.device, DIPROP_DEADZONE, 0, DIPH_DEVICE, 0); - if (result != DI_OK) - mame_printf_warning("DirectInput: Unable to reset deadzone for joystick %d (%s)\n", generic_device_index(joystick_list, devinfo), devinfo->name); + if (result != DI_OK) + mame_printf_warning("DirectInput: Unable to reset deadzone for joystick %d (%s)\n", generic_device_index(joystick_list, devinfo), devinfo->name); // turn off saturation; we do our own calculations result = dinput_set_dword_property(devinfo->dinput.device, DIPROP_SATURATION, 0, DIPH_DEVICE, 10000); - if (result != DI_OK) - mame_printf_warning("DirectInput: Unable to reset saturation for joystick %d (%s)\n", generic_device_index(joystick_list, devinfo), devinfo->name); + if (result != DI_OK) + mame_printf_warning("DirectInput: Unable to reset saturation for joystick %d (%s)\n", generic_device_index(joystick_list, devinfo), devinfo->name); // cap the number of axes, POVs, and buttons based on the format devinfo->dinput.caps.dwAxes = MIN(devinfo->dinput.caps.dwAxes, 8); @@ -1545,8 +1545,8 @@ static BOOL CALLBACK dinput_joystick_enum(LPCDIDEVICEINSTANCE instance, LPVOID r dipr.diph.dwObj = offsetof(DIJOYSTATE2, lX) + axisnum * sizeof(LONG); dipr.diph.dwHow = DIPH_BYOFFSET; result = IDirectInputDevice_GetProperty(devinfo->dinput.device, DIPROP_RANGE, &dipr.diph); - if (result != DI_OK) - continue; + if (result != DI_OK) + continue; devinfo->joystick.rangemin[axisnum] = dipr.lMin; devinfo->joystick.rangemax[axisnum] = dipr.lMax; diff --git a/src/osd/windows/ledutil.c b/src/osd/windows/ledutil.c index 9478eec5d3a..f699527ce89 100644 --- a/src/osd/windows/ledutil.c +++ b/src/osd/windows/ledutil.c @@ -123,7 +123,7 @@ typedef void running_machine; #define KEYBOARD_SCROLL_LOCK_ON 1 #define KEYBOARD_NUM_LOCK_ON 2 -#define KEYBOARD_CAPS_LOCK_ON 4 +#define KEYBOARD_CAPS_LOCK_ON 4 @@ -307,8 +307,8 @@ static int create_window_class(void) WNDCLASS wc = { 0 }; // initialize the description of the window class - wc.lpszClassName = WINDOW_CLASS; - wc.hInstance = GetModuleHandle(NULL); + wc.lpszClassName = WINDOW_CLASS; + wc.hInstance = GetModuleHandle(NULL); wc.lpfnWndProc = listener_window_proc; // register the class; fail if we can't diff --git a/src/osd/windows/output.c b/src/osd/windows/output.c index bc69dd732cf..4629dcd886c 100644 --- a/src/osd/windows/output.c +++ b/src/osd/windows/output.c @@ -201,8 +201,8 @@ static int create_window_class(void) WNDCLASS wc = { 0 }; // initialize the description of the window class - wc.lpszClassName = OUTPUT_WINDOW_CLASS; - wc.hInstance = GetModuleHandle(NULL); + wc.lpszClassName = OUTPUT_WINDOW_CLASS; + wc.hInstance = GetModuleHandle(NULL); wc.lpfnWndProc = output_window_proc; // register the class; fail if we can't diff --git a/src/osd/windows/vconv.c b/src/osd/windows/vconv.c index 40538fee36f..dbbe49d1211 100644 --- a/src/osd/windows/vconv.c +++ b/src/osd/windows/vconv.c @@ -131,7 +131,7 @@ static const translation_info ld_translate[] = { 0, "-l*", "*.lib" }, { 0, "-o*", "/out:*" }, { 0, "-Wl,-Map,*", "/map:*" }, - { 0, "-Wl,--allow-multiple-definition", "/force:multiple" }, + { 0, "-Wl,--allow-multiple-definition", "/force:multiple" }, { 0, "-Wl,--warn-common", "" }, { 0, "-mno-cygwin", "" }, { 0, "-s", "" }, diff --git a/src/osd/windows/window.c b/src/osd/windows/window.c index 8e1d697dec3..64a1cb20f64 100644 --- a/src/osd/windows/window.c +++ b/src/osd/windows/window.c @@ -834,8 +834,8 @@ static void create_window_class(void) WNDCLASS wc = { 0 }; // initialize the description of the window class - wc.lpszClassName = TEXT("MAME"); - wc.hInstance = GetModuleHandle(NULL); + wc.lpszClassName = TEXT("MAME"); + wc.hInstance = GetModuleHandle(NULL); #ifdef MESS wc.lpfnWndProc = win_mess_window_proc; #else @@ -1218,8 +1218,8 @@ LRESULT CALLBACK winwindow_video_window_proc(HWND wnd, UINT message, WPARAM wpar PAINTSTRUCT pstruct; HDC hdc = BeginPaint(wnd, &pstruct); draw_video_contents(window, hdc, TRUE); - if (win_has_menu(window)) - DrawMenuBar(window->hwnd); + if (win_has_menu(window)) + DrawMenuBar(window->hwnd); EndPaint(wnd, &pstruct); break; } diff --git a/src/osd/windows/windows.mak b/src/osd/windows/windows.mak index b8ea71f6ff5..483dee3597f 100644 --- a/src/osd/windows/windows.mak +++ b/src/osd/windows/windows.mak @@ -315,7 +315,7 @@ OSDOBJS += $(WINOBJ)/d3d8intf.o endif # extra dependencies -$(WINOBJ)/drawdd.o : $(SRC)/emu/rendersw.c +$(WINOBJ)/drawdd.o : $(SRC)/emu/rendersw.c $(WINOBJ)/drawgdi.o : $(SRC)/emu/rendersw.c # add debug-specific files diff --git a/src/osd/windows/winfile.c b/src/osd/windows/winfile.c index a74d4a0912e..5bc4c6f8ed1 100644 --- a/src/osd/windows/winfile.c +++ b/src/osd/windows/winfile.c @@ -60,7 +60,7 @@ struct _osd_file { HANDLE handle; - TCHAR filename[1]; + TCHAR filename[1]; }; @@ -314,18 +314,18 @@ int osd_get_physical_drive_geometry(const char *filename, UINT32 *cylinders, UIN return FALSE; // store the results - *cylinders = (UINT32)dg.Cylinders.QuadPart; - *heads = dg.TracksPerCylinder; - *sectors = dg.SectorsPerTrack; - *bps = dg.BytesPerSector; - - // normalize - while (*heads > 16 && !(*heads & 1)) - { - *heads /= 2; - *cylinders *= 2; - } - return TRUE; + *cylinders = (UINT32)dg.Cylinders.QuadPart; + *heads = dg.TracksPerCylinder; + *sectors = dg.SectorsPerTrack; + *bps = dg.BytesPerSector; + + // normalize + while (*heads > 16 && !(*heads & 1)) + { + *heads /= 2; + *cylinders *= 2; + } + return TRUE; } diff --git a/src/osd/windows/winmain.c b/src/osd/windows/winmain.c index 138fed1ce73..41064c858f3 100644 --- a/src/osd/windows/winmain.c +++ b/src/osd/windows/winmain.c @@ -523,13 +523,13 @@ static LONG CALLBACK exception_filter(struct _EXCEPTION_POINTERS *info) { EXCEPTION_FLT_STACK_CHECK, "FLOAT STACK CHECK" }, { EXCEPTION_FLT_UNDERFLOW, "FLOAT UNDERFLOW" }, { EXCEPTION_INT_DIVIDE_BY_ZERO, "INTEGER DIVIDE BY ZERO" }, - { EXCEPTION_INT_OVERFLOW, "INTEGER OVERFLOW" }, - { EXCEPTION_PRIV_INSTRUCTION, "PRIVILEGED INSTRUCTION" }, - { EXCEPTION_IN_PAGE_ERROR, "IN PAGE ERROR" }, - { EXCEPTION_ILLEGAL_INSTRUCTION, "ILLEGAL INSTRUCTION" }, + { EXCEPTION_INT_OVERFLOW, "INTEGER OVERFLOW" }, + { EXCEPTION_PRIV_INSTRUCTION, "PRIVILEGED INSTRUCTION" }, + { EXCEPTION_IN_PAGE_ERROR, "IN PAGE ERROR" }, + { EXCEPTION_ILLEGAL_INSTRUCTION, "ILLEGAL INSTRUCTION" }, { EXCEPTION_NONCONTINUABLE_EXCEPTION,"NONCONTINUABLE EXCEPTION" }, { EXCEPTION_STACK_OVERFLOW, "STACK OVERFLOW" }, - { EXCEPTION_INVALID_DISPOSITION, "INVALID DISPOSITION" }, + { EXCEPTION_INVALID_DISPOSITION, "INVALID DISPOSITION" }, { EXCEPTION_GUARD_PAGE, "GUARD PAGE VIOLATION" }, { EXCEPTION_INVALID_HANDLE, "INVALID HANDLE" }, { 0, "UNKNOWN EXCEPTION" } diff --git a/src/osd/windows/winwork.c b/src/osd/windows/winwork.c index 7c827d3a31f..71380144007 100644 --- a/src/osd/windows/winwork.c +++ b/src/osd/windows/winwork.c @@ -110,10 +110,10 @@ struct _scalable_lock #if USE_SCALABLE_LOCKS struct { - volatile INT32 haslock; // do we have the lock? + volatile INT32 haslock; // do we have the lock? INT32 filler[64/4-1]; // assumes a 64-byte cache line } slot[WORK_MAX_THREADS]; // one slot per thread - volatile INT32 nextindex; // index of next slot to use + volatile INT32 nextindex; // index of next slot to use #else CRITICAL_SECTION section; #endif @@ -140,7 +140,7 @@ struct _work_thread_info struct _osd_work_queue { - scalable_lock lock; // lock for protecting the queue + scalable_lock lock; // lock for protecting the queue osd_work_item * volatile list; // list of items in the queue osd_work_item ** volatile tailptr; // pointer to the tail pointer of work items in the queue osd_work_item * volatile free; // free list of work items @@ -166,7 +166,7 @@ struct _osd_work_item { osd_work_item * next; // pointer to next item osd_work_queue * queue; // pointer back to the owning queue - osd_work_callback callback; // callback function + osd_work_callback callback; // callback function void * param; // callback parameter void * result; // callback result HANDLE event; // event signalled when complete diff --git a/src/tools/chdman.c b/src/tools/chdman.c index 3554e0d8cc2..ac056554a59 100644 --- a/src/tools/chdman.c +++ b/src/tools/chdman.c @@ -1078,7 +1078,7 @@ static int do_createav(int argc, char *argv[], int param) rate = info->audio_samplerate; totalframes = info->video_numsamples; } - numframes = MIN(totalframes - firstframe, numframes); + numframes = MIN(totalframes - firstframe, numframes); /* print some of it */ printf("Use frames: %d-%d\n", firstframe, firstframe + numframes - 1); @@ -1484,7 +1484,7 @@ static int do_extract(int argc, char *argv[], int param) } /* write the hunk to the file */ - bytes_to_write = MIN(bytesremaining, header->hunkbytes); + bytes_to_write = MIN(bytesremaining, header->hunkbytes); core_fseek(outfile, (UINT64)hunknum * (UINT64)header->hunkbytes, SEEK_SET); byteswritten = core_fwrite(outfile, hunk, bytes_to_write); if (byteswritten != bytes_to_write) @@ -3316,7 +3316,7 @@ int CLIB_DECL main(int argc, char **argv) } option_list[] = { { "-createhd", do_createhd, 0 }, - { "-createuncomphd", do_createhd_uncomp, 0 }, + { "-createuncomphd", do_createhd_uncomp, 0 }, { "-createraw", do_createraw, 0 }, { "-createcd", do_createcd, 0 }, { "-createblankhd", do_createblankhd, 0 }, diff --git a/src/tools/ldverify.c b/src/tools/ldverify.c index 9ae06299d87..0e250698fdc 100644 --- a/src/tools/ldverify.c +++ b/src/tools/ldverify.c @@ -433,7 +433,7 @@ static void verify_video(video_info *video, int frame, bitmap_t *bitmap) /* print an update every 10000 frames */ if (framenum != 0 && framenum % 10000 == 0) - printf("%6d.%d: detected frame %d\n", frame, fieldnum, framenum); + printf("%6d.%d: detected frame %d\n", frame, fieldnum, framenum); /* if this frame is not consecutive, it's an error */ if (video->last_frame != -1 && framenum != video->last_frame + 1) @@ -444,7 +444,7 @@ static void verify_video(video_info *video, int frame, bitmap_t *bitmap) /* if we've seen a white flag before, but it's not here, warn */ if (video->first_whitefield != -1 && !metadata.white) - printf("%6d.%d: detected frame number but no white flag (WARNING)\n", frame, fieldnum); + printf("%6d.%d: detected frame number but no white flag (WARNING)\n", frame, fieldnum); } /* is the whiteflag set? */ @@ -459,7 +459,7 @@ static void verify_video(video_info *video, int frame, bitmap_t *bitmap) /* if we've seen frame numbers before, but not here, warn */ if (video->last_frame != -1 && (metadata.line1718 & VBI_MASK_CAV_PICTURE) != VBI_CODE_CAV_PICTURE) - printf("%6d.%d: detected white flag but no frame number (WARNING)\n", frame, fieldnum); + printf("%6d.%d: detected white flag but no frame number (WARNING)\n", frame, fieldnum); } /* if this is the start of a frame, handle cadence */ diff --git a/src/tools/regrep.c b/src/tools/regrep.c index ca359f362d2..6409c822418 100644 --- a/src/tools/regrep.c +++ b/src/tools/regrep.c @@ -103,7 +103,7 @@ struct _summary_list summary_list * next; summary_file * files; char * dir; - char version[40]; + char version[40]; }; diff --git a/src/tools/unidasm.c b/src/tools/unidasm.c index a0ec77d78e1..459b5c7cf22 100644 --- a/src/tools/unidasm.c +++ b/src/tools/unidasm.c @@ -298,7 +298,7 @@ static const dasm_table_entry dasm_table[] = { "s2650", _8bit, 0, CPU_DISASSEMBLE_NAME(s2650) }, { "saturn", _8bit, 0, CPU_DISASSEMBLE_NAME(saturn) }, { "sc61860", _8bit, 0, CPU_DISASSEMBLE_NAME(sc61860) }, - { "scmp", _8bit, 0, CPU_DISASSEMBLE_NAME(scmp) }, + { "scmp", _8bit, 0, CPU_DISASSEMBLE_NAME(scmp) }, { "se3208", _16le, 0, CPU_DISASSEMBLE_NAME(se3208) }, { "sh2", _16be, 0, CPU_DISASSEMBLE_NAME(sh2) }, { "sh4", _16le, 0, CPU_DISASSEMBLE_NAME(sh4) }, |