diff options
Diffstat (limited to 'src/mess/machine/68561mpcc.c')
-rw-r--r-- | src/mess/machine/68561mpcc.c | 38 |
1 files changed, 19 insertions, 19 deletions
diff --git a/src/mess/machine/68561mpcc.c b/src/mess/machine/68561mpcc.c index 487b4d4abd4..ef29f95a98d 100644 --- a/src/mess/machine/68561mpcc.c +++ b/src/mess/machine/68561mpcc.c @@ -19,9 +19,9 @@ const device_type MPCC68561 = &device_creator<mpcc68561_t>; PARAMETERS ***************************************************************************/ -#define LOG_MPCC (1) +#define LOG_MPCC (1) -#if 0 // future +#if 0 // future /*************************************************************************** IMPLEMENTATION @@ -253,10 +253,10 @@ void mpcc68561_t::putreg(int ch, UINT8 data) switch (reg) { - case 0: // command register + case 0: // command register switch ((data >> 3) & 7) { - case 1: // select high registers (handled elsewhere) + case 1: // select high registers (handled elsewhere) break; case 2: // reset external and status IRQs @@ -268,7 +268,7 @@ void mpcc68561_t::putreg(int ch, UINT8 data) updateirqs(); break; - case 0: // nothing + case 0: // nothing case 3: // send SDLC abort case 4: // enable IRQ on next Rx byte case 6: // reset errors @@ -279,7 +279,7 @@ void mpcc68561_t::putreg(int ch, UINT8 data) } break; - case 1: // Tx/Rx IRQ and data transfer mode defintion + case 1: // Tx/Rx IRQ and data transfer mode defintion pChan->extIRQEnable = (data & 1); pChan->txIRQEnable = (data & 2) ? 1 : 0; pChan->rxIRQEnable = (data >> 3) & 3; @@ -301,7 +301,7 @@ void mpcc68561_t::putreg(int ch, UINT8 data) if (pChan->txEnable) { - pChan->reg_val[0] |= 0x04; // Tx empty + pChan->reg_val[0] |= 0x04; // Tx empty } break; @@ -317,10 +317,10 @@ void mpcc68561_t::putreg(int ch, UINT8 data) // channel reset command switch ((data>>6) & 3) { - case 0: // do nothing + case 0: // do nothing break; - case 1: // reset channel B + case 1: // reset channel B resetchannel(0); break; @@ -339,14 +339,14 @@ void mpcc68561_t::putreg(int ch, UINT8 data) } break; - case 10: // misc transmitter/receiver control bits - case 11: // clock mode control - case 12: // lower byte of baud rate gen - case 13: // upper byte of baud rate gen + case 10: // misc transmitter/receiver control bits + case 11: // clock mode control + case 12: // lower byte of baud rate gen + case 13: // upper byte of baud rate gen break; - case 14: // misc control bits - if (data & 0x01) // baud rate generator enable? + case 14: // misc control bits + if (data & 0x01) // baud rate generator enable? { int brconst = pChan->reg_val[13]<<8 | pChan->reg_val[14]; int rate = clock() / brconst; @@ -355,7 +355,7 @@ void mpcc68561_t::putreg(int ch, UINT8 data) } break; - case 15: // external/status interrupt control + case 15: // external/status interrupt control pChan->baudIRQEnable = (data & 2) ? 1 : 0; pChan->DCDEnable = (data & 8) ? 1 : 0; pChan->CTSEnable = (data & 0x20) ? 1 : 0; @@ -469,10 +469,10 @@ WRITE8_MEMBER( mpcc68561_t::reg_w ) if (pChan->reg_val[14] & 0x10) { pChan->rxData = data; - pChan->reg_val[0] |= 0x01; // Rx character available + pChan->reg_val[0] |= 0x01; // Rx character available } - pChan->reg_val[1] |= 0x01; // All sent - pChan->reg_val[0] |= 0x04; // Tx empty + pChan->reg_val[1] |= 0x01; // All sent + pChan->reg_val[0] |= 0x04; // Tx empty pChan->txUnderrun = 1; pChan->txIRQPending = 1; updateirqs(); |