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-rw-r--r--src/mame/machine/namco68.cpp37
-rw-r--r--src/mame/machine/namco68.h9
-rw-r--r--src/mame/machine/namcoic.cpp26
-rw-r--r--src/mame/machine/namcos1.cpp3
-rw-r--r--src/mame/machine/namcos2.cpp8
5 files changed, 48 insertions, 35 deletions
diff --git a/src/mame/machine/namco68.cpp b/src/mame/machine/namco68.cpp
index 571002f87e6..9cb340c18a1 100644
--- a/src/mame/machine/namco68.cpp
+++ b/src/mame/machine/namco68.cpp
@@ -2,9 +2,9 @@
// copyright-holders:David Haywood, K.Wilkins
/*
+
TODO:
-output support, Golly Ghost is currently hacking this based on DPRAM in the namcos2.cpp driver side!
-some of this can likely be moved into the actual MCU core too
+output support
*/
@@ -17,7 +17,6 @@ namcoc68_device::namcoc68_device(const machine_config &mconfig, const char *tag,
device_t(mconfig, NAMCOC68, tag, owner, clock),
m_mcu(*this, "mcu"),
m_in_pb_cb(*this),
- m_in_pb2_cb(*this),
m_in_pc_cb(*this),
m_in_ph_cb(*this),
m_in_pdsw_cb(*this),
@@ -30,14 +29,30 @@ namcoc68_device::namcoc68_device(const machine_config &mconfig, const char *tag,
ROM_START( namcoc68 )
ROM_REGION( 0x8000, "mcu", 0 )
- ROM_LOAD( "c68.3d", 0x000000, 0x008000, CRC(ca64550a) SHA1(38d1ad1b1287cadef0c999aff9357927315f8e6b) )
+ ROM_LOAD( "c68.bin", 0x000000, 0x008000, CRC(ca64550a) SHA1(38d1ad1b1287cadef0c999aff9357927315f8e6b) ) // usually position 3d, but device really needs a way to specify it
ROM_END
-
+// C68 looks like a drop-in replacement for C65, so the port mappings must be scrambled in one instance, since this already has a multiplex on the port, assume here
READ8_MEMBER(namcoc68_device::c68_p5_r)
{
- return (m_player_mux) ? m_in_pb2_cb() : m_in_pb_cb();
+ uint16_t ret = (m_in_ph_cb() << 8) | m_in_pb_cb();
+
+ if (m_player_mux)
+ {
+ return bitswap<8>(ret, 6, 8, 10, 12, 4, 2, 0, 14);
+ }
+ else
+ {
+ return bitswap<8>(ret, 7, 9, 11, 13, 5, 3, 1, 15);
+ }
+}
+
+READ8_MEMBER(namcoc68_device::mcuc_r)
+{
+ uint8_t ret = m_in_pc_cb();
+ ret = bitswap<8>(ret, 3, 2, 1, 0, 7, 6, 5, 4);
+ return ret;
}
WRITE8_MEMBER(namcoc68_device::c68_p3_w)
@@ -61,6 +76,11 @@ WRITE8_MEMBER(namcoc68_device::dpram_byte_w)
m_dp_out(offset,data);
}
+READ8_MEMBER(namcoc68_device::unk_r)
+{
+ return 0x00;
+}
+
void namcoc68_device::c68_default_am(address_map &map)
{
/* input ports and dips are mapped here */
@@ -79,16 +99,15 @@ void namcoc68_device::device_add_mconfig(machine_config &config)
m3745x_device* device = &M37450(config, m_mcu, DERIVED_CLOCK(1, 1)); // ugly, needs modernizing
MCFG_M3745X_ADC14_CALLBACKS(READ8(*this, namcoc68_device, mcuan0_r), READ8(*this, namcoc68_device, mcuan1_r), READ8(*this, namcoc68_device, mcuan2_r), READ8(*this, namcoc68_device, mcuan3_r))
MCFG_M3745X_ADC58_CALLBACKS(READ8(*this, namcoc68_device, mcuan4_r), READ8(*this, namcoc68_device, mcuan5_r), READ8(*this, namcoc68_device, mcuan6_r), READ8(*this, namcoc68_device, mcuan7_r))
- MCFG_M3745X_PORT3_CALLBACKS(READ8(*this, namcoc68_device, mcuh_r), WRITE8(*this, namcoc68_device, c68_p3_w)) // coins/test/service
+ MCFG_M3745X_PORT3_CALLBACKS(READ8(*this, namcoc68_device, mcuc_r), WRITE8(*this, namcoc68_device, c68_p3_w)) // coins/test/service
MCFG_M3745X_PORT5_CALLBACKS(READ8(*this, namcoc68_device, c68_p5_r), NOOP) // muxed player 1/2
- MCFG_M3745X_PORT6_CALLBACKS(READ8(*this, namcoc68_device, mcuc_r), NOOP) // unused in sgunner2
+ MCFG_M3745X_PORT6_CALLBACKS(READ8(*this, namcoc68_device, unk_r), NOOP) // unused in sgunner2
MCFG_DEVICE_PROGRAM_MAP(c68_default_am)
}
void namcoc68_device::device_resolve_objects()
{
m_in_pb_cb.resolve_safe(0xff);
- m_in_pb2_cb.resolve_safe(0xff);
m_in_pc_cb.resolve_safe(0xff);
m_in_ph_cb.resolve_safe(0xff);
m_in_pdsw_cb.resolve_safe(0xff);
diff --git a/src/mame/machine/namco68.h b/src/mame/machine/namco68.h
index 98136cc9ffb..4d976afebe9 100644
--- a/src/mame/machine/namco68.h
+++ b/src/mame/machine/namco68.h
@@ -18,7 +18,6 @@ public:
namcoc68_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
auto in_pb_callback() { return m_in_pb_cb.bind(); }
- auto in_pb2_callback() { return m_in_pb2_cb.bind(); }
auto in_pc_callback() { return m_in_pc_cb.bind(); }
auto in_ph_callback() { return m_in_ph_cb.bind(); }
@@ -57,7 +56,6 @@ private:
required_device<m37450_device> m_mcu;
devcb_read8 m_in_pb_cb;
- devcb_read8 m_in_pb2_cb;
devcb_read8 m_in_pc_cb;
devcb_read8 m_in_ph_cb;
@@ -76,12 +74,9 @@ private:
DECLARE_READ8_MEMBER(dpram_byte_r);
DECLARE_WRITE8_MEMBER(dpram_byte_w);
- DECLARE_READ8_MEMBER(mcub_r) { return m_in_pb_cb(); }
- DECLARE_READ8_MEMBER(mcub2_r) { return m_in_pb2_cb(); }
+ DECLARE_READ8_MEMBER(unk_r);
+ DECLARE_READ8_MEMBER(mcuc_r);
-
- DECLARE_READ8_MEMBER(mcuc_r) { return m_in_pc_cb(); }
- DECLARE_READ8_MEMBER(mcuh_r) { return m_in_ph_cb(); }
DECLARE_READ8_MEMBER(mcudsw_r) { return m_in_pdsw_cb(); }
DECLARE_READ8_MEMBER(mcudi0_r) { return m_port_dial_in_cb[0](); }
diff --git a/src/mame/machine/namcoic.cpp b/src/mame/machine/namcoic.cpp
index bfb3ea1e192..602eef2801d 100644
--- a/src/mame/machine/namcoic.cpp
+++ b/src/mame/machine/namcoic.cpp
@@ -792,11 +792,12 @@ READ16_MEMBER( namcos2_shared_state::c355_obj_ram_r )
* Graphics ROM addressing varies across games.
*/
template<int Which>
-TILE_GET_INFO_MEMBER( namcos2_shared_state::c169_roz_get_info )
+TILE_GET_INFO_MEMBER(namcos2_shared_state::c169_roz_get_info)
{
- int tile, mask;
- m_c169_cb( m_c169_roz_videoram[tile_index] & 0x3fff, &tile, &mask, Which );
- tileinfo.mask_data = m_c169_roz_mask + 32*mask;
+ int tile = 0, mask = 0;
+ m_c169_cb(m_c169_roz_videoram[tile_index&m_c169_roz_rammask] & 0x3fff, &tile, &mask, Which);
+
+ tileinfo.mask_data = m_c169_roz_mask + 32 * mask;
SET_TILE_INFO_MEMBER(m_c169_roz_gfxbank, tile, 0/*color*/, 0/*flag*/);
}
@@ -809,19 +810,20 @@ void namcos2_shared_state::c169_roz_init(int gfxbank, const char *maskregion, c1
{
m_c169_roz_gfxbank = gfxbank;
m_c169_roz_mask = memregion(maskregion)->base();
+ m_c169_roz_rammask = (m_c169_roz_videoram.bytes() / 2) - 1; // are the tilemap sizes just too big? if we don't mask with this c169_roz_get_info reads out of bounds.
m_c169_cb = tilemap_cb;
m_c169_roz_tilemap[0] = &machine().tilemap().create(*m_gfxdecode,
- tilemap_get_info_delegate(FUNC(namcos2_shared_state::c169_roz_get_info<0>), this),
- tilemap_mapper_delegate(FUNC(namcos2_shared_state::c169_roz_mapper), this),
- 16,16,
- 256,256);
+ tilemap_get_info_delegate(FUNC(namcos2_shared_state::c169_roz_get_info<0>), this),
+ tilemap_mapper_delegate(FUNC(namcos2_shared_state::c169_roz_mapper), this),
+ 16, 16,
+ 256, 256);
m_c169_roz_tilemap[1] = &machine().tilemap().create(*m_gfxdecode,
- tilemap_get_info_delegate(FUNC(namcos2_shared_state::c169_roz_get_info<1>), this),
- tilemap_mapper_delegate(FUNC(namcos2_shared_state::c169_roz_mapper), this),
- 16,16,
- 256,256);
+ tilemap_get_info_delegate(FUNC(namcos2_shared_state::c169_roz_get_info<1>), this),
+ tilemap_mapper_delegate(FUNC(namcos2_shared_state::c169_roz_mapper), this),
+ 16, 16,
+ 256, 256);
save_item(NAME(m_c169_roz_control));
}
diff --git a/src/mame/machine/namcos1.cpp b/src/mame/machine/namcos1.cpp
index db1111b8ec8..627e2a8222c 100644
--- a/src/mame/machine/namcos1.cpp
+++ b/src/mame/machine/namcos1.cpp
@@ -455,7 +455,8 @@ READ8_MEMBER( namcos1_state::key_type3_r )
if (op == m_key_bottom4) return (offset << 4) | (m_key[m_key_swap4_arg] & 0x0f);
if (op == m_key_top4) return (offset << 4) | (m_key[m_key_swap4_arg] >> 4);
- popmessage("%s: keychip read %04x", machine().describe_context(), offset);
+ // rompers triggers this between certain stages, check if values are used, it might still need the above mapping properly in the game init
+ logerror("%s: unhandled keychip read %04x", machine().describe_context(), offset);
return 0;
}
diff --git a/src/mame/machine/namcos2.cpp b/src/mame/machine/namcos2.cpp
index e743a344eb4..e1057f066d5 100644
--- a/src/mame/machine/namcos2.cpp
+++ b/src/mame/machine/namcos2.cpp
@@ -107,13 +107,9 @@ WRITE8_MEMBER(namcos2_shared_state::system_reset_w)
void namcos2_shared_state::reset_all_subcpus(int state)
{
m_slave->set_input_line(INPUT_LINE_RESET, state);
- if (m_c68new)
+ if (m_c68)
{
- m_c68new->ext_reset(state);
- }
- else if (m_mcu)
- {
- m_mcu->set_input_line(INPUT_LINE_RESET, state);
+ m_c68->ext_reset(state);
}
else if (m_c65)
{