summaryrefslogtreecommitdiffstatshomepage
path: root/src/mame/machine/tnzs.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/mame/machine/tnzs.c')
-rw-r--r--src/mame/machine/tnzs.c36
1 files changed, 4 insertions, 32 deletions
diff --git a/src/mame/machine/tnzs.c b/src/mame/machine/tnzs.c
index 8ad694a77d9..28b382c59d7 100644
--- a/src/mame/machine/tnzs.c
+++ b/src/mame/machine/tnzs.c
@@ -16,31 +16,6 @@
#include "cpu/mcs48/mcs48.h"
#include "includes/tnzs.h"
-READ8_MEMBER(tnzs_state::tnzs_ramrom_bank_r)
-{
- // the first 2 banks would correspond to the fixed section of ROM, since this is
- // a waste of time the hardware maps 2 banks of RAM there instead.
- if (m_bank1<2)
- {
- return m_bankedram[m_bank1 * 0x4000 + offset];
- }
- else
- {
- return m_ROM[m_bank1 * 0x4000 + offset];
- }
-}
-
-WRITE8_MEMBER(tnzs_state::tnzs_ramrom_bank_w)
-{
- if (m_bank1<2)
- {
- m_bankedram[m_bank1 * 0x4000 + offset] = data;
- }
- else
- {
- // illegal write to ROM
- }
-}
READ8_MEMBER(tnzs_state::mcu_tnzs_r)
@@ -668,21 +643,18 @@ void tnzs_state::tnzs_postload()
}
-MACHINE_START_MEMBER(tnzs_state,jpopnics)
+MACHINE_START_MEMBER(tnzs_state,tnzs_common)
{
UINT8 *SUB = memregion("sub")->base();
m_ROM = memregion("maincpu")->base();
- m_bankedram = auto_alloc_array(machine(), UINT8, 0x8000); // 2 banks of 0x4000
membank("subbank")->configure_entries(0, 4, &SUB[0x08000], 0x2000);
membank("subbank")->set_entry(m_bank2);
- m_bank1 = 2;
m_bank2 = 0;
+ m_mainbank->set_bank(2);
- save_pointer(NAME(m_bankedram), 0x8000);
save_item(NAME(m_screenflip));
- save_item(NAME(m_bank1));
save_item(NAME(m_bank2));
machine().save().register_postload(save_prepost_delegate(FUNC(tnzs_state::tnzs_postload), this));
@@ -690,7 +662,7 @@ MACHINE_START_MEMBER(tnzs_state,jpopnics)
MACHINE_START_MEMBER(tnzs_state,tnzs)
{
- MACHINE_START_CALL_MEMBER( jpopnics );
+ MACHINE_START_CALL_MEMBER( tnzs_common );
save_item(NAME(m_kageki_csport_sel));
save_item(NAME(m_input_select));
@@ -719,7 +691,7 @@ WRITE8_MEMBER(tnzs_state::tnzs_ramrom_bankswitch_w)
m_subcpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
/* bits 0-2 select RAM/ROM bank */
- m_bank1 = data & 0x07;
+ m_mainbank->set_bank(data & 0x07);
}
WRITE8_MEMBER(tnzs_state::tnzs_bankswitch1_w)