diff options
Diffstat (limited to 'src/mame/machine/beezer.c')
-rw-r--r-- | src/mame/machine/beezer.c | 88 |
1 files changed, 44 insertions, 44 deletions
diff --git a/src/mame/machine/beezer.c b/src/mame/machine/beezer.c index 4a84fd0289d..2b0eacda364 100644 --- a/src/mame/machine/beezer.c +++ b/src/mame/machine/beezer.c @@ -22,28 +22,28 @@ static WRITE8_DEVICE_HANDLER( b_via_1_pb_w ); /* VIA 0 (aka "PPCNP74", U6 @1C on schematics) - enabled at CE00-CFFF of main m6809 cpu when bankswitch is set to 0 - port A: - bit 7: input, X from banking latch (d3 of banking register) - bit 6: input, Y from banking latch (d4 of banking register) - bit 5: input, Z from banking latch (d5 of banking register) - bit 4: N/C - bit 3: output, /RESET for audio subcpu - bit 2: output, /ENABLE for LS139@2H for reading control and dipswitch inputs to pbus - bit 1: output, MSb of selector for inputs to pbus - bit 0: output, LSb of " - port B: - bits 7-0: input/output: pbus - port C: - CA1: N/C - CA2: input: "TDISP" (one of the higher bits in the video line counter, a mirror of the D5 bit from beezer_line_r), done in /video/beezer.c - CB1: ASH1 to via 1 - CB2: ASH2 to via 1 - /IRQ: to main m6809 cpu - /RES: from main reset generator/watchdog/button - - TODO: find a better way to attach ca2 read to beezer_line_r - */ + enabled at CE00-CFFF of main m6809 cpu when bankswitch is set to 0 + port A: + bit 7: input, X from banking latch (d3 of banking register) + bit 6: input, Y from banking latch (d4 of banking register) + bit 5: input, Z from banking latch (d5 of banking register) + bit 4: N/C + bit 3: output, /RESET for audio subcpu + bit 2: output, /ENABLE for LS139@2H for reading control and dipswitch inputs to pbus + bit 1: output, MSb of selector for inputs to pbus + bit 0: output, LSb of " + port B: + bits 7-0: input/output: pbus + port C: + CA1: N/C + CA2: input: "TDISP" (one of the higher bits in the video line counter, a mirror of the D5 bit from beezer_line_r), done in /video/beezer.c + CB1: ASH1 to via 1 + CB2: ASH2 to via 1 + /IRQ: to main m6809 cpu + /RES: from main reset generator/watchdog/button + + TODO: find a better way to attach ca2 read to beezer_line_r + */ const via6522_interface b_via_0_interface = { /*inputs : A/B */ DEVCB_HANDLER(b_via_0_pa_r), DEVCB_HANDLER(b_via_0_pb_r), @@ -54,28 +54,28 @@ const via6522_interface b_via_0_interface = }; /* VIA 1 (U18 @3C on schematics) - port A: - bits 7-0: input/output: pbus - port B: - bit 7: output: TIMER1 OUT (used to gate NOISE (see below) to clock channel 1 of 6840, plus acts as channel 0 by itself) - bit 6: input: NOISE (from mn5837 14-bit LFSR, which also connects to clock above) - bit 5: output?: N/C - bit 4: output?: FMSEL1 (does not appear elsewhere on schematics! what does this do? needs tracing) - bit 3: output?: FMSEL0 (does not appear elsewhere on schematics! what does this do? needs tracing) - bit 2: output?: AM (does not appear elsewhere on schematics! what does this do? needs tracing) - bit 1: output: FM or AM (appears to control some sort of suppression or filtering change of the post-DAC amplifier when enabled, only during the TIMER1 OUT time-slot of the multiplexer, see page 1B 3-3 of schematics) - bit 0: output?: DMOD DISABLE (does not appear elsewhere on schematics! what does this do? needs tracing) - port C: - CA1: AHS2 from via 0 (are these two switched?) - CA2: AHS1 from via 0 " - CB1: ??put: DMOD CLR (does not appear elsewhere on schematics! what does this do? needs tracing) - CB2: ??put: DMOD DATA (does not appear elsewhere on schematics! what does this do? needs tracing) - /IRQ: to audio/sub m6809 cpu - /RES: from audio reset bit of via 0 - - TODO: the entirety of port B, much needs tracing - TODO: ports CB1 and CB2, need tracing; ports CA1 and CA2 could use verify as well - */ + port A: + bits 7-0: input/output: pbus + port B: + bit 7: output: TIMER1 OUT (used to gate NOISE (see below) to clock channel 1 of 6840, plus acts as channel 0 by itself) + bit 6: input: NOISE (from mn5837 14-bit LFSR, which also connects to clock above) + bit 5: output?: N/C + bit 4: output?: FMSEL1 (does not appear elsewhere on schematics! what does this do? needs tracing) + bit 3: output?: FMSEL0 (does not appear elsewhere on schematics! what does this do? needs tracing) + bit 2: output?: AM (does not appear elsewhere on schematics! what does this do? needs tracing) + bit 1: output: FM or AM (appears to control some sort of suppression or filtering change of the post-DAC amplifier when enabled, only during the TIMER1 OUT time-slot of the multiplexer, see page 1B 3-3 of schematics) + bit 0: output?: DMOD DISABLE (does not appear elsewhere on schematics! what does this do? needs tracing) + port C: + CA1: AHS2 from via 0 (are these two switched?) + CA2: AHS1 from via 0 " + CB1: ??put: DMOD CLR (does not appear elsewhere on schematics! what does this do? needs tracing) + CB2: ??put: DMOD DATA (does not appear elsewhere on schematics! what does this do? needs tracing) + /IRQ: to audio/sub m6809 cpu + /RES: from audio reset bit of via 0 + + TODO: the entirety of port B, much needs tracing + TODO: ports CB1 and CB2, need tracing; ports CA1 and CA2 could use verify as well + */ const via6522_interface b_via_1_interface = { /*inputs : A/B */ DEVCB_HANDLER(b_via_1_pa_r), DEVCB_HANDLER(b_via_1_pb_r), |