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Diffstat (limited to 'src/mame/heathzenith/h89.cpp')
-rw-r--r--src/mame/heathzenith/h89.cpp198
1 files changed, 119 insertions, 79 deletions
diff --git a/src/mame/heathzenith/h89.cpp b/src/mame/heathzenith/h89.cpp
index 48bd30a59b5..0eb0995a38d 100644
--- a/src/mame/heathzenith/h89.cpp
+++ b/src/mame/heathzenith/h89.cpp
@@ -68,11 +68,19 @@
// Single Step
#define LOG_SS (1U << 1)
+#define LOG_SETUP (1U << 2)
-#define VERBOSE (0)
+#define VERBOSE (LOG_SETUP)
#include "logmacro.h"
#define LOGSS(...) LOGMASKED(LOG_SS, __VA_ARGS__)
+#define LOGSETUP(...) LOGMASKED(LOG_SETUP, __VA_ARGS__)
+
+#ifdef _MSC_VER
+#define FUNCNAME __func__
+#else
+#define FUNCNAME __PRETTY_FUNCTION__
+#endif
namespace {
@@ -83,19 +91,19 @@ namespace {
class h89_base_state : public driver_device
{
protected:
- h89_base_state(const machine_config &mconfig, device_type type, const char *tag):
- driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu"),
- m_maincpu_region(*this, "maincpu"),
- m_mem_view(*this, "rom_bank"),
- m_ram(*this, RAM_TAG),
- m_floppy_ram(*this, "floppyram"),
- m_tlbc(*this, "tlbc"),
- m_intr_socket(*this, "intr_socket"),
- m_h89bus(*this, "h89bus"),
- m_console(*this, "console"),
- m_config(*this, "CONFIG"),
- m_sw501(*this, "SW501")
+ h89_base_state(const machine_config &mconfig, device_type type, const char *tag)
+ : driver_device(mconfig, type, tag)
+ , m_maincpu(*this, "maincpu")
+ , m_maincpu_region(*this, "maincpu")
+ , m_mem_view(*this, "rom_bank")
+ , m_ram(*this, RAM_TAG)
+ , m_floppy_ram(*this, "floppyram")
+ , m_tlbc(*this, "tlbc")
+ , m_intr_socket(*this, "intr_socket")
+ , m_h89bus(*this, "h89bus")
+ , m_console(*this, "console")
+ , m_config(*this, "CONFIG")
+ , m_sw501(*this, "SW501")
{
}
@@ -128,6 +136,8 @@ protected:
u32 m_cpu_speed_multiplier;
+ bool m_installed;
+
// Clocks
static constexpr XTAL H89_CLOCK = XTAL(12'288'000) / 6;
static constexpr XTAL INS8250_CLOCK = XTAL(1'843'200);
@@ -142,7 +152,8 @@ protected:
void update_mem_view();
void update_gpp(u8 gpp);
- void port_f2_w(offs_t offset, u8 data);
+ void port_f2_w(u8 data);
+ u8 read_sw();
virtual void machine_start() override ATTR_COLD;
virtual void machine_reset() override ATTR_COLD;
@@ -174,15 +185,15 @@ protected:
/**
* Heathkit H88
- * - BIOS MTR-88
+ * - ROM MTR-88
* - H-88-5 Cassette Interface Board
*
*/
class h88_state : public h89_base_state
{
public:
- h88_state(const machine_config &mconfig, device_type type, const char *tag):
- h89_base_state(mconfig, type, tag)
+ h88_state(const machine_config &mconfig, device_type type, const char *tag)
+ : h89_base_state(mconfig, type, tag)
{
}
@@ -198,8 +209,8 @@ public:
class h89_state : public h89_base_state
{
public:
- h89_state(const machine_config &mconfig, device_type type, const char *tag):
- h89_base_state(mconfig, type, tag)
+ h89_state(const machine_config &mconfig, device_type type, const char *tag)
+ : h89_base_state(mconfig, type, tag)
{
}
@@ -209,8 +220,8 @@ public:
class h89_cdr_state : public h89_base_state
{
public:
- h89_cdr_state(const machine_config &mconfig, device_type type, const char *tag):
- h89_base_state(mconfig, type, tag)
+ h89_cdr_state(const machine_config &mconfig, device_type type, const char *tag)
+ : h89_base_state(mconfig, type, tag)
{
}
@@ -240,8 +251,8 @@ public:
class h89_mms_state : public h89_base_state
{
public:
- h89_mms_state(const machine_config &mconfig, device_type type, const char *tag):
- h89_base_state(mconfig, type, tag)
+ h89_mms_state(const machine_config &mconfig, device_type type, const char *tag)
+ : h89_base_state(mconfig, type, tag)
{
}
@@ -343,36 +354,6 @@ u8 h89_base_state::m1_r(offs_t offset)
return data;
}
-/*
- PORT
- Use | Hex | Octal
- --------------------------+-------+---------
- Not specified, available | 0-77 | 0-167
- Disk I/O #1 | 78-7B | 170-173
- Disk I/O #2 | 7C-7F | 174-177
- Not specified, reserved | 80-CF | 200-317
- DCE Serial I/O | D0-D7 | 320-327
- DTE Serial I/O | D8-DF | 330-337
- DCE Serial I/O | EO-E7 | 340-347
- Console I/O | E8-EF | 350-357
- NMI | F0-F1 | 360-361
- General purpose port | F2 | 362
- Cassette I/O(MTR-88 only)| F8-F9 | 370-371
- NMI | FA-FB | 372-373
-
- Disk I/O #1 - 0170-0173 (0x78-0x7b)
- Heath Options
- - H37 5-1/4" Soft-sectored Controller - Requires MTR-90 ROM
- - H47 Dual 8" Drives - Requires MTR-89 or MTR-90 ROM
- - H67 8" Hard disk + 8" Floppy Drives - Requires MTR-90 ROM
-
- Disk I/O #2 - 0174-0177 (0x7c-0x7f)
- Heath Options
- - 5-1/4" Hard-sectored Controller - supported by all ROMs
- - H47 Dual 8" Drives - Requires MTR-89 or MTR-90 ROM
- - H67 8" Hard disk + 8" Floppy Drives - MTR-90 ROM
-
-*/
void h89_base_state::h89_base_io(address_map &map)
{
map.unmap_value_high();
@@ -669,6 +650,9 @@ void h89_base_state::machine_start()
save_item(NAME(m_555a_latch));
save_item(NAME(m_555b_latch));
save_item(NAME(m_556b_latch));
+ save_item(NAME(m_installed));
+
+ m_installed = false;
m_maincpu->space(AS_PROGRAM).specific(m_program);
@@ -715,8 +699,55 @@ void h89_base_state::machine_start()
m_floppy_ram_we = false;
}
+u8 h89_base_state::read_sw()
+{
+ return m_sw501->read();
+}
+
void h89_base_state::machine_reset()
{
+ if (!m_installed)
+ {
+ // Console/Terminal address
+ h89bus::addr_ranges term_ranges = m_h89bus->get_address_ranges(h89bus::IO_TERM);
+ if (term_ranges.size() == 1)
+ {
+ h89bus::addr_range range = term_ranges.front();
+
+ m_h89bus->install_io_device(range.first, range.second,
+ read8sm_delegate(*m_console, FUNC(ins8250_device::ins8250_r)),
+ write8sm_delegate(*m_console, FUNC(ins8250_device::ins8250_w)));
+ }
+
+ h89bus::addr_ranges nmi_ranges = m_h89bus->get_address_ranges(h89bus::IO_NMI);
+
+ // Multiple ranges cause a NMI interrupt to occur, loop through all.
+ for (h89bus::addr_range range : nmi_ranges)
+ {
+ m_h89bus->install_io_device(range.first, range.second,
+ read8smo_delegate(*this, FUNC(h89_base_state::raise_NMI_r)),
+ write8smo_delegate(*this, FUNC(h89_base_state::raise_NMI_w)));
+ }
+
+ h89bus::addr_ranges gpp_ranges = m_h89bus->get_address_ranges(h89bus::IO_GPP);
+
+ for (h89bus::addr_range range : gpp_ranges)
+ {
+ // check for the first single address, MMS piggy-backed on this select
+ // line, the proper one for the CPU board GPP port is a single address
+ if (range.first == range.second)
+ {
+ m_h89bus->install_io_device(range.first, range.second,
+ read8smo_delegate(*this, FUNC(h89_base_state::read_sw)),
+ write8smo_delegate(*this, FUNC(h89_base_state::port_f2_w)));
+
+ break;
+ }
+ }
+
+ m_installed = true;
+ }
+
m_rom_enabled = true;
m_timer_intr_enabled = true;
m_single_step_enabled = false;
@@ -785,7 +816,7 @@ void h89_base_state::console_intr(int data)
template <int line> void h89_base_state::slot_irq(int state)
{
- m_intr_socket->set_irq_level(line, state);
+ m_intr_socket->set_irq_level(line, state);
}
template void h89_base_state::slot_irq<3>(int state);
@@ -875,7 +906,7 @@ void h89_base_state::update_gpp(u8 gpp)
}
// General Purpose Port
-void h89_base_state::port_f2_w(offs_t offset, u8 data)
+void h89_base_state::port_f2_w(u8 data)
{
update_gpp(data);
@@ -907,7 +938,7 @@ static void intr_ctrl_options(device_slot_interface &device)
void h89_base_state::h89_left_cards(device_slot_interface &device)
{
- device.option_add("ss_parallel", H89BUS_SIGMASOFT_PARALLEL);
+ device.option_add("ss_parallel", H89BUS_SIGMASOFT_PARALLEL);
device.option_add("ss_parallel_igc", H89BUS_SIGMASOFT_PARALLEL_IGC).machine_config(
[this](device_t *device)
{
@@ -918,13 +949,12 @@ void h89_base_state::h89_left_cards(device_slot_interface &device)
void h89_base_state::h89_right_cards(device_slot_interface &device)
{
device.option_add("cdr_fdc", H89BUS_CDR_FDC_880H);
- device.option_add("h_88_3", H89BUS_H_88_3);
+ device.option_add("h_88_3", H89BUS_H_88_3);
device.option_add("ha_88_3", H89BUS_HA_88_3);
- device.option_add("h_88_5", H89BUS_H_88_5);
- device.option_add("ss_snd", H89BUS_SIGMASOFT_SND);
+ device.option_add("h_88_5", H89BUS_H_88_5);
+ device.option_add("ss_snd", H89BUS_SIGMASOFT_SND);
device.option_add("z_89_11", H89BUS_Z_89_11);
-
- device.option_add("z37fdc", H89BUS_Z37).machine_config(
+ device.option_add("z37fdc", H89BUS_Z37).machine_config(
[this](device_t *device)
{
downcast<h89bus_z37_device &>(*device).set_intr_cntrl(m_intr_socket);
@@ -943,12 +973,20 @@ void h89_base_state::h89_right_cards_mms(device_slot_interface &device)
void h89_base_state::h89_right_p506_cards(device_slot_interface &device)
{
- device.option_add("h_88_3", H89BUS_H_88_3);
- device.option_add("ha_88_3", H89BUS_HA_88_3);
- device.option_add("ss_snd", H89BUS_SIGMASOFT_SND);
+ device.option_add("h_88_3", H89BUS_H_88_3);
+ device.option_add("ha_88_3", H89BUS_HA_88_3);
+ device.option_add("ss_snd", H89BUS_SIGMASOFT_SND);
device.option_add("we_pullup", H89BUS_WE_PULLUP);
}
+static void io_decoder_options(device_slot_interface &device)
+{
+ device.option_add("444_43", H89BUS_IO_DECODER_444_43);
+ device.option_add("444_61", H89BUS_IO_DECODER_444_61);
+ device.option_add("mms_61c", H89BUS_IO_DECODER_MMS_61C);
+ device.option_add("cdr86", H89BUS_IO_DECODER_CDR_86);
+}
+
void h89_base_state::h89_base(machine_config &config)
{
config.set_default_layout(layout_h89);
@@ -983,12 +1021,6 @@ void h89_base_state::h89_base(machine_config &config)
H89BUS(config, m_h89bus, 0);
m_h89bus->set_program_space(m_maincpu, AS_PROGRAM);
m_h89bus->set_io_space(m_maincpu, AS_IO);
- m_h89bus->in_tlb_callback().set(m_console, FUNC(ins8250_device::ins8250_r));
- m_h89bus->out_tlb_callback().set(m_console, FUNC(ins8250_device::ins8250_w));
- m_h89bus->in_nmi_callback().set(FUNC(h89_base_state::raise_NMI_r));
- m_h89bus->out_nmi_callback().set(FUNC(h89_base_state::raise_NMI_w));
- m_h89bus->in_gpp_callback().set_ioport(m_sw501);
- m_h89bus->out_gpp_callback().set(FUNC(h89_base_state::port_f2_w));
m_h89bus->out_int3_callback().set(FUNC(h89_base_state::slot_irq<3>));
m_h89bus->out_int4_callback().set(FUNC(h89_base_state::slot_irq<4>));
m_h89bus->out_int5_callback().set(FUNC(h89_base_state::slot_irq<5>));
@@ -1008,40 +1040,45 @@ void h89_base_state::h89_base(machine_config &config)
void h88_state::h88(machine_config &config)
{
h89_base(config);
- m_h89bus->set_default_bios_tag("444-43");
m_intr_socket->set_default_option("original");
m_intr_socket->set_fixed(true);
H89BUS_RIGHT_SLOT(config.replace(), "p504", "h89bus", [this](device_slot_interface &device) { h89_right_cards(device); }, "h_88_5");
+
+ LOGSETUP("%s: about to call set_io_prom_tag\n", FUNCNAME);
+ H89BUS_IO_DECODER_SOCKET(config, "h89bus:io_decoder", io_decoder_options, "444_43");
}
void h89_state::h89(machine_config &config)
{
h89_base(config);
- m_h89bus->set_default_bios_tag("444-61");
m_intr_socket->set_default_option("h37");
m_intr_socket->set_fixed(true);
H89BUS_RIGHT_SLOT(config.replace(), "p504", "h89bus", [this](device_slot_interface &device) { h89_right_cards(device); }, "z37fdc");
+
+ LOGSETUP("%s: about to call set_io_prom_tag\n", FUNCNAME);
+ H89BUS_IO_DECODER_SOCKET(config, "h89bus:io_decoder", io_decoder_options, "444_61");
}
void h89_cdr_state::h89_cdr(machine_config &config)
{
h89_base(config);
- m_h89bus->set_default_bios_tag("cdr86");
m_intr_socket->set_default_option("original");
m_intr_socket->set_fixed(true);
H89BUS_RIGHT_SLOT(config.replace(), "p504", "h89bus", [this](device_slot_interface &device) { h89_right_cards(device); }, "cdr_fdc");
+
+ LOGSETUP("%s: about to call set_io_prom_tag\n", FUNCNAME);
+ H89BUS_IO_DECODER_SOCKET(config, "h89bus:io_decoder", io_decoder_options, "cdr86");
}
void h89_mms_state::h89_mms(machine_config &config)
{
h89_base(config);
- m_h89bus->set_default_bios_tag("444-61c");
// the card selection is different with the MMS mapping PROM
H89BUS_RIGHT_SLOT(config.replace(), "p504", "h89bus", [this](device_slot_interface &device) { h89_right_cards_mms(device); }, "mms77316");
@@ -1049,6 +1086,9 @@ void h89_mms_state::h89_mms(machine_config &config)
m_intr_socket->set_default_option("mms");
m_intr_socket->set_fixed(true);
+
+ LOGSETUP("%s: about to call set_io_prom_tag\n", FUNCNAME);
+ H89BUS_IO_DECODER_SOCKET(config, "h89bus:io_decoder", io_decoder_options, "mms_61c");
}
#define ROM_H17 \
@@ -1095,13 +1135,13 @@ void h89_mms_state::h89_mms(machine_config &config)
ROMX_LOAD("2732_sigma_rom_v_1.2.bin", 0x0000, 0x1000, CRC(c4ff47c5) SHA1(d6f3d71ff270a663003ec18a3ed1fa49f627123a), ROM_BIOS(x))
#define ROM_CDR_8390(x) \
- ROM_SYSTEM_BIOS(x, "cdr8390", "CDR 8390") \
- ROMX_LOAD("2732_cdr8390.u518", 0x0000, 0x1000, CRC(1d30fe43) SHA1(170092d1b62cf88edd29338b474e799c249a0dd7), ROM_BIOS(x))
+ ROM_SYSTEM_BIOS(x, "cdr8390", "CDR 8390") \
+ ROMX_LOAD("2732_cdr8390.u518", 0x0000, 0x1000, CRC(1d30fe43) SHA1(170092d1b62cf88edd29338b474e799c249a0dd7), ROM_BIOS(x))
// NOTE: this rom is not currently working
#define ROM_CDR_80B2(x) \
- ROM_SYSTEM_BIOS(x, "cdr80b2", "CDR 80B2") \
- ROMX_LOAD("2732_cdr80b2.u518", 0x0000, 0x1000, CRC(804a6898) SHA1(a58daca0baf7b5d7c1485531680bd63168eb2d7e), ROM_BIOS(x))
+ ROM_SYSTEM_BIOS(x, "cdr80b2", "CDR 80B2") \
+ ROMX_LOAD("2732_cdr80b2.u518", 0x0000, 0x1000, CRC(804a6898) SHA1(a58daca0baf7b5d7c1485531680bd63168eb2d7e), ROM_BIOS(x))
ROM_START( h88 )