summaryrefslogtreecommitdiffstatshomepage
path: root/src/mame/drivers/onyx.cpp
diff options
context:
space:
mode:
Diffstat (limited to 'src/mame/drivers/onyx.cpp')
-rw-r--r--src/mame/drivers/onyx.cpp51
1 files changed, 35 insertions, 16 deletions
diff --git a/src/mame/drivers/onyx.cpp b/src/mame/drivers/onyx.cpp
index 158a0809054..c8d3af9c5b4 100644
--- a/src/mame/drivers/onyx.cpp
+++ b/src/mame/drivers/onyx.cpp
@@ -51,14 +51,33 @@ public:
onyx_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
, m_maincpu(*this, "maincpu")
+ , m_sio1(*this, "sio1")
+ , m_sio2(*this, "sio2")
+ , m_sio3(*this, "sio3")
+ , m_sio4(*this, "sio4")
+ , m_sio5(*this, "sio5")
+ , m_ctc1(*this, "ctc1")
+ , m_ctc2(*this, "ctc2")
+ , m_ctc3(*this, "ctc3")
+ , m_pio1(*this, "pio1")
+ , m_pio2(*this, "pio2")
{ }
DECLARE_MACHINE_RESET(c8002);
void c8002(machine_config &config);
void c5000(machine_config &config);
+ void c5000_io(address_map &map);
+ void c5000_mem(address_map &map);
+ void c8002_io(address_map &map);
+ void c8002_mem(address_map &map);
+ void subio(address_map &map);
+ void submem(address_map &map);
private:
required_device<cpu_device> m_maincpu;
+ optional_device<z80sio_device> m_sio1, m_sio2, m_sio3, m_sio4, m_sio5;
+ optional_device<z80ctc_device> m_ctc1, m_ctc2, m_ctc3;
+ optional_device<z80pio_device> m_pio1, m_pio2;
};
@@ -71,7 +90,7 @@ MACHINE_RESET_MEMBER(onyx_state, c8002)
{
}
-static ADDRESS_MAP_START(c8002_mem, AS_PROGRAM, 16, onyx_state)
+ADDRESS_MAP_START(onyx_state::c8002_mem)
AM_RANGE(0x00000, 0x00fff) AM_ROM AM_SHARE("share0")
AM_RANGE(0x01000, 0x07fff) AM_RAM AM_SHARE("share1")
AM_RANGE(0x08000, 0x0ffff) AM_RAM AM_SHARE("share2") // Z8002 has 64k memory
@@ -83,25 +102,25 @@ ADDRESS_MAP_END
// AM_RANGE(0x08000, 0xfffff) AM_RAM AM_SHARE("share2")
//ADDRESS_MAP_END
-static ADDRESS_MAP_START(c8002_io, AS_IO, 8, onyx_state)
- AM_RANGE(0xff00, 0xff07) AM_DEVREADWRITE_MOD("sio1", z80sio_device, cd_ba_r, cd_ba_w, rshift<1>)
- AM_RANGE(0xff08, 0xff0f) AM_DEVREADWRITE_MOD("sio2", z80sio_device, cd_ba_r, cd_ba_w, rshift<1>)
- AM_RANGE(0xff10, 0xff17) AM_DEVREADWRITE_MOD("sio3", z80sio_device, cd_ba_r, cd_ba_w, rshift<1>)
- AM_RANGE(0xff18, 0xff1f) AM_DEVREADWRITE_MOD("sio4", z80sio_device, cd_ba_r, cd_ba_w, rshift<1>)
- AM_RANGE(0xff20, 0xff27) AM_DEVREADWRITE_MOD("sio5", z80sio_device, cd_ba_r, cd_ba_w, rshift<1>)
- AM_RANGE(0xff30, 0xff37) AM_DEVREADWRITE_MOD("ctc1", z80ctc_device, read, write, rshift<1>)
- AM_RANGE(0xff38, 0xff3f) AM_DEVREADWRITE_MOD("ctc2", z80ctc_device, read, write, rshift<1>)
- AM_RANGE(0xff40, 0xff47) AM_DEVREADWRITE_MOD("ctc3", z80ctc_device, read, write, rshift<1>)
- AM_RANGE(0xff50, 0xff57) AM_DEVREADWRITE_MOD("pio1", z80pio_device, read, write, rshift<1>)
- AM_RANGE(0xff58, 0xff5f) AM_DEVREADWRITE_MOD("pio2", z80pio_device, read, write, rshift<1>)
+ADDRESS_MAP_START(onyx_state::c8002_io)
+ map(0xff00, 0xff07).lrw8("sio1_rw", [this](address_space &space, offs_t offset, u8 mem_mask) { return m_sio1->cd_ba_r(space, offset >> 1, mem_mask); }, [this](address_space &space, offs_t offset, u8 data, u8 mem_mask) { m_sio1->cd_ba_w(space, offset >> 1, data, mem_mask); });
+ map(0xff08, 0xff0f).lrw8("sio2_rw", [this](address_space &space, offs_t offset, u8 mem_mask) { return m_sio1->cd_ba_r(space, offset >> 1, mem_mask); }, [this](address_space &space, offs_t offset, u8 data, u8 mem_mask) { m_sio1->cd_ba_w(space, offset >> 1, data, mem_mask); });
+ map(0xff10, 0xff17).lrw8("sio3_rw", [this](address_space &space, offs_t offset, u8 mem_mask) { return m_sio1->cd_ba_r(space, offset >> 1, mem_mask); }, [this](address_space &space, offs_t offset, u8 data, u8 mem_mask) { m_sio1->cd_ba_w(space, offset >> 1, data, mem_mask); });
+ map(0xff18, 0xff1f).lrw8("sio4_rw", [this](address_space &space, offs_t offset, u8 mem_mask) { return m_sio1->cd_ba_r(space, offset >> 1, mem_mask); }, [this](address_space &space, offs_t offset, u8 data, u8 mem_mask) { m_sio1->cd_ba_w(space, offset >> 1, data, mem_mask); });
+ map(0xff20, 0xff27).lrw8("sio5_rw", [this](address_space &space, offs_t offset, u8 mem_mask) { return m_sio1->cd_ba_r(space, offset >> 1, mem_mask); }, [this](address_space &space, offs_t offset, u8 data, u8 mem_mask) { m_sio1->cd_ba_w(space, offset >> 1, data, mem_mask); });
+ map(0xff30, 0xff37).lrw8("ctc1_rw", [this](address_space &space, offs_t offset, u8 mem_mask) { return m_ctc1->read(space, offset >> 1, mem_mask); }, [this](address_space &space, offs_t offset, u8 data, u8 mem_mask) { m_ctc1->write(space, offset >> 1, data, mem_mask); });
+ map(0xff38, 0xff3f).lrw8("ctc2_rw", [this](address_space &space, offs_t offset, u8 mem_mask) { return m_ctc2->read(space, offset >> 1, mem_mask); }, [this](address_space &space, offs_t offset, u8 data, u8 mem_mask) { m_ctc2->write(space, offset >> 1, data, mem_mask); });
+ map(0xff40, 0xff47).lrw8("ctc3_rw", [this](address_space &space, offs_t offset, u8 mem_mask) { return m_ctc3->read(space, offset >> 1, mem_mask); }, [this](address_space &space, offs_t offset, u8 data, u8 mem_mask) { m_ctc3->write(space, offset >> 1, data, mem_mask); });
+ map(0xff50, 0xff57).lrw8("pio1_rw", [this](address_space &space, offs_t offset, u8 mem_mask) { return m_pio1->read(space, offset >> 1, mem_mask); }, [this](address_space &space, offs_t offset, u8 data, u8 mem_mask) { m_pio1->write(space, offset >> 1, data, mem_mask); });
+ map(0xff58, 0xff5f).lrw8("pio2_rw", [this](address_space &space, offs_t offset, u8 mem_mask) { return m_pio2->read(space, offset >> 1, mem_mask); }, [this](address_space &space, offs_t offset, u8 data, u8 mem_mask) { m_pio2->write(space, offset >> 1, data, mem_mask); });
ADDRESS_MAP_END
-static ADDRESS_MAP_START(submem, AS_PROGRAM, 8, onyx_state)
+ADDRESS_MAP_START(onyx_state::submem)
AM_RANGE(0x0000, 0x0fff) AM_ROM
AM_RANGE(0x1000, 0xffff) AM_RAM
ADDRESS_MAP_END
-static ADDRESS_MAP_START(subio, AS_IO, 8, onyx_state)
+ADDRESS_MAP_START(onyx_state::subio)
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x03) AM_DEVREADWRITE("pio1s", z80pio_device, read, write)
AM_RANGE(0x04, 0x04) AM_READNOP // disk status?
@@ -214,12 +233,12 @@ Labels of proms: 339, 153, XMN4, 2_1, 1_2
*********************************************************************************************************************************/
-static ADDRESS_MAP_START(c5000_mem, AS_PROGRAM, 8, onyx_state)
+ADDRESS_MAP_START(onyx_state::c5000_mem)
AM_RANGE(0x0000, 0x1fff) AM_ROM
AM_RANGE(0x2000, 0xffff) AM_RAM
ADDRESS_MAP_END
-static ADDRESS_MAP_START(c5000_io, AS_IO, 8, onyx_state)
+ADDRESS_MAP_START(onyx_state::c5000_io)
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x10, 0x13) AM_DEVREADWRITE("sio1", z80sio_device, cd_ba_r, cd_ba_w )
ADDRESS_MAP_END