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Diffstat (limited to 'src/mame/drivers/midzeus.c')
-rw-r--r--src/mame/drivers/midzeus.c30
1 files changed, 15 insertions, 15 deletions
diff --git a/src/mame/drivers/midzeus.c b/src/mame/drivers/midzeus.c
index e4f5bfa00b3..ccb55d40783 100644
--- a/src/mame/drivers/midzeus.c
+++ b/src/mame/drivers/midzeus.c
@@ -134,7 +134,7 @@ WRITE32_MEMBER(midzeus_state::cmos_w)
if (bitlatch[2] && !cmos_protected)
COMBINE_DATA(&m_nvram[offset]);
else
- logerror("%06X:timekeeper_w with bitlatch[2] = %d, cmos_protected = %d\n", cpu_get_pc(&space.device()), bitlatch[2], cmos_protected);
+ logerror("%06X:timekeeper_w with bitlatch[2] = %d, cmos_protected = %d\n", space.device().safe_pc(), bitlatch[2], cmos_protected);
cmos_protected = TRUE;
}
@@ -188,7 +188,7 @@ WRITE32_MEMBER(midzeus_state::zpram_w)
if (bitlatch[2])
COMBINE_DATA(&m_nvram[offset]);
else
- logerror("%06X:zpram_w with bitlatch[2] = %d\n", cpu_get_pc(&space.device()), bitlatch[2]);
+ logerror("%06X:zpram_w with bitlatch[2] = %d\n", space.device().safe_pc(), bitlatch[2]);
}
@@ -229,7 +229,7 @@ READ32_MEMBER(midzeus_state::bitlatches_r)
/* unknown purpose */
default:
- logerror("%06X:bitlatches_r(%X)\n", cpu_get_pc(&space.device()), offset);
+ logerror("%06X:bitlatches_r(%X)\n", space.device().safe_pc(), offset);
break;
}
return ~0;
@@ -246,19 +246,19 @@ WRITE32_MEMBER(midzeus_state::bitlatches_w)
/* unknown purpose */
default:
if (oldval ^ data)
- logerror("%06X:bitlatches_w(%X) = %X\n", cpu_get_pc(&space.device()), offset, data);
+ logerror("%06X:bitlatches_w(%X) = %X\n", space.device().safe_pc(), offset, data);
break;
/* unknown purpose; crusnexo toggles this between 0 and 1 every 20 frames; thegrid writes 1 */
case 0:
if (data != 0 && data != 1)
- logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", cpu_get_pc(&space.device()), offset, data);
+ logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", space.device().safe_pc(), offset, data);
break;
/* unknown purpose; mk4/invasn write 1 here at initialization; crusnexo/thegrid write 3 */
case 1:
if (data != 1 && data != 3)
- logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", cpu_get_pc(&space.device()), offset, data);
+ logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", space.device().safe_pc(), offset, data);
break;
/* CMOS/ZPRAM extra enable latch; only low bit is used */
@@ -268,7 +268,7 @@ WRITE32_MEMBER(midzeus_state::bitlatches_w)
/* unknown purpose; invasn writes 2 here at startup */
case 4:
if (data != 2)
- logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", cpu_get_pc(&space.device()), offset, data);
+ logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", space.device().safe_pc(), offset, data);
break;
/* ROM bank selection on Zeus 2 */
@@ -279,19 +279,19 @@ WRITE32_MEMBER(midzeus_state::bitlatches_w)
/* unknown purpose; crusnexo/thegrid write 1 at startup */
case 7:
if (data != 1)
- logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", cpu_get_pc(&space.device()), offset, data);
+ logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", space.device().safe_pc(), offset, data);
break;
/* unknown purpose; crusnexo writes 4 at startup; thegrid writes 6 */
case 8:
if (data != 4 && data != 6)
- logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", cpu_get_pc(&space.device()), offset, data);
+ logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", space.device().safe_pc(), offset, data);
break;
/* unknown purpose; thegrid writes 1 at startup */
case 9:
if (data != 1)
- logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", cpu_get_pc(&space.device()), offset, data);
+ logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", space.device().safe_pc(), offset, data);
break;
}
}
@@ -357,7 +357,7 @@ WRITE32_MEMBER(midzeus_state::crusnexo_leds_w)
READ32_MEMBER(midzeus_state::linkram_r)
{
- logerror("%06X:unknown_8a000_r(%02X)\n", cpu_get_pc(&space.device()), offset);
+ logerror("%06X:unknown_8a000_r(%02X)\n", space.device().safe_pc(), offset);
if (offset == 0)
return 0x30313042;
else if (offset == 0x3c)
@@ -367,7 +367,7 @@ READ32_MEMBER(midzeus_state::linkram_r)
WRITE32_MEMBER(midzeus_state::linkram_w)
{
- logerror("%06X:unknown_8a000_w(%02X) = %08X\n", cpu_get_pc(&space.device()), offset, data);
+ logerror("%06X:unknown_8a000_w(%02X) = %08X\n", space.device().safe_pc(), offset, data);
COMBINE_DATA(&linkram[offset]);
}
@@ -392,7 +392,7 @@ READ32_MEMBER(midzeus_state::tms32031_control_r)
/* log anything else except the memory control register */
if (offset != 0x64)
- logerror("%06X:tms32031_control_r(%02X)\n", cpu_get_pc(&space.device()), offset);
+ logerror("%06X:tms32031_control_r(%02X)\n", space.device().safe_pc(), offset);
return tms32031_control[offset];
}
@@ -414,7 +414,7 @@ WRITE32_MEMBER(midzeus_state::tms32031_control_w)
timer[which]->adjust(attotime::never);
}
else
- logerror("%06X:tms32031_control_w(%02X) = %08X\n", cpu_get_pc(&space.device()), offset, data);
+ logerror("%06X:tms32031_control_w(%02X) = %08X\n", space.device().safe_pc(), offset, data);
}
@@ -465,7 +465,7 @@ READ32_MEMBER(midzeus_state::analog_r)
{
static const char * const tags[] = { "ANALOG0", "ANALOG1", "ANALOG2", "ANALOG3" };
if (offset < 8 || offset > 11)
- logerror("%06X:analog_r(%X)\n", cpu_get_pc(&space.device()), offset);
+ logerror("%06X:analog_r(%X)\n", space.device().safe_pc(), offset);
return ioport(tags[offset & 3])->read();
}