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Diffstat (limited to 'src/mame/drivers/galaga.cpp')
-rw-r--r--src/mame/drivers/galaga.cpp162
1 files changed, 81 insertions, 81 deletions
diff --git a/src/mame/drivers/galaga.cpp b/src/mame/drivers/galaga.cpp
index c5deb9401eb..22ca1a5cb55 100644
--- a/src/mame/drivers/galaga.cpp
+++ b/src/mame/drivers/galaga.cpp
@@ -1607,14 +1607,14 @@ MACHINE_CONFIG_START(bosco_state::bosco)
NAMCO_50XX(config, "50xx_1", MASTER_CLOCK/6/2); /* 1.536 MHz */
NAMCO_50XX(config, "50xx_2", MASTER_CLOCK/6/2); /* 1.536 MHz */
- MCFG_NAMCO_51XX_ADD("51xx", MASTER_CLOCK/6/2) /* 1.536 MHz */
- MCFG_NAMCO_51XX_SCREEN("screen")
- MCFG_NAMCO_51XX_INPUT_0_CB(IOPORT("IN0L"))
- MCFG_NAMCO_51XX_INPUT_1_CB(IOPORT("IN0H"))
- MCFG_NAMCO_51XX_INPUT_2_CB(IOPORT("IN1L"))
- MCFG_NAMCO_51XX_INPUT_3_CB(IOPORT("IN1H"))
- MCFG_NAMCO_51XX_OUTPUT_0_CB(WRITE8(*this, galaga_state,out_0))
- MCFG_NAMCO_51XX_OUTPUT_1_CB(WRITE8(*this, galaga_state,out_1))
+ namco_51xx_device &n51xx(NAMCO_51XX(config, "51xx", MASTER_CLOCK/6/2)); /* 1.536 MHz */
+ n51xx.set_screen_tag(m_screen);
+ n51xx.input_callback<0>().set_ioport("IN0L");
+ n51xx.input_callback<1>().set_ioport("IN0H");
+ n51xx.input_callback<2>().set_ioport("IN1L");
+ n51xx.input_callback<3>().set_ioport("IN1H");
+ n51xx.output_callback<0>().set(FUNC(galaga_state::out_0));
+ n51xx.output_callback<1>().set(FUNC(galaga_state::out_1));
namco_52xx_device &n52xx(NAMCO_52XX(config, "52xx", MASTER_CLOCK/6/2)); /* 1.536 MHz */
n52xx.set_discrete("discrete");
@@ -1627,21 +1627,21 @@ MACHINE_CONFIG_START(bosco_state::bosco)
n54xx.set_discrete("discrete");
n54xx.set_basenote(NODE_01);
- MCFG_NAMCO_06XX_ADD("06xx_0", MASTER_CLOCK/6/64)
- MCFG_NAMCO_06XX_MAINCPU("maincpu")
- MCFG_NAMCO_06XX_READ_0_CB(READ8("51xx", namco_51xx_device, read))
- MCFG_NAMCO_06XX_WRITE_0_CB(WRITE8("51xx", namco_51xx_device, write))
- MCFG_NAMCO_06XX_READ_2_CB(READ8("50xx_1", namco_50xx_device, read))
- MCFG_NAMCO_06XX_READ_REQUEST_2_CB(WRITELINE("50xx_1", namco_50xx_device, read_request))
- MCFG_NAMCO_06XX_WRITE_2_CB(WRITE8("50xx_1", namco_50xx_device, write))
- MCFG_NAMCO_06XX_WRITE_3_CB(WRITE8("54xx", namco_54xx_device, write))
-
- MCFG_NAMCO_06XX_ADD("06xx_1", MASTER_CLOCK/6/64)
- MCFG_NAMCO_06XX_MAINCPU("sub")
- MCFG_NAMCO_06XX_READ_0_CB(READ8("50xx_2", namco_50xx_device, read))
- MCFG_NAMCO_06XX_READ_REQUEST_0_CB(WRITELINE("50xx_2", namco_50xx_device, read_request))
- MCFG_NAMCO_06XX_WRITE_0_CB(WRITE8("50xx_2", namco_50xx_device, write))
- MCFG_NAMCO_06XX_WRITE_1_CB(WRITE8("52xx", namco_52xx_device, write))
+ namco_06xx_device &n06xx_0(NAMCO_06XX(config, "06xx_0", MASTER_CLOCK/6/64));
+ n06xx_0.set_maincpu(m_maincpu);
+ n06xx_0.read_callback<0>().set("51xx", FUNC(namco_51xx_device::read));
+ n06xx_0.write_callback<0>().set("51xx", FUNC(namco_51xx_device::write));
+ n06xx_0.read_callback<2>().set("50xx_1", FUNC(namco_50xx_device::read));
+ n06xx_0.read_request_callback<2>().set("50xx_1", FUNC(namco_50xx_device::read_request));
+ n06xx_0.write_callback<2>().set("50xx_1", FUNC(namco_50xx_device::write));
+ n06xx_0.write_callback<3>().set("54xx", FUNC(namco_54xx_device::write));
+
+ namco_06xx_device &n06xx_1(NAMCO_06XX(config, "06xx_1", MASTER_CLOCK/6/64));
+ n06xx_1.set_maincpu(m_subcpu);
+ n06xx_1.read_callback<0>().set("50xx_2", FUNC(namco_50xx_device::read));
+ n06xx_1.read_request_callback<0>().set("50xx_2", FUNC(namco_50xx_device::read_request));
+ n06xx_1.write_callback<0>().set("50xx_2", FUNC(namco_50xx_device::write));
+ n06xx_1.write_callback<1>().set("52xx", FUNC(namco_52xx_device::write));
LS259(config, m_videolatch); // 1B on video board
m_videolatch->q_out_cb<0>().set(FUNC(galaga_state::flip_screen_w)).invert();
@@ -1698,24 +1698,24 @@ MACHINE_CONFIG_START(galaga_state::galaga)
misclatch.q_out_cb<3>().set_inputline("sub", INPUT_LINE_RESET).invert();
misclatch.q_out_cb<3>().append_inputline("sub2", INPUT_LINE_RESET).invert();
- MCFG_NAMCO_51XX_ADD("51xx", MASTER_CLOCK/6/2) /* 1.536 MHz */
- MCFG_NAMCO_51XX_SCREEN("screen")
- MCFG_NAMCO_51XX_INPUT_0_CB(IOPORT("IN0L"))
- MCFG_NAMCO_51XX_INPUT_1_CB(IOPORT("IN0H"))
- MCFG_NAMCO_51XX_INPUT_2_CB(IOPORT("IN1L"))
- MCFG_NAMCO_51XX_INPUT_3_CB(IOPORT("IN1H"))
- MCFG_NAMCO_51XX_OUTPUT_0_CB(WRITE8(*this, galaga_state,out_0))
- MCFG_NAMCO_51XX_OUTPUT_1_CB(WRITE8(*this, galaga_state,out_1))
+ namco_51xx_device &n51xx(NAMCO_51XX(config, "51xx", MASTER_CLOCK/6/2)); /* 1.536 MHz */
+ n51xx.set_screen_tag(m_screen);
+ n51xx.input_callback<0>().set_ioport("IN0L");
+ n51xx.input_callback<1>().set_ioport("IN0H");
+ n51xx.input_callback<2>().set_ioport("IN1L");
+ n51xx.input_callback<3>().set_ioport("IN1H");
+ n51xx.output_callback<0>().set(FUNC(galaga_state::out_0));
+ n51xx.output_callback<1>().set(FUNC(galaga_state::out_1));
namco_54xx_device &n54xx(NAMCO_54XX(config, "54xx", MASTER_CLOCK/6/2)); /* 1.536 MHz */
n54xx.set_discrete("discrete");
n54xx.set_basenote(NODE_01);
- MCFG_NAMCO_06XX_ADD("06xx", MASTER_CLOCK/6/64)
- MCFG_NAMCO_06XX_MAINCPU("maincpu")
- MCFG_NAMCO_06XX_READ_0_CB(READ8("51xx", namco_51xx_device, read))
- MCFG_NAMCO_06XX_WRITE_0_CB(WRITE8("51xx", namco_51xx_device, write))
- MCFG_NAMCO_06XX_WRITE_3_CB(WRITE8("54xx", namco_54xx_device, write))
+ namco_06xx_device &n06xx(NAMCO_06XX(config, "06xx", MASTER_CLOCK/6/64));
+ n06xx.set_maincpu(m_maincpu);
+ n06xx.read_callback<0>().set("51xx", FUNC(namco_51xx_device::read));
+ n06xx.write_callback<0>().set("51xx", FUNC(namco_51xx_device::write));
+ n06xx.write_callback<3>().set("54xx", FUNC(namco_54xx_device::write));
LS259(config, m_videolatch); // 5K on video board
// Q0-Q5 to 05XX for starfield control
@@ -1756,20 +1756,20 @@ MACHINE_CONFIG_START(galaga_state::galagab)
/* basic machine hardware */
- MCFG_DEVICE_REMOVE("54xx")
- MCFG_DEVICE_REMOVE("06xx")
+ config.device_remove("54xx");
+ config.device_remove("06xx");
/* FIXME: bootlegs should not have any Namco custom chip. However, this workaround is needed atm */
- MCFG_NAMCO_06XX_ADD("06xx", MASTER_CLOCK/6/64)
- MCFG_NAMCO_06XX_MAINCPU("maincpu")
- MCFG_NAMCO_06XX_READ_0_CB(READ8("51xx", namco_51xx_device, read))
- MCFG_NAMCO_06XX_WRITE_0_CB(WRITE8("51xx", namco_51xx_device, write))
+ namco_06xx_device &n06xx(NAMCO_06XX(config, "06xx", MASTER_CLOCK/6/64));
+ n06xx.set_maincpu(m_maincpu);
+ n06xx.read_callback<0>().set("51xx", FUNC(namco_51xx_device::read));
+ n06xx.write_callback<0>().set("51xx", FUNC(namco_51xx_device::write));
MCFG_DEVICE_ADD("sub3", Z80, MASTER_CLOCK/6) /* 3.072 MHz */
MCFG_DEVICE_PROGRAM_MAP(galaga_mem4)
/* sound hardware */
- MCFG_DEVICE_REMOVE("discrete")
+ config.device_remove("discrete");
MACHINE_CONFIG_END
MACHINE_CONFIG_START(galaga_state::gatsbee)
@@ -1802,27 +1802,27 @@ MACHINE_CONFIG_START(xevious_state::xevious)
NAMCO_50XX(config, "50xx", MASTER_CLOCK/6/2); /* 1.536 MHz */
- MCFG_NAMCO_51XX_ADD("51xx", MASTER_CLOCK/6/2) /* 1.536 MHz */
- MCFG_NAMCO_51XX_SCREEN("screen")
- MCFG_NAMCO_51XX_INPUT_0_CB(IOPORT("IN0L"))
- MCFG_NAMCO_51XX_INPUT_1_CB(IOPORT("IN0H"))
- MCFG_NAMCO_51XX_INPUT_2_CB(IOPORT("IN1L"))
- MCFG_NAMCO_51XX_INPUT_3_CB(IOPORT("IN1H"))
- MCFG_NAMCO_51XX_OUTPUT_0_CB(WRITE8(*this, galaga_state,out_0))
- MCFG_NAMCO_51XX_OUTPUT_1_CB(WRITE8(*this, galaga_state,out_1))
+ namco_51xx_device &n51xx(NAMCO_51XX(config, "51xx", MASTER_CLOCK/6/2)); /* 1.536 MHz */
+ n51xx.set_screen_tag(m_screen);
+ n51xx.input_callback<0>().set_ioport("IN0L");
+ n51xx.input_callback<1>().set_ioport("IN0H");
+ n51xx.input_callback<2>().set_ioport("IN1L");
+ n51xx.input_callback<3>().set_ioport("IN1H");
+ n51xx.output_callback<0>().set(FUNC(galaga_state::out_0));
+ n51xx.output_callback<1>().set(FUNC(galaga_state::out_1));
namco_54xx_device &n54xx(NAMCO_54XX(config, "54xx", MASTER_CLOCK/6/2)); /* 1.536 MHz */
n54xx.set_discrete("discrete");
n54xx.set_basenote(NODE_01);
- MCFG_NAMCO_06XX_ADD("06xx", MASTER_CLOCK/6/64)
- MCFG_NAMCO_06XX_MAINCPU("maincpu")
- MCFG_NAMCO_06XX_READ_0_CB(READ8("51xx", namco_51xx_device, read))
- MCFG_NAMCO_06XX_WRITE_0_CB(WRITE8("51xx", namco_51xx_device, write))
- MCFG_NAMCO_06XX_READ_2_CB(READ8("50xx", namco_50xx_device, read))
- MCFG_NAMCO_06XX_READ_REQUEST_2_CB(WRITELINE("50xx", namco_50xx_device, read_request))
- MCFG_NAMCO_06XX_WRITE_2_CB(WRITE8("50xx", namco_50xx_device, write))
- MCFG_NAMCO_06XX_WRITE_3_CB(WRITE8("54xx", namco_54xx_device, write))
+ namco_06xx_device &n06xx(NAMCO_06XX(config, "06xx", MASTER_CLOCK/6/64));
+ n06xx.set_maincpu(m_maincpu);
+ n06xx.read_callback<0>().set("51xx", FUNC(namco_51xx_device::read));
+ n06xx.write_callback<0>().set("51xx", FUNC(namco_51xx_device::write));
+ n06xx.read_callback<2>().set("50xx", FUNC(namco_50xx_device::read));
+ n06xx.read_request_callback<2>().set("50xx", FUNC(namco_50xx_device::read_request));
+ n06xx.write_callback<2>().set("50xx", FUNC(namco_50xx_device::write));
+ n06xx.write_callback<3>().set("54xx", FUNC(namco_54xx_device::write));
WATCHDOG_TIMER(config, "watchdog").set_vblank_count(m_screen, 8);
MCFG_QUANTUM_TIME(attotime::from_hz(60000)) /* 1000 CPU slices per frame - an high value to ensure proper */
@@ -1857,15 +1857,15 @@ MACHINE_CONFIG_START(battles_state::battles)
xevious(config);
/* basic machine hardware */
- MCFG_DEVICE_REMOVE("50xx")
- MCFG_DEVICE_REMOVE("54xx")
- MCFG_DEVICE_REMOVE("06xx")
+ config.device_remove("50xx");
+ config.device_remove("54xx");
+ config.device_remove("06xx");
/* FIXME: bootlegs should not have any Namco custom chip. However, this workaround is needed atm */
- MCFG_NAMCO_06XX_ADD("06xx", MASTER_CLOCK/6/64)
- MCFG_NAMCO_06XX_MAINCPU("maincpu")
- MCFG_NAMCO_06XX_READ_0_CB(READ8("51xx", namco_51xx_device, read))
- MCFG_NAMCO_06XX_WRITE_0_CB(WRITE8("51xx", namco_51xx_device, write))
+ namco_06xx_device &n06xx(NAMCO_06XX(config, "06xx", MASTER_CLOCK/6/64));
+ n06xx.set_maincpu(m_maincpu);
+ n06xx.read_callback<0>().set("51xx", FUNC(namco_51xx_device::read));
+ n06xx.write_callback<0>().set("51xx", FUNC(namco_51xx_device::write));
MCFG_DEVICE_ADD("sub3", Z80, MASTER_CLOCK/6) /* 3.072 MHz */
MCFG_DEVICE_PROGRAM_MAP(battles_mem4)
@@ -1875,7 +1875,7 @@ MACHINE_CONFIG_START(battles_state::battles)
MCFG_TIMER_DRIVER_ADD("nmi", battles_state, nmi_generate)
/* sound hardware */
- MCFG_DEVICE_REMOVE("discrete")
+ config.device_remove("discrete");
MCFG_DEVICE_ADD("samples", SAMPLES)
MCFG_SAMPLES_CHANNELS(1)
@@ -1903,14 +1903,14 @@ MACHINE_CONFIG_START(digdug_state::digdug)
misclatch.q_out_cb<3>().append_inputline("sub2", INPUT_LINE_RESET).invert();
// Q5-Q7 also used (see below)
- MCFG_NAMCO_51XX_ADD("51xx", MASTER_CLOCK/6/2) /* 1.536 MHz */
- MCFG_NAMCO_51XX_SCREEN("screen")
- MCFG_NAMCO_51XX_INPUT_0_CB(IOPORT("IN0L"))
- MCFG_NAMCO_51XX_INPUT_1_CB(IOPORT("IN0H"))
- MCFG_NAMCO_51XX_INPUT_2_CB(IOPORT("IN1L"))
- MCFG_NAMCO_51XX_INPUT_3_CB(IOPORT("IN1H"))
- MCFG_NAMCO_51XX_OUTPUT_0_CB(WRITE8(*this, galaga_state,out_0))
- MCFG_NAMCO_51XX_OUTPUT_1_CB(WRITE8(*this, galaga_state,out_1))
+ namco_51xx_device &n51xx(NAMCO_51XX(config, "51xx", MASTER_CLOCK/6/2)); /* 1.536 MHz */
+ n51xx.set_screen_tag(m_screen);
+ n51xx.input_callback<0>().set_ioport("IN0L");
+ n51xx.input_callback<1>().set_ioport("IN0H");
+ n51xx.input_callback<2>().set_ioport("IN1L");
+ n51xx.input_callback<3>().set_ioport("IN1H");
+ n51xx.output_callback<0>().set(FUNC(galaga_state::out_0));
+ n51xx.output_callback<1>().set(FUNC(galaga_state::out_1));
namco_53xx_device &n53xx(NAMCO_53XX(config, "53xx", MASTER_CLOCK/6/2)); /* 1.536 MHz */
n53xx.k_port_callback().set("misclatch", FUNC(ls259_device::q7_r)).lshift(3); // MOD 2 = K3
@@ -1922,12 +1922,12 @@ MACHINE_CONFIG_START(digdug_state::digdug)
n53xx.input_callback<2>().set_ioport("DSWB").mask(0x0f);
n53xx.input_callback<3>().set_ioport("DSWB").rshift(4);
- MCFG_NAMCO_06XX_ADD("06xx", MASTER_CLOCK/6/64)
- MCFG_NAMCO_06XX_MAINCPU("maincpu")
- MCFG_NAMCO_06XX_READ_0_CB(READ8("51xx", namco_51xx_device, read))
- MCFG_NAMCO_06XX_WRITE_0_CB(WRITE8("51xx", namco_51xx_device, write))
- MCFG_NAMCO_06XX_READ_1_CB(READ8("53xx", namco_53xx_device, read))
- MCFG_NAMCO_06XX_READ_REQUEST_1_CB(WRITELINE("53xx", namco_53xx_device, read_request))
+ namco_06xx_device &n06xx(NAMCO_06XX(config, "06xx", MASTER_CLOCK/6/64));
+ n06xx.set_maincpu(m_maincpu);
+ n06xx.read_callback<0>().set("51xx", FUNC(namco_51xx_device::read));
+ n06xx.write_callback<0>().set("51xx", FUNC(namco_51xx_device::write));
+ n06xx.read_callback<1>().set("53xx", FUNC(namco_53xx_device::read));
+ n06xx.read_request_callback<1>().set("53xx", FUNC(namco_53xx_device::read_request));
LS259(config, m_videolatch); // 5R
m_videolatch->parallel_out_cb().set(FUNC(digdug_state::bg_select_w)).mask(0x33);