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Diffstat (limited to 'src/mame/drivers/dms86.cpp')
-rw-r--r--src/mame/drivers/dms86.cpp40
1 files changed, 20 insertions, 20 deletions
diff --git a/src/mame/drivers/dms86.cpp b/src/mame/drivers/dms86.cpp
index 742b8ee8245..22e46f3fcfb 100644
--- a/src/mame/drivers/dms86.cpp
+++ b/src/mame/drivers/dms86.cpp
@@ -117,36 +117,36 @@ void dms86_state::kbd_put(u8 data)
MACHINE_CONFIG_START(dms86_state::dms86)
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", I8086, XTAL(14'745'600) / 3) // according to the manual... hmm
- MCFG_CPU_PROGRAM_MAP(mem_map)
- MCFG_CPU_IO_MAP(io_map)
+ MCFG_DEVICE_ADD("maincpu", I8086, XTAL(14'745'600) / 3) // according to the manual... hmm
+ MCFG_DEVICE_PROGRAM_MAP(mem_map)
+ MCFG_DEVICE_IO_MAP(io_map)
// According to the manual the clock is 14,765,600 / 4 but that couldn't possibly work.
// By maths, clock should be 9600*32*4*16 = 19,660,800 but not working either
// So, commented out because it makes the whole thing crawl, only get 18% on my machine
//MCFG_DEVICE_ADD("ctc_clock", CLOCK, 19660800) //XTAL(14'745'600) / 4)
- //MCFG_CLOCK_SIGNAL_HANDLER(DEVWRITELINE("ctc" ,z80ctc_device, trg0))
- //MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("ctc" ,z80ctc_device, trg1))
- //MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("ctc" ,z80ctc_device, trg2))
+ //MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE("ctc" ,z80ctc_device, trg0))
+ //MCFG_DEVCB_CHAIN_OUTPUT(WRITELINE("ctc" ,z80ctc_device, trg1))
+ //MCFG_DEVCB_CHAIN_OUTPUT(WRITELINE("ctc" ,z80ctc_device, trg2))
MCFG_DEVICE_ADD("ctc", Z80CTC, XTAL(14'745'600) / 3)
//MCFG_Z80CTC_INTR_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0)) // frame rate interrupt to maincpu
- MCFG_Z80CTC_ZC0_CB(DEVWRITELINE("sio1", z80sio_device, rxtxcb_w)) // SIO1 Ch B
- MCFG_Z80CTC_ZC1_CB(DEVWRITELINE("sio1", z80sio_device, txca_w)) // SIO1 Ch A
- MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("sio1" ,z80sio_device, rxca_w))
- MCFG_Z80CTC_ZC2_CB(DEVWRITELINE("sio2", z80sio_device, rxtxcb_w)) // SIO2
- MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("sio2" ,z80sio_device, rxca_w))
- MCFG_DEVCB_CHAIN_OUTPUT(DEVWRITELINE("sio2" ,z80sio_device, rxca_w))
+ MCFG_Z80CTC_ZC0_CB(WRITELINE("sio1", z80sio_device, rxtxcb_w)) // SIO1 Ch B
+ MCFG_Z80CTC_ZC1_CB(WRITELINE("sio1", z80sio_device, txca_w)) // SIO1 Ch A
+ MCFG_DEVCB_CHAIN_OUTPUT(WRITELINE("sio1" ,z80sio_device, rxca_w))
+ MCFG_Z80CTC_ZC2_CB(WRITELINE("sio2", z80sio_device, rxtxcb_w)) // SIO2
+ MCFG_DEVCB_CHAIN_OUTPUT(WRITELINE("sio2" ,z80sio_device, rxca_w))
+ MCFG_DEVCB_CHAIN_OUTPUT(WRITELINE("sio2" ,z80sio_device, rxca_w))
MCFG_DEVICE_ADD("sio1", Z80SIO, XTAL(14'745'600) / 3)
- MCFG_Z80SIO_OUT_TXDB_CB(DEVWRITELINE("rs232", rs232_port_device, write_txd))
- MCFG_Z80SIO_OUT_DTRB_CB(DEVWRITELINE("rs232", rs232_port_device, write_dtr))
- MCFG_Z80SIO_OUT_RTSB_CB(DEVWRITELINE("rs232", rs232_port_device, write_rts))
-
- MCFG_RS232_PORT_ADD("rs232", default_rs232_devices, nullptr)
- MCFG_RS232_RXD_HANDLER(DEVWRITELINE("sio1", z80sio_device, rxb_w))
- MCFG_RS232_DCD_HANDLER(DEVWRITELINE("sio1", z80sio_device, dcdb_w))
- MCFG_RS232_CTS_HANDLER(DEVWRITELINE("sio1", z80sio_device, ctsb_w)) MCFG_DEVCB_INVERT
+ MCFG_Z80SIO_OUT_TXDB_CB(WRITELINE("rs232", rs232_port_device, write_txd))
+ MCFG_Z80SIO_OUT_DTRB_CB(WRITELINE("rs232", rs232_port_device, write_dtr))
+ MCFG_Z80SIO_OUT_RTSB_CB(WRITELINE("rs232", rs232_port_device, write_rts))
+
+ MCFG_DEVICE_ADD("rs232", RS232_PORT, default_rs232_devices, nullptr)
+ MCFG_RS232_RXD_HANDLER(WRITELINE("sio1", z80sio_device, rxb_w))
+ MCFG_RS232_DCD_HANDLER(WRITELINE("sio1", z80sio_device, dcdb_w))
+ MCFG_RS232_CTS_HANDLER(WRITELINE("sio1", z80sio_device, ctsb_w)) MCFG_DEVCB_INVERT
MCFG_DEVICE_ADD("sio2", Z80SIO, XTAL(14'745'600) / 3)
MCFG_DEVICE_ADD("terminal", GENERIC_TERMINAL, 0)