diff options
Diffstat (limited to 'src/mame/drivers/by17.cpp')
-rw-r--r-- | src/mame/drivers/by17.cpp | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/src/mame/drivers/by17.cpp b/src/mame/drivers/by17.cpp index 60b5f3824a7..c3acde7233e 100644 --- a/src/mame/drivers/by17.cpp +++ b/src/mame/drivers/by17.cpp @@ -993,8 +993,8 @@ void by17_state::machine_reset() MACHINE_CONFIG_START(by17_state::by17) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", M6800, 530000) // No xtal, just 2 chips forming a multivibrator oscillator around 530KHz - MCFG_CPU_PROGRAM_MAP(by17_map) + MCFG_DEVICE_ADD("maincpu", M6800, 530000) // No xtal, just 2 chips forming a multivibrator oscillator around 530KHz + MCFG_DEVICE_PROGRAM_MAP(by17_map) MCFG_NVRAM_ADD_0FILL("nvram") // 'F' filled causes Credit Display to be blank on first startup @@ -1006,27 +1006,27 @@ MACHINE_CONFIG_START(by17_state::by17) /* Devices */ MCFG_DEVICE_ADD("pia_u10", PIA6821, 0) - MCFG_PIA_READPA_HANDLER(READ8(by17_state, u10_a_r)) - MCFG_PIA_WRITEPA_HANDLER(WRITE8(by17_state, u10_a_w)) - MCFG_PIA_READPB_HANDLER(READ8(by17_state, u10_b_r)) - MCFG_PIA_WRITEPB_HANDLER(WRITE8(by17_state, u10_b_w)) - MCFG_PIA_READCA1_HANDLER(READLINE(by17_state, u10_ca1_r)) - MCFG_PIA_READCB1_HANDLER(READLINE(by17_state, u10_cb1_r)) - MCFG_PIA_CA2_HANDLER(WRITELINE(by17_state, u10_ca2_w)) - MCFG_PIA_CB2_HANDLER(WRITELINE(by17_state, u10_cb2_w)) + MCFG_PIA_READPA_HANDLER(READ8(*this, by17_state, u10_a_r)) + MCFG_PIA_WRITEPA_HANDLER(WRITE8(*this, by17_state, u10_a_w)) + MCFG_PIA_READPB_HANDLER(READ8(*this, by17_state, u10_b_r)) + MCFG_PIA_WRITEPB_HANDLER(WRITE8(*this, by17_state, u10_b_w)) + MCFG_PIA_READCA1_HANDLER(READLINE(*this, by17_state, u10_ca1_r)) + MCFG_PIA_READCB1_HANDLER(READLINE(*this, by17_state, u10_cb1_r)) + MCFG_PIA_CA2_HANDLER(WRITELINE(*this, by17_state, u10_ca2_w)) + MCFG_PIA_CB2_HANDLER(WRITELINE(*this, by17_state, u10_cb2_w)) MCFG_PIA_IRQA_HANDLER(INPUTLINE("maincpu", M6800_IRQ_LINE)) MCFG_PIA_IRQB_HANDLER(INPUTLINE("maincpu", M6800_IRQ_LINE)) MCFG_TIMER_DRIVER_ADD_PERIODIC("timer_z_freq", by17_state, timer_z_freq, attotime::from_hz(100)) // Mains Line Frequency * 2 MCFG_TIMER_DRIVER_ADD("timer_z_pulse", by17_state, timer_z_pulse) // Active pulse length from Zero Crossing detector MCFG_DEVICE_ADD("pia_u11", PIA6821, 0) - MCFG_PIA_READPA_HANDLER(READ8(by17_state, u11_a_r)) - MCFG_PIA_WRITEPA_HANDLER(WRITE8(by17_state, u11_a_w)) - MCFG_PIA_WRITEPB_HANDLER(WRITE8(by17_state, u11_b_w)) - MCFG_PIA_READCA1_HANDLER(READLINE(by17_state, u11_ca1_r)) - MCFG_PIA_READCB1_HANDLER(READLINE(by17_state, u11_cb1_r)) - MCFG_PIA_CA2_HANDLER(WRITELINE(by17_state, u11_ca2_w)) - MCFG_PIA_CB2_HANDLER(WRITELINE(by17_state, u11_cb2_w)) + MCFG_PIA_READPA_HANDLER(READ8(*this, by17_state, u11_a_r)) + MCFG_PIA_WRITEPA_HANDLER(WRITE8(*this, by17_state, u11_a_w)) + MCFG_PIA_WRITEPB_HANDLER(WRITE8(*this, by17_state, u11_b_w)) + MCFG_PIA_READCA1_HANDLER(READLINE(*this, by17_state, u11_ca1_r)) + MCFG_PIA_READCB1_HANDLER(READLINE(*this, by17_state, u11_cb1_r)) + MCFG_PIA_CA2_HANDLER(WRITELINE(*this, by17_state, u11_ca2_w)) + MCFG_PIA_CB2_HANDLER(WRITELINE(*this, by17_state, u11_cb2_w)) MCFG_PIA_IRQA_HANDLER(INPUTLINE("maincpu", M6800_IRQ_LINE)) MCFG_PIA_IRQB_HANDLER(INPUTLINE("maincpu", M6800_IRQ_LINE)) MCFG_TIMER_DRIVER_ADD_PERIODIC("timer_d_freq", by17_state, u11_timer, attotime::from_hz(317)) // 555 timer |