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Diffstat (limited to 'src/mame/drivers/astrocde.c')
-rw-r--r--src/mame/drivers/astrocde.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/src/mame/drivers/astrocde.c b/src/mame/drivers/astrocde.c
index 67a8876e78a..b9cce169924 100644
--- a/src/mame/drivers/astrocde.c
+++ b/src/mame/drivers/astrocde.c
@@ -1273,7 +1273,8 @@ static MACHINE_CONFIG_START( astrocade_base, astrocde_state )
/* each game has its own map */
/* video hardware */
- MCFG_PALETTE_LENGTH(512)
+ MCFG_PALETTE_ADD("palette", 512)
+ MCFG_PALETTE_INIT_OWNER(astrocde_state, astrocde)
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_RAW_PARAMS(ASTROCADE_CLOCK, 455, 0, 352, 262, 0, 240)
@@ -1289,9 +1290,10 @@ static MACHINE_CONFIG_DERIVED( astrocade_16color_base, astrocade_base )
MCFG_NVRAM_ADD_0FILL("nvram")
/* video hardware */
- MCFG_PALETTE_LENGTH(4096)
+ MCFG_DEVICE_REMOVE("palette")
+ MCFG_PALETTE_ADD("palette", 4096)
- MCFG_PALETTE_INIT_OVERRIDE(astrocde_state,profpac)
+ MCFG_PALETTE_INIT_OWNER(astrocde_state,profpac)
MCFG_VIDEO_START_OVERRIDE(astrocde_state,profpac)
MCFG_SCREEN_MODIFY("screen")
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// license:BSD-3-Clause
// copyright-holders:Tim Schuerewegen
/*******************************************************************************

    Samsung S3C2440

*******************************************************************************/

#ifndef MAME_MACHINE_S3C2440_H
#define MAME_MACHINE_S3C2440_H

#pragma once

#include "s3c24xx.h"
#include "emupal.h"

/*******************************************************************************
    MACROS / CONSTANTS
*******************************************************************************/

#define S3C2440_TAG "s3c2440"

#define MCFG_S3C2440_PALETTE(_palette_tag) \
	downcast<s3c2440_device &>(*device).set_palette_tag(_palette_tag);

#define MCFG_S3C2440_SCREEN(screen_tag) \
	downcast<s3c2440_device &>(*device).set_screen_tag(screen_tag);

#define MCFG_S3C2440_CORE_PIN_R_CB(_devcb) \
	downcast<s3c2440_device &>(*device).set_core_pin_r_callback(DEVCB_##_devcb);

#define MCFG_S3C2440_CORE_PIN_W_CB(_devcb) \
	downcast<s3c2440_device &>(*device).set_core_pin_w_callback(DEVCB_##_devcb);

#define MCFG_S3C2440_GPIO_PORT_R_CB(_devcb) \
	downcast<s3c2440_device &>(*device).set_gpio_port_r_callback(DEVCB_##_devcb);

#define MCFG_S3C2440_GPIO_PORT_W_CB(_devcb) \
	downcast<s3c2440_device &>(*device).set_gpio_port_w_callback(DEVCB_##_devcb);

#define MCFG_S3C2440_I2C_SCL_W_CB(_devcb) \
	downcast<s3c2440_device &>(*device).set_i2c_scl_w_callback(DEVCB_##_devcb);

#define MCFG_S3C2440_I2C_SDA_R_CB(_devcb) \
	downcast<s3c2440_device &>(*device).set_i2c_sda_r_callback(DEVCB_##_devcb);

#define MCFG_S3C2440_I2C_SDA_W_CB(_devcb) \
	downcast<s3c2440_device &>(*device).set_i2c_sda_w_callback(DEVCB_##_devcb);

#define MCFG_S3C2440_ADC_DATA_R_CB(_devcb) \
	downcast<s3c2440_device &>(*device).set_adc_data_r_callback(DEVCB_##_devcb);

#define MCFG_S3C2440_I2S_DATA_W_CB(_devcb) \
	downcast<s3c2440_device &>(*device).set_i2s_data_w_callback(DEVCB_##_devcb);

#define MCFG_S3C2440_NAND_COMMAND_W_CB(_devcb) \
	downcast<s3c2440_device &>(*device).set_nand_command_w_callback(DEVCB_##_devcb);

#define MCFG_S3C2440_NAND_ADDRESS_W_CB(_devcb) \
	downcast<s3c2440_device &>(*device).set_nand_address_w_callback(DEVCB_##_devcb);

#define MCFG_S3C2440_NAND_DATA_R_CB(_devcb) \
	downcast<s3c2440_device &>(*device).set_nand_data_r_callback(DEVCB_##_devcb);

#define MCFG_S3C2440_NAND_DATA_W_CB(_devcb) \
	downcast<s3c2440_device &>(*device).set_nand_data_w_callback(DEVCB_##_devcb);

#define MCFG_S3C2440_LCD_FLAGS(_flags) \
	downcast<s3c2440_device &>(*device).set_lcd_flags(_flags);

enum
{
	S3C2440_GPIO_PORT_A = 0,
	S3C2440_GPIO_PORT_B,
	S3C2440_GPIO_PORT_C,
	S3C2440_GPIO_PORT_D,
	S3C2440_GPIO_PORT_E,
	S3C2440_GPIO_PORT_F,
	S3C2440_GPIO_PORT_G,
	S3C2440_GPIO_PORT_H,
	S3C2440_GPIO_PORT_J
};

enum
{
	S3C2440_CORE_PIN_NCON = 0,
	S3C2440_CORE_PIN_OM0,
	S3C2440_CORE_PIN_OM1
};

/*******************************************************************************
    MACROS & CONSTANTS
*******************************************************************************/

/* Interface */

#define S3C24XX_INTERFACE_LCD_REVERSE 1

/* Memory Controller */

#define S3C24XX_BASE_MEMCON 0x48000000

/* USB Host Controller */

#define S3C24XX_BASE_USBHOST 0x49000000

/* Interrupt Controller */

#define S3C24XX_BASE_INT 0x4A000000

/* DMA */

#define S3C24XX_BASE_DMA_0 0x4B000000
#define S3C24XX_BASE_DMA_1 0x4B000040
#define S3C24XX_BASE_DMA_2 0x4B000080
#define S3C24XX_BASE_DMA_3 0x4B0000C0

/* Clock & Power Management */

#define S3C24XX_BASE_CLKPOW 0x4C000000

/* LCD Controller */

#define S3C24XX_BASE_LCD    0x4D000000
#define S3C24XX_BASE_LCDPAL 0x4D000400

/* NAND Flash */

#define S3C24XX_BASE_NAND 0x4E000000

#define S3C24XX_NFCONF   (0x00 / 4) // NAND Flash Configuration
#define S3C24XX_NFCONT   (0x04 / 4) // NAND Flash Control
#define S3C24XX_NFCMD    (0x08 / 4) // NAND Flash Command
#define S3C24XX_NFADDR   (0x0C / 4) // NAND Flash Address
#define S3C24XX_NFDATA   (0x10 / 4) // NAND Flash Data
#define S3C24XX_NFMECCD0 (0x14 / 4) // NAND Flash Main Area ECC0/1
#define S3C24XX_NFMECCD1 (0x18 / 4) // NAND Flash Main Area ECC2/3
#define S3C24XX_NFSECCD  (0x1C / 4) // NAND Flash Spare Area Ecc
#define S3C24XX_NFSTAT   (0x20 / 4) // NAND Flash Operation Status
#define S3C24XX_NFESTAT0 (0x24 / 4) // NAND Flash ECC Status For I/O[7:0]
#define S3C24XX_NFESTAT1 (0x28 / 4) // NAND Flash ECC Status For I/O[15:8]
#define S3C24XX_NFMECC0  (0x2C / 4) // NAND Flash Main Area ECC0 Status
#define S3C24XX_NFMECC1  (0x30 / 4) // NAND Flash Main Area ECC1 Status
#define S3C24XX_NFSECC   (0x34 / 4) // NAND Flash Spare Area ECC Status
#define S3C24XX_NFSBLK   (0x38 / 4) // NAND Flash Start Block Address
#define S3C24XX_NFEBLK   (0x3C / 4) // NAND Flash End Block Address

/* Camera Interface */

#define S3C24XX_BASE_CAM 0x4F000000

/* UART */

#define S3C24XX_BASE_UART_0 0x50000000
#define S3C24XX_BASE_UART_1 0x50004000
#define S3C24XX_BASE_UART_2 0x50008000

/* PWM Timer */

#define S3C24XX_BASE_PWM 0x51000000

/* USB Device */

#define S3C24XX_BASE_USBDEV 0x52000140

/* Watchdog Timer */

#define S3C24XX_BASE_WDT 0x53000000

/* IIC */

#define S3C24XX_BASE_IIC 0x54000000

/* IIS */

#define S3C24XX_BASE_IIS 0x55000000

/* I/O Port */

#define S3C24XX_BASE_GPIO 0x56000000

/* RTC */

#define S3C24XX_BASE_RTC 0x57000040

/* A/D Converter */

#define S3C24XX_BASE_ADC 0x58000000

/* SPI */

#define S3C24XX_BASE_SPI_0 0x59000000
#define S3C24XX_BASE_SPI_1 0x59000020

/* SD Interface */

#define S3C24XX_BASE_SDI 0x5A000000

/* AC97 Interface */

#define S3C24XX_BASE_AC97 0x5B000000

/* ... */

class s3c2440_device : public device_t, protected s3c24xx_peripheral_types
{
public:
	s3c2440_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
	~s3c2440_device();

	// configuration
	void set_palette_tag(const char *tag) { m_palette.set_tag(tag); }
	void set_screen_tag(const char *tag) { m_screen.set_tag(tag); }
	template <class Object> devcb_base &set_core_pin_r_callback(Object &&cb) { return m_pin_r_cb.set_callback(std::forward<Object>(cb)); }
	template <class Object> devcb_base &set_core_pin_w_callback(Object &&cb) { return m_pin_w_cb.set_callback(std::forward<Object>(cb)); }
	template <class Object> devcb_base &set_gpio_port_r_callback(Object &&cb) { return m_port_r_cb.set_callback(std::forward<Object>(cb)); }
	template <class Object> devcb_base &set_gpio_port_w_callback(Object &&cb) { return m_port_w_cb.set_callback(std::forward<Object>(cb)); }
	template <class Object> devcb_base &set_i2c_scl_w_callback(Object &&cb) { return m_scl_w_cb.set_callback(std::forward<Object>(cb)); }
	template <class Object> devcb_base &set_i2c_sda_r_callback(Object &&cb) { return m_sda_r_cb.set_callback(std::forward<Object>(cb)); }
	template <class Object> devcb_base &set_i2c_sda_w_callback(Object &&cb) { return m_sda_w_cb.set_callback(std::forward<Object>(cb)); }
	template <class Object> devcb_base &set_adc_data_r_callback(Object &&cb) { return m_data_r_cb.set_callback(std::forward<Object>(cb)); }
	template <class Object> devcb_base &set_i2s_data_w_callback(Object &&cb) { return m_data_w_cb.set_callback(std::forward<Object>(cb)); }
	template <class Object> devcb_base &set_nand_command_w_callback(Object &&cb) { return m_command_w_cb.set_callback(std::forward<Object>(cb)); }
	template <class Object> devcb_base &set_nand_address_w_callback(Object &&cb) { return m_address_w_cb.set_callback(std::forward<Object>(cb)); }
	template <class Object> devcb_base &set_nand_data_r_callback(Object &&cb) { return m_nand_data_r_cb.set_callback(std::forward<Object>(cb)); }
	template <class Object> devcb_base &set_nand_data_w_callback(Object &&cb) { return m_nand_data_w_cb.set_callback(std::forward<Object>(cb)); }
	void set_lcd_flags(int flags) { m_flags = flags; }

	DECLARE_WRITE_LINE_MEMBER( frnb_w );

	uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);

	void s3c2440_touch_screen( int state);
	void s3c2440_request_eint( uint32_t number);

protected:
	// device-level overrides
	virtual void device_start() override;
	virtual void device_reset() override;

	void s3c24xx_reset();
	inline int iface_core_pin_r(int pin);
	void s3c24xx_lcd_reset();
	rgb_t s3c24xx_get_color_tft_16(uint16_t data);
	rgb_t s3c24xx_get_color_tft_24(uint32_t data);
	rgb_t s3c24xx_get_color_stn_12(uint16_t data);
	rgb_t s3c24xx_get_color_stn_08( uint8_t data);
	rgb_t s3c24xx_get_color_stn_01(uint8_t data);
	rgb_t s3c24xx_get_color_stn_02(uint8_t data);
	rgb_t s3c24xx_get_color_stn_04(uint8_t data);
	rgb_t s3c24xx_get_color_tpal();
	void s3c24xx_lcd_dma_reload();
	void s3c24xx_lcd_dma_init();
	uint32_t s3c24xx_lcd_dma_read();
	uint32_t s3c24xx_lcd_dma_read_bits(int count);
	void s3c24xx_lcd_render_tpal();
	void s3c24xx_lcd_render_stn_01();
	void s3c24xx_lcd_render_stn_02();
	void s3c24xx_lcd_render_stn_04();
	void s3c24xx_lcd_render_stn_08();
	void s3c24xx_lcd_render_stn_12_p();
	void s3c24xx_lcd_render_stn_12_u(); // not tested
	void s3c24xx_lcd_render_tft_01();
	void s3c24xx_lcd_render_tft_02();
	void s3c24xx_lcd_render_tft_04();
	void s3c24xx_lcd_render_tft_08();
	void s3c24xx_lcd_render_tft_16();
	TIMER_CALLBACK_MEMBER( s3c24xx_lcd_timer_exp );
	void s3c24xx_video_start();
	void bitmap_blend( bitmap_rgb32 &bitmap_dst, bitmap_rgb32 &bitmap_src_1, bitmap_rgb32 &bitmap_src_2);
	uint32_t s3c24xx_video_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
	READ32_MEMBER( s3c24xx_lcd_r );
	int s3c24xx_lcd_configure_tft();
	int s3c24xx_lcd_configure_stn();
	int s3c24xx_lcd_configure();
	void s3c24xx_lcd_start();
	void s3c24xx_lcd_stop();
	void s3c24xx_lcd_recalc();
	WRITE32_MEMBER( s3c24xx_lcd_w );
	READ32_MEMBER( s3c24xx_lcd_palette_r );
	WRITE32_MEMBER( s3c24xx_lcd_palette_w );
	void s3c24xx_clkpow_reset();
	uint32_t s3c24xx_get_fclk();
	uint32_t s3c24xx_get_hclk();
	uint32_t s3c24xx_get_pclk();
	READ32_MEMBER( s3c24xx_clkpow_r );
	WRITE32_MEMBER( s3c24xx_clkpow_w );
	void s3c24xx_irq_reset();
	void s3c24xx_check_pending_irq();
	void s3c24xx_request_irq(uint32_t int_type);
	void s3c24xx_check_pending_subirq();
	void s3c24xx_request_subirq( uint32_t int_type);
	void s3c24xx_check_pending_eint();
	void s3c24xx_request_eint(uint32_t number);
	READ32_MEMBER( s3c24xx_irq_r );
	WRITE32_MEMBER( s3c24xx_irq_w );
	READ32_MEMBER( s3c24xx_pwm_r );
	void s3c24xx_pwm_start(int timer);
	void s3c24xx_pwm_stop(int timer);
	void s3c24xx_pwm_recalc(int timer);
	WRITE32_MEMBER( s3c24xx_pwm_w );
	TIMER_CALLBACK_MEMBER( s3c24xx_pwm_timer_exp );
	void s3c24xx_dma_reset();
	void s3c24xx_dma_reload(int ch);
	void s3c24xx_dma_trigger(int ch);
	void s3c24xx_dma_request_iis();
	void s3c24xx_dma_request_pwm();
	void s3c24xx_dma_start(int ch);
	void s3c24xx_dma_stop(int ch);
	void s3c24xx_dma_recalc(int ch);
	uint32_t s3c24xx_dma_r(uint32_t ch, uint32_t offset);
	void s3c24xx_dma_w(uint32_t ch, uint32_t offset, uint32_t data, uint32_t mem_mask);
	READ32_MEMBER( s3c24xx_dma_0_r );
	READ32_MEMBER( s3c24xx_dma_1_r );
	READ32_MEMBER( s3c24xx_dma_2_r );
	READ32_MEMBER( s3c24xx_dma_3_r );
	WRITE32_MEMBER( s3c24xx_dma_0_w );
	WRITE32_MEMBER( s3c24xx_dma_1_w );
	WRITE32_MEMBER( s3c24xx_dma_2_w );
	WRITE32_MEMBER( s3c24xx_dma_3_w );
	TIMER_CALLBACK_MEMBER( s3c24xx_dma_timer_exp );
	void s3c24xx_gpio_reset();
	inline uint32_t iface_gpio_port_r(int port, uint32_t mask);
	inline void iface_gpio_port_w(int port, uint32_t mask, uint32_t data);
	uint16_t s3c24xx_gpio_get_mask( uint32_t con, int val);
	READ32_MEMBER( s3c24xx_gpio_r );
	WRITE32_MEMBER( s3c24xx_gpio_w );
	READ32_MEMBER( s3c24xx_memcon_r );
	WRITE32_MEMBER( s3c24xx_memcon_w );
	READ32_MEMBER( s3c24xx_usb_host_r );
	WRITE32_MEMBER( s3c24xx_usb_host_w );
	uint32_t s3c24xx_uart_r(uint32_t ch, uint32_t offset);
	void s3c24xx_uart_w(uint32_t ch, uint32_t offset, uint32_t data, uint32_t mem_mask);
	READ32_MEMBER( s3c24xx_uart_0_r );
	READ32_MEMBER( s3c24xx_uart_1_r );
	READ32_MEMBER( s3c24xx_uart_2_r );
	WRITE32_MEMBER( s3c24xx_uart_0_w );
	WRITE32_MEMBER( s3c24xx_uart_1_w );
	WRITE32_MEMBER( s3c24xx_uart_2_w );
	void s3c24xx_uart_fifo_w(int uart, uint8_t data);
	void s3c24xx_usb_device_reset();
	READ32_MEMBER( s3c24xx_usb_device_r );
	WRITE32_MEMBER( s3c24xx_usb_device_w );
	READ32_MEMBER( s3c24xx_wdt_r );
	void s3c24xx_wdt_start();
	void s3c24xx_wdt_stop();
	void s3c24xx_wdt_recalc();
	WRITE32_MEMBER( s3c24xx_wdt_w );
	TIMER_CALLBACK_MEMBER( s3c24xx_wdt_timer_exp );
	void s3c24xx_iic_reset();
	inline void iface_i2c_scl_w( int state);
	inline void iface_i2c_sda_w(int state);
	inline int iface_i2c_sda_r();
	void i2c_send_start();
	void i2c_send_stop();
	uint8_t i2c_receive_byte(int ack);
	int i2c_send_byte(uint8_t data);
	void iic_start();
	void iic_stop();
	void iic_resume();
	READ32_MEMBER( s3c24xx_iic_r );
	WRITE32_MEMBER( s3c24xx_iic_w );
	TIMER_CALLBACK_MEMBER( s3c24xx_iic_timer_exp );
	inline void iface_i2s_data_w(int ch, uint16_t data);
	void s3c24xx_iis_start();
	void s3c24xx_iis_stop();
	void s3c24xx_iis_recalc();
	READ32_MEMBER( s3c24xx_iis_r );
	WRITE32_MEMBER( s3c24xx_iis_w );
	TIMER_CALLBACK_MEMBER( s3c24xx_iis_timer_exp );
	READ32_MEMBER( s3c24xx_rtc_r );
	WRITE32_MEMBER( s3c24xx_rtc_w );
	TIMER_CALLBACK_MEMBER( s3c24xx_rtc_timer_tick_count_exp );
	void s3c24xx_rtc_update();
	void s3c24xx_rtc_check_alarm();
	TIMER_CALLBACK_MEMBER( s3c24xx_rtc_timer_update_exp );
	void s3c24xx_adc_reset();
	uint32_t iface_adc_data_r(int ch);
	READ32_MEMBER( s3c24xx_adc_r );
	void s3c24xx_adc_start();
	WRITE32_MEMBER( s3c24xx_adc_w );
	void s3c24xx_touch_screen(int state);
	void s3c24xx_spi_reset();
	uint32_t s3c24xx_spi_r(uint32_t ch, uint32_t offset);
	void s3c24xx_spi_w(uint32_t ch, uint32_t offset, uint32_t data, uint32_t mem_mask);
	READ32_MEMBER( s3c24xx_spi_0_r );
	READ32_MEMBER( s3c24xx_spi_1_r );
	WRITE32_MEMBER( s3c24xx_spi_0_w );
	WRITE32_MEMBER( s3c24xx_spi_1_w );
	void s3c24xx_sdi_reset();
	READ32_MEMBER( s3c24xx_sdi_r );
	WRITE32_MEMBER( s3c24xx_sdi_w );
	void s3c24xx_nand_reset();
	inline void iface_nand_command_w(uint8_t data);
	inline void iface_nand_address_w(uint8_t data);
	inline uint8_t iface_nand_data_r();
	inline void iface_nand_data_w(uint8_t data);
	void nand_update_mecc( uint8_t *ecc, int pos, uint8_t data);
	void nand_update_secc( uint8_t *ecc, int pos, uint8_t data);
	void s3c24xx_nand_update_ecc(uint8_t data);
	void s3c24xx_nand_command_w(uint8_t data);
	void s3c24xx_nand_address_w(uint8_t data);
	uint8_t s3c24xx_nand_data_r();
	void s3c24xx_nand_data_w(uint8_t data);
	READ32_MEMBER( s3c24xx_nand_r );
	void s3c24xx_nand_init_ecc();
	WRITE32_MEMBER( s3c24xx_nand_w );
	ATTR_UNUSED WRITE_LINE_MEMBER( s3c24xx_pin_frnb_w );
	READ32_MEMBER( s3c24xx_cam_r );
	WRITE32_MEMBER( s3c24xx_cam_w );
	READ32_MEMBER( s3c24xx_ac97_r );
	WRITE32_MEMBER( s3c24xx_ac97_w );
	void s3c24xx_nand_auto_boot();
	void s3c24xx_device_reset();
	void s3c24xx_device_start();

	void s3c2440_uart_fifo_w( int uart, uint8_t data);
	void s3c2440_request_irq( uint32_t int_type);

private:
	static constexpr unsigned UART_COUNT  = 3;
	static constexpr unsigned DMA_COUNT   = 4;
	static constexpr unsigned SPI_COUNT   = 2;

	/*******************************************************************************
	    TYPE DEFINITIONS
	*******************************************************************************/

	struct irq_regs_t
	{
		uint32_t srcpnd;
		uint32_t intmod;
		uint32_t intmsk;
		uint32_t priority;
		uint32_t intpnd;
		uint32_t intoffset;
		uint32_t subsrcpnd;
		uint32_t intsubmsk;
	};

	struct dma_regs_t
	{
		uint32_t disrc;
		uint32_t disrcc;
		uint32_t didst;
		uint32_t didstc;
		uint32_t dcon;
		uint32_t dstat;
		uint32_t dcsrc;
		uint32_t dcdst;
		uint32_t dmasktrig;
	};

	struct clkpow_regs_t
	{
		uint32_t locktime;
		uint32_t mpllcon;
		uint32_t upllcon;
		uint32_t clkcon;
		uint32_t clkslow;
		uint32_t clkdivn;
		uint32_t camdivn;
	};

	struct lcd_regs_t
	{
		uint32_t lcdcon1;
		uint32_t lcdcon2;
		uint32_t lcdcon3;
		uint32_t lcdcon4;
		uint32_t lcdcon5;
		uint32_t lcdsaddr1;
		uint32_t lcdsaddr2;
		uint32_t lcdsaddr3;
		uint32_t redlut;
		uint32_t greenlut;
		uint32_t bluelut;
		uint32_t reserved[8];
		uint32_t dithmode;
		uint32_t tpal;
		uint32_t lcdintpnd;
		uint32_t lcdsrcpnd;
		uint32_t lcdintmsk;
		uint32_t tconsel;
	};

	struct nand_regs_t
	{
		uint32_t nfconf;
		uint32_t nfcont;
		uint32_t nfcmd;
		uint32_t nfaddr;
		uint32_t nfdata;
		uint32_t nfmeccd0;
		uint32_t nfmeccd1;
		uint32_t nfseccd;
		uint32_t nfstat;
		uint32_t nfestat0;
		uint32_t nfestat1;
		uint32_t nfmecc0;
		uint32_t nfmecc1;
		uint32_t nfsecc;
		uint32_t nfsblk;
		uint32_t nfeblk;
	};

	struct usbdev_regs_t
	{
		uint32_t data[0x130/4];
	};

	struct iic_regs_t
	{
		uint32_t iiccon;
		uint32_t iicstat;
		uint32_t iicadd;
		uint32_t iicds;
		uint32_t iiclc;
	};

	struct gpio_regs_t
	{
		uint32_t gpacon;
		uint32_t gpadat;
		uint32_t pad_08;
		uint32_t pad_0c;
		uint32_t gpbcon;
		uint32_t gpbdat;
		uint32_t gpbup;
		uint32_t pad_1c;
		uint32_t gpccon;
		uint32_t gpcdat;
		uint32_t gpcup;
		uint32_t pad_2c;
		uint32_t gpdcon;
		uint32_t gpddat;
		uint32_t gpdup;
		uint32_t pad_3c;
		uint32_t gpecon;
		uint32_t gpedat;
		uint32_t gpeup;
		uint32_t pad_4c;
		uint32_t gpfcon;
		uint32_t gpfdat;
		uint32_t gpfup;
		uint32_t pad_5c;
		uint32_t gpgcon;
		uint32_t gpgdat;
		uint32_t gpgup;
		uint32_t pad_6c;
		uint32_t gphcon;
		uint32_t gphdat;
		uint32_t gphup;
		uint32_t pad_7c;
		uint32_t misccr;
		uint32_t dclkcon;
		uint32_t extint0;
		uint32_t extint1;
		uint32_t extint2;
		uint32_t eintflt0;
		uint32_t eintflt1;
		uint32_t eintflt2;
		uint32_t eintflt3;
		uint32_t eintmask;
		uint32_t eintpend;
		uint32_t gstatus0;
		uint32_t gstatus1;
		uint32_t gstatus2;
		uint32_t gstatus3;
		uint32_t gstatus4;
		uint32_t pad_c0;
		uint32_t pad_c4;
		uint32_t pad_c8;
		uint32_t mslcon;
		uint32_t gpjcon;
		uint32_t gpjdat;
		uint32_t gpjup;
	};

	struct adc_regs_t
	{
		uint32_t adccon;
		uint32_t adctsc;
		uint32_t adcdly;
		uint32_t adcdat0;
		uint32_t adcdat1;
		uint32_t adcupdn;
	};

	struct irq_t
	{
		irq_regs_t regs;
		int line_irq, line_fiq;
	};

	struct dma_t
	{
		dma_regs_t regs;
		emu_timer *timer;
	};

	struct clkpow_t
	{
		clkpow_regs_t regs;
	};

	struct lcd_t
	{
		lcd_regs_t regs;
		emu_timer *timer;
		std::unique_ptr<bitmap_rgb32> bitmap[2];
		uint32_t vramaddr_cur;
		uint32_t vramaddr_max;
		uint32_t offsize;
		uint32_t pagewidth_cur;
		uint32_t pagewidth_max;
		uint32_t bppmode;
		uint32_t bswp, hwswp;
		int vpos, hpos;
		double framerate;
		uint32_t tpal;
		uint32_t hpos_min, hpos_max, vpos_min, vpos_max;
		uint32_t dma_data, dma_bits;
	};

	struct nand_t
	{
		nand_regs_t regs;
		uint8_t mecc[4];
		uint8_t secc[2];
		int ecc_pos, data_count;
	};

	struct usbdev_t
	{
		usbdev_regs_t regs;
	};

	struct iic_t
	{
		iic_regs_t regs;
		emu_timer *timer;
		int count;
	};

	struct gpio_t
	{
		gpio_regs_t regs;
	};

	struct adc_t
	{
		adc_regs_t regs;
	};

	// internal state
	required_device<device_t> m_cpu;
	required_device<palette_device> m_palette;
	required_device<screen_device> m_screen;

	uint8_t m_steppingstone[4*1024];
	memcon_t m_memcon;
	usbhost_t m_usbhost;
	irq_t m_irq;
	dma_t m_dma[DMA_COUNT];
	clkpow_t m_clkpow;
	lcd_t m_lcd;
	lcdpal_t m_lcdpal;
	uart_t m_uart[UART_COUNT];
	pwm_t m_pwm;
	usbdev_t m_usbdev;
	wdt_t m_wdt;
	iic_t m_iic;
	iis_t m_iis;
	gpio_t m_gpio;
	rtc_t m_rtc;
	adc_t m_adc;
	spi_t m_spi[SPI_COUNT];
	devcb_read32 m_pin_r_cb;
	devcb_write32 m_pin_w_cb;
	devcb_read32 m_port_r_cb;
	devcb_write32 m_port_w_cb;
	devcb_write_line m_scl_w_cb;
	devcb_read_line m_sda_r_cb;
	devcb_write_line m_sda_w_cb;
	devcb_read32 m_data_r_cb;
	devcb_write16 m_data_w_cb;
	int m_flags;

	cam_t m_cam;
	ac97_t m_ac97;
	sdi_t m_sdi;
	nand_t m_nand;
	devcb_write8 m_command_w_cb;
	devcb_write8 m_address_w_cb;
	devcb_read8  m_nand_data_r_cb;
	devcb_write8 m_nand_data_w_cb;
};

DECLARE_DEVICE_TYPE(S3C2440, s3c2440_device)

#endif // MAME_MACHINE_S3C2440_H
span> "54 sec" ) PORT_DIPSETTING( 0x0000, "60 sec" ) PORT_DIPNAME( 0x0020, 0x0020, "Start credit" ) PORT_DIPSETTING( 0x0020, "1" ) PORT_DIPSETTING( 0x0000, "2" ) PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unused ) ) PORT_DIPSETTING( 0x0040, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) PORT_SERVICE( 0x0080, IP_ACTIVE_LOW ) PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* probably unused */ INPUT_PORTS_END static INPUT_PORTS_START( vgoalsoc ) PORT_INCLUDE( gstriker_generic ) PORT_START("DSW1") PORT_DIPNAME( 0x0007, 0x0007, DEF_STR( Coin_A ) ) PORT_DIPSETTING( 0x0000, DEF_STR( 4C_1C ) ) PORT_DIPSETTING( 0x0001, DEF_STR( 3C_1C ) ) PORT_DIPSETTING( 0x0002, DEF_STR( 2C_1C ) ) PORT_DIPSETTING( 0x0007, DEF_STR( 1C_1C ) ) PORT_DIPSETTING( 0x0006, DEF_STR( 1C_2C ) ) PORT_DIPSETTING( 0x0005, DEF_STR( 1C_3C ) ) PORT_DIPSETTING( 0x0004, DEF_STR( 1C_4C ) ) PORT_DIPSETTING( 0x0003, DEF_STR( 1C_6C ) ) PORT_DIPNAME( 0x0038, 0x0038, DEF_STR( Coin_B ) ) PORT_DIPSETTING( 0x0000, DEF_STR( 4C_1C ) ) PORT_DIPSETTING( 0x0008, DEF_STR( 3C_1C ) ) PORT_DIPSETTING( 0x0010, DEF_STR( 2C_1C ) ) PORT_DIPSETTING( 0x0038, DEF_STR( 1C_1C ) ) PORT_DIPSETTING( 0x0030, DEF_STR( 1C_2C ) ) PORT_DIPSETTING( 0x0028, DEF_STR( 1C_3C ) ) PORT_DIPSETTING( 0x0020, DEF_STR( 1C_4C ) ) PORT_DIPSETTING( 0x0018, DEF_STR( 1C_6C ) ) PORT_DIPNAME( 0x00c0, 0x00c0, DEF_STR (Unknown) ) // Probably difficulty PORT_DIPSETTING( 0x0080, "A" ) PORT_DIPSETTING( 0x00c0, "B" ) PORT_DIPSETTING( 0x0040, "C" ) PORT_DIPSETTING( 0x0000, "D" ) PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* probably unused */ PORT_START("DSW2") PORT_DIPNAME( 0x0003, 0x0003, "Player VS CPU Time" ) // no coperative PORT_DIPSETTING( 0x0002, "1:00" ) PORT_DIPSETTING( 0x0003, "1:30" ) PORT_DIPSETTING( 0x0001, "2:00" ) PORT_DIPSETTING( 0x0000, "2:30" ) PORT_DIPNAME( 0x000c, 0x000c, "Player VS Player Time" ) PORT_DIPSETTING( 0x0008, "1:30" ) PORT_DIPSETTING( 0x000c, "2:00" ) PORT_DIPSETTING( 0x0004, "2:30" ) PORT_DIPSETTING( 0x0000, "3:00" ) PORT_DIPNAME( 0x0010, 0x0010, "Countdown" ) PORT_DIPSETTING( 0x0010, "54 sec" ) PORT_DIPSETTING( 0x0000, "60 sec" ) PORT_DIPNAME( 0x0020, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPSETTING( 0x0020, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) PORT_DIPNAME( 0x0040, 0x0040, "DWS2:6" ) // hangs at POST PORT_DIPSETTING( 0x0040, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) PORT_DIPNAME( 0x0080, 0x0080, "Start credit" ) PORT_DIPSETTING( 0x0080, "1" ) PORT_DIPSETTING( 0x0000, "2" ) PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* probably unused */ INPUT_PORTS_END /*** MACHINE DRIVER **********************************************************/ static MACHINE_DRIVER_START( gstriker ) MDRV_CPU_ADD("maincpu", M68000, 10000000) MDRV_CPU_PROGRAM_MAP(gstriker_map) MDRV_CPU_VBLANK_INT("screen", irq1_line_hold) MDRV_CPU_ADD("audiocpu", Z80,8000000/2) /* 4 MHz ??? */ MDRV_CPU_PROGRAM_MAP(sound_map) MDRV_CPU_IO_MAP(sound_io_map) MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_AFTER_VBLANK) MDRV_SCREEN_ADD("screen", RASTER) MDRV_SCREEN_REFRESH_RATE(60) MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(5000) /* hand-tuned, it needs a bit */) MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16) MDRV_SCREEN_SIZE(64*8, 64*8) MDRV_SCREEN_VISIBLE_AREA(0*8, 40*8-1, 0*8, 28*8-1) MDRV_GFXDECODE(gstriker) MDRV_PALETTE_LENGTH(0x800) MDRV_VIDEO_START(gstriker) MDRV_VIDEO_UPDATE(gstriker) MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker") MDRV_SOUND_ADD("ym", YM2610, 8000000) MDRV_SOUND_CONFIG(ym2610_config) MDRV_SOUND_ROUTE(0, "lspeaker", 0.25) MDRV_SOUND_ROUTE(0, "rspeaker", 0.25) MDRV_SOUND_ROUTE(1, "lspeaker", 1.0) MDRV_SOUND_ROUTE(2, "rspeaker", 1.0) MACHINE_DRIVER_END static MACHINE_DRIVER_START( twrldc94 ) MDRV_IMPORT_FROM( gstriker ) MDRV_VIDEO_START( twrldc94 ) MACHINE_DRIVER_END static MACHINE_DRIVER_START( vgoal ) MDRV_CPU_ADD("maincpu", M68000, 16000000) MDRV_CPU_PROGRAM_MAP(vgoal_map) MDRV_CPU_VBLANK_INT("screen", irq1_line_hold) MDRV_CPU_ADD("audiocpu", Z80,8000000/2) /* 4 MHz ??? */ MDRV_CPU_PROGRAM_MAP(sound_map) MDRV_CPU_IO_MAP(sound_io_map) MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_AFTER_VBLANK) MDRV_SCREEN_ADD("screen", RASTER) MDRV_SCREEN_REFRESH_RATE(60) MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(5000) /* hand-tuned, it needs a bit */) MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16) MDRV_SCREEN_SIZE(64*8, 64*8) MDRV_SCREEN_VISIBLE_AREA(0*8, 40*8-1, 0*8, 28*8-1) MDRV_GFXDECODE(gstriker) MDRV_PALETTE_LENGTH(0x2000) MDRV_VIDEO_START(vgoalsoc) MDRV_VIDEO_UPDATE(gstriker) MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker") MDRV_SOUND_ADD("ym", YM2610, 8000000) MDRV_SOUND_CONFIG(ym2610_config) MDRV_SOUND_ROUTE(0, "lspeaker", 0.25) MDRV_SOUND_ROUTE(0, "rspeaker", 0.25) MDRV_SOUND_ROUTE(1, "lspeaker", 1.0) MDRV_SOUND_ROUTE(2, "rspeaker", 1.0) MACHINE_DRIVER_END /*** ROM LOADING *************************************************************/ ROM_START( gstriker ) ROM_REGION( 0x100000, "maincpu", 0 ) ROM_LOAD16_WORD_SWAP( "human-1.u58", 0x00000, 0x80000, CRC(45cf4857) SHA1(8133a9a7bdd547cc3d69140a68a1a5a7341e9f5b) ) ROM_REGION( 0x40000, "audiocpu", 0 ) ROM_LOAD( "human-3_27c1001.u87", 0x00000, 0x20000, CRC(2f28c01e) SHA1(63829ad7969d197b2f2c87cb88bdb9e9880ed2d6) ) ROM_RELOAD( 0x10000, 0x20000 ) ROM_REGION( 0x20000, "gfx1", 0 ) // score tilemap ROM_LOAD( "human-2_27c1024.u79", 0x00000, 0x20000, CRC(a981993b) SHA1(ed92c7581d2b84a8628744dd5f8a2266c45dcd5b) ) ROM_REGION( 0x200000, "gfx2", 0 ) // scroll tilemap ROM_LOAD( "human_scr-gs-105_m531602c-44_3405356.u2", 0x00000, 0x200000, CRC(d584b568) SHA1(64c5e4fdbb859873e51f62d8f5314598108270ef) ) ROM_LOAD( "human_scr-gs-105_m531602c-44_3405356.u4", 0x00000, 0x200000, CRC(d584b568) SHA1(64c5e4fdbb859873e51f62d8f5314598108270ef) ) // same content, dif pos on board ROM_REGION( 0x1000000, "gfx3", 0 ) ROM_LOAD( "human_scr-gs-101_m531602c-40_3405351.u25", 0x000000, 0x200000, CRC(becaea24) SHA1(e96fca863f49f50992f56c7defa5a69599608785) ) ROM_LOAD( "human_scr-gs-102_m531602c-41_3405355.u24", 0x200000, 0x200000, CRC(0dae7aba) SHA1(304f336994be33fa8239c13e6fd9967c06f97d5c) ) ROM_LOAD( "human_scr-gs-103_m531602c-42_3405353.u23", 0x400000, 0x200000, CRC(3448fe92) SHA1(c4c2d2d5610795aff6633b0601ff484897598904) ) ROM_LOAD( "human_scr-gs-104_m531602c-43_3405354.u22", 0x600000, 0x200000, CRC(0ac33e5a) SHA1(9d7717d80f2c6817bac3fad50c39e04f0aa94255) ) ROM_LOAD( "human-4_27c240.u6", 0xf80000, 0x080000, CRC(a990f9bb) SHA1(7ce31d4c650eb244e2ab285f253a98d6613b7dc8) ) ROM_REGION( 0x40000, "ym.deltat", 0 ) ROM_LOAD( "human_scr-gs-106_m532001b-16_3402370.u93", 0x00000, 0x040000, CRC(93c9868c) SHA1(dcecb34e46405155e35aaf134b8547430d23f5a7) ) ROM_REGION( 0x100000, "ym", 0 ) ROM_LOAD( "scrgs107.u99", 0x00000, 0x100000, CRC(ecc0a01b) SHA1(239e832b7d22925460a8f44eb82e782cd13aba49) ) ROM_REGION( 0x1000, "plds", 0 ) ROM_LOAD( "pal16l8.s201a.u52", 0x0000, 0x0104, CRC(724faf0f) SHA1(755fad09d188af58efce733a9f1256b1abc7c360) ) ROM_LOAD( "pal16l8.s202a.u74", 0x0200, 0x0104, CRC(ad5c4722) SHA1(0aad71b73c6674e15596b7de59160a5156a4118d) ) ROM_LOAD( "pal16l8.s203a.u75", 0x0400, 0x0104, CRC(ad197e2d) SHA1(e0691b79b8433285a0bafea1d52b0166f6417c20) ) ROM_LOAD( "pal16l8.s204a.u89", 0x0600, 0x0104, CRC(eb997577) SHA1(504a2499c8a96c74607d06aefb0a062612a78b38) ) ROM_LOAD( "pal16l8.s205a.u109", 0x0800, 0x0104, CRC(0d644e59) SHA1(bb8f4ab47d7bc9b9b37f636f8fa9c419f17630ad) ) ROM_END ROM_START( gstrikea ) ROM_REGION( 0x100000, "maincpu", 0 ) ROM_LOAD16_WORD_SWAP( "human-1_27c4002.u58", 0x00000, 0x80000, CRC(7cf45320) SHA1(4127c93fe5f863cecf0a005c66129c0eb660f5dd) ) ROM_REGION( 0x40000, "audiocpu", 0 ) ROM_LOAD( "human-3_27c1001.u87", 0x00000, 0x20000, CRC(2f28c01e) SHA1(63829ad7969d197b2f2c87cb88bdb9e9880ed2d6) ) ROM_RELOAD( 0x10000, 0x20000 ) ROM_REGION( 0x20000, "gfx1", 0 ) // score tilemap ROM_LOAD( "human-2_27c1024.u79", 0x00000, 0x20000, CRC(a981993b) SHA1(ed92c7581d2b84a8628744dd5f8a2266c45dcd5b) ) ROM_REGION( 0x200000, "gfx2", 0 ) // scroll tilemap ROM_LOAD( "human_scr-gs-105_m531602c-44_3405356.u2", 0x00000, 0x200000, CRC(d584b568) SHA1(64c5e4fdbb859873e51f62d8f5314598108270ef) ) ROM_LOAD( "human_scr-gs-105_m531602c-44_3405356.u4", 0x00000, 0x200000, CRC(d584b568) SHA1(64c5e4fdbb859873e51f62d8f5314598108270ef) ) // same content, dif pos on board ROM_REGION( 0x1000000, "gfx3", 0 ) ROM_LOAD( "human_scr-gs-101_m531602c-40_3405351.u25", 0x000000, 0x200000, CRC(becaea24) SHA1(e96fca863f49f50992f56c7defa5a69599608785) ) ROM_LOAD( "human_scr-gs-102_m531602c-41_3405355.u24", 0x200000, 0x200000, CRC(0dae7aba) SHA1(304f336994be33fa8239c13e6fd9967c06f97d5c) ) ROM_LOAD( "human_scr-gs-103_m531602c-42_3405353.u23", 0x400000, 0x200000, CRC(3448fe92) SHA1(c4c2d2d5610795aff6633b0601ff484897598904) ) ROM_LOAD( "human_scr-gs-104_m531602c-43_3405354.u22", 0x600000, 0x200000, CRC(0ac33e5a) SHA1(9d7717d80f2c6817bac3fad50c39e04f0aa94255) ) ROM_LOAD( "human-4_27c240.u6", 0xf80000, 0x080000, CRC(a990f9bb) SHA1(7ce31d4c650eb244e2ab285f253a98d6613b7dc8) ) ROM_REGION( 0x40000, "ym.deltat", 0 ) ROM_LOAD( "human_scr-gs-106_m532001b-16_3402370.u93", 0x00000, 0x040000, CRC(93c9868c) SHA1(dcecb34e46405155e35aaf134b8547430d23f5a7) ) ROM_REGION( 0x100000, "ym", 0 ) ROM_LOAD( "scrgs107.u99", 0x00000, 0x100000, CRC(ecc0a01b) SHA1(239e832b7d22925460a8f44eb82e782cd13aba49) ) /* PALs were protected on this version, used the ones from the "gstriker" set */ ROM_REGION( 0x1000, "plds", 0 ) ROM_LOAD( "pal16l8.s201a.u52", 0x0000, 0x0104, CRC(724faf0f) SHA1(755fad09d188af58efce733a9f1256b1abc7c360) ) ROM_LOAD( "pal16l8.s202a.u74", 0x0200, 0x0104, CRC(ad5c4722) SHA1(0aad71b73c6674e15596b7de59160a5156a4118d) ) ROM_LOAD( "pal16l8.s203a.u75", 0x0400, 0x0104, CRC(ad197e2d) SHA1(e0691b79b8433285a0bafea1d52b0166f6417c20) ) ROM_LOAD( "pal16l8.s204a.u89", 0x0600, 0x0104, CRC(eb997577) SHA1(504a2499c8a96c74607d06aefb0a062612a78b38) ) ROM_LOAD( "pal16l8.s205a.u109", 0x0800, 0x0104, CRC(0d644e59) SHA1(bb8f4ab47d7bc9b9b37f636f8fa9c419f17630ad) ) ROM_END ROM_START( vgoalsoc ) ROM_REGION( 0x100000, "maincpu", 0 ) ROM_LOAD16_WORD_SWAP( "c16_u37.u37", 0x00000, 0x80000, CRC(18c05440) SHA1(0fc78ee0ba6d7817d4a93a80f668f193c352c00d) ) ROM_REGION( 0x40000, "audiocpu", 0 ) ROM_LOAD( "c16_u65.u65", 0x000000, 0x040000, CRC(2f7bf23c) SHA1(1a1a06f57bbac59807679e3762cb2f23ab1ad35e) ) ROM_REGION( 0x20000, "mcu", 0 ) ROM_LOAD( "vgoalsoc_hd6473258p10", 0x00000, 0x20000, NO_DUMP ) ROM_REGION( 0x20000, "gfx1", 0 ) // score tilemap ROM_LOAD( "c16_u48.u48", 0x000000, 0x020000, CRC(ca059e7f) SHA1(2fa48b0fec1210575f3a1ecee7d2aec0af3fa9c4) ) ROM_REGION( 0x100000, "gfx2", 0 ) // screen tilemap ROM_LOAD( "c13_u20.u20", 0x000000, 0x100000, CRC(bc6e07e8) SHA1(3f164165a2eed909aaf38d1ae23a622482d39f96) ) ROM_LOAD( "c13_u17.u17", 0x000000, 0x100000, CRC(bc6e07e8) SHA1(3f164165a2eed909aaf38d1ae23a622482d39f96) ) // same content, dif pos on board ROM_REGION( 0x400000, "gfx3", 0 ) ROM_LOAD( "c13_u11.u11", 0x000000, 0x200000, CRC(76d09f27) SHA1(ffef83954426f9e56bbe2d98b32cea675c063fab) ) ROM_LOAD( "c13_u12.u12", 0x200000, 0x200000, CRC(a3874419) SHA1(c9fa283106ada3419e311f400fcf4251b32318c4) ) ROM_REGION( 0x40000, "ym.deltat", 0 ) ROM_LOAD( "c13_u86.u86", 0x000000, 0x040000, CRC(4b76a162) SHA1(38dcb7536662f5f520e59f3ff746b42e9df789d2) ) ROM_REGION( 0x200000, "ym", 0 ) ROM_LOAD( "c13_u104.104", 0x000000, 0x200000, CRC(8437b6f8) SHA1(79f183dcbf3cde5c77e086e4fdd8341809396e37) ) ROM_END ROM_START( vgoalsca ) ROM_REGION( 0x100000, "maincpu", 0 ) ROM_LOAD16_WORD_SWAP( "vgoalc16.u37", 0x00000, 0x80000, CRC(775ef300) SHA1(d0ab1c13a19ce646c6edfc25a0c0994989560cbc) ) ROM_REGION( 0x40000, "audiocpu", 0 ) ROM_LOAD( "c16_u65.u65", 0x000000, 0x040000, CRC(2f7bf23c) SHA1(1a1a06f57bbac59807679e3762cb2f23ab1ad35e) ) ROM_REGION( 0x20000, "mcu", 0 ) ROM_LOAD( "vgoalsoc_hd6473258p10", 0x00000, 0x20000, NO_DUMP ) ROM_REGION( 0x20000, "gfx1", 0 ) // fixed tile ROM_LOAD( "c16_u48.u48", 0x000000, 0x020000, CRC(ca059e7f) SHA1(2fa48b0fec1210575f3a1ecee7d2aec0af3fa9c4) ) ROM_REGION( 0x200000, "gfx2", 0 ) // scroll tile ROM_LOAD( "vgoalc16.u20", 0x000000, 0x200000, CRC(2b211fb2) SHA1(4e04e099a1dae7abdb0732808a5d74fdc7afcf45) ) ROM_LOAD( "vgoalc16.u17", 0x000000, 0x200000, CRC(2b211fb2) SHA1(4e04e099a1dae7abdb0732808a5d74fdc7afcf45) ) // same content, dif pos on board ROM_REGION( 0x400000, "gfx3", 0 ) ROM_LOAD( "vgoalc16.u11", 0x000000, 0x200000, CRC(5bc3146c) SHA1(ede4def1ddc4390fed8fd89643900967faff3640) ) ROM_LOAD( "c13_u12.u12", 0x200000, 0x200000, CRC(a3874419) SHA1(c9fa283106ada3419e311f400fcf4251b32318c4) ) ROM_REGION( 0x40000, "ym.deltat", 0 ) ROM_LOAD( "c13_u86.u86", 0x000000, 0x040000, CRC(4b76a162) SHA1(38dcb7536662f5f520e59f3ff746b42e9df789d2) ) ROM_REGION( 0x100000, "ym", 0 ) ROM_LOAD( "vgoalc16.104", 0x000000, 0x100000, CRC(6fb06e1b) SHA1(c4584b480fe1165f8e2f887acaa578690514d35d) ) ROM_END ROM_START( twrldc94 ) ROM_REGION( 0x100000, "maincpu", 0 ) ROM_LOAD16_WORD_SWAP( "13.u37", 0x00000, 0x80000, CRC(42adb463) SHA1(ec7bcb684489b56f81ab851a9d8f42d54679363b) ) ROM_REGION( 0x40000, "audiocpu", 0 ) ROM_LOAD( "12.u65", 0x000000, 0x040000, CRC(f316e7fc) SHA1(a2215605518e7293774735371c65abcead99bd88) ) ROM_REGION( 0x20000, "mcu", 0 ) ROM_LOAD( "twcup94_hd6473258p10", 0x00000, 0x20000, NO_DUMP ) ROM_REGION( 0x20000, "gfx1", 0 ) // fixed tile ROM_LOAD( "11.u48", 0x000000, 0x020000, CRC(37d6dcb6) SHA1(679dd8b615497fff23c4638d413b5d4a724d3f2a) ) ROM_REGION( 0x200000, "gfx2", 0 ) // scroll tile ROM_LOAD( "u17", 0x000000, 0x200000, CRC(a5e40a61) SHA1(a2cb452fb069862570870653b29b045d12caf062) ) ROM_LOAD( "u20", 0x000000, 0x200000, CRC(a5e40a61) SHA1(a2cb452fb069862570870653b29b045d12caf062) ) ROM_REGION( 0x800000, "gfx3", 0 ) ROM_LOAD( "u11", 0x000000, 0x200000, CRC(dd93fd45) SHA1(26491815b5443fe6d8b1ef4d795c5151fd75c101) ) ROM_LOAD( "u12", 0x200000, 0x200000, CRC(8e3c9bd2) SHA1(bfd23157c836148a3860ccea5191f656fdd98ef4) ) ROM_LOAD( "u13", 0x400000, 0x200000, CRC(8db6b3a9) SHA1(9422cd5d6fb57a7eaa7a13bdf4ccee1f8b57f773) ) ROM_LOAD( "u14", 0x600000, 0x200000, CRC(89739c31) SHA1(29cd779bfe93448fb6cbfe6f8e3661dd659c0d21) ) ROM_REGION( 0x40000, "ym.deltat", 0 ) ROM_LOAD( "u86", 0x000000, 0x040000, CRC(775f45dc) SHA1(1a740dd880d9f873e93dfc096fbcae1784b4f522) ) ROM_REGION( 0x100000, "ym", 0 ) ROM_LOAD( "u104", 0x000000, 0x100000, CRC(df07d0af) SHA1(356560e164ff222bc9004fe202f829c93244a6c9) ) ROM_END ROM_START( twrdc94a ) ROM_REGION( 0x100000, "maincpu", 0 ) ROM_LOAD16_WORD_SWAP( "twrdc94a_13.u37", 0x00000, 0x80000, CRC(08f314ee) SHA1(3fca5050f5bcd60533d3bd9dea81ba631a98bfd6) ) ROM_REGION( 0x40000, "audiocpu", 0 ) ROM_LOAD( "twrdc94a_12.u65", 0x000000, 0x040000, CRC(c131f5a4) SHA1(d8cc7c463ad628f6f052489a73b97f998532738d) ) ROM_REGION( 0x20000, "mcu", 0 ) ROM_LOAD( "twcup94_hd6473258p10", 0x00000, 0x20000, NO_DUMP ) ROM_REGION( 0x20000, "gfx1", 0 ) // fixed tile ROM_LOAD( "twrdc94a_11.u48", 0x000000, 0x020000, CRC(37d6dcb6) SHA1(679dd8b615497fff23c4638d413b5d4a724d3f2a) ) ROM_REGION( 0x200000, "gfx2", 0 ) // scroll tile ROM_LOAD( "u17", 0x000000, 0x200000, CRC(a5e40a61) SHA1(a2cb452fb069862570870653b29b045d12caf062) ) ROM_LOAD( "u20", 0x000000, 0x200000, CRC(a5e40a61) SHA1(a2cb452fb069862570870653b29b045d12caf062) ) ROM_REGION( 0x800000, "gfx3", 0 ) ROM_LOAD( "u11", 0x000000, 0x200000, CRC(dd93fd45) SHA1(26491815b5443fe6d8b1ef4d795c5151fd75c101) ) ROM_LOAD( "u12", 0x200000, 0x200000, CRC(8e3c9bd2) SHA1(bfd23157c836148a3860ccea5191f656fdd98ef4) ) ROM_LOAD( "u13", 0x400000, 0x200000, CRC(8db6b3a9) SHA1(9422cd5d6fb57a7eaa7a13bdf4ccee1f8b57f773) ) ROM_LOAD( "u14", 0x600000, 0x200000, CRC(89739c31) SHA1(29cd779bfe93448fb6cbfe6f8e3661dd659c0d21) ) ROM_REGION( 0x40000, "ym.deltat", 0 ) ROM_LOAD( "u86", 0x000000, 0x040000, CRC(775f45dc) SHA1(1a740dd880d9f873e93dfc096fbcae1784b4f522) ) ROM_REGION( 0x100000, "ym", 0 ) ROM_LOAD( "u104", 0x000000, 0x100000, CRC(df07d0af) SHA1(356560e164ff222bc9004fe202f829c93244a6c9) ) ROM_END /****************************************************************************************** Simple protection check concept.The M68k writes a command and the MCU returns the PC at address 0xffc000. The problem is that only the concept is easy,beating this protection requires a good amount of time without a trojan... Misc Notes: -Protection routine is at 0x890 -An original feature of this game is that if you enter into service mode the game gives you the possibility to test various stuff on a pre-registered play such as the speed or the zooming.To use it,you should use Player 2 Start button to show the test screens or to advance into the tests. ******************************************************************************************/ #define PC(_num_)\ work_ram[0x000/2] = (_num_ & 0xffff0000) >> 16;\ work_ram[0x002/2] = (_num_ & 0x0000ffff) >> 0; static int gametype = 0; static UINT16 mcu_data = 0; static WRITE16_HANDLER( twrldc94_mcu_w ) { mcu_data = data; } static READ16_HANDLER( twrldc94_mcu_r ) { return mcu_data; } static UINT16 prot_reg[2] = {0,0}; // current,last static WRITE16_HANDLER( twrldc94_prot_reg_w ) { prot_reg[1] = prot_reg[0]; prot_reg[0] = data; if( ((prot_reg[1] & 2) == 2) && ((prot_reg[0] & 2) == 0) ) { switch( gametype ) { case 1: switch(mcu_data) { #define NULL_SUB 0x0000828E case 0x53: PC(0x0000a4c); break; // boot -> main loop /* 68 and 62 could be sprite or sound changes, or ? 68(),61() if( !carry ) { 68(),65() } else { 62(),72() } */ case 0x68: PC(NULL_SUB); break; // time up doesn't block long enough for pk shootout case 0x61: PC(0x0003AF4); break; // after time up, pk shootout??? case 0x65: PC(0x0003F26); break; // 62->72 case 0x62: PC(NULL_SUB); break; // after lose shootout, continue ??? case 0x72: PC(0x000409E); break; // game over /* Attract mode is pre programmed loop called from main that runs through top11->demoplay (NOTE: sprites for demo play are being drawn at 0x141000, this address is used in a few places, and there's some activity further up around 0x1410b0.) The loop begins with three prot calls: one always present (may be diversion to 0x0010DC8 unreachable code and prot cases 6a,79,6f) and two alternating calls. The loop is 6e -> [6b|69] -> top11 -> (4 segment)playdemo These are the likely suspects for attract mode: 0x0010E28 red tecmo on black 0x0010EEC bouncing ball and player with game title 0x00117A2 single segment demo play with player sprites at 0x140000 0x001120A sliding display of player photos 0x0010DC8 unreachable code at end of attract loop with cases 6a,79,6f */ case 0x6e: PC(0x0010E28); break; // loop case 0x6b: PC(0x0010EEC); break; // attract even case 0x69: PC(0x001120A); break; // attract odd // In "continue" screen // if( w@FFE078 & 80) 75 // *** after 75 beq case 0x75: PC(NULL_SUB); break; // unreachable code at end of attract loop 6a->79->6f case 0x6a: PC(NULL_SUB); break; case 0x79: PC(NULL_SUB); break; case 0x6f: PC(NULL_SUB); break; default: popmessage("Unknown MCU CMD %04x",mcu_data); PC(NULL_SUB); break; } break; case 2: switch(mcu_data) { case 0x53: PC(0x00000a5c); break; // POST default: popmessage("Unknown MCU CMD %04x",mcu_data); PC(NULL_SUB); break; } break; case 3: switch(mcu_data) { case 0x33: PC(0x00063416); break; // *after game over, is this right? case 0x3d: PC(0x0006275C); break; // after sprite ram init, team select case 0x42: PC(0x0006274E); break; // after press start, init sprite ram case 0x43: PC(0x0006a000); break; // POST case 0x50: PC(0x00001900); break; // enter main loop case 0x65: PC(0x0006532C); break; // results case 0x70: PC(0x00063416); break; // *attract loop ends, what should happen after "standings" display? case 0x74: PC(0x000650D8); break; // after time up, show scores and continue case 0x79: PC(0x0006072E); break; // after select, start match default: popmessage("Unknown MCU CMD %04x",mcu_data); PC(0x00000586); // rts break; } break; } } } static READ16_HANDLER( twrldc94_prot_reg_r ) { // bit 0 is for debugging vgoalsoc? // Setting it results in a hang with a digit displayed on screen // For twrldc94, it just disables sound. return prot_reg[0]; } /* vgoalsoc uses a set of programmable timers. There is a code implementation for at 00065F00 that appears to have been RTSed out. I'm guessing it was replaced with an external implementation. This does indicate though that the protection could be performing other more complicated functions. The tick count is usually set to 0x3c => it's driven off vblank? */ //work_ram[ (0xffe900 - 0xffc00) ] #define COUNTER1_ENABLE work_ram[0x2900/2] >> 8 #define COUNTER2_ENABLE (work_ram[0x2900/2] & 0xff) #define TICK_1 work_ram[0x2908/2] #define TICKCOUNT_1 work_ram[0x290a/2] #define TICK_2 work_ram[0x290c/2] #define TICKCOUNT_3 work_ram[0x290e/2] #define COUNTER_1 work_ram[0x2928/2] #define COUNTER_2 work_ram[0x292a/2] static READ16_HANDLER( vbl_toggle_r ) { return 0xff; } static WRITE16_HANDLER( vbl_toggle_w ) { if( COUNTER1_ENABLE == 1 ) { TICK_1 = (TICK_1 - 1) & 0xff; // 8bit if( TICK_1 <= 0 ) { TICK_1 = TICKCOUNT_1; COUNTER_1 = (COUNTER_1 - 1);// & 0xff; has to be 16bit for continue timer. } } if( COUNTER2_ENABLE == 2 ) { TICK_2 = (TICK_2 - 1) & 0xff; if( TICK_2 <= 0 ) { TICK_2 = TICKCOUNT_3; COUNTER_2 = (COUNTER_2 - 1);// & 0xff; } } } static void mcu_init( running_machine *machine ) { dmmy_8f_ret = 0xFFFF; pending_command = 0; mcu_data = 0; memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x20008a, 0x20008b, 0, 0, twrldc94_mcu_w); memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x20008a, 0x20008b, 0, 0, twrldc94_mcu_r); memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x20008e, 0x20008f, 0, 0, twrldc94_prot_reg_w); memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x20008e, 0x20008f, 0, 0, twrldc94_prot_reg_r); } static DRIVER_INIT( twrldc94 ) { gametype = 1; mcu_init( machine ); } static DRIVER_INIT( twrldc94a ) { gametype = 2; mcu_init( machine ); } static DRIVER_INIT( vgoalsoc ) { gametype = 3; mcu_init( machine ); memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x200090, 0x200091, 0, 0, vbl_toggle_w); // vblank toggle memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x200090, 0x200091, 0, 0, vbl_toggle_r); } /*** GAME DRIVERS ************************************************************/ GAME( 1993, gstriker, 0, gstriker, gstriker, 0, ROT0, "Human", "Grand Striker", GAME_IMPERFECT_GRAPHICS ) GAME( 1993, gstrikea, gstriker, gstriker, gstriker, 0, ROT0, "Human", "Grand Striker (Americas)", GAME_IMPERFECT_GRAPHICS ) /* Similar, but not identical hardware, appear to be protected by an MCU :-( */ GAME( 1994, vgoalsoc, 0, vgoal, vgoalsoc, vgoalsoc, ROT0, "Tecmo", "V Goal Soccer (set 1)", GAME_NOT_WORKING ) GAME( 1994, vgoalsca, vgoalsoc, vgoal, vgoalsoc, vgoalsoc, ROT0, "Tecmo", "V Goal Soccer (set 2)", GAME_NOT_WORKING ) GAME( 1994, twrldc94, 0, twrldc94, twrldc94, twrldc94, ROT0, "Tecmo", "Tecmo World Cup '94 (set 1)", GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION | GAME_IMPERFECT_GRAPHICS ) GAME( 1994, twrdc94a, twrldc94, twrldc94, twrldc94, twrldc94a, ROT0, "Tecmo", "Tecmo World Cup '94 (set 2)", GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION | GAME_IMPERFECT_GRAPHICS )