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Diffstat (limited to 'src/mame/drivers/apollo.cpp')
-rw-r--r--src/mame/drivers/apollo.cpp68
1 files changed, 34 insertions, 34 deletions
diff --git a/src/mame/drivers/apollo.cpp b/src/mame/drivers/apollo.cpp
index 1ea7243a613..cf9440d09e7 100644
--- a/src/mame/drivers/apollo.cpp
+++ b/src/mame/drivers/apollo.cpp
@@ -97,27 +97,27 @@
#define DEFAULT_NODE_ID 0x12345
-static UINT8 cache_control_register = 0x00;
-static UINT8 cache_status_register = 0xff;
-static UINT8 task_alias_register = 0x00;
+static uint8_t cache_control_register = 0x00;
+static uint8_t cache_status_register = 0xff;
+static uint8_t task_alias_register = 0x00;
static offs_t parity_error_offset = 0;
-static UINT16 parity_error_byte_mask = 0;
+static uint16_t parity_error_byte_mask = 0;
static int parity_error_handler_is_installed = 0;
static int parity_error_handler_install_counter = 0;
-static UINT16 latch_page_on_parity_error_register = 0x0000;
-static UINT16 master_req_register = 0x0000;
+static uint16_t latch_page_on_parity_error_register = 0x0000;
+static uint16_t master_req_register = 0x0000;
-static UINT32 ram_base_address;
-static UINT32 ram_end_address;
+static uint32_t ram_base_address;
+static uint32_t ram_end_address;
static int node_type;
// FIXME: value of ram_config_byte must match with default/selected RAM size
-static UINT8 ram_config_byte;
+static uint8_t ram_config_byte;
-static UINT32 log_line_counter = 0;
+static uint32_t log_line_counter = 0;
/***************************************************************************
cpu_context - return a string describing which CPU is currently executing and their PC
@@ -201,7 +201,7 @@ int apollo_is_dsp3x00(void) {
apollo_get_ram_config_byte - get the ram configuration byte
***************************************************************************/
-UINT8 apollo_get_ram_config_byte(void) {
+uint8_t apollo_get_ram_config_byte(void) {
return ram_config_byte;
}
@@ -211,13 +211,13 @@ UINT8 apollo_get_ram_config_byte(void) {
***************************************************************************/
READ32_MEMBER(apollo_state::apollo_instruction_hook)
{
- static UINT16 idle_counter = 0;
+ static uint16_t idle_counter = 0;
// m_maincpu->ir still has previous instruction
- UINT16 last_ir = m_maincpu->ir;
+ uint16_t last_ir = m_maincpu->ir;
// get next instruction (or 0 if unavailable)
- UINT16 next_ir = (m_maincpu->pref_addr == REG_PC(m_maincpu)) ? m_maincpu->pref_data : 0;
+ uint16_t next_ir = (m_maincpu->pref_addr == REG_PC(m_maincpu)) ? m_maincpu->pref_data : 0;
// check for NULLPROC:
// 027C F8FF AND.W #F8FF,SR
@@ -301,7 +301,7 @@ WRITE8_MEMBER(apollo_state::cache_control_register_w){
}
READ8_MEMBER(apollo_state::cache_status_register_r){
- UINT8 data = cache_status_register;
+ uint8_t data = cache_status_register;
if (apollo_is_dn5500()) {
#define DN5500_CSR_NOT_HSI_PRESENT 8
@@ -313,8 +313,8 @@ READ8_MEMBER(apollo_state::cache_status_register_r){
return data;
}
-void apollo_set_cache_status_register(device_t *device,UINT8 mask, UINT8 data) {
- UINT16 new_value = (cache_status_register & ~mask) | (data & mask);
+void apollo_set_cache_status_register(device_t *device,uint8_t mask, uint8_t data) {
+ uint16_t new_value = (cache_status_register & ~mask) | (data & mask);
if (new_value != cache_status_register) {
cache_status_register = new_value;
DLOG2(("setting Cache Status Register with data=%02x and mask=%02x to %02x",
@@ -333,7 +333,7 @@ WRITE8_MEMBER(apollo_state::task_alias_register_w){
}
READ8_MEMBER(apollo_state::task_alias_register_r){
- UINT8 data = 0xff;
+ uint8_t data = 0xff;
SLOG(("reading Task Alias Register at offset %02x = %02x", offset, data));
return data;
}
@@ -348,7 +348,7 @@ WRITE16_MEMBER(apollo_state::latch_page_on_parity_error_register_w){
}
READ16_MEMBER(apollo_state::latch_page_on_parity_error_register_r){
- UINT16 data = latch_page_on_parity_error_register;
+ uint16_t data = latch_page_on_parity_error_register;
SLOG2(("reading Latch Page on Error Parity Register at offset %02x = %04x", offset*2, data));
return data;
}
@@ -363,7 +363,7 @@ WRITE8_MEMBER(apollo_state::master_req_register_w){
}
READ8_MEMBER(apollo_state::master_req_register_r){
- UINT8 data = 0xff;
+ uint8_t data = 0xff;
SLOG1(("reading Master REQ Register at offset %02x = %02x", offset, data));
return data;
}
@@ -393,7 +393,7 @@ WRITE16_MEMBER(apollo_state::selective_clear_locations_w){
}
READ16_MEMBER(apollo_state::selective_clear_locations_r){
- UINT16 data = 0xffff;
+ uint16_t data = 0xffff;
SLOG1(("reading Selective Clear Locations at offset %02x = %02x", offset*2, data));
return data;
}
@@ -403,7 +403,7 @@ READ16_MEMBER(apollo_state::selective_clear_locations_r){
***************************************************************************/
READ32_MEMBER(apollo_state::ram_with_parity_r){
- UINT32 data = m_messram_ptr[parity_error_offset+offset];
+ uint32_t data = m_messram_ptr[parity_error_offset+offset];
SLOG2(("memory dword read with parity error at %08x = %08x & %08x parity_byte=%04x",
ram_base_address + parity_error_offset*4 + offset*4,data, mem_mask, parity_error_byte_mask));
@@ -526,10 +526,10 @@ WRITE32_MEMBER(apollo_state::apollo_rom_w)
READ16_MEMBER(apollo_state::apollo_atbus_io_r)
{
- UINT32 isa_addr = (offset & 3) + ((offset & ~0x1ff) >> 7);
+ uint32_t isa_addr = (offset & 3) + ((offset & ~0x1ff) >> 7);
// Motorola CPU is MSB first, ISA Bus is LSB first
- UINT16 data = m_isa->io16_swap_r(space, isa_addr, mem_mask);
+ uint16_t data = m_isa->io16_swap_r(space, isa_addr, mem_mask);
SLOG2(("apollo_atbus_io_r at %08x -> %04x = %04x & %04x", ATBUS_IO_BASE + offset*2, isa_addr*2, data, mem_mask));
@@ -538,7 +538,7 @@ READ16_MEMBER(apollo_state::apollo_atbus_io_r)
WRITE16_MEMBER(apollo_state::apollo_atbus_io_w)
{
- UINT32 isa_addr = (offset & 3) + ((offset & ~0x1ff) >> 7);
+ uint32_t isa_addr = (offset & 3) + ((offset & ~0x1ff) >> 7);
SLOG2(("apollo_atbus_io_w at %08x -> %04x = %04x & %04x", ATBUS_IO_BASE + offset*2, isa_addr*2, data, mem_mask));
@@ -552,7 +552,7 @@ WRITE16_MEMBER(apollo_state::apollo_atbus_io_w)
READ16_MEMBER(apollo_state::apollo_atbus_memory_r)
{
- UINT16 data;
+ uint16_t data;
// Motorola CPU is MSB first, ISA Bus is LSB first
data = m_isa->prog16_swap_r(space, offset, mem_mask);
@@ -576,22 +576,22 @@ WRITE16_MEMBER(apollo_state::apollo_atbus_memory_w)
READ16_MEMBER(apollo_state::apollo_atbus_unmap_io_r)
{
// ISA bus has 0xff for unmapped addresses
- UINT16 data = 0xffff;
- UINT32 isa_addr = (offset & 3) + ((offset & ~0x1ff) >> 7);
+ uint16_t data = 0xffff;
+ uint32_t isa_addr = (offset & 3) + ((offset & ~0x1ff) >> 7);
SLOG1(("apollo_atbus_unmap_io_r at %08x -> %04x = %04x & %04x", ATBUS_IO_BASE + offset*2, isa_addr*2, data, mem_mask));
return data;
}
WRITE16_MEMBER(apollo_state::apollo_atbus_unmap_io_w)
{
- UINT32 isa_addr = (offset & 3) + ((offset & ~0x1ff) >> 7);
+ uint32_t isa_addr = (offset & 3) + ((offset & ~0x1ff) >> 7);
SLOG1(("apollo_atbus_unmap_io_w at %08x -> %04x = %04x & %04x", ATBUS_IO_BASE + offset*2, isa_addr*2, data, mem_mask));
}
READ8_MEMBER(apollo_state::apollo_atbus_unmap_r)
{
// ISA bus has 0xff for unmapped addresses
- UINT8 data = 0xff;
+ uint8_t data = 0xff;
SLOG2(("apollo_atbus_unmap_r at %08x = %02x & %02x", ATBUS_MEMORY_BASE + offset, data, mem_mask));
return data;
}
@@ -611,7 +611,7 @@ WRITE8_MEMBER(apollo_state::dn5500_memory_present_register_w){
}
READ8_MEMBER(apollo_state::dn5500_memory_present_register_r){
- UINT8 data = DN5500_MEM_PRESENT_BYTE;
+ uint8_t data = DN5500_MEM_PRESENT_BYTE;
SLOG(("reading DN5500 Memory Present Register at offset %02x = %02x", offset, data));
return data;
}
@@ -625,7 +625,7 @@ WRITE8_MEMBER(apollo_state::dn5500_11500_w){
}
READ8_MEMBER(apollo_state::dn5500_11500_r){
- UINT8 data = 0xff;
+ uint8_t data = 0xff;
SLOG1(("reading DN5500 11500 at offset %02x = %02x", offset, data));
return data;
}
@@ -640,7 +640,7 @@ WRITE8_MEMBER(apollo_state::dn5500_io_protection_map_w){
}
READ8_MEMBER(apollo_state::dn5500_io_protection_map_r){
- UINT8 data = 0xff;
+ uint8_t data = 0xff;
SLOG1(("reading DN5500 I/O Protection Map at offset %02x = %02x", offset, data));
return data;
}
@@ -652,7 +652,7 @@ READ8_MEMBER(apollo_state::dn5500_io_protection_map_r){
READ32_MEMBER(apollo_state::apollo_f8_r){
offs_t address = 0xf8000000 + offset * 4;
- UINT32 data = 0xffffffff;
+ uint32_t data = 0xffffffff;
SLOG2(("unexpected memory dword read from %08x = %08x & %08x",
address, data, mem_mask));
return data;