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-rw-r--r--src/lib/netlist/devices/nlid_system.h49
-rw-r--r--src/lib/netlist/plib/pexception.cpp3
-rw-r--r--src/lib/netlist/plib/pgsl.h5
3 files changed, 28 insertions, 29 deletions
diff --git a/src/lib/netlist/devices/nlid_system.h b/src/lib/netlist/devices/nlid_system.h
index d299c2b3b69..c1c44e764e1 100644
--- a/src/lib/netlist/devices/nlid_system.h
+++ b/src/lib/netlist/devices/nlid_system.h
@@ -196,10 +196,10 @@ namespace devices
/// Consider the following mixing stage
///
/// R1
- /// S1 >-----1RRRR2---------+
+ /// I1 >-----1RRRR2---------+
/// |
/// R2 |
- /// S2 >-----1RRRR2---------+----------> Out
+ /// I2 >-----1RRRR2---------+----------> Out
/// |
/// R
/// R3 R
@@ -207,45 +207,37 @@ namespace devices
/// |
/// GND
///
- /// With OPTIMIZE_FRONTIER(R2.2, R3, R2) this becomes:
+ /// With OPTIMIZE_FRONTIER(R2.1, R2, RX) where RX is the impedance of the
+ /// output connected to I2 this becomes:
///
/// R1
- /// S1 >-----1RRRR2--------------------------------+
+ /// I1 >-----1RRRR2--------------------------------+
/// |
- /// ########################## |
- /// R2 # R2 # |
- /// S2 >-----1RRRR2-----+-->AnIn AnOut>--RRRR------+----------> Out
- /// # | # |
- /// # R # R
- /// # R R3 # R3 R
- /// # R # R
- /// # | # |
- /// # GND Frontier # GND
- /// # #
- /// ##########################
+ /// ########################## |
+ /// # RX # R2 |
+ /// I2 >----->--+-AnIn AnOut>--RRRR--->---1RRRR2---+----------> Out
+ /// # | # |
+ /// # R # R
+ /// # R R2 # R3 R
+ /// # R # R
+ /// # | # |
+ /// # GND Frontier # GND
+ /// # #
+ /// ##########################
///
/// As a result, provided there are no other connections between the parts
/// generating S1 and S2 the "S2 part" will now have a separate solver.
///
- /// The size (aka number of nets) of the solver for S1 will be smaller.
- /// The size of the solver for S2 and the rest of the circuit will be smaller
+ /// The size (aka number of nets) of the solver for I1 will be smaller.
+ /// The size of the solver for I2 and the rest of the circuit will be smaller
/// as well.
///
- ///
- ///
- ///
- ///
- ///
- ///
- ///
- ///
- ///
NETLIB_OBJECT(frontier)
{
NETLIB_CONSTRUCTOR(frontier)
- , m_RIN(*this, "m_RIN", NETLIB_DELEGATE(input))
- , m_ROUT(*this, "m_ROUT", NETLIB_DELEGATE(input))
+ , m_RIN(*this, "m_RIN", NETLIB_DELEGATE(input)) // FIXME: does not look right
+ , m_ROUT(*this, "m_ROUT", NETLIB_DELEGATE(input)) // FIXME: does not look right
, m_I(*this, "_I", NETLIB_DELEGATE(input))
, m_Q(*this, "_Q")
, m_p_RIN(*this, "RIN", nlconst::magic(1.0e6))
@@ -264,6 +256,7 @@ namespace devices
private:
NETLIB_RESETI()
{
+ //printf("%s: in %f out %f\n", name().c_str(), m_p_RIN(), m_p_ROUT());
m_RIN.set_G_V_I(plib::reciprocal(m_p_RIN()),0,0);
m_ROUT.set_G_V_I(plib::reciprocal(m_p_ROUT()),0,0);
}
diff --git a/src/lib/netlist/plib/pexception.cpp b/src/lib/netlist/plib/pexception.cpp
index 9bae5896985..0b8b96faed9 100644
--- a/src/lib/netlist/plib/pexception.cpp
+++ b/src/lib/netlist/plib/pexception.cpp
@@ -117,7 +117,8 @@ namespace plib {
if (fpexceptions & plib::FP_UNDERFLOW) b = b | FE_UNDERFLOW;
if (fpexceptions & plib::FP_OVERFLOW) b = b | FE_OVERFLOW;
if (fpexceptions & plib::FP_INVALID) b = b | FE_INVALID;
- m_last_enabled = feenableexcept(b);
+ if ((b & m_last_enabled) != b)
+ m_last_enabled = feenableexcept(b);
}
#elif defined(_WIN32) && defined(_EM_INEXACT)
if (m_enable)
diff --git a/src/lib/netlist/plib/pgsl.h b/src/lib/netlist/plib/pgsl.h
index 4ddc957b9ac..cb95ecc334c 100644
--- a/src/lib/netlist/plib/pgsl.h
+++ b/src/lib/netlist/plib/pgsl.h
@@ -116,6 +116,11 @@ namespace plib {
using pgsl::narrow_cast;
+ /// \brief cast to void *
+ ///
+ /// The purpose here is to help identifiy casts to void in the code.
+ /// These case usuallyindicate some wizard assumptioms which should be easily
+ /// be easy to identify.
template <typename T>
constexpr void * void_ptr_cast(T *ptr) noexcept { return static_cast<void *>(ptr); }