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Diffstat (limited to 'src/emu/video/tlc34076.c')
-rw-r--r--src/emu/video/tlc34076.c122
1 files changed, 60 insertions, 62 deletions
diff --git a/src/emu/video/tlc34076.c b/src/emu/video/tlc34076.c
index 34bb369d8e0..7ac4937b26f 100644
--- a/src/emu/video/tlc34076.c
+++ b/src/emu/video/tlc34076.c
@@ -10,17 +10,17 @@
#include "emu.h"
#include "tlc34076.h"
-#define PALETTE_WRITE_ADDR 0x00
-#define PALETTE_DATA 0x01
-#define PIXEL_READ_MASK 0x02
-#define PALETTE_READ_ADDR 0x03
-#define GENERAL_CONTROL 0x08
-#define INPUT_CLOCK_SEL 0x09
-#define OUTPUT_CLOCK_SEL 0x0a
-#define MUX_CONTROL 0x0b
-#define PALETTE_PAGE 0x0c
-#define TEST_REGISTER 0x0e
-#define RESET_STATE 0x0f
+#define PALETTE_WRITE_ADDR 0x00
+#define PALETTE_DATA 0x01
+#define PIXEL_READ_MASK 0x02
+#define PALETTE_READ_ADDR 0x03
+#define GENERAL_CONTROL 0x08
+#define INPUT_CLOCK_SEL 0x09
+#define OUTPUT_CLOCK_SEL 0x0a
+#define MUX_CONTROL 0x0b
+#define PALETTE_PAGE 0x0c
+#define TEST_REGISTER 0x0e
+#define RESET_STATE 0x0f
struct tlc34076_state
{
@@ -108,14 +108,14 @@ static DEVICE_RESET( tlc34076 )
tlc34076_state *state = get_safe_token(device);
/* reset the registers */
- state->regs[PIXEL_READ_MASK] = 0xff;
- state->regs[GENERAL_CONTROL] = 0x03;
- state->regs[INPUT_CLOCK_SEL] = 0x00;
- state->regs[OUTPUT_CLOCK_SEL] = 0x3f;
- state->regs[MUX_CONTROL] = 0x2d;
- state->regs[PALETTE_PAGE] = 0x00;
- state->regs[TEST_REGISTER] = 0x00;
- state->regs[RESET_STATE] = 0x00;
+ state->regs[PIXEL_READ_MASK] = 0xff;
+ state->regs[GENERAL_CONTROL] = 0x03;
+ state->regs[INPUT_CLOCK_SEL] = 0x00;
+ state->regs[OUTPUT_CLOCK_SEL] = 0x3f;
+ state->regs[MUX_CONTROL] = 0x2d;
+ state->regs[PALETTE_PAGE] = 0x00;
+ state->regs[TEST_REGISTER] = 0x00;
+ state->regs[RESET_STATE] = 0x00;
}
@@ -199,55 +199,55 @@ WRITE8_DEVICE_HANDLER( tlc34076_w )
case GENERAL_CONTROL:
/*
- 7 6 5 4 3 2 1 0
- X X X X X X X 0 HSYNCOUT is active-low
- X X X X X X X 1 HSYNCOUT is active-high (default)
- X X X X X X 0 X VSYNCOUT is active-low
- X X X X X X 1 X VSYNCOUT is active-high (default)
- X X X X X 0 X X Disable split shift register transfer (default)
- X X X X 0 1 X X Enable split shift register transfer
- X X X X 0 X X X Disable special nibble mode (default)
- X X X X 1 0 X X Enable special nibble mode
- X X X 0 X X X X 0-IRE pedestal (default)
- X X X 1 X X X X 7.5-IRE pedestal
- X X 0 X X X X X Disable sync (default)
- X X 1 X X X X X Enable sync
- X 0 X X X X X X Little-endian mode (default)
- X 1 X X X X X X Big-endian mode
- 0 X X X X X X X MUXOUT is low (default)
- 1 X X X X X X X MUXOUT is high
- */
+ 7 6 5 4 3 2 1 0
+ X X X X X X X 0 HSYNCOUT is active-low
+ X X X X X X X 1 HSYNCOUT is active-high (default)
+ X X X X X X 0 X VSYNCOUT is active-low
+ X X X X X X 1 X VSYNCOUT is active-high (default)
+ X X X X X 0 X X Disable split shift register transfer (default)
+ X X X X 0 1 X X Enable split shift register transfer
+ X X X X 0 X X X Disable special nibble mode (default)
+ X X X X 1 0 X X Enable special nibble mode
+ X X X 0 X X X X 0-IRE pedestal (default)
+ X X X 1 X X X X 7.5-IRE pedestal
+ X X 0 X X X X X Disable sync (default)
+ X X 1 X X X X X Enable sync
+ X 0 X X X X X X Little-endian mode (default)
+ X 1 X X X X X X Big-endian mode
+ 0 X X X X X X X MUXOUT is low (default)
+ 1 X X X X X X X MUXOUT is high
+ */
break;
case INPUT_CLOCK_SEL:
/*
- 3 2 1 0
- 0 0 0 0 Select CLK0 as clock source?
- 0 0 0 1 Select CLK1 as clock source
- 0 0 1 0 Select CLK2 as clock source
- 0 0 1 1 Select CLK3 as TTL clock source
- 0 1 0 0 Select CLK3 as TTL clock source
- 1 0 0 0 Select CLK3 and CLK3 as ECL clock sources
- */
+ 3 2 1 0
+ 0 0 0 0 Select CLK0 as clock source?
+ 0 0 0 1 Select CLK1 as clock source
+ 0 0 1 0 Select CLK2 as clock source
+ 0 0 1 1 Select CLK3 as TTL clock source
+ 0 1 0 0 Select CLK3 as TTL clock source
+ 1 0 0 0 Select CLK3 and CLK3 as ECL clock sources
+ */
break;
case OUTPUT_CLOCK_SEL:
/*
- 0 0 0 X X X VCLK frequency = DOTCLK frequency
- 0 0 1 X X X VCLK frequency = DOTCLK frequency/2
- 0 1 0 X X X VCLK frequency = DOTCLK frequency/4
- 0 1 1 X X X VCLK frequency = DOTCLK frequency/8
- 1 0 0 X X X VCLK frequency = DOTCLK frequency/16
- 1 0 1 X X X VCLK frequency = DOTCLK frequency/32
- 1 1 X X X X VCLK output held at logic high level (default condition)
- X X X 0 0 0 SCLK frequency = DOTCLK frequency
- X X X 0 0 1 SCLK frequency = DOTCLK frequency/2
- X X X 0 1 0 SCLK frequency = DOTCLK frequency/4
- X X X 0 1 1 SCLK frequency = DOTCLK frequency/8
- X X X 1 0 0 SCLK frequency = DOTCLK frequency/16
- X X X 1 0 1 SCLK frequency = DOTCLK frequency/32
- X X X 1 1 X SCLK output held at logic level low (default condition)
- */
+ 0 0 0 X X X VCLK frequency = DOTCLK frequency
+ 0 0 1 X X X VCLK frequency = DOTCLK frequency/2
+ 0 1 0 X X X VCLK frequency = DOTCLK frequency/4
+ 0 1 1 X X X VCLK frequency = DOTCLK frequency/8
+ 1 0 0 X X X VCLK frequency = DOTCLK frequency/16
+ 1 0 1 X X X VCLK frequency = DOTCLK frequency/32
+ 1 1 X X X X VCLK output held at logic high level (default condition)
+ X X X 0 0 0 SCLK frequency = DOTCLK frequency
+ X X X 0 0 1 SCLK frequency = DOTCLK frequency/2
+ X X X 0 1 0 SCLK frequency = DOTCLK frequency/4
+ X X X 0 1 1 SCLK frequency = DOTCLK frequency/8
+ X X X 1 0 0 SCLK frequency = DOTCLK frequency/16
+ X X X 1 0 1 SCLK frequency = DOTCLK frequency/32
+ X X X 1 1 X SCLK output held at logic level low (default condition)
+ */
break;
case RESET_STATE:
@@ -315,5 +315,3 @@ void tlc34076_device::device_reset()
{
DEVICE_RESET_NAME( tlc34076 )(this);
}
-
-