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-rw-r--r--src/emu/sound/cdp1864.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/src/emu/sound/cdp1864.c b/src/emu/sound/cdp1864.c
index 6bc9233fd7c..c2fcc343e4e 100644
--- a/src/emu/sound/cdp1864.c
+++ b/src/emu/sound/cdp1864.c
@@ -11,14 +11,14 @@
TODO:
- - interlace mode
- - PAL output, currently using RGB
- - cpu synchronization
-
- SC1 and SC0 are used to provide CDP1864C-to-CPU synchronization for a jitter-free display.
- During every horizontal sync the CDP1864C samples SC0 and SC1 for SC0 = 1 and SC1 = 0
- (CDP1800 execute state). Detection of a fetch cycle causes the CDP1864C to skip cycles to
- attain synchronization. (i.e. picture moves 8 pixels to the right)
+ - interlace mode
+ - PAL output, currently using RGB
+ - cpu synchronization
+
+ SC1 and SC0 are used to provide CDP1864C-to-CPU synchronization for a jitter-free display.
+ During every horizontal sync the CDP1864C samples SC0 and SC1 for SC0 = 1 and SC1 = 0
+ (CDP1800 execute state). Detection of a fetch cycle causes the CDP1864C to skip cycles to
+ attain synchronization. (i.e. picture moves 8 pixels to the right)
*/