diff options
Diffstat (limited to 'src/emu/machine')
-rw-r--r-- | src/emu/machine/68681.c | 8 | ||||
-rw-r--r-- | src/emu/machine/matsucd.c | 4 | ||||
-rw-r--r-- | src/emu/machine/msm6242.h | 4 | ||||
-rw-r--r-- | src/emu/machine/pc16552d.c | 8 | ||||
-rw-r--r-- | src/emu/machine/rtc9701.h | 4 | ||||
-rw-r--r-- | src/emu/machine/s3520cf.h | 4 | ||||
-rw-r--r-- | src/emu/machine/s3c2400.h | 148 | ||||
-rw-r--r-- | src/emu/machine/s3c2410.h | 156 | ||||
-rw-r--r-- | src/emu/machine/s3c2440.h | 172 | ||||
-rw-r--r-- | src/emu/machine/scsibus.h | 4 | ||||
-rw-r--r-- | src/emu/machine/v3021.h | 4 |
11 files changed, 258 insertions, 258 deletions
diff --git a/src/emu/machine/68681.c b/src/emu/machine/68681.c index 395d244b073..45ecfa325bf 100644 --- a/src/emu/machine/68681.c +++ b/src/emu/machine/68681.c @@ -44,7 +44,7 @@ static const char *const duart68681_reg_write_names[0x10] = #define RX_FIFO_SIZE 3 -typedef struct +struct DUART68681_CHANNEL { /* Registers */ UINT8 CR; /* Command register */ @@ -70,9 +70,9 @@ typedef struct UINT8 tx_ready; emu_timer *tx_timer; -} DUART68681_CHANNEL; +}; -typedef struct +struct duart68681_state { /* device */ device_t *device; @@ -99,7 +99,7 @@ typedef struct /* UART channels */ DUART68681_CHANNEL channel[2]; -} duart68681_state; +}; INLINE duart68681_state *get_safe_token(device_t *device) { diff --git a/src/emu/machine/matsucd.c b/src/emu/machine/matsucd.c index 7778eb5b0db..f913812822b 100644 --- a/src/emu/machine/matsucd.c +++ b/src/emu/machine/matsucd.c @@ -27,7 +27,7 @@ can be expanded with support for the other drives as needed. #define MATSU_STATUS_MEDIA ( 1 << 6 ) /* media present (in caddy or tray) */ #define MATSU_STATUS_DOORCLOSED ( 1 << 7 ) /* tray status */ -typedef struct +struct matsucd { UINT8 enabled; /* /ENABLE - Unit enabled */ UINT8 cmd_signal; /* /CMD - Command mode */ @@ -53,7 +53,7 @@ typedef struct cdrom_file *cdrom; device_t *cdda; emu_timer *frame_timer; -} matsucd; +}; static matsucd cd; diff --git a/src/emu/machine/msm6242.h b/src/emu/machine/msm6242.h index 25e8b5f82bd..7e6fa35ad60 100644 --- a/src/emu/machine/msm6242.h +++ b/src/emu/machine/msm6242.h @@ -30,11 +30,11 @@ struct msm6242_interface devcb_write_line m_out_int_cb; }; -typedef struct +struct rtc_regs_t { UINT8 sec, min, hour, day, wday, month; UINT16 year; -} rtc_regs_t; +}; // ======================> msm6242_device diff --git a/src/emu/machine/pc16552d.c b/src/emu/machine/pc16552d.c index 00f7e4b68f5..50cbb9cc71b 100644 --- a/src/emu/machine/pc16552d.c +++ b/src/emu/machine/pc16552d.c @@ -34,7 +34,7 @@ #define INT_ENABLE_RX_LINE_STATUS 0x04 #define INT_ENABLE_MODEM_STATUS 0x08 -typedef struct +struct PC16552D_CHANNEL { UINT16 divisor; UINT8 reg[8]; @@ -48,15 +48,15 @@ typedef struct int tx_fifo_write_ptr; int tx_fifo_num; emu_timer *tx_fifo_timer; -} PC16552D_CHANNEL; +}; -typedef struct +struct PC16552D_REGS { PC16552D_CHANNEL ch[2]; int frequency; void (* irq_handler)(running_machine &machine, int channel, int value); void (* tx_callback)(running_machine &machine, int channel, int count, UINT8* data); -} PC16552D_REGS; +}; #define MAX_PC16552D_CHIPS 4 diff --git a/src/emu/machine/rtc9701.h b/src/emu/machine/rtc9701.h index 9c5b96be74c..3f1e07d9bad 100644 --- a/src/emu/machine/rtc9701.h +++ b/src/emu/machine/rtc9701.h @@ -37,10 +37,10 @@ typedef enum } rtc9701_state_t; -typedef struct +struct rtc_regs_t { UINT8 sec, min, hour, day, wday, month, year; -} rtc_regs_t; +}; // ======================> rtc9701_device diff --git a/src/emu/machine/s3520cf.h b/src/emu/machine/s3520cf.h index e2808300da4..e7c1d58eee5 100644 --- a/src/emu/machine/s3520cf.h +++ b/src/emu/machine/s3520cf.h @@ -29,10 +29,10 @@ typedef enum RTC_SET_DATA } s3520cf_state_t; -typedef struct +struct rtc_regs_t { UINT8 sec, min, hour, day, wday, month, year; -} rtc_regs_t; +}; // ======================> s3520cf_device diff --git a/src/emu/machine/s3c2400.h b/src/emu/machine/s3c2400.h index 7cf177f41aa..d59e5ee4120 100644 --- a/src/emu/machine/s3c2400.h +++ b/src/emu/machine/s3c2400.h @@ -407,17 +407,17 @@ void s3c2400_uart_fifo_w( device_t *device, int uart, UINT8 data); TYPE DEFINITIONS *******************************************************************************/ -typedef struct +struct s3c24xx_memcon_regs_t { UINT32 data[0x34/4]; -} s3c24xx_memcon_regs_t; +}; -typedef struct +struct s3c24xx_usbhost_regs_t { UINT32 data[0x5C/4]; -} s3c24xx_usbhost_regs_t; +}; -typedef struct +struct s3c24xx_irq_regs_t { UINT32 srcpnd; UINT32 intmod; @@ -425,9 +425,9 @@ typedef struct UINT32 priority; UINT32 intpnd; UINT32 intoffset; -} s3c24xx_irq_regs_t; +}; -typedef struct +struct s3c24xx_dma_regs_t { UINT32 disrc; UINT32 didst; @@ -436,9 +436,9 @@ typedef struct UINT32 dcsrc; UINT32 dcdst; UINT32 dmasktrig; -} s3c24xx_dma_regs_t; +}; -typedef struct +struct s3c24xx_clkpow_regs_t { UINT32 locktime; UINT32 mpllcon; @@ -446,9 +446,9 @@ typedef struct UINT32 clkcon; UINT32 clkslow; UINT32 clkdivn; -} s3c24xx_clkpow_regs_t; +}; -typedef struct +struct s3c24xx_lcd_regs_t { UINT32 lcdcon1; UINT32 lcdcon2; @@ -464,14 +464,14 @@ typedef struct UINT32 reserved[8]; UINT32 dithmode; UINT32 tpal; -} s3c24xx_lcd_regs_t; +}; -typedef struct +struct s3c24xx_lcdpal_regs_t { UINT32 data[0x400/4]; -} s3c24xx_lcdpal_regs_t; +}; -typedef struct +struct s3c24xx_uart_regs_t { UINT32 ulcon; UINT32 ucon; @@ -484,9 +484,9 @@ typedef struct UINT32 utxh; UINT32 urxh; UINT32 ubrdiv; -} s3c24xx_uart_regs_t; +}; -typedef struct +struct s3c24xx_pwm_regs_t { UINT32 tcfg0; UINT32 tcfg1; @@ -505,38 +505,38 @@ typedef struct UINT32 tcnto3; UINT32 tcntb4; UINT32 tcnto4; -} s3c24xx_pwm_regs_t; +}; -typedef struct +struct s3c24xx_usbdev_regs_t { UINT32 data[0xBC/4]; -} s3c24xx_usbdev_regs_t; +}; -typedef struct +struct s3c24xx_wdt_regs_t { UINT32 wtcon; UINT32 wtdat; UINT32 wtcnt; -} s3c24xx_wdt_regs_t; +}; -typedef struct +struct s3c24xx_iic_regs_t { UINT32 iiccon; UINT32 iicstat; UINT32 iicadd; UINT32 iicds; -} s3c24xx_iic_regs_t; +}; -typedef struct +struct s3c24xx_iis_regs_t { UINT32 iiscon; UINT32 iismod; UINT32 iispsr; UINT32 iisfcon; UINT32 iisfifo; -} s3c24xx_iis_regs_t; +}; -typedef struct +struct s3c24xx_gpio_regs_t { UINT32 gpacon; UINT32 gpadat; @@ -561,9 +561,9 @@ typedef struct UINT32 opencr; UINT32 misccr; UINT32 extint; -} s3c24xx_gpio_regs_t; +}; -typedef struct +struct s3c24xx_rtc_regs_t { UINT32 rtccon; UINT32 ticnt; @@ -583,15 +583,15 @@ typedef struct UINT32 bcddow; UINT32 bcdmon; UINT32 bcdyear; -} s3c24xx_rtc_regs_t; +}; -typedef struct +struct s3c24xx_adc_regs_t { UINT32 adccon; UINT32 adcdat; -} s3c24xx_adc_regs_t; +}; -typedef struct +struct s3c24xx_spi_regs_t { UINT32 spcon; UINT32 spsta; @@ -599,41 +599,41 @@ typedef struct UINT32 sppre; UINT32 sptdat; UINT32 sprdat; -} s3c24xx_spi_regs_t; +}; -typedef struct +struct s3c24xx_mmc_regs_t { UINT32 data[0x40/4]; -} s3c24xx_mmc_regs_t; +}; -typedef struct +struct s3c24xx_memcon_t { s3c24xx_memcon_regs_t regs; -} s3c24xx_memcon_t; +}; -typedef struct +struct s3c24xx_usbhost_t { s3c24xx_usbhost_regs_t regs; -} s3c24xx_usbhost_t; +}; -typedef struct +struct s3c24xx_irq_t { s3c24xx_irq_regs_t regs; int line_irq, line_fiq; -} s3c24xx_irq_t; +}; -typedef struct +struct s3c24xx_dma_t { s3c24xx_dma_regs_t regs; emu_timer *timer; -} s3c24xx_dma_t; +}; -typedef struct +struct s3c24xx_clkpow_t { s3c24xx_clkpow_regs_t regs; -} s3c24xx_clkpow_t; +}; -typedef struct +struct s3c24xx_lcd_t { s3c24xx_lcd_regs_t regs; emu_timer *timer; @@ -650,81 +650,81 @@ typedef struct UINT32 tpal; UINT32 hpos_min, hpos_max, vpos_min, vpos_max; UINT32 dma_data, dma_bits; -} s3c24xx_lcd_t; +}; -typedef struct +struct s3c24xx_lcdpal_t { s3c24xx_lcdpal_regs_t regs; -} s3c24xx_lcdpal_t; +}; -typedef struct +struct s3c24xx_uart_t { s3c24xx_uart_regs_t regs; -} s3c24xx_uart_t; +}; -typedef struct +struct s3c24xx_pwm_t { s3c24xx_pwm_regs_t regs; emu_timer *timer[5]; UINT32 cnt[5]; UINT32 cmp[5]; UINT32 freq[5]; -} s3c24xx_pwm_t; +}; -typedef struct +struct s3c24xx_usbdev_t { s3c24xx_usbdev_regs_t regs; -} s3c24xx_usbdev_t; +}; -typedef struct +struct s3c24xx_wdt_t { s3c24xx_wdt_regs_t regs; emu_timer *timer; -} s3c24xx_wdt_t; +}; -typedef struct +struct s3c24xx_iic_t { s3c24xx_iic_regs_t regs; emu_timer *timer; int count; -} s3c24xx_iic_t; +}; -typedef struct +struct s3c24xx_iis_t { s3c24xx_iis_regs_t regs; emu_timer *timer; UINT16 fifo[16/2]; int fifo_index; -} s3c24xx_iis_t; +}; -typedef struct +struct s3c24xx_gpio_t { s3c24xx_gpio_regs_t regs; -} s3c24xx_gpio_t; +}; -typedef struct +struct s3c24xx_rtc_t { s3c24xx_rtc_regs_t regs; emu_timer *timer_tick_count; emu_timer *timer_update; -} s3c24xx_rtc_t; +}; -typedef struct +struct s3c24xx_adc_t { s3c24xx_adc_regs_t regs; -} s3c24xx_adc_t; +}; -typedef struct +struct s3c24xx_spi_t { s3c24xx_spi_regs_t regs; -} s3c24xx_spi_t; +}; -typedef struct +struct s3c24xx_mmc_t { s3c24xx_mmc_regs_t regs; -} s3c24xx_mmc_t; +}; -typedef struct +struct s3c24xx_t { const s3c2400_interface *iface; s3c24xx_memcon_t memcon; @@ -745,6 +745,6 @@ typedef struct s3c24xx_adc_t adc; s3c24xx_spi_t spi[S3C24XX_SPI_COUNT]; s3c24xx_mmc_t mmc; -} s3c24xx_t; +}; #endif diff --git a/src/emu/machine/s3c2410.h b/src/emu/machine/s3c2410.h index b446f970194..0054f2c026c 100644 --- a/src/emu/machine/s3c2410.h +++ b/src/emu/machine/s3c2410.h @@ -498,17 +498,17 @@ static const UINT32 MAP_SUBINT_TO_INT[11] = TYPE DEFINITIONS *******************************************************************************/ -typedef struct +struct s3c24xx_memcon_regs_t { UINT32 data[0x34/4]; -} s3c24xx_memcon_regs_t; +}; -typedef struct +struct s3c24xx_usbhost_regs_t { UINT32 data[0x5C/4]; -} s3c24xx_usbhost_regs_t; +}; -typedef struct +struct s3c24xx_irq_regs_t { UINT32 srcpnd; UINT32 intmod; @@ -518,9 +518,9 @@ typedef struct UINT32 intoffset; UINT32 subsrcpnd; UINT32 intsubmsk; -} s3c24xx_irq_regs_t; +}; -typedef struct +struct s3c24xx_dma_regs_t { UINT32 disrc; UINT32 disrcc; @@ -531,9 +531,9 @@ typedef struct UINT32 dcsrc; UINT32 dcdst; UINT32 dmasktrig; -} s3c24xx_dma_regs_t; +}; -typedef struct +struct s3c24xx_clkpow_regs_t { UINT32 locktime; UINT32 mpllcon; @@ -541,9 +541,9 @@ typedef struct UINT32 clkcon; UINT32 clkslow; UINT32 clkdivn; -} s3c24xx_clkpow_regs_t; +}; -typedef struct +struct s3c24xx_lcd_regs_t { UINT32 lcdcon1; UINT32 lcdcon2; @@ -563,14 +563,14 @@ typedef struct UINT32 lcdsrcpnd; UINT32 lcdintmsk; UINT32 lpcsel; -} s3c24xx_lcd_regs_t; +}; -typedef struct +struct s3c24xx_lcdpal_regs_t { UINT32 data[0x400/4]; -} s3c24xx_lcdpal_regs_t; +}; -typedef struct +struct s3c24xx_nand_regs_t { UINT32 nfconf; UINT32 nfcmd; @@ -578,9 +578,9 @@ typedef struct UINT32 nfdata; UINT32 nfstat; UINT32 nfecc; -} s3c24xx_nand_regs_t; +}; -typedef struct +struct s3c24xx_uart_regs_t { UINT32 ulcon; UINT32 ucon; @@ -593,9 +593,9 @@ typedef struct UINT32 utxh; UINT32 urxh; UINT32 ubrdiv; -} s3c24xx_uart_regs_t; +}; -typedef struct +struct s3c24xx_pwm_regs_t { UINT32 tcfg0; UINT32 tcfg1; @@ -614,38 +614,38 @@ typedef struct UINT32 tcnto3; UINT32 tcntb4; UINT32 tcnto4; -} s3c24xx_pwm_regs_t; +}; -typedef struct +struct s3c24xx_usbdev_regs_t { UINT32 data[0x130/4]; -} s3c24xx_usbdev_regs_t; +}; -typedef struct +struct s3c24xx_wdt_regs_t { UINT32 wtcon; UINT32 wtdat; UINT32 wtcnt; -} s3c24xx_wdt_regs_t; +}; -typedef struct +struct s3c24xx_iic_regs_t { UINT32 iiccon; UINT32 iicstat; UINT32 iicadd; UINT32 iicds; -} s3c24xx_iic_regs_t; +}; -typedef struct +struct s3c24xx_iis_regs_t { UINT32 iiscon; UINT32 iismod; UINT32 iispsr; UINT32 iisfcon; UINT32 iisfifo; -} s3c24xx_iis_regs_t; +}; -typedef struct +struct s3c24xx_gpio_regs_t { UINT32 gpacon; UINT32 gpadat; @@ -695,9 +695,9 @@ typedef struct UINT32 gstatus2; UINT32 gstatus3; UINT32 gstatus4; -} s3c24xx_gpio_regs_t; +}; -typedef struct +struct s3c24xx_rtc_regs_t { UINT32 rtccon; UINT32 ticnt; @@ -717,18 +717,18 @@ typedef struct UINT32 bcddow; UINT32 bcdmon; UINT32 bcdyear; -} s3c24xx_rtc_regs_t; +}; -typedef struct +struct s3c24xx_adc_regs_t { UINT32 adccon; UINT32 adctsc; UINT32 adcdly; UINT32 adcdat0; UINT32 adcdat1; -} s3c24xx_adc_regs_t; +}; -typedef struct +struct s3c24xx_spi_regs_t { UINT32 spcon; UINT32 spsta; @@ -736,41 +736,41 @@ typedef struct UINT32 sppre; UINT32 sptdat; UINT32 sprdat; -} s3c24xx_spi_regs_t; +}; -typedef struct +struct s3c24xx_sdi_regs_t { UINT32 data[0x44/4]; -} s3c24xx_sdi_regs_t; +}; -typedef struct +struct s3c24xx_memcon_t { s3c24xx_memcon_regs_t regs; -} s3c24xx_memcon_t; +}; -typedef struct +struct s3c24xx_usbhost_t { s3c24xx_usbhost_regs_t regs; -} s3c24xx_usbhost_t; +}; -typedef struct +struct s3c24xx_irq_t { s3c24xx_irq_regs_t regs; int line_irq, line_fiq; -} s3c24xx_irq_t; +}; -typedef struct +struct s3c24xx_dma_t { s3c24xx_dma_regs_t regs; emu_timer *timer; -} s3c24xx_dma_t; +}; -typedef struct +struct s3c24xx_clkpow_t { s3c24xx_clkpow_regs_t regs; -} s3c24xx_clkpow_t; +}; -typedef struct +struct s3c24xx_lcd_t { s3c24xx_lcd_regs_t regs; emu_timer *timer; @@ -787,89 +787,89 @@ typedef struct UINT32 tpal; UINT32 hpos_min, hpos_max, vpos_min, vpos_max; UINT32 dma_data, dma_bits; -} s3c24xx_lcd_t; +}; -typedef struct +struct s3c24xx_lcdpal_t { s3c24xx_lcdpal_regs_t regs; -} s3c24xx_lcdpal_t; +}; -typedef struct +struct s3c24xx_nand_t { s3c24xx_nand_regs_t regs; UINT8 mecc[3]; int ecc_pos, data_count; -} s3c24xx_nand_t; +}; -typedef struct +struct s3c24xx_uart_t { s3c24xx_uart_regs_t regs; -} s3c24xx_uart_t; +}; -typedef struct +struct s3c24xx_pwm_t { s3c24xx_pwm_regs_t regs; emu_timer *timer[5]; UINT32 cnt[5]; UINT32 cmp[5]; UINT32 freq[5]; -} s3c24xx_pwm_t; +}; -typedef struct +struct s3c24xx_usbdev_t { s3c24xx_usbdev_regs_t regs; -} s3c24xx_usbdev_t; +}; -typedef struct +struct s3c24xx_wdt_t { s3c24xx_wdt_regs_t regs; emu_timer *timer; UINT32 freq, cnt; -} s3c24xx_wdt_t; +}; -typedef struct +struct s3c24xx_iic_t { s3c24xx_iic_regs_t regs; emu_timer *timer; int count; -} s3c24xx_iic_t; +}; -typedef struct +struct s3c24xx_iis_t { s3c24xx_iis_regs_t regs; emu_timer *timer; UINT16 fifo[16/2]; int fifo_index; -} s3c24xx_iis_t; +}; -typedef struct +struct s3c24xx_gpio_t { s3c24xx_gpio_regs_t regs; -} s3c24xx_gpio_t; +}; -typedef struct +struct s3c24xx_rtc_t { s3c24xx_rtc_regs_t regs; emu_timer *timer_tick_count; emu_timer *timer_update; -} s3c24xx_rtc_t; +}; -typedef struct +struct s3c24xx_adc_t { s3c24xx_adc_regs_t regs; -} s3c24xx_adc_t; +}; -typedef struct +struct s3c24xx_spi_t { s3c24xx_spi_regs_t regs; -} s3c24xx_spi_t; +}; -typedef struct +struct s3c24xx_sdi_t { s3c24xx_sdi_regs_t regs; -} s3c24xx_sdi_t; +}; -typedef struct +struct s3c24xx_t { const s3c2410_interface *iface; UINT8 steppingstone[4*1024]; @@ -892,6 +892,6 @@ typedef struct s3c24xx_adc_t adc; s3c24xx_spi_t spi[S3C24XX_SPI_COUNT]; s3c24xx_sdi_t sdi; -} s3c24xx_t; +}; #endif diff --git a/src/emu/machine/s3c2440.h b/src/emu/machine/s3c2440.h index 26994b73d38..3f386d77852 100644 --- a/src/emu/machine/s3c2440.h +++ b/src/emu/machine/s3c2440.h @@ -527,17 +527,17 @@ static const UINT32 MAP_SUBINT_TO_INT[15] = TYPE DEFINITIONS *******************************************************************************/ -typedef struct +struct s3c24xx_memcon_regs_t { UINT32 data[0x34/4]; -} s3c24xx_memcon_regs_t; +}; -typedef struct +struct s3c24xx_usbhost_regs_t { UINT32 data[0x5C/4]; -} s3c24xx_usbhost_regs_t; +}; -typedef struct +struct s3c24xx_irq_regs_t { UINT32 srcpnd; UINT32 intmod; @@ -547,9 +547,9 @@ typedef struct UINT32 intoffset; UINT32 subsrcpnd; UINT32 intsubmsk; -} s3c24xx_irq_regs_t; +}; -typedef struct +struct s3c24xx_dma_regs_t { UINT32 disrc; UINT32 disrcc; @@ -560,9 +560,9 @@ typedef struct UINT32 dcsrc; UINT32 dcdst; UINT32 dmasktrig; -} s3c24xx_dma_regs_t; +}; -typedef struct +struct s3c24xx_clkpow_regs_t { UINT32 locktime; UINT32 mpllcon; @@ -571,9 +571,9 @@ typedef struct UINT32 clkslow; UINT32 clkdivn; UINT32 camdivn; -} s3c24xx_clkpow_regs_t; +}; -typedef struct +struct s3c24xx_lcd_regs_t { UINT32 lcdcon1; UINT32 lcdcon2; @@ -593,14 +593,14 @@ typedef struct UINT32 lcdsrcpnd; UINT32 lcdintmsk; UINT32 tconsel; -} s3c24xx_lcd_regs_t; +}; -typedef struct +struct s3c24xx_lcdpal_regs_t { UINT32 data[0x400/4]; -} s3c24xx_lcdpal_regs_t; +}; -typedef struct +struct s3c24xx_nand_regs_t { UINT32 nfconf; UINT32 nfcont; @@ -618,14 +618,14 @@ typedef struct UINT32 nfsecc; UINT32 nfsblk; UINT32 nfeblk; -} s3c24xx_nand_regs_t; +}; -typedef struct +struct s3c24xx_cam_regs_t { UINT32 data[0xA4/4]; -} s3c24xx_cam_regs_t; +}; -typedef struct +struct s3c24xx_uart_regs_t { UINT32 ulcon; UINT32 ucon; @@ -638,9 +638,9 @@ typedef struct UINT32 utxh; UINT32 urxh; UINT32 ubrdiv; -} s3c24xx_uart_regs_t; +}; -typedef struct +struct s3c24xx_pwm_regs_t { UINT32 tcfg0; UINT32 tcfg1; @@ -659,39 +659,39 @@ typedef struct UINT32 tcnto3; UINT32 tcntb4; UINT32 tcnto4; -} s3c24xx_pwm_regs_t; +}; -typedef struct +struct s3c24xx_usbdev_regs_t { UINT32 data[0x130/4]; -} s3c24xx_usbdev_regs_t; +}; -typedef struct +struct s3c24xx_wdt_regs_t { UINT32 wtcon; UINT32 wtdat; UINT32 wtcnt; -} s3c24xx_wdt_regs_t; +}; -typedef struct +struct s3c24xx_iic_regs_t { UINT32 iiccon; UINT32 iicstat; UINT32 iicadd; UINT32 iicds; UINT32 iiclc; -} s3c24xx_iic_regs_t; +}; -typedef struct +struct s3c24xx_iis_regs_t { UINT32 iiscon; UINT32 iismod; UINT32 iispsr; UINT32 iisfcon; UINT32 iisfifo; -} s3c24xx_iis_regs_t; +}; -typedef struct +struct s3c24xx_gpio_regs_t { UINT32 gpacon; UINT32 gpadat; @@ -748,9 +748,9 @@ typedef struct UINT32 gpjcon; UINT32 gpjdat; UINT32 gpjup; -} s3c24xx_gpio_regs_t; +}; -typedef struct +struct s3c24xx_rtc_regs_t { UINT32 rtccon; UINT32 ticnt; @@ -770,9 +770,9 @@ typedef struct UINT32 bcddow; UINT32 bcdmon; UINT32 bcdyear; -} s3c24xx_rtc_regs_t; +}; -typedef struct +struct s3c24xx_adc_regs_t { UINT32 adccon; UINT32 adctsc; @@ -780,9 +780,9 @@ typedef struct UINT32 adcdat0; UINT32 adcdat1; UINT32 adcupdn; -} s3c24xx_adc_regs_t; +}; -typedef struct +struct s3c24xx_spi_regs_t { UINT32 spcon; UINT32 spsta; @@ -790,46 +790,46 @@ typedef struct UINT32 sppre; UINT32 sptdat; UINT32 sprdat; -} s3c24xx_spi_regs_t; +}; -typedef struct +struct s3c24xx_sdi_regs_t { UINT32 data[0x44/4]; -} s3c24xx_sdi_regs_t; +}; -typedef struct +struct s3c24xx_ac97_regs_t { UINT32 data[0x20/4]; -} s3c24xx_ac97_regs_t; +}; -typedef struct +struct s3c24xx_memcon_t { s3c24xx_memcon_regs_t regs; -} s3c24xx_memcon_t; +}; -typedef struct +struct s3c24xx_usbhost_t { s3c24xx_usbhost_regs_t regs; -} s3c24xx_usbhost_t; +}; -typedef struct +struct s3c24xx_irq_t { s3c24xx_irq_regs_t regs; int line_irq, line_fiq; -} s3c24xx_irq_t; +}; -typedef struct +struct s3c24xx_dma_t { s3c24xx_dma_regs_t regs; emu_timer *timer; -} s3c24xx_dma_t; +}; -typedef struct +struct s3c24xx_clkpow_t { s3c24xx_clkpow_regs_t regs; -} s3c24xx_clkpow_t; +}; -typedef struct +struct s3c24xx_lcd_t { s3c24xx_lcd_regs_t regs; emu_timer *timer; @@ -846,99 +846,99 @@ typedef struct UINT32 tpal; UINT32 hpos_min, hpos_max, vpos_min, vpos_max; UINT32 dma_data, dma_bits; -} s3c24xx_lcd_t; +}; -typedef struct +struct s3c24xx_lcdpal_t { s3c24xx_lcdpal_regs_t regs; -} s3c24xx_lcdpal_t; +}; -typedef struct +struct s3c24xx_nand_t { s3c24xx_nand_regs_t regs; UINT8 mecc[4]; UINT8 secc[2]; int ecc_pos, data_count; -} s3c24xx_nand_t; +}; -typedef struct +struct s3c24xx_cam_t { s3c24xx_cam_regs_t regs; -} s3c24xx_cam_t; +}; -typedef struct +struct s3c24xx_uart_t { s3c24xx_uart_regs_t regs; -} s3c24xx_uart_t; +}; -typedef struct +struct s3c24xx_pwm_t { s3c24xx_pwm_regs_t regs; emu_timer *timer[5]; UINT32 cnt[5]; UINT32 cmp[5]; UINT32 freq[5]; -} s3c24xx_pwm_t; +}; -typedef struct +struct s3c24xx_usbdev_t { s3c24xx_usbdev_regs_t regs; -} s3c24xx_usbdev_t; +}; -typedef struct +struct s3c24xx_wdt_t { s3c24xx_wdt_regs_t regs; emu_timer *timer; -} s3c24xx_wdt_t; +}; -typedef struct +struct s3c24xx_iic_t { s3c24xx_iic_regs_t regs; emu_timer *timer; int count; -} s3c24xx_iic_t; +}; -typedef struct +struct s3c24xx_iis_t { s3c24xx_iis_regs_t regs; emu_timer *timer; UINT16 fifo[16/2]; int fifo_index; -} s3c24xx_iis_t; +}; -typedef struct +struct s3c24xx_gpio_t { s3c24xx_gpio_regs_t regs; -} s3c24xx_gpio_t; +}; -typedef struct +struct s3c24xx_rtc_t { s3c24xx_rtc_regs_t regs; emu_timer *timer_tick_count; emu_timer *timer_update; -} s3c24xx_rtc_t; +}; -typedef struct +struct s3c24xx_adc_t { s3c24xx_adc_regs_t regs; -} s3c24xx_adc_t; +}; -typedef struct +struct s3c24xx_spi_t { s3c24xx_spi_regs_t regs; -} s3c24xx_spi_t; +}; -typedef struct +struct s3c24xx_sdi_t { s3c24xx_sdi_regs_t regs; -} s3c24xx_sdi_t; +}; -typedef struct +struct s3c24xx_ac97_t { s3c24xx_ac97_regs_t regs; -} s3c24xx_ac97_t; +}; -typedef struct +struct s3c24xx_t { const s3c2440_interface *iface; UINT8 steppingstone[4*1024]; @@ -963,6 +963,6 @@ typedef struct s3c24xx_spi_t spi[S3C24XX_SPI_COUNT]; s3c24xx_sdi_t sdi; s3c24xx_ac97_t ac97; -} s3c24xx_t; +}; #endif diff --git a/src/emu/machine/scsibus.h b/src/emu/machine/scsibus.h index b722ed1fe8f..559507acad0 100644 --- a/src/emu/machine/scsibus.h +++ b/src/emu/machine/scsibus.h @@ -100,7 +100,7 @@ #define SCSI_SENSE_SIZE 4 -typedef struct +struct adaptec_sense_t { // parameter list UINT8 reserved1[3]; @@ -121,7 +121,7 @@ typedef struct UINT8 step_pulse_code; UINT8 bit_flags; UINT8 sectors_per_track; -} adaptec_sense_t; +}; class scsibus_device : public device_t { diff --git a/src/emu/machine/v3021.h b/src/emu/machine/v3021.h index af826448fbd..e67d0d3eced 100644 --- a/src/emu/machine/v3021.h +++ b/src/emu/machine/v3021.h @@ -27,10 +27,10 @@ // TYPE DEFINITIONS //************************************************************************** -typedef struct +struct rtc_regs_t { UINT8 sec, min, hour, day, wday, month, year; -} rtc_regs_t; +}; // ======================> v3021_device |