diff options
Diffstat (limited to 'src/emu/cpu')
42 files changed, 168 insertions, 166 deletions
diff --git a/src/emu/cpu/apexc/apexc.c b/src/emu/cpu/apexc/apexc.c index ba683a7c2f1..4808cae2299 100644 --- a/src/emu/cpu/apexc/apexc.c +++ b/src/emu/cpu/apexc/apexc.c @@ -343,7 +343,7 @@ typedef struct static apexc_regs apexc; -int apexc_ICount; +static int apexc_ICount; /* decrement ICount by n */ #define DELAY(n) {apexc_ICount -= (n); apexc.current_word = (apexc.current_word + (n)) & 0x1f;} diff --git a/src/emu/cpu/apexc/apexc.h b/src/emu/cpu/apexc/apexc.h index 47bee1f9653..165452b6c6b 100644 --- a/src/emu/cpu/apexc/apexc.h +++ b/src/emu/cpu/apexc/apexc.h @@ -13,8 +13,6 @@ enum from the contents of ML and WS */ }; -extern int apexc_ICount; - void apexc_get_info(UINT32 state, cpuinfo *info); #ifndef SUPPORT_ODD_WORD_SIZES diff --git a/src/emu/cpu/cp1610/cp1610.c b/src/emu/cpu/cp1610/cp1610.c index 3463bd7fa9f..b0ed91017f6 100644 --- a/src/emu/cpu/cp1610/cp1610.c +++ b/src/emu/cpu/cp1610/cp1610.c @@ -46,7 +46,7 @@ typedef struct { int mask_interrupts; } cp1610_Regs; -int cp1610_icount; +static int cp1610_icount; static cp1610_Regs cp1610; diff --git a/src/emu/cpu/cp1610/cp1610.h b/src/emu/cpu/cp1610/cp1610.h index e7304dc51c8..69ccab89f2d 100644 --- a/src/emu/cpu/cp1610/cp1610.h +++ b/src/emu/cpu/cp1610/cp1610.h @@ -32,8 +32,6 @@ enum { #define CP1610_RESET 2 /* Non-Maskable */ #define CP1610_INT_INTR INPUT_LINE_NMI /* Non-Maskable */ -extern int cp1610_icount; /* cycle count */ - void cp1610_get_info(UINT32 state, cpuinfo *info); diff --git a/src/emu/cpu/e132xs/e132xs.c b/src/emu/cpu/e132xs/e132xs.c index 3942942e6e6..1d4f807d291 100644 --- a/src/emu/cpu/e132xs/e132xs.c +++ b/src/emu/cpu/e132xs/e132xs.c @@ -662,7 +662,7 @@ static void adjust_timer_interrupt(void) timer_adjust(hyperstone.timer, attotime_never, 0, attotime_never); } -static TIMER_CALLBACK( timer_callback ) +static TIMER_CALLBACK( e132xs_timer_callback ) { int update = param & 1; int cpunum = param >> 1; @@ -1576,7 +1576,7 @@ static void hyperstone_init(int index, int clock, const void *config, int (*irqc state_save_register_item("E132XS", index, hyperstone.tr_clocks_per_tick); hyperstone.irq_callback = irqcallback; - hyperstone.timer = timer_alloc(timer_callback); + hyperstone.timer = timer_alloc(e132xs_timer_callback, NULL); hyperstone.clock_scale_mask = scale_mask; } diff --git a/src/emu/cpu/f8/f3853.c b/src/emu/cpu/f8/f3853.c index 4aa0d9dc908..a51040446cf 100644 --- a/src/emu/cpu/f8/f3853.c +++ b/src/emu/cpu/f8/f3853.c @@ -90,7 +90,7 @@ void f3853_init(F3853_CONFIG *config) f3853.priority_line=FALSE; f3853.external_interrupt_line=TRUE; - f3853.timer = timer_alloc(f3853_timer_callback); + f3853.timer = timer_alloc(f3853_timer_callback, NULL); } void f3853_reset(void) diff --git a/src/emu/cpu/h83002/h8periph.c b/src/emu/cpu/h83002/h8periph.c index 603434a0ba0..fffd009c273 100644 --- a/src/emu/cpu/h83002/h8periph.c +++ b/src/emu/cpu/h83002/h8periph.c @@ -486,11 +486,11 @@ void h8_register_write8(UINT32 address, UINT8 val) void h8_itu_init(void) { - h8.timer[0] = timer_alloc(h8itu_timer_0_cb); - h8.timer[1] = timer_alloc(h8itu_timer_1_cb); - h8.timer[2] = timer_alloc(h8itu_timer_2_cb); - h8.timer[3] = timer_alloc(h8itu_timer_3_cb); - h8.timer[4] = timer_alloc(h8itu_timer_4_cb); + h8.timer[0] = timer_alloc(h8itu_timer_0_cb, NULL); + h8.timer[1] = timer_alloc(h8itu_timer_1_cb, NULL); + h8.timer[2] = timer_alloc(h8itu_timer_2_cb, NULL); + h8.timer[3] = timer_alloc(h8itu_timer_3_cb, NULL); + h8.timer[4] = timer_alloc(h8itu_timer_4_cb, NULL); h8_itu_reset(); diff --git a/src/emu/cpu/hd6309/hd6309.c b/src/emu/cpu/hd6309/hd6309.c index c6c98a95f15..a9105ff3de9 100644 --- a/src/emu/cpu/hd6309/hd6309.c +++ b/src/emu/cpu/hd6309/hd6309.c @@ -171,7 +171,7 @@ typedef struct /* 6309 registers */ static hd6309_Regs hd6309; -int hd6309_slapstic = 0; +//static int hd6309_slapstic = 0; #define pPPC hd6309.ppc #define pPC hd6309.pc diff --git a/src/emu/cpu/i8051/i8051.c b/src/emu/cpu/i8051/i8051.c index 3231cb69ffc..158da7f2b70 100644 --- a/src/emu/cpu/i8051/i8051.c +++ b/src/emu/cpu/i8051/i8051.c @@ -173,7 +173,7 @@ typedef struct { } I8051; -int i8051_icount; +static int i8051_icount; static I8051 i8051; static I8051_UART uart; diff --git a/src/emu/cpu/i8051/i8051.h b/src/emu/cpu/i8051/i8051.h index 6b5178d3400..49ddce4e42c 100644 --- a/src/emu/cpu/i8051/i8051.h +++ b/src/emu/cpu/i8051/i8051.h @@ -93,8 +93,6 @@ enum { #define TI_FLAG 1 #define RI_FLAG 2 -extern int i8051_icount; /* cycle count */ - extern void i8051_init (int index, int clock, const void *config, int (*irqcallback)(int)); /* Initialize save states */ extern void i8051_reset (void); /* Reset registers to the initial values */ extern void i8051_exit (void); /* Shut down CPU core */ @@ -125,8 +123,6 @@ extern offs_t i8051_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT * 8752 Section ****************************************************************************/ #if (HAS_I8752) -#define i8752_icount i8051_icount - extern void i8752_init (int index, int clock, const void *config, int (*irqcallback)(int)); /* Initialize save states */ extern void i8752_reset (void); /* Reset registers to the initial values */ extern void i8752_exit (void); /* Shut down CPU core */ diff --git a/src/emu/cpu/i8051/i8051ops.c b/src/emu/cpu/i8051/i8051ops.c index ce1d5a76349..250fec3096c 100644 --- a/src/emu/cpu/i8051/i8051ops.c +++ b/src/emu/cpu/i8051/i8051ops.c @@ -270,9 +270,9 @@ INLINE void da_a(void) The carry flag will be set if the result is > 0x99, but not cleared otherwise */ UINT16 new_acc = R_ACC & 0xff; - if(GET_AC || (R_ACC & 0x0f) > 0x09) + if(GET_AC || (new_acc & 0x0f) > 0x09) new_acc += 0x06; - if(GET_CY || (R_ACC & 0xf0) > 0x90) + if(GET_CY || ((new_acc & 0xf0) > 0x90) || (new_acc & ~0xff)) new_acc += 0x60; SFR_W(ACC,new_acc&0xff); if(new_acc & ~0xff) diff --git a/src/emu/cpu/i8085/i8085.c b/src/emu/cpu/i8085/i8085.c index c3983cbefc8..db23ae009ea 100644 --- a/src/emu/cpu/i8085/i8085.c +++ b/src/emu/cpu/i8085/i8085.c @@ -150,7 +150,7 @@ typedef struct { void (*sod_callback)(int state); } i8085_Regs; -int i8085_ICount = 0; +static int i8085_ICount = 0; static i8085_Regs I; static UINT8 ZS[256]; diff --git a/src/emu/cpu/m37710/m37710.c b/src/emu/cpu/m37710/m37710.c index 1ddad9434c2..c80c474dfea 100644 --- a/src/emu/cpu/m37710/m37710.c +++ b/src/emu/cpu/m37710/m37710.c @@ -1054,14 +1054,14 @@ static void m37710_init(int index, int clock, const void *config, int (*irqcallb { INT_ACK = irqcallback; - m37710i_cpu.timers[0] = timer_alloc(m37710_timer_a0_cb); - m37710i_cpu.timers[1] = timer_alloc(m37710_timer_a1_cb); - m37710i_cpu.timers[2] = timer_alloc(m37710_timer_a2_cb); - m37710i_cpu.timers[3] = timer_alloc(m37710_timer_a3_cb); - m37710i_cpu.timers[4] = timer_alloc(m37710_timer_a4_cb); - m37710i_cpu.timers[5] = timer_alloc(m37710_timer_b0_cb); - m37710i_cpu.timers[6] = timer_alloc(m37710_timer_b1_cb); - m37710i_cpu.timers[7] = timer_alloc(m37710_timer_b2_cb); + m37710i_cpu.timers[0] = timer_alloc(m37710_timer_a0_cb, NULL); + m37710i_cpu.timers[1] = timer_alloc(m37710_timer_a1_cb, NULL); + m37710i_cpu.timers[2] = timer_alloc(m37710_timer_a2_cb, NULL); + m37710i_cpu.timers[3] = timer_alloc(m37710_timer_a3_cb, NULL); + m37710i_cpu.timers[4] = timer_alloc(m37710_timer_a4_cb, NULL); + m37710i_cpu.timers[5] = timer_alloc(m37710_timer_b0_cb, NULL); + m37710i_cpu.timers[6] = timer_alloc(m37710_timer_b1_cb, NULL); + m37710i_cpu.timers[7] = timer_alloc(m37710_timer_b2_cb, NULL); state_save_register_item("M377xx", index, m37710i_cpu.a); state_save_register_item("M377xx", index, m37710i_cpu.b); diff --git a/src/emu/cpu/m6502/m6502.c b/src/emu/cpu/m6502/m6502.c index 89da4704784..ff8d63a7716 100644 --- a/src/emu/cpu/m6502/m6502.c +++ b/src/emu/cpu/m6502/m6502.c @@ -87,8 +87,8 @@ typedef struct } m6502_Regs; -int m6502_IntOccured = 0; -int m6502_ICount = 0; +static int m6502_IntOccured = 0; +static int m6502_ICount = 0; static m6502_Regs m6502; diff --git a/src/emu/cpu/m6800/m6800.c b/src/emu/cpu/m6800/m6800.c index 3adbc951a5b..b4a1de2e2d3 100644 --- a/src/emu/cpu/m6800/m6800.c +++ b/src/emu/cpu/m6800/m6800.c @@ -610,6 +610,7 @@ static void check_timer_event(void) /* include the opcode functions */ #include "6800ops.c" +#if (HAS_M6801||HAS_M6803||HAS_HD63701) static void m6800_tx(int value) { m6800.port2_data = (m6800.port2_data & 0xef) | (value << 4); @@ -804,6 +805,7 @@ static TIMER_CALLBACK(m6800_rx_tick) } } } +#endif /**************************************************************************** * Reset registers to their initial values @@ -1274,8 +1276,8 @@ static void m6801_init(int index, int clock, const void *config, int (*irqcallba m6800.irq_callback = irqcallback; m6800.clock = clock; - m6800_rx_timer = timer_alloc(m6800_rx_tick); - m6800_tx_timer = timer_alloc(m6800_tx_tick); + m6800_rx_timer = timer_alloc(m6800_rx_tick, NULL); + m6800_tx_timer = timer_alloc(m6800_tx_tick, NULL); state_register("m6801", index); } @@ -1307,8 +1309,8 @@ static void m6803_init(int index, int clock, const void *config, int (*irqcallba m6800.irq_callback = irqcallback; m6800.clock = clock; - m6800_rx_timer = timer_alloc(m6800_rx_tick); - m6800_tx_timer = timer_alloc(m6800_tx_tick); + m6800_rx_timer = timer_alloc(m6800_rx_tick, NULL); + m6800_tx_timer = timer_alloc(m6800_tx_tick, NULL); state_register("m6803", index); } @@ -1650,8 +1652,8 @@ static void hd63701_init(int index, int clock, const void *config, int (*irqcall m6800.irq_callback = irqcallback; m6800.clock = clock; - m6800_rx_timer = timer_alloc(m6800_rx_tick); - m6800_tx_timer = timer_alloc(m6800_tx_tick); + m6800_rx_timer = timer_alloc(m6800_rx_tick, NULL); + m6800_tx_timer = timer_alloc(m6800_tx_tick, NULL); state_register("hd63701", index); } diff --git a/src/emu/cpu/m6800/m6800.h b/src/emu/cpu/m6800/m6800.h index 7b711d6bc59..c487777c9b8 100644 --- a/src/emu/cpu/m6800/m6800.h +++ b/src/emu/cpu/m6800/m6800.h @@ -83,7 +83,7 @@ extern void m6802_get_info(UINT32 state, cpuinfo *info); extern void m6803_get_info(UINT32 state, cpuinfo *info); #endif -#if (HAS_M6803||HAS_HD63701) +#if (HAS_M6801||HAS_M6803||HAS_HD63701) /* By default, on a port write port bits which are not set as output in the DDR */ /* are set to the value returned by a read from the same port. If you need to */ /* know the DDR for e.g. port 1, do m6803_internal_registers_r(M6801_DDR1) */ diff --git a/src/emu/cpu/m68000/m68000.h b/src/emu/cpu/m68000/m68000.h index f90ac95da26..e073c85332b 100644 --- a/src/emu/cpu/m68000/m68000.h +++ b/src/emu/cpu/m68000/m68000.h @@ -26,18 +26,19 @@ extern int m68k_ICount; struct m68k_memory_interface { - offs_t opcode_xor; // Address Calculation - UINT8 (*read8)(offs_t); // Normal read 8 bit + offs_t opcode_xor; // Address Calculation + UINT16 (*readimm16)(offs_t); // Immediate read 16 bit + UINT8 (*read8)(offs_t); // Normal read 8 bit UINT16 (*read16)(offs_t); // Normal read 16 bit UINT32 (*read32)(offs_t); // Normal read 32 bit - void (*write8)(offs_t, UINT8); // Write 8 bit - void (*write16)(offs_t, UINT16); // Write 16 bit - void (*write32)(offs_t, UINT32); // Write 32 bit - void (*changepc)(offs_t); // Change PC + void (*write8)(offs_t, UINT8); // Write 8 bit + void (*write16)(offs_t, UINT16); // Write 16 bit + void (*write32)(offs_t, UINT32); // Write 32 bit + void (*changepc)(offs_t); // Change PC // For Encrypted Stuff - UINT8 (*read8pc)(offs_t); // PC Relative read 8 bit + UINT8 (*read8pc)(offs_t); // PC Relative read 8 bit UINT16 (*read16pc)(offs_t); // PC Relative read 16 bit UINT32 (*read32pc)(offs_t); // PC Relative read 32 bit @@ -47,7 +48,7 @@ struct m68k_memory_interface struct m68k_encryption_interface { - UINT8 (*read8pc)(offs_t); // PC Relative read 8 bit + UINT8 (*read8pc)(offs_t); // PC Relative read 8 bit UINT16 (*read16pc)(offs_t); // PC Relative read 16 bit UINT32 (*read32pc)(offs_t); // PC Relative read 32 bit diff --git a/src/emu/cpu/m68000/m68kmame.c b/src/emu/cpu/m68000/m68kmame.c index 789c821c8a7..b213023ccba 100644 --- a/src/emu/cpu/m68000/m68kmame.c +++ b/src/emu/cpu/m68000/m68kmame.c @@ -20,6 +20,12 @@ void m68k_set_encrypted_opcode_range(int cpunum, offs_t start, offs_t end) * 8-bit data memory interface ****************************************************************************/ +static UINT16 m68008_read_immediate_16(offs_t address) +{ + offs_t addr = (address) ^ m68k_memory_intf.opcode_xor; + return (cpu_readop(addr) << 8) | (cpu_readop(addr + 1)); +} + static UINT16 readword_d8(offs_t address) { UINT16 result = program_read_byte_8(address) << 8; @@ -52,6 +58,7 @@ static void writelong_d8(offs_t address, UINT32 data) static const struct m68k_memory_interface interface_d8 = { 0, + m68008_read_immediate_16, program_read_byte_8, readword_d8, readlong_d8, @@ -64,6 +71,11 @@ static const struct m68k_memory_interface interface_d8 = * 16-bit data memory interface ****************************************************************************/ +static UINT16 read_immediate_16(offs_t address) +{ + return cpu_readop16((address) ^ m68k_memory_intf.opcode_xor); +} + static UINT32 readlong_d16(offs_t address) { UINT32 result = program_read_word_16be(address) << 16; @@ -80,6 +92,7 @@ static void writelong_d16(offs_t address, UINT32 data) static const struct m68k_memory_interface interface_d16 = { 0, + read_immediate_16, program_read_byte_16be, program_read_word_16be, readlong_d16, @@ -155,6 +168,7 @@ static void writelong_d32(offs_t address, UINT32 data) static const struct m68k_memory_interface interface_d32 = { WORD_XOR_BE(0), + read_immediate_16, program_read_byte_32be, readword_d32, readlong_d32, @@ -291,7 +305,7 @@ static offs_t m68008_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UIN ****************************************************************************/ #if HAS_M68010 -void m68010_init(int index, int clock, const void *config, int (*irqcallback)(int)) +static void m68010_init(int index, int clock, const void *config, int (*irqcallback)(int)) { m68k_init(); m68k_set_cpu_type(M68K_CPU_TYPE_68010); diff --git a/src/emu/cpu/m68000/m68kmame.h b/src/emu/cpu/m68000/m68kmame.h index 046f38eb0ea..f98bee2e33c 100644 --- a/src/emu/cpu/m68000/m68kmame.h +++ b/src/emu/cpu/m68000/m68kmame.h @@ -65,13 +65,13 @@ extern offs_t m68k_encrypted_opcode_end[MAX_CPU]; #define m68k_read_memory_16(address) (*m68k_memory_intf.read16)(address) #define m68k_read_memory_32(address) (*m68k_memory_intf.read32)(address) -#define m68k_read_immediate_16(address) m68kx_read_immediate_16(address) +#define m68k_read_immediate_16(address) (*m68k_memory_intf.readimm16)(address) #define m68k_read_immediate_32(address) m68kx_read_immediate_32(address) #define m68k_read_pcrelative_8(address) m68kx_read_pcrelative_8(address) #define m68k_read_pcrelative_16(address) m68kx_read_pcrelative_16(address) #define m68k_read_pcrelative_32(address) m68kx_read_pcrelative_32(address) -#define m68k_read_disassembler_16(address) m68kx_read_immediate_16(address) +#define m68k_read_disassembler_16(address) m68k_read_immediate_16(address) #define m68k_read_disassembler_32(address) m68kx_read_immediate_32(address) #define m68k_write_memory_8(address, value) (*m68k_memory_intf.write8)(address, value) @@ -80,7 +80,6 @@ extern offs_t m68k_encrypted_opcode_end[MAX_CPU]; #define m68k_write_memory_32_pd(address, value) m68kx_write_memory_32_pd(address, value) -INLINE unsigned int m68k_read_immediate_16(unsigned int address); INLINE unsigned int m68k_read_immediate_32(unsigned int address); INLINE unsigned int m68k_read_pcrelative_8(unsigned int address); INLINE unsigned int m68k_read_pcrelative_16(unsigned int address); @@ -88,11 +87,6 @@ INLINE unsigned int m68k_read_pcrelative_32(unsigned int address); INLINE void m68k_write_memory_32_pd(unsigned int address, unsigned int value); -INLINE unsigned int m68kx_read_immediate_16(unsigned int address) -{ - return cpu_readop16((address) ^ m68k_memory_intf.opcode_xor); -} - INLINE unsigned int m68kx_read_immediate_32(unsigned int address) { return ((m68k_read_immediate_16(address) << 16) | m68k_read_immediate_16((address)+2)); diff --git a/src/emu/cpu/m6805/m6805.c b/src/emu/cpu/m6805/m6805.c index eb56a4eecf5..6d4f4efc19b 100644 --- a/src/emu/cpu/m6805/m6805.c +++ b/src/emu/cpu/m6805/m6805.c @@ -78,7 +78,7 @@ static PAIR ea; /* effective address */ #define EA ea.w.l /* public globals */ -int m6805_ICount=50000; +static int m6805_ICount=50000; /* DS -- THESE ARE RE-DEFINED IN m6805.h TO RAM, ROM or FUNCTIONS IN cpuintrf.c */ #define RM(Addr) M6805_RDMEM(Addr) diff --git a/src/emu/cpu/mips/dismips.c b/src/emu/cpu/mips/dismips.c index 3b7bc61cd8e..10ce5b89963 100644 --- a/src/emu/cpu/mips/dismips.c +++ b/src/emu/cpu/mips/dismips.c @@ -10,7 +10,7 @@ extern unsigned dasmr3k(char *,unsigned, UINT32); extern unsigned dasmmips3(char *,unsigned, UINT32); -struct +static struct { UINT8 id[ 8 ]; UINT32 text; /* SCE only */ diff --git a/src/emu/cpu/mips/mips3com.c b/src/emu/cpu/mips/mips3com.c index 55fc05bcacd..f9d22ffc00a 100644 --- a/src/emu/cpu/mips/mips3com.c +++ b/src/emu/cpu/mips/mips3com.c @@ -118,7 +118,7 @@ void mips3com_init(mips3_state *mips, mips3_flavor flavor, int bigendian, int in mips->tlb_table = auto_malloc(sizeof(mips->tlb_table[0]) * (1 << (MIPS3_MAX_PADDR_SHIFT - MIPS3_MIN_PAGE_SHIFT))); /* allocate a timer for the compare interrupt */ - mips->compare_int_timer = timer_alloc(compare_int_callback); + mips->compare_int_timer = timer_alloc(compare_int_callback, NULL); /* reset the state */ mips3com_reset(mips); diff --git a/src/emu/cpu/powerpc/ppc.c b/src/emu/cpu/powerpc/ppc.c index ff371fda52a..a3a4aded42a 100644 --- a/src/emu/cpu/powerpc/ppc.c +++ b/src/emu/cpu/powerpc/ppc.c @@ -12,8 +12,8 @@ void ppc602_exception(int exception); #endif #if (HAS_PPC403) void ppc403_exception(int exception); -UINT8 ppc403_spu_r(UINT32 a); -void ppc403_spu_w(UINT32 a, UINT8 d); +static UINT8 ppc403_spu_r(UINT32 a); +static void ppc403_spu_w(UINT32 a, UINT8 d); #endif #define RD ((op >> 21) & 0x1F) @@ -921,8 +921,8 @@ static void ppc403_init(int index, int clock, const void *_config, int (*irqcall // !!! why is rfci here !!! optable19[51] = ppc_rfci; - ppc.spu.rx_timer = timer_alloc(ppc403_spu_rx_callback); - ppc.spu.tx_timer = timer_alloc(ppc403_spu_tx_callback); + ppc.spu.rx_timer = timer_alloc(ppc403_spu_rx_callback, NULL); + ppc.spu.tx_timer = timer_alloc(ppc403_spu_tx_callback, NULL); ppc.read8 = ppc403_read8; ppc.read16 = ppc403_read16; diff --git a/src/emu/cpu/powerpc/ppc403.c b/src/emu/cpu/powerpc/ppc403.c index 9d1988de86d..aa57f1a2ef6 100644 --- a/src/emu/cpu/powerpc/ppc403.c +++ b/src/emu/cpu/powerpc/ppc403.c @@ -678,7 +678,7 @@ static void ppc403_spu_w(UINT32 a, UINT8 d) case 0x9: ppc.spu.sptb = d; - ppc403_spu_tx_callback(Machine, cpu_getactivecpu()); + ppc403_spu_tx_callback(Machine, NULL, cpu_getactivecpu()); break; default: diff --git a/src/emu/cpu/powerpc/ppcdrc.c b/src/emu/cpu/powerpc/ppcdrc.c index 56780178758..77948103c42 100644 --- a/src/emu/cpu/powerpc/ppcdrc.c +++ b/src/emu/cpu/powerpc/ppcdrc.c @@ -1074,8 +1074,8 @@ static void ppcdrc403_init(int index, int clock, const void *_config, int (*irqc optable31[163] = recompile_wrteei; optable19[51] = recompile_rfci; - ppc.spu.rx_timer = timer_alloc(ppc403_spu_rx_callback); - ppc.spu.tx_timer = timer_alloc(ppc403_spu_tx_callback); + ppc.spu.rx_timer = timer_alloc(ppc403_spu_rx_callback, NULL); + ppc.spu.tx_timer = timer_alloc(ppc403_spu_tx_callback, NULL); ppc.is603 = 0; ppc.is602 = 0; diff --git a/src/emu/cpu/rsp/rsp.c b/src/emu/cpu/rsp/rsp.c index 2116d65faed..1b0b4d16c91 100644 --- a/src/emu/cpu/rsp/rsp.c +++ b/src/emu/cpu/rsp/rsp.c @@ -31,11 +31,7 @@ static FILE *exec_output; #endif -extern UINT32 sp_read_reg(UINT32 reg); -extern void sp_write_reg(UINT32 reg, UINT32 data); -extern READ32_HANDLER( n64_dp_reg_r ); -extern WRITE32_HANDLER( n64_dp_reg_w ); -extern void sp_set_status(UINT32 status); +static rsp_config *config; typedef struct @@ -52,7 +48,7 @@ typedef struct UINT32 r[32]; VECTOR_REG v[32]; UINT16 flag[4]; - UINT32 sr; + UINT32 sr; INT64 accum[8]; INT32 square_root_res; @@ -235,11 +231,11 @@ static UINT32 get_cop0_reg(int reg) { if (reg >= 0 && reg < 8) { - return sp_read_reg(reg); + return (config->sp_reg_r)(reg, 0x00000000); } else if (reg >= 8 && reg < 16) { - return n64_dp_reg_r(reg - 8, 0x00000000); + return (config->dp_reg_r)(reg - 8, 0x00000000); } else { @@ -251,11 +247,11 @@ static void set_cop0_reg(int reg, UINT32 data) { if (reg >= 0 && reg < 8) { - sp_write_reg(reg, data); + (config->sp_reg_w)(reg, data, 0x00000000); } else if (reg >= 8 && reg < 16) { - n64_dp_reg_w(reg - 8, data, 0x00000000); + (config->dp_reg_w)(reg - 8, data, 0x00000000); } else { @@ -348,33 +344,35 @@ static const int vector_elements_2[16][8] = static void rsp_init(int index, int clock, const void *_config, int (*irqcallback)(int)) { - //int regIdx, accumIdx; + //int regIdx, accumIdx; + config = (rsp_config *)_config; + #if LOG_INSTRUCTION_EXECUTION exec_output = fopen("rsp_execute.txt", "wt"); #endif rsp.irq_callback = irqcallback; - /* - for(regIdx = 0; regIdx < 32; regIdx++ ) - { - rsp.r[regIdx] = 0; - rsp.v[regIdx].d[0] = 0; - rsp.v[regIdx].d[1] = 0; - } - for(accumIdx = 0; accumIdx < 8; accumIdx++ ) - { - rsp.accum[accumIdx] = 0; - } - rsp.flag[0] = 0; - rsp.flag[1] = 0; - rsp.flag[2] = 0; - rsp.flag[3] = 0; - rsp.square_root_res = 0; - rsp.square_root_high = 0; - rsp.reciprocal_res = 0; - rsp.reciprocal_high = 0; - */ - rsp.sr = RSP_STATUS_HALT; +#if 0 + for(regIdx = 0; regIdx < 32; regIdx++ ) + { + rsp.r[regIdx] = 0; + rsp.v[regIdx].d[0] = 0; + rsp.v[regIdx].d[1] = 0; + } + for(accumIdx = 0; accumIdx < 8; accumIdx++ ) + { + rsp.accum[accumIdx] = 0; + } + rsp.flag[0] = 0; + rsp.flag[1] = 0; + rsp.flag[2] = 0; + rsp.flag[3] = 0; + rsp.square_root_res = 0; + rsp.square_root_high = 0; + rsp.reciprocal_res = 0; + rsp.reciprocal_high = 0; +#endif + rsp.sr = RSP_STATUS_HALT; } static void rsp_exit(void) @@ -397,18 +395,17 @@ static void rsp_exit(void) #endif #if SAVE_DMEM { - /*int i; - FILE *dmem; - dmem = fopen("rsp_dmem.txt", "wt"); - - for (i=0; i < 0x1000; i+=4) - { - fprintf(dmem, "%08X: %08X\n", 0x04000000 + i, READ32(0x04000000 + i)); - } - fclose(dmem);*/ - int i; FILE *dmem; +#if 0 + dmem = fopen("rsp_dmem.txt", "wt"); + + for (i=0; i < 0x1000; i+=4) + { + fprintf(dmem, "%08X: %08X\n", 0x04000000 + i, READ32(0x04000000 + i)); + } + fclose(dmem); +#endif dmem = fopen("rsp_dmem.bin", "wb"); for (i=0; i < 0x1000; i++) @@ -966,7 +963,7 @@ static void handle_swc2(UINT32 op) // // Stores one element from maximum of 8 vectors, while incrementing element index - int element, eaoffset; + int element; int vs = dest; int ve = dest + 8; if (ve > 32) @@ -2308,7 +2305,7 @@ static void handle_vector_ops(UINT32 op) i = 0; } } - rec = (INT32)(0x7fffffff / (double)rec); + rec = (INT32)(0x7fffffff / (double)rec); for (i = 31; i > 0; i--) { if (rec & (1 << i)) @@ -2554,10 +2551,10 @@ static int rsp_execute(int cycles) rsp.pc = 0x4001000 | (rsp.pc & 0xfff); - if( rsp.sr & ( RSP_STATUS_HALT | RSP_STATUS_BROKE ) ) - { - rsp_icount = 0; - } + if( rsp.sr & ( RSP_STATUS_HALT | RSP_STATUS_BROKE ) ) + { + rsp_icount = 0; + } while (rsp_icount > 0) { @@ -2591,7 +2588,7 @@ static int rsp_execute(int cycles) case 0x09: /* JALR */ JUMP_PC_L(RSVAL, RDREG); break; case 0x0d: /* BREAK */ { - sp_set_status(0x3); + (config->sp_set_status)(0x3); rsp_icount = 1; #if LOG_INSTRUCTION_EXECUTION @@ -2784,15 +2781,15 @@ static int rsp_execute(int cycles) --rsp_icount; - if( rsp.sr & RSP_STATUS_SSTEP ) - { - rsp.sr |= RSP_STATUS_BROKE; - } + if( rsp.sr & RSP_STATUS_SSTEP ) + { + rsp.sr |= RSP_STATUS_BROKE; + } - if( rsp.sr & ( RSP_STATUS_HALT | RSP_STATUS_BROKE ) ) - { - rsp_icount = 0; - } + if( rsp.sr & ( RSP_STATUS_HALT | RSP_STATUS_BROKE ) ) + { + rsp_icount = 0; + } } @@ -2942,8 +2939,8 @@ void rsp_get_info(UINT32 state, cpuinfo *info) case CPUINFO_INT_REGISTER + RSP_R30: info->i = rsp.r[30]; break; case CPUINFO_INT_SP: case CPUINFO_INT_REGISTER + RSP_R31: info->i = rsp.r[31]; break; - case CPUINFO_INT_REGISTER + RSP_SR: info->i = rsp.sr; break; - case CPUINFO_INT_REGISTER + RSP_NEXTPC: info->i = rsp.nextpc; break; + case CPUINFO_INT_REGISTER + RSP_SR: info->i = rsp.sr; break; + case CPUINFO_INT_REGISTER + RSP_NEXTPC: info->i = rsp.nextpc; break; /* --- the following bits of info are returned as pointers to data or functions --- */ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = rsp_get_context; break; @@ -3002,7 +2999,7 @@ void rsp_get_info(UINT32 state, cpuinfo *info) case CPUINFO_STR_REGISTER + RSP_R29: sprintf(info->s, "R29: %08X", rsp.r[29]); break; case CPUINFO_STR_REGISTER + RSP_R30: sprintf(info->s, "R30: %08X", rsp.r[30]); break; case CPUINFO_STR_REGISTER + RSP_R31: sprintf(info->s, "R31: %08X", rsp.r[31]); break; - case CPUINFO_STR_REGISTER + RSP_SR: sprintf(info->s, "SR: %08X", rsp.sr); break; - case CPUINFO_STR_REGISTER + RSP_NEXTPC: sprintf(info->s, "NPC: %08X", rsp.nextpc);break; + case CPUINFO_STR_REGISTER + RSP_SR: sprintf(info->s, "SR: %08X", rsp.sr); break; + case CPUINFO_STR_REGISTER + RSP_NEXTPC: sprintf(info->s, "NPC: %08X", rsp.nextpc);break; } } diff --git a/src/emu/cpu/rsp/rsp.h b/src/emu/cpu/rsp/rsp.h index 345e7ae1543..2dc6ce2d644 100644 --- a/src/emu/cpu/rsp/rsp.h +++ b/src/emu/cpu/rsp/rsp.h @@ -1,6 +1,16 @@ #ifndef _RSP_H #define _RSP_H +struct _rsp_config +{ + read32_handler dp_reg_r; + write32_handler dp_reg_w; + read32_handler sp_reg_r; + write32_handler sp_reg_w; + void (*sp_set_status)(UINT32 status); +}; +typedef struct _rsp_config rsp_config; + enum { RSP_PC = 1, diff --git a/src/emu/cpu/s2650/s2650.c b/src/emu/cpu/s2650/s2650.c index ef819bb397f..7dd5d4f40ef 100644 --- a/src/emu/cpu/s2650/s2650.c +++ b/src/emu/cpu/s2650/s2650.c @@ -28,7 +28,7 @@ /* define this to expand all EA calculations inline */ #define INLINE_EA 1 -int s2650_ICount = 0; +static int s2650_ICount = 0; typedef struct { UINT16 ppc; /* previous program counter (page + iar) */ diff --git a/src/emu/cpu/sc61860/sc61860.c b/src/emu/cpu/sc61860/sc61860.c index ef62727d1ad..4da083297d9 100644 --- a/src/emu/cpu/sc61860/sc61860.c +++ b/src/emu/cpu/sc61860/sc61860.c @@ -94,7 +94,7 @@ static void sc61860_reset(void) static void sc61860_init(int index, int clock, const void *config, int (*irqcallback)(int)) { sc61860.config = (SC61860_CONFIG *) config; - timer_pulse(ATTOTIME_IN_HZ(500), 0, sc61860_2ms_tick); + timer_pulse(ATTOTIME_IN_HZ(500), NULL, 0, sc61860_2ms_tick); } static void sc61860_get_context (void *dst) diff --git a/src/emu/cpu/sh2/sh2.c b/src/emu/cpu/sh2/sh2.c index ef56912acaa..57ea7e545c3 100644 --- a/src/emu/cpu/sh2/sh2.c +++ b/src/emu/cpu/sh2/sh2.c @@ -2933,13 +2933,13 @@ static void sh2_init(int index, int clock, const void *config, int (*irqcallback { const struct sh2_config *conf = config; - sh2.timer = timer_alloc(sh2_timer_callback); + sh2.timer = timer_alloc(sh2_timer_callback, NULL); timer_adjust(sh2.timer, attotime_never, 0, attotime_zero); - sh2.dma_timer[0] = timer_alloc(sh2_dmac_callback); + sh2.dma_timer[0] = timer_alloc(sh2_dmac_callback, NULL); timer_adjust(sh2.dma_timer[0], attotime_never, 0, attotime_zero); - sh2.dma_timer[1] = timer_alloc(sh2_dmac_callback); + sh2.dma_timer[1] = timer_alloc(sh2_dmac_callback, NULL); timer_adjust(sh2.dma_timer[1], attotime_never, 0, attotime_zero); sh2.m = auto_malloc(0x200); diff --git a/src/emu/cpu/sh4/sh4.c b/src/emu/cpu/sh4/sh4.c index 82daf0cc51c..aacc951245e 100644 --- a/src/emu/cpu/sh4/sh4.c +++ b/src/emu/cpu/sh4/sh4.c @@ -4121,27 +4121,27 @@ static void sh4_init(int index, int clock, const void *config, int (*irqcallback { const struct sh4_config *conf = config; - sh4.timer0 = timer_alloc(sh4_timer0_callback); + sh4.timer0 = timer_alloc(sh4_timer0_callback, NULL); timer_adjust(sh4.timer0, attotime_never, 0, attotime_zero); - sh4.timer1 = timer_alloc(sh4_timer1_callback); + sh4.timer1 = timer_alloc(sh4_timer1_callback, NULL); timer_adjust(sh4.timer1, attotime_never, 0, attotime_zero); - sh4.timer2 = timer_alloc(sh4_timer2_callback); + sh4.timer2 = timer_alloc(sh4_timer2_callback, NULL); timer_adjust(sh4.timer2, attotime_never, 0, attotime_zero); - sh4.dma_timer[0] = timer_alloc(sh4_dmac_callback); + sh4.dma_timer[0] = timer_alloc(sh4_dmac_callback, NULL); timer_adjust(sh4.dma_timer[0], attotime_never, 0, attotime_zero); - sh4.dma_timer[1] = timer_alloc(sh4_dmac_callback); + sh4.dma_timer[1] = timer_alloc(sh4_dmac_callback, NULL); timer_adjust(sh4.dma_timer[1], attotime_never, 0, attotime_zero); - sh4.dma_timer[2] = timer_alloc(sh4_dmac_callback); + sh4.dma_timer[2] = timer_alloc(sh4_dmac_callback, NULL); timer_adjust(sh4.dma_timer[2], attotime_never, 0, attotime_zero); - sh4.dma_timer[3] = timer_alloc(sh4_dmac_callback); + sh4.dma_timer[3] = timer_alloc(sh4_dmac_callback, NULL); timer_adjust(sh4.dma_timer[3], attotime_never, 0, attotime_zero); - sh4.refresh_timer = timer_alloc(sh4_refresh_timer_callback); + sh4.refresh_timer = timer_alloc(sh4_refresh_timer_callback, NULL); timer_adjust(sh4.refresh_timer, attotime_never, 0, attotime_zero); sh4.refresh_timer_base = 0; - sh4.rtc_timer = timer_alloc(sh4_rtc_timer_callback); + sh4.rtc_timer = timer_alloc(sh4_rtc_timer_callback, NULL); timer_adjust(sh4.rtc_timer, attotime_never, 0, attotime_zero); sh4.m = auto_malloc(16384*4); diff --git a/src/emu/cpu/sm8500/sm8500.c b/src/emu/cpu/sm8500/sm8500.c index 2c12d232f99..eb6526bc1ab 100644 --- a/src/emu/cpu/sm8500/sm8500.c +++ b/src/emu/cpu/sm8500/sm8500.c @@ -53,7 +53,7 @@ typedef struct { static sm8500_regs regs; /* nr of cycles to run */ -int sm8500_icount; +static int sm8500_icount; static UINT8 sm8500_b2w[8] = { 0, 8, 2, 10, 4, 12, 6, 14 diff --git a/src/emu/cpu/sm8500/sm8500.h b/src/emu/cpu/sm8500/sm8500.h index 4d11727d6c3..89aaab5f4d6 100644 --- a/src/emu/cpu/sm8500/sm8500.h +++ b/src/emu/cpu/sm8500/sm8500.h @@ -20,8 +20,6 @@ typedef struct { #define WDT_INT 9 #define NMI_INT 10 -extern int sm8500_icount; - enum { /* "main" 16 bit register */ SM8500_PC=1, SM8500_SP, SM8500_PS, SM8500_SYS16, SM8500_RR0, SM8500_RR2, SM8500_RR4, SM8500_RR6, SM8500_RR8, SM8500_RR10, diff --git a/src/emu/cpu/spc700/spc700.c b/src/emu/cpu/spc700/spc700.c index 8e9c1aca272..78f8a183fb4 100644 --- a/src/emu/cpu/spc700/spc700.c +++ b/src/emu/cpu/spc700/spc700.c @@ -134,7 +134,7 @@ typedef struct /* Our CPU structure */ static spc700i_cpu_struct spc700i_cpu = {0}; -int spc700_ICount = 0; +static int spc700_ICount = 0; /* Temporary Variables */ static uint spc700i_source; diff --git a/src/emu/cpu/spc700/spc700.h b/src/emu/cpu/spc700/spc700.h index 41407488485..e821bf63e3c 100644 --- a/src/emu/cpu/spc700/spc700.h +++ b/src/emu/cpu/spc700/spc700.h @@ -96,8 +96,6 @@ const char *spc700_info(void *context, int regnum); /* Pulse the SO (Set Overflow) pin on the CPU */ void spc700_pulse_so(void); -extern int spc700_ICount; /* cycle count */ - int spc700_execute(int clocks); diff --git a/src/emu/cpu/tlcs90/tlcs90.c b/src/emu/cpu/tlcs90/tlcs90.c index 3a1576eaa65..dc18b69b020 100644 --- a/src/emu/cpu/tlcs90/tlcs90.c +++ b/src/emu/cpu/tlcs90/tlcs90.c @@ -2430,7 +2430,7 @@ static TIMER_CALLBACK( t90_timer_callback ) case 2: if ( !is16bit ) if ( (T90.internal_registers[ T90_TCLK - T90_IOBASE ] & (0x03 << (i * 2 + 2))) == 0 ) // T0/T1 match signal clocks T1/T3 - t90_timer_callback(machine, i+1); + t90_timer_callback(machine, NULL, i+1); break; } } @@ -2446,7 +2446,7 @@ static TIMER_CALLBACK( t90_timer_callback ) case 0: case 2: if ( is16bit ) // T0/T1 overflow signal clocks T1/T3 - t90_timer_callback(machine, i+1); + t90_timer_callback(machine, NULL, i+1); break; } } @@ -2662,9 +2662,9 @@ static void t90_init(int index, int clock, const void *config, int (*irqcallback // Timers for (i = 0; i < 4; i++) - T90.timer[i] = timer_alloc(t90_timer_callback); + T90.timer[i] = timer_alloc(t90_timer_callback, NULL); - T90.timer[4] = timer_alloc(t90_timer4_callback); + T90.timer[4] = timer_alloc(t90_timer4_callback, NULL); } static ADDRESS_MAP_START(tmp90840_mem, ADDRESS_SPACE_PROGRAM, 8) diff --git a/src/emu/cpu/tms34010/tms34010.c b/src/emu/cpu/tms34010/tms34010.c index b2375f4d0b5..eab03d73025 100644 --- a/src/emu/cpu/tms34010/tms34010.c +++ b/src/emu/cpu/tms34010/tms34010.c @@ -616,7 +616,7 @@ static void tms34010_init(int index, int clock, const void *_config, int (*irqca screen_to_cpu[config->scrnum] = index; /* allocate a scanline timer and set it to go off at the start */ - state.scantimer = timer_alloc(scanline_callback); + state.scantimer = timer_alloc(scanline_callback, NULL); timer_adjust(state.scantimer, attotime_zero, index, attotime_zero); /* allocate the shiftreg */ @@ -932,7 +932,7 @@ static TIMER_CALLBACK( scanline_callback ) if (enabled && vcount == SMART_IOREG(DPYINT)) { /* generate the display interrupt signal */ - internal_interrupt_callback(machine, cpunum | (TMS34010_DI << 8)); + internal_interrupt_callback(machine, NULL, cpunum | (TMS34010_DI << 8)); } /* at the start of VBLANK, load the starting display address */ @@ -1179,7 +1179,7 @@ WRITE16_HANDLER( tms34010_io_register_w ) /* NMI issued? */ if (data & 0x0100) - timer_call_after_resynch(cpunum, internal_interrupt_callback); + timer_call_after_resynch(NULL, cpunum, internal_interrupt_callback); break; case REG_HSTCTLL: @@ -1214,7 +1214,7 @@ WRITE16_HANDLER( tms34010_io_register_w ) /* input interrupt? (should really be state-based, but the functions don't exist!) */ if (!(oldreg & 0x0008) && (newreg & 0x0008)) - timer_call_after_resynch(cpunum | (TMS34010_HI << 8), internal_interrupt_callback); + timer_call_after_resynch(NULL, cpunum | (TMS34010_HI << 8), internal_interrupt_callback); else if ((oldreg & 0x0008) && !(newreg & 0x0008)) IOREG(REG_INTPEND) &= ~TMS34010_HI; break; @@ -1323,7 +1323,7 @@ WRITE16_HANDLER( tms34020_io_register_w ) /* NMI issued? */ if (data & 0x0100) - timer_call_after_resynch(cpunum, internal_interrupt_callback); + timer_call_after_resynch(NULL, cpunum, internal_interrupt_callback); break; case REG020_HSTCTLL: @@ -1358,7 +1358,7 @@ WRITE16_HANDLER( tms34020_io_register_w ) /* input interrupt? (should really be state-based, but the functions don't exist!) */ if (!(oldreg & 0x0008) && (newreg & 0x0008)) - timer_call_after_resynch(cpunum | (TMS34010_HI << 8), internal_interrupt_callback); + timer_call_after_resynch(NULL, cpunum | (TMS34010_HI << 8), internal_interrupt_callback); else if ((oldreg & 0x0008) && !(newreg & 0x0008)) IOREG(REG020_INTPEND) &= ~TMS34010_HI; break; diff --git a/src/emu/cpu/tms9900/99xxcore.h b/src/emu/cpu/tms9900/99xxcore.h index 49c80d734b4..360c92c7aff 100644 --- a/src/emu/cpu/tms9900/99xxcore.h +++ b/src/emu/cpu/tms9900/99xxcore.h @@ -1284,7 +1284,7 @@ static void tms99xx_init(int index, int clock, const void *config, int (*irqcall I.irq_callback = irqcallback; #if (TMS99XX_MODEL == TMS9995_ID) - I.timer = timer_alloc(decrementer_callback); + I.timer = timer_alloc(decrementer_callback, NULL); #endif I.idle_callback = param ? param->idle_callback : NULL; @@ -1864,7 +1864,7 @@ static void tms99xx_set_irq_line(int irqline, int state) { /* decrement, then interrupt if reach 0 */ if ((-- I.decrementer_count) == 0) { - decrementer_callback(Machine, 0); + decrementer_callback(Machine, NULL, 0); I.decrementer_count = I.decrementer_interval; /* reload */ } } diff --git a/src/emu/cpu/v810/v810.c b/src/emu/cpu/v810/v810.c index 4eabb624492..26d7b7ee708 100644 --- a/src/emu/cpu/v810/v810.c +++ b/src/emu/cpu/v810/v810.c @@ -34,7 +34,7 @@ typedef struct static v810info v810; -int v810_ICount; +static int v810_ICount; #define R0 v810.reg[0] #define R1 v810.reg[1] diff --git a/src/emu/cpu/v810/v810.h b/src/emu/cpu/v810/v810.h index 2b522609f88..4832537a009 100644 --- a/src/emu/cpu/v810/v810.h +++ b/src/emu/cpu/v810/v810.h @@ -3,8 +3,6 @@ #include "cpuintrf.h" -extern int v810_ICount; - void v810_get_info(UINT32, cpuinfo*); #define R_B(addr) (program_read_byte_32le(addr)) diff --git a/src/emu/cpu/z80gb/z80gb.c b/src/emu/cpu/z80gb/z80gb.c index 99ca7773bdd..61dca398cd4 100644 --- a/src/emu/cpu/z80gb/z80gb.c +++ b/src/emu/cpu/z80gb/z80gb.c @@ -129,7 +129,7 @@ INLINE void mem_WriteWord (UINT32 address, UINT16 value) } /* Nr of cycles to run */ -int z80gb_ICount; +static int z80gb_ICount; static int Cycles[256] = { diff --git a/src/emu/cpu/z80gb/z80gb.h b/src/emu/cpu/z80gb/z80gb.h index aca87845348..5721c4cf8aa 100644 --- a/src/emu/cpu/z80gb/z80gb.h +++ b/src/emu/cpu/z80gb/z80gb.h @@ -3,8 +3,6 @@ #include "cpuintrf.h" -extern int z80gb_ICount; - typedef struct { UINT16 *regs; UINT8 features; |
