diff options
Diffstat (limited to 'src/emu/cpu/z8000/z8000cpu.h')
-rw-r--r-- | src/emu/cpu/z8000/z8000cpu.h | 204 |
1 files changed, 102 insertions, 102 deletions
diff --git a/src/emu/cpu/z8000/z8000cpu.h b/src/emu/cpu/z8000/z8000cpu.h index ffdad4be074..3063b77d092 100644 --- a/src/emu/cpu/z8000/z8000cpu.h +++ b/src/emu/cpu/z8000/z8000cpu.h @@ -60,45 +60,45 @@ #define PSA_ADDR (cpustate->device->type() == Z8001 ? segmented_addr((cpustate->psapseg << 16) | cpustate->psapoff) : cpustate->psapoff) /* these vectors are based on cpustate->psap @@@*/ -#define RST (PSA_ADDR + 0) /* start up cpustate->fcw and cpustate->pc */ -#define EPU (PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x0008 : 0x0004)) /* extension processor unit? trap */ -#define TRAP (PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x0010 : 0x0008)) /* privilege violation trap */ -#define SYSCALL (PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x0018 : 0x000c)) /* system call SC */ -#define SEGTRAP (PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x0020 : 0x0010)) /* segment trap */ -#define NMI (PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x0028 : 0x0014)) /* non maskable interrupt */ -#define NVI (PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x0030 : 0x0018)) /* non vectored interrupt */ -#define VI (PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x0038 : 0x001c)) /* vectored interrupt */ -#define VEC00 (PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x003c : 0x001e)) /* vector n cpustate->pc value */ +#define RST (PSA_ADDR + 0) /* start up cpustate->fcw and cpustate->pc */ +#define EPU (PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x0008 : 0x0004)) /* extension processor unit? trap */ +#define TRAP (PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x0010 : 0x0008)) /* privilege violation trap */ +#define SYSCALL (PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x0018 : 0x000c)) /* system call SC */ +#define SEGTRAP (PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x0020 : 0x0010)) /* segment trap */ +#define NMI (PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x0028 : 0x0014)) /* non maskable interrupt */ +#define NVI (PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x0030 : 0x0018)) /* non vectored interrupt */ +#define VI (PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x0038 : 0x001c)) /* vectored interrupt */ +#define VEC00 (PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x003c : 0x001e)) /* vector n cpustate->pc value */ /* bits of the cpustate->fcw */ -#define F_SEG 0x8000 /* segmented mode (Z8001 only) */ -#define F_S_N 0x4000 /* system / normal mode */ -#define F_EPU 0x2000 /* extension processor unit? */ -#define F_VIE 0x1000 /* vectored interrupt enable */ -#define F_NVIE 0x0800 /* non vectored interrupt enable */ -#define F_10 0x0400 /* unused */ -#define F_9 0x0200 /* unused */ -#define F_8 0x0100 /* unused */ -#define F_C 0x0080 /* carry flag */ -#define F_Z 0x0040 /* zero flag */ -#define F_S 0x0020 /* sign flag */ -#define F_PV 0x0010 /* parity/overflow flag */ -#define F_DA 0x0008 /* decimal adjust flag (0 add/adc, 1 sub/sbc) */ -#define F_H 0x0004 /* half carry flag (byte arithmetic only) */ -#define F_1 0x0002 /* unused */ -#define F_0 0x0001 /* unused */ +#define F_SEG 0x8000 /* segmented mode (Z8001 only) */ +#define F_S_N 0x4000 /* system / normal mode */ +#define F_EPU 0x2000 /* extension processor unit? */ +#define F_VIE 0x1000 /* vectored interrupt enable */ +#define F_NVIE 0x0800 /* non vectored interrupt enable */ +#define F_10 0x0400 /* unused */ +#define F_9 0x0200 /* unused */ +#define F_8 0x0100 /* unused */ +#define F_C 0x0080 /* carry flag */ +#define F_Z 0x0040 /* zero flag */ +#define F_S 0x0020 /* sign flag */ +#define F_PV 0x0010 /* parity/overflow flag */ +#define F_DA 0x0008 /* decimal adjust flag (0 add/adc, 1 sub/sbc) */ +#define F_H 0x0004 /* half carry flag (byte arithmetic only) */ +#define F_1 0x0002 /* unused */ +#define F_0 0x0001 /* unused */ /* opcode word numbers in cpustate->op[] array */ -#define OP0 0 +#define OP0 0 #define OP1 1 #define OP2 2 /* nibble shift factors for an opcode word */ /* left to right: 0x1340 -> NIB0=1, NIB1=3, NIB2=4, NIB3=0 */ #define NIB0 12 -#define NIB1 8 -#define NIB2 4 -#define NIB3 0 +#define NIB1 8 +#define NIB2 4 +#define NIB3 0 /* sign bit masks for byte, word and long */ #define S08 0x80 @@ -107,107 +107,107 @@ /* get a single flag bit 0/1 */ #define GET_C ((cpustate->fcw >> 7) & 1) -#define GET_Z ((cpustate->fcw >> 6) & 1) -#define GET_S ((cpustate->fcw >> 5) & 1) -#define GET_PV ((cpustate->fcw >> 4) & 1) -#define GET_DA ((cpustate->fcw >> 3) & 1) -#define GET_H ((cpustate->fcw >> 2) & 1) +#define GET_Z ((cpustate->fcw >> 6) & 1) +#define GET_S ((cpustate->fcw >> 5) & 1) +#define GET_PV ((cpustate->fcw >> 4) & 1) +#define GET_DA ((cpustate->fcw >> 3) & 1) +#define GET_H ((cpustate->fcw >> 2) & 1) /* clear a single flag bit */ #define CLR_C cpustate->fcw &= ~F_C -#define CLR_Z cpustate->fcw &= ~F_Z -#define CLR_S cpustate->fcw &= ~F_S -#define CLR_P cpustate->fcw &= ~F_PV -#define CLR_V cpustate->fcw &= ~F_PV -#define CLR_DA cpustate->fcw &= ~F_DA -#define CLR_H cpustate->fcw &= ~F_H +#define CLR_Z cpustate->fcw &= ~F_Z +#define CLR_S cpustate->fcw &= ~F_S +#define CLR_P cpustate->fcw &= ~F_PV +#define CLR_V cpustate->fcw &= ~F_PV +#define CLR_DA cpustate->fcw &= ~F_DA +#define CLR_H cpustate->fcw &= ~F_H /* clear a flag bit combination */ #define CLR_CZS cpustate->fcw &= ~(F_C|F_Z|F_S) -#define CLR_CZSP cpustate->fcw &= ~(F_C|F_Z|F_S|F_PV) -#define CLR_CZSV cpustate->fcw &= ~(F_C|F_Z|F_S|F_PV) -#define CLR_CZSVH cpustate->fcw &= ~(F_C|F_Z|F_S|F_PV|F_H) -#define CLR_ZS cpustate->fcw &= ~(F_Z|F_S) -#define CLR_ZSV cpustate->fcw &= ~(F_Z|F_S|F_PV) -#define CLR_ZSP cpustate->fcw &= ~(F_Z|F_S|F_PV) +#define CLR_CZSP cpustate->fcw &= ~(F_C|F_Z|F_S|F_PV) +#define CLR_CZSV cpustate->fcw &= ~(F_C|F_Z|F_S|F_PV) +#define CLR_CZSVH cpustate->fcw &= ~(F_C|F_Z|F_S|F_PV|F_H) +#define CLR_ZS cpustate->fcw &= ~(F_Z|F_S) +#define CLR_ZSV cpustate->fcw &= ~(F_Z|F_S|F_PV) +#define CLR_ZSP cpustate->fcw &= ~(F_Z|F_S|F_PV) /* set a single flag bit */ #define SET_C cpustate->fcw |= F_C -#define SET_Z cpustate->fcw |= F_Z -#define SET_S cpustate->fcw |= F_S -#define SET_P cpustate->fcw |= F_PV -#define SET_V cpustate->fcw |= F_PV -#define SET_DA cpustate->fcw |= F_DA -#define SET_H cpustate->fcw |= F_H +#define SET_Z cpustate->fcw |= F_Z +#define SET_S cpustate->fcw |= F_S +#define SET_P cpustate->fcw |= F_PV +#define SET_V cpustate->fcw |= F_PV +#define SET_DA cpustate->fcw |= F_DA +#define SET_H cpustate->fcw |= F_H /* set a flag bit combination */ #define SET_SC cpustate->fcw |= F_C | F_S /* check condition codes */ -#define CC0 (0) /* always false */ -#define CC1 (GET_PV^GET_S) /* less than */ -#define CC2 (GET_Z|(GET_PV^GET_S)) /* less than or equal */ -#define CC3 (GET_Z|GET_C) /* unsigned less than or equal */ -#define CC4 GET_PV /* parity even / overflow */ -#define CC5 GET_S /* minus (signed) */ -#define CC6 GET_Z /* zero / equal */ -#define CC7 GET_C /* carry / unsigned less than */ - -#define CC8 (1) /* always true */ -#define CC9 !(GET_PV^GET_S) /* greater than or equal */ -#define CCA !(GET_Z|(GET_PV^GET_S)) /* greater than */ -#define CCB !(GET_Z|GET_C) /* unsigned greater than */ -#define CCC !GET_PV /* parity odd / no overflow */ -#define CCD !GET_S /* plus (not signed) */ -#define CCE !GET_Z /* not zero / not equal */ -#define CCF !GET_C /* not carry / unsigned greater than */ +#define CC0 (0) /* always false */ +#define CC1 (GET_PV^GET_S) /* less than */ +#define CC2 (GET_Z|(GET_PV^GET_S)) /* less than or equal */ +#define CC3 (GET_Z|GET_C) /* unsigned less than or equal */ +#define CC4 GET_PV /* parity even / overflow */ +#define CC5 GET_S /* minus (signed) */ +#define CC6 GET_Z /* zero / equal */ +#define CC7 GET_C /* carry / unsigned less than */ + +#define CC8 (1) /* always true */ +#define CC9 !(GET_PV^GET_S) /* greater than or equal */ +#define CCA !(GET_Z|(GET_PV^GET_S)) /* greater than */ +#define CCB !(GET_Z|GET_C) /* unsigned greater than */ +#define CCC !GET_PV /* parity odd / no overflow */ +#define CCD !GET_S /* plus (not signed) */ +#define CCE !GET_Z /* not zero / not equal */ +#define CCF !GET_C /* not carry / unsigned greater than */ /* get data from the opcode words */ /* o is the opcode word offset */ /* s is a nibble shift factor */ #define GET_BIT(o) UINT16 bit = 1 << (get_operand(cpustate, o) & 15) -#define GET_CCC(o,s) UINT8 cc = (get_operand(cpustate, o) >> (s)) & 15 - -#define GET_DST(o,s) UINT8 dst = (get_operand(cpustate, o) >> (s)) & 15 -#define GET_SRC(o,s) UINT8 src = (get_operand(cpustate, o) >> (s)) & 15 -#define GET_IDX(o,s) UINT8 idx = (get_operand(cpustate, o) >> (s)) & 15 -#define GET_CNT(o,s) INT8 cnt = (get_operand(cpustate, o) >> (s)) & 15 -#define GET_IMM4(o,s) UINT8 imm4 = (get_operand(cpustate, o) >> (s)) & 15 - -#define GET_I4M1(o,s) UINT8 i4p1 = ((get_operand(cpustate, o) >> (s)) & 15) + 1 -#define GET_IMM1(o,s) UINT8 imm1 = (get_operand(cpustate, o) >> (s)) & 2 -#define GET_IMM2(o,s) UINT8 imm2 = (get_operand(cpustate, o) >> (s)) & 3 -#define GET_IMM3(o,s) UINT8 imm3 = (get_operand(cpustate, o) >> (s)) & 7 - -#define GET_IMM8(o) UINT8 imm8 = (UINT8)get_operand(cpustate, o) - -#define GET_IMM16(o) UINT16 imm16 = get_operand(cpustate, o) -#define GET_IDX16(o) UINT32 idx16 = get_operand(cpustate, o) -#define GET_IMM32 UINT32 imm32 = (get_operand(cpustate, 1) << 16) + get_operand(cpustate, 2) -#define GET_DSP7 UINT8 dsp7 = get_operand(cpustate, 0) & 127 -#define GET_DSP8 INT8 dsp8 = (INT8)get_operand(cpustate, 0) -#define GET_DSP16 UINT32 dsp16 = addr_add(cpustate, cpustate->pc, (INT16)get_operand(cpustate, 1)) -#define GET_ADDR(o) UINT32 addr = (UINT32)get_addr_operand(cpustate, o) -#define GET_ADDR_RAW(o) UINT32 addr = (UINT32)get_raw_addr_operand(cpustate, o) +#define GET_CCC(o,s) UINT8 cc = (get_operand(cpustate, o) >> (s)) & 15 + +#define GET_DST(o,s) UINT8 dst = (get_operand(cpustate, o) >> (s)) & 15 +#define GET_SRC(o,s) UINT8 src = (get_operand(cpustate, o) >> (s)) & 15 +#define GET_IDX(o,s) UINT8 idx = (get_operand(cpustate, o) >> (s)) & 15 +#define GET_CNT(o,s) INT8 cnt = (get_operand(cpustate, o) >> (s)) & 15 +#define GET_IMM4(o,s) UINT8 imm4 = (get_operand(cpustate, o) >> (s)) & 15 + +#define GET_I4M1(o,s) UINT8 i4p1 = ((get_operand(cpustate, o) >> (s)) & 15) + 1 +#define GET_IMM1(o,s) UINT8 imm1 = (get_operand(cpustate, o) >> (s)) & 2 +#define GET_IMM2(o,s) UINT8 imm2 = (get_operand(cpustate, o) >> (s)) & 3 +#define GET_IMM3(o,s) UINT8 imm3 = (get_operand(cpustate, o) >> (s)) & 7 + +#define GET_IMM8(o) UINT8 imm8 = (UINT8)get_operand(cpustate, o) + +#define GET_IMM16(o) UINT16 imm16 = get_operand(cpustate, o) +#define GET_IDX16(o) UINT32 idx16 = get_operand(cpustate, o) +#define GET_IMM32 UINT32 imm32 = (get_operand(cpustate, 1) << 16) + get_operand(cpustate, 2) +#define GET_DSP7 UINT8 dsp7 = get_operand(cpustate, 0) & 127 +#define GET_DSP8 INT8 dsp8 = (INT8)get_operand(cpustate, 0) +#define GET_DSP16 UINT32 dsp16 = addr_add(cpustate, cpustate->pc, (INT16)get_operand(cpustate, 1)) +#define GET_ADDR(o) UINT32 addr = (UINT32)get_addr_operand(cpustate, o) +#define GET_ADDR_RAW(o) UINT32 addr = (UINT32)get_raw_addr_operand(cpustate, o) struct z8000_state; /* structure for the opcode definition table */ struct Z8000_init { - int beg, end, step; - int size, cycles; - void (*opcode)(z8000_state *cpustate); - const char *dasm; - UINT32 dasmflags; + int beg, end, step; + int size, cycles; + void (*opcode)(z8000_state *cpustate); + const char *dasm; + UINT32 dasmflags; }; /* structure for the opcode execution table / disassembler */ struct Z8000_exec { - void (*opcode)(z8000_state *cpustate); - int cycles; - int size; - const char *dasm; - UINT32 dasmflags; + void (*opcode)(z8000_state *cpustate); + int cycles; + int size; + const char *dasm; + UINT32 dasmflags; }; /* opcode execution table */ |