diff options
Diffstat (limited to 'src/emu/cpu/m68000/m68kdasm.c')
-rw-r--r-- | src/emu/cpu/m68000/m68kdasm.c | 228 |
1 files changed, 114 insertions, 114 deletions
diff --git a/src/emu/cpu/m68000/m68kdasm.c b/src/emu/cpu/m68000/m68kdasm.c index 112ebbb29d2..887f84b7cfd 100644 --- a/src/emu/cpu/m68000/m68kdasm.c +++ b/src/emu/cpu/m68000/m68kdasm.c @@ -82,26 +82,26 @@ #define TYPE_68020 8 #define TYPE_68030 16 #define TYPE_68040 32 -#define TYPE_68340 64 // (CPU32) +#define TYPE_68340 64 // (CPU32) #define TYPE_COLDFIRE 128 -#define M68000_ONLY (TYPE_68000 | TYPE_68008) +#define M68000_ONLY (TYPE_68000 | TYPE_68008) -#define M68010_ONLY TYPE_68010 -#define M68010_LESS (TYPE_68000 | TYPE_68008 | TYPE_68010) -#define M68010_PLUS (TYPE_68010 | TYPE_68020 | TYPE_68030 | TYPE_68040 | TYPE_68340 | TYPE_COLDFIRE) +#define M68010_ONLY TYPE_68010 +#define M68010_LESS (TYPE_68000 | TYPE_68008 | TYPE_68010) +#define M68010_PLUS (TYPE_68010 | TYPE_68020 | TYPE_68030 | TYPE_68040 | TYPE_68340 | TYPE_COLDFIRE) -#define M68020_ONLY (TYPE_68020 | TYPE_68340) -#define M68020_LESS (TYPE_68010 | TYPE_68020 | TYPE_68340) -#define M68020_PLUS (TYPE_68020 | TYPE_68030 | TYPE_68040 | TYPE_68340 | TYPE_COLDFIRE) +#define M68020_ONLY (TYPE_68020 | TYPE_68340) +#define M68020_LESS (TYPE_68010 | TYPE_68020 | TYPE_68340) +#define M68020_PLUS (TYPE_68020 | TYPE_68030 | TYPE_68040 | TYPE_68340 | TYPE_COLDFIRE) -#define M68030_ONLY TYPE_68030 -#define M68030_LESS (TYPE_68010 | TYPE_68020 | TYPE_68030 | TYPE_68340 ) -#define M68030_PLUS (TYPE_68030 | TYPE_68040) +#define M68030_ONLY TYPE_68030 +#define M68030_LESS (TYPE_68010 | TYPE_68020 | TYPE_68030 | TYPE_68340 ) +#define M68030_PLUS (TYPE_68030 | TYPE_68040) -#define M68040_PLUS TYPE_68040 +#define M68040_PLUS TYPE_68040 -#define COLDFIRE TYPE_COLDFIRE +#define COLDFIRE TYPE_COLDFIRE /* Extension word formats */ #define EXT_8BIT_DISPLACEMENT(A) ((A)&0xff) @@ -125,7 +125,7 @@ /* Opcode flags */ -#define SET_OPCODE_FLAGS(x) g_opcode_type = x; +#define SET_OPCODE_FLAGS(x) g_opcode_type = x; #define COMBINE_OPCODE_FLAGS(x) ((x) | g_opcode_type | DASMFLAG_SUPPORTED) @@ -216,14 +216,14 @@ static const char *const g_cc[16] = static const char *const g_cpcc[64] = {/* 000 001 010 011 100 101 110 111 */ - "f", "eq", "ogt", "oge", "olt", "ole", "ogl", "or", /* 000 */ - "un", "ueq", "ugt", "uge", "ult", "ule", "ne", "t", /* 001 */ - "sf", "seq", "gt", "ge", "lt", "le", "gl" "gle", /* 010 */ - "ngle", "ngl", "nle", "nlt", "nge", "ngt", "sne", "st", /* 011 */ - "?", "?", "?", "?", "?", "?", "?", "?", /* 100 */ - "?", "?", "?", "?", "?", "?", "?", "?", /* 101 */ - "?", "?", "?", "?", "?", "?", "?", "?", /* 110 */ - "?", "?", "?", "?", "?", "?", "?", "?" /* 111 */ + "f", "eq", "ogt", "oge", "olt", "ole", "ogl", "or", /* 000 */ + "un", "ueq", "ugt", "uge", "ult", "ule", "ne", "t", /* 001 */ + "sf", "seq", "gt", "ge", "lt", "le", "gl" "gle", /* 010 */ + "ngle", "ngl", "nle", "nlt", "nge", "ngt", "sne", "st", /* 011 */ + "?", "?", "?", "?", "?", "?", "?", "?", /* 100 */ + "?", "?", "?", "?", "?", "?", "?", "?", /* 101 */ + "?", "?", "?", "?", "?", "?", "?", "?", /* 110 */ + "?", "?", "?", "?", "?", "?", "?", "?" /* 111 */ }; static const char *const g_mmuregs[8] = @@ -241,13 +241,13 @@ static const char *const g_mmucond[16] = /* =========================== UTILITY FUNCTIONS ========================== */ /* ======================================================================== */ -#define LIMIT_CPU_TYPES(ALLOWED_CPU_TYPES) \ - if(!(g_cpu_type & ALLOWED_CPU_TYPES)) \ - { \ - if((g_cpu_ir & 0xf000) == 0xf000) \ - d68000_1111(); \ - else d68000_illegal(); \ - return; \ +#define LIMIT_CPU_TYPES(ALLOWED_CPU_TYPES) \ + if(!(g_cpu_type & ALLOWED_CPU_TYPES)) \ + { \ + if((g_cpu_ir & 0xf000) == 0xf000) \ + d68000_1111(); \ + else d68000_illegal(); \ + return; \ } static UINT32 dasm_read_imm_8(UINT32 advance) @@ -262,7 +262,7 @@ static UINT32 dasm_read_imm_16(UINT32 advance) { UINT32 result; result = (g_rawop[g_cpu_pc + 0 - g_rawbasepc] << 8) | - g_rawop[g_cpu_pc + 1 - g_rawbasepc]; + g_rawop[g_cpu_pc + 1 - g_rawbasepc]; g_cpu_pc += advance; return result; } @@ -271,9 +271,9 @@ static UINT32 dasm_read_imm_32(UINT32 advance) { UINT32 result; result = (g_rawop[g_cpu_pc + 0 - g_rawbasepc] << 24) | - (g_rawop[g_cpu_pc + 1 - g_rawbasepc] << 16) | - (g_rawop[g_cpu_pc + 2 - g_rawbasepc] << 8) | - g_rawop[g_cpu_pc + 3 - g_rawbasepc]; + (g_rawop[g_cpu_pc + 1 - g_rawbasepc] << 16) | + (g_rawop[g_cpu_pc + 2 - g_rawbasepc] << 8) | + g_rawop[g_cpu_pc + 3 - g_rawbasepc]; g_cpu_pc += advance; return result; } @@ -1747,61 +1747,61 @@ static void d68040_fpu(void) { switch(w2 & 0x7f) { - case 0x00: sprintf(mnemonic, "fmove"); break; - case 0x01: sprintf(mnemonic, "fint"); break; - case 0x02: sprintf(mnemonic, "fsinh"); break; - case 0x03: sprintf(mnemonic, "fintrz"); break; - case 0x04: sprintf(mnemonic, "fsqrt"); break; - case 0x06: sprintf(mnemonic, "flognp1"); break; - case 0x08: sprintf(mnemonic, "fetoxm1"); break; - case 0x09: sprintf(mnemonic, "ftanh1"); break; - case 0x0a: sprintf(mnemonic, "fatan"); break; - case 0x0c: sprintf(mnemonic, "fasin"); break; - case 0x0d: sprintf(mnemonic, "fatanh"); break; - case 0x0e: sprintf(mnemonic, "fsin"); break; - case 0x0f: sprintf(mnemonic, "ftan"); break; - case 0x10: sprintf(mnemonic, "fetox"); break; - case 0x11: sprintf(mnemonic, "ftwotox"); break; - case 0x12: sprintf(mnemonic, "ftentox"); break; - case 0x14: sprintf(mnemonic, "flogn"); break; - case 0x15: sprintf(mnemonic, "flog10"); break; - case 0x16: sprintf(mnemonic, "flog2"); break; - case 0x18: sprintf(mnemonic, "fabs"); break; - case 0x19: sprintf(mnemonic, "fcosh"); break; - case 0x1a: sprintf(mnemonic, "fneg"); break; - case 0x1c: sprintf(mnemonic, "facos"); break; - case 0x1d: sprintf(mnemonic, "fcos"); break; - case 0x1e: sprintf(mnemonic, "fgetexp"); break; - case 0x1f: sprintf(mnemonic, "fgetman"); break; - case 0x20: sprintf(mnemonic, "fdiv"); break; - case 0x21: sprintf(mnemonic, "fmod"); break; - case 0x22: sprintf(mnemonic, "fadd"); break; - case 0x23: sprintf(mnemonic, "fmul"); break; - case 0x24: sprintf(mnemonic, "fsgldiv"); break; - case 0x25: sprintf(mnemonic, "frem"); break; - case 0x26: sprintf(mnemonic, "fscale"); break; - case 0x27: sprintf(mnemonic, "fsglmul"); break; - case 0x28: sprintf(mnemonic, "fsub"); break; + case 0x00: sprintf(mnemonic, "fmove"); break; + case 0x01: sprintf(mnemonic, "fint"); break; + case 0x02: sprintf(mnemonic, "fsinh"); break; + case 0x03: sprintf(mnemonic, "fintrz"); break; + case 0x04: sprintf(mnemonic, "fsqrt"); break; + case 0x06: sprintf(mnemonic, "flognp1"); break; + case 0x08: sprintf(mnemonic, "fetoxm1"); break; + case 0x09: sprintf(mnemonic, "ftanh1"); break; + case 0x0a: sprintf(mnemonic, "fatan"); break; + case 0x0c: sprintf(mnemonic, "fasin"); break; + case 0x0d: sprintf(mnemonic, "fatanh"); break; + case 0x0e: sprintf(mnemonic, "fsin"); break; + case 0x0f: sprintf(mnemonic, "ftan"); break; + case 0x10: sprintf(mnemonic, "fetox"); break; + case 0x11: sprintf(mnemonic, "ftwotox"); break; + case 0x12: sprintf(mnemonic, "ftentox"); break; + case 0x14: sprintf(mnemonic, "flogn"); break; + case 0x15: sprintf(mnemonic, "flog10"); break; + case 0x16: sprintf(mnemonic, "flog2"); break; + case 0x18: sprintf(mnemonic, "fabs"); break; + case 0x19: sprintf(mnemonic, "fcosh"); break; + case 0x1a: sprintf(mnemonic, "fneg"); break; + case 0x1c: sprintf(mnemonic, "facos"); break; + case 0x1d: sprintf(mnemonic, "fcos"); break; + case 0x1e: sprintf(mnemonic, "fgetexp"); break; + case 0x1f: sprintf(mnemonic, "fgetman"); break; + case 0x20: sprintf(mnemonic, "fdiv"); break; + case 0x21: sprintf(mnemonic, "fmod"); break; + case 0x22: sprintf(mnemonic, "fadd"); break; + case 0x23: sprintf(mnemonic, "fmul"); break; + case 0x24: sprintf(mnemonic, "fsgldiv"); break; + case 0x25: sprintf(mnemonic, "frem"); break; + case 0x26: sprintf(mnemonic, "fscale"); break; + case 0x27: sprintf(mnemonic, "fsglmul"); break; + case 0x28: sprintf(mnemonic, "fsub"); break; case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37: sprintf(mnemonic, "fsincos"); break; - case 0x38: sprintf(mnemonic, "fcmp"); break; - case 0x3a: sprintf(mnemonic, "ftst"); break; - case 0x41: sprintf(mnemonic, "fssqrt"); break; - case 0x45: sprintf(mnemonic, "fdsqrt"); break; - case 0x58: sprintf(mnemonic, "fsabs"); break; - case 0x5a: sprintf(mnemonic, "fsneg"); break; - case 0x5c: sprintf(mnemonic, "fdabs"); break; - case 0x5e: sprintf(mnemonic, "fdneg"); break; - case 0x60: sprintf(mnemonic, "fsdiv"); break; - case 0x62: sprintf(mnemonic, "fsadd"); break; - case 0x63: sprintf(mnemonic, "fsmul"); break; - case 0x64: sprintf(mnemonic, "fddiv"); break; - case 0x66: sprintf(mnemonic, "fdadd"); break; - case 0x67: sprintf(mnemonic, "fdmul"); break; - case 0x68: sprintf(mnemonic, "fssub"); break; - case 0x6c: sprintf(mnemonic, "fdsub"); break; - - default: sprintf(mnemonic, "FPU (?)"); break; + case 0x38: sprintf(mnemonic, "fcmp"); break; + case 0x3a: sprintf(mnemonic, "ftst"); break; + case 0x41: sprintf(mnemonic, "fssqrt"); break; + case 0x45: sprintf(mnemonic, "fdsqrt"); break; + case 0x58: sprintf(mnemonic, "fsabs"); break; + case 0x5a: sprintf(mnemonic, "fsneg"); break; + case 0x5c: sprintf(mnemonic, "fdabs"); break; + case 0x5e: sprintf(mnemonic, "fdneg"); break; + case 0x60: sprintf(mnemonic, "fsdiv"); break; + case 0x62: sprintf(mnemonic, "fsadd"); break; + case 0x63: sprintf(mnemonic, "fsmul"); break; + case 0x64: sprintf(mnemonic, "fddiv"); break; + case 0x66: sprintf(mnemonic, "fdadd"); break; + case 0x67: sprintf(mnemonic, "fdmul"); break; + case 0x68: sprintf(mnemonic, "fssub"); break; + case 0x6c: sprintf(mnemonic, "fdsub"); break; + + default: sprintf(mnemonic, "FPU (?)"); break; } if (w2 & 0x4000) @@ -1819,11 +1819,11 @@ static void d68040_fpu(void) { switch ((w2>>10)&7) { - case 3: // packed decimal w/fixed k-factor + case 3: // packed decimal w/fixed k-factor sprintf(g_dasm_str, "fmove%s FP%d, %s {#%d}", float_data_format[(w2>>10)&7], dst_reg, get_ea_mode_str_32(g_cpu_ir), sext_7bit_int(w2&0x7f)); break; - case 7: // packed decimal w/dynamic k-factor (register) + case 7: // packed decimal w/dynamic k-factor (register) sprintf(g_dasm_str, "fmove%s FP%d, %s {D%d}", float_data_format[(w2>>10)&7], dst_reg, get_ea_mode_str_32(g_cpu_ir), (w2>>4)&7); break; @@ -1834,7 +1834,7 @@ static void d68040_fpu(void) break; } - case 0x4: // ea to control + case 0x4: // ea to control { sprintf(g_dasm_str, "fmovem.l %s, ", get_ea_mode_str_32(g_cpu_ir)); if (w2 & 0x1000) strcat(g_dasm_str, "fpcr"); @@ -1843,7 +1843,7 @@ static void d68040_fpu(void) break; } - case 0x5: // control to ea + case 0x5: // control to ea { strcpy(g_dasm_str, "fmovem.l "); @@ -1855,15 +1855,15 @@ static void d68040_fpu(void) break; } - case 0x6: // memory to FPU, list + case 0x6: // memory to FPU, list { char temp[32]; - if ((w2>>11) & 1) // dynamic register list + if ((w2>>11) & 1) // dynamic register list { sprintf(g_dasm_str, "fmovem.x %s, D%d", get_ea_mode_str_32(g_cpu_ir), (w2>>4)&7); } - else // static register list + else // static register list { int i; @@ -1873,11 +1873,11 @@ static void d68040_fpu(void) { if (w2 & (1<<i)) { - if ((w2>>12) & 1) // postincrement or control + if ((w2>>12) & 1) // postincrement or control { sprintf(temp, "FP%d ", 7-i); } - else // predecrement + else // predecrement { sprintf(temp, "FP%d ", i); } @@ -1888,15 +1888,15 @@ static void d68040_fpu(void) break; } - case 0x7: // FPU to memory, list + case 0x7: // FPU to memory, list { char temp[32]; - if ((w2>>11) & 1) // dynamic register list + if ((w2>>11) & 1) // dynamic register list { sprintf(g_dasm_str, "fmovem.x D%d, %s", (w2>>4)&7, get_ea_mode_str_32(g_cpu_ir)); } - else // static register list + else // static register list { int i; @@ -1906,11 +1906,11 @@ static void d68040_fpu(void) { if (w2 & (1<<i)) { - if ((w2>>12) & 1) // postincrement or control + if ((w2>>12) & 1) // postincrement or control { sprintf(temp, "FP%d ", 7-i); } - else // predecrement + else // predecrement { sprintf(temp, "FP%d ", i); } @@ -3239,7 +3239,7 @@ static void d68851_p000(void) // do this after fetching the second PMOVE word so we properly get the 3rd if necessary str = get_ea_mode_str_32(g_cpu_ir); - if ((modes & 0xfde0) == 0x2000) // PLOAD + if ((modes & 0xfde0) == 0x2000) // PLOAD { if (modes & 0x0200) { @@ -3252,30 +3252,30 @@ static void d68851_p000(void) return; } - if ((modes & 0xe200) == 0x2000) // PFLUSH + if ((modes & 0xe200) == 0x2000) // PFLUSH { sprintf(g_dasm_str, "pflushr %x, %x, %s", modes & 0x1f, (modes>>5)&0xf, str); return; } - if (modes == 0xa000) // PFLUSHR + if (modes == 0xa000) // PFLUSHR { sprintf(g_dasm_str, "pflushr %s", str); } - if (modes == 0x2800) // PVALID (FORMAT 1) + if (modes == 0x2800) // PVALID (FORMAT 1) { sprintf(g_dasm_str, "pvalid VAL, %s", str); return; } - if ((modes & 0xfff8) == 0x2c00) // PVALID (FORMAT 2) + if ((modes & 0xfff8) == 0x2c00) // PVALID (FORMAT 2) { sprintf(g_dasm_str, "pvalid A%d, %s", modes & 0xf, str); return; } - if ((modes & 0xe000) == 0x8000) // PTEST + if ((modes & 0xe000) == 0x8000) // PTEST { sprintf(g_dasm_str, "ptest #%d, %s", modes & 0x1f, str); return; @@ -3283,8 +3283,8 @@ static void d68851_p000(void) switch ((modes>>13) & 0x7) { - case 0: // MC68030/040 form with FD bit - case 2: // MC68881 form, FD never set + case 0: // MC68030/040 form with FD bit + case 2: // MC68881 form, FD never set if (modes & 0x0100) { if (modes & 0x0200) @@ -3309,7 +3309,7 @@ static void d68851_p000(void) } break; - case 3: // MC68030 to/from status reg + case 3: // MC68030 to/from status reg if (modes & 0x0200) { sprintf(g_dasm_str, "pmove mmusr, %s", str); @@ -3770,9 +3770,9 @@ static void build_opcode_table(void) { /* Handle destination ea for move instructions */ if((ostruct->opcode_handler == d68000_move_8 || - ostruct->opcode_handler == d68000_move_16 || - ostruct->opcode_handler == d68000_move_32) && - !valid_ea(((opcode>>9)&7) | ((opcode>>3)&0x38), 0xbf8)) + ostruct->opcode_handler == d68000_move_16 || + ostruct->opcode_handler == d68000_move_32) && + !valid_ea(((opcode>>9)&7) | ((opcode>>3)&0x38), 0xbf8)) continue; if(valid_ea(opcode, ostruct->ea_mask)) { @@ -4062,8 +4062,8 @@ unsigned int m68k_is_valid_instruction(unsigned int instruction, unsigned int cp return 0; } if(cpu_type != M68K_CPU_TYPE_68020 && cpu_type != M68K_CPU_TYPE_68EC020 && - (g_instruction_table[instruction] == d68020_callm || - g_instruction_table[instruction] == d68020_rtm)) + (g_instruction_table[instruction] == d68020_callm || + g_instruction_table[instruction] == d68020_rtm)) return 0; return 1; |