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Diffstat (limited to 'src/emu/cpu/i960/i960.c')
-rw-r--r--src/emu/cpu/i960/i960.c216
1 files changed, 108 insertions, 108 deletions
diff --git a/src/emu/cpu/i960/i960.c b/src/emu/cpu/i960/i960.c
index 059f262e312..bf9fb82210d 100644
--- a/src/emu/cpu/i960/i960.c
+++ b/src/emu/cpu/i960/i960.c
@@ -415,15 +415,15 @@ INLINE const char *i960_get_strflags(i960_state_t *i960)
// interrupt dispatch
static void take_interrupt(i960_state_t *i960, int vector, int lvl)
{
- int int_tab = i960->program->read_dword(i960->PRCB+20); // interrupt table
- int int_SP = i960->program->read_dword(i960->PRCB+24); // interrupt stack
+ int int_tab = i960->program->read_dword(i960->PRCB+20); // interrupt table
+ int int_SP = i960->program->read_dword(i960->PRCB+24); // interrupt stack
int SP;
UINT32 IRQV;
IRQV = i960->program->read_dword(int_tab + 36 + (vector-8)*4);
// start the process
- if(!(i960->PC & 0x2000)) // if this is a nested interrupt, don't re-get int_SP
+ if(!(i960->PC & 0x2000)) // if this is a nested interrupt, don't re-get int_SP
{
SP = int_SP;
}
@@ -433,7 +433,7 @@ static void take_interrupt(i960_state_t *i960, int vector, int lvl)
}
SP = (SP + 63) & ~63;
- SP += 128; // emulate ElSemi's core, this fixes the crash in sonic the fighters
+ SP += 128; // emulate ElSemi's core, this fixes the crash in sonic the fighters
do_call(i960, IRQV, 7, SP);
@@ -443,21 +443,21 @@ static void take_interrupt(i960_state_t *i960, int vector, int lvl)
// store the vector
i960->program->write_dword(i960->r[I960_FP]-8, vector-8);
- i960->PC &= ~0x1f00; // clear priority, state, trace-fault pending, and trace enable
- i960->PC |= (lvl<<16); // set CPU level to current IRQ level
- i960->PC |= 0x2002; // set supervisor mode & interrupt flag
+ i960->PC &= ~0x1f00; // clear priority, state, trace-fault pending, and trace enable
+ i960->PC |= (lvl<<16); // set CPU level to current IRQ level
+ i960->PC |= 0x2002; // set supervisor mode & interrupt flag
}
static void check_irqs(i960_state_t *i960)
{
- int int_tab = i960->program->read_dword(i960->PRCB+20); // interrupt table
+ int int_tab = i960->program->read_dword(i960->PRCB+20); // interrupt table
int cpu_pri = (i960->PC>>16)&0x1f;
int pending_pri;
int lvl, irq, take = -1;
int vword;
static const UINT32 lvlmask[4] = { 0x000000ff, 0x0000ff00, 0x00ff0000, 0xff000000 };
- pending_pri = i960->program->read_dword(int_tab); // read pending priorities
+ pending_pri = i960->program->read_dword(int_tab); // read pending priorities
if ((i960->immediate_irq) && ((cpu_pri < i960->immediate_pri) || (i960->immediate_pri == 31)))
{
@@ -471,7 +471,7 @@ static void check_irqs(i960_state_t *i960)
int word, wordl, wordh;
// figure out which word contains this level's priorities
- word = ((lvl / 4) * 4) + 4; // (lvl/4) = word address, *4 for byte address, +4 to skip pending priorities
+ word = ((lvl / 4) * 4) + 4; // (lvl/4) = word address, *4 for byte address, +4 to skip pending priorities
wordl = (lvl % 4) * 8;
wordh = (wordl + 8) - 1;
@@ -533,7 +533,7 @@ static void do_call(i960_state_t *i960, UINT32 adr, int type, UINT32 stack)
i960->program->write_dword(FP + (i*4), i960->r[i]);
}
}
- else // a cache entry is available, use it
+ else // a cache entry is available, use it
{
memcpy(&i960->rcache[i960->rcache_pos][0], i960->r, 0x10 * sizeof(UINT32));
i960->rcache_frame_addr[i960->rcache_pos] = i960->r[I960_FP] & ~0x3f;
@@ -544,7 +544,7 @@ static void do_call(i960_state_t *i960, UINT32 adr, int type, UINT32 stack)
i960->r[I960_PFP] = i960->r[I960_FP] & ~7;
i960->r[I960_PFP] |= type;
- if(type == 7) { // interrupts need special handling
+ if(type == 7) { // interrupts need special handling
// set the stack to the passed-in value to properly handle nested interrupts
// (can't set it externally or the original program's SP will be lost)
i960->r[I960_SP] = stack;
@@ -1122,7 +1122,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
case 0x5b:
switch((opcode >> 7) & 0xf) {
- case 0x0: // addc
+ case 0x0: // addc
{
UINT64 res;
@@ -1132,7 +1132,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
res = t2+(t1+((i960->AC>>1)&1));
set_ri(i960, opcode, res&0xffffffff);
- i960->AC &= ~0x3; // clear C and V
+ i960->AC &= ~0x3; // clear C and V
// set carry
i960->AC |= ((res) & (((UINT64)1) << 32)) ? 0x2 : 0;
// set overflow
@@ -1140,7 +1140,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
}
break;
- case 0x2: // subc
+ case 0x2: // subc
{
UINT64 res;
@@ -1150,7 +1150,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
res = t2-(t1+((i960->AC>>1)&1));
set_ri(i960, opcode, res&0xffffffff);
- i960->AC &= ~0x3; // clear C and V
+ i960->AC &= ~0x3; // clear C and V
// set carry
i960->AC |= ((res) & (((UINT64)1) << 32)) ? 0x2 : 0;
// set overflow
@@ -1427,7 +1427,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
break;
case 0x3: // remr
- i960->icount -= 67; // (67 to 75878 depending on opcodes!!!)
+ i960->icount -= 67; // (67 to 75878 depending on opcodes!!!)
t1f = get_1_rif(i960, opcode);
t2f = get_2_rif(i960, opcode);
set_rif(i960, opcode, fmod(t2f, t1f));
@@ -1669,7 +1669,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
i960->icount -= 37;
t1 = get_1_ri(i960, opcode);
t2 = get_2_ri(i960, opcode);
- if (t1 == 0) // HACK!
+ if (t1 == 0) // HACK!
set_ri(i960, opcode, 0);
else
set_ri(i960, opcode, t2/t1);
@@ -1973,7 +1973,7 @@ static CPU_EXECUTE( i960 )
static void set_irq_line(i960_state_t *i960, int irqline, int state)
{
- int int_tab = i960->program->read_dword(i960->PRCB+20); // interrupt table
+ int int_tab = i960->program->read_dword(i960->PRCB+20); // interrupt table
int cpu_pri = (i960->PC>>16)&0x1f;
int vector =0;
int priority;
@@ -2050,11 +2050,11 @@ static CPU_SET_INFO( i960 )
switch(state) {
// Interfacing
- case CPUINFO_INT_REGISTER + I960_IP: i960->IP = info->i; break;
- case CPUINFO_INT_INPUT_STATE + I960_IRQ0: set_irq_line(i960, I960_IRQ0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + I960_IRQ1: set_irq_line(i960, I960_IRQ1, info->i); break;
- case CPUINFO_INT_INPUT_STATE + I960_IRQ2: set_irq_line(i960, I960_IRQ2, info->i); break;
- case CPUINFO_INT_INPUT_STATE + I960_IRQ3: set_irq_line(i960, I960_IRQ3, info->i); break;
+ case CPUINFO_INT_REGISTER + I960_IP: i960->IP = info->i; break;
+ case CPUINFO_INT_INPUT_STATE + I960_IRQ0: set_irq_line(i960, I960_IRQ0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + I960_IRQ1: set_irq_line(i960, I960_IRQ1, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + I960_IRQ2: set_irq_line(i960, I960_IRQ2, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + I960_IRQ3: set_irq_line(i960, I960_IRQ3, info->i); break;
default:
fatalerror("i960_set_info %x\n", state);
@@ -2091,7 +2091,7 @@ static CPU_RESET( i960 )
i960->IP = i960->program->read_dword(12);
i960->PC = 0x001f2002;
i960->AC = 0;
- i960->ICR = 0xff000000;
+ i960->ICR = 0xff000000;
i960->bursting = 0;
i960->immediate_irq = 0;
@@ -2114,100 +2114,100 @@ CPU_GET_INFO( i960 )
switch(state) {
// Interface functions and variables
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i960); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i960); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(i960); break;
- case CPUINFO_FCT_EXIT: info->exit = 0; break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(i960); break;
- case CPUINFO_FCT_BURN: info->burn = 0; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i960); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &i960->icount; break;
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(i960_state_t); break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 8; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i960); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i960); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(i960); break;
+ case CPUINFO_FCT_EXIT: info->exit = 0; break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(i960); break;
+ case CPUINFO_FCT_BURN: info->burn = 0; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i960); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &i960->icount; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(i960_state_t); break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 8; break;
// Bus sizes
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_LOGADDR_WIDTH_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_LOGADDR_WIDTH_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
- case CPUINFO_INT_LOGADDR_WIDTH_IO: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_LOGADDR_WIDTH_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_LOGADDR_WIDTH_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_LOGADDR_WIDTH_IO: info->i = 0; break;
// Internal maps
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map32 = NULL;break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map32 = NULL;break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_IO: info->internal_map32 = NULL;break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map32 = NULL;break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map32 = NULL;break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_IO: info->internal_map32 = NULL;break;
// CPU misc parameters
- case CPUINFO_STR_NAME: strcpy(info->s, "i960KB"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_FLAGS: strcpy(info->s, i960_get_strflags(i960)); break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_INPUT_LINES: info->i = 4; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = -1; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "i960KB"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_FLAGS: strcpy(info->s, i960_get_strflags(i960)); break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 4; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = -1; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
// CPU main state
- case CPUINFO_INT_PC: info->i = i960->IP; break;
- case CPUINFO_INT_SP: info->i = i960->r[I960_SP]; break;
- case CPUINFO_INT_PREVIOUSPC: info->i = i960->PIP; break;
+ case CPUINFO_INT_PC: info->i = i960->IP; break;
+ case CPUINFO_INT_SP: info->i = i960->r[I960_SP]; break;
+ case CPUINFO_INT_PREVIOUSPC: info->i = i960->PIP; break;
- case CPUINFO_INT_REGISTER + I960_SAT: info->i = i960->SAT; break;
- case CPUINFO_INT_REGISTER + I960_PRCB: info->i = i960->PRCB; break;
- case CPUINFO_INT_REGISTER + I960_PC: info->i = i960->PC; break;
- case CPUINFO_INT_REGISTER + I960_AC: info->i = i960->AC; break;
- case CPUINFO_INT_REGISTER + I960_IP: info->i = i960->IP; break;
- case CPUINFO_INT_REGISTER + I960_PIP: info->i = i960->PIP; break;
+ case CPUINFO_INT_REGISTER + I960_SAT: info->i = i960->SAT; break;
+ case CPUINFO_INT_REGISTER + I960_PRCB: info->i = i960->PRCB; break;
+ case CPUINFO_INT_REGISTER + I960_PC: info->i = i960->PC; break;
+ case CPUINFO_INT_REGISTER + I960_AC: info->i = i960->AC; break;
+ case CPUINFO_INT_REGISTER + I960_IP: info->i = i960->IP; break;
+ case CPUINFO_INT_REGISTER + I960_PIP: info->i = i960->PIP; break;
// CPU debug stuff
- case CPUINFO_STR_REGISTER + I960_SAT: sprintf(info->s, "sat :%08x", i960->SAT); break;
- case CPUINFO_STR_REGISTER + I960_PRCB: sprintf(info->s, "prcb :%08x", i960->PRCB); break;
- case CPUINFO_STR_REGISTER + I960_PC: sprintf(info->s, "pc :%08x", i960->PC); break;
- case CPUINFO_STR_REGISTER + I960_AC: sprintf(info->s, "ac :%08x", i960->AC); break;
- case CPUINFO_STR_REGISTER + I960_IP: sprintf(info->s, "ip :%08x", i960->IP); break;
- case CPUINFO_STR_REGISTER + I960_PIP: sprintf(info->s, "pip :%08x", i960->PIP); break;
-
- case CPUINFO_STR_REGISTER + I960_R0: sprintf(info->s, "pfp :%08x", i960->r[ 0]); break;
- case CPUINFO_STR_REGISTER + I960_R1: sprintf(info->s, "sp :%08x", i960->r[ 1]); break;
- case CPUINFO_STR_REGISTER + I960_R2: sprintf(info->s, "rip :%08x", i960->r[ 2]); break;
- case CPUINFO_STR_REGISTER + I960_R3: sprintf(info->s, "r3 :%08x", i960->r[ 3]); break;
- case CPUINFO_STR_REGISTER + I960_R4: sprintf(info->s, "r4 :%08x", i960->r[ 4]); break;
- case CPUINFO_STR_REGISTER + I960_R5: sprintf(info->s, "r5 :%08x", i960->r[ 5]); break;
- case CPUINFO_STR_REGISTER + I960_R6: sprintf(info->s, "r6 :%08x", i960->r[ 6]); break;
- case CPUINFO_STR_REGISTER + I960_R7: sprintf(info->s, "r7 :%08x", i960->r[ 7]); break;
- case CPUINFO_STR_REGISTER + I960_R8: sprintf(info->s, "r8 :%08x", i960->r[ 8]); break;
- case CPUINFO_STR_REGISTER + I960_R9: sprintf(info->s, "r9 :%08x", i960->r[ 9]); break;
- case CPUINFO_STR_REGISTER + I960_R10: sprintf(info->s, "r10 :%08x", i960->r[10]); break;
- case CPUINFO_STR_REGISTER + I960_R11: sprintf(info->s, "r11 :%08x", i960->r[11]); break;
- case CPUINFO_STR_REGISTER + I960_R12: sprintf(info->s, "r12 :%08x", i960->r[12]); break;
- case CPUINFO_STR_REGISTER + I960_R13: sprintf(info->s, "r13 :%08x", i960->r[13]); break;
- case CPUINFO_STR_REGISTER + I960_R14: sprintf(info->s, "r14 :%08x", i960->r[14]); break;
- case CPUINFO_STR_REGISTER + I960_R15: sprintf(info->s, "r15 :%08x", i960->r[15]); break;
-
- case CPUINFO_STR_REGISTER + I960_G0: sprintf(info->s, "g0 :%08x", i960->r[16]); break;
- case CPUINFO_STR_REGISTER + I960_G1: sprintf(info->s, "g1 :%08x", i960->r[17]); break;
- case CPUINFO_STR_REGISTER + I960_G2: sprintf(info->s, "g2 :%08x", i960->r[18]); break;
- case CPUINFO_STR_REGISTER + I960_G3: sprintf(info->s, "g3 :%08x", i960->r[19]); break;
- case CPUINFO_STR_REGISTER + I960_G4: sprintf(info->s, "g4 :%08x", i960->r[20]); break;
- case CPUINFO_STR_REGISTER + I960_G5: sprintf(info->s, "g5 :%08x", i960->r[21]); break;
- case CPUINFO_STR_REGISTER + I960_G6: sprintf(info->s, "g6 :%08x", i960->r[22]); break;
- case CPUINFO_STR_REGISTER + I960_G7: sprintf(info->s, "g7 :%08x", i960->r[23]); break;
- case CPUINFO_STR_REGISTER + I960_G8: sprintf(info->s, "g8 :%08x", i960->r[24]); break;
- case CPUINFO_STR_REGISTER + I960_G9: sprintf(info->s, "g9 :%08x", i960->r[25]); break;
- case CPUINFO_STR_REGISTER + I960_G10: sprintf(info->s, "g10 :%08x", i960->r[26]); break;
- case CPUINFO_STR_REGISTER + I960_G11: sprintf(info->s, "g11 :%08x", i960->r[27]); break;
- case CPUINFO_STR_REGISTER + I960_G12: sprintf(info->s, "g12 :%08x", i960->r[28]); break;
- case CPUINFO_STR_REGISTER + I960_G13: sprintf(info->s, "g13 :%08x", i960->r[29]); break;
- case CPUINFO_STR_REGISTER + I960_G14: sprintf(info->s, "g14 :%08x", i960->r[30]); break;
- case CPUINFO_STR_REGISTER + I960_G15: sprintf(info->s, "fp :%08x", i960->r[31]); break;
+ case CPUINFO_STR_REGISTER + I960_SAT: sprintf(info->s, "sat :%08x", i960->SAT); break;
+ case CPUINFO_STR_REGISTER + I960_PRCB: sprintf(info->s, "prcb :%08x", i960->PRCB); break;
+ case CPUINFO_STR_REGISTER + I960_PC: sprintf(info->s, "pc :%08x", i960->PC); break;
+ case CPUINFO_STR_REGISTER + I960_AC: sprintf(info->s, "ac :%08x", i960->AC); break;
+ case CPUINFO_STR_REGISTER + I960_IP: sprintf(info->s, "ip :%08x", i960->IP); break;
+ case CPUINFO_STR_REGISTER + I960_PIP: sprintf(info->s, "pip :%08x", i960->PIP); break;
+
+ case CPUINFO_STR_REGISTER + I960_R0: sprintf(info->s, "pfp :%08x", i960->r[ 0]); break;
+ case CPUINFO_STR_REGISTER + I960_R1: sprintf(info->s, "sp :%08x", i960->r[ 1]); break;
+ case CPUINFO_STR_REGISTER + I960_R2: sprintf(info->s, "rip :%08x", i960->r[ 2]); break;
+ case CPUINFO_STR_REGISTER + I960_R3: sprintf(info->s, "r3 :%08x", i960->r[ 3]); break;
+ case CPUINFO_STR_REGISTER + I960_R4: sprintf(info->s, "r4 :%08x", i960->r[ 4]); break;
+ case CPUINFO_STR_REGISTER + I960_R5: sprintf(info->s, "r5 :%08x", i960->r[ 5]); break;
+ case CPUINFO_STR_REGISTER + I960_R6: sprintf(info->s, "r6 :%08x", i960->r[ 6]); break;
+ case CPUINFO_STR_REGISTER + I960_R7: sprintf(info->s, "r7 :%08x", i960->r[ 7]); break;
+ case CPUINFO_STR_REGISTER + I960_R8: sprintf(info->s, "r8 :%08x", i960->r[ 8]); break;
+ case CPUINFO_STR_REGISTER + I960_R9: sprintf(info->s, "r9 :%08x", i960->r[ 9]); break;
+ case CPUINFO_STR_REGISTER + I960_R10: sprintf(info->s, "r10 :%08x", i960->r[10]); break;
+ case CPUINFO_STR_REGISTER + I960_R11: sprintf(info->s, "r11 :%08x", i960->r[11]); break;
+ case CPUINFO_STR_REGISTER + I960_R12: sprintf(info->s, "r12 :%08x", i960->r[12]); break;
+ case CPUINFO_STR_REGISTER + I960_R13: sprintf(info->s, "r13 :%08x", i960->r[13]); break;
+ case CPUINFO_STR_REGISTER + I960_R14: sprintf(info->s, "r14 :%08x", i960->r[14]); break;
+ case CPUINFO_STR_REGISTER + I960_R15: sprintf(info->s, "r15 :%08x", i960->r[15]); break;
+
+ case CPUINFO_STR_REGISTER + I960_G0: sprintf(info->s, "g0 :%08x", i960->r[16]); break;
+ case CPUINFO_STR_REGISTER + I960_G1: sprintf(info->s, "g1 :%08x", i960->r[17]); break;
+ case CPUINFO_STR_REGISTER + I960_G2: sprintf(info->s, "g2 :%08x", i960->r[18]); break;
+ case CPUINFO_STR_REGISTER + I960_G3: sprintf(info->s, "g3 :%08x", i960->r[19]); break;
+ case CPUINFO_STR_REGISTER + I960_G4: sprintf(info->s, "g4 :%08x", i960->r[20]); break;
+ case CPUINFO_STR_REGISTER + I960_G5: sprintf(info->s, "g5 :%08x", i960->r[21]); break;
+ case CPUINFO_STR_REGISTER + I960_G6: sprintf(info->s, "g6 :%08x", i960->r[22]); break;
+ case CPUINFO_STR_REGISTER + I960_G7: sprintf(info->s, "g7 :%08x", i960->r[23]); break;
+ case CPUINFO_STR_REGISTER + I960_G8: sprintf(info->s, "g8 :%08x", i960->r[24]); break;
+ case CPUINFO_STR_REGISTER + I960_G9: sprintf(info->s, "g9 :%08x", i960->r[25]); break;
+ case CPUINFO_STR_REGISTER + I960_G10: sprintf(info->s, "g10 :%08x", i960->r[26]); break;
+ case CPUINFO_STR_REGISTER + I960_G11: sprintf(info->s, "g11 :%08x", i960->r[27]); break;
+ case CPUINFO_STR_REGISTER + I960_G12: sprintf(info->s, "g12 :%08x", i960->r[28]); break;
+ case CPUINFO_STR_REGISTER + I960_G13: sprintf(info->s, "g13 :%08x", i960->r[29]); break;
+ case CPUINFO_STR_REGISTER + I960_G14: sprintf(info->s, "g14 :%08x", i960->r[30]); break;
+ case CPUINFO_STR_REGISTER + I960_G15: sprintf(info->s, "fp :%08x", i960->r[31]); break;
// default:
// fatalerror("i960_get_info %x \n", state);