diff options
Diffstat (limited to 'src/emu/cpu/i8008/8008dasm.c')
-rw-r--r-- | src/emu/cpu/i8008/8008dasm.c | 80 |
1 files changed, 40 insertions, 40 deletions
diff --git a/src/emu/cpu/i8008/8008dasm.c b/src/emu/cpu/i8008/8008dasm.c index 221ac3c3230..f14f4b7829d 100644 --- a/src/emu/cpu/i8008/8008dasm.c +++ b/src/emu/cpu/i8008/8008dasm.c @@ -23,17 +23,17 @@ CPU_DISASSEMBLE( i8008 ) UINT8 op = OP(pc++); switch (op >> 6) { - case 0x03: // starting with 11 + case 0x03: // starting with 11 if (op==0xff) { sprintf (buffer,"hlt"); } else { sprintf (buffer,"l%c%c",reg[(op >> 3) & 7],reg[op & 7]); } break; - case 0x00: // starting with 00 + case 0x00: // starting with 00 switch(op & 7) { - case 0 : if(((op >> 3) & 7)==0) { - sprintf (buffer,"hlt"); + case 0 : if(((op >> 3) & 7)==0) { + sprintf (buffer,"hlt"); } else { if(((op >> 3) & 7)==7) { sprintf (buffer,"illegal"); @@ -42,8 +42,8 @@ CPU_DISASSEMBLE( i8008 ) } } break; - case 1 : if(((op >> 3) & 7)==0) { - sprintf (buffer,"hlt"); + case 1 : if(((op >> 3) & 7)==0) { + sprintf (buffer,"hlt"); } else { if(((op >> 3) & 7)==7) { sprintf (buffer,"illegal"); @@ -52,45 +52,45 @@ CPU_DISASSEMBLE( i8008 ) } } break; - case 2 : { + case 2 : { switch((op >> 3) & 7) { - case 0 : sprintf (buffer,"rlc"); break; - case 1 : sprintf (buffer,"rrc"); break; - case 2 : sprintf (buffer,"ral"); break; - case 3 : sprintf (buffer,"rar"); break; - default : sprintf (buffer,"illegal"); break; + case 0 : sprintf (buffer,"rlc"); break; + case 1 : sprintf (buffer,"rrc"); break; + case 2 : sprintf (buffer,"ral"); break; + case 3 : sprintf (buffer,"rar"); break; + default : sprintf (buffer,"illegal"); break; } } break; - case 3 : sprintf (buffer,"r%c%c",(BIT(op,5) ? 't' : 'f'),flag_names[(op>>3)&3]); break; - case 4 : { + case 3 : sprintf (buffer,"r%c%c",(BIT(op,5) ? 't' : 'f'),flag_names[(op>>3)&3]); break; + case 4 : { switch((op >> 3) & 7) { - case 0 : sprintf (buffer,"adi %02x",ARG(pc)); pc++; break; - case 1 : sprintf (buffer,"aci %02x",ARG(pc)); pc++; break; - case 2 : sprintf (buffer,"sui %02x",ARG(pc)); pc++; break; - case 3 : sprintf (buffer,"sbi %02x",ARG(pc)); pc++; break; - case 4 : sprintf (buffer,"ndi %02x",ARG(pc)); pc++; break; - case 5 : sprintf (buffer,"xri %02x",ARG(pc)); pc++; break; - case 6 : sprintf (buffer,"ori %02x",ARG(pc)); pc++; break; - case 7 : sprintf (buffer,"cpi %02x",ARG(pc)); pc++; break; + case 0 : sprintf (buffer,"adi %02x",ARG(pc)); pc++; break; + case 1 : sprintf (buffer,"aci %02x",ARG(pc)); pc++; break; + case 2 : sprintf (buffer,"sui %02x",ARG(pc)); pc++; break; + case 3 : sprintf (buffer,"sbi %02x",ARG(pc)); pc++; break; + case 4 : sprintf (buffer,"ndi %02x",ARG(pc)); pc++; break; + case 5 : sprintf (buffer,"xri %02x",ARG(pc)); pc++; break; + case 6 : sprintf (buffer,"ori %02x",ARG(pc)); pc++; break; + case 7 : sprintf (buffer,"cpi %02x",ARG(pc)); pc++; break; } } break; - case 5 : sprintf (buffer,"rst %02x",(op>>3) & 7); break; - case 6 : sprintf (buffer,"l%ci %02x",reg[(op >> 3) & 7],ARG(pc)); pc++; break; - case 7 : sprintf (buffer,"ret"); break; + case 5 : sprintf (buffer,"rst %02x",(op>>3) & 7); break; + case 6 : sprintf (buffer,"l%ci %02x",reg[(op >> 3) & 7],ARG(pc)); pc++; break; + case 7 : sprintf (buffer,"ret"); break; } break; - case 0x01: // starting with 01 + case 0x01: // starting with 01 switch(op & 7) { - case 0 : sprintf (buffer,"j%c%c %02x%02x",(BIT(op,5)? 't' : 'f'),flag_names[(op>>3)&3], ARG(pc+1) & 0x3f,ARG(pc)); pc+=2; break; - case 2 : sprintf (buffer,"c%c%c %02x%02x",(BIT(op,5)? 't' : 'f'),flag_names[(op>>3)&3], ARG(pc+1) & 0x3f,ARG(pc)); pc+=2; break; - case 4 : sprintf (buffer,"jmp %02x%02x",ARG(pc+1) & 0x3f,ARG(pc)); pc+=2; break; - case 6 : sprintf (buffer,"cal %02x%02x",ARG(pc+1) & 0x3f,ARG(pc)); pc+=2; break; + case 0 : sprintf (buffer,"j%c%c %02x%02x",(BIT(op,5)? 't' : 'f'),flag_names[(op>>3)&3], ARG(pc+1) & 0x3f,ARG(pc)); pc+=2; break; + case 2 : sprintf (buffer,"c%c%c %02x%02x",(BIT(op,5)? 't' : 'f'),flag_names[(op>>3)&3], ARG(pc+1) & 0x3f,ARG(pc)); pc+=2; break; + case 4 : sprintf (buffer,"jmp %02x%02x",ARG(pc+1) & 0x3f,ARG(pc)); pc+=2; break; + case 6 : sprintf (buffer,"cal %02x%02x",ARG(pc+1) & 0x3f,ARG(pc)); pc+=2; break; case 1 : case 3 : case 5 : - case 7 : if (((op>>4)&3)==0) { + case 7 : if (((op>>4)&3)==0) { sprintf (buffer,"inp %02x",(op >> 1) & 0x07); } else { sprintf (buffer,"out %02x",(op >> 1) & 0x1f); @@ -98,16 +98,16 @@ CPU_DISASSEMBLE( i8008 ) break; } break; - case 0x02: // starting with 10 + case 0x02: // starting with 10 switch((op >> 3) & 7) { - case 0 : sprintf (buffer,"ad%c",reg[op & 7]); break; - case 1 : sprintf (buffer,"ac%c",reg[op & 7]); break; - case 2 : sprintf (buffer,"su%c",reg[op & 7]); break; - case 3 : sprintf (buffer,"sb%c",reg[op & 7]); break; - case 4 : sprintf (buffer,"nd%c",reg[op & 7]); break; - case 5 : sprintf (buffer,"xr%c",reg[op & 7]); break; - case 6 : sprintf (buffer,"or%c",reg[op & 7]); break; - case 7 : sprintf (buffer,"cp%c",reg[op & 7]); break; + case 0 : sprintf (buffer,"ad%c",reg[op & 7]); break; + case 1 : sprintf (buffer,"ac%c",reg[op & 7]); break; + case 2 : sprintf (buffer,"su%c",reg[op & 7]); break; + case 3 : sprintf (buffer,"sb%c",reg[op & 7]); break; + case 4 : sprintf (buffer,"nd%c",reg[op & 7]); break; + case 5 : sprintf (buffer,"xr%c",reg[op & 7]); break; + case 6 : sprintf (buffer,"or%c",reg[op & 7]); break; + case 7 : sprintf (buffer,"cp%c",reg[op & 7]); break; } break; } |