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Diffstat (limited to 'src/emu/cpu/i386/i386ops.c')
-rw-r--r--src/emu/cpu/i386/i386ops.c452
1 files changed, 226 insertions, 226 deletions
diff --git a/src/emu/cpu/i386/i386ops.c b/src/emu/cpu/i386/i386ops.c
index c51301ef22f..6f653bee2e9 100644
--- a/src/emu/cpu/i386/i386ops.c
+++ b/src/emu/cpu/i386/i386ops.c
@@ -9,31 +9,31 @@ static UINT8 I386OP(shift_rotate8)(i386_state *cpustate, UINT8 modrm, UINT32 val
switch( (modrm >> 3) & 0x7 )
{
- case 0: /* ROL rm8, 1 */
+ case 0: /* ROL rm8, 1 */
cpustate->CF = (src & 0x80) ? 1 : 0;
dst = (src << 1) + cpustate->CF;
cpustate->OF = ((src ^ dst) & 0x80) ? 1 : 0;
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
- case 1: /* ROR rm8, 1 */
+ case 1: /* ROR rm8, 1 */
cpustate->CF = (src & 0x1) ? 1 : 0;
dst = (cpustate->CF << 7) | (src >> 1);
cpustate->OF = ((src ^ dst) & 0x80) ? 1 : 0;
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
- case 2: /* RCL rm8, 1 */
+ case 2: /* RCL rm8, 1 */
dst = (src << 1) + cpustate->CF;
cpustate->CF = (src & 0x80) ? 1 : 0;
cpustate->OF = ((src ^ dst) & 0x80) ? 1 : 0;
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_CARRY_REG, CYCLES_ROTATE_CARRY_MEM);
break;
- case 3: /* RCR rm8, 1 */
+ case 3: /* RCR rm8, 1 */
dst = (cpustate->CF << 7) | (src >> 1);
cpustate->CF = src & 0x1;
cpustate->OF = ((src ^ dst) & 0x80) ? 1 : 0;
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_CARRY_REG, CYCLES_ROTATE_CARRY_MEM);
break;
- case 4: /* SHL/SAL rm8, 1 */
+ case 4: /* SHL/SAL rm8, 1 */
case 6:
dst = src << 1;
cpustate->CF = (src & 0x80) ? 1 : 0;
@@ -41,14 +41,14 @@ static UINT8 I386OP(shift_rotate8)(i386_state *cpustate, UINT8 modrm, UINT32 val
SetSZPF8(dst);
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
- case 5: /* SHR rm8, 1 */
+ case 5: /* SHR rm8, 1 */
dst = src >> 1;
cpustate->CF = src & 0x1;
cpustate->OF = (dst & 0x80) ? 1 : 0;
SetSZPF8(dst);
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
- case 7: /* SAR rm8, 1 */
+ case 7: /* SAR rm8, 1 */
dst = (INT8)(src) >> 1;
cpustate->CF = src & 0x1;
cpustate->OF = 0;
@@ -61,7 +61,7 @@ static UINT8 I386OP(shift_rotate8)(i386_state *cpustate, UINT8 modrm, UINT32 val
switch( (modrm >> 3) & 0x7 )
{
- case 0: /* ROL rm8, i8 */
+ case 0: /* ROL rm8, i8 */
if(!(shift & 7))
{
if(shift & 0x18)
@@ -73,12 +73,12 @@ static UINT8 I386OP(shift_rotate8)(i386_state *cpustate, UINT8 modrm, UINT32 val
}
shift &= 7;
dst = ((src & ((UINT8)0xff >> shift)) << shift) |
- ((src & ((UINT8)0xff << (8-shift))) >> (8-shift));
+ ((src & ((UINT8)0xff << (8-shift))) >> (8-shift));
cpustate->CF = dst & 0x1;
cpustate->OF = (dst & 1) ^ (dst >> 7);
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
- case 1: /* ROR rm8, i8 */
+ case 1: /* ROR rm8, i8 */
if(!(shift & 7))
{
if(shift & 0x18)
@@ -90,30 +90,30 @@ static UINT8 I386OP(shift_rotate8)(i386_state *cpustate, UINT8 modrm, UINT32 val
}
shift &= 7;
dst = ((src & ((UINT8)0xff << shift)) >> shift) |
- ((src & ((UINT8)0xff >> (8-shift))) << (8-shift));
+ ((src & ((UINT8)0xff >> (8-shift))) << (8-shift));
cpustate->CF = (dst >> 7) & 1;
cpustate->OF = ((dst >> 7) ^ (dst >> 6)) & 1;
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
- case 2: /* RCL rm8, i8 */
+ case 2: /* RCL rm8, i8 */
shift %= 9;
dst = ((src & ((UINT8)0xff >> shift)) << shift) |
- ((src & ((UINT8)0xff << (9-shift))) >> (9-shift)) |
- (cpustate->CF << (shift-1));
+ ((src & ((UINT8)0xff << (9-shift))) >> (9-shift)) |
+ (cpustate->CF << (shift-1));
if(shift) cpustate->CF = (src >> (8-shift)) & 0x1;
cpustate->OF = cpustate->CF ^ ((dst >> 7) & 1);
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_CARRY_REG, CYCLES_ROTATE_CARRY_MEM);
break;
- case 3: /* RCR rm8, i8 */
+ case 3: /* RCR rm8, i8 */
shift %= 9;
dst = ((src & ((UINT8)0xff << shift)) >> shift) |
- ((src & ((UINT8)0xff >> (8-shift))) << (9-shift)) |
- (cpustate->CF << (8-shift));
+ ((src & ((UINT8)0xff >> (8-shift))) << (9-shift)) |
+ (cpustate->CF << (8-shift));
if(shift) cpustate->CF = (src >> (shift-1)) & 0x1;
cpustate->OF = ((dst >> 7) ^ (dst >> 6)) & 1;
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_CARRY_REG, CYCLES_ROTATE_CARRY_MEM);
break;
- case 4: /* SHL/SAL rm8, i8 */
+ case 4: /* SHL/SAL rm8, i8 */
case 6:
shift &= 31;
dst = src << shift;
@@ -121,14 +121,14 @@ static UINT8 I386OP(shift_rotate8)(i386_state *cpustate, UINT8 modrm, UINT32 val
SetSZPF8(dst);
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
- case 5: /* SHR rm8, i8 */
+ case 5: /* SHR rm8, i8 */
shift &= 31;
dst = src >> shift;
cpustate->CF = (src & (1 << (shift-1))) ? 1 : 0;
SetSZPF8(dst);
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
- case 7: /* SAR rm8, i8 */
+ case 7: /* SAR rm8, i8 */
shift &= 31;
dst = (INT8)src >> shift;
cpustate->CF = (src & (1 << (shift-1))) ? 1 : 0;
@@ -143,7 +143,7 @@ static UINT8 I386OP(shift_rotate8)(i386_state *cpustate, UINT8 modrm, UINT32 val
-static void I386OP(adc_rm8_r8)(i386_state *cpustate) // Opcode 0x10
+static void I386OP(adc_rm8_r8)(i386_state *cpustate) // Opcode 0x10
{
UINT8 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -163,7 +163,7 @@ static void I386OP(adc_rm8_r8)(i386_state *cpustate) // Opcode 0x10
}
}
-static void I386OP(adc_r8_rm8)(i386_state *cpustate) // Opcode 0x12
+static void I386OP(adc_r8_rm8)(i386_state *cpustate) // Opcode 0x12
{
UINT8 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -183,7 +183,7 @@ static void I386OP(adc_r8_rm8)(i386_state *cpustate) // Opcode 0x12
}
}
-static void I386OP(adc_al_i8)(i386_state *cpustate) // Opcode 0x14
+static void I386OP(adc_al_i8)(i386_state *cpustate) // Opcode 0x14
{
UINT8 src, dst;
src = FETCH(cpustate);
@@ -193,7 +193,7 @@ static void I386OP(adc_al_i8)(i386_state *cpustate) // Opcode 0x14
CYCLES(cpustate,CYCLES_ALU_IMM_ACC);
}
-static void I386OP(add_rm8_r8)(i386_state *cpustate) // Opcode 0x00
+static void I386OP(add_rm8_r8)(i386_state *cpustate) // Opcode 0x00
{
UINT8 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -213,7 +213,7 @@ static void I386OP(add_rm8_r8)(i386_state *cpustate) // Opcode 0x00
}
}
-static void I386OP(add_r8_rm8)(i386_state *cpustate) // Opcode 0x02
+static void I386OP(add_r8_rm8)(i386_state *cpustate) // Opcode 0x02
{
UINT8 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -233,7 +233,7 @@ static void I386OP(add_r8_rm8)(i386_state *cpustate) // Opcode 0x02
}
}
-static void I386OP(add_al_i8)(i386_state *cpustate) // Opcode 0x04
+static void I386OP(add_al_i8)(i386_state *cpustate) // Opcode 0x04
{
UINT8 src, dst;
src = FETCH(cpustate);
@@ -243,7 +243,7 @@ static void I386OP(add_al_i8)(i386_state *cpustate) // Opcode 0x04
CYCLES(cpustate,CYCLES_ALU_IMM_ACC);
}
-static void I386OP(and_rm8_r8)(i386_state *cpustate) // Opcode 0x20
+static void I386OP(and_rm8_r8)(i386_state *cpustate) // Opcode 0x20
{
UINT8 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -263,7 +263,7 @@ static void I386OP(and_rm8_r8)(i386_state *cpustate) // Opcode 0x20
}
}
-static void I386OP(and_r8_rm8)(i386_state *cpustate) // Opcode 0x22
+static void I386OP(and_r8_rm8)(i386_state *cpustate) // Opcode 0x22
{
UINT8 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -283,7 +283,7 @@ static void I386OP(and_r8_rm8)(i386_state *cpustate) // Opcode 0x22
}
}
-static void I386OP(and_al_i8)(i386_state *cpustate) // Opcode 0x24
+static void I386OP(and_al_i8)(i386_state *cpustate) // Opcode 0x24
{
UINT8 src, dst;
src = FETCH(cpustate);
@@ -293,19 +293,19 @@ static void I386OP(and_al_i8)(i386_state *cpustate) // Opcode 0x24
CYCLES(cpustate,CYCLES_ALU_IMM_ACC);
}
-static void I386OP(clc)(i386_state *cpustate) // Opcode 0xf8
+static void I386OP(clc)(i386_state *cpustate) // Opcode 0xf8
{
cpustate->CF = 0;
CYCLES(cpustate,CYCLES_CLC);
}
-static void I386OP(cld)(i386_state *cpustate) // Opcode 0xfc
+static void I386OP(cld)(i386_state *cpustate) // Opcode 0xfc
{
cpustate->DF = 0;
CYCLES(cpustate,CYCLES_CLD);
}
-static void I386OP(cli)(i386_state *cpustate) // Opcode 0xfa
+static void I386OP(cli)(i386_state *cpustate) // Opcode 0xfa
{
if(PROTECTED_MODE)
{
@@ -317,13 +317,13 @@ static void I386OP(cli)(i386_state *cpustate) // Opcode 0xfa
CYCLES(cpustate,CYCLES_CLI);
}
-static void I386OP(cmc)(i386_state *cpustate) // Opcode 0xf5
+static void I386OP(cmc)(i386_state *cpustate) // Opcode 0xf5
{
cpustate->CF ^= 1;
CYCLES(cpustate,CYCLES_CMC);
}
-static void I386OP(cmp_rm8_r8)(i386_state *cpustate) // Opcode 0x38
+static void I386OP(cmp_rm8_r8)(i386_state *cpustate) // Opcode 0x38
{
UINT8 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -341,7 +341,7 @@ static void I386OP(cmp_rm8_r8)(i386_state *cpustate) // Opcode 0x38
}
}
-static void I386OP(cmp_r8_rm8)(i386_state *cpustate) // Opcode 0x3a
+static void I386OP(cmp_r8_rm8)(i386_state *cpustate) // Opcode 0x3a
{
UINT8 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -359,7 +359,7 @@ static void I386OP(cmp_r8_rm8)(i386_state *cpustate) // Opcode 0x3a
}
}
-static void I386OP(cmp_al_i8)(i386_state *cpustate) // Opcode 0x3c
+static void I386OP(cmp_al_i8)(i386_state *cpustate) // Opcode 0x3c
{
UINT8 src, dst;
src = FETCH(cpustate);
@@ -368,7 +368,7 @@ static void I386OP(cmp_al_i8)(i386_state *cpustate) // Opcode 0x3c
CYCLES(cpustate,CYCLES_CMP_IMM_ACC);
}
-static void I386OP(cmpsb)(i386_state *cpustate) // Opcode 0xa6
+static void I386OP(cmpsb)(i386_state *cpustate) // Opcode 0xa6
{
UINT32 eas, ead;
UINT8 src, dst;
@@ -386,7 +386,7 @@ static void I386OP(cmpsb)(i386_state *cpustate) // Opcode 0xa6
CYCLES(cpustate,CYCLES_CMPS);
}
-static void I386OP(in_al_i8)(i386_state *cpustate) // Opcode 0xe4
+static void I386OP(in_al_i8)(i386_state *cpustate) // Opcode 0xe4
{
UINT16 port = FETCH(cpustate);
UINT8 data = READPORT8(cpustate, port);
@@ -394,7 +394,7 @@ static void I386OP(in_al_i8)(i386_state *cpustate) // Opcode 0xe4
CYCLES(cpustate,CYCLES_IN_VAR);
}
-static void I386OP(in_al_dx)(i386_state *cpustate) // Opcode 0xec
+static void I386OP(in_al_dx)(i386_state *cpustate) // Opcode 0xec
{
UINT16 port = REG16(DX);
UINT8 data = READPORT8(cpustate, port);
@@ -402,196 +402,196 @@ static void I386OP(in_al_dx)(i386_state *cpustate) // Opcode 0xec
CYCLES(cpustate,CYCLES_IN);
}
-static void I386OP(ja_rel8)(i386_state *cpustate) // Opcode 0x77
+static void I386OP(ja_rel8)(i386_state *cpustate) // Opcode 0x77
{
INT8 disp = FETCH(cpustate);
if( cpustate->CF == 0 && cpustate->ZF == 0 ) {
NEAR_BRANCH(cpustate,disp);
- CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_DISP8_NOBRANCH);
}
}
-static void I386OP(jbe_rel8)(i386_state *cpustate) // Opcode 0x76
+static void I386OP(jbe_rel8)(i386_state *cpustate) // Opcode 0x76
{
INT8 disp = FETCH(cpustate);
if( cpustate->CF != 0 || cpustate->ZF != 0 ) {
NEAR_BRANCH(cpustate,disp);
- CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_DISP8_NOBRANCH);
}
}
-static void I386OP(jc_rel8)(i386_state *cpustate) // Opcode 0x72
+static void I386OP(jc_rel8)(i386_state *cpustate) // Opcode 0x72
{
INT8 disp = FETCH(cpustate);
if( cpustate->CF != 0 ) {
NEAR_BRANCH(cpustate,disp);
- CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_DISP8_NOBRANCH);
}
}
-static void I386OP(jg_rel8)(i386_state *cpustate) // Opcode 0x7f
+static void I386OP(jg_rel8)(i386_state *cpustate) // Opcode 0x7f
{
INT8 disp = FETCH(cpustate);
if( cpustate->ZF == 0 && (cpustate->SF == cpustate->OF) ) {
NEAR_BRANCH(cpustate,disp);
- CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_DISP8_NOBRANCH);
}
}
-static void I386OP(jge_rel8)(i386_state *cpustate) // Opcode 0x7d
+static void I386OP(jge_rel8)(i386_state *cpustate) // Opcode 0x7d
{
INT8 disp = FETCH(cpustate);
if(cpustate->SF == cpustate->OF) {
NEAR_BRANCH(cpustate,disp);
- CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_DISP8_NOBRANCH);
}
}
-static void I386OP(jl_rel8)(i386_state *cpustate) // Opcode 0x7c
+static void I386OP(jl_rel8)(i386_state *cpustate) // Opcode 0x7c
{
INT8 disp = FETCH(cpustate);
if( (cpustate->SF != cpustate->OF) ) {
NEAR_BRANCH(cpustate,disp);
- CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_DISP8_NOBRANCH);
}
}
-static void I386OP(jle_rel8)(i386_state *cpustate) // Opcode 0x7e
+static void I386OP(jle_rel8)(i386_state *cpustate) // Opcode 0x7e
{
INT8 disp = FETCH(cpustate);
if( cpustate->ZF != 0 || (cpustate->SF != cpustate->OF) ) {
NEAR_BRANCH(cpustate,disp);
- CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_DISP8_NOBRANCH);
}
}
-static void I386OP(jnc_rel8)(i386_state *cpustate) // Opcode 0x73
+static void I386OP(jnc_rel8)(i386_state *cpustate) // Opcode 0x73
{
INT8 disp = FETCH(cpustate);
if( cpustate->CF == 0 ) {
NEAR_BRANCH(cpustate,disp);
- CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_DISP8_NOBRANCH);
}
}
-static void I386OP(jno_rel8)(i386_state *cpustate) // Opcode 0x71
+static void I386OP(jno_rel8)(i386_state *cpustate) // Opcode 0x71
{
INT8 disp = FETCH(cpustate);
if( cpustate->OF == 0 ) {
NEAR_BRANCH(cpustate,disp);
- CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_DISP8_NOBRANCH);
}
}
-static void I386OP(jnp_rel8)(i386_state *cpustate) // Opcode 0x7b
+static void I386OP(jnp_rel8)(i386_state *cpustate) // Opcode 0x7b
{
INT8 disp = FETCH(cpustate);
if( cpustate->PF == 0 ) {
NEAR_BRANCH(cpustate,disp);
- CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_DISP8_NOBRANCH);
}
}
-static void I386OP(jns_rel8)(i386_state *cpustate) // Opcode 0x79
+static void I386OP(jns_rel8)(i386_state *cpustate) // Opcode 0x79
{
INT8 disp = FETCH(cpustate);
if( cpustate->SF == 0 ) {
NEAR_BRANCH(cpustate,disp);
- CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_DISP8_NOBRANCH);
}
}
-static void I386OP(jnz_rel8)(i386_state *cpustate) // Opcode 0x75
+static void I386OP(jnz_rel8)(i386_state *cpustate) // Opcode 0x75
{
INT8 disp = FETCH(cpustate);
if( cpustate->ZF == 0 ) {
NEAR_BRANCH(cpustate,disp);
- CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_DISP8_NOBRANCH);
}
}
-static void I386OP(jo_rel8)(i386_state *cpustate) // Opcode 0x70
+static void I386OP(jo_rel8)(i386_state *cpustate) // Opcode 0x70
{
INT8 disp = FETCH(cpustate);
if( cpustate->OF != 0 ) {
NEAR_BRANCH(cpustate,disp);
- CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_DISP8_NOBRANCH);
}
}
-static void I386OP(jp_rel8)(i386_state *cpustate) // Opcode 0x7a
+static void I386OP(jp_rel8)(i386_state *cpustate) // Opcode 0x7a
{
INT8 disp = FETCH(cpustate);
if( cpustate->PF != 0 ) {
NEAR_BRANCH(cpustate,disp);
- CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_DISP8_NOBRANCH);
}
}
-static void I386OP(js_rel8)(i386_state *cpustate) // Opcode 0x78
+static void I386OP(js_rel8)(i386_state *cpustate) // Opcode 0x78
{
INT8 disp = FETCH(cpustate);
if( cpustate->SF != 0 ) {
NEAR_BRANCH(cpustate,disp);
- CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_DISP8_NOBRANCH);
}
}
-static void I386OP(jz_rel8)(i386_state *cpustate) // Opcode 0x74
+static void I386OP(jz_rel8)(i386_state *cpustate) // Opcode 0x74
{
INT8 disp = FETCH(cpustate);
if( cpustate->ZF != 0 ) {
NEAR_BRANCH(cpustate,disp);
- CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_DISP8_NOBRANCH);
}
}
-static void I386OP(jmp_rel8)(i386_state *cpustate) // Opcode 0xeb
+static void I386OP(jmp_rel8)(i386_state *cpustate) // Opcode 0xeb
{
INT8 disp = FETCH(cpustate);
NEAR_BRANCH(cpustate,disp);
- CYCLES(cpustate,CYCLES_JMP_SHORT); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JMP_SHORT); /* TODO: Timing = 7 + m */
}
-static void I386OP(lahf)(i386_state *cpustate) // Opcode 0x9f
+static void I386OP(lahf)(i386_state *cpustate) // Opcode 0x9f
{
REG8(AH) = get_flags(cpustate) & 0xd7;
CYCLES(cpustate,CYCLES_LAHF);
}
-static void I386OP(lodsb)(i386_state *cpustate) // Opcode 0xac
+static void I386OP(lodsb)(i386_state *cpustate) // Opcode 0xac
{
UINT32 eas;
if( cpustate->segment_prefix ) {
@@ -604,7 +604,7 @@ static void I386OP(lodsb)(i386_state *cpustate) // Opcode 0xac
CYCLES(cpustate,CYCLES_LODS);
}
-static void I386OP(mov_rm8_r8)(i386_state *cpustate) // Opcode 0x88
+static void I386OP(mov_rm8_r8)(i386_state *cpustate) // Opcode 0x88
{
UINT8 src;
UINT8 modrm = FETCH(cpustate);
@@ -620,7 +620,7 @@ static void I386OP(mov_rm8_r8)(i386_state *cpustate) // Opcode 0x88
}
}
-static void I386OP(mov_r8_rm8)(i386_state *cpustate) // Opcode 0x8a
+static void I386OP(mov_r8_rm8)(i386_state *cpustate) // Opcode 0x8a
{
UINT8 src;
UINT8 modrm = FETCH(cpustate);
@@ -636,7 +636,7 @@ static void I386OP(mov_r8_rm8)(i386_state *cpustate) // Opcode 0x8a
}
}
-static void I386OP(mov_rm8_i8)(i386_state *cpustate) // Opcode 0xc6
+static void I386OP(mov_rm8_i8)(i386_state *cpustate) // Opcode 0xc6
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -651,7 +651,7 @@ static void I386OP(mov_rm8_i8)(i386_state *cpustate) // Opcode 0xc6
}
}
-static void I386OP(mov_r32_cr)(i386_state *cpustate) // Opcode 0x0f 20
+static void I386OP(mov_r32_cr)(i386_state *cpustate) // Opcode 0x0f 20
{
if(PROTECTED_MODE && cpustate->CPL)
FAULT(FAULT_GP, 0);
@@ -662,7 +662,7 @@ static void I386OP(mov_r32_cr)(i386_state *cpustate) // Opcode 0x0f 20
CYCLES(cpustate,CYCLES_MOV_CR_REG);
}
-static void I386OP(mov_r32_dr)(i386_state *cpustate) // Opcode 0x0f 21
+static void I386OP(mov_r32_dr)(i386_state *cpustate) // Opcode 0x0f 21
{
if(PROTECTED_MODE && cpustate->CPL)
FAULT(FAULT_GP, 0);
@@ -685,7 +685,7 @@ static void I386OP(mov_r32_dr)(i386_state *cpustate) // Opcode 0x0f 21
}
}
-static void I386OP(mov_cr_r32)(i386_state *cpustate) // Opcode 0x0f 22
+static void I386OP(mov_cr_r32)(i386_state *cpustate) // Opcode 0x0f 22
{
if(PROTECTED_MODE && cpustate->CPL)
FAULT(FAULT_GP, 0);
@@ -708,7 +708,7 @@ static void I386OP(mov_cr_r32)(i386_state *cpustate) // Opcode 0x0f 22
cpustate->cr[cr] = data;
}
-static void I386OP(mov_dr_r32)(i386_state *cpustate) // Opcode 0x0f 23
+static void I386OP(mov_dr_r32)(i386_state *cpustate) // Opcode 0x0f 23
{
if(PROTECTED_MODE && cpustate->CPL)
FAULT(FAULT_GP, 0);
@@ -734,7 +734,7 @@ static void I386OP(mov_dr_r32)(i386_state *cpustate) // Opcode 0x0f 23
}
}
-static void I386OP(mov_al_m8)(i386_state *cpustate) // Opcode 0xa0
+static void I386OP(mov_al_m8)(i386_state *cpustate) // Opcode 0xa0
{
UINT32 offset, ea;
if( cpustate->address_size ) {
@@ -752,7 +752,7 @@ static void I386OP(mov_al_m8)(i386_state *cpustate) // Opcode 0xa0
CYCLES(cpustate,CYCLES_MOV_IMM_MEM);
}
-static void I386OP(mov_m8_al)(i386_state *cpustate) // Opcode 0xa2
+static void I386OP(mov_m8_al)(i386_state *cpustate) // Opcode 0xa2
{
UINT32 offset, ea;
if( cpustate->address_size ) {
@@ -770,7 +770,7 @@ static void I386OP(mov_m8_al)(i386_state *cpustate) // Opcode 0xa2
CYCLES(cpustate,CYCLES_MOV_MEM_ACC);
}
-static void I386OP(mov_rm16_sreg)(i386_state *cpustate) // Opcode 0x8c
+static void I386OP(mov_rm16_sreg)(i386_state *cpustate) // Opcode 0x8c
{
UINT8 modrm = FETCH(cpustate);
int s = (modrm >> 3) & 0x7;
@@ -788,7 +788,7 @@ static void I386OP(mov_rm16_sreg)(i386_state *cpustate) // Opcode 0x8c
}
}
-static void I386OP(mov_sreg_rm16)(i386_state *cpustate) // Opcode 0x8e
+static void I386OP(mov_sreg_rm16)(i386_state *cpustate) // Opcode 0x8e
{
UINT16 selector;
UINT8 modrm = FETCH(cpustate);
@@ -815,55 +815,55 @@ static void I386OP(mov_sreg_rm16)(i386_state *cpustate) // Opcode 0x8e
}
}
-static void I386OP(mov_al_i8)(i386_state *cpustate) // Opcode 0xb0
+static void I386OP(mov_al_i8)(i386_state *cpustate) // Opcode 0xb0
{
REG8(AL) = FETCH(cpustate);
CYCLES(cpustate,CYCLES_MOV_IMM_REG);
}
-static void I386OP(mov_cl_i8)(i386_state *cpustate) // Opcode 0xb1
+static void I386OP(mov_cl_i8)(i386_state *cpustate) // Opcode 0xb1
{
REG8(CL) = FETCH(cpustate);
CYCLES(cpustate,CYCLES_MOV_IMM_REG);
}
-static void I386OP(mov_dl_i8)(i386_state *cpustate) // Opcode 0xb2
+static void I386OP(mov_dl_i8)(i386_state *cpustate) // Opcode 0xb2
{
REG8(DL) = FETCH(cpustate);
CYCLES(cpustate,CYCLES_MOV_IMM_REG);
}
-static void I386OP(mov_bl_i8)(i386_state *cpustate) // Opcode 0xb3
+static void I386OP(mov_bl_i8)(i386_state *cpustate) // Opcode 0xb3
{
REG8(BL) = FETCH(cpustate);
CYCLES(cpustate,CYCLES_MOV_IMM_REG);
}
-static void I386OP(mov_ah_i8)(i386_state *cpustate) // Opcode 0xb4
+static void I386OP(mov_ah_i8)(i386_state *cpustate) // Opcode 0xb4
{
REG8(AH) = FETCH(cpustate);
CYCLES(cpustate,CYCLES_MOV_IMM_REG);
}
-static void I386OP(mov_ch_i8)(i386_state *cpustate) // Opcode 0xb5
+static void I386OP(mov_ch_i8)(i386_state *cpustate) // Opcode 0xb5
{
REG8(CH) = FETCH(cpustate);
CYCLES(cpustate,CYCLES_MOV_IMM_REG);
}
-static void I386OP(mov_dh_i8)(i386_state *cpustate) // Opcode 0xb6
+static void I386OP(mov_dh_i8)(i386_state *cpustate) // Opcode 0xb6
{
REG8(DH) = FETCH(cpustate);
CYCLES(cpustate,CYCLES_MOV_IMM_REG);
}
-static void I386OP(mov_bh_i8)(i386_state *cpustate) // Opcode 0xb7
+static void I386OP(mov_bh_i8)(i386_state *cpustate) // Opcode 0xb7
{
REG8(BH) = FETCH(cpustate);
CYCLES(cpustate,CYCLES_MOV_IMM_REG);
}
-static void I386OP(movsb)(i386_state *cpustate) // Opcode 0xa4
+static void I386OP(movsb)(i386_state *cpustate) // Opcode 0xa4
{
UINT32 eas, ead;
UINT8 v;
@@ -880,7 +880,7 @@ static void I386OP(movsb)(i386_state *cpustate) // Opcode 0xa4
CYCLES(cpustate,CYCLES_MOVS);
}
-static void I386OP(or_rm8_r8)(i386_state *cpustate) // Opcode 0x08
+static void I386OP(or_rm8_r8)(i386_state *cpustate) // Opcode 0x08
{
UINT8 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -900,7 +900,7 @@ static void I386OP(or_rm8_r8)(i386_state *cpustate) // Opcode 0x08
}
}
-static void I386OP(or_r8_rm8)(i386_state *cpustate) // Opcode 0x0a
+static void I386OP(or_r8_rm8)(i386_state *cpustate) // Opcode 0x0a
{
UINT8 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -920,7 +920,7 @@ static void I386OP(or_r8_rm8)(i386_state *cpustate) // Opcode 0x0a
}
}
-static void I386OP(or_al_i8)(i386_state *cpustate) // Opcode 0x0c
+static void I386OP(or_al_i8)(i386_state *cpustate) // Opcode 0x0c
{
UINT8 src, dst;
src = FETCH(cpustate);
@@ -930,7 +930,7 @@ static void I386OP(or_al_i8)(i386_state *cpustate) // Opcode 0x0c
CYCLES(cpustate,CYCLES_ALU_IMM_ACC);
}
-static void I386OP(out_al_i8)(i386_state *cpustate) // Opcode 0xe6
+static void I386OP(out_al_i8)(i386_state *cpustate) // Opcode 0xe6
{
UINT16 port = FETCH(cpustate);
UINT8 data = REG8(AL);
@@ -938,7 +938,7 @@ static void I386OP(out_al_i8)(i386_state *cpustate) // Opcode 0xe6
CYCLES(cpustate,CYCLES_OUT_VAR);
}
-static void I386OP(out_al_dx)(i386_state *cpustate) // Opcode 0xee
+static void I386OP(out_al_dx)(i386_state *cpustate) // Opcode 0xee
{
UINT16 port = REG16(DX);
UINT8 data = REG8(AL);
@@ -955,7 +955,7 @@ static void I386OP(arpl)(i386_state *cpustate) // Opcode 0x63
if(PROTECTED_MODE && !V8086_MODE)
{
- if( modrm >= 0xc0 ) {
+ if( modrm >= 0xc0 ) {
src = LOAD_REG16(modrm);
dst = LOAD_RM16(modrm);
if( (dst&0x3) < (src&0x3) ) {
@@ -979,7 +979,7 @@ static void I386OP(arpl)(i386_state *cpustate) // Opcode 0x63
i386_trap(cpustate, 6, 0, 0); // invalid opcode in real mode or v8086 mode
}
-static void I386OP(push_i8)(i386_state *cpustate) // Opcode 0x6a
+static void I386OP(push_i8)(i386_state *cpustate) // Opcode 0x6a
{
UINT8 value = FETCH(cpustate);
PUSH8(cpustate,value);
@@ -1014,20 +1014,20 @@ static void I386OP(ins_generic)(i386_state *cpustate, int size)
REG32(EDI) += ((cpustate->DF) ? -1 : 1) * size;
else
REG16(DI) += ((cpustate->DF) ? -1 : 1) * size;
- CYCLES(cpustate,CYCLES_INS); // TODO: Confirm this value
+ CYCLES(cpustate,CYCLES_INS); // TODO: Confirm this value
}
-static void I386OP(insb)(i386_state *cpustate) // Opcode 0x6c
+static void I386OP(insb)(i386_state *cpustate) // Opcode 0x6c
{
I386OP(ins_generic)(cpustate, 1);
}
-static void I386OP(insw)(i386_state *cpustate) // Opcode 0x6d
+static void I386OP(insw)(i386_state *cpustate) // Opcode 0x6d
{
I386OP(ins_generic)(cpustate, 2);
}
-static void I386OP(insd)(i386_state *cpustate) // Opcode 0x6d
+static void I386OP(insd)(i386_state *cpustate) // Opcode 0x6d
{
I386OP(ins_generic)(cpustate, 4);
}
@@ -1064,20 +1064,20 @@ static void I386OP(outs_generic)(i386_state *cpustate, int size)
REG32(ESI) += ((cpustate->DF) ? -1 : 1) * size;
else
REG16(SI) += ((cpustate->DF) ? -1 : 1) * size;
- CYCLES(cpustate,CYCLES_OUTS); // TODO: Confirm this value
+ CYCLES(cpustate,CYCLES_OUTS); // TODO: Confirm this value
}
-static void I386OP(outsb)(i386_state *cpustate) // Opcode 0x6e
+static void I386OP(outsb)(i386_state *cpustate) // Opcode 0x6e
{
I386OP(outs_generic)(cpustate, 1);
}
-static void I386OP(outsw)(i386_state *cpustate) // Opcode 0x6f
+static void I386OP(outsw)(i386_state *cpustate) // Opcode 0x6f
{
I386OP(outs_generic)(cpustate, 2);
}
-static void I386OP(outsd)(i386_state *cpustate) // Opcode 0x6f
+static void I386OP(outsd)(i386_state *cpustate) // Opcode 0x6f
{
I386OP(outs_generic)(cpustate, 4);
}
@@ -1106,27 +1106,27 @@ static void I386OP(repeat)(i386_state *cpustate, int invert_flag)
I386OP(decode_three_bytef2)(cpustate); // sse f2 0f
return;
case 0x26:
- cpustate->segment_override=ES;
+ cpustate->segment_override=ES;
cpustate->segment_prefix=1;
break;
case 0x2e:
- cpustate->segment_override=CS;
+ cpustate->segment_override=CS;
cpustate->segment_prefix=1;
break;
case 0x36:
- cpustate->segment_override=SS;
+ cpustate->segment_override=SS;
cpustate->segment_prefix=1;
break;
case 0x3e:
- cpustate->segment_override=DS;
+ cpustate->segment_override=DS;
cpustate->segment_prefix=1;
break;
case 0x64:
- cpustate->segment_override=FS;
+ cpustate->segment_override=FS;
cpustate->segment_prefix=1;
break;
case 0x65:
- cpustate->segment_override=GS;
+ cpustate->segment_override=GS;
cpustate->segment_prefix=1;
break;
case 0x66:
@@ -1135,7 +1135,7 @@ static void I386OP(repeat)(i386_state *cpustate, int invert_flag)
case 0x67:
cpustate->address_size ^= 1;
break;
- default:
+ default:
prefix_flag=0;
}
} while (prefix_flag);
@@ -1257,8 +1257,8 @@ static void I386OP(repeat)(i386_state *cpustate, int invert_flag)
outofcycles:
/* if we run out of cycles to execute, and we are still in the repeat, we need
- * to exit this instruction in such a way to go right back into it when we have
- * time to execute cycles */
+ * to exit this instruction in such a way to go right back into it when we have
+ * time to execute cycles */
if(flag && (invert_flag ? *flag : !*flag))
return;
cpustate->eip = cpustate->prev_eip;
@@ -1266,23 +1266,23 @@ outofcycles:
CYCLES_NUM(-cycle_base);
}
-static void I386OP(rep)(i386_state *cpustate) // Opcode 0xf3
+static void I386OP(rep)(i386_state *cpustate) // Opcode 0xf3
{
I386OP(repeat)(cpustate, 0);
}
-static void I386OP(repne)(i386_state *cpustate) // Opcode 0xf2
+static void I386OP(repne)(i386_state *cpustate) // Opcode 0xf2
{
I386OP(repeat)(cpustate, 1);
}
-static void I386OP(sahf)(i386_state *cpustate) // Opcode 0x9e
+static void I386OP(sahf)(i386_state *cpustate) // Opcode 0x9e
{
set_flags(cpustate, (get_flags(cpustate) & 0xffffff00) | (REG8(AH) & 0xd7) );
CYCLES(cpustate,CYCLES_SAHF);
}
-static void I386OP(sbb_rm8_r8)(i386_state *cpustate) // Opcode 0x18
+static void I386OP(sbb_rm8_r8)(i386_state *cpustate) // Opcode 0x18
{
UINT8 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -1302,7 +1302,7 @@ static void I386OP(sbb_rm8_r8)(i386_state *cpustate) // Opcode 0x18
}
}
-static void I386OP(sbb_r8_rm8)(i386_state *cpustate) // Opcode 0x1a
+static void I386OP(sbb_r8_rm8)(i386_state *cpustate) // Opcode 0x1a
{
UINT8 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -1322,7 +1322,7 @@ static void I386OP(sbb_r8_rm8)(i386_state *cpustate) // Opcode 0x1a
}
}
-static void I386OP(sbb_al_i8)(i386_state *cpustate) // Opcode 0x1c
+static void I386OP(sbb_al_i8)(i386_state *cpustate) // Opcode 0x1c
{
UINT8 src, dst;
src = FETCH(cpustate);
@@ -1332,7 +1332,7 @@ static void I386OP(sbb_al_i8)(i386_state *cpustate) // Opcode 0x1c
CYCLES(cpustate,CYCLES_ALU_IMM_ACC);
}
-static void I386OP(scasb)(i386_state *cpustate) // Opcode 0xae
+static void I386OP(scasb)(i386_state *cpustate) // Opcode 0xae
{
UINT32 eas;
UINT8 src, dst;
@@ -1344,7 +1344,7 @@ static void I386OP(scasb)(i386_state *cpustate) // Opcode 0xae
CYCLES(cpustate,CYCLES_SCAS);
}
-static void I386OP(setalc)(i386_state *cpustate) // Opcode 0xd6 (undocumented)
+static void I386OP(setalc)(i386_state *cpustate) // Opcode 0xd6 (undocumented)
{
if( cpustate->CF ) {
REG8(AL) = 0xff;
@@ -1354,7 +1354,7 @@ static void I386OP(setalc)(i386_state *cpustate) // Opcode 0xd6 (undocumented)
CYCLES(cpustate,3);
}
-static void I386OP(seta_rm8)(i386_state *cpustate) // Opcode 0x0f 97
+static void I386OP(seta_rm8)(i386_state *cpustate) // Opcode 0x0f 97
{
UINT8 modrm = FETCH(cpustate);
UINT8 value = 0;
@@ -1371,7 +1371,7 @@ static void I386OP(seta_rm8)(i386_state *cpustate) // Opcode 0x0f 97
}
}
-static void I386OP(setbe_rm8)(i386_state *cpustate) // Opcode 0x0f 96
+static void I386OP(setbe_rm8)(i386_state *cpustate) // Opcode 0x0f 96
{
UINT8 modrm = FETCH(cpustate);
UINT8 value = 0;
@@ -1388,7 +1388,7 @@ static void I386OP(setbe_rm8)(i386_state *cpustate) // Opcode 0x0f 96
}
}
-static void I386OP(setc_rm8)(i386_state *cpustate) // Opcode 0x0f 92
+static void I386OP(setc_rm8)(i386_state *cpustate) // Opcode 0x0f 92
{
UINT8 modrm = FETCH(cpustate);
UINT8 value = 0;
@@ -1405,7 +1405,7 @@ static void I386OP(setc_rm8)(i386_state *cpustate) // Opcode 0x0f 92
}
}
-static void I386OP(setg_rm8)(i386_state *cpustate) // Opcode 0x0f 9f
+static void I386OP(setg_rm8)(i386_state *cpustate) // Opcode 0x0f 9f
{
UINT8 modrm = FETCH(cpustate);
UINT8 value = 0;
@@ -1422,7 +1422,7 @@ static void I386OP(setg_rm8)(i386_state *cpustate) // Opcode 0x0f 9f
}
}
-static void I386OP(setge_rm8)(i386_state *cpustate) // Opcode 0x0f 9d
+static void I386OP(setge_rm8)(i386_state *cpustate) // Opcode 0x0f 9d
{
UINT8 modrm = FETCH(cpustate);
UINT8 value = 0;
@@ -1439,7 +1439,7 @@ static void I386OP(setge_rm8)(i386_state *cpustate) // Opcode 0x0f 9d
}
}
-static void I386OP(setl_rm8)(i386_state *cpustate) // Opcode 0x0f 9c
+static void I386OP(setl_rm8)(i386_state *cpustate) // Opcode 0x0f 9c
{
UINT8 modrm = FETCH(cpustate);
UINT8 value = 0;
@@ -1456,7 +1456,7 @@ static void I386OP(setl_rm8)(i386_state *cpustate) // Opcode 0x0f 9c
}
}
-static void I386OP(setle_rm8)(i386_state *cpustate) // Opcode 0x0f 9e
+static void I386OP(setle_rm8)(i386_state *cpustate) // Opcode 0x0f 9e
{
UINT8 modrm = FETCH(cpustate);
UINT8 value = 0;
@@ -1473,7 +1473,7 @@ static void I386OP(setle_rm8)(i386_state *cpustate) // Opcode 0x0f 9e
}
}
-static void I386OP(setnc_rm8)(i386_state *cpustate) // Opcode 0x0f 93
+static void I386OP(setnc_rm8)(i386_state *cpustate) // Opcode 0x0f 93
{
UINT8 modrm = FETCH(cpustate);
UINT8 value = 0;
@@ -1490,7 +1490,7 @@ static void I386OP(setnc_rm8)(i386_state *cpustate) // Opcode 0x0f 93
}
}
-static void I386OP(setno_rm8)(i386_state *cpustate) // Opcode 0x0f 91
+static void I386OP(setno_rm8)(i386_state *cpustate) // Opcode 0x0f 91
{
UINT8 modrm = FETCH(cpustate);
UINT8 value = 0;
@@ -1507,7 +1507,7 @@ static void I386OP(setno_rm8)(i386_state *cpustate) // Opcode 0x0f 91
}
}
-static void I386OP(setnp_rm8)(i386_state *cpustate) // Opcode 0x0f 9b
+static void I386OP(setnp_rm8)(i386_state *cpustate) // Opcode 0x0f 9b
{
UINT8 modrm = FETCH(cpustate);
UINT8 value = 0;
@@ -1524,7 +1524,7 @@ static void I386OP(setnp_rm8)(i386_state *cpustate) // Opcode 0x0f 9b
}
}
-static void I386OP(setns_rm8)(i386_state *cpustate) // Opcode 0x0f 99
+static void I386OP(setns_rm8)(i386_state *cpustate) // Opcode 0x0f 99
{
UINT8 modrm = FETCH(cpustate);
UINT8 value = 0;
@@ -1541,7 +1541,7 @@ static void I386OP(setns_rm8)(i386_state *cpustate) // Opcode 0x0f 99
}
}
-static void I386OP(setnz_rm8)(i386_state *cpustate) // Opcode 0x0f 95
+static void I386OP(setnz_rm8)(i386_state *cpustate) // Opcode 0x0f 95
{
UINT8 modrm = FETCH(cpustate);
UINT8 value = 0;
@@ -1558,7 +1558,7 @@ static void I386OP(setnz_rm8)(i386_state *cpustate) // Opcode 0x0f 95
}
}
-static void I386OP(seto_rm8)(i386_state *cpustate) // Opcode 0x0f 90
+static void I386OP(seto_rm8)(i386_state *cpustate) // Opcode 0x0f 90
{
UINT8 modrm = FETCH(cpustate);
UINT8 value = 0;
@@ -1575,7 +1575,7 @@ static void I386OP(seto_rm8)(i386_state *cpustate) // Opcode 0x0f 90
}
}
-static void I386OP(setp_rm8)(i386_state *cpustate) // Opcode 0x0f 9a
+static void I386OP(setp_rm8)(i386_state *cpustate) // Opcode 0x0f 9a
{
UINT8 modrm = FETCH(cpustate);
UINT8 value = 0;
@@ -1592,7 +1592,7 @@ static void I386OP(setp_rm8)(i386_state *cpustate) // Opcode 0x0f 9a
}
}
-static void I386OP(sets_rm8)(i386_state *cpustate) // Opcode 0x0f 98
+static void I386OP(sets_rm8)(i386_state *cpustate) // Opcode 0x0f 98
{
UINT8 modrm = FETCH(cpustate);
UINT8 value = 0;
@@ -1609,7 +1609,7 @@ static void I386OP(sets_rm8)(i386_state *cpustate) // Opcode 0x0f 98
}
}
-static void I386OP(setz_rm8)(i386_state *cpustate) // Opcode 0x0f 94
+static void I386OP(setz_rm8)(i386_state *cpustate) // Opcode 0x0f 94
{
UINT8 modrm = FETCH(cpustate);
UINT8 value = 0;
@@ -1626,19 +1626,19 @@ static void I386OP(setz_rm8)(i386_state *cpustate) // Opcode 0x0f 94
}
}
-static void I386OP(stc)(i386_state *cpustate) // Opcode 0xf9
+static void I386OP(stc)(i386_state *cpustate) // Opcode 0xf9
{
cpustate->CF = 1;
CYCLES(cpustate,CYCLES_STC);
}
-static void I386OP(std)(i386_state *cpustate) // Opcode 0xfd
+static void I386OP(std)(i386_state *cpustate) // Opcode 0xfd
{
cpustate->DF = 1;
CYCLES(cpustate,CYCLES_STD);
}
-static void I386OP(sti)(i386_state *cpustate) // Opcode 0xfb
+static void I386OP(sti)(i386_state *cpustate) // Opcode 0xfb
{
if(PROTECTED_MODE)
{
@@ -1650,7 +1650,7 @@ static void I386OP(sti)(i386_state *cpustate) // Opcode 0xfb
CYCLES(cpustate,CYCLES_STI);
}
-static void I386OP(stosb)(i386_state *cpustate) // Opcode 0xaa
+static void I386OP(stosb)(i386_state *cpustate) // Opcode 0xaa
{
UINT32 ead;
ead = i386_translate(cpustate, ES, cpustate->address_size ? REG32(EDI) : REG16(DI), 1 );
@@ -1659,7 +1659,7 @@ static void I386OP(stosb)(i386_state *cpustate) // Opcode 0xaa
CYCLES(cpustate,CYCLES_STOS);
}
-static void I386OP(sub_rm8_r8)(i386_state *cpustate) // Opcode 0x28
+static void I386OP(sub_rm8_r8)(i386_state *cpustate) // Opcode 0x28
{
UINT8 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -1679,7 +1679,7 @@ static void I386OP(sub_rm8_r8)(i386_state *cpustate) // Opcode 0x28
}
}
-static void I386OP(sub_r8_rm8)(i386_state *cpustate) // Opcode 0x2a
+static void I386OP(sub_r8_rm8)(i386_state *cpustate) // Opcode 0x2a
{
UINT8 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -1699,7 +1699,7 @@ static void I386OP(sub_r8_rm8)(i386_state *cpustate) // Opcode 0x2a
}
}
-static void I386OP(sub_al_i8)(i386_state *cpustate) // Opcode 0x2c
+static void I386OP(sub_al_i8)(i386_state *cpustate) // Opcode 0x2c
{
UINT8 src, dst;
src = FETCH(cpustate);
@@ -1709,7 +1709,7 @@ static void I386OP(sub_al_i8)(i386_state *cpustate) // Opcode 0x2c
CYCLES(cpustate,CYCLES_ALU_IMM_ACC);
}
-static void I386OP(test_al_i8)(i386_state *cpustate) // Opcode 0xa8
+static void I386OP(test_al_i8)(i386_state *cpustate) // Opcode 0xa8
{
UINT8 src = FETCH(cpustate);
UINT8 dst = REG8(AL);
@@ -1720,7 +1720,7 @@ static void I386OP(test_al_i8)(i386_state *cpustate) // Opcode 0xa8
CYCLES(cpustate,CYCLES_ALU_IMM_ACC);
}
-static void I386OP(test_rm8_r8)(i386_state *cpustate) // Opcode 0x84
+static void I386OP(test_rm8_r8)(i386_state *cpustate) // Opcode 0x84
{
UINT8 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -1744,7 +1744,7 @@ static void I386OP(test_rm8_r8)(i386_state *cpustate) // Opcode 0x84
}
}
-static void I386OP(xchg_r8_rm8)(i386_state *cpustate) // Opcode 0x86
+static void I386OP(xchg_r8_rm8)(i386_state *cpustate) // Opcode 0x86
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -1763,7 +1763,7 @@ static void I386OP(xchg_r8_rm8)(i386_state *cpustate) // Opcode 0x86
}
}
-static void I386OP(xor_rm8_r8)(i386_state *cpustate) // Opcode 0x30
+static void I386OP(xor_rm8_r8)(i386_state *cpustate) // Opcode 0x30
{
UINT8 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -1783,7 +1783,7 @@ static void I386OP(xor_rm8_r8)(i386_state *cpustate) // Opcode 0x30
}
}
-static void I386OP(xor_r8_rm8)(i386_state *cpustate) // Opcode 0x32
+static void I386OP(xor_r8_rm8)(i386_state *cpustate) // Opcode 0x32
{
UINT32 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -1803,7 +1803,7 @@ static void I386OP(xor_r8_rm8)(i386_state *cpustate) // Opcode 0x32
}
}
-static void I386OP(xor_al_i8)(i386_state *cpustate) // Opcode 0x34
+static void I386OP(xor_al_i8)(i386_state *cpustate) // Opcode 0x34
{
UINT8 src, dst;
src = FETCH(cpustate);
@@ -1815,7 +1815,7 @@ static void I386OP(xor_al_i8)(i386_state *cpustate) // Opcode 0x34
-static void I386OP(group80_8)(i386_state *cpustate) // Opcode 0x80
+static void I386OP(group80_8)(i386_state *cpustate) // Opcode 0x80
{
UINT32 ea;
UINT8 src, dst;
@@ -1823,7 +1823,7 @@ static void I386OP(group80_8)(i386_state *cpustate) // Opcode 0x80
switch( (modrm >> 3) & 0x7 )
{
- case 0: // ADD Rm8, i8
+ case 0: // ADD Rm8, i8
if( modrm >= 0xc0 ) {
dst = LOAD_RM8(modrm);
src = FETCH(cpustate);
@@ -1839,7 +1839,7 @@ static void I386OP(group80_8)(i386_state *cpustate) // Opcode 0x80
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 1: // OR Rm8, i8
+ case 1: // OR Rm8, i8
if( modrm >= 0xc0 ) {
dst = LOAD_RM8(modrm);
src = FETCH(cpustate);
@@ -1855,7 +1855,7 @@ static void I386OP(group80_8)(i386_state *cpustate) // Opcode 0x80
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 2: // ADC Rm8, i8
+ case 2: // ADC Rm8, i8
if( modrm >= 0xc0 ) {
dst = LOAD_RM8(modrm);
src = FETCH(cpustate);
@@ -1871,7 +1871,7 @@ static void I386OP(group80_8)(i386_state *cpustate) // Opcode 0x80
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 3: // SBB Rm8, i8
+ case 3: // SBB Rm8, i8
if( modrm >= 0xc0 ) {
dst = LOAD_RM8(modrm);
src = FETCH(cpustate);
@@ -1887,7 +1887,7 @@ static void I386OP(group80_8)(i386_state *cpustate) // Opcode 0x80
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 4: // AND Rm8, i8
+ case 4: // AND Rm8, i8
if( modrm >= 0xc0 ) {
dst = LOAD_RM8(modrm);
src = FETCH(cpustate);
@@ -1903,7 +1903,7 @@ static void I386OP(group80_8)(i386_state *cpustate) // Opcode 0x80
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 5: // SUB Rm8, i8
+ case 5: // SUB Rm8, i8
if( modrm >= 0xc0 ) {
dst = LOAD_RM8(modrm);
src = FETCH(cpustate);
@@ -1919,7 +1919,7 @@ static void I386OP(group80_8)(i386_state *cpustate) // Opcode 0x80
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 6: // XOR Rm8, i8
+ case 6: // XOR Rm8, i8
if( modrm >= 0xc0 ) {
dst = LOAD_RM8(modrm);
src = FETCH(cpustate);
@@ -1935,7 +1935,7 @@ static void I386OP(group80_8)(i386_state *cpustate) // Opcode 0x80
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 7: // CMP Rm8, i8
+ case 7: // CMP Rm8, i8
if( modrm >= 0xc0 ) {
dst = LOAD_RM8(modrm);
src = FETCH(cpustate);
@@ -1952,7 +1952,7 @@ static void I386OP(group80_8)(i386_state *cpustate) // Opcode 0x80
}
}
-static void I386OP(groupC0_8)(i386_state *cpustate) // Opcode 0xc0
+static void I386OP(groupC0_8)(i386_state *cpustate) // Opcode 0xc0
{
UINT8 dst;
UINT8 modrm = FETCH(cpustate);
@@ -1972,7 +1972,7 @@ static void I386OP(groupC0_8)(i386_state *cpustate) // Opcode 0xc0
}
}
-static void I386OP(groupD0_8)(i386_state *cpustate) // Opcode 0xd0
+static void I386OP(groupD0_8)(i386_state *cpustate) // Opcode 0xd0
{
UINT8 dst;
UINT8 modrm = FETCH(cpustate);
@@ -1989,7 +1989,7 @@ static void I386OP(groupD0_8)(i386_state *cpustate) // Opcode 0xd0
}
}
-static void I386OP(groupD2_8)(i386_state *cpustate) // Opcode 0xd2
+static void I386OP(groupD2_8)(i386_state *cpustate) // Opcode 0xd2
{
UINT8 dst;
UINT8 modrm = FETCH(cpustate);
@@ -2006,13 +2006,13 @@ static void I386OP(groupD2_8)(i386_state *cpustate) // Opcode 0xd2
}
}
-static void I386OP(groupF6_8)(i386_state *cpustate) // Opcode 0xf6
+static void I386OP(groupF6_8)(i386_state *cpustate) // Opcode 0xf6
{
UINT8 modrm = FETCH(cpustate);
switch( (modrm >> 3) & 0x7 )
{
- case 0: /* TEST Rm8, i8 */
+ case 0: /* TEST Rm8, i8 */
if( modrm >= 0xc0 ) {
UINT8 dst = LOAD_RM8(modrm);
UINT8 src = FETCH(cpustate);
@@ -2030,7 +2030,7 @@ static void I386OP(groupF6_8)(i386_state *cpustate) // Opcode 0xf6
CYCLES(cpustate,CYCLES_TEST_IMM_MEM);
}
break;
- case 2: /* NOT Rm8 */
+ case 2: /* NOT Rm8 */
if( modrm >= 0xc0 ) {
UINT8 dst = LOAD_RM8(modrm);
dst = ~dst;
@@ -2044,7 +2044,7 @@ static void I386OP(groupF6_8)(i386_state *cpustate) // Opcode 0xf6
CYCLES(cpustate,CYCLES_NOT_MEM);
}
break;
- case 3: /* NEG Rm8 */
+ case 3: /* NEG Rm8 */
if( modrm >= 0xc0 ) {
UINT8 dst = LOAD_RM8(modrm);
dst = SUB8(cpustate, 0, dst );
@@ -2058,17 +2058,17 @@ static void I386OP(groupF6_8)(i386_state *cpustate) // Opcode 0xf6
CYCLES(cpustate,CYCLES_NEG_MEM);
}
break;
- case 4: /* MUL AL, Rm8 */
+ case 4: /* MUL AL, Rm8 */
{
UINT16 result;
UINT8 src, dst;
if( modrm >= 0xc0 ) {
src = LOAD_RM8(modrm);
- CYCLES(cpustate,CYCLES_MUL8_ACC_REG); /* TODO: Correct multiply timing */
+ CYCLES(cpustate,CYCLES_MUL8_ACC_REG); /* TODO: Correct multiply timing */
} else {
UINT32 ea = GetEA(cpustate,modrm,0);
src = READ8(cpustate,ea);
- CYCLES(cpustate,CYCLES_MUL8_ACC_MEM); /* TODO: Correct multiply timing */
+ CYCLES(cpustate,CYCLES_MUL8_ACC_MEM); /* TODO: Correct multiply timing */
}
dst = REG8(AL);
@@ -2078,17 +2078,17 @@ static void I386OP(groupF6_8)(i386_state *cpustate) // Opcode 0xf6
cpustate->CF = cpustate->OF = (REG16(AX) > 0xff);
}
break;
- case 5: /* IMUL AL, Rm8 */
+ case 5: /* IMUL AL, Rm8 */
{
INT16 result;
INT16 src, dst;
if( modrm >= 0xc0 ) {
src = (INT16)(INT8)LOAD_RM8(modrm);
- CYCLES(cpustate,CYCLES_IMUL8_ACC_REG); /* TODO: Correct multiply timing */
+ CYCLES(cpustate,CYCLES_IMUL8_ACC_REG); /* TODO: Correct multiply timing */
} else {
UINT32 ea = GetEA(cpustate,modrm,0);
src = (INT16)(INT8)READ8(cpustate,ea);
- CYCLES(cpustate,CYCLES_IMUL8_ACC_MEM); /* TODO: Correct multiply timing */
+ CYCLES(cpustate,CYCLES_IMUL8_ACC_MEM); /* TODO: Correct multiply timing */
}
dst = (INT16)(INT8)REG8(AL);
@@ -2099,7 +2099,7 @@ static void I386OP(groupF6_8)(i386_state *cpustate) // Opcode 0xf6
cpustate->CF = cpustate->OF = !(result == (INT16)(INT8)result);
}
break;
- case 6: /* DIV AL, Rm8 */
+ case 6: /* DIV AL, Rm8 */
{
UINT16 quotient, remainder, result;
UINT8 src;
@@ -2131,7 +2131,7 @@ static void I386OP(groupF6_8)(i386_state *cpustate) // Opcode 0xf6
}
}
break;
- case 7: /* IDIV AL, Rm8 */
+ case 7: /* IDIV AL, Rm8 */
{
INT16 quotient, remainder, result;
UINT8 src;
@@ -2166,13 +2166,13 @@ static void I386OP(groupF6_8)(i386_state *cpustate) // Opcode 0xf6
}
}
-static void I386OP(groupFE_8)(i386_state *cpustate) // Opcode 0xfe
+static void I386OP(groupFE_8)(i386_state *cpustate) // Opcode 0xfe
{
UINT8 modrm = FETCH(cpustate);
switch( (modrm >> 3) & 0x7 )
{
- case 0: /* INC Rm8 */
+ case 0: /* INC Rm8 */
if( modrm >= 0xc0 ) {
UINT8 dst = LOAD_RM8(modrm);
dst = INC8(cpustate,dst);
@@ -2186,7 +2186,7 @@ static void I386OP(groupFE_8)(i386_state *cpustate) // Opcode 0xfe
CYCLES(cpustate,CYCLES_INC_MEM);
}
break;
- case 1: /* DEC Rm8 */
+ case 1: /* DEC Rm8 */
if( modrm >= 0xc0 ) {
UINT8 dst = LOAD_RM8(modrm);
dst = DEC8(cpustate,dst);
@@ -2200,7 +2200,7 @@ static void I386OP(groupFE_8)(i386_state *cpustate) // Opcode 0xfe
CYCLES(cpustate,CYCLES_DEC_MEM);
}
break;
- case 6: /* PUSH Rm8 */
+ case 6: /* PUSH Rm8 */
{
UINT8 value;
if( modrm >= 0xc0 ) {
@@ -2225,7 +2225,7 @@ static void I386OP(groupFE_8)(i386_state *cpustate) // Opcode 0xfe
-static void I386OP(segment_CS)(i386_state *cpustate) // Opcode 0x2e
+static void I386OP(segment_CS)(i386_state *cpustate) // Opcode 0x2e
{
cpustate->segment_prefix = 1;
cpustate->segment_override = CS;
@@ -2233,47 +2233,47 @@ static void I386OP(segment_CS)(i386_state *cpustate) // Opcode 0x2e
I386OP(decode_opcode)(cpustate);
}
-static void I386OP(segment_DS)(i386_state *cpustate) // Opcode 0x3e
+static void I386OP(segment_DS)(i386_state *cpustate) // Opcode 0x3e
{
cpustate->segment_prefix = 1;
cpustate->segment_override = DS;
- CYCLES(cpustate,0); // TODO: Specify cycle count
+ CYCLES(cpustate,0); // TODO: Specify cycle count
I386OP(decode_opcode)(cpustate);
}
-static void I386OP(segment_ES)(i386_state *cpustate) // Opcode 0x26
+static void I386OP(segment_ES)(i386_state *cpustate) // Opcode 0x26
{
cpustate->segment_prefix = 1;
cpustate->segment_override = ES;
- CYCLES(cpustate,0); // TODO: Specify cycle count
+ CYCLES(cpustate,0); // TODO: Specify cycle count
I386OP(decode_opcode)(cpustate);
}
-static void I386OP(segment_FS)(i386_state *cpustate) // Opcode 0x64
+static void I386OP(segment_FS)(i386_state *cpustate) // Opcode 0x64
{
cpustate->segment_prefix = 1;
cpustate->segment_override = FS;
- CYCLES(cpustate,1); // TODO: Specify cycle count
+ CYCLES(cpustate,1); // TODO: Specify cycle count
I386OP(decode_opcode)(cpustate);
}
-static void I386OP(segment_GS)(i386_state *cpustate) // Opcode 0x65
+static void I386OP(segment_GS)(i386_state *cpustate) // Opcode 0x65
{
cpustate->segment_prefix = 1;
cpustate->segment_override = GS;
- CYCLES(cpustate,1); // TODO: Specify cycle count
+ CYCLES(cpustate,1); // TODO: Specify cycle count
I386OP(decode_opcode)(cpustate);
}
-static void I386OP(segment_SS)(i386_state *cpustate) // Opcode 0x36
+static void I386OP(segment_SS)(i386_state *cpustate) // Opcode 0x36
{
cpustate->segment_prefix = 1;
cpustate->segment_override = SS;
- CYCLES(cpustate,0); // TODO: Specify cycle count
+ CYCLES(cpustate,0); // TODO: Specify cycle count
I386OP(decode_opcode)(cpustate);
}
-static void I386OP(operand_size)(i386_state *cpustate) // Opcode prefix 0x66
+static void I386OP(operand_size)(i386_state *cpustate) // Opcode prefix 0x66
{
if(cpustate->operand_prefix == 0)
{
@@ -2292,7 +2292,7 @@ static void I386OP(operand_size)(i386_state *cpustate) // Opcode prefix 0x66
}
}
-static void I386OP(address_size)(i386_state *cpustate) // Opcode 0x67
+static void I386OP(address_size)(i386_state *cpustate) // Opcode 0x67
{
if(cpustate->address_prefix == 0)
{
@@ -2302,12 +2302,12 @@ static void I386OP(address_size)(i386_state *cpustate) // Opcode 0x67
I386OP(decode_opcode)(cpustate);
}
-static void I386OP(nop)(i386_state *cpustate) // Opcode 0x90
+static void I386OP(nop)(i386_state *cpustate) // Opcode 0x90
{
CYCLES(cpustate,CYCLES_NOP);
}
-static void I386OP(int3)(i386_state *cpustate) // Opcode 0xcc
+static void I386OP(int3)(i386_state *cpustate) // Opcode 0xcc
{
CYCLES(cpustate,CYCLES_INT3);
cpustate->ext = 0; // not an external interrupt
@@ -2315,7 +2315,7 @@ static void I386OP(int3)(i386_state *cpustate) // Opcode 0xcc
cpustate->ext = 1;
}
-static void I386OP(int)(i386_state *cpustate) // Opcode 0xcd
+static void I386OP(int)(i386_state *cpustate) // Opcode 0xcd
{
int interrupt = FETCH(cpustate);
CYCLES(cpustate,CYCLES_INT);
@@ -2324,7 +2324,7 @@ static void I386OP(int)(i386_state *cpustate) // Opcode 0xcd
cpustate->ext = 1;
}
-static void I386OP(into)(i386_state *cpustate) // Opcode 0xce
+static void I386OP(into)(i386_state *cpustate) // Opcode 0xce
{
if( cpustate->OF ) {
cpustate->ext = 0;
@@ -2338,19 +2338,19 @@ static void I386OP(into)(i386_state *cpustate) // Opcode 0xce
}
}
-static UINT32 i386_escape_ea; // hack around GCC 4.6 error because we need the side effects of GetEA()
-static void I386OP(escape)(i386_state *cpustate) // Opcodes 0xd8 - 0xdf
+static UINT32 i386_escape_ea; // hack around GCC 4.6 error because we need the side effects of GetEA()
+static void I386OP(escape)(i386_state *cpustate) // Opcodes 0xd8 - 0xdf
{
UINT8 modrm = FETCH(cpustate);
if(modrm < 0xc0)
{
i386_escape_ea = GetEA(cpustate,modrm,0);
}
- CYCLES(cpustate,3); // TODO: confirm this
+ CYCLES(cpustate,3); // TODO: confirm this
(void) LOAD_RM8(modrm);
}
-static void I386OP(hlt)(i386_state *cpustate) // Opcode 0xf4
+static void I386OP(hlt)(i386_state *cpustate) // Opcode 0xf4
{
if(PROTECTED_MODE && cpustate->CPL != 0)
FAULT(FAULT_GP,0);
@@ -2385,19 +2385,19 @@ static void I386OP(decimal_adjust)(i386_state *cpustate, int direction)
SetSZPF8(REG8(AL));
}
-static void I386OP(daa)(i386_state *cpustate) // Opcode 0x27
+static void I386OP(daa)(i386_state *cpustate) // Opcode 0x27
{
I386OP(decimal_adjust)(cpustate, +1);
CYCLES(cpustate,CYCLES_DAA);
}
-static void I386OP(das)(i386_state *cpustate) // Opcode 0x2f
+static void I386OP(das)(i386_state *cpustate) // Opcode 0x2f
{
I386OP(decimal_adjust)(cpustate, -1);
CYCLES(cpustate,CYCLES_DAS);
}
-static void I386OP(aaa)(i386_state *cpustate) // Opcode 0x37
+static void I386OP(aaa)(i386_state *cpustate) // Opcode 0x37
{
if( ( (REG8(AL) & 0x0f) > 9) || (cpustate->AF != 0) ) {
REG16(AX) = REG16(AX) + 6;
@@ -2412,25 +2412,25 @@ static void I386OP(aaa)(i386_state *cpustate) // Opcode 0x37
CYCLES(cpustate,CYCLES_AAA);
}
-static void I386OP(aas)(i386_state *cpustate) // Opcode 0x3f
+static void I386OP(aas)(i386_state *cpustate) // Opcode 0x3f
{
if (cpustate->AF || ((REG8(AL) & 0xf) > 9))
- {
+ {
REG16(AX) -= 6;
REG8(AH) -= 1;
cpustate->AF = 1;
cpustate->CF = 1;
- }
+ }
else
{
cpustate->AF = 0;
cpustate->CF = 0;
- }
+ }
REG8(AL) &= 0x0f;
CYCLES(cpustate,CYCLES_AAS);
}
-static void I386OP(aad)(i386_state *cpustate) // Opcode 0xd5
+static void I386OP(aad)(i386_state *cpustate) // Opcode 0xd5
{
UINT8 tempAL = REG8(AL);
UINT8 tempAH = REG8(AH);
@@ -2442,7 +2442,7 @@ static void I386OP(aad)(i386_state *cpustate) // Opcode 0xd5
CYCLES(cpustate,CYCLES_AAD);
}
-static void I386OP(aam)(i386_state *cpustate) // Opcode 0xd4
+static void I386OP(aam)(i386_state *cpustate) // Opcode 0xd4
{
UINT8 tempAL = REG8(AL);
UINT8 i = FETCH(cpustate);
@@ -2453,44 +2453,44 @@ static void I386OP(aam)(i386_state *cpustate) // Opcode 0xd4
CYCLES(cpustate,CYCLES_AAM);
}
-static void I386OP(clts)(i386_state *cpustate) // Opcode 0x0f 0x06
+static void I386OP(clts)(i386_state *cpustate) // Opcode 0x0f 0x06
{
// Privileged instruction, CPL must be zero. Can be used in real or v86 mode.
if(PROTECTED_MODE && cpustate->CPL != 0)
FAULT(FAULT_GP,0)
- cpustate->cr[0] &= ~0x08; /* clear TS bit */
+ cpustate->cr[0] &= ~0x08; /* clear TS bit */
CYCLES(cpustate,CYCLES_CLTS);
}
-static void I386OP(wait)(i386_state *cpustate) // Opcode 0x9B
+static void I386OP(wait)(i386_state *cpustate) // Opcode 0x9B
{
// TODO
}
-static void I386OP(lock)(i386_state *cpustate) // Opcode 0xf0
+static void I386OP(lock)(i386_state *cpustate) // Opcode 0xf0
{
// lock doesn't depend on iopl on 386
// TODO: lock causes UD on unlockable opcodes
- CYCLES(cpustate,CYCLES_LOCK); // TODO: Determine correct cycle count
+ CYCLES(cpustate,CYCLES_LOCK); // TODO: Determine correct cycle count
I386OP(decode_opcode)(cpustate);
}
-static void I386OP(mov_r32_tr)(i386_state *cpustate) // Opcode 0x0f 24
+static void I386OP(mov_r32_tr)(i386_state *cpustate) // Opcode 0x0f 24
{
FETCH(cpustate);
- CYCLES(cpustate,1); // TODO: correct cycle count
+ CYCLES(cpustate,1); // TODO: correct cycle count
}
-static void I386OP(mov_tr_r32)(i386_state *cpustate) // Opcode 0x0f 26
+static void I386OP(mov_tr_r32)(i386_state *cpustate) // Opcode 0x0f 26
{
FETCH(cpustate);
- CYCLES(cpustate,1); // TODO: correct cycle count
+ CYCLES(cpustate,1); // TODO: correct cycle count
}
-static void I386OP(loadall)(i386_state *cpustate) // Opcode 0x0f 0x07 (0x0f 0x05 on 80286), undocumented
+static void I386OP(loadall)(i386_state *cpustate) // Opcode 0x0f 0x07 (0x0f 0x05 on 80286), undocumented
{
popmessage("LOADALL instruction hit!");
- CYCLES(cpustate,1); // TODO: correct cycle count
+ CYCLES(cpustate,1); // TODO: correct cycle count
}
static void I386OP(unimplemented)(i386_state *cpustate)
@@ -2504,7 +2504,7 @@ static void I386OP(invalid)(i386_state *cpustate)
i386_trap(cpustate, 6, 0, 0);
}
-static void I386OP(xlat)(i386_state *cpustate) // Opcode 0xd7
+static void I386OP(xlat)(i386_state *cpustate) // Opcode 0xd7
{
UINT32 ea;
if( cpustate->segment_prefix ) {