diff options
Diffstat (limited to 'src/emu/cpu/hd61700/hd61700.c')
-rw-r--r-- | src/emu/cpu/hd61700/hd61700.c | 670 |
1 files changed, 335 insertions, 335 deletions
diff --git a/src/emu/cpu/hd61700/hd61700.c b/src/emu/cpu/hd61700/hd61700.c index 370437e27a1..cfbfb785720 100644 --- a/src/emu/cpu/hd61700/hd61700.c +++ b/src/emu/cpu/hd61700/hd61700.c @@ -25,66 +25,66 @@ #include "hd61700.h" // internal ROM -#define INT_ROM 0x0c00 +#define INT_ROM 0x0c00 // 5 bit registers -#define REG_SX m_regsir[0] -#define REG_SY m_regsir[1] -#define REG_SZ m_regsir[2] -#define READ_SREG(a) (m_regsir[((a)>>5) & 0x03] & 0x1f) -#define WRITE_SREG(a,d) (m_regsir[((a)>>5) & 0x03] = (d) & 0x1f) +#define REG_SX m_regsir[0] +#define REG_SY m_regsir[1] +#define REG_SZ m_regsir[2] +#define READ_SREG(a) (m_regsir[((a)>>5) & 0x03] & 0x1f) +#define WRITE_SREG(a,d) (m_regsir[((a)>>5) & 0x03] = (d) & 0x1f) // 8 bit registers -#define REG_PE m_reg8bit[0] -#define REG_PD m_reg8bit[1] -#define REG_IB m_reg8bit[2] -#define REG_UA m_reg8bit[3] -#define REG_IA m_reg8bit[4] -#define REG_IE m_reg8bit[5] -#define REG_TM m_reg8bit[7] -#define READ_REG8(a) (m_reg8bit[(a) & 0x07]) -#define WRITE_REG8(a,d) (m_reg8bit[(a) & 0x07] = d) +#define REG_PE m_reg8bit[0] +#define REG_PD m_reg8bit[1] +#define REG_IB m_reg8bit[2] +#define REG_UA m_reg8bit[3] +#define REG_IA m_reg8bit[4] +#define REG_IE m_reg8bit[5] +#define REG_TM m_reg8bit[7] +#define READ_REG8(a) (m_reg8bit[(a) & 0x07]) +#define WRITE_REG8(a,d) (m_reg8bit[(a) & 0x07] = d) // 16 bit registers -#define REG_IX m_reg16bit[0] -#define REG_IY m_reg16bit[1] -#define REG_IZ m_reg16bit[2] -#define REG_US m_reg16bit[3] -#define REG_SS m_reg16bit[4] -#define REG_KY m_reg16bit[5] +#define REG_IX m_reg16bit[0] +#define REG_IY m_reg16bit[1] +#define REG_IZ m_reg16bit[2] +#define REG_US m_reg16bit[3] +#define REG_SS m_reg16bit[4] +#define REG_KY m_reg16bit[5] // main registers -#define READ_REG(a) (m_regmain[(a) & 0x1f]) -#define WRITE_REG(a,d) (m_regmain[(a) & 0x1f] = d) -#define COPY_REG(d,s) (m_regmain[(d) & 0x1f] = m_regmain[(s) & 0x1f]) -#define REG_GET16(r) (((m_regmain[((r)) & 0x1f]<<0)) | (m_regmain[((r) + 1) & 0x1f]<<8)) -#define REG_PUT16(r,d) do{(m_regmain[(r) & 0x1f] = (((d)>>0) & 0xff)); (m_regmain[((r)+1)&0x1f]=(((d)>>8)&0xff));}while(0) +#define READ_REG(a) (m_regmain[(a) & 0x1f]) +#define WRITE_REG(a,d) (m_regmain[(a) & 0x1f] = d) +#define COPY_REG(d,s) (m_regmain[(d) & 0x1f] = m_regmain[(s) & 0x1f]) +#define REG_GET16(r) (((m_regmain[((r)) & 0x1f]<<0)) | (m_regmain[((r) + 1) & 0x1f]<<8)) +#define REG_PUT16(r,d) do{(m_regmain[(r) & 0x1f] = (((d)>>0) & 0xff)); (m_regmain[((r)+1)&0x1f]=(((d)>>8)&0xff));}while(0) // opcode -#define GET_REG_IDX(a,b) (((a<<2) & 0x04) | ((b>>5) & 0x03)) -#define RESTORE_REG(o,r,pr) r = (o&0x02) ? r : pr -#define COND_WRITE_REG(o,a,d) if (o&0x08) WRITE_REG(a,d) -#define GET_IM3(d) (((d>>5)&0x07) + 1) +#define GET_REG_IDX(a,b) (((a<<2) & 0x04) | ((b>>5) & 0x03)) +#define RESTORE_REG(o,r,pr) r = (o&0x02) ? r : pr +#define COND_WRITE_REG(o,a,d) if (o&0x08) WRITE_REG(a,d) +#define GET_IM3(d) (((d>>5)&0x07) + 1) // flags -#define SET_FLAG_C m_flags |= FLAG_C -#define CLEAR_FLAG_Z m_flags |= FLAG_Z -#define CLEAR_FLAG_LZ m_flags |= FLAG_LZ -#define CLEAR_FLAG_UZ m_flags |= FLAG_UZ -#define CLEAR_FLAGS m_flags &= ~(FLAG_Z | FLAG_C | FLAG_LZ | FLAG_UZ) - -#define CHECK_FLAG_Z(d) if((d) != 0) CLEAR_FLAG_Z -#define CHECK_FLAG_C(d,l) if (d > l) SET_FLAG_C -#define CHECK_FLAGB_LZ(d) if(((d) & 0x0f) != 0) CLEAR_FLAG_LZ -#define CHECK_FLAGB_UZ(d) if(((d) & 0xf0) != 0) CLEAR_FLAG_UZ -#define CHECK_FLAGW_LZ(d) if(((d) & 0x0f00) != 0) CLEAR_FLAG_LZ -#define CHECK_FLAGW_UZ(d) if(((d) & 0xf000) != 0) CLEAR_FLAG_UZ -#define CHECK_FLAGB_UZ_LZ(d) do{CHECK_FLAGB_LZ(d); CHECK_FLAGB_UZ(d);}while(0) -#define CHECK_FLAGW_UZ_LZ(d) do{CHECK_FLAGW_LZ(d); CHECK_FLAGW_UZ(d);}while(0) +#define SET_FLAG_C m_flags |= FLAG_C +#define CLEAR_FLAG_Z m_flags |= FLAG_Z +#define CLEAR_FLAG_LZ m_flags |= FLAG_LZ +#define CLEAR_FLAG_UZ m_flags |= FLAG_UZ +#define CLEAR_FLAGS m_flags &= ~(FLAG_Z | FLAG_C | FLAG_LZ | FLAG_UZ) + +#define CHECK_FLAG_Z(d) if((d) != 0) CLEAR_FLAG_Z +#define CHECK_FLAG_C(d,l) if (d > l) SET_FLAG_C +#define CHECK_FLAGB_LZ(d) if(((d) & 0x0f) != 0) CLEAR_FLAG_LZ +#define CHECK_FLAGB_UZ(d) if(((d) & 0xf0) != 0) CLEAR_FLAG_UZ +#define CHECK_FLAGW_LZ(d) if(((d) & 0x0f00) != 0) CLEAR_FLAG_LZ +#define CHECK_FLAGW_UZ(d) if(((d) & 0xf000) != 0) CLEAR_FLAG_UZ +#define CHECK_FLAGB_UZ_LZ(d) do{CHECK_FLAGB_LZ(d); CHECK_FLAGB_UZ(d);}while(0) +#define CHECK_FLAGW_UZ_LZ(d) do{CHECK_FLAGW_LZ(d); CHECK_FLAGW_UZ(d);}while(0) //CPU state -#define CPU_FAST 0x01 -#define CPU_SLP 0x02 +#define CPU_FAST 0x01 +#define CPU_SLP 0x02 /* HD61700 IRQ vector */ static const UINT16 irq_vector[] = {0x0032, 0x0042, 0x0052, 0x0062, 0x0072}; @@ -101,7 +101,7 @@ const device_type HD61700 = &device_creator<hd61700_cpu_device>; hd61700_cpu_device::hd61700_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : cpu_device(mconfig, HD61700, "HD61700", tag, owner, clock), - m_program_config("program", ENDIANNESS_BIG, 16, 18, -1) + m_program_config("program", ENDIANNESS_BIG, 16, 18, -1) { // ... } @@ -344,10 +344,10 @@ void hd61700_cpu_device::execute_run() // execute the instruction switch ( op ) { - case 0x00: //adc - case 0x01: //sbc - case 0x08: //ad - case 0x09: //sb + case 0x00: //adc + case 0x01: //sbc + case 0x08: //ad + case 0x09: //sb { UINT8 arg = read_op(); UINT8 src = READ_REG(get_sir_im8(arg)); @@ -365,7 +365,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x02: //ld + case 0x02: //ld { UINT8 arg = read_op(); COPY_REG(arg, get_sir_im8(arg)); @@ -375,14 +375,14 @@ void hd61700_cpu_device::execute_run() } break; - case 0x04: //anc - case 0x05: //nac - case 0x06: //orc - case 0x07: //xrc - case 0x0c: //an - case 0x0d: //na - case 0x0e: //or - case 0x0f: //xr + case 0x04: //anc + case 0x05: //nac + case 0x06: //orc + case 0x07: //xrc + case 0x0c: //an + case 0x0d: //na + case 0x0e: //or + case 0x0f: //xr { UINT8 arg = read_op(); @@ -403,8 +403,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0x0a: //adb - case 0x0b: //sbb + case 0x0a: //adb + case 0x0b: //sbb { UINT8 arg = read_op(); UINT16 res; @@ -426,7 +426,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x10: //st + case 0x10: //st { UINT8 arg = read_op(); UINT8 src = get_sir_im8(arg); @@ -439,7 +439,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x11: //ld + case 0x11: //ld { UINT8 arg = read_op(); UINT8 src = get_sir_im8(arg); @@ -452,7 +452,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x12: //stl + case 0x12: //stl { UINT8 arg = read_op(); @@ -464,7 +464,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x13: //ldl + case 0x13: //ldl { UINT8 arg = read_op(); UINT8 res = 0xff; @@ -479,7 +479,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x14: //ppo/pfl + case 0x14: //ppo/pfl { UINT8 arg = read_op(); @@ -498,7 +498,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x15: //psr + case 0x15: //psr { UINT8 arg = read_op(); WRITE_SREG(arg, READ_REG(arg)&0x1f); @@ -508,8 +508,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0x16: //pst - case 0x17: //pst + case 0x16: //pst + case 0x17: //pst { UINT8 arg = read_op(); UINT8 src = READ_REG(arg); @@ -517,30 +517,30 @@ void hd61700_cpu_device::execute_run() switch (idx) { - case 0: //PE - case 1: //PD + case 0: //PE + case 1: //PD WRITE_REG8(idx, src); if (m_port_w) (*m_port_w)(*this, REG_PD & REG_PE); break; - case 2: //IB + case 2: //IB REG_IB = (REG_IB & 0x1f) | (src & 0xe0); break; - case 3: //UA + case 3: //UA WRITE_REG8(idx, src); break; - case 4: //IA + case 4: //IA if (m_kb_w) (*m_kb_w)(*this, src); WRITE_REG8(idx, src); break; - case 5: //IE + case 5: //IE REG_IB &= (((src>>3)&0x1f) | 0xe0); m_irq_status &= ((src>>3)&0x1f); WRITE_REG8(idx, src); break; - case 6: //TM - case 7: //TM + case 6: //TM + case 7: //TM // read-only break; } @@ -556,8 +556,8 @@ void hd61700_cpu_device::execute_run() UINT8 op1 = (arg>>5) & 0x03; switch (op1) { - case 0x00: //rod - case 0x02: //bid + case 0x00: //rod + case 0x02: //bid { UINT8 src = READ_REG(arg); UINT8 res = (src>>1)&0x7f; @@ -574,8 +574,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0x01: //rou - case 0x03: //biu + case 0x01: //rou + case 0x03: //biu { UINT8 src = READ_REG(arg); UINT8 res = (src<<1)&0xfe; @@ -604,8 +604,8 @@ void hd61700_cpu_device::execute_run() UINT8 op1 = (arg>>5) & 0x03; switch (op1) { - case 0x00: //did - case 0x01: //diu + case 0x00: //did + case 0x01: //diu { UINT8 res; @@ -621,8 +621,8 @@ void hd61700_cpu_device::execute_run() CHECK_FLAGB_UZ_LZ(res); } break; - case 0x02: //byd - case 0x03: //byu + case 0x02: //byd + case 0x03: //byu { WRITE_REG(arg, 0); CLEAR_FLAGS; @@ -635,7 +635,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x1b: //cmp/inv + case 0x1b: //cmp/inv { UINT8 arg = read_op(); UINT8 res = ~(READ_REG(arg)); @@ -653,7 +653,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x1c: //gpo/gfl + case 0x1c: //gpo/gfl { UINT8 arg = read_op(); UINT8 src = 0xff; @@ -677,7 +677,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x1d: //gsr + case 0x1d: //gsr { UINT8 arg = read_op(); WRITE_REG(arg, READ_SREG(arg)); @@ -686,8 +686,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0x1e: //gst - case 0x1f: //gst + case 0x1e: //gst + case 0x1f: //gst { UINT8 arg = read_op(); UINT8 idx = GET_REG_IDX(op, arg); @@ -697,8 +697,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0x20: //st - case 0x22: //sti + case 0x20: //st + case 0x22: //sti { UINT8 arg = read_op(); UINT16 prev_ir = REG_IX; @@ -712,8 +712,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0x21: //st - case 0x23: //sti + case 0x21: //st + case 0x23: //sti { UINT8 arg = read_op(); UINT16 prev_ir = REG_IZ; @@ -727,7 +727,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x24: //std + case 0x24: //std { UINT8 arg = read_op(); REG_IX += get_sign_mreg(arg); @@ -737,7 +737,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x25: //std + case 0x25: //std { UINT8 arg = read_op(); REG_IZ += get_sign_mreg(arg); @@ -747,7 +747,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x26: //phs + case 0x26: //phs { UINT8 arg = read_op(); @@ -755,7 +755,7 @@ void hd61700_cpu_device::execute_run() m_icount -= 9; } break; - case 0x27: //phu + case 0x27: //phu { UINT8 arg = read_op(); @@ -764,8 +764,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0x28: //ld - case 0x2a: //ldi + case 0x28: //ld + case 0x2a: //ldi { UINT8 arg = read_op(); UINT16 prev_ir = REG_IX; @@ -779,8 +779,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0x29: //ld - case 0x2b: //ldi + case 0x29: //ld + case 0x2b: //ldi { UINT8 arg = read_op(); UINT16 prev_ir = REG_IZ; @@ -794,7 +794,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x2c: //ldd + case 0x2c: //ldd { UINT8 arg = read_op(); REG_IX += get_sign_mreg(arg); @@ -805,7 +805,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x2d: //ldd + case 0x2d: //ldd { UINT8 arg = read_op(); REG_IZ += get_sign_mreg(arg); @@ -816,7 +816,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x2e: //pps + case 0x2e: //pps { UINT8 arg = read_op(); WRITE_REG(arg, pop(REG_SS)); @@ -824,7 +824,7 @@ void hd61700_cpu_device::execute_run() m_icount -= 11; } break; - case 0x2f: //ppu + case 0x2f: //ppu { UINT8 arg = read_op(); WRITE_REG(arg, pop(REG_US)); @@ -833,14 +833,14 @@ void hd61700_cpu_device::execute_run() } break; - case 0x30: //jp z - case 0x31: //jp nc - case 0x32: //jp lz - case 0x33: //jp uz - case 0x34: //jp nz - case 0x35: //jp c - case 0x36: //jp nlz - case 0x37: //unconditional jp + case 0x30: //jp z + case 0x31: //jp nc + case 0x32: //jp lz + case 0x33: //jp uz + case 0x34: //jp nz + case 0x35: //jp c + case 0x36: //jp nlz + case 0x37: //unconditional jp { UINT8 lsb = read_op(); if (m_pc < INT_ROM) read_op(); @@ -852,10 +852,10 @@ void hd61700_cpu_device::execute_run() } break; - case 0x38: //adc - case 0x3a: //sbc - case 0x3c: //ad - case 0x3e: //sb + case 0x38: //adc + case 0x3a: //sbc + case 0x3c: //ad + case 0x3e: //sb { UINT8 arg = read_op(); UINT16 offset = REG_IX + get_sign_mreg(arg); @@ -875,10 +875,10 @@ void hd61700_cpu_device::execute_run() } break; - case 0x39: //adc - case 0x3b: //sbc - case 0x3d: //ad - case 0x3f: //sb + case 0x39: //adc + case 0x3b: //sbc + case 0x3d: //ad + case 0x3f: //sb { UINT8 arg = read_op(); UINT16 offset = REG_IZ + get_sign_mreg(arg); @@ -898,10 +898,10 @@ void hd61700_cpu_device::execute_run() } break; - case 0x40: //adc - case 0x41: //sbc - case 0x48: //ad - case 0x49: //sb + case 0x40: //adc + case 0x41: //sbc + case 0x48: //ad + case 0x49: //sb { UINT8 arg = read_op(); UINT8 src = read_op(); @@ -919,7 +919,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x42: //ld + case 0x42: //ld { UINT8 arg = read_op(); UINT8 src = read_op() ; @@ -931,14 +931,14 @@ void hd61700_cpu_device::execute_run() } break; - case 0x44: //anc - case 0x45: //nac - case 0x46: //orc - case 0x47: //xrc - case 0x4c: //an - case 0x4d: //na - case 0x4e: //or - case 0x4f: //xr + case 0x44: //anc + case 0x45: //nac + case 0x46: //orc + case 0x47: //xrc + case 0x4c: //an + case 0x4d: //na + case 0x4e: //or + case 0x4f: //xr { UINT8 arg = read_op(); UINT8 src = read_op(); @@ -960,8 +960,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0x4a: //adb - case 0x4b: //sbb + case 0x4a: //adb + case 0x4b: //sbb { UINT8 arg = read_op(); UINT8 src = read_op(); @@ -984,7 +984,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x50: //st + case 0x50: //st { UINT8 arg = read_op(); UINT8 src = read_op(); @@ -995,7 +995,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x51: //ld + case 0x51: //ld { UINT8 arg = read_op(); UINT8 src = read_op(); @@ -1005,7 +1005,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x52: //stl + case 0x52: //stl { UINT8 arg = read_op(); @@ -1016,7 +1016,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x54: //ppo/pfl + case 0x54: //ppo/pfl { UINT8 arg = read_op(); UINT8 src = read_op(); @@ -1035,7 +1035,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x55: //psr + case 0x55: //psr { UINT8 arg = read_op(); WRITE_SREG(arg, arg&0x1f); @@ -1044,8 +1044,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0x56: //pst - case 0x57: //pst + case 0x56: //pst + case 0x57: //pst { UINT8 arg = read_op(); UINT8 src = read_op(); @@ -1053,30 +1053,30 @@ void hd61700_cpu_device::execute_run() switch (idx) { - case 0: //PE - case 1: //PD + case 0: //PE + case 1: //PD WRITE_REG8(idx, src); if (m_port_w) (*m_port_w)(*this, REG_PD & REG_PE); break; - case 2: //IB + case 2: //IB REG_IB = (REG_IB & 0x1f) | (src & 0xe0); break; - case 3: //UA + case 3: //UA WRITE_REG8(idx, src); break; - case 4: //IA + case 4: //IA if (m_kb_w) (*m_kb_w)(*this, src); WRITE_REG8(idx, src); break; - case 5: //IE + case 5: //IE REG_IB &= (((src>>3)&0x1f) | 0xe0); m_irq_status &= ((src>>3)&0x1f); WRITE_REG8(idx, src); break; - case 6: //TM - case 7: //TM + case 6: //TM + case 7: //TM // read-only break; } @@ -1085,8 +1085,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0x58: //bups - case 0x59: //bdns + case 0x58: //bups + case 0x59: //bdns { UINT8 arg = read_op(); UINT8 tmp; @@ -1115,8 +1115,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0x5c: //sup - case 0x5d: //sdn + case 0x5c: //sup + case 0x5d: //sdn { UINT8 arg = read_op(); UINT16 res; @@ -1141,8 +1141,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0x60: //st - case 0x62: //sti + case 0x60: //st + case 0x62: //sti { UINT8 arg = read_op(); UINT16 prev_ir = REG_IX; @@ -1156,8 +1156,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0x61: //st - case 0x63: //sti + case 0x61: //st + case 0x63: //sti { UINT8 arg = read_op(); UINT16 prev_ir = REG_IZ; @@ -1170,7 +1170,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x64: //std + case 0x64: //std { UINT8 arg = read_op(); REG_IX += get_sign_im8(arg); @@ -1180,7 +1180,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x65: //std + case 0x65: //std { UINT8 arg = read_op(); REG_IZ += get_sign_im8(arg); @@ -1190,8 +1190,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0x68: //ld - case 0x6a: //ldi + case 0x68: //ld + case 0x6a: //ldi { UINT8 arg = read_op(); UINT16 prev_ir = REG_IX; @@ -1204,8 +1204,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0x69: //ld - case 0x6b: //ldi + case 0x69: //ld + case 0x6b: //ldi { UINT8 arg = read_op(); UINT16 prev_ir = REG_IZ; @@ -1218,7 +1218,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x6c: //ldd + case 0x6c: //ldd { UINT8 arg = read_op(); REG_IX += get_sign_im8(arg); @@ -1228,7 +1228,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x6d: //ldd + case 0x6d: //ldd { UINT8 arg = read_op(); REG_IZ += get_sign_im8(arg); @@ -1238,14 +1238,14 @@ void hd61700_cpu_device::execute_run() } break; - case 0x70: //cal z - case 0x71: //cal nc - case 0x72: //cal lz - case 0x73: //cal uz - case 0x74: //cal nz - case 0x75: //cal c - case 0x76: //cal nlz - case 0x77: //unconditional cal + case 0x70: //cal z + case 0x71: //cal nc + case 0x72: //cal lz + case 0x73: //cal uz + case 0x74: //cal nz + case 0x75: //cal c + case 0x76: //cal nlz + case 0x77: //unconditional cal { UINT8 lsb = read_op(); if (m_pc < INT_ROM) read_op(); @@ -1264,10 +1264,10 @@ void hd61700_cpu_device::execute_run() } break; - case 0x78: //adc - case 0x7a: //sbc - case 0x7c: //ad - case 0x7e: //sb + case 0x78: //adc + case 0x7a: //sbc + case 0x7c: //ad + case 0x7e: //sb { UINT8 arg = read_op(); UINT16 offset = REG_IX + get_sign_im8(arg); @@ -1287,10 +1287,10 @@ void hd61700_cpu_device::execute_run() } break; - case 0x79: //adc - case 0x7b: //sbc - case 0x7d: //ad - case 0x7f: //sb + case 0x79: //adc + case 0x7b: //sbc + case 0x7d: //ad + case 0x7f: //sb { UINT8 arg = read_op(); UINT16 offset = REG_IZ + get_sign_im8(arg); @@ -1310,16 +1310,16 @@ void hd61700_cpu_device::execute_run() } break; - case 0x80: //adcw - case 0x81: //sbcw - case 0x88: //adw - case 0x89: //sbw + case 0x80: //adcw + case 0x81: //sbcw + case 0x88: //adw + case 0x89: //sbw { UINT8 arg = read_op(); UINT8 src = get_sir_im8(arg); UINT32 res = REG_GET16(arg) + ((op & 0x01) ? -REG_GET16(src) : +REG_GET16(src)); - if (op & 0x08) REG_PUT16(arg, res&0xffff); + if (op & 0x08) REG_PUT16(arg, res&0xffff); CLEAR_FLAGS; CHECK_FLAG_Z(res & 0xffff); @@ -1331,7 +1331,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x82: //ldw + case 0x82: //ldw { UINT8 arg = read_op(); UINT8 src = get_sir_im8(arg); @@ -1344,14 +1344,14 @@ void hd61700_cpu_device::execute_run() } break; - case 0x84: //ancw - case 0x85: //nacw - case 0x86: //orcw - case 0x87: //xrcw - case 0x8c: //anw - case 0x8d: //naw - case 0x8e: //orw - case 0x8f: //xrw + case 0x84: //ancw + case 0x85: //nacw + case 0x86: //orcw + case 0x87: //xrcw + case 0x8c: //anw + case 0x8d: //naw + case 0x8e: //orw + case 0x8f: //xrw { UINT8 arg = read_op(); UINT8 src = get_sir_im8(arg); @@ -1375,8 +1375,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0x8a: //adbw - case 0x8b: //sbbw + case 0x8a: //adbw + case 0x8b: //sbbw { UINT8 arg = read_op(); UINT8 src = get_sir_im8(arg); @@ -1408,7 +1408,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x90: //stw + case 0x90: //stw { UINT8 arg = read_op(); UINT8 src = get_sir_im8(arg); @@ -1422,7 +1422,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x91: //ldw + case 0x91: //ldw { UINT8 arg = read_op(); UINT8 src = get_sir_im8(arg); @@ -1436,7 +1436,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x92: //stlw + case 0x92: //stlw { UINT8 arg = read_op(); @@ -1451,7 +1451,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x93: //ldcw + case 0x93: //ldcw { UINT8 arg = read_op(); UINT8 reg0, reg1; @@ -1472,8 +1472,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0x96: //pre - case 0x97: //pre + case 0x96: //pre + case 0x97: //pre { UINT8 arg = read_op(); UINT8 idx = GET_REG_IDX(op, arg); @@ -1486,14 +1486,14 @@ void hd61700_cpu_device::execute_run() } break; - case 0x98: //rodw + case 0x98: //rodw { UINT8 arg = read_op(); UINT8 op1 = (arg>>5) & 0x03; switch (op1) { - case 0x00: //rodw - case 0x02: //bidw + case 0x00: //rodw + case 0x02: //bidw { UINT16 src = REG_GET16(arg-1); UINT16 res = (src>>1)&0x7fff; @@ -1510,8 +1510,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0x01: //rouw - case 0x03: //biuw + case 0x01: //rouw + case 0x03: //biuw { UINT16 src = REG_GET16(arg); UINT16 res = (src<<1)&0xfffe; @@ -1540,7 +1540,7 @@ void hd61700_cpu_device::execute_run() UINT8 op1 = (arg>>5) & 0x03; switch (op1) { - case 0x00: //didw + case 0x00: //didw { UINT16 src = (REG_GET16(arg-1)>>4)&0x0fff; REG_PUT16(arg-1, src); @@ -1551,7 +1551,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x01: //diuw + case 0x01: //diuw { UINT16 src = (REG_GET16(arg)<<4)&0xfff0; REG_PUT16(arg, src); @@ -1562,7 +1562,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x02: //bydw + case 0x02: //bydw { UINT8 src = READ_REG(arg); @@ -1575,7 +1575,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x03: //byuw + case 0x03: //byuw { UINT8 src = READ_REG(arg); @@ -1594,7 +1594,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x9b: //cmpw/invw + case 0x9b: //cmpw/invw { UINT8 arg = read_op(); UINT16 res = ~(REG_GET16(arg)); @@ -1613,7 +1613,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x9c: //gpow/gflw + case 0x9c: //gpow/gflw { UINT8 arg = read_op(); UINT8 reg0, reg1; @@ -1645,8 +1645,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0x9e: //gre - case 0x9f: //gre + case 0x9e: //gre + case 0x9f: //gre { UINT8 arg = read_op(); UINT8 idx = GET_REG_IDX(op, arg); @@ -1671,8 +1671,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0xa0: //stw - case 0xa2: //stiw + case 0xa0: //stw + case 0xa2: //stiw { UINT8 arg = read_op(); UINT16 prev_ir = REG_IX; @@ -1688,8 +1688,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0xa1: //stw - case 0xa3: //stiw + case 0xa1: //stw + case 0xa3: //stiw { UINT8 arg = read_op(); UINT16 prev_ir = REG_IZ; @@ -1705,7 +1705,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0xa4: //stdw + case 0xa4: //stdw { UINT8 arg = read_op(); UINT8 ir_inc = READ_REG(get_sir_im8(arg)); @@ -1718,7 +1718,7 @@ void hd61700_cpu_device::execute_run() m_icount -= 9; } break; - case 0xa5: //stdw + case 0xa5: //stdw { UINT8 arg = read_op(); UINT8 ir_inc = READ_REG(get_sir_im8(arg)); @@ -1732,7 +1732,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0xa6: //phsw + case 0xa6: //phsw { UINT8 arg = read_op(); push(REG_SS, READ_REG(arg)); @@ -1741,7 +1741,7 @@ void hd61700_cpu_device::execute_run() m_icount -= 12; } break; - case 0xa7: //phuw + case 0xa7: //phuw { UINT8 arg = read_op(); push(REG_US, READ_REG(arg)); @@ -1751,8 +1751,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0xa8: //ldw - case 0xaa: //ldiw + case 0xa8: //ldw + case 0xaa: //ldiw { UINT8 arg = read_op(); UINT16 prev_ir = REG_IX; @@ -1769,8 +1769,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0xa9: //ldw - case 0xab: //ldiw + case 0xa9: //ldw + case 0xab: //ldiw { UINT8 arg = read_op(); UINT16 prev_ir = REG_IZ; @@ -1787,7 +1787,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0xac: //lddw + case 0xac: //lddw { UINT8 arg = read_op(); UINT8 ir_inc = READ_REG(get_sir_im8(arg)); @@ -1801,7 +1801,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0xad: //lddw + case 0xad: //lddw { UINT8 arg = read_op(); UINT8 ir_inc = READ_REG(get_sir_im8(arg)); @@ -1815,8 +1815,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0xae: //ppsw - case 0xaf: //ppuw + case 0xae: //ppsw + case 0xaf: //ppuw { UINT8 arg = read_op(); @@ -1827,14 +1827,14 @@ void hd61700_cpu_device::execute_run() } break; - case 0xb0: //jr z - case 0xb1: //jr nc - case 0xb2: //jr lz - case 0xb3: //jr uz - case 0xb4: //jr nz - case 0xb5: //jr c - case 0xb6: //jr nlz - case 0xb7: //unconditional jr + case 0xb0: //jr z + case 0xb1: //jr nc + case 0xb2: //jr lz + case 0xb3: //jr uz + case 0xb4: //jr nz + case 0xb5: //jr c + case 0xb6: //jr nlz + case 0xb7: //unconditional jr { UINT8 arg = read_op(); UINT32 new_pc = m_pc-1 + get_im_7(arg); @@ -1845,8 +1845,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0xb8: //adcw - case 0xbc: //adw + case 0xb8: //adcw + case 0xbc: //adw { UINT8 arg = read_op(); UINT8 ir_inc = READ_REG(get_sir_im8(arg)); @@ -1871,8 +1871,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0xba: //sbcw - case 0xbe: //sbw + case 0xba: //sbcw + case 0xbe: //sbw { UINT8 arg = read_op(); UINT8 ir_inc = READ_REG(get_sir_im8(arg)); @@ -1897,8 +1897,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0xb9: //adcw - case 0xbd: //adw + case 0xb9: //adcw + case 0xbd: //adw { UINT8 arg = read_op(); UINT8 ir_inc = READ_REG(get_sir_im8(arg)); @@ -1923,8 +1923,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0xbb: //sbcw - case 0xbf: //sbw + case 0xbb: //sbcw + case 0xbf: //sbw { UINT8 arg = read_op(); UINT8 ir_inc = READ_REG(get_sir_im8(arg)); @@ -1949,10 +1949,10 @@ void hd61700_cpu_device::execute_run() } break; - case 0xc0: //adbcm - case 0xc1: //sbbcm - case 0xc8: //adbm - case 0xc9: //sbbm + case 0xc0: //adbcm + case 0xc1: //sbbcm + case 0xc8: //adbm + case 0xc9: //sbbm { UINT8 arg = read_op(); UINT8 arg1 = read_op(); @@ -1989,7 +1989,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0xc2: //ldm + case 0xc2: //ldm { UINT8 arg = read_op(); UINT8 arg1 = read_op(); @@ -2007,14 +2007,14 @@ void hd61700_cpu_device::execute_run() } break; - case 0xc4: //ancm - case 0xc5: //nacm - case 0xc6: //orcm - case 0xc7: //xrcm - case 0xcc: //anm - case 0xcd: //nam - case 0xce: //orm - case 0xcf: //xrm + case 0xc4: //ancm + case 0xc5: //nacm + case 0xc6: //orcm + case 0xc7: //xrcm + case 0xcc: //anm + case 0xcd: //nam + case 0xce: //orm + case 0xcf: //xrm { UINT8 arg = read_op(); UINT8 arg1 = read_op(); @@ -2047,8 +2047,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0xca: //adbm - case 0xcb: //sbbm + case 0xca: //adbm + case 0xcb: //sbbm { UINT8 arg = read_op(); UINT8 arg1 = read_op(); @@ -2085,7 +2085,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0xd0: //stw + case 0xd0: //stw { UINT8 arg = read_op(); UINT16 offset = REG_GET16(READ_SREG(arg)); @@ -2097,7 +2097,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0xd1: //ldw + case 0xd1: //ldw { UINT8 arg = read_op(); UINT8 reg0 = read_op(); @@ -2109,7 +2109,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0xd2: //stlm + case 0xd2: //stlm { UINT8 arg = read_op(); UINT8 arg1 = read_op(); @@ -2127,7 +2127,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0xd3: //ldlm + case 0xd3: //ldlm { UINT8 arg = read_op(); UINT8 arg1 = read_op(); @@ -2149,8 +2149,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0xd6: //pre - case 0xd7: //pre + case 0xd6: //pre + case 0xd7: //pre { UINT8 arg = read_op(); UINT8 lsb = read_op(); @@ -2164,8 +2164,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0xd8: //bup - case 0xd9: //bdn + case 0xd8: //bup + case 0xd9: //bdn { UINT8 src; for(;;) @@ -2191,7 +2191,7 @@ void hd61700_cpu_device::execute_run() UINT8 op1 = (arg>>5) & 0x03; switch (op1) { - case 0x00: //didm + case 0x00: //didm { UINT8 arg1 = read_op(); UINT8 r1 = 0, r2 = 0; @@ -2211,7 +2211,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x01: //dium + case 0x01: //dium { UINT8 arg1 = read_op(); UINT8 r1 = 0, r2 = 0; @@ -2231,7 +2231,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x02: //bydm + case 0x02: //bydm { UINT8 arg1 = read_op(); UINT8 r1 = 0, r2 = 0, f = 0; @@ -2251,7 +2251,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0x03: //byum + case 0x03: //byum { UINT8 arg1 = read_op(); UINT8 r1 = 0, r2 = 0, f = 0; @@ -2274,7 +2274,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0xdb: //cmpm/invm + case 0xdb: //cmpm/invm { UINT8 arg = read_op(); UINT8 arg1 = read_op(); @@ -2301,8 +2301,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0xdc: //sup - case 0xdd: //sdn + case 0xdc: //sup + case 0xdd: //sdn { UINT8 arg = read_op(); UINT16 res; @@ -2327,7 +2327,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0xde: //jp + case 0xde: //jp { UINT8 arg = read_op(); set_pc(REG_GET16(arg)); @@ -2336,7 +2336,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0xdf: //jp + case 0xdf: //jp { UINT8 arg = read_op(); UINT16 offset = REG_GET16(arg); @@ -2349,8 +2349,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0xe0: //stm - case 0xe2: //stim + case 0xe0: //stm + case 0xe2: //stim { UINT8 arg = read_op(); UINT8 arg1 = read_op(); @@ -2371,8 +2371,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0xe1: //stm - case 0xe3: //stim + case 0xe1: //stm + case 0xe3: //stim { UINT8 arg = read_op(); UINT8 arg1 = read_op(); @@ -2393,7 +2393,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0xe4: //stdm + case 0xe4: //stdm { UINT8 arg = read_op(); UINT8 arg1 = read_op(); @@ -2413,7 +2413,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0xe5: //stdm + case 0xe5: //stdm { UINT8 arg = read_op(); UINT8 arg1 = read_op(); @@ -2433,8 +2433,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0xe6: //phsm - case 0xe7: //phum + case 0xe6: //phsm + case 0xe7: //phum { UINT8 arg = read_op(); UINT8 arg1 = read_op(); @@ -2450,8 +2450,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0xe8: //ldm - case 0xea: //ldim + case 0xe8: //ldm + case 0xea: //ldim { UINT8 arg = read_op(); UINT8 arg1 = read_op(); @@ -2472,8 +2472,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0xe9: //ldm - case 0xeb: //ldim + case 0xe9: //ldm + case 0xeb: //ldim { UINT8 arg = read_op(); UINT8 arg1 = read_op(); @@ -2494,7 +2494,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0xec: //lddm + case 0xec: //lddm { UINT8 arg = read_op(); UINT8 arg1 = read_op(); @@ -2514,7 +2514,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0xed: //lddm + case 0xed: //lddm { UINT8 arg = read_op(); UINT8 arg1 = read_op(); @@ -2534,8 +2534,8 @@ void hd61700_cpu_device::execute_run() } break; - case 0xee: //ppsm - case 0xef: //ppum + case 0xee: //ppsm + case 0xef: //ppum { UINT8 arg = read_op(); UINT8 arg1 = read_op(); @@ -2550,14 +2550,14 @@ void hd61700_cpu_device::execute_run() } break; - case 0xf0: //rtn z - case 0xf1: //rtn nc - case 0xf2: //rtn lz - case 0xf3: //rtn uz - case 0xf4: //rtn nz - case 0xf5: //rtn c - case 0xf6: //rtn nlz - case 0xf7: //unconditional rtn + case 0xf0: //rtn z + case 0xf1: //rtn nc + case 0xf2: //rtn lz + case 0xf3: //rtn uz + case 0xf4: //rtn nz + case 0xf5: //rtn c + case 0xf6: //rtn nlz + case 0xf7: //unconditional rtn { if (check_cond(op)) { @@ -2570,26 +2570,26 @@ void hd61700_cpu_device::execute_run() } break; - case 0xf8: //nop + case 0xf8: //nop m_icount -= 3; break; - case 0xf9: //clt + case 0xf9: //clt REG_TM = 0; m_icount -= 3; break; - case 0xfa: //fst + case 0xfa: //fst m_state |= CPU_FAST; m_icount -= 3; break; - case 0xfb: //slw + case 0xfb: //slw m_state &= ~CPU_FAST; m_icount -= 3; break; - case 0xfd: //rtni + case 0xfd: //rtni { UINT8 lsb = pop(REG_SS); UINT8 msb = pop(REG_SS); @@ -2600,7 +2600,7 @@ void hd61700_cpu_device::execute_run() } //fall through - case 0xfc: //cani + case 0xfc: //cani { for (UINT8 arg=0x10; arg>0; arg>>=1) { @@ -2616,7 +2616,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0xfe: //off + case 0xfe: //off { set_pc(0); REG_UA = REG_IA = 0; @@ -2641,7 +2641,7 @@ void hd61700_cpu_device::execute_run() } break; - case 0xff: //trp + case 0xff: //trp { m_pc--; push(REG_SS, (m_pc>>8)&0xff); @@ -2709,37 +2709,37 @@ void hd61700_cpu_device::execute_set_input(int inputnum, int state) m_state &= ~(CPU_SLP | CPU_FAST); set_pc(0x0000); break; - case HD61700_KEY_INT: //level sensitive line + case HD61700_KEY_INT: //level sensitive line if (((REG_IE>>3) & (1<<inputnum)) && state != CLEAR_LINE) REG_IB |= (1<<inputnum); break; - case HD61700_INT1: //edge sensitive line + case HD61700_INT1: //edge sensitive line if (((REG_IE>>3) & (1<<inputnum)) && (m_lines_status[inputnum] != state)) REG_IB |= (1<<inputnum); if (m_lines_status[inputnum] == CLEAR_LINE && state != CLEAR_LINE) - REG_IE = (REG_IE & 0xfd) | 0x02; //rising edge + REG_IE = (REG_IE & 0xfd) | 0x02; //rising edge else if (m_lines_status[inputnum] != CLEAR_LINE && state == CLEAR_LINE) - REG_IE = (REG_IE & 0xfd) | 0x00; //falling edge + REG_IE = (REG_IE & 0xfd) | 0x00; //falling edge REG_KY = (REG_KY & 0xf7ff) | ((state != CLEAR_LINE)<<11); break; - case HD61700_INT2: //level sensitive line + case HD61700_INT2: //level sensitive line if (((REG_IE>>3) & (1<<inputnum)) && state != CLEAR_LINE) REG_IB |= (1<<inputnum); REG_IE = (REG_IE & 0xfe) | (state != CLEAR_LINE); REG_KY = (REG_KY & 0xfbff) | ((state != CLEAR_LINE)<<10); break; - case HD61700_ON_INT: //level sensitive line + case HD61700_ON_INT: //level sensitive line if ((REG_IE>>3) & (1<<inputnum) && state != CLEAR_LINE) REG_IB |= (1<<inputnum); REG_KY = (REG_KY & 0xfdff) | ((state != CLEAR_LINE)<<9); break; - case HD61700_SW: //level sensitive line + case HD61700_SW: //level sensitive line if (state != CLEAR_LINE) { if ((m_state & CPU_SLP) || m_lines_status[HD61700_SW] == CLEAR_LINE) @@ -2835,42 +2835,42 @@ inline int hd61700_cpu_device::check_cond(UINT32 op) { switch ( op & 0x07 ) { - case 0x00: // Z set + case 0x00: // Z set if ( !(m_flags & FLAG_Z) ) return 1; break; - case 0x01: // NC set + case 0x01: // NC set if ( !(m_flags & FLAG_C) ) return 1; break; - case 0x02: // LZ set + case 0x02: // LZ set if ( !(m_flags & FLAG_LZ) ) return 1; break; - case 0x03: // UZ set + case 0x03: // UZ set if ( !(m_flags & FLAG_UZ) ) return 1; break; - case 0x04: // NZ set + case 0x04: // NZ set if ( m_flags & FLAG_Z ) return 1; break; - case 0x05: // C set + case 0x05: // C set if ( m_flags & FLAG_C ) return 1; break; - case 0x06: // NLZ clear + case 0x06: // NLZ clear if ( m_flags & FLAG_LZ ) return 1; break; - case 0x07: // unconditional + case 0x07: // unconditional return 1; } @@ -2881,13 +2881,13 @@ inline UINT8 hd61700_cpu_device::make_logic(UINT8 type, UINT8 d1, UINT8 d2) { switch (type&3) { - case 0: //and + case 0: //and return d1 & d2; - case 1: //nand + case 1: //nand return ~(d1 & d2); - case 2: //or + case 2: //or return d1 | d2; - case 3: //xor + case 3: //xor return d1 ^ d2; default: return 0x00; |