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Diffstat (limited to 'src/emu/cpu/avr8/avr8.c')
-rw-r--r--src/emu/cpu/avr8/avr8.c54
1 files changed, 31 insertions, 23 deletions
diff --git a/src/emu/cpu/avr8/avr8.c b/src/emu/cpu/avr8/avr8.c
index 976b2ff8856..0f15c655cb4 100644
--- a/src/emu/cpu/avr8/avr8.c
+++ b/src/emu/cpu/avr8/avr8.c
@@ -12,9 +12,12 @@
the existing opcodes has been shown to wildly corrupt the video output in Craft, so one can assume that the
existing timing is 100% correct.
- Unimplemented opcodes: SPM, SPM Z+, EIJMP, SLEEP, BREAK, WDR, EICALL, JMP, CALL
+ Unimplemented opcodes: SPM, SPM Z+, SLEEP, BREAK, WDR, EICALL, JMP, CALL
- Changelist -
+ 05 Jul. 2015 [Felipe Sanches]
+ - Implemented EIJMP instruction
+
29 Dec. 2013 [Felipe Sanches]
- Added crude boilerplate code for Timer/Counter #4
@@ -92,7 +95,7 @@ enum
AVR8_SREG_S,
AVR8_SREG_H,
AVR8_SREG_T,
- AVR8_SREG_I,
+ AVR8_SREG_I
};
// I/O Enums
@@ -621,7 +624,7 @@ atmega1280_device::atmega1280_device(const machine_config &mconfig, const char *
//-------------------------------------------------
atmega2560_device::atmega2560_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : avr8_device(mconfig, "ATMEGA2560", tag, owner, clock, ATMEGA2560, 0x3ffff, ADDRESS_MAP_NAME(atmega2560_internal_map), CPU_TYPE_ATMEGA2560, "atmega2560", __FILE__)
+ : avr8_device(mconfig, "ATMEGA2560", tag, owner, clock, ATMEGA2560, 0x1ffff, ADDRESS_MAP_NAME(atmega2560_internal_map), CPU_TYPE_ATMEGA2560, "atmega2560", __FILE__)
{
}
@@ -869,6 +872,7 @@ void avr8_device::device_reset()
m_timer_prescale_count[t] = 0;
}
+ m_ocr2_not_reached_yet = true;
m_interrupt_pending = false;
m_elapsed_cycles = 0;
}
@@ -1173,11 +1177,11 @@ void avr8_device::timer0_tick()
switch(AVR8_WGM0)
{
case WGM02_NORMAL:
- printf("WGM02_NORMAL: Unimplemented timer#0 waveform generation mode\n");
+ //printf("WGM02_NORMAL: Unimplemented timer#0 waveform generation mode\n");
break;
case WGM02_PWM_PC:
- printf("WGM02_PWM_PC: Unimplemented timer#0 waveform generation mode\n");
+ //printf("WGM02_PWM_PC: Unimplemented timer#0 waveform generation mode\n");
break;
case WGM02_CTC_CMP:
@@ -1553,22 +1557,26 @@ void avr8_device::timer2_tick()
switch(wgm2)
{
case WGM02_FAST_PWM:
- if(count == ocr2[reg])
+ if (reg==0)
{
- if (reg == 0)
+ if (count >= m_r[AVR8_REGIDX_OCR2A])
{
- m_r[AVR8_REGIDX_TIFR2] |= AVR8_TIFR2_TOV2_MASK;
- count = 0;
- increment = 0;
- }
-
- m_r[AVR8_REGIDX_TIFR2] |= ocf2[reg];
- }
- else if(count == 0)
- {
- if (reg == 0)
- {
- m_r[AVR8_REGIDX_TIFR2] &= ~AVR8_TIFR2_TOV2_MASK;
+ if (count >= 0xFF)
+ {
+ //Turn on
+ m_io->write_byte(AVR8_IO_PORTD, m_io->read_byte(AVR8_IO_PORTD) | (1 << 7));
+ m_r[AVR8_REGIDX_TCNT2] = 0;
+ m_ocr2_not_reached_yet = true;
+ }
+ else
+ {
+ if (m_ocr2_not_reached_yet)
+ {
+ //Turn off
+ m_io->write_byte(AVR8_IO_PORTD, m_io->read_byte(AVR8_IO_PORTD) & ~(1 << 7));
+ m_ocr2_not_reached_yet = false;
+ }
+ }
}
}
break;
@@ -1585,7 +1593,7 @@ void avr8_device::timer2_tick()
m_r[AVR8_REGIDX_TIFR2] |= ocf2[reg];
}
- else if(count == 0)
+ else if (count == 0)
{
if (reg == 0)
{
@@ -1616,7 +1624,7 @@ void avr8_device::timer2_tick()
*/
}
- m_r[AVR8_REGIDX_TCNT2] = count + increment;
+ m_r[AVR8_REGIDX_TCNT2] += increment;
update_interrupt(AVR8_INTIDX_OCF2A);
update_interrupt(AVR8_INTIDX_OCF2B);
@@ -3533,8 +3541,8 @@ void avr8_device::execute_run()
opcycles = 2;
break;
case 0x0010: // EIJMP
- //output += sprintf( output, "EIJMP" );
- unimplemented_opcode(op);
+ m_pc = (m_r[AVR8_REGIDX_EIND] << 16 | ZREG) - 1;
+ opcycles = 2;
break;
default:
//output += sprintf( output, "Undefined (%04x)", op );