diff options
Diffstat (limited to 'src/emu/cpu/adsp2100/adsp2100.c')
-rw-r--r-- | src/emu/cpu/adsp2100/adsp2100.c | 134 |
1 files changed, 67 insertions, 67 deletions
diff --git a/src/emu/cpu/adsp2100/adsp2100.c b/src/emu/cpu/adsp2100/adsp2100.c index 95e2e31f852..4c2dcce4e26 100644 --- a/src/emu/cpu/adsp2100/adsp2100.c +++ b/src/emu/cpu/adsp2100/adsp2100.c @@ -150,40 +150,40 @@ const device_type ADSP2181 = &device_creator<adsp2181_device>; adsp21xx_device::adsp21xx_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT32 chiptype) : cpu_device(mconfig, type, name, tag, owner, clock), - m_program_config("program", ENDIANNESS_LITTLE, 32, 14, -2), - m_data_config("data", ENDIANNESS_LITTLE, 16, 14, -1), - m_chip_type(chiptype), - m_pc(0), - m_ppc(0), - m_loop(0), - m_loop_condition(0), - m_cntr(0), - m_astat(0), - m_sstat(0), - m_mstat(0), - m_mstat_prev(0), - m_astat_clear(0), - m_idle(0), - m_px(0), - m_pc_sp(0), - m_cntr_sp(0), - m_stat_sp(0), - m_loop_sp(0), - m_flagout(0), - m_flagin(0), - m_fl0(0), - m_fl1(0), - m_fl2(0), - m_idma_addr(0), - m_idma_cache(0), - m_idma_offs(0), - m_imask(0), - m_icntl(0), - m_ifc(0), - m_icount(0), - m_mstat_mask((m_chip_type >= CHIP_TYPE_ADSP2101) ? 0x7f : 0x0f), - m_imask_mask((m_chip_type >= CHIP_TYPE_ADSP2181) ? 0x3ff : - (m_chip_type >= CHIP_TYPE_ADSP2101) ? 0x3f : 0x0f) + m_program_config("program", ENDIANNESS_LITTLE, 32, 14, -2), + m_data_config("data", ENDIANNESS_LITTLE, 16, 14, -1), + m_chip_type(chiptype), + m_pc(0), + m_ppc(0), + m_loop(0), + m_loop_condition(0), + m_cntr(0), + m_astat(0), + m_sstat(0), + m_mstat(0), + m_mstat_prev(0), + m_astat_clear(0), + m_idle(0), + m_px(0), + m_pc_sp(0), + m_cntr_sp(0), + m_stat_sp(0), + m_loop_sp(0), + m_flagout(0), + m_flagin(0), + m_fl0(0), + m_fl1(0), + m_fl2(0), + m_idma_addr(0), + m_idma_cache(0), + m_idma_offs(0), + m_imask(0), + m_icntl(0), + m_ifc(0), + m_icount(0), + m_mstat_mask((m_chip_type >= CHIP_TYPE_ADSP2101) ? 0x7f : 0x0f), + m_imask_mask((m_chip_type >= CHIP_TYPE_ADSP2181) ? 0x3ff : + (m_chip_type >= CHIP_TYPE_ADSP2101) ? 0x3f : 0x0f) { // initialize remaining state memset(&m_core, 0, sizeof(m_core)); @@ -297,7 +297,7 @@ adsp2115_device::adsp2115_device(const machine_config &mconfig, const char *tag, adsp2181_device::adsp2181_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : adsp21xx_device(mconfig, ADSP2181, "ADSP-2181", tag, owner, clock, CHIP_TYPE_ADSP2181), - m_io_config("I/O", ENDIANNESS_LITTLE, 16, 11, -1) { } + m_io_config("I/O", ENDIANNESS_LITTLE, 16, 11, -1) { } //------------------------------------------------- @@ -632,14 +632,14 @@ void adsp21xx_device::device_reset() m_core.zero.u = m_alt.zero.u = 0; // recompute the memory registers with their current values - write_reg1(0x08, m_l[0]); write_reg1(0x00, m_i[0]); - write_reg1(0x09, m_l[1]); write_reg1(0x01, m_i[1]); - write_reg1(0x0a, m_l[2]); write_reg1(0x02, m_i[2]); - write_reg1(0x0b, m_l[3]); write_reg1(0x03, m_i[3]); - write_reg2(0x08, m_l[4]); write_reg2(0x00, m_i[4]); - write_reg2(0x09, m_l[5]); write_reg2(0x01, m_i[5]); - write_reg2(0x0a, m_l[6]); write_reg2(0x02, m_i[6]); - write_reg2(0x0b, m_l[7]); write_reg2(0x03, m_i[7]); + write_reg1(0x08, m_l[0]); write_reg1(0x00, m_i[0]); + write_reg1(0x09, m_l[1]); write_reg1(0x01, m_i[1]); + write_reg1(0x0a, m_l[2]); write_reg1(0x02, m_i[2]); + write_reg1(0x0b, m_l[3]); write_reg1(0x03, m_i[3]); + write_reg2(0x08, m_l[4]); write_reg2(0x00, m_i[4]); + write_reg2(0x09, m_l[5]); write_reg2(0x01, m_i[5]); + write_reg2(0x0a, m_l[6]); write_reg2(0x02, m_i[6]); + write_reg2(0x0b, m_l[7]); write_reg2(0x03, m_i[7]); // reset PC and loops m_pc = (m_chip_type >= CHIP_TYPE_ADSP2101) ? 0 : 4; @@ -682,21 +682,21 @@ void adsp21xx_device::device_reset() const address_space_config *adsp2100_device::memory_space_config(address_spacenum spacenum) const { - return (spacenum == AS_PROGRAM) ? &m_program_config : + return (spacenum == AS_PROGRAM) ? &m_program_config : (spacenum == AS_DATA) ? &m_data_config : NULL; } const address_space_config *adsp2101_device::memory_space_config(address_spacenum spacenum) const { - return (spacenum == AS_PROGRAM) ? &m_program_config : + return (spacenum == AS_PROGRAM) ? &m_program_config : (spacenum == AS_DATA) ? &m_data_config : NULL; } const address_space_config *adsp2181_device::memory_space_config(address_spacenum spacenum) const { - return (spacenum == AS_PROGRAM) ? &m_program_config : + return (spacenum == AS_PROGRAM) ? &m_program_config : (spacenum == AS_DATA) ? &m_data_config : (spacenum == AS_IO) ? &m_io_config : NULL; @@ -1089,7 +1089,7 @@ void adsp21xx_device::create_tables() // initialize the mask table for (int i = 0; i < 0x4000; i++) { - if (i > 0x2000) m_mask_table[i] = 0x0000; + if (i > 0x2000) m_mask_table[i] = 0x0000; else if (i > 0x1000) m_mask_table[i] = 0x2000; else if (i > 0x0800) m_mask_table[i] = 0x3000; else if (i > 0x0400) m_mask_table[i] = 0x3800; @@ -1187,10 +1187,10 @@ void adsp21xx_device::execute_set_input(int inputnum, int state) { // update the latched state if (state != CLEAR_LINE && m_irq_state[inputnum] == CLEAR_LINE) - m_irq_latch[inputnum] = 1; + m_irq_latch[inputnum] = 1; - // update the absolute state - m_irq_state[inputnum] = state; + // update the absolute state + m_irq_state[inputnum] = state; } @@ -1203,7 +1203,7 @@ void adsp21xx_device::execute_run() do { // debugging - m_ppc = m_pc; // copy PC to previous PC + m_ppc = m_pc; // copy PC to previous PC if (check_debugger) debugger_instruction_hook(this, m_pc); @@ -1402,22 +1402,22 @@ void adsp21xx_device::execute_run() // 00001101 0000xxxx xxxxxxxx internal data move switch ((op >> 8) & 15) { - case 0x00: write_reg0((op >> 4) & 15, read_reg0(op & 15)); break; - case 0x01: write_reg0((op >> 4) & 15, read_reg1(op & 15)); break; - case 0x02: write_reg0((op >> 4) & 15, read_reg2(op & 15)); break; - case 0x03: write_reg0((op >> 4) & 15, read_reg3(op & 15)); break; - case 0x04: write_reg1((op >> 4) & 15, read_reg0(op & 15)); break; - case 0x05: write_reg1((op >> 4) & 15, read_reg1(op & 15)); break; - case 0x06: write_reg1((op >> 4) & 15, read_reg2(op & 15)); break; - case 0x07: write_reg1((op >> 4) & 15, read_reg3(op & 15)); break; - case 0x08: write_reg2((op >> 4) & 15, read_reg0(op & 15)); break; - case 0x09: write_reg2((op >> 4) & 15, read_reg1(op & 15)); break; - case 0x0a: write_reg2((op >> 4) & 15, read_reg2(op & 15)); break; - case 0x0b: write_reg2((op >> 4) & 15, read_reg3(op & 15)); break; - case 0x0c: write_reg3((op >> 4) & 15, read_reg0(op & 15)); break; - case 0x0d: write_reg3((op >> 4) & 15, read_reg1(op & 15)); break; - case 0x0e: write_reg3((op >> 4) & 15, read_reg2(op & 15)); break; - case 0x0f: write_reg3((op >> 4) & 15, read_reg3(op & 15)); break; + case 0x00: write_reg0((op >> 4) & 15, read_reg0(op & 15)); break; + case 0x01: write_reg0((op >> 4) & 15, read_reg1(op & 15)); break; + case 0x02: write_reg0((op >> 4) & 15, read_reg2(op & 15)); break; + case 0x03: write_reg0((op >> 4) & 15, read_reg3(op & 15)); break; + case 0x04: write_reg1((op >> 4) & 15, read_reg0(op & 15)); break; + case 0x05: write_reg1((op >> 4) & 15, read_reg1(op & 15)); break; + case 0x06: write_reg1((op >> 4) & 15, read_reg2(op & 15)); break; + case 0x07: write_reg1((op >> 4) & 15, read_reg3(op & 15)); break; + case 0x08: write_reg2((op >> 4) & 15, read_reg0(op & 15)); break; + case 0x09: write_reg2((op >> 4) & 15, read_reg1(op & 15)); break; + case 0x0a: write_reg2((op >> 4) & 15, read_reg2(op & 15)); break; + case 0x0b: write_reg2((op >> 4) & 15, read_reg3(op & 15)); break; + case 0x0c: write_reg3((op >> 4) & 15, read_reg0(op & 15)); break; + case 0x0d: write_reg3((op >> 4) & 15, read_reg1(op & 15)); break; + case 0x0e: write_reg3((op >> 4) & 15, read_reg2(op & 15)); break; + case 0x0f: write_reg3((op >> 4) & 15, read_reg3(op & 15)); break; } break; case 0x0e: |